From cf137b0961a5d2877ac9389fc806618918423445 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?=E2=80=9C=E8=8B=8F=E9=A3=9E=E6=BA=90=E2=80=9D?= Date: Fri, 14 Jul 2023 14:58:31 +0800 Subject: [PATCH] =?UTF-8?q?1=E3=80=81=E5=A2=9E=E5=8A=A0=E6=A0=A1=E5=87=86?= =?UTF-8?q?=E7=8A=B6=E6=80=81=E5=9B=9E=E8=AF=BB=EF=BC=9B=202=E3=80=81?= =?UTF-8?q?=E5=B0=86ST=E8=A7=A6=E6=91=B8=E8=BD=AF=E4=BB=B6=E5=A4=8D?= =?UTF-8?q?=E4=BD=8D=E5=85=A8=E9=83=A8=E6=9B=B4=E6=94=B9=E4=B8=BA=E7=A1=AC?= =?UTF-8?q?=E4=BB=B6=E5=A4=8D=E4=BD=8D=EF=BC=9B=203=E3=80=81ST=20=E8=A7=A6?= =?UTF-8?q?=E6=91=B8=E6=8A=A5=E9=94=99F3=E5=90=8E=E5=90=AF=E5=8A=A8?= =?UTF-8?q?=E7=A1=AC=E4=BB=B6=E5=A4=8D=E4=BD=8D=EF=BC=8C=E6=97=A0=E9=9C=80?= =?UTF-8?q?=E5=88=A4=E6=96=AD=E6=98=AF=E5=90=A6=E6=98=AF=20F3=2002=2000?= =?UTF-8?q?=EF=BC=9B=204=E3=80=81=E4=BF=AE=E6=AD=A3=E6=8C=87=E7=BA=B9?= =?UTF-8?q?=E5=94=A4=E9=86=92=E5=BC=B9=E7=AA=97=E9=97=AE=E9=A2=98=EF=BC=9A?= =?UTF-8?q?=E5=B0=86app=5Ftp=5Fscreen=5Finit=E5=87=BD=E6=95=B0=E5=B1=8F?= =?UTF-8?q?=E8=94=BD=E3=80=82=205=E3=80=81=E5=A2=9E=E5=8A=A0=E7=89=88?= =?UTF-8?q?=E6=9C=AC=E5=8F=B7=E6=89=93=E5=8D=B0=E5=92=8CBIN=E6=96=87?= =?UTF-8?q?=E4=BB=B6=E7=89=88=E6=9C=AC?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- .gitignore | 85 + project/ISP_568/ISP_568.uvprojx | 481 ++ project/ISP_568/Listings/ISP_518.map | 5078 ++++++++++++ project/ISP_568/Listings/WL518_20P_HX667.map | 5078 ++++++++++++ project/ISP_568/Listings/WL568_20U_HX667.map | 5405 ++++++++++++ .../WL568_S20U_CSOT667_V100_20230713.map | 5401 ++++++++++++ ...L568_S20U_CSOT667_V100_20230713_NoBlue.map | 5386 ++++++++++++ project/ISP_568/Listings/ap_demo.txt | 7352 +++++++++++++++++ .../ISP_568/Listings/app_tp_for_custom_s8.txt | 4194 ++++++++++ project/ISP_568/Listings/app_tp_st_touch.txt | 1173 +++ project/ISP_568/Listings/app_tp_transfer.txt | 1188 +++ project/ISP_568/Listings/board.txt | 63 + project/ISP_568/Listings/main.txt | 55 + .../WL568_S20U_CSOT667_V100_20230713.bin | Bin 0 -> 62976 bytes ...L568_S20U_CSOT667_V100_20230713_NoBlue.bin | Bin 0 -> 62696 bytes project/ISP_568/RTE/_ISP_568/RTE_Components.h | 21 + src/app/demo/ap_demo.c | 3234 ++++++++ src/app/demo/ap_demo.h | 57 + src/app/demo/ap_demo_version.txt | 21 + src/app/demo/app_tp_for_custom_s8.h | 156 + src/app/demo/app_tp_phone_transfer_data_s8.h | 489 ++ src/app/demo/app_tp_st_touch.c | 572 ++ src/app/demo/app_tp_st_touch.h | 176 + src/app/demo/app_tp_transfer.c | 770 ++ src/app/demo/app_tp_transfer.h | 114 + src/app/demo/tp_EncryptCheck.lib | Bin 0 -> 65818 bytes src/app/main.c | 26 + src/app/test_cfg_global.h | 84 + src/board/board.c | 26 + src/board/board.h | 16 + src/board/startup/startup_ARMCM0.s | 226 + src/common/tau_common.h | 216 + src/common/tau_delay.h | 34 + src/common/tau_device_datatype.h | 167 + src/common/tau_dsi_datatype.h | 374 + src/common/tau_log.h | 108 + src/common/tau_operations.h | 229 + src/sdk/CVWL308/lib/CVWL308.lib | Bin 0 -> 657712 bytes src/sdk/CVWL368/lib/CVWL368.lib | Bin 0 -> 668752 bytes src/sdk/CVWL518/lib/CVWL518.lib | Bin 0 -> 657088 bytes src/sdk/CVWL518T/lib/CVWL518T.lib | Bin 0 -> 657160 bytes src/sdk/CVWL568/lib/CVWL568.lib | Bin 0 -> 669952 bytes src/sdk/CVWL568/lib/WL568_20U_HX667_TP.lib | Bin 0 -> 105128 bytes src/sdk/CVWL568T/lib/CVWL568T.lib | Bin 0 -> 670040 bytes src/sdk/include/M0/ArmCM0.h | 213 + src/sdk/include/hal_dsi_rx_ctrl.h | 568 ++ src/sdk/include/hal_dsi_tx_ctrl.h | 284 + src/sdk/include/hal_flash.h | 109 + src/sdk/include/hal_gpio.h | 537 ++ src/sdk/include/hal_i2c_master.h | 80 + src/sdk/include/hal_i2c_slave.h | 179 + src/sdk/include/hal_pwm.h | 219 + src/sdk/include/hal_spi_master.h | 89 + src/sdk/include/hal_spi_slave.h | 181 + src/sdk/include/hal_swire.h | 75 + src/sdk/include/hal_system.h | 219 + src/sdk/include/hal_timer.h | 92 + src/sdk/include/hal_uart.h | 131 + src/sdk/include/hal_wdg.h | 94 + src/sdk/sdk_version.h | 1 + 60 files changed, 51126 insertions(+) create mode 100644 .gitignore create mode 100644 project/ISP_568/ISP_568.uvprojx create mode 100644 project/ISP_568/Listings/ISP_518.map create mode 100644 project/ISP_568/Listings/WL518_20P_HX667.map create mode 100644 project/ISP_568/Listings/WL568_20U_HX667.map create mode 100644 project/ISP_568/Listings/WL568_S20U_CSOT667_V100_20230713.map create mode 100644 project/ISP_568/Listings/WL568_S20U_CSOT667_V100_20230713_NoBlue.map create mode 100644 project/ISP_568/Listings/ap_demo.txt create mode 100644 project/ISP_568/Listings/app_tp_for_custom_s8.txt create mode 100644 project/ISP_568/Listings/app_tp_st_touch.txt create mode 100644 project/ISP_568/Listings/app_tp_transfer.txt create mode 100644 project/ISP_568/Listings/board.txt create mode 100644 project/ISP_568/Listings/main.txt create mode 100644 project/ISP_568/Objects/WL568_S20U_CSOT667_V100_20230713.bin create mode 100644 project/ISP_568/Objects/WL568_S20U_CSOT667_V100_20230713_NoBlue.bin create mode 100644 project/ISP_568/RTE/_ISP_568/RTE_Components.h create mode 100644 src/app/demo/ap_demo.c create mode 100644 src/app/demo/ap_demo.h create mode 100644 src/app/demo/ap_demo_version.txt create mode 100644 src/app/demo/app_tp_for_custom_s8.h create mode 100644 src/app/demo/app_tp_phone_transfer_data_s8.h create mode 100644 src/app/demo/app_tp_st_touch.c create mode 100644 src/app/demo/app_tp_st_touch.h create mode 100644 src/app/demo/app_tp_transfer.c create mode 100644 src/app/demo/app_tp_transfer.h create mode 100644 src/app/demo/tp_EncryptCheck.lib create mode 100644 src/app/main.c create mode 100644 src/app/test_cfg_global.h create mode 100644 src/board/board.c create mode 100644 src/board/board.h create mode 100644 src/board/startup/startup_ARMCM0.s create mode 100644 src/common/tau_common.h create mode 100644 src/common/tau_delay.h create mode 100644 src/common/tau_device_datatype.h create mode 100644 src/common/tau_dsi_datatype.h create mode 100644 src/common/tau_log.h create mode 100644 src/common/tau_operations.h create mode 100644 src/sdk/CVWL308/lib/CVWL308.lib create mode 100644 src/sdk/CVWL368/lib/CVWL368.lib create mode 100644 src/sdk/CVWL518/lib/CVWL518.lib create mode 100644 src/sdk/CVWL518T/lib/CVWL518T.lib create mode 100644 src/sdk/CVWL568/lib/CVWL568.lib create mode 100644 src/sdk/CVWL568/lib/WL568_20U_HX667_TP.lib create mode 100644 src/sdk/CVWL568T/lib/CVWL568T.lib create mode 100644 src/sdk/include/M0/ArmCM0.h create mode 100644 src/sdk/include/hal_dsi_rx_ctrl.h create mode 100644 src/sdk/include/hal_dsi_tx_ctrl.h create mode 100644 src/sdk/include/hal_flash.h create mode 100644 src/sdk/include/hal_gpio.h create mode 100644 src/sdk/include/hal_i2c_master.h create mode 100644 src/sdk/include/hal_i2c_slave.h create mode 100644 src/sdk/include/hal_pwm.h create mode 100644 src/sdk/include/hal_spi_master.h create mode 100644 src/sdk/include/hal_spi_slave.h create mode 100644 src/sdk/include/hal_swire.h create mode 100644 src/sdk/include/hal_system.h create mode 100644 src/sdk/include/hal_timer.h create mode 100644 src/sdk/include/hal_uart.h create mode 100644 src/sdk/include/hal_wdg.h create mode 100644 src/sdk/sdk_version.h diff --git a/.gitignore b/.gitignore new file mode 100644 index 0000000..243d6b9 --- /dev/null +++ b/.gitignore @@ -0,0 +1,85 @@ +# A .gitignore for Keil projects. +# Taken mostly from http://www.keil.com/support/man/docs/uv4/uv4_b_filetypes.htm + +# User-specific uVision files +*.opt +*.uvopt +*.uvoptx +*.uvgui +*.uvgui.* +*.uvguix.* + +# Listing files +#*.cod +#*.map +#*.m51 +#*.m66 +*._ip +*.i +*.lst +*/Listings/*.txt + +# define exception below if needed +*.scr + +# Object and HEX files +*.axf +*.b[0-3][0-9] +*.hex +*.d +*.crf +*.elf +*.hex +*.h86 +*.obj +*.o +*.sbr +*.htm + +# Build files +# define exception below if needed +*.bat +*._ia +*.__i +*._ii + +# Generated output files +/Listings/* +/Objects/* + +# Debugger files +# define exception below if needed +*.ini + +# Other files +*.build_log.htm +*.cdb +*.dep +*.ic +*.lin +*.lnp +*.orc +# define exception below if needed +*.pack +# define exception below if needed +*.pdsc +*.plg +# define exception below if needed +*.sct +*.sfd +*.sfr + +# Miscellaneous +*.tra +*.fed +*.l1p +*.l2p +*.iex + + +/si/ +!*.bin +!*.map + +# To explicitly override the above, define any exceptions here; e.g.: +# !my_customized_scatter_file.sct diff --git a/project/ISP_568/ISP_568.uvprojx b/project/ISP_568/ISP_568.uvprojx new file mode 100644 index 0000000..ce21f25 --- /dev/null +++ b/project/ISP_568/ISP_568.uvprojx @@ -0,0 +1,481 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + ISP_568 + 0x4 + ARM-ADS + 5060750::V5.06 update 6 (build 750)::ARMCC + 5060750::V5.06 update 6 (build 750)::ARMCC + 0 + + + ARMCM0 + ARM + ARM.CMSIS.5.5.1 + http://www.keil.com/pack/ + IRAM(0x20000000,0x00020000) IROM(0x00000000,0x00040000) CPUTYPE("Cortex-M0") CLOCK(12000000) ESEL ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000) + 0 + $$Device:ARMCM0$Device\ARM\ARMCM0\Include\ARMCM0.h + + + + + + + + + + + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\Objects\ + WL568_S20U_CSOT667_V100_20230713 + 1 + 0 + 1 + 1 + 1 + .\Listings\ + 1 + 0 + 1 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 1 + 0 + fromelf --bin -o .\Objects\@L.bin .\Objects\@L.axf + + 0 + 0 + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + + DARMCM1.DLL + -pCM0 + SARMCM3.DLL + + TARMCM1.DLL + -pCM0 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + "Cortex-M0" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 16 + 1 + 1 + 0 + 0 + 4 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 1 + 0x0 + 0x40000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x2000 + + + 1 + 0x10000 + 0x10000 + + + 0 + 0x70000 + 0xf0 + + + 0 + 0x70100 + 0xd0 + + + 0 + 0x701d0 + 0x7e30 + + + 0 + 0x20000000 + 0x20000 + + + 0 + 0x0 + 0x0 + + + + + + 1 + 4 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + 0 + 1 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 0 + + + ISP_568 + + ..\..\src;..\..\src\board;..\..\src\common;..\..\src\sdk\include;..\..\src\app\demo;..\..\src\sdk\include\M0;..\..\src\app;..\..\src\app\module_demo;..\..\src\app\touch;..\..\src\app\S8;..\..\src\app\S9;..\CVWL568 + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 1 + 0 + 0 + 0 + 1 + 0 + 0x00000000 + 0x20000000 + + + + + + + + + + + + + app + + + main.c + 1 + ..\..\src\app\main.c + + + ap_demo.c + 1 + ..\..\src\app\demo\ap_demo.c + + + app_tp_transfer.c + 1 + ..\..\src\app\demo\app_tp_transfer.c + + + app_tp_st_touch.c + 1 + ..\..\src\app\demo\app_tp_st_touch.c + + + + + driver + + + CVWL568.lib + 4 + ..\..\src\sdk\CVWL568\lib\CVWL568.lib + + + tp_EncryptCheck.lib + 4 + ..\..\src\app\demo\tp_EncryptCheck.lib + + + WL568_20U_HX667_TP.lib + 4 + ..\..\src\sdk\CVWL568\lib\WL568_20U_HX667_TP.lib + + + + + board + + + board.c + 1 + ..\..\src\board\board.c + + + + + startup + + + startup_ARMCM0.s + 2 + ..\..\src\board\startup\startup_ARMCM0.s + + + + + ::CMSIS + + + + + + + + + + + + + + + + + + RTE\Device\ARMCM0\startup_ARMCM0.s + + + + + + RTE\Device\ARMCM0\system_ARMCM0.c + + + + + + + + diff --git a/project/ISP_568/Listings/ISP_518.map b/project/ISP_568/Listings/ISP_518.map new file mode 100644 index 0000000..c6aff9a --- /dev/null +++ b/project/ISP_568/Listings/ISP_518.map @@ -0,0 +1,5078 @@ +Component: ARM Compiler 5.06 update 6 (build 750) Tool: armlink [4d35ed] + +============================================================================== + +Section Cross References + + main.o(i.main) refers to board.o(i.board_Init) for board_Init + main.o(i.main) refers to ap_demo.o(i.ap_demo) for ap_demo + ap_demo.o(i.Gpio_swire_output) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + ap_demo.o(i.Gpio_swire_output) refers to tau_delay.o(i.delayUs) for delayUs + ap_demo.o(i.Gpio_swire_output) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + ap_demo.o(i.ap_dcs_read) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) for hal_dsi_rx_ctrl_get_max_ret_size + ap_demo.o(i.ap_dcs_read) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) for hal_dsi_rx_ctrl_send_ack_cmd + ap_demo.o(i.ap_dcs_read) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_dcs_read) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_demo) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + ap_demo.o(i.ap_demo) refers to app_tp_transfer.o(i.app_tp_I2C_init) for app_tp_I2C_init + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.open_mipi_rx) for open_mipi_rx + ap_demo.o(i.ap_demo) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.init_mipi_tx) for init_mipi_tx + ap_demo.o(i.ap_demo) refers to app_tp_transfer.o(i.app_tp_init) for app_tp_init + ap_demo.o(i.ap_demo) refers to hal_timer.o(i.hal_timer_init) for hal_timer_init + ap_demo.o(i.ap_demo) refers to hal_timer.o(i.hal_timer_start) for hal_timer_start + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.tx_display_on) for tx_display_on + ap_demo.o(i.ap_demo) refers to hal_gpio.o(i.hal_gpio_set_ap_reset_int) for hal_gpio_set_ap_reset_int + ap_demo.o(i.ap_demo) refers to app_tp_transfer.o(i.app_tp_phone_clear_reset_on) for app_tp_phone_clear_reset_on + ap_demo.o(i.ap_demo) refers to tau_delay.o(i.delayMs) for delayMs + ap_demo.o(i.ap_demo) refers to app_tp_transfer.o(i.app_tp_transfer_screen_start) for app_tp_transfer_screen_start + ap_demo.o(i.ap_demo) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) for hal_dsi_rx_ctrl_dsc_async_handler + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.app_tp_calibration_exec) for app_tp_calibration_exec + ap_demo.o(i.ap_demo) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.ap_demo) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + ap_demo.o(i.ap_demo) refers to app_tp_transfer.o(i.app_tp_transfer_screen_int) for app_tp_transfer_screen_int + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.tp_heartbeat_exec) for tp_heartbeat_exec + ap_demo.o(i.ap_demo) refers to app_tp_transfer.o(i.ap_tp_scan_point_record_event_exec) for ap_tp_scan_point_record_event_exec + ap_demo.o(i.ap_demo) refers to app_tp_transfer.o(i.S20_Start_init) for S20_Start_init + ap_demo.o(i.ap_demo) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_demo) refers to app_tp_for_custom_s8.o(.data) for tp_sleep_count + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.soft_timer3_cb) for soft_timer3_cb + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.ap_reset_cb) for ap_reset_cb + ap_demo.o(i.ap_get_reg_ca) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_get_reg_df) refers to ap_demo.o(i.blue_change_ccm) for blue_change_ccm + ap_demo.o(i.ap_get_reg_df) refers to memcpya.o(.text) for __aeabi_memcpy4 + ap_demo.o(i.ap_get_reg_df) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) for hal_dsi_tx_ctrl_set_ccm + ap_demo.o(i.ap_get_reg_df) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_reset_cb) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_reset_cb) refers to hal_system.o(i.hal_system_set_pvd) for hal_system_set_pvd + ap_demo.o(i.ap_reset_cb) refers to hal_system.o(i.hal_system_set_vcc) for hal_system_set_vcc + ap_demo.o(i.ap_set_backlight) refers to ap_demo.o(i.__ARM_common_switch8) for __ARM_common_switch8 + ap_demo.o(i.ap_set_backlight) refers to idiv.o(.text) for __aeabi_idivmod + ap_demo.o(i.ap_set_backlight) refers to uidiv.o(.text) for __aeabi_uidivmod + ap_demo.o(i.ap_set_backlight) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.ap_set_backlight) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_set_display_off) refers to ap_demo.o(i.Gpio_swire_output) for Gpio_swire_output + ap_demo.o(i.ap_set_display_off) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_set_display_off) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.ap_set_display_off) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_set_display_on) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_set_display_on) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_set_enter_sleep_mode) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.ap_set_enter_sleep_mode) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_set_enter_sleep_mode) refers to ap_demo.o(i.soft_disable_mipi_timer_init) for soft_disable_mipi_timer_init + ap_demo.o(i.ap_set_enter_sleep_mode) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_set_exit_sleep_mode) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_set_exit_sleep_mode) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_set_tp_calibration_04) refers to ap_demo.o(.data) for .data + ap_demo.o(i.app_tp_calibration_exec) refers to app_tp_transfer.o(i.ap_tp_calibration) for ap_tp_calibration + ap_demo.o(i.app_tp_calibration_exec) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.app_tp_calibration_exec) refers to ap_demo.o(.data) for .data + ap_demo.o(i.blue_change_ccm) refers to memcpya.o(.text) for __aeabi_memcpy4 + ap_demo.o(i.blue_change_ccm) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) for hal_dsi_tx_ctrl_set_ccm + ap_demo.o(i.disable_mipi_timer_cb) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + ap_demo.o(i.disable_mipi_timer_cb) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) for hal_dsi_tx_ctrl_stop + ap_demo.o(i.disable_mipi_timer_cb) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) for hal_dsi_tx_ctrl_deinit + ap_demo.o(i.disable_mipi_timer_cb) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) for hal_dsi_rx_ctrl_stop + ap_demo.o(i.disable_mipi_timer_cb) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) for hal_dsi_rx_ctrl_deinit + ap_demo.o(i.disable_mipi_timer_cb) refers to hal_swire.o(i.hal_swire_open) for hal_swire_open + ap_demo.o(i.disable_mipi_timer_cb) refers to hal_timer.o(i.hal_timer_stop) for hal_timer_stop + ap_demo.o(i.disable_mipi_timer_cb) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + ap_demo.o(i.disable_mipi_timer_cb) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_panel_reset_pin) for hal_dsi_tx_ctrl_panel_reset_pin + ap_demo.o(i.disable_mipi_timer_cb) refers to hal_system.o(i.hal_system_set_vcc) for hal_system_set_vcc + ap_demo.o(i.disable_mipi_timer_cb) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.disable_mipi_timer_cb) refers to ap_demo.o(.data) for .data + ap_demo.o(i.disable_mipi_timer_cb) refers to app_tp_for_custom_s8.o(.data) for tp_sleep_in + ap_demo.o(i.init_mipi_tx) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) for hal_dsi_tx_ctrl_create_handle + ap_demo.o(i.init_mipi_tx) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) for hal_dsi_tx_ctrl_init + ap_demo.o(i.init_mipi_tx) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) for hal_dsi_tx_ctrl_set_overwrite_rgb + ap_demo.o(i.init_mipi_tx) refers to ap_demo.o(.data) for .data + ap_demo.o(i.init_panel) refers to ap_demo.o(i.tx_panel_reset) for tx_panel_reset + ap_demo.o(i.init_panel) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) for hal_dsi_tx_ctrl_enter_init_panel_mode + ap_demo.o(i.init_panel) refers to ap_demo.o(i.send_panel_init_code) for send_panel_init_code + ap_demo.o(i.init_panel) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.init_panel) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.init_panel) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode) for hal_dsi_rx_ctrl_set_hw_tear_mode + ap_demo.o(i.init_panel) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + ap_demo.o(i.init_panel) refers to tau_delay.o(i.delayMs) for delayMs + ap_demo.o(i.init_panel) refers to ap_demo.o(i.Gpio_swire_output) for Gpio_swire_output + ap_demo.o(i.init_panel) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) for hal_dsi_tx_ctrl_exit_init_panel_mode + ap_demo.o(i.init_panel) refers to ap_demo.o(.data) for .data + ap_demo.o(i.open_mipi_rx) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) for hal_dsi_rx_ctrl_create_handle + ap_demo.o(i.open_mipi_rx) refers to memcpya.o(.text) for __aeabi_memcpy4 + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_pre_init_pps) for hal_dsi_rx_ctrl_pre_init_pps + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) for hal_dsi_rx_ctrl_init + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) for hal_dsi_rx_ctrl_set_cus_sync_line + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) for hal_dsi_rx_ctrl_start + ap_demo.o(i.open_mipi_rx) refers to ap_demo.o(.data) for .data + ap_demo.o(i.open_mipi_rx) refers to ap_demo.o(.constdata) for .constdata + ap_demo.o(i.open_mipi_rx) refers to ap_demo.o(i.ap_dcs_read) for ap_dcs_read + ap_demo.o(i.open_mipi_rx) refers to ap_demo.o(i.pps_update_handle) for pps_update_handle + ap_demo.o(i.pps_update_handle) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) for hal_dsi_rx_ctrl_set_sw_tear_mode + ap_demo.o(i.pps_update_handle) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) for hal_dsi_rx_ctrl_toggle_resolution + ap_demo.o(i.pps_update_handle) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode) for hal_dsi_rx_ctrl_set_hw_tear_mode + ap_demo.o(i.pps_update_handle) refers to ap_demo.o(.data) for .data + ap_demo.o(i.send_panel_init_code) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) for hal_dsi_tx_ctrl_write_array_cmd + ap_demo.o(i.send_panel_init_code) refers to tau_delay.o(i.delayUs) for delayUs + ap_demo.o(i.soft_disable_mipi_timer_init) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.soft_disable_mipi_timer_init) refers to hal_timer.o(i.hal_timer_init) for hal_timer_init + ap_demo.o(i.soft_disable_mipi_timer_init) refers to hal_timer.o(i.hal_timer_start) for hal_timer_start + ap_demo.o(i.soft_disable_mipi_timer_init) refers to ap_demo.o(i.disable_mipi_timer_cb) for disable_mipi_timer_cb + ap_demo.o(i.soft_timer3_cb) refers to hal_timer.o(i.hal_timer_start) for hal_timer_start + ap_demo.o(i.soft_timer3_cb) refers to app_tp_for_custom_s8.o(.data) for tp_sleep_count + ap_demo.o(i.soft_timer3_cb) refers to ap_demo.o(.data) for .data + ap_demo.o(i.tp_heartbeat_exec) refers to hal_gpio.o(i.hal_gpio_get_input_data) for hal_gpio_get_input_data + ap_demo.o(i.tp_heartbeat_exec) refers to printfa.o(i.__0printf) for __2printf + ap_demo.o(i.tp_heartbeat_exec) refers to app_tp_transfer.o(i.ap_tp_system_softReset) for ap_tp_system_softReset + ap_demo.o(i.tp_heartbeat_exec) refers to app_tp_transfer.o(.data) for s_screen_init_complate + ap_demo.o(i.tp_heartbeat_exec) refers to ap_demo.o(.data) for .data + ap_demo.o(i.tx_display_on) refers to ap_demo.o(i.init_panel) for init_panel + ap_demo.o(i.tx_display_on) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) for hal_dsi_tx_ctrl_start + ap_demo.o(i.tx_display_on) refers to ap_demo.o(.data) for .data + ap_demo.o(i.tx_panel_reset) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_panel_reset_pin) for hal_dsi_tx_ctrl_panel_reset_pin + ap_demo.o(i.tx_panel_reset) refers to tau_delay.o(i.delayMs) for delayMs + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_display_on) for ap_set_display_on + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_display_off) for ap_set_display_off + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_get_reg_df) for ap_get_reg_df + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_get_reg_ca) for ap_get_reg_ca + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_backlight) for ap_set_backlight + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_enter_sleep_mode) for ap_set_enter_sleep_mode + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_exit_sleep_mode) for ap_set_exit_sleep_mode + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_tp_calibration_04) for ap_set_tp_calibration_04 + app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) refers to app_tp_for_custom_s8.o(.data) for .data + app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) refers to app_tp_for_custom_s8.o(.constdata) for .constdata + app_tp_for_custom_s8.o(i.app_tp_screen_analysis_const) refers to app_tp_transfer.o(i.app_tp_screen_init) for app_tp_screen_init + app_tp_for_custom_s8.o(i.app_tp_screen_analysis_const) refers to app_tp_for_custom_s8.o(.data) for .data + app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) refers to uidiv.o(.text) for __aeabi_uidivmod + app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) refers to app_tp_for_custom_s8.o(.data) for .data + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_1 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_2 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_3 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_4 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_5 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_6 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_7 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for phone_reg_point_data + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for phone_reg_point_back + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for phone_reg_coord_data + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for phone_reg_coord_back + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_transfer.o(i.app_tp_m_read) for app_tp_m_read + app_tp_transfer.o(i.S20_Start_init) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_transfer.o(i.S20_Start_init) refers to tau_delay.o(i.delayMs) for delayMs + app_tp_transfer.o(i.S20_Start_init) refers to hal_gpio.o(i.hal_gpio_get_input_data) for hal_gpio_get_input_data + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_transfer.o(i.app_tp_m_write) for app_tp_m_write + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_transfer.o(i.app_tp_screen_int_init) for app_tp_screen_int_init + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_for_custom_s8.o(.data) for screen_reg_int_data + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_transfer.o(.bss) for .bss + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_for_custom_s8.o(.data) for g_screen_input_int_pad + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.S20_Start_init) refers to ap_demo.o(.data) for phone_start_flag + app_tp_transfer.o(i.ap_tp_calibration) refers to app_tp_transfer.o(i.app_tp_m_write) for app_tp_m_write + app_tp_transfer.o(i.ap_tp_calibration) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_transfer.o(i.ap_tp_calibration) refers to tau_delay.o(i.delayMs) for delayMs + app_tp_transfer.o(i.ap_tp_calibration) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.ap_tp_scan_point_init) refers to app_tp_transfer.o(.bss) for .bss + app_tp_transfer.o(i.ap_tp_scan_point_record_event) refers to app_tp_transfer.o(.bss) for .bss + app_tp_transfer.o(i.ap_tp_scan_point_record_event_exec) refers to printfa.o(i.__0printf) for __2printf + app_tp_transfer.o(i.ap_tp_scan_point_record_event_exec) refers to app_tp_transfer.o(i.ap_tp_simulate_finger_release_event) for ap_tp_simulate_finger_release_event + app_tp_transfer.o(i.ap_tp_scan_point_record_event_exec) refers to app_tp_transfer.o(i.ap_tp_scan_point_init) for ap_tp_scan_point_init + app_tp_transfer.o(i.ap_tp_scan_point_record_event_exec) refers to app_tp_transfer.o(.bss) for .bss + app_tp_transfer.o(i.ap_tp_simulate_finger_release_event) refers to app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) for app_tp_screen_analysis_int + app_tp_transfer.o(i.ap_tp_simulate_finger_release_event) refers to tau_delay.o(i.delayMs) for delayMs + app_tp_transfer.o(i.ap_tp_system_softReset) refers to app_tp_transfer.o(i.ap_tp_simulate_finger_release_event) for ap_tp_simulate_finger_release_event + app_tp_transfer.o(i.ap_tp_system_softReset) refers to app_tp_transfer.o(i.ap_tp_scan_point_init) for ap_tp_scan_point_init + app_tp_transfer.o(i.ap_tp_system_softReset) refers to app_tp_transfer.o(i.app_tp_m_write) for app_tp_m_write + app_tp_transfer.o(i.ap_tp_system_softReset) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_transfer.o(i.ap_tp_system_softReset) refers to tau_delay.o(i.delayMs) for delayMs + app_tp_transfer.o(i.ap_tp_system_softReset) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.app_tp_I2C_init) refers to hal_i2c_slave.o(i.hal_i2c_s_init) for hal_i2c_s_init + app_tp_transfer.o(i.app_tp_I2C_init) refers to hal_i2c_slave.o(i.hal_i2c_s_set_transfer) for hal_i2c_s_set_transfer + app_tp_transfer.o(i.app_tp_I2C_init) refers to hal_i2c_slave.o(i.hal_i2c_s_nonblocking_read) for hal_i2c_s_nonblocking_read + app_tp_transfer.o(i.app_tp_I2C_init) refers to app_tp_transfer.o(i.app_tp_i2cs_callback) for app_tp_i2cs_callback + app_tp_transfer.o(i.app_tp_I2C_init) refers to app_tp_transfer.o(.bss) for .bss + app_tp_transfer.o(i.app_tp_i2cs_callback) refers to app_tp_transfer.o(i.app_tp_transfer_phone) for app_tp_transfer_phone + app_tp_transfer.o(i.app_tp_init) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + app_tp_transfer.o(i.app_tp_init) refers to app_tp_transfer.o(i.app_tp_screen_init) for app_tp_screen_init + app_tp_transfer.o(i.app_tp_init) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + app_tp_transfer.o(i.app_tp_init) refers to hal_gpio.o(i.hal_gpio_init_input) for hal_gpio_init_input + app_tp_transfer.o(i.app_tp_init) refers to hal_i2c_master.o(i.hal_i2c_m_dma_init) for hal_i2c_m_dma_init + app_tp_transfer.o(i.app_tp_init) refers to app_tp_transfer.o(i.ap_tp_scan_point_init) for ap_tp_scan_point_init + app_tp_transfer.o(i.app_tp_init) refers to app_tp_for_custom_s8.o(.data) for g_phone_output_int_pad + app_tp_transfer.o(i.app_tp_init) refers to app_tp_for_custom_s8.o(.data) for g_screen_input_int_pad + app_tp_transfer.o(i.app_tp_m_read) refers to hal_i2c_master.o(i.hal_i2c_m_dma_read) for hal_i2c_m_dma_read + app_tp_transfer.o(i.app_tp_m_transfer_complate) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_transfer.o(i.app_tp_m_write) refers to hal_i2c_master.o(i.hal_i2c_m_dma_write) for hal_i2c_m_dma_write + app_tp_transfer.o(i.app_tp_phone_clear_reset_on) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.app_tp_phone_reset_on) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.app_tp_s_read) refers to hal_i2c_slave.o(i.hal_i2c_s_nonblocking_read) for hal_i2c_s_nonblocking_read + app_tp_transfer.o(i.app_tp_s_transfer_complate) refers to hal_i2c_slave.o(i.hal_i2c_s_write_complate) for hal_i2c_s_write_complate + app_tp_transfer.o(i.app_tp_s_transfer_complate) refers to hal_i2c_slave.o(i.hal_i2c_s_read_complate) for hal_i2c_s_read_complate + app_tp_transfer.o(i.app_tp_s_write) refers to hal_i2c_slave.o(i.hal_i2c_s_dma_write) for hal_i2c_s_dma_write + app_tp_transfer.o(i.app_tp_screen_init) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + app_tp_transfer.o(i.app_tp_screen_init) refers to tau_delay.o(i.delayUs) for delayUs + app_tp_transfer.o(i.app_tp_screen_init) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + app_tp_transfer.o(i.app_tp_screen_init) refers to app_tp_for_custom_s8.o(.data) for g_screen_input_rst_pad + app_tp_transfer.o(i.app_tp_screen_int_callback) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.app_tp_screen_int_init) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + app_tp_transfer.o(i.app_tp_screen_int_init) refers to hal_gpio.o(i.hal_gpio_ctrl_eint) for hal_gpio_ctrl_eint + app_tp_transfer.o(i.app_tp_screen_int_init) refers to hal_gpio.o(i.hal_gpio_init_eint) for hal_gpio_init_eint + app_tp_transfer.o(i.app_tp_screen_int_init) refers to hal_gpio.o(i.hal_gpio_reg_eint_cb) for hal_gpio_reg_eint_cb + app_tp_transfer.o(i.app_tp_screen_int_init) refers to app_tp_for_custom_s8.o(.data) for g_screen_input_int_pad + app_tp_transfer.o(i.app_tp_screen_int_init) refers to app_tp_transfer.o(i.app_tp_screen_int_callback) for app_tp_screen_int_callback + app_tp_transfer.o(i.app_tp_transfer_phone) refers to app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) for app_tp_phone_analysis_data + app_tp_transfer.o(i.app_tp_transfer_phone) refers to app_tp_transfer.o(i.app_tp_s_read) for app_tp_s_read + app_tp_transfer.o(i.app_tp_transfer_phone) refers to app_tp_transfer.o(i.app_tp_s_write) for app_tp_s_write + app_tp_transfer.o(i.app_tp_transfer_phone) refers to app_tp_transfer.o(.bss) for .bss + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to app_tp_transfer.o(i.app_tp_m_transfer_complate) for app_tp_m_transfer_complate + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to hal_spi_master.o(i.hal_spi_m_clear_rxfifo) for hal_spi_m_clear_rxfifo + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to app_tp_transfer.o(i.S20_Start_init) for S20_Start_init + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to app_tp_for_custom_s8.o(.constdata) for screen_reg_start_data_size + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to ap_demo.o(.data) for phone_start_flag + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_transfer.o(i.app_tp_transfer_screen_const) for app_tp_transfer_screen_const + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_transfer.o(i.app_tp_screen_int_lvl_low) for app_tp_screen_int_lvl_low + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_transfer.o(i.app_tp_m_transfer_complate) for app_tp_m_transfer_complate + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to hal_spi_master.o(i.hal_spi_m_clear_rxfifo) for hal_spi_m_clear_rxfifo + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_transfer.o(i.app_tp_m_read) for app_tp_m_read + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to tau_delay.o(i.delayUs) for delayUs + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_transfer.o(i.ap_tp_system_softReset) for ap_tp_system_softReset + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to tau_log.o(i.LOG_printf) for LOG_printf + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to tau_delay.o(i.delayMs) for delayMs + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to hal_gpio.o(i.hal_gpio_get_input_data) for hal_gpio_get_input_data + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_transfer.o(i.ap_tp_scan_point_record_event) for ap_tp_scan_point_record_event + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) for app_tp_screen_analysis_int + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_for_custom_s8.o(.data) for screen_reg_int_data + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_transfer.o(.bss) for .bss + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_for_custom_s8.o(.data) for g_screen_input_int_pad + app_tp_transfer.o(i.app_tp_transfer_screen_start) refers to app_tp_transfer.o(i.app_tp_transfer_screen_const) for app_tp_transfer_screen_const + app_tp_transfer.o(i.app_tp_transfer_screen_start) refers to app_tp_transfer.o(.data) for .data + board.o(i.board_Init) refers to hal_system.o(i.hal_system_init) for hal_system_init + board.o(i.board_Init) refers to hal_system.o(i.hal_system_enable_systick) for hal_system_enable_systick + board.o(i.board_Init) refers to hal_system.o(i.hal_system_init_console) for hal_system_init_console + startup_armcm0.o(RESET) refers to startup_armcm0.o(STACK) for __initial_sp + startup_armcm0.o(RESET) refers to startup_armcm0.o(.text) for Reset_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.HardFault_Handler) for HardFault_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.SysTick_Handler) for SysTick_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.VIDC_IRQn_Handler) for VIDC_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.LCDC_IRQn_Handler) for LCDC_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.MIPI_RX_IRQn_Handler) for MIPI_RX_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.MIPI_TX_IRQn_Handler) for MIPI_TX_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.MEMC_IRQn_Handler) for MEMC_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.VPRE_IRQn_Handler) for VPRE_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.FLSCTRL_IRQn_Handler) for FLSCTRL_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.DMA_IRQn_Handler) for DMA_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.TIMER0_IRQn_Handler) for TIMER0_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.TIMER1_IRQn_Handler) for TIMER1_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.TIMER2_IRQn_Handler) for TIMER2_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.TIMER3_IRQn_Handler) for TIMER3_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.WDG_IRQn_Handler) for WDG_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.UART_IRQn_Handler) for UART_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.I2C0_IRQn_Handler) for I2C0_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.I2C1_IRQn_Handler) for I2C1_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.SPIS_IRQn_Handler) for SPIS_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.SPIM_IRQn_Handler) for SPIM_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.ADC_IRQn_Handler) for ADC_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.PWMDET_IRQn_Handler) for PWMDET_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.SWIRE_IRQn_Handler) for SWIRE_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.AP_NRESET_IRQn_Handler) for AP_NRESET_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT0_IRQn_Handler) for EXTI_INT0_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT1_IRQn_Handler) for EXTI_INT1_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT2_IRQn_Handler) for EXTI_INT2_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT3_IRQn_Handler) for EXTI_INT3_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT4_IRQn_Handler) for EXTI_INT4_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT5_IRQn_Handler) for EXTI_INT5_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT6_IRQn_Handler) for EXTI_INT6_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT7_IRQn_Handler) for EXTI_INT7_IRQn_Handler + startup_armcm0.o(.text) refers to entry.o(.ARM.Collect$$$$00000000) for __main + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) for hal_internal_vsync_get_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_dsc_dec.o(i.drv_dsc_dec_disable) for drv_dsc_dec_disable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) for drv_dsi_rx_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_rxbr.o(i.drv_rxbr_enable_irq) for drv_rxbr_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_vidc.o(i.drv_vidc_enable_irq) for drv_vidc_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_memc.o(i.drv_memc_enable_irq) for drv_memc_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) for hal_internal_vsync_get_tx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_config_reset_modules) for drv_crgu_config_reset_modules + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) for hal_internal_vsync_set_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) refers to dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) for dcs_packet_get_fifo_header + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) refers to dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) for dcs_packet_free_fifo_header + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) refers to hal_dsi_rx_ctrl.o(i.drv_rxbr_get_status) for drv_rxbr_get_status + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_pg_cfg) for drv_dsi_rx_set_ddi_pg_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_crgu.o(i.drv_crgu_set_rxbr_src) for drv_crgu_set_rxbr_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_crgu.o(i.drv_crgu_set_rxbr_div) for drv_crgu_set_rxbr_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_pg_cfg) for drv_dsi_rx_set_ipi_pg_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) refers to drv_memc.o(i.drv_memc_gen_a_tear_signal) for drv_memc_gen_a_tear_signal + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_compressen_en) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) for drv_dsi_rx_get_compression_en + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_max_ret_size) for drv_dsi_rx_get_max_ret_size + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) refers to drv_crgu.o(i.drv_crgu_set_rxbr_src) for drv_crgu_set_rxbr_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) refers to drv_crgu.o(i.drv_crgu_set_rxbr_div) for drv_crgu_set_rxbr_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) for drv_dsi_rx_set_ddi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) for hal_dsi_rx_ctrl_set_ipi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) refers to drv_crgu.o(i.drv_crgu_set_dsco_src) for drv_crgu_set_dsco_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) refers to drv_crgu.o(i.drv_crgu_set_dsco_src_div) for drv_crgu_set_dsco_src_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) refers to drv_crgu.o(i.drv_crgu_set_dsc_core_div) for drv_crgu_set_dsc_core_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) refers to drv_crgu.o(i.drv_crgu_set_vidc_src) for drv_crgu_set_vidc_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) refers to drv_crgu.o(i.drv_crgu_set_fb_src) for drv_crgu_set_fb_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) refers to drv_crgu.o(i.drv_crgu_set_fb_div) for drv_crgu_set_fb_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) for hal_dsi_rx_ctrl_init_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_vsync_init_rx) for hal_internal_vsync_init_rx + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) for hal_dsi_rx_ctrl_init_dsi_rx + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) for hal_dsi_rx_ctrl_init_rxbr + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsc_dec) for hal_dsi_rx_ctrl_init_dsc_dec + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to drv_dsc_dec.o(i.drv_dsc_dec_disable) for drv_dsc_dec_disable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) for hal_dsi_rx_ctrl_init_vidc + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) for hal_dsi_rx_ctrl_init_memc + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) for hal_internal_vsync_set_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to drv_chip_info.o(i.drv_chip_rx_init_done) for drv_chip_rx_init_done + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_vidc_src) for drv_crgu_set_vidc_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_fb_src) for drv_crgu_set_fb_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_fb_div) for drv_crgu_set_fb_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) for hal_dsi_rx_ctrl_set_rxbr_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsc_dec) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsc_dec) refers to drv_dsc_dec.o(i.drv_dsc_dec_enable) for drv_dsc_dec_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsc_dec) refers to drv_dsc_dec.o(i.drv_dsc_dec_set_u8_pps) for drv_dsc_dec_set_u8_pps + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ctrl_cfg) for drv_dsi_rx_set_ctrl_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) for drv_dsi_rx_set_ddi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) for hal_dsi_rx_ctrl_set_ipi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) for drv_dsi_rx_set_up_phy + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_inten) for drv_dsi_rx_set_inten + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_resp_cnt) for drv_dsi_rx_set_resp_cnt + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) for drv_dsi_rx_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_data_mode) for drv_memc_set_data_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to ap_demo.o(i.__ARM_common_switch8) for __ARM_common_switch8 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_rate_transfer_sel) for drv_memc_rate_transfer_sel + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_tear_waveform) for drv_memc_set_tear_waveform + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_tear_hwclr) for drv_memc_set_tear_hwclr + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_sel_vsync) for drv_memc_sel_vsync + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_yuv420_cfg) for drv_memc_set_yuv420_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_bypass_fifo_empty) for drv_memc_bypass_fifo_empty + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_color_format) for drv_rxbr_set_color_format + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) for drv_rxbr_frame_drop_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_usr_cfg) for drv_rxbr_set_usr_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_usr_col) for drv_rxbr_set_usr_col + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_usr_row) for drv_rxbr_set_usr_row + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_hline_rcv_cfg) for drv_rxbr_hline_rcv_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_enable_irq) for drv_rxbr_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) for hal_internal_vsync_set_auto_hw_filter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_src_parameter) for drv_vidc_set_src_parameter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_dst_parameter) for drv_vidc_set_dst_parameter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_module_enable) for drv_vidc_module_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to dadd.o(.text) for __aeabi_dadd + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_step) for drv_vidc_set_scld_step + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_param_init.o(i.drv_param_init_get_scld_filter_h) for drv_param_init_get_scld_filter_h + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_param_init.o(i.drv_param_init_get_scld_filter_v) for drv_param_init_get_scld_filter_v + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_hcoef0) for drv_vidc_set_scld_hcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_hcoef1) for drv_vidc_set_scld_hcoef1 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_vcoef0) for drv_vidc_set_scld_vcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_vcoef1) for drv_vidc_set_scld_vcoef1 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_param_init.o(i.drv_param_yuv420_filter_init) for drv_param_yuv420_filter_init + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_y4t2_hcoef0) for drv_vidc_set_y4t2_hcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_y4t2_hcoef1) for drv_vidc_set_y4t2_hcoef1 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_y4t2_vcoef0) for drv_vidc_set_y4t2_vcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_y4t2_vcoef1) for drv_vidc_set_y4t2_vcoef1 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_param_init.o(i.drv_param_p2r_filter_init) for drv_param_p2r_filter_init + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_p2r_step) for drv_vidc_set_p2r_step + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_p2r_hinitr) for drv_vidc_set_p2r_hinitr + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_p2r_hinitb) for drv_vidc_set_p2r_hinitb + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_p2r_hcoef0) for drv_vidc_set_p2r_hcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_p2r_hcoef1) for drv_vidc_set_p2r_hcoef1 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_pu_scld) for drv_vidc_set_pu_scld + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_param_init.o(i.drv_param_init_get_sclu_filter_h) for drv_param_init_get_sclu_filter_h + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_param_init.o(i.drv_param_init_get_sclu_filter_v) for drv_param_init_get_sclu_filter_v + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_sclu_hcoef0y) for drv_vidc_set_sclu_hcoef0y + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_sclu_hcoef1y) for drv_vidc_set_sclu_hcoef1y + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_sclu_vcoef0y) for drv_vidc_set_sclu_vcoef0y + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_sclu_vcoef1y) for drv_vidc_set_sclu_vcoef1y + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_sclu_hcoef0c) for drv_vidc_set_sclu_hcoef0c + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_sclu_hcoef1c) for drv_vidc_set_sclu_hcoef1c + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_sclu_vcoef0c) for drv_vidc_set_sclu_vcoef0c + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_sclu_vcoef1c) for drv_vidc_set_sclu_vcoef1c + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_pu_ctrl) for drv_vidc_set_pu_ctrl + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_param_init.o(i.drv_param_get_picture_quality_setting) for drv_param_get_picture_quality_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_gain) for drv_vidc_set_gain + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_enh_lum) for drv_vidc_set_enh_lum + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_enh_chr) for drv_vidc_set_enh_chr + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_enh_chr2) for drv_vidc_set_enh_chr2 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_irqen) for drv_vidc_set_irqen + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_enable_irq) for drv_vidc_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_pre_init_pps) refers to drv_dsc_dec.o(i.drv_dsc_dec_convert_pps_rc_parameter) for drv_dsc_dec_convert_pps_rc_parameter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_pre_init_pps) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_release_handle) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) for hal_dsi_rx_ctrl_init + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) for hal_internal_vsync_get_tx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) for hal_dsi_rx_ctrl_start + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) refers to drv_rxbr.o(i.drv_rxbr_set_ack_pkt_header) for drv_rxbr_set_ack_pkt_header + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) refers to hal_dsi_rx_ctrl.o(.conststring) for .conststring + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_auto_hw_filter) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) for hal_internal_vsync_set_auto_hw_filter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_auto_hw_filter) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) for drv_dsi_rx_set_ddi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_pq_enh_chr) refers to drv_vidc.o(i.drv_vidc_set_enh_chr) for drv_vidc_set_enh_chr + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_pq_enh_chr) refers to drv_param_init.o(i.drv_param_set_enh_chr) for drv_param_set_enh_chr + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_pq_enh_chr) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_pq_enh_chr2) refers to drv_vidc.o(i.drv_vidc_set_enh_chr2) for drv_vidc_set_enh_chr2 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_pq_enh_chr2) refers to drv_param_init.o(i.drv_param_set_enh_chr2) for drv_param_set_enh_chr2 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_pq_enh_chr2) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_pq_enh_lum) refers to drv_vidc.o(i.drv_vidc_set_enh_lum) for drv_vidc_set_enh_lum + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_pq_enh_lum) refers to drv_param_init.o(i.drv_param_set_enh_lum) for drv_param_set_enh_lum + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_pq_enh_lum) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_pq_gain) refers to drv_vidc.o(i.drv_vidc_set_gain) for drv_vidc_set_gain + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_pq_gain) refers to drv_param_init.o(i.drv_param_set_gain) for drv_param_set_gain + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_pq_gain) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to drv_vidc.o(i.drv_vidc_set_scld_hcoef0) for drv_vidc_set_scld_hcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to drv_vidc.o(i.drv_vidc_set_scld_hcoef1) for drv_vidc_set_scld_hcoef1 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to drv_vidc.o(i.drv_vidc_set_scld_vcoef0) for drv_vidc_set_scld_vcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to drv_vidc.o(i.drv_vidc_set_scld_vcoef1) for drv_vidc_set_scld_vcoef1 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to drv_param_init.o(i.drv_param_init_set_scld_filter) for drv_param_init_set_scld_filter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) for hal_internal_vsync_set_sync_line + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) refers to drv_rxbr.o(i.drv_rxbr_hline_rcv0_cfg) for drv_rxbr_hline_rcv0_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_dcs_direct_mode) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_dcs_direct_mode) for hal_internal_vsync_set_dcs_direct_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_cmd_filter) refers to drv_rxbr.o(i.drv_rxbr_set_cmd_filter) for drv_rxbr_set_cmd_filter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_cmd_filter) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) for hal_internal_vsync_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) refers to drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) for drv_dsi_rx_calc_ipi_tx_delay + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_cfg) for drv_dsi_rx_set_ipi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pentile_format) refers to drv_vidc.o(i.drv_vidc_update_src_format) for drv_vidc_update_src_format + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pentile_format) refers to drv_vidc.o(i.drv_vidc_set_pentile_swap) for drv_vidc_set_pentile_swap + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pentile_format) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) for hal_dsi_rx_ctrl_set_rxbr_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) for drv_dsi_rx_set_ddi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) for hal_dsi_rx_ctrl_set_ipi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_rxbr_src) for drv_crgu_set_rxbr_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_rxbr_div) for drv_crgu_set_rxbr_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_dsco_src) for drv_crgu_set_dsco_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_dsco_src_div) for drv_crgu_set_dsco_src_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_dsc_core_div) for drv_crgu_set_dsc_core_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) for hal_internal_vsync_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_te_waveform) refers to drv_memc.o(i.drv_memc_set_tear_waveform) for drv_memc_set_tear_waveform + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_te_waveform) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_tear_mode_ex) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) for hal_internal_vsync_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) refers to drv_dsi_rx.o(i.drv_dsi_rx_power_up) for drv_dsi_rx_power_up + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) for hal_internal_vsync_set_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) for hal_internal_vsync_get_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) refers to drv_dsi_rx.o(i.drv_dsi_rx_shut_down) for drv_dsi_rx_shut_down + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) for hal_internal_vsync_set_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate) refers to ap_demo.o(i.__ARM_common_switch8) for __ARM_common_switch8 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate) refers to drv_memc.o(i.drv_memc_rate_transfer_sel) for drv_memc_rate_transfer_sel + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate) refers to drv_memc.o(i.drv_memc_sel_vsync) for drv_memc_sel_vsync + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate) refers to drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) for drv_rxbr_frame_drop_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate) refers to drv_rxbr.o(i.drv_rxbr_hline_rcv0_cfg) for drv_rxbr_hline_rcv0_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) refers to hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) for hal_internal_sync_input_resolution_change + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to ffltui.o(.text) for __aeabi_ui2f + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to fscalb.o(.text) for __ARM_scalbnf + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to fdiv.o(.text) for __aeabi_fdiv + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to fmul.o(.text) for __aeabi_fmul + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to idiv.o(.text) for __aeabi_idivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to fflti.o(.text) for __aeabi_i2f + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to ffixi.o(.text) for __aeabi_f2iz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to f2d.o(.text) for __aeabi_f2d + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to ceil.o(i.ceil) for ceil + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to dfixi.o(.text) for __aeabi_d2iz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to fadd.o(.text) for __aeabi_fadd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_video_chunk) for drv_dsi_tx_set_video_chunk + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_video_timing) for drv_dsi_tx_set_video_timing + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) refers to fadd.o(.text) for __aeabi_fadd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to ffltui.o(.text) for __aeabi_ui2f + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to fmul.o(.text) for __aeabi_fmul + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to fdiv.o(.text) for __aeabi_fdiv + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to f2d.o(.text) for __aeabi_f2d + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to ceil.o(i.ceil) for ceil + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to drv_phy_common.o(i.drv_phy_get_rate_para) for drv_phy_get_rate_para + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to dfixi.o(.text) for __aeabi_d2iz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to idiv.o(.text) for __aeabi_idivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to fadd.o(.text) for __aeabi_fsub + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to ffixui.o(.text) for __aeabi_f2uiz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) for hal_lcdc_config_upscaler + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic) refers to drv_lcdc.o(i.drv_lcdc_config_src_parameter) for drv_lcdc_config_src_parameter + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_config_reset_modules) for drv_crgu_config_reset_modules + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) for drv_dsi_tx_command_mode_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_mode) for drv_dsi_tx_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_ulps_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) for drv_dsi_tx_phy_ulps_enter + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) for drv_dsi_tx_command_mode_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_mode) for drv_dsi_tx_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_ulps_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) for drv_dsi_tx_phy_ulps_exit + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) for hal_dsi_tx_ctrl_init_clk + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_vsync_init_tx) for hal_internal_vsync_init_tx + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) for hal_dsi_tx_config_params_for_lane_rate + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) for hal_dsi_tx_count_lane_rate + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) for hal_dsi_tx_init_phy_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) for drv_dsi_tx_phy_test_setup + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) for hal_lcdc_init_clk + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) for hal_lcdc_init_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) for hal_dsi_tx_init_dpi_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) for hal_dsi_tx_init_data_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) for hal_dsi_tx_init_remains + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) for hal_dsi_tx_init_interrupt + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ready) for drv_dsi_tx_phy_status_ready + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to drv_dsi_tx.o(i.drv_dsi_tx_powerup) for drv_dsi_tx_powerup + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_panel_reset_pin) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) for hal_dsi_tx_send_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) for drv_dsi_tx_get_cmd_status + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_get_payload) for drv_dsi_tx_command_get_payload + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to memcpya.o(.text) for __aeabi_memcpy + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_release_handle) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) refers to drv_param_init.o(i.drv_param_init_set_ccm) for drv_param_init_set_ccm + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_cus_pq_edge) refers to drv_lcdc.o(i.drv_lcdc_config_yuv420_threshold) for drv_lcdc_config_yuv420_threshold + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_cus_pq_filter) refers to drv_lcdc.o(i.drv_lcdc_config_sclu_filter) for drv_lcdc_config_sclu_filter + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_endianness) refers to drv_lcdc.o(i.drv_lcdc_config_endianness) for drv_lcdc_config_endianness + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_escape_clock_div) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) for drv_dsi_tx_set_esc_div + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_horizon_flip) refers to drv_lcdc.o(i.drv_lcdc_config_horiz_flip) for drv_lcdc_config_horiz_flip + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_lp_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_video_mode_set_lp_cmd) for drv_dsi_tx_video_mode_set_lp_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite) for drv_lcdc_config_overwrite + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite_rgb) for drv_lcdc_config_overwrite_rgb + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp) refers to drv_lcdc.o(i.drv_lcdc_config_partial_display_enable) for drv_lcdc_config_partial_display_enable + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp_area) refers to drv_lcdc.o(i.drv_lcdc_config_partial_display_area) for drv_lcdc_config_partial_display_area + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_vpg) for drv_dsi_tx_set_vpg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) for drv_dsi_tx_config_eotp + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) for drv_dsi_tx_phy_clock_lane_req_hs + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_lcdc.o(i.drv_lcdc_enable_shadow_reg) for drv_lcdc_enable_shadow_reg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite) for drv_lcdc_config_overwrite + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_lcdc.o(i.drv_lcdc_start) for drv_lcdc_start + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to drv_lcdc.o(i.drv_lcdc_start) for drv_lcdc_start + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to drv_lcdc.o(i.drv_lcdc_set_int) for drv_lcdc_set_int + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_int) for drv_dsi_tx_set_int + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to drv_dsi_tx.o(i.drv_dsi_tx_shutdown) for drv_dsi_tx_shutdown + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) for drv_dsi_tx_get_cmd_status + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) for hal_dsi_tx_send_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) for drv_dsi_tx_command_put_payload + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) for drv_dsi_tx_get_cmd_status + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) for hal_dsi_tx_send_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) for drv_dsi_tx_command_put_payload + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_mode) for drv_dsi_tx_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) for hal_dsi_tx_init_video_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_dpi_mode) for drv_dsi_tx_dpi_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_dpi_polarity) for drv_dsi_tx_dpi_polarity + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_dpi_lpcmd_time) for drv_dsi_tx_dpi_lpcmd_time + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_int) for drv_dsi_tx_set_int + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) refers to drv_dsi_tx.o(i.drv_dsi_tx_config_int) for drv_dsi_tx_config_int + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_lane_mode) for drv_dsi_tx_phy_lane_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_time_cfg) for drv_dsi_tx_phy_time_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_response_mode) for drv_dsi_tx_response_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) for drv_dsi_tx_set_esc_div + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_time_out_div) for drv_dsi_tx_set_time_out_div + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_timeout_cfg) for drv_dsi_tx_timeout_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) for drv_dsi_tx_config_eotp + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) for drv_dsi_tx_phy_clock_lane_req_hs + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_auto_lp) for drv_dsi_tx_phy_clock_lane_auto_lp + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_video_mode_cfg) for drv_dsi_tx_video_mode_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_bta_ack) for drv_dsi_tx_set_bta_ack + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_video_mode_set_lp_cmd) for drv_dsi_tx_video_mode_set_lp_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_video_mode_disable_hact_cmd) for drv_dsi_tx_video_mode_disable_hact_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) for hal_dsi_tx_calc_video_chunks + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) for drv_dsi_tx_get_cmd_status + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_header) for drv_dsi_tx_command_header + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) for drv_dsi_tx_phy_status_stopstate + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) refers to drv_param_init.o(i.drv_param_init_get_ccm) for drv_param_init_get_ccm + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) refers to drv_lcdc.o(i.drv_lcdc_config_ccm) for drv_lcdc_config_ccm + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_disp_mode) for drv_lcdc_config_disp_mode + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_endianness) for drv_lcdc_config_endianness + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_horiz_flip) for drv_lcdc_config_horiz_flip + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_cbcr) for drv_lcdc_config_cbcr + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_thresh) for drv_lcdc_config_thresh + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_dpi_polarity) for drv_lcdc_config_dpi_polarity + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_src_parameter) for drv_lcdc_config_src_parameter + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_rgb_to_pentile) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_y2t4_use_sclu) for hal_internal_vsync_get_y2t4_use_sclu + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to drv_lcdc.o(i.drv_lcdc_config_yuv420_threshold) for drv_lcdc_config_yuv420_threshold + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to drv_lcdc.o(i.drv_lcdc_config_420_to_444_mode) for drv_lcdc_config_420_to_444_mode + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to dadd.o(.text) for __aeabi_dadd + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp_area) for hal_dsi_tx_ctrl_set_partial_disp_area + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp) for hal_dsi_tx_ctrl_set_partial_disp + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to drv_lcdc.o(i.drv_lcdc_config_upscaler) for drv_lcdc_config_upscaler + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_yuv_to_rgb) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) for hal_lcdc_config_upscaler + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_yuv_to_rgb) for hal_lcdc_config_yuv_to_rgb + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) for hal_lcdc_config_ccm + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_rgb_to_pentile) for hal_lcdc_config_rgb_to_pentile + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) for hal_lcdc_config_remains + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) for hal_lcdc_init_interrupt + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to ffltui.o(.text) for __aeabi_ui2f + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_dpi_pre_div) for drv_crgu_set_dpi_pre_div + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_dpi_pre_src) for drv_crgu_set_dpi_pre_src + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_dpi_mux_src) for drv_crgu_set_dpi_mux_src + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to fmul.o(.text) for __aeabi_fmul + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to fdiv.o(.text) for __aeabi_fdiv + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to f2d.o(.text) for __aeabi_f2d + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to ceil.o(i.ceil) for ceil + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_lcdc.o(i.drv_lcdc_config_dpi_timing) for drv_lcdc_config_dpi_timing + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to cfrcmple.o(.text) for __aeabi_cfrcmple + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to ffixi.o(.text) for __aeabi_f2iz + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to idiv.o(.text) for __aeabi_idivmod + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_lcdc_div) for drv_crgu_set_lcdc_div + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_lcdc_src) for drv_crgu_set_lcdc_src + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) for hal_internal_vsync_get_sync_line + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) refers to drv_lcdc.o(i.drv_lcdc_set_int) for drv_lcdc_set_int + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) refers to drv_lcdc.o(i.drv_lcdc_ctrl_flow) for drv_lcdc_ctrl_flow + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) refers to drv_lcdc.o(i.drv_lcdc_config_int) for drv_lcdc_config_int + hal_gpio.o(i.hal_gpio_ctrl_eint) refers to drv_gpio.o(i.drv_gpio_set_int) for drv_gpio_set_int + hal_gpio.o(i.hal_gpio_ctrl_eint) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_get_input_data) refers to drv_gpio.o(i.drv_gpio_get_input_data) for drv_gpio_get_input_data + hal_gpio.o(i.hal_gpio_get_int_type) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_get_pull_state) refers to drv_gpio.o(i.drv_gpio_get_pull_state) for drv_gpio_get_pull_state + hal_gpio.o(i.hal_gpio_get_pull_state) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_init_eint) refers to drv_gpio.o(i.drv_gpio_set_ioe) for drv_gpio_set_ioe + hal_gpio.o(i.hal_gpio_init_eint) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_gpio.o(i.hal_gpio_init_eint) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_gpio_group) for drv_sys_cfg_sel_gpio_group + hal_gpio.o(i.hal_gpio_init_eint) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_int_trig) for drv_sys_cfg_sel_int_trig + hal_gpio.o(i.hal_gpio_init_eint) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_gpio.o(i.hal_gpio_init_eint) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_init_input) refers to drv_gpio.o(i.drv_gpio_set_ioe) for drv_gpio_set_ioe + hal_gpio.o(i.hal_gpio_init_input) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_gpio.o(i.hal_gpio_init_input) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_init_output) refers to hal_gpio.o(i.drv_gpio_set_output_data) for drv_gpio_set_output_data + hal_gpio.o(i.hal_gpio_init_output) refers to drv_gpio.o(i.drv_gpio_set_ioe) for drv_gpio_set_ioe + hal_gpio.o(i.hal_gpio_init_output) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_gpio.o(i.hal_gpio_init_output) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_reg_eint_cb) refers to drv_gpio.o(i.drv_gpio_register_callback) for drv_gpio_register_callback + hal_gpio.o(i.hal_gpio_reg_eint_cb) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_ap_reset_int) refers to drv_gpio.o(i.drv_gpio_register_ap_reset_callback) for drv_gpio_register_ap_reset_callback + hal_gpio.o(i.hal_gpio_set_ap_reset_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) for drv_sys_cfg_sel_ap_rst_trig + hal_gpio.o(i.hal_gpio_set_ap_reset_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_gpio.o(i.hal_gpio_set_ap_reset_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + hal_gpio.o(i.hal_gpio_set_driving_strength) refers to drv_gpio.o(i.drv_gpio_set_driving_strength) for drv_gpio_set_driving_strength + hal_gpio.o(i.hal_gpio_set_driving_strength) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_mode) refers to drv_gpio.o(i.drv_gpio_set_mode3) for drv_gpio_set_mode3 + hal_gpio.o(i.hal_gpio_set_mode) refers to drv_gpio.o(i.drv_gpio_set_mode2) for drv_gpio_set_mode2 + hal_gpio.o(i.hal_gpio_set_mode) refers to drv_gpio.o(i.drv_gpio_set_mode1) for drv_gpio_set_mode1 + hal_gpio.o(i.hal_gpio_set_mode) refers to drv_gpio.o(i.drv_gpio_set_mode0) for drv_gpio_set_mode0 + hal_gpio.o(i.hal_gpio_set_mode) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_output_data) refers to hal_gpio.o(i.drv_gpio_set_output_data) for drv_gpio_set_output_data + hal_gpio.o(i.hal_gpio_set_pull_state) refers to drv_gpio.o(i.drv_gpio_set_pull_state) for drv_gpio_set_pull_state + hal_gpio.o(i.hal_gpio_set_pull_state) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_schmitt_trigger) refers to drv_gpio.o(i.drv_gpio_set_schmitt_trigger) for drv_gpio_set_schmitt_trigger + hal_gpio.o(i.hal_gpio_set_schmitt_trigger) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_slew_rate) refers to drv_gpio.o(i.drv_gpio_set_slew_rate) for drv_gpio_set_slew_rate + hal_gpio.o(i.hal_gpio_set_slew_rate) refers to hal_gpio.o(.constdata) for .constdata + hal_i2c_master.o(i.hal_i2c_m_deinit) refers to drv_i2c_master.o(i.drv_i2c_m_deinit) for drv_i2c_m_deinit + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_master.o(i.drv_i2c_master_init) for drv_i2c_master_init + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_master.o(i.drv_i2c_m_set_callback) for drv_i2c_m_set_callback + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_master.o(i.drv_i2c_m_enable_intr) for drv_i2c_m_enable_intr + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_dma.o(i.drv_i2c_dma_init) for drv_i2c_dma_init + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_dma.o(i.drv_i2c_enable_rx_dma) for drv_i2c_enable_rx_dma + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_dma.o(i.drv_i2c_enable_tx_dma) for drv_i2c_enable_tx_dma + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to hal_i2c_master.o(i.hal_i2c_master_irq_callback) for hal_i2c_master_irq_callback + hal_i2c_master.o(i.hal_i2c_m_dma_read) refers to drv_i2c_dma.o(i.drv_i2c_master_read_dma) for drv_i2c_master_read_dma + hal_i2c_master.o(i.hal_i2c_m_dma_read) refers to hal_i2c_master.o(.data) for .data + hal_i2c_master.o(i.hal_i2c_m_dma_write) refers to drv_i2c_dma.o(i.drv_i2c_master_write_dma) for drv_i2c_master_write_dma + hal_i2c_master.o(i.hal_i2c_m_dma_write) refers to hal_i2c_master.o(.data) for .data + hal_i2c_master.o(i.hal_i2c_m_set_high_impedance) refers to drv_i2c_master.o(i.drv_i2c_m_enable) for drv_i2c_m_enable + hal_i2c_master.o(i.hal_i2c_m_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_i2c_master.o(i.hal_i2c_m_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + hal_i2c_master.o(i.hal_i2c_m_transfer_complate) refers to hal_i2c_master.o(.data) for .data + hal_i2c_master.o(i.hal_i2c_master_irq_callback) refers to drv_i2c_master.o(i.drv_i2c_clear_m_it_pending_bit) for drv_i2c_clear_m_it_pending_bit + hal_i2c_master.o(i.hal_i2c_master_irq_callback) refers to hal_i2c_master.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_deinit) refers to drv_i2c_slave.o(i.drv_i2c_s_deinit) for drv_i2c_s_deinit + hal_i2c_slave.o(i.hal_i2c_s_dma_user_callback) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_dma_write) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + hal_i2c_slave.o(i.hal_i2c_s_dma_write) refers to drv_dma.o(i.drv_dma_enable_channel_interrupts) for drv_dma_enable_channel_interrupts + hal_i2c_slave.o(i.hal_i2c_s_dma_write) refers to drv_i2c_dma.o(i.drv_i2c_slave_write_dma) for drv_i2c_slave_write_dma + hal_i2c_slave.o(i.hal_i2c_s_dma_write) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_get_tx_byte_num) refers to drv_i2c_slave.o(i.drv_i2c_s_get_tx_byte_num) for drv_i2c_s_get_tx_byte_num + hal_i2c_slave.o(i.hal_i2c_s_init) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_slave.o(i.drv_i2c_slave_init) for drv_i2c_slave_init + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_slave.o(i.drv_i2c_s_set_callback) for drv_i2c_s_set_callback + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_slave.o(i.drv_i2c_s_enable_intr) for drv_i2c_s_enable_intr + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_dma.o(i.drv_i2c_dma_init) for drv_i2c_dma_init + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) for drv_i2c_set_dma_irq_callback + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) for drv_sys_cfg_set_dma_tx_req + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_dma.o(i.drv_i2c_enable_tx_dma) for drv_i2c_enable_tx_dma + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_dma.o(i.drv_dma_enable_channel_interrupts) for drv_dma_enable_channel_interrupts + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_dma.o(i.drv_dma_enable_cycle) for drv_dma_enable_cycle + hal_i2c_slave.o(i.hal_i2c_s_init) refers to hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) for hal_i2c_slave_irq_callback + hal_i2c_slave.o(i.hal_i2c_s_init) refers to hal_i2c_slave.o(i.hal_i2c_s_dma_user_callback) for hal_i2c_s_dma_user_callback + hal_i2c_slave.o(i.hal_i2c_s_nonblocking_read) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_read_complate) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_read_complate_clear) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_read_data) refers to drv_i2c_slave.o(i.drv_i2c_s_read_data) for drv_i2c_s_read_data + hal_i2c_slave.o(i.hal_i2c_s_rxfifo_notempty) refers to drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) for drv_i2c_s_get_fifo_status + hal_i2c_slave.o(i.hal_i2c_s_set_dma_tx_cycle) refers to drv_dma.o(i.drv_dma_enable_cycle) for drv_dma_enable_cycle + hal_i2c_slave.o(i.hal_i2c_s_set_high_impedance) refers to drv_i2c_slave.o(i.drv_i2c_s_enable) for drv_i2c_s_enable + hal_i2c_slave.o(i.hal_i2c_s_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_i2c_slave.o(i.hal_i2c_s_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + hal_i2c_slave.o(i.hal_i2c_s_set_transfer) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_write_complate) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_write_data) refers to drv_i2c_slave.o(i.drv_i2c_s_write_data) for drv_i2c_s_write_data + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) for drv_i2c_s_get_fifo_status + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_i2c_slave.o(i.drv_i2c_clear_s_it_pending_bit) for drv_i2c_clear_s_it_pending_bit + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_i2c_slave.o(i.drv_i2c_s_write_data) for drv_i2c_s_write_data + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_i2c_slave.o(.data) for tx_byte_num + hal_spi_master.o(i.hal_spi_m_callback) refers to drv_spi_dma.o(i.drv_spi_abort_dma) for drv_spi_abort_dma + hal_spi_master.o(i.hal_spi_m_callback) refers to hal_spi_master.o(.data) for .data + hal_spi_master.o(i.hal_spi_m_clear_rxfifo) refers to drv_spi_master.o(i.drv_spi_m_read_data) for drv_spi_m_read_data + hal_spi_master.o(i.hal_spi_m_deinit) refers to drv_spi_master.o(i.drv_spi_m_deinit) for drv_spi_m_deinit + hal_spi_master.o(i.hal_spi_m_dma_init) refers to hal_spi_master.o(i.hal_spi_m_gpio_init) for hal_spi_m_gpio_init + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_master.o(i.drv_spi_master_init) for drv_spi_master_init + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_dma.o(i.drv_spi_dma_init) for drv_spi_dma_init + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) for drv_spi_set_dma_irq_callback + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_master.o(i.drv_spi_m_enable_rx_dma) for drv_spi_m_enable_rx_dma + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_master.o(i.drv_spi_m_enable_tx_dma) for drv_spi_m_enable_tx_dma + hal_spi_master.o(i.hal_spi_m_dma_init) refers to hal_spi_master.o(i.hal_spi_m_callback) for hal_spi_m_callback + hal_spi_master.o(i.hal_spi_m_dma_read) refers to drv_spi_dma.o(i.drv_spim_dma_read) for drv_spim_dma_read + hal_spi_master.o(i.hal_spi_m_dma_read) refers to hal_spi_master.o(.data) for .data + hal_spi_master.o(i.hal_spi_m_dma_write) refers to drv_spi_dma.o(i.drv_spim_dma_write) for drv_spim_dma_write + hal_spi_master.o(i.hal_spi_m_dma_write) refers to hal_spi_master.o(.data) for .data + hal_spi_master.o(i.hal_spi_m_get_transfer_complate) refers to hal_spi_master.o(.data) for .data + hal_spi_master.o(i.hal_spi_m_gpio_init) refers to drv_spi_master.o(i.drv_spi_m_gpio_init) for drv_spi_m_gpio_init + hal_spi_master.o(i.hal_spi_m_set_high_impedance) refers to drv_spi_master.o(i.drv_spi_m_enable) for drv_spi_m_enable + hal_spi_master.o(i.hal_spi_m_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_spi_master.o(i.hal_spi_m_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_init_input) for hal_gpio_init_input + hal_spi_master.o(i.hal_spi_m_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + hal_swire.o(i.hal_swire_deinit) refers to drv_swire.o(i.drv_swire_enable) for drv_swire_enable + hal_swire.o(i.hal_swire_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_swire.o(i.hal_swire_init) refers to drv_crgu.o(i.drv_crgu_set_swire_div) for drv_crgu_set_swire_div + hal_swire.o(i.hal_swire_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_swire.o(i.hal_swire_init) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_swire.o(i.hal_swire_init) refers to drv_swire.o(i.drv_swire_enable) for drv_swire_enable + hal_swire.o(i.hal_swire_open) refers to drv_swire.o(i.drv_swire_set_power_down) for drv_swire_set_power_down + hal_swire.o(i.hal_swire_register_callback) refers to drv_swire.o(i.drv_swire_register_callback) for drv_swire_register_callback + hal_swire.o(i.hal_swire_start) refers to drv_swire.o(i.drv_swire_set_int) for drv_swire_set_int + hal_swire.o(i.hal_swire_start) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_swire.o(i.hal_swire_start) refers to drv_swire.o(i.drv_swire_set_bit_time) for drv_swire_set_bit_time + hal_swire.o(i.hal_swire_start) refers to drv_swire.o(i.drv_swire_set_pulse_count) for drv_swire_set_pulse_count + hal_swire.o(i.hal_swire_start) refers to drv_common.o(.data) for g_system_clock + hal_system.o(i.hal_system_deep_sleep_mode) refers to drv_pwr.o(i.drv_pwr_enter_deep_sleep_mode) for drv_pwr_enter_deep_sleep_mode + hal_system.o(i.hal_system_disable_systick) refers to drv_common.o(i.drv_common_disable_systick) for drv_common_disable_systick + hal_system.o(i.hal_system_enable_systick) refers to drv_common.o(i.drv_common_enable_systick) for drv_common_enable_systick + hal_system.o(i.hal_system_flash_read) refers to norflash.o(i.norflash_init) for norflash_init + hal_system.o(i.hal_system_flash_read) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + hal_system.o(i.hal_system_flash_read) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_system.o(i.hal_system_flash_read) refers to norflash.o(i.norflash_dual_read) for norflash_dual_read + hal_system.o(i.hal_system_flash_write) refers to norflash.o(i.norflash_init) for norflash_init + hal_system.o(i.hal_system_flash_write) refers to norflash.o(i.norflash_erase_block) for norflash_erase_block + hal_system.o(i.hal_system_flash_write) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_system.o(i.hal_system_flash_write) refers to norflash.o(i.norflash_write) for norflash_write + hal_system.o(i.hal_system_get_tick) refers to drv_common.o(i.drv_common_get_tick) for drv_common_get_tick + hal_system.o(i.hal_system_idle_mode) refers to drv_common.o(i.drv_common_idle_mode) for drv_common_idle_mode + hal_system.o(i.hal_system_init) refers to drv_pwr.o(i.drv_pwr_set_system_clk_src) for drv_pwr_set_system_clk_src + hal_system.o(i.hal_system_init) refers to drv_crgu.o(i.drv_crgu_set_ahb_src) for drv_crgu_set_ahb_src + hal_system.o(i.hal_system_init) refers to drv_crgu.o(i.drv_crgu_set_ahb_pre_div) for drv_crgu_set_ahb_pre_div + hal_system.o(i.hal_system_init) refers to irq_redirect .o(i.handle_init) for handle_init + hal_system.o(i.hal_system_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_all_int) for drv_sys_cfg_clear_all_int + hal_system.o(i.hal_system_init) refers to drv_common.o(i.drv_common_system_init) for drv_common_system_init + hal_system.o(i.hal_system_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_system.o(i.hal_system_init) refers to drv_pwr.o(i.drv_pwr_set_pvd_mode) for drv_pwr_set_pvd_mode + hal_system.o(i.hal_system_init) refers to drv_common.o(.data) for g_system_clock + hal_system.o(i.hal_system_init_console) refers to hal_uart.o(i.hal_uart_init) for hal_uart_init + hal_system.o(i.hal_system_register_systick_cb) refers to drv_common.o(i.drv_common_systick_register_cb) for drv_common_systick_register_cb + hal_system.o(i.hal_system_set_pvd) refers to drv_pwr.o(i.drv_pwr_set_pvd_mode) for drv_pwr_set_pvd_mode + hal_system.o(i.hal_system_set_vcc) refers to drv_pwr.o(i.drv_pwr_set_cp_mode) for drv_pwr_set_cp_mode + hal_system.o(i.hal_system_share_flash_mode) refers to drv_fls.o(i.drv_fls_gpio_connect) for drv_fls_gpio_connect + hal_system.o(i.hal_system_share_flash_mode) refers to drv_fls.o(i.drv_fls_gpio_disconnect) for drv_fls_gpio_disconnect + hal_system.o(i.hal_system_sleep_mode) refers to drv_crgu.o(i.drv_crgu_config_clocks) for drv_crgu_config_clocks + hal_timer.o(i.hal_timer_deinit) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + hal_timer.o(i.hal_timer_deinit) refers to drv_timer.o(i.drv_timer_set_repeat) for drv_timer_set_repeat + hal_timer.o(i.hal_timer_deinit) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_timer.o(i.hal_timer_deinit) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_timer.o(i.hal_timer_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_timer.o(i.hal_timer_get_status) refers to drv_timer.o(i.drv_timer_get_status) for drv_timer_get_status + hal_timer.o(i.hal_timer_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_timer.o(i.hal_timer_init) refers to drv_timer.o(i.drv_timer_set_prescaler) for drv_timer_set_prescaler + hal_timer.o(i.hal_timer_set_repeat) refers to drv_timer.o(i.drv_timer_set_repeat) for drv_timer_set_repeat + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_register_callback) for drv_timer_register_callback + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_get_prescaler) for drv_timer_get_prescaler + hal_timer.o(i.hal_timer_start) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_set_compare_val) for drv_timer_set_compare_val + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_timer.o(i.hal_timer_start) refers to drv_common.o(.data) for g_system_clock + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_register_callback) for drv_timer_register_callback + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_get_prescaler) for drv_timer_get_prescaler + hal_timer.o(i.hal_timer_start_ex) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_set_compare_val) for drv_timer_set_compare_val + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_timer.o(i.hal_timer_start_ex) refers to drv_common.o(.data) for g_system_clock + hal_timer.o(i.hal_timer_stop) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_timer.o(i.hal_timer_stop) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + hal_timer.o(i.hal_timer_stop) refers to drv_timer.o(i.drv_timer_register_callback) for drv_timer_register_callback + hal_timer.o(i.hal_timer_stop) refers to drv_timer.o(i.drv_timer_set_compare_val) for drv_timer_set_compare_val + tau_delay.o(i.delayMs) refers to tau_delay.o(i.delayUs) for delayUs + tau_log.o(i.LOG_printf) refers to printfa.o(i.__0vsprintf) for vsprintf + tau_log.o(i.LOG_printf) refers to printfa.o(i.__0printf) for __2printf + tau_log.o(i.LOG_printf) refers to tau_log.o(.bss) for .bss + tau_log.o(i.fgetc) refers to hal_uart.o(i.hal_uart_receive_blocking) for hal_uart_receive_blocking + tau_log.o(i.fputc) refers to hal_uart.o(i.hal_uart_transmit_blocking) for hal_uart_transmit_blocking + norflash.o(i.app_fls_ctrl_Handler) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + norflash.o(i.app_fls_ctrl_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + norflash.o(i.app_fls_ctrl_Handler) refers to norflash.o(.data) for .data + norflash.o(i.norflash_best_cfg_init) refers to drv_fls.o(i.fls_spi_init) for fls_spi_init + norflash.o(i.norflash_best_cfg_init) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_check_id) refers to norflash.o(i.norflash_read_id) for norflash_read_id + norflash.o(i.norflash_check_id) refers to tau_delay.o(i.delayUs) for delayUs + norflash.o(i.norflash_check_id) refers to norflash.o(.data) for .data + norflash.o(i.norflash_dma_callback) refers to norflash.o(.data) for .data + norflash.o(i.norflash_dma_read) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + norflash.o(i.norflash_dma_read) refers to drv_fls_dma.o(i.fls_transfer_create_handle_dma) for fls_transfer_create_handle_dma + norflash.o(i.norflash_dma_read) refers to drv_fls_dma.o(i.fls_dma_read_prepare) for fls_dma_read_prepare + norflash.o(i.norflash_dma_read) refers to drv_fls_dma.o(i.fls_transfer_dma) for fls_transfer_dma + norflash.o(i.norflash_dma_read) refers to drv_fls_dma.o(i.fls_dma_disable) for fls_dma_disable + norflash.o(i.norflash_dma_read) refers to norflash.o(.data) for .data + norflash.o(i.norflash_dma_read) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_dma_read) refers to norflash.o(i.norflash_dma_callback) for norflash_dma_callback + norflash.o(i.norflash_dma_write) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + norflash.o(i.norflash_dma_write) refers to drv_fls_dma.o(i.fls_transfer_create_handle_dma) for fls_transfer_create_handle_dma + norflash.o(i.norflash_dma_write) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_dma_write) refers to norflash.o(i.norflash_switch_fls_spi) for norflash_switch_fls_spi + norflash.o(i.norflash_dma_write) refers to drv_fls_dma.o(i.fls_dma_write_prepare) for fls_dma_write_prepare + norflash.o(i.norflash_dma_write) refers to drv_fls_dma.o(i.fls_transfer_dma) for fls_transfer_dma + norflash.o(i.norflash_dma_write) refers to drv_fls_dma.o(i.fls_dma_disable) for fls_dma_disable + norflash.o(i.norflash_dma_write) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_dma_write) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_dma_write) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_dma_write) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_dma_write) refers to norflash.o(i.norflash_dma_callback) for norflash_dma_callback + norflash.o(i.norflash_dma_write) refers to norflash.o(.data) for .data + norflash.o(i.norflash_dual_read) refers to drv_fls.o(i.fls_ddat_enable) for fls_ddat_enable + norflash.o(i.norflash_dual_read) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_dual_read) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_dual_write) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_dual_write) refers to norflash.o(i.norflash_switch_fls_spi) for norflash_switch_fls_spi + norflash.o(i.norflash_dual_write) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_dual_write) refers to drv_fls.o(i.fls_ddat_enable) for fls_ddat_enable + norflash.o(i.norflash_dual_write) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_dual_write) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_en4b) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_en4b) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + norflash.o(i.norflash_en4b) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_en4b) refers to norflash.o(i.norflash_read_config_reg) for norflash_read_config_reg + norflash.o(i.norflash_en4b) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_en_quad) refers to norflash.o(i.norflash_en_quad_check) for norflash_en_quad_check + norflash.o(i.norflash_en_quad) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_en_quad) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_en_quad) refers to drv_fls.o(i.fls_busy_pending) for fls_busy_pending + norflash.o(i.norflash_en_quad) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_en_quad_check) refers to norflash.o(i.norflash_get_dual_hstatus) for norflash_get_dual_hstatus + norflash.o(i.norflash_en_quad_check) refers to norflash.o(i.norflash_get_hstatus) for norflash_get_hstatus + norflash.o(i.norflash_en_quad_check) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_en_quad_check) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_erase_block) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_erase_block) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_erase_block) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_erase_block) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_erase_chip) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_erase_chip) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + norflash.o(i.norflash_erase_chip) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_erase_sector) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_erase_sector) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_erase_sector) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_erase_sector) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_ex4b) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_ex4b) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + norflash.o(i.norflash_ex4b) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_ex4b) refers to norflash.o(i.norflash_read_config_reg) for norflash_read_config_reg + norflash.o(i.norflash_ex4b) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_exit_quad) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_exit_quad) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_exit_quad) refers to norflash.o(i.norflash_en_quad_check) for norflash_en_quad_check + norflash.o(i.norflash_exit_quad) refers to drv_fls.o(i.fls_busy_pending) for fls_busy_pending + norflash.o(i.norflash_exit_quad) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_get_dual_hstatus) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_get_dual_hstatus) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_get_dual_hstatus) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_get_hstatus) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_get_hstatus) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_get_hstatus) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_get_status) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_get_status) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_get_status) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_init) refers to drv_fls.o(i.fls_get_default_spi_config) for fls_get_default_spi_config + norflash.o(i.norflash_init) refers to drv_fls.o(i.fls_get_default_fls_config) for fls_get_default_fls_config + norflash.o(i.norflash_init) refers to drv_fls.o(i.fls_get_default_tuning) for fls_get_default_tuning + norflash.o(i.norflash_init) refers to drv_fls.o(i.fls_init) for fls_init + norflash.o(i.norflash_init) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_init) refers to drv_fls.o(.data) for g_fls_tuning + norflash.o(i.norflash_quad_read) refers to drv_fls.o(i.fls_qdat_enable) for fls_qdat_enable + norflash.o(i.norflash_quad_read) refers to drv_fls.o(i.fls_qadr_enable) for fls_qadr_enable + norflash.o(i.norflash_quad_read) refers to drv_fls.o(i.fls_qcmd_enable) for fls_qcmd_enable + norflash.o(i.norflash_quad_read) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_quad_read) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_quad_write) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_quad_write) refers to norflash.o(i.norflash_switch_fls_spi) for norflash_switch_fls_spi + norflash.o(i.norflash_quad_write) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_quad_write) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_quad_write) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_quad_write) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_read) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_read_config_reg) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_read_id) refers to drv_fls.o(i.fls_read_cmd) for fls_read_cmd + norflash.o(i.norflash_set_best_cfg) refers to memseta.o(.text) for __aeabi_memclr4 + norflash.o(i.norflash_set_best_read_cfg) refers to norflash.o(i.norflash_en_quad) for norflash_en_quad + norflash.o(i.norflash_set_best_read_cfg) refers to norflash.o(.data) for .data + norflash.o(i.norflash_set_best_read_cfg) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_set_best_write_cfg) refers to norflash.o(i.norflash_en_quad) for norflash_en_quad + norflash.o(i.norflash_set_best_write_cfg) refers to norflash.o(.data) for .data + norflash.o(i.norflash_set_best_write_cfg) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_switch_fls_spi) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_switch_fls_spi) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_switch_fls_spi) refers to drv_fls.o(i.fls_ddat_enable) for fls_ddat_enable + norflash.o(i.norflash_switch_fls_spi) refers to drv_fls.o(i.fls_qdat_enable) for fls_qdat_enable + norflash.o(i.norflash_switch_fls_spi) refers to drv_fls.o(i.fls_qadr_enable) for fls_qadr_enable + norflash.o(i.norflash_write) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_write) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_write) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_write) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_write_disable) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + norflash.o(i.norflash_write_disable) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_write_disable) refers to norflash.o(.data) for .data + norflash.o(i.norflash_write_disable) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_write_enable) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + norflash.o(i.norflash_write_enable) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_write_enable) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_write_enable) refers to norflash.o(.data) for .data + norflash.o(i.norflash_write_endian_scr) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_write_endian_scr) refers to norflash.o(i.norflash_big_end_enable) for norflash_big_end_enable + norflash.o(i.norflash_write_endian_scr) refers to drv_fls.o(i.fls_en_scr) for fls_en_scr + norflash.o(i.norflash_write_endian_scr) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_write_endian_scr) refers to norflash.o(i.norflash_big_end_clear) for norflash_big_end_clear + norflash.o(i.norflash_write_endian_scr) refers to drv_fls.o(i.fls_scr_clear) for fls_scr_clear + norflash.o(i.norflash_write_endian_scr) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_write_endian_scr) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + hal_uart.o(i.hal_uart_deinit) refers to drv_dma.o(i.drv_dma_deinit) for drv_dma_deinit + hal_uart.o(i.hal_uart_deinit) refers to drv_uart.o(i.UART_Deinit) for UART_Deinit + hal_uart.o(i.hal_uart_dmacallback) refers to hal_uart.o(.bss) for .bss + hal_uart.o(i.hal_uart_init) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_uart.o(i.hal_uart_init) refers to memseta.o(.text) for __aeabi_memclr4 + hal_uart.o(i.hal_uart_init) refers to drv_uart.o(i.UART_init) for UART_init + hal_uart.o(i.hal_uart_init) refers to drv_common.o(.data) for g_system_clock + hal_uart.o(i.hal_uart_init) refers to hal_uart.o(.bss) for .bss + hal_uart.o(i.hal_uart_receive_blocking) refers to drv_uart.o(i.UART_ReadBlocking) for UART_ReadBlocking + hal_uart.o(i.hal_uart_receive_dma) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + hal_uart.o(i.hal_uart_receive_dma) refers to drv_uart_dma.o(i.UART_TransferCreateHandleDMA) for UART_TransferCreateHandleDMA + hal_uart.o(i.hal_uart_receive_dma) refers to drv_uart_dma.o(i.UART_TransferReceiveDMA) for UART_TransferReceiveDMA + hal_uart.o(i.hal_uart_receive_dma) refers to hal_uart.o(.bss) for .bss + hal_uart.o(i.hal_uart_receive_dma) refers to hal_uart.o(i.hal_uart_dmacallback) for hal_uart_dmacallback + hal_uart.o(i.hal_uart_transmit_blocking) refers to drv_uart.o(i.UART_WriteBlocking) for UART_WriteBlocking + hal_uart.o(i.hal_uart_transmit_dma) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + hal_uart.o(i.hal_uart_transmit_dma) refers to drv_uart_dma.o(i.UART_TransferCreateHandleDMA) for UART_TransferCreateHandleDMA + hal_uart.o(i.hal_uart_transmit_dma) refers to drv_uart_dma.o(i.UART_TransferSendDMA) for UART_TransferSendDMA + hal_uart.o(i.hal_uart_transmit_dma) refers to hal_uart.o(.bss) for .bss + hal_uart.o(i.hal_uart_transmit_dma) refers to hal_uart.o(i.hal_uart_dmacallback) for hal_uart_dmacallback + drv_common.o(i.app_HardFault_Handler) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_common.o(i.app_SysTick_Handler) refers to drv_common.o(.data) for .data + drv_common.o(i.drv_common_enable_systick) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_common.o(i.drv_common_enable_systick) refers to drv_common.o(.data) for .data + drv_common.o(i.drv_common_get_tick) refers to drv_common.o(.data) for .data + drv_common.o(i.drv_common_system_init) refers to drv_chip_info.o(i.drv_chip_info_init) for drv_chip_info_init + drv_common.o(i.drv_common_system_init) refers to drv_chip_info.o(i.drv_chip_info_get_version) for drv_chip_info_get_version + drv_common.o(i.drv_common_systick_register_cb) refers to drv_common.o(.data) for .data + drv_dma.o(i.app_dma_irq_handler) refers to drv_dma.o(i.drv_dma_irq_handler) for drv_dma_irq_handler + drv_dma.o(i.drv_dma_abort_transfer) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + drv_dma.o(i.drv_dma_abort_transfer) refers to drv_dma.o(i.drv_dma_disenable_channel_interrupts) for drv_dma_disenable_channel_interrupts + drv_dma.o(i.drv_dma_ahb_init) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + drv_dma.o(i.drv_dma_ahb_init) refers to drv_dma.o(i.drv_dma_disenable_channel_interrupts) for drv_dma_disenable_channel_interrupts + drv_dma.o(i.drv_dma_ahb_init) refers to drv_dma.o(i.drv_dma_clear_flag) for drv_dma_clear_flag + drv_dma.o(i.drv_dma_ahb_init) refers to drv_dma.o(i.drv_dma_set_ccr) for drv_dma_set_ccr + drv_dma.o(i.drv_dma_ahb_init) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_dma.o(i.drv_dma_clear_flag) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dma.o(i.drv_dma_create_handle) refers to drv_dma.o(.bss) for .bss + drv_dma.o(i.drv_dma_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_dma.o(i.drv_dma_disenable_channel_interrupts) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dma.o(i.drv_dma_enable_channel_interrupts) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_dma.o(i.drv_dma_enable_cycle) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + drv_dma.o(i.drv_dma_get_remaining_bytes) refers to drv_dma.o(i.drv_dma_channel_is_active) for drv_dma_channel_is_active + drv_dma.o(i.drv_dma_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_dma.o(i.drv_dma_init) refers to drv_dma.o(i.drv_dma_ahb_init) for drv_dma_ahb_init + drv_dma.o(i.drv_dma_irq_handler) refers to drv_dma.o(i.drv_dma_get_channel_flag) for drv_dma_get_channel_flag + drv_dma.o(i.drv_dma_irq_handler) refers to drv_dma.o(i.drv_dma_clear_flag) for drv_dma_clear_flag + drv_dma.o(i.drv_dma_irq_handler) refers to drv_dma.o(.bss) for .bss + drv_dma.o(i.drv_dma_m2m_init) refers to memseta.o(.text) for __aeabi_memclr4 + drv_dma.o(i.drv_dma_m2m_init) refers to drv_dma.o(i.drv_dma_init) for drv_dma_init + drv_dma.o(i.drv_dma_reset) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + drv_dma.o(i.drv_dma_set_burst) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + drv_dma.o(i.drv_dma_set_transfer) refers to drv_dma.o(i.drv_dma_set_burst) for drv_dma_set_burst + drv_dma.o(i.drv_dma_start_transfer) refers to drv_dma.o(i.drv_dma_enable_channel_interrupts) for drv_dma_enable_channel_interrupts + drv_dma.o(i.drv_dma_start_transfer) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_fls.o(i.drv_fls_gpio_connect) refers to drv_fls.o(i.drv_fls_gpio_disconnect) for drv_fls_gpio_disconnect + drv_fls.o(i.drv_fls_gpio_disconnect) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_fls.o(i.fls_EnableClk) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_fls.o(i.fls_busy_pending) refers to norflash.o(i.norflash_get_status) for norflash_get_status + drv_fls.o(i.fls_de_init) refers to drv_fls_dma.o(i.fls_dma_disable) for fls_dma_disable + drv_fls.o(i.fls_de_init) refers to drv_dma.o(i.drv_dma_clear_flag) for drv_dma_clear_flag + drv_fls.o(i.fls_de_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_fls.o(i.fls_disable_it) refers to drv_fls.o(i.__NVIC_DisableIRQ) for __NVIC_DisableIRQ + drv_fls.o(i.fls_disable_it) refers to drv_fls.o(i.fls_set_irq_mask) for fls_set_irq_mask + drv_fls.o(i.fls_enable_it) refers to drv_fls.o(i.__NVIC_DisableIRQ) for __NVIC_DisableIRQ + drv_fls.o(i.fls_enable_it) refers to drv_fls.o(i.fls_set_irq_mask) for fls_set_irq_mask + drv_fls.o(i.fls_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_fls.o(i.fls_init) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + drv_fls.o(i.fls_init) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_init) refers to drv_fls.o(i.fls_spi_init) for fls_spi_init + drv_fls.o(i.fls_init) refers to drv_fls.o(i.fls_ctrl_cfg_init) for fls_ctrl_cfg_init + drv_fls.o(i.fls_init) refers to drv_fls.o(i.fls_set_tuning) for fls_set_tuning + drv_fls.o(i.fls_init) refers to drv_fls_dma.o(i.fls_dma_disable) for fls_dma_disable + drv_fls.o(i.fls_read_byte_data) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_read_byte_data) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls.o(i.fls_read_byte_data) refers to drv_fls.o(i.fls_set_read) for fls_set_read + drv_fls.o(i.fls_read_byte_data) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls.o(i.fls_read_cmd) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_read_cmd) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls.o(i.fls_read_cmd) refers to drv_fls.o(i.fls_set_read) for fls_set_read + drv_fls.o(i.fls_read_cmd) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls.o(i.fls_read_cmd_it) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_read_cmd_it) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls.o(i.fls_read_cmd_it) refers to drv_fls.o(i.fls_set_read) for fls_set_read + drv_fls.o(i.fls_read_cmd_it) refers to drv_fls.o(i.fls_enable_it) for fls_enable_it + drv_fls.o(i.fls_read_cmd_it) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls.o(i.fls_set_irq_mask) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_fls.o(i.fls_set_irq_mask) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_fls.o(i.fls_write_byte_data) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_write_byte_data) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls.o(i.fls_write_byte_data) refers to drv_fls.o(i.fls_set_write) for fls_set_write + drv_fls.o(i.fls_write_byte_data) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls.o(i.fls_write_cmd) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_write_cmd) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls.o(i.fls_write_cmd) refers to drv_fls.o(i.fls_set_write) for fls_set_write + drv_fls.o(i.fls_write_cmd) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) for drv_ap_rst_trig_edge_detect + drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) refers to drv_gpio.o(.data) for .data + drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.drv_gpio_get_pull_state) refers to ap_demo.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_gpio.o(i.drv_gpio_register_ap_reset_callback) refers to drv_gpio.o(.data) for .data + drv_gpio.o(i.drv_gpio_register_callback) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.drv_gpio_set_driving_strength) refers to ap_demo.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_gpio.o(i.drv_gpio_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_gpio.o(i.drv_gpio_set_pull_state) refers to ap_demo.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_gpio.o(i.drv_gpio_set_schmitt_trigger) refers to ap_demo.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_gpio.o(i.drv_gpio_set_slew_rate) refers to ap_demo.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_i2c_dma.o(i.drv_i2c_dma_callback) refers to drv_i2c_dma.o(.data) for .data + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) for drv_sys_cfg_set_dma_rx_req + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_dma.o(i.drv_dma_set_transfer) for drv_dma_set_transfer + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_i2c_dma.o(i.drv_i2c_master_write_read_cmd) for drv_i2c_master_write_read_cmd + drv_i2c_dma.o(i.drv_i2c_master_write_dma) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) for drv_sys_cfg_set_dma_tx_req + drv_i2c_dma.o(i.drv_i2c_master_write_dma) refers to drv_dma.o(i.drv_dma_set_transfer) for drv_dma_set_transfer + drv_i2c_dma.o(i.drv_i2c_master_write_dma) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_i2c_dma.o(i.drv_i2c_master_write_dma) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) refers to drv_dma.o(i.drv_dma_set_callback) for drv_dma_set_callback + drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) refers to drv_i2c_dma.o(.data) for .data + drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) refers to drv_i2c_dma.o(.bss) for .bss + drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) refers to drv_i2c_dma.o(i.drv_i2c_dma_callback) for drv_i2c_dma_callback + drv_i2c_dma.o(i.drv_i2c_slave_write_dma) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_i2c_master.o(i.app_I2C1_IRQn_Handler) refers to drv_i2c_master.o(.data) for .data + drv_i2c_master.o(i.drv_i2c_clear_m_it_pending_bit) refers to ap_demo.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_i2c_master.o(i.drv_i2c_clear_m_it_pending_bit) refers to drv_i2c_master.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_i2c_master.o(i.drv_i2c_m_enable_intr) refers to drv_i2c_master.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_i2c_master.o(i.drv_i2c_m_read_data) refers to drv_i2c_master.o(i.drv_i2c_m_get_fifo_status) for drv_i2c_m_get_fifo_status + drv_i2c_master.o(i.drv_i2c_m_set_callback) refers to drv_i2c_master.o(.data) for .data + drv_i2c_master.o(i.drv_i2c_m_set_sys_mask) refers to drv_i2c_master.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_i2c_master.o(i.drv_i2c_m_write_data) refers to drv_i2c_master.o(i.drv_i2c_m_get_fifo_status) for drv_i2c_m_get_fifo_status + drv_i2c_master.o(i.drv_i2c_master_init) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_i2c_master.o(i.drv_i2c_master_init) refers to drv_common.o(.data) for g_system_clock + drv_i2c_slave.o(i.app_I2C0_IRQn_Handler) refers to drv_i2c_slave.o(.data) for .data + drv_i2c_slave.o(i.drv_i2c_clear_s_it_pending_bit) refers to ap_demo.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_i2c_slave.o(i.drv_i2c_clear_s_it_pending_bit) refers to drv_i2c_slave.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_i2c_slave.o(i.drv_i2c_s_enable_intr) refers to drv_i2c_slave.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_i2c_slave.o(i.drv_i2c_s_get_tx_byte_num) refers to drv_i2c_slave.o(.data) for .data + drv_i2c_slave.o(i.drv_i2c_s_read_data) refers to drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) for drv_i2c_s_get_fifo_status + drv_i2c_slave.o(i.drv_i2c_s_set_callback) refers to drv_i2c_slave.o(.data) for .data + drv_i2c_slave.o(i.drv_i2c_s_set_sys_mask) refers to drv_i2c_slave.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_i2c_slave.o(i.drv_i2c_s_write_data) refers to drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) for drv_i2c_s_get_fifo_status + drv_param_init.o(i.drv_param_get_picture_quality_setting) refers to memcpya.o(.text) for __aeabi_memcpy4 + drv_param_init.o(i.drv_param_get_picture_quality_setting) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_get_ccm) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_get_scld_filter_h) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_get_scld_filter_v) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_get_sclu_filter_h) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_get_sclu_filter_v) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_set_ccm) refers to memcpya.o(.text) for __aeabi_memcpy4 + drv_param_init.o(i.drv_param_init_set_ccm) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_set_scld_filter) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_set_sclu_filter) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_p2r_filter_init) refers to memcpya.o(.text) for __aeabi_memcpy4 + drv_param_init.o(i.drv_param_p2r_filter_init) refers to drv_param_init.o(.constdata) for .constdata + drv_param_init.o(i.drv_param_set_enh_chr) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_set_enh_chr2) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_set_enh_lum) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_set_gain) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_yuv420_filter_init) refers to drv_param_init.o(.constdata) for .constdata + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_dma.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_dma.o(.bss) for .bss + drv_spi_dma.o(i.drv_spi_dma_callback) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_dma_init) refers to drv_spi_dma.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) refers to drv_dma.o(i.drv_dma_set_callback) for drv_dma_set_callback + drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) refers to drv_spi_dma.o(.bss) for .bss + drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) refers to drv_spi_dma.o(i.drv_spi_dma_callback) for drv_spi_dma_callback + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) for drv_sys_cfg_set_dma_rx_req + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_dma.o(i.drv_dma_set_transfer) for drv_dma_set_transfer + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_dma.o(i.drv_dma_start_transfer) for drv_dma_start_transfer + drv_spi_dma.o(i.drv_spim_dma_read) refers to ap_demo.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_spi_dma.o(.bss) for .bss + drv_spi_dma.o(i.drv_spim_dma_write) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) for drv_sys_cfg_set_dma_tx_req + drv_spi_dma.o(i.drv_spim_dma_write) refers to drv_dma.o(i.drv_dma_set_transfer) for drv_dma_set_transfer + drv_spi_dma.o(i.drv_spim_dma_write) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_spi_dma.o(i.drv_spim_dma_write) refers to drv_dma.o(i.drv_dma_start_transfer) for drv_dma_start_transfer + drv_spi_dma.o(i.drv_spim_dma_write) refers to drv_spi_dma.o(.bss) for .bss + drv_spi_dma.o(i.drv_spis_dma_write) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_spi_dma.o(i.drv_spis_dma_write) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_spi_dma.o(i.drv_spis_dma_write) refers to drv_spi_dma.o(.bss) for .bss + drv_spi_master.o(i.app_SPIM_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_spi_master.o(i.app_SPIM_IRQn_Handler) refers to drv_spi_master.o(.data) for .data + drv_spi_master.o(i.drv_spi_m_disable_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_spi_master.o(i.drv_spi_m_disable_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_spi_master.o(i.drv_spi_m_enable_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_spi_master.o(i.drv_spi_m_set_intr_callback) refers to drv_spi_master.o(.data) for .data + drv_spi_master.o(i.drv_spi_master_init) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_spi_master.o(i.drv_spi_master_init) refers to drv_common.o(.data) for g_system_clock + drv_swire.o(i.app_SWIRE_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_swire.o(i.app_SWIRE_IRQn_Handler) refers to drv_swire.o(i.drv_swire_set_int) for drv_swire_set_int + drv_swire.o(i.app_SWIRE_IRQn_Handler) refers to drv_swire.o(.data) for .data + drv_swire.o(i.drv_swire_register_callback) refers to drv_swire.o(.data) for .data + drv_swire.o(i.drv_swire_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_lvl_trig) for drv_sys_cfg_sel_ap_rst_lvl_trig + drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) refers to drv_sys_cfg.o(.data) for .data + drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_lvl_trig) for drv_sys_cfg_sel_ap_rst_lvl_trig + drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) refers to drv_sys_cfg.o(.data) for .data + drv_timer.o(i.app_TIMER0_IRQn_Handler) refers to drv_timer.o(i.drv_timer_handle_interrupt) for drv_timer_handle_interrupt + drv_timer.o(i.app_TIMER1_IRQn_Handler) refers to drv_timer.o(i.drv_timer_handle_interrupt) for drv_timer_handle_interrupt + drv_timer.o(i.app_TIMER2_IRQn_Handler) refers to drv_timer.o(i.drv_timer_handle_interrupt) for drv_timer_handle_interrupt + drv_timer.o(i.app_TIMER3_IRQn_Handler) refers to drv_timer.o(i.drv_timer_handle_interrupt) for drv_timer_handle_interrupt + drv_timer.o(i.drv_timer_clear_status_flags) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_clear_status_flags) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_timer.o(i.drv_timer_enable) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_get_instance) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_get_prescaler) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_get_status) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(i.drv_timer_clear_status_flags) for drv_timer_clear_status_flags + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(i.drv_timer_set_compare_val) for drv_timer_set_compare_val + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_register_callback) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_set_compare_val) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_timer.o(i.drv_timer_set_prescaler) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_set_prescaler) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_set_repeat) refers to drv_timer.o(.data) for .data + dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) refers to dcs_packet_fifo.o(.bss) for .bss + dcs_packet_fifo.o(i.dcs_packet_fifo_init) refers to dcs_packet_fifo.o(.bss) for .bss + dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) refers to dcs_packet_fifo.o(.bss) for .bss + dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) refers to dcs_packet_fifo.o(.bss) for .bss + dcs_packet_fifo.o(i.dcs_packet_get_fifo_size) refers to dcs_packet_fifo.o(.bss) for .bss + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to hal_internal_vsync.o(i.soft_gen_te) for soft_gen_te + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_param_init.o(i.drv_param_init_get_ccm) for drv_param_init_get_ccm + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_lcdc.o(i.drv_lcdc_config_ccm) for drv_lcdc_config_ccm + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_internal_vsync.o(i.app_VIDC_IRQn_Handler) refers to drv_vidc.o(i.drv_vidc_get_int_source) for drv_vidc_get_int_source + hal_internal_vsync.o(i.app_VIDC_IRQn_Handler) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite) for drv_lcdc_config_overwrite + hal_internal_vsync.o(i.app_VIDC_IRQn_Handler) refers to drv_vidc.o(i.drv_vidc_clear_irq) for drv_vidc_clear_irq + hal_internal_vsync.o(i.app_VIDC_IRQn_Handler) refers to drv_vidc.o(i.drv_vidc_set_irqen) for drv_vidc_set_irqen + hal_internal_vsync.o(i.app_VIDC_IRQn_Handler) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.app_VIDC_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_internal_vsync.o(i.app_VIDC_IRQn_Handler) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.app_VIDC_IRQn_Handler) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.app_VPRE_IRQn_Handler) refers to hal_internal_vsync.o(i.drv_rxbr_get_int_source) for drv_rxbr_get_int_source + hal_internal_vsync.o(i.app_VPRE_IRQn_Handler) refers to hal_internal_vsync.o(i.rx_receive_packet) for rx_receive_packet + hal_internal_vsync.o(i.app_VPRE_IRQn_Handler) refers to drv_rxbr.o(i.drv_rxbr_clear_status) for drv_rxbr_clear_status + hal_internal_vsync.o(i.app_VPRE_IRQn_Handler) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.app_VPRE_IRQn_Handler) refers to hal_internal_vsync.o(i.vpre_err_reset) for vpre_err_reset + hal_internal_vsync.o(i.app_VPRE_IRQn_Handler) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_internal_vsync.o(i.app_VPRE_IRQn_Handler) refers to hal_internal_vsync.o(i.drv_rxbr_get_status) for drv_rxbr_get_status + hal_internal_vsync.o(i.app_VPRE_IRQn_Handler) refers to drv_rxbr.o(i.drv_rxbr_get_cur_hline_rcv_cnt) for drv_rxbr_get_cur_hline_rcv_cnt + hal_internal_vsync.o(i.app_VPRE_IRQn_Handler) refers to drv_rxbr.o(i.drv_rxbr_get_hline_rcv_cfg) for drv_rxbr_get_hline_rcv_cfg + hal_internal_vsync.o(i.app_VPRE_IRQn_Handler) refers to drv_lcdc.o(i.drv_lcdc_update_shadow_reg) for drv_lcdc_update_shadow_reg + hal_internal_vsync.o(i.app_VPRE_IRQn_Handler) refers to drv_lcdc.o(i.drv_lcdc_start) for drv_lcdc_start + hal_internal_vsync.o(i.app_VPRE_IRQn_Handler) refers to drv_memc.o(i.drv_memc_set_data_mode) for drv_memc_set_data_mode + hal_internal_vsync.o(i.app_VPRE_IRQn_Handler) refers to hal_internal_vsync.o(i.rx_partial_update) for rx_partial_update + hal_internal_vsync.o(i.app_VPRE_IRQn_Handler) refers to drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) for drv_rxbr_clear_pkt_buffer + hal_internal_vsync.o(i.app_VPRE_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_internal_vsync.o(i.app_VPRE_IRQn_Handler) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.app_VPRE_IRQn_Handler) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual) for hal_internal_sync_set_fb_setting_manual + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.check_pkt_buf_rev) refers to hal_internal_vsync.o(i.drv_rxbr_get_status) for drv_rxbr_get_status + hal_internal_vsync.o(i.dcs_sw_filter) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_data_mode) for drv_memc_set_data_mode + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_tear_waveform) for drv_memc_set_tear_waveform + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_tear_hwclr) for drv_memc_set_tear_hwclr + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_yuv420_cfg) for drv_memc_set_yuv420_cfg + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_bypass_fifo_empty) for drv_memc_bypass_fifo_empty + hal_internal_vsync.o(i.hal_internal_init_memc) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_init_memc) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(i.calc_framebuffer_setting) for calc_framebuffer_setting + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_vidc.o(i.drv_vidc_reset) for drv_vidc_reset + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) for hal_dsi_rx_ctrl_init + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) for hal_dsi_tx_ctrl_init + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) for hal_dsi_rx_ctrl_start + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_rxbr.o(i.drv_rxbr_clear_status) for drv_rxbr_clear_status + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) for hal_dsi_rx_ctrl_gen_a_tear_signal + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to tau_delay.o(i.delayUs) for delayUs + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_dsi_tx.o(i.drv_dsi_tx_shutdown) for drv_dsi_tx_shutdown + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_crgu.o(i.drv_crgu_config_reset_modules) for drv_crgu_config_reset_modules + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(i.hal_internal_init_memc) for hal_internal_init_memc + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) for hal_dsi_tx_ctrl_start + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_deinit) refers to memseta.o(.text) for __aeabi_memclr4 + hal_internal_vsync.o(i.hal_internal_vsync_deinit) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_get_y2t4_use_sclu) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to drv_chip_info.o(i.drv_chip_rx_info_check) for drv_chip_rx_info_check + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) for check_mipi_rx_tx_video_info + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.calc_framebuffer_setting) for calc_framebuffer_setting + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to dcs_packet_fifo.o(i.dcs_packet_fifo_init) for dcs_packet_fifo_init + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) for check_mipi_rx_tx_video_info + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to hal_internal_vsync.o(i.calc_framebuffer_setting) for calc_framebuffer_setting + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) refers to drv_rxbr.o(i.drv_rxbr_set_cmd_filter) for drv_rxbr_set_cmd_filter + hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_dcs_direct_mode) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) for hal_internal_vsync_set_auto_hw_filter + hal_internal_vsync.o(i.hal_internal_vsync_set_dcs_direct_mode) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) refers to hal_internal_vsync.o(i.hal_internal_vsync_deinit) for hal_internal_vsync_deinit + hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to hal_internal_vsync.o(i.vsync_set_te_mode) for vsync_set_te_mode + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to hal_internal_vsync.o(i.hal_internal_vsync_deinit) for hal_internal_vsync_deinit + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite) for drv_lcdc_config_overwrite + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to hal_internal_vsync.o(i.vsync_set_te_mode) for vsync_set_te_mode + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to hal_internal_vsync.o(i.dcs_sw_filter) for dcs_sw_filter + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) for dcs_packet_fifo_alloc + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) for hal_dsi_rx_ctrl_dsc_async_handler + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_header) for drv_dsi_tx_command_header + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to hal_internal_vsync.o(i.check_pkt_buf_rev) for check_pkt_buf_rev + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) for drv_dsi_tx_command_put_payload + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rx_partial_update) refers to drv_rxbr.o(i.drv_rxbr_get_col_addr) for drv_rxbr_get_col_addr + hal_internal_vsync.o(i.rx_partial_update) refers to drv_rxbr.o(i.drv_rxbr_get_page_addr) for drv_rxbr_get_page_addr + hal_internal_vsync.o(i.rx_partial_update) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.rx_partial_update) refers to drv_dsc_dec.o(i.drv_dsc_dec_get_nslc) for drv_dsc_dec_get_nslc + hal_internal_vsync.o(i.rx_partial_update) refers to drv_crgu.o(i.drv_crgu_set_dsco_src) for drv_crgu_set_dsco_src + hal_internal_vsync.o(i.rx_partial_update) refers to drv_crgu.o(i.drv_crgu_set_dsco_src_div) for drv_crgu_set_dsco_src_div + hal_internal_vsync.o(i.rx_partial_update) refers to drv_crgu.o(i.drv_crgu_set_dsc_core_div) for drv_crgu_set_dsc_core_div + hal_internal_vsync.o(i.rx_partial_update) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rx_receive_packet) refers to hal_internal_vsync.o(i.rx_get_dcs_packet_data) for rx_get_dcs_packet_data + hal_internal_vsync.o(i.rx_receive_packet) refers to hal_internal_vsync.o(i.rx_receive_pps) for rx_receive_pps + hal_internal_vsync.o(i.rx_receive_packet) refers to hal_internal_vsync.o(i.drv_rxbr_get_status) for drv_rxbr_get_status + hal_internal_vsync.o(i.rx_receive_packet) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rx_receive_pps) refers to memseta.o(.text) for __aeabi_memclr4 + hal_internal_vsync.o(i.rx_receive_pps) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.rx_receive_pps) refers to drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) for drv_rxbr_clear_pkt_buffer + hal_internal_vsync.o(i.rx_receive_pps) refers to hal_internal_vsync.o(i.check_pkt_buf_rev) for check_pkt_buf_rev + hal_internal_vsync.o(i.rx_receive_pps) refers to drv_dsc_dec.o(i.drv_dsc_dec_convert_pps_rc_parameter) for drv_dsc_dec_convert_pps_rc_parameter + hal_internal_vsync.o(i.rx_receive_pps) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.rx_receive_pps) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) for drv_dsi_rx_get_compression_en + hal_internal_vsync.o(i.rx_receive_pps) refers to drv_dsc_dec.o(i.drv_dsc_dec_enable) for drv_dsc_dec_enable + hal_internal_vsync.o(i.rx_receive_pps) refers to drv_dsc_dec.o(i.drv_dsc_dec_set_u8_pps) for drv_dsc_dec_set_u8_pps + hal_internal_vsync.o(i.rx_receive_pps) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.rx_receive_pps) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.soft_gen_te) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.soft_gen_te) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.vpre_err_reset) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_internal_vsync.o(i.vpre_err_reset) refers to drv_vidc.o(i.drv_vidc_reset) for drv_vidc_reset + hal_internal_vsync.o(i.vpre_err_reset) refers to drv_dsc_dec.o(i.drv_dsc_dec_set_u8_pps) for drv_dsc_dec_set_u8_pps + hal_internal_vsync.o(i.vpre_err_reset) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.vsync_set_te_mode) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_internal_vsync.o(i.vsync_set_te_mode) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_internal_vsync.o(i.vsync_set_te_mode) refers to drv_lcdc.o(i.drv_lcdc_ctrl_flow) for drv_lcdc_ctrl_flow + hal_internal_vsync.o(i.vsync_set_te_mode) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.vsync_set_te_mode) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.vsync_set_te_mode) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.vsync_set_te_mode) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(.data) refers to hal_internal_vsync.o(.bss) for sg_te_info + drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to ffltui.o(.text) for __aeabi_ui2f + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to fdiv.o(.text) for __aeabi_fdiv + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to fmul.o(.text) for __aeabi_fmul + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) for drv_dsi_rx_get_color_bpp + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_color_pcc) for drv_dsi_rx_get_color_pcc + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to fadd.o(.text) for __aeabi_fadd + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to cfrcmple.o(.text) for __aeabi_cfrcmple + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to f2d.o(.text) for __aeabi_f2d + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to dadd.o(.text) for __aeabi_dadd + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to dfixui.o(.text) for __aeabi_d2uiz + drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) refers to ap_demo.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_dsi_rx.o(i.drv_dsi_rx_get_phy_stopstate) refers to ap_demo.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_dsi_rx.o(i.drv_dsi_rx_phy_resistor_calibration) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_dsi_rx.o(i.drv_dsi_rx_phy_resistor_calibration) refers to drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) for drv_rx_phy_test_write_1_byte + drv_dsi_rx.o(i.drv_dsi_rx_phy_resistor_calibration) refers to drv_dsi_rx.o(i.drv_rx_phy_test_read) for drv_rx_phy_test_read + drv_dsi_rx.o(i.drv_dsi_rx_phy_resistor_calibration) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_phy_common.o(i.drv_phy_get_rate_para) for drv_phy_get_rate_para + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_dsi_rx.o(i.drv_rx_phy_test_clear) for drv_rx_phy_test_clear + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) for drv_rx_phy_test_write_1_byte + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_dsi_rx.o(i.drv_rx_phy_test_write_2_byte) for drv_rx_phy_test_write_2_byte + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_dsi_rx.o(i.drv_rx_phy_test_lock) for drv_rx_phy_test_lock + drv_dsi_rx.o(i.drv_rx_phy_test_clear) refers to drv_phy_common.o(i.drv_phy_test_clear) for drv_phy_test_clear + drv_dsi_rx.o(i.drv_rx_phy_test_lock) refers to drv_phy_common.o(i.drv_phy_test_lock) for drv_phy_test_lock + drv_dsi_rx.o(i.drv_rx_phy_test_read) refers to drv_phy_common.o(i.drv_phy_test_read) for drv_phy_test_read + drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) refers to drv_phy_common.o(i.drv_phy_test_write_1_byte) for drv_phy_test_write_1_byte + drv_dsi_rx.o(i.drv_rx_phy_test_write_2_byte) refers to drv_phy_common.o(i.drv_phy_test_write_2_byte) for drv_phy_test_write_2_byte + drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dsi_tx.o(i.drv_dsi_tx_phy_resistor_calibration) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_dsi_tx.o(i.drv_dsi_tx_phy_resistor_calibration) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) for drv_tx_phy_test_write_1_byte + drv_dsi_tx.o(i.drv_dsi_tx_phy_resistor_calibration) refers to drv_dsi_tx.o(i.drv_tx_phy_test_read) for drv_tx_phy_test_read + drv_dsi_tx.o(i.drv_dsi_tx_phy_resistor_calibration) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) refers to ap_demo.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ulpsactivenot) refers to ap_demo.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_phy_common.o(i.drv_phy_get_rate_para) for drv_phy_get_rate_para + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_phy_common.o(i.drv_phy_get_pll_para) for drv_phy_get_pll_para + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_enter) for drv_tx_phy_test_enter + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_crgu.o(i.drv_crgu_set_mipi_ref_src) for drv_crgu_set_mipi_ref_src + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_crgu.o(i.drv_crgu_set_mipi_cfg_src) for drv_crgu_set_mipi_cfg_src + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_clear) for drv_tx_phy_test_clear + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) for drv_tx_phy_test_write_1_byte + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_2_byte) for drv_tx_phy_test_write_2_byte + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_code) for drv_tx_phy_test_write_code + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_exit) for drv_tx_phy_test_exit + drv_dsi_tx.o(i.drv_dsi_tx_phy_trigger) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) for drv_dsi_tx_phy_status_stopstate + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) for drv_dsi_tx_phy_status_stopstate + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_pll_lock) for drv_dsi_tx_phy_status_pll_lock + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ulpsactivenot) for drv_dsi_tx_phy_status_ulpsactivenot + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ulpsactivenot) for drv_dsi_tx_phy_status_ulpsactivenot + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) for drv_tx_phy_test_write_1_byte + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_pll_lock) for drv_dsi_tx_phy_status_pll_lock + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to drv_dsi_tx.o(i.drv_dsi_tx_version) for drv_dsi_tx_version + drv_dsi_tx.o(i.drv_dsi_tx_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_dsi_tx.o(i.drv_tx_phy_test_clear) refers to drv_phy_common.o(i.drv_phy_test_clear) for drv_phy_test_clear + drv_dsi_tx.o(i.drv_tx_phy_test_read) refers to drv_phy_common.o(i.drv_phy_test_read) for drv_phy_test_read + drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) refers to drv_phy_common.o(i.drv_phy_test_write_1_byte) for drv_phy_test_write_1_byte + drv_dsi_tx.o(i.drv_tx_phy_test_write_2_byte) refers to drv_phy_common.o(i.drv_phy_test_write_2_byte) for drv_phy_test_write_2_byte + drv_dsi_tx.o(i.drv_tx_phy_test_write_code) refers to drv_phy_common.o(i.drv_phy_test_write_code) for drv_phy_test_write_code + drv_lcdc.o(i.drv_lcdc_config_src_parameter) refers to drv_lcdc.o(i.drv_lcdc_config_input_size) for drv_lcdc_config_input_size + drv_lcdc.o(i.drv_lcdc_config_upscaler) refers to drv_param_init.o(i.drv_param_init_get_sclu_filter_h) for drv_param_init_get_sclu_filter_h + drv_lcdc.o(i.drv_lcdc_config_upscaler) refers to drv_param_init.o(i.drv_param_init_get_sclu_filter_v) for drv_param_init_get_sclu_filter_v + drv_lcdc.o(i.drv_lcdc_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_memc.o(i.app_MEMC_IRQn_Handler) refers to drv_memc.o(i.drv_memc_get_status) for drv_memc_get_status + drv_memc.o(i.app_MEMC_IRQn_Handler) refers to drv_memc.o(i.drv_memc_clear_status) for drv_memc_clear_status + drv_memc.o(i.app_MEMC_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_memc.o(i.drv_memc_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_memc.o(i.drv_memc_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_phy_common.o(i.drv_phy_get_pll_para) refers to drv_phy_common.o(.constdata) for .constdata + drv_phy_common.o(i.drv_phy_get_rate_para) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_phy_common.o(i.drv_phy_get_rate_para) refers to drv_phy_common.o(.constdata) for .constdata + drv_phy_common.o(i.drv_phy_test_write_1_byte) refers to drv_phy_common.o(i.drv_phy_test_write_code) for drv_phy_test_write_code + drv_phy_common.o(i.drv_phy_test_write_1_byte) refers to drv_phy_common.o(i.drv_phy_test_write_data) for drv_phy_test_write_data + drv_phy_common.o(i.drv_phy_test_write_2_byte) refers to drv_phy_common.o(i.drv_phy_test_write_code) for drv_phy_test_write_code + drv_phy_common.o(i.drv_phy_test_write_2_byte) refers to drv_phy_common.o(i.drv_phy_test_write_data) for drv_phy_test_write_data + drv_rxbr.o(i.drv_rxbr_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_rxbr.o(i.drv_rxbr_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_rxbr.o(i.drv_rxbr_err_reset) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + drv_rxbr.o(i.drv_rxbr_set_cmd_filter) refers to ap_demo.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_vidc.o(i.drv_vidc_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_vidc.o(i.drv_vidc_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_vidc.o(i.drv_vidc_set_parameter) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_vidc.o(i.drv_vidc_set_parameter) refers to drv_vidc.o(.conststring) for .conststring + irq_redirect .o(i.ADC_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.AP_NRESET_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.DMA_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT0_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT1_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT2_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT3_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT4_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT5_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT6_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT7_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.FLSCTRL_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.HardFault_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.I2C0_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.I2C1_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.LCDC_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.MEMC_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.MIPI_RX_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.MIPI_TX_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.PWMDET_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.SPIM_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.SPIS_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.SWIRE_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.SysTick_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.TIMER0_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.TIMER1_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.TIMER2_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.TIMER3_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.UART_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.VIDC_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.VPRE_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.WDG_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.handle_init) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.handle_init) refers to drv_common.o(i.app_SysTick_Handler) for app_SysTick_Handler + irq_redirect .o(i.handle_init) refers to hal_internal_vsync.o(i.app_VIDC_IRQn_Handler) for app_VIDC_IRQn_Handler + irq_redirect .o(i.handle_init) refers to hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) for app_LCDC_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) for app_MIPI_RX_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) for app_MIPI_TX_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_memc.o(i.app_MEMC_IRQn_Handler) for app_MEMC_IRQn_Handler + irq_redirect .o(i.handle_init) refers to hal_internal_vsync.o(i.app_VPRE_IRQn_Handler) for app_VPRE_IRQn_Handler + irq_redirect .o(i.handle_init) refers to norflash.o(i.app_fls_ctrl_Handler) for app_fls_ctrl_Handler + irq_redirect .o(i.handle_init) refers to drv_dma.o(i.app_dma_irq_handler) for app_dma_irq_handler + irq_redirect .o(i.handle_init) refers to drv_timer.o(i.app_TIMER0_IRQn_Handler) for app_TIMER0_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_timer.o(i.app_TIMER1_IRQn_Handler) for app_TIMER1_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_timer.o(i.app_TIMER2_IRQn_Handler) for app_TIMER2_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_timer.o(i.app_TIMER3_IRQn_Handler) for app_TIMER3_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_wdg.o(i.app_WDG_IRQn_Handler) for app_WDG_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_uart.o(i.app_UART_IRQn_Handler) for app_UART_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_i2c_slave.o(i.app_I2C0_IRQn_Handler) for app_I2C0_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_i2c_master.o(i.app_I2C1_IRQn_Handler) for app_I2C1_IRQn_Handler + irq_redirect .o(i.handle_init) refers to hal_spi_slave.o(i.app_SPIS_IRQn_Handler) for app_SPIS_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_spi_master.o(i.app_SPIM_IRQn_Handler) for app_SPIM_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_pwm.o(i.app_PWMDET_IRQn_Handler) for app_PWMDET_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_swire.o(i.app_SWIRE_IRQn_Handler) for app_SWIRE_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) for app_AP_NRESET_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) for app_EXTI_INT0_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) for app_EXTI_INT1_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) for app_EXTI_INT2_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) for app_EXTI_INT3_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) for app_EXTI_INT4_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) for app_EXTI_INT5_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) for app_EXTI_INT6_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) for app_EXTI_INT7_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_common.o(i.app_HardFault_Handler) for app_HardFault_Handler + drv_chip_info.o(i.drv_chip_info_get_version) refers to drv_chip_info.o(.data) for .data + drv_chip_info.o(i.drv_chip_info_init) refers to drv_chip_info.o(.data) for .data + drv_chip_info.o(i.drv_chip_rx_info_check) refers to printfa.o(i.__0printf) for __2printf + drv_chip_info.o(i.drv_chip_rx_info_check) refers to drv_chip_info.o(.data) for .data + drv_dsc_dec.o(i.drv_dsc_dec_enable) refers to drv_chip_info.o(i.drv_chip_info_get_version) for drv_chip_info_get_version + drv_dsc_dec.o(i.drv_dsc_dec_enable) refers to printfa.o(i.__0printf) for __2printf + hal_spi_slave.o(i.app_SPIS_IRQn_Handler) refers to ap_demo.o(i.__ARM_common_switch8) for __ARM_common_switch8 + hal_spi_slave.o(i.app_SPIS_IRQn_Handler) refers to hal_spi_slave.o(i.__NVIC_SetPriority) for __NVIC_SetPriority + hal_spi_slave.o(i.app_SPIS_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_spi_slave.o(i.app_SPIS_IRQn_Handler) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_s_set_high_impedance) refers to drv_spi_slave.o(i.drv_spi_s_enable) for drv_spi_s_enable + hal_spi_slave.o(i.hal_spi_s_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_spi_slave.o(i.hal_spi_s_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_init_input) for hal_gpio_init_input + hal_spi_slave.o(i.hal_spi_s_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + hal_spi_slave.o(i.hal_spi_slave_auto_transfer_abort) refers to drv_spi_dma.o(i.drv_spi_abort_dma) for drv_spi_abort_dma + hal_spi_slave.o(i.hal_spi_slave_auto_transfer_start) refers to drv_dma.o(i.drv_dma_enable_cycle) for drv_dma_enable_cycle + hal_spi_slave.o(i.hal_spi_slave_auto_transfer_start) refers to drv_spi_dma.o(i.drv_spis_dma_write) for drv_spis_dma_write + hal_spi_slave.o(i.hal_spi_slave_auto_transfer_start) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_deinit) refers to drv_spi_slave.o(i.drv_spi_s_deinit) for drv_spi_s_deinit + hal_spi_slave.o(i.hal_spi_slave_disable) refers to drv_spi_slave.o(i.drv_spi_s_enable) for drv_spi_s_enable + hal_spi_slave.o(i.hal_spi_slave_enable) refers to drv_spi_slave.o(i.drv_spi_s_enable_int) for drv_spi_s_enable_int + hal_spi_slave.o(i.hal_spi_slave_enable) refers to drv_spi_slave.o(i.drv_spi_s_enable) for drv_spi_s_enable + hal_spi_slave.o(i.hal_spi_slave_enable) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_spi_slave.o(i.hal_spi_slave_enable) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_gpio_init) refers to drv_spi_slave.o(i.drv_spi_s_gpio_init) for drv_spi_s_gpio_init + hal_spi_slave.o(i.hal_spi_slave_init) refers to hal_spi_slave.o(i.hal_spi_slave_gpio_init) for hal_spi_slave_gpio_init + hal_spi_slave.o(i.hal_spi_slave_init) refers to drv_spi_slave.o(i.drv_spi_slave_init) for drv_spi_slave_init + hal_spi_slave.o(i.hal_spi_slave_init) refers to drv_spi_dma.o(i.drv_spi_dma_init) for drv_spi_dma_init + hal_spi_slave.o(i.hal_spi_slave_init) refers to drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) for drv_spi_set_dma_irq_callback + hal_spi_slave.o(i.hal_spi_slave_init) refers to drv_spi_slave.o(i.drv_spi_s_enable_tx_dma) for drv_spi_s_enable_tx_dma + hal_spi_slave.o(i.hal_spi_slave_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) for drv_sys_cfg_set_dma_tx_req + hal_spi_slave.o(i.hal_spi_slave_init) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_register_callback) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_reset_tx) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_set_auto_rx_buffer) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_set_auto_tx_buffer) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_write_data) refers to drv_spi_slave.o(i.drv_spi_s_write_data) for drv_spi_s_write_data + drv_fls_dma.o(i.fls_abort_dma) refers to drv_dma.o(i.drv_dma_abort_transfer) for drv_dma_abort_transfer + drv_fls_dma.o(i.fls_abort_dma) refers to drv_fls_dma.o(i.fls_dma_disable) for fls_dma_disable + drv_fls_dma.o(i.fls_dma_read_prepare) refers to drv_fls_dma.o(i.fls_dma_rw_prepare) for fls_dma_rw_prepare + drv_fls_dma.o(i.fls_dma_rw_prepare) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls_dma.o(i.fls_dma_rw_prepare) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls_dma.o(i.fls_dma_rw_prepare) refers to drv_fls.o(i.fls_set_write) for fls_set_write + drv_fls_dma.o(i.fls_dma_rw_prepare) refers to drv_fls.o(i.fls_set_read) for fls_set_read + drv_fls_dma.o(i.fls_dma_rw_prepare) refers to drv_fls_dma.o(i.fls_dma_enable) for fls_dma_enable + drv_fls_dma.o(i.fls_dma_rw_prepare) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls_dma.o(i.fls_dma_write_prepare) refers to drv_fls_dma.o(i.fls_dma_rw_prepare) for fls_dma_rw_prepare + drv_fls_dma.o(i.fls_read_dmacallback) refers to drv_dma.o(i.drv_dma_abort_transfer) for drv_dma_abort_transfer + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to memseta.o(.text) for __aeabi_memclr4 + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to drv_dma.o(i.drv_dma_init) for drv_dma_init + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to drv_dma.o(i.drv_dma_set_callback) for drv_dma_set_callback + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to drv_fls_dma.o(.data) for .data + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to drv_fls_dma.o(i.fls_read_dmacallback) for fls_read_dmacallback + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to drv_fls_dma.o(i.fls_write_dmacallback) for fls_write_dmacallback + drv_fls_dma.o(i.fls_transfer_dma) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_fls_dma.o(i.fls_transfer_dma) refers to drv_dma.o(i.drv_dma_start_transfer) for drv_dma_start_transfer + drv_fls_dma.o(i.fls_transfer_get_receive_count_dma) refers to drv_dma.o(i.drv_dma_get_remaining_bytes) for drv_dma_get_remaining_bytes + drv_fls_dma.o(i.fls_write_dmacallback) refers to drv_dma.o(i.drv_dma_abort_transfer) for drv_dma_abort_transfer + drv_pwm.o(i.app_PWMDET_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_pwm.o(i.app_PWMDET_IRQn_Handler) refers to drv_pwm.o(.data) for .data + drv_pwm.o(i.drv_pwm_in_register_callback) refers to drv_pwm.o(.data) for .data + drv_pwm.o(i.drv_pwm_in_set_sys_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_uart.o(i.UART_AbortReceive) refers to drv_uart.o(i.UART_Disable_IT) for UART_Disable_IT + drv_uart.o(i.UART_AbortReceive) refers to drv_uart.o(i.UART_ResetRxFIFO) for UART_ResetRxFIFO + drv_uart.o(i.UART_AbortSend) refers to drv_uart.o(i.UART_Disable_IT) for UART_Disable_IT + drv_uart.o(i.UART_AbortSend) refers to drv_uart.o(i.UART_ResetTxFIFO) for UART_ResetTxFIFO + drv_uart.o(i.UART_Deinit) refers to drv_uart.o(i.UART_SwitchSCLK) for UART_SwitchSCLK + drv_uart.o(i.UART_Disable_IT) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_Disable_IT) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_uart.o(i.UART_Disable_IT) refers to drv_uart.o(.constdata) for .constdata + drv_uart.o(i.UART_EnableDma) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) for drv_sys_cfg_set_dma_rx_req + drv_uart.o(i.UART_EnableDma) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) for drv_sys_cfg_set_dma_tx_req + drv_uart.o(i.UART_Enable_IT) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_Enable_IT) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_uart.o(i.UART_GetDefaultConfig) refers to memseta.o(.text) for __aeabi_memclr4 + drv_uart.o(i.UART_GetDefaultConfig) refers to drv_common.o(.data) for g_system_clock + drv_uart.o(i.UART_GetFIFO_Ctrl) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_GetFIFO_Ctrl) refers to drv_uart.o(.data) for .data + drv_uart.o(i.UART_IRQ_Handle) refers to drv_uart.o(i.UART_TransferHandleIRQ) for UART_TransferHandleIRQ + drv_uart.o(i.UART_IRQ_Handle) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_uart.o(i.UART_IRQ_Handle) refers to drv_uart.o(.data) for .data + drv_uart.o(i.UART_ResetRxFIFO) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_ResetRxFIFO) refers to drv_uart.o(.data) for .data + drv_uart.o(i.UART_ResetTxFIFO) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_ResetTxFIFO) refers to drv_uart.o(.data) for .data + drv_uart.o(i.UART_SetBaudRate) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_uart.o(i.UART_SwitchSCLK) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_uart.o(i.UART_TransferCreateHandle) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_TransferCreateHandle) refers to memseta.o(.text) for __aeabi_memclr4 + drv_uart.o(i.UART_TransferCreateHandle) refers to drv_uart.o(i.UART_Enable_IT) for UART_Enable_IT + drv_uart.o(i.UART_TransferCreateHandle) refers to drv_uart.o(.data) for .data + drv_uart.o(i.UART_TransferHandleIRQ) refers to drv_uart.o(i.UART_ResetRxFIFO) for UART_ResetRxFIFO + drv_uart.o(i.UART_init) refers to drv_uart.o(i.UART_DisableDma) for UART_DisableDma + drv_uart.o(i.UART_init) refers to drv_uart.o(i.UART_SwitchSCLK) for UART_SwitchSCLK + drv_uart.o(i.UART_init) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_init) refers to drv_uart.o(i.UART_SetBaudRate) for UART_SetBaudRate + drv_uart.o(i.UART_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_uart.o(i.UART_init) refers to drv_uart.o(.data) for .data + drv_uart.o(i.app_UART_IRQn_Handler) refers to drv_uart.o(i.UART_IRQ_Handle) for UART_IRQ_Handle + drv_uart_dma.o(i.UART_DMAInit) refers to memseta.o(.text) for __aeabi_memclr4 + drv_uart_dma.o(i.UART_DMAInit) refers to drv_dma.o(i.drv_dma_init) for drv_dma_init + drv_uart_dma.o(i.UART_TransferAbortReceiveDMA) refers to drv_dma.o(i.drv_dma_abort_transfer) for drv_dma_abort_transfer + drv_uart_dma.o(i.UART_TransferAbortSendDMA) refers to drv_dma.o(i.drv_dma_abort_transfer) for drv_dma_abort_transfer + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to memseta.o(.text) for __aeabi_memclr4 + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart.o(i.UART_EnableDma) for UART_EnableDma + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart_dma.o(i.UART_DMAInit) for UART_DMAInit + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_dma.o(i.drv_dma_set_callback) for drv_dma_set_callback + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart_dma.o(.data) for .data + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart_dma.o(i.UART_TransferReceiveDMACallback) for UART_TransferReceiveDMACallback + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart_dma.o(i.UART_TransferSendDMACallback) for UART_TransferSendDMACallback + drv_uart_dma.o(i.UART_TransferGetReceiveCountDMA) refers to drv_dma.o(i.drv_dma_get_remaining_bytes) for drv_dma_get_remaining_bytes + drv_uart_dma.o(i.UART_TransferReceiveDMA) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_uart_dma.o(i.UART_TransferReceiveDMA) refers to drv_uart.o(i.UART_EnableDma) for UART_EnableDma + drv_uart_dma.o(i.UART_TransferReceiveDMA) refers to drv_dma.o(i.drv_dma_start_transfer) for drv_dma_start_transfer + drv_uart_dma.o(i.UART_TransferSendDMA) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_uart_dma.o(i.UART_TransferSendDMA) refers to drv_uart.o(i.UART_EnableDma) for UART_EnableDma + drv_uart_dma.o(i.UART_TransferSendDMA) refers to drv_dma.o(i.drv_dma_start_transfer) for drv_dma_start_transfer + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_wdg.o(i.drv_wdg_set_int) for drv_wdg_set_int + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_wdg.o(i.drv_wdg_clear_counter) for drv_wdg_clear_counter + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_wdg.o(i.drv_wdg_read_edge_flag) for drv_wdg_read_edge_flag + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_wdg.o(i.drv_wdg_clear_edge_flag) for drv_wdg_clear_edge_flag + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_wdg.o(.data) for .data + drv_wdg.o(i.drv_wdg_register_callback) refers to drv_wdg.o(.data) for .data + drv_wdg.o(i.drv_wdg_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_wdg.o(i.drv_wdg_set_repeat) refers to drv_wdg.o(.data) for .data + drv_spi_slave.o(i.drv_spi_s_disable_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_spi_slave.o(i.drv_spi_s_disable_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_spi_slave.o(i.drv_spi_s_enable_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_spi_slave.o(i.drv_spi_s_set_intr_callback) refers to drv_spi_slave.o(.data) for .data + ceil.o(i.__softfp_ceil) refers (Special) to iusefp.o(.text) for __I$use$fp + ceil.o(i.__softfp_ceil) refers to ceil.o(i.ceil) for ceil + ceil.o(i.ceil) refers (Special) to iusefp.o(.text) for __I$use$fp + ceil.o(i.ceil) refers to dadd.o(.text) for __aeabi_dadd + ceil.o(i.ceil) refers to cdrcmple.o(.text) for __aeabi_cdrcmple + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry10a.o(.ARM.Collect$$$$0000000D) for __rt_final_cpp + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry11a.o(.ARM.Collect$$$$0000000F) for __rt_final_exit + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry7b.o(.ARM.Collect$$$$00000008) for _main_clock + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry8b.o(.ARM.Collect$$$$0000000A) for _main_cpp_init + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry9a.o(.ARM.Collect$$$$0000000B) for _main_init + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry5.o(.ARM.Collect$$$$00000004) for _main_scatterload + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry2.o(.ARM.Collect$$$$00000001) for _main_stk + idiv.o(.text) refers to uidiv.o(.text) for __aeabi_uidivmod + printfb.o(i.__0fprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0fprintf$bare) refers to tau_log.o(i.fputc) for fputc + printfb.o(i.__0printf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0printf$bare) refers to tau_log.o(i.fputc) for fputc + printfb.o(i.__0printf$bare) refers to stdout.o(.data) for __stdout + printfb.o(i.__0snprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0snprintf$bare) refers to printfb.o(i._snputc) for _snputc + printfb.o(i.__0sprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0sprintf$bare) refers to printfb.o(i._sputc) for _sputc + printfb.o(i.__0vfprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vfprintf$bare) refers to tau_log.o(i.fputc) for fputc + printfb.o(i.__0vprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vprintf$bare) refers to tau_log.o(i.fputc) for fputc + printfb.o(i.__0vprintf$bare) refers to stdout.o(.data) for __stdout + printfb.o(i.__0vsnprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vsnprintf$bare) refers to printfb.o(i._snputc) for _snputc + printfb.o(i.__0vsprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vsprintf$bare) refers to printfb.o(i._sputc) for _sputc + printf0.o(i.__0fprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0fprintf$0) refers to tau_log.o(i.fputc) for fputc + printf0.o(i.__0printf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0printf$0) refers to tau_log.o(i.fputc) for fputc + printf0.o(i.__0printf$0) refers to stdout.o(.data) for __stdout + printf0.o(i.__0snprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0snprintf$0) refers to printf0.o(i._snputc) for _snputc + printf0.o(i.__0sprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0sprintf$0) refers to printf0.o(i._sputc) for _sputc + printf0.o(i.__0vfprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vfprintf$0) refers to tau_log.o(i.fputc) for fputc + printf0.o(i.__0vprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vprintf$0) refers to tau_log.o(i.fputc) for fputc + printf0.o(i.__0vprintf$0) refers to stdout.o(.data) for __stdout + printf0.o(i.__0vsnprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vsnprintf$0) refers to printf0.o(i._snputc) for _snputc + printf0.o(i.__0vsprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vsprintf$0) refers to printf0.o(i._sputc) for _sputc + printf1.o(i.__0fprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0fprintf$1) refers to tau_log.o(i.fputc) for fputc + printf1.o(i.__0printf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0printf$1) refers to tau_log.o(i.fputc) for fputc + printf1.o(i.__0printf$1) refers to stdout.o(.data) for __stdout + printf1.o(i.__0snprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0snprintf$1) refers to printf1.o(i._snputc) for _snputc + printf1.o(i.__0sprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0sprintf$1) refers to printf1.o(i._sputc) for _sputc + printf1.o(i.__0vfprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vfprintf$1) refers to tau_log.o(i.fputc) for fputc + printf1.o(i.__0vprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vprintf$1) refers to tau_log.o(i.fputc) for fputc + printf1.o(i.__0vprintf$1) refers to stdout.o(.data) for __stdout + printf1.o(i.__0vsnprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vsnprintf$1) refers to printf1.o(i._snputc) for _snputc + printf1.o(i.__0vsprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vsprintf$1) refers to printf1.o(i._sputc) for _sputc + printf1.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printf2.o(i.__0fprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0fprintf$2) refers to tau_log.o(i.fputc) for fputc + printf2.o(i.__0printf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0printf$2) refers to tau_log.o(i.fputc) for fputc + printf2.o(i.__0printf$2) refers to stdout.o(.data) for __stdout + printf2.o(i.__0snprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0snprintf$2) refers to printf2.o(i._snputc) for _snputc + printf2.o(i.__0sprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0sprintf$2) refers to printf2.o(i._sputc) for _sputc + printf2.o(i.__0vfprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vfprintf$2) refers to tau_log.o(i.fputc) for fputc + printf2.o(i.__0vprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vprintf$2) refers to tau_log.o(i.fputc) for fputc + printf2.o(i.__0vprintf$2) refers to stdout.o(.data) for __stdout + printf2.o(i.__0vsnprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vsnprintf$2) refers to printf2.o(i._snputc) for _snputc + printf2.o(i.__0vsprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vsprintf$2) refers to printf2.o(i._sputc) for _sputc + printf3.o(i.__0fprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0fprintf$3) refers to tau_log.o(i.fputc) for fputc + printf3.o(i.__0printf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0printf$3) refers to tau_log.o(i.fputc) for fputc + printf3.o(i.__0printf$3) refers to stdout.o(.data) for __stdout + printf3.o(i.__0snprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0snprintf$3) refers to printf3.o(i._snputc) for _snputc + printf3.o(i.__0sprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0sprintf$3) refers to printf3.o(i._sputc) for _sputc + printf3.o(i.__0vfprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vfprintf$3) refers to tau_log.o(i.fputc) for fputc + printf3.o(i.__0vprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vprintf$3) refers to tau_log.o(i.fputc) for fputc + printf3.o(i.__0vprintf$3) refers to stdout.o(.data) for __stdout + printf3.o(i.__0vsnprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vsnprintf$3) refers to printf3.o(i._snputc) for _snputc + printf3.o(i.__0vsprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vsprintf$3) refers to printf3.o(i._sputc) for _sputc + printf3.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printf4.o(i.__0fprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0fprintf$4) refers to tau_log.o(i.fputc) for fputc + printf4.o(i.__0printf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0printf$4) refers to tau_log.o(i.fputc) for fputc + printf4.o(i.__0printf$4) refers to stdout.o(.data) for __stdout + printf4.o(i.__0snprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0snprintf$4) refers to printf4.o(i._snputc) for _snputc + printf4.o(i.__0sprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0sprintf$4) refers to printf4.o(i._sputc) for _sputc + printf4.o(i.__0vfprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vfprintf$4) refers to tau_log.o(i.fputc) for fputc + printf4.o(i.__0vprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vprintf$4) refers to tau_log.o(i.fputc) for fputc + printf4.o(i.__0vprintf$4) refers to stdout.o(.data) for __stdout + printf4.o(i.__0vsnprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vsnprintf$4) refers to printf4.o(i._snputc) for _snputc + printf4.o(i.__0vsprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vsprintf$4) refers to printf4.o(i._sputc) for _sputc + printf4.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printf5.o(i.__0fprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0fprintf$5) refers to tau_log.o(i.fputc) for fputc + printf5.o(i.__0printf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0printf$5) refers to tau_log.o(i.fputc) for fputc + printf5.o(i.__0printf$5) refers to stdout.o(.data) for __stdout + printf5.o(i.__0snprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0snprintf$5) refers to printf5.o(i._snputc) for _snputc + printf5.o(i.__0sprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0sprintf$5) refers to printf5.o(i._sputc) for _sputc + printf5.o(i.__0vfprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vfprintf$5) refers to tau_log.o(i.fputc) for fputc + printf5.o(i.__0vprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vprintf$5) refers to tau_log.o(i.fputc) for fputc + printf5.o(i.__0vprintf$5) refers to stdout.o(.data) for __stdout + printf5.o(i.__0vsnprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vsnprintf$5) refers to printf5.o(i._snputc) for _snputc + printf5.o(i.__0vsprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vsprintf$5) refers to printf5.o(i._sputc) for _sputc + printf5.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printf6.o(i.__0fprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0fprintf$6) refers to tau_log.o(i.fputc) for fputc + printf6.o(i.__0printf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0printf$6) refers to tau_log.o(i.fputc) for fputc + printf6.o(i.__0printf$6) refers to stdout.o(.data) for __stdout + printf6.o(i.__0snprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0snprintf$6) refers to printf6.o(i._snputc) for _snputc + printf6.o(i.__0sprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0sprintf$6) refers to printf6.o(i._sputc) for _sputc + printf6.o(i.__0vfprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vfprintf$6) refers to tau_log.o(i.fputc) for fputc + printf6.o(i.__0vprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vprintf$6) refers to tau_log.o(i.fputc) for fputc + printf6.o(i.__0vprintf$6) refers to stdout.o(.data) for __stdout + printf6.o(i.__0vsnprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vsnprintf$6) refers to printf6.o(i._snputc) for _snputc + printf6.o(i.__0vsprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vsprintf$6) refers to printf6.o(i._sputc) for _sputc + printf6.o(i._printf_core) refers to printf6.o(i._printf_pre_padding) for _printf_pre_padding + printf6.o(i._printf_core) refers to printf6.o(i._printf_post_padding) for _printf_post_padding + printf6.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printf7.o(i.__0fprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0fprintf$7) refers to tau_log.o(i.fputc) for fputc + printf7.o(i.__0printf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0printf$7) refers to tau_log.o(i.fputc) for fputc + printf7.o(i.__0printf$7) refers to stdout.o(.data) for __stdout + printf7.o(i.__0snprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0snprintf$7) refers to printf7.o(i._snputc) for _snputc + printf7.o(i.__0sprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0sprintf$7) refers to printf7.o(i._sputc) for _sputc + printf7.o(i.__0vfprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vfprintf$7) refers to tau_log.o(i.fputc) for fputc + printf7.o(i.__0vprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vprintf$7) refers to tau_log.o(i.fputc) for fputc + printf7.o(i.__0vprintf$7) refers to stdout.o(.data) for __stdout + printf7.o(i.__0vsnprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vsnprintf$7) refers to printf7.o(i._snputc) for _snputc + printf7.o(i.__0vsprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vsprintf$7) refers to printf7.o(i._sputc) for _sputc + printf7.o(i._printf_core) refers to printf7.o(i._printf_pre_padding) for _printf_pre_padding + printf7.o(i._printf_core) refers to printf7.o(i._printf_post_padding) for _printf_post_padding + printf7.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printf8.o(i.__0fprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0fprintf$8) refers to tau_log.o(i.fputc) for fputc + printf8.o(i.__0printf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0printf$8) refers to tau_log.o(i.fputc) for fputc + printf8.o(i.__0printf$8) refers to stdout.o(.data) for __stdout + printf8.o(i.__0snprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0snprintf$8) refers to printf8.o(i._snputc) for _snputc + printf8.o(i.__0sprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0sprintf$8) refers to printf8.o(i._sputc) for _sputc + printf8.o(i.__0vfprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vfprintf$8) refers to tau_log.o(i.fputc) for fputc + printf8.o(i.__0vprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vprintf$8) refers to tau_log.o(i.fputc) for fputc + printf8.o(i.__0vprintf$8) refers to stdout.o(.data) for __stdout + printf8.o(i.__0vsnprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vsnprintf$8) refers to printf8.o(i._snputc) for _snputc + printf8.o(i.__0vsprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vsprintf$8) refers to printf8.o(i._sputc) for _sputc + printf8.o(i._printf_core) refers to printf8.o(i._printf_pre_padding) for _printf_pre_padding + printf8.o(i._printf_core) refers to printf8.o(i._printf_post_padding) for _printf_post_padding + printf8.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printfa.o(i.__0fprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0fprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0fprintf) refers to tau_log.o(i.fputc) for fputc + printfa.o(i.__0printf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0printf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0printf) refers to tau_log.o(i.fputc) for fputc + printfa.o(i.__0printf) refers to stdout.o(.data) for __stdout + printfa.o(i.__0snprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0snprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0snprintf) refers to printfa.o(i._snputc) for _snputc + printfa.o(i.__0sprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0sprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0sprintf) refers to printfa.o(i._sputc) for _sputc + printfa.o(i.__0vfprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vfprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vfprintf) refers to tau_log.o(i.fputc) for fputc + printfa.o(i.__0vprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vprintf) refers to tau_log.o(i.fputc) for fputc + printfa.o(i.__0vprintf) refers to stdout.o(.data) for __stdout + printfa.o(i.__0vsnprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vsnprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vsnprintf) refers to printfa.o(i._snputc) for _snputc + printfa.o(i.__0vsprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vsprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vsprintf) refers to printfa.o(i._sputc) for _sputc + printfa.o(i._fp_digits) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._fp_digits) refers to dmul.o(.text) for __aeabi_dmul + printfa.o(i._fp_digits) refers to ddiv.o(.text) for __aeabi_ddiv + printfa.o(i._fp_digits) refers to cdrcmple.o(.text) for __aeabi_cdrcmple + printfa.o(i._fp_digits) refers to dadd.o(.text) for __aeabi_dadd + printfa.o(i._fp_digits) refers to dfixul.o(.text) for __aeabi_d2ulz + printfa.o(i._fp_digits) refers to uldiv.o(.text) for __aeabi_uldivmod + printfa.o(i._printf_core) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._printf_core) refers to printfa.o(i._printf_pre_padding) for _printf_pre_padding + printfa.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printfa.o(i._printf_core) refers to printfa.o(i._printf_post_padding) for _printf_post_padding + printfa.o(i._printf_core) refers to printfa.o(i._fp_digits) for _fp_digits + printfa.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printfa.o(i._printf_post_padding) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._printf_pre_padding) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._snputc) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._sputc) refers (Special) to iusefp.o(.text) for __I$use$fp + fadd.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + fadd.o(.text) refers to fepilogue.o(.text) for _float_epilogue + fmul.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + fdiv.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + fdiv.o(.text) refers to fepilogue.o(.text) for _float_round + fscalb.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dadd.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dadd.o(.text) refers to llshl.o(.text) for __aeabi_llsl + dadd.o(.text) refers to llsshr.o(.text) for __aeabi_lasr + dadd.o(.text) refers to depilogue.o(.text) for _double_epilogue + fflti.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + fflti.o(.text) refers to fepilogue.o(.text) for _float_epilogue + ffltui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + ffltui.o(.text) refers to fepilogue.o(.text) for _float_epilogue + dfltui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dfltui.o(.text) refers to depilogue.o(.text) for _double_epilogue + ffixi.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + ffixui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dfixi.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dfixi.o(.text) refers to llushr.o(.text) for __aeabi_llsr + dfixui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dfixui.o(.text) refers to llushr.o(.text) for __aeabi_llsr + f2d.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + cfrcmple.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + entry2.o(.ARM.Collect$$$$00000001) refers to entry2.o(.ARM.Collect$$$$00002712) for __lit__00000000 + entry2.o(.ARM.Collect$$$$00002712) refers to startup_armcm0.o(STACK) for __initial_sp + entry2.o(__vectab_stack_and_reset_area) refers to startup_armcm0.o(STACK) for __initial_sp + entry2.o(__vectab_stack_and_reset_area) refers to entry.o(.ARM.Collect$$$$00000000) for __main + entry5.o(.ARM.Collect$$$$00000004) refers to init.o(.text) for __scatterload + entry9a.o(.ARM.Collect$$$$0000000B) refers to main.o(i.main) for main + entry9b.o(.ARM.Collect$$$$0000000C) refers to main.o(i.main) for main + uldiv.o(.text) refers to llushr.o(.text) for __aeabi_llsr + uldiv.o(.text) refers to llshl.o(.text) for __aeabi_llsl + depilogue.o(.text) refers to depilogue.o(i.__ARM_clz) for __ARM_clz + depilogue.o(.text) refers to llshl.o(.text) for __aeabi_llsl + depilogue.o(.text) refers to llushr.o(.text) for __aeabi_llsr + dmul.o(.text) refers to depilogue.o(.text) for _double_epilogue + ddiv.o(.text) refers to depilogue.o(.text) for _double_round + dfixul.o(.text) refers to llushr.o(.text) for __aeabi_llsr + dfixul.o(.text) refers to llshl.o(.text) for __aeabi_llsl + init.o(.text) refers to entry5.o(.ARM.Collect$$$$00000004) for __main_after_scatterload + + +============================================================================== + +Removing Unused input sections from the image. + + Removing main.o(.rev16_text), (4 bytes). + Removing main.o(.revsh_text), (4 bytes). + Removing ap_demo.o(.rev16_text), (4 bytes). + Removing ap_demo.o(.revsh_text), (4 bytes). + Removing ap_demo.o(.data), (1 bytes). + Removing ap_demo.o(.data), (4 bytes). + Removing app_tp_for_custom_s8.o(.rev16_text), (4 bytes). + Removing app_tp_for_custom_s8.o(.revsh_text), (4 bytes). + Removing app_tp_for_custom_s8.o(i.app_tp_screen_analysis_const), (56 bytes). + Removing app_tp_for_custom_s8.o(.bss), (200 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (37 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (1 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (3 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (3 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (1 bytes). + Removing app_tp_for_custom_s8.o(.data), (11 bytes). + Removing app_tp_for_custom_s8.o(.data), (10 bytes). + Removing app_tp_for_custom_s8.o(.data), (1 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (1 bytes). + Removing app_tp_for_custom_s8.o(.data), (1 bytes). + Removing app_tp_for_custom_s8.o(.data), (64 bytes). + Removing app_tp_for_custom_s8.o(.data), (3 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (1 bytes). + Removing app_tp_for_custom_s8.o(.data), (32 bytes). + Removing app_tp_for_custom_s8.o(.data), (1 bytes). + Removing app_tp_transfer.o(.rev16_text), (4 bytes). + Removing app_tp_transfer.o(.revsh_text), (4 bytes). + Removing app_tp_transfer.o(i.app_tp_phone_reset_on), (12 bytes). + Removing app_tp_transfer.o(i.app_tp_s_transfer_complate), (26 bytes). + Removing app_tp_transfer.o(.data), (3 bytes). + Removing app_tp_transfer.o(.data), (3 bytes). + Removing app_tp_transfer.o(.data), (5 bytes). + Removing app_tp_transfer.o(.data), (6 bytes). + Removing app_tp_transfer.o(.data), (2 bytes). + Removing app_tp_transfer.o(.data), (3 bytes). + Removing app_tp_transfer.o(.data), (1 bytes). + Removing app_tp_transfer.o(.data), (2 bytes). + Removing app_tp_transfer.o(.data), (2 bytes). + Removing board.o(.rev16_text), (4 bytes). + Removing board.o(.revsh_text), (4 bytes). + Removing startup_armcm0.o(HEAP), (3072 bytes). + Removing hal_dsi_rx_ctrl.o(.rev16_text), (4 bytes). + Removing hal_dsi_rx_ctrl.o(.revsh_text), (4 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_ack_long_cmd), (88 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_ack_short_cmd), (28 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern), (296 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_compressen_en), (16 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode), (128 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_release_handle), (32 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart), (72 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_auto_hw_filter), (28 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk), (44 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_pq_enh_chr), (56 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_pq_enh_chr2), (64 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_pq_enh_lum), (56 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_pq_gain), (64 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter), (120 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_dcs_direct_mode), (8 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_cmd_filter), (40 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pentile_format), (56 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk), (64 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_te_waveform), (52 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_tear_mode_ex), (14 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate), (112 bytes). + Removing hal_dsi_tx_ctrl.o(.rev16_text), (4 bytes). + Removing hal_dsi_tx_ctrl.o(.revsh_text), (4 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic), (164 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_ulps_mode), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_ulps_mode), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd), (140 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_release_handle), (28 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_cus_pq_edge), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_cus_pq_filter), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_endianness), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_escape_clock_div), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_horizon_flip), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_lp_cmd), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg), (24 bytes). + Removing hal_gpio.o(.rev16_text), (4 bytes). + Removing hal_gpio.o(.revsh_text), (4 bytes). + Removing hal_gpio.o(i.hal_gpio_get_int_type), (20 bytes). + Removing hal_gpio.o(i.hal_gpio_get_pull_state), (32 bytes). + Removing hal_gpio.o(i.hal_gpio_set_driving_strength), (32 bytes). + Removing hal_gpio.o(i.hal_gpio_set_output_data_ex), (36 bytes). + Removing hal_gpio.o(i.hal_gpio_set_schmitt_trigger), (32 bytes). + Removing hal_gpio.o(i.hal_gpio_set_slew_rate), (32 bytes). + Removing hal_i2c_master.o(.rev16_text), (4 bytes). + Removing hal_i2c_master.o(.revsh_text), (4 bytes). + Removing hal_i2c_master.o(i.hal_i2c_m_deinit), (8 bytes). + Removing hal_i2c_master.o(i.hal_i2c_m_set_high_impedance), (46 bytes). + Removing hal_i2c_slave.o(.rev16_text), (4 bytes). + Removing hal_i2c_slave.o(.revsh_text), (4 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_deinit), (8 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_get_tx_byte_num), (8 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_read_complate), (12 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_read_complate_clear), (12 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_read_data), (8 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_rxfifo_notempty), (16 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_set_dma_tx_cycle), (12 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_set_high_impedance), (46 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_write_complate), (12 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_write_data), (8 bytes). + Removing hal_spi_master.o(.rev16_text), (4 bytes). + Removing hal_spi_master.o(.revsh_text), (4 bytes). + Removing hal_spi_master.o(i.hal_spi_m_callback), (28 bytes). + Removing hal_spi_master.o(i.hal_spi_m_deinit), (10 bytes). + Removing hal_spi_master.o(i.hal_spi_m_dma_init), (64 bytes). + Removing hal_spi_master.o(i.hal_spi_m_dma_read), (64 bytes). + Removing hal_spi_master.o(i.hal_spi_m_dma_write), (40 bytes). + Removing hal_spi_master.o(i.hal_spi_m_get_transfer_complate), (36 bytes). + Removing hal_spi_master.o(i.hal_spi_m_gpio_init), (8 bytes). + Removing hal_spi_master.o(i.hal_spi_m_set_high_impedance), (94 bytes). + Removing hal_spi_master.o(.data), (1 bytes). + Removing hal_swire.o(.rev16_text), (4 bytes). + Removing hal_swire.o(.revsh_text), (4 bytes). + Removing hal_swire.o(i.hal_swire_deinit), (18 bytes). + Removing hal_swire.o(i.hal_swire_init), (32 bytes). + Removing hal_swire.o(i.hal_swire_register_callback), (10 bytes). + Removing hal_swire.o(i.hal_swire_start), (112 bytes). + Removing hal_system.o(.rev16_text), (4 bytes). + Removing hal_system.o(.revsh_text), (4 bytes). + Removing hal_system.o(i.hal_system_deep_sleep_mode), (8 bytes). + Removing hal_system.o(i.hal_system_disable_systick), (8 bytes). + Removing hal_system.o(i.hal_system_flash_read), (56 bytes). + Removing hal_system.o(i.hal_system_flash_write), (58 bytes). + Removing hal_system.o(i.hal_system_get_tick), (8 bytes). + Removing hal_system.o(i.hal_system_idle_mode), (8 bytes). + Removing hal_system.o(i.hal_system_register_systick_cb), (8 bytes). + Removing hal_system.o(i.hal_system_reset_chip), (32 bytes). + Removing hal_system.o(i.hal_system_share_flash_mode), (20 bytes). + Removing hal_system.o(i.hal_system_sleep_mode), (48 bytes). + Removing hal_timer.o(.rev16_text), (4 bytes). + Removing hal_timer.o(.revsh_text), (4 bytes). + Removing hal_timer.o(i.hal_timer_deinit), (46 bytes). + Removing hal_timer.o(i.hal_timer_get_status), (8 bytes). + Removing hal_timer.o(i.hal_timer_set_repeat), (8 bytes). + Removing hal_timer.o(i.hal_timer_start_ex), (72 bytes). + Removing tau_delay.o(.rev16_text), (4 bytes). + Removing tau_delay.o(.revsh_text), (4 bytes). + Removing tau_log.o(.rev16_text), (4 bytes). + Removing tau_log.o(.revsh_text), (4 bytes). + Removing tau_log.o(i.fgetc), (22 bytes). + Removing norflash.o(.rev16_text), (4 bytes). + Removing norflash.o(.revsh_text), (4 bytes). + Removing norflash.o(i.norflash_best_cfg_init), (44 bytes). + Removing norflash.o(i.norflash_big_end_clear), (14 bytes). + Removing norflash.o(i.norflash_big_end_enable), (20 bytes). + Removing norflash.o(i.norflash_check_crc32), (14 bytes). + Removing norflash.o(i.norflash_check_id), (72 bytes). + Removing norflash.o(i.norflash_dma_callback), (24 bytes). + Removing norflash.o(i.norflash_dma_read), (148 bytes). + Removing norflash.o(i.norflash_dma_write), (244 bytes). + Removing norflash.o(i.norflash_dual_read), (60 bytes). + Removing norflash.o(i.norflash_dual_write), (112 bytes). + Removing norflash.o(i.norflash_en4b), (40 bytes). + Removing norflash.o(i.norflash_en_quad), (116 bytes). + Removing norflash.o(i.norflash_en_quad_check), (64 bytes). + Removing norflash.o(i.norflash_erase_block), (44 bytes). + Removing norflash.o(i.norflash_erase_chip), (28 bytes). + Removing norflash.o(i.norflash_erase_sector), (44 bytes). + Removing norflash.o(i.norflash_ex4b), (40 bytes). + Removing norflash.o(i.norflash_exit_quad), (76 bytes). + Removing norflash.o(i.norflash_get_dual_hstatus), (52 bytes). + Removing norflash.o(i.norflash_get_hstatus), (52 bytes). + Removing norflash.o(i.norflash_get_status), (52 bytes). + Removing norflash.o(i.norflash_init), (48 bytes). + Removing norflash.o(i.norflash_quad_read), (76 bytes). + Removing norflash.o(i.norflash_quad_write), (108 bytes). + Removing norflash.o(i.norflash_read), (28 bytes). + Removing norflash.o(i.norflash_read_config_reg), (36 bytes). + Removing norflash.o(i.norflash_read_id), (20 bytes). + Removing norflash.o(i.norflash_reset), (2 bytes). + Removing norflash.o(i.norflash_reset_crc32), (32 bytes). + Removing norflash.o(i.norflash_set_best_cfg), (50 bytes). + Removing norflash.o(i.norflash_set_best_read_cfg), (84 bytes). + Removing norflash.o(i.norflash_set_best_write_cfg), (84 bytes). + Removing norflash.o(i.norflash_switch_fls_spi), (112 bytes). + Removing norflash.o(i.norflash_write), (96 bytes). + Removing norflash.o(i.norflash_write_disable), (64 bytes). + Removing norflash.o(i.norflash_write_enable), (56 bytes). + Removing norflash.o(i.norflash_write_endian_scr), (132 bytes). + Removing norflash.o(.bss), (116 bytes). + Removing norflash.o(.bss), (32 bytes). + Removing norflash.o(.data), (2 bytes). + Removing hal_uart.o(.rev16_text), (4 bytes). + Removing hal_uart.o(.revsh_text), (4 bytes). + Removing hal_uart.o(i.hal_uart_deinit), (20 bytes). + Removing hal_uart.o(i.hal_uart_dmacallback), (36 bytes). + Removing hal_uart.o(i.hal_uart_receive_blocking), (16 bytes). + Removing hal_uart.o(i.hal_uart_receive_dma), (72 bytes). + Removing hal_uart.o(i.hal_uart_transmit_dma), (68 bytes). + Removing drv_common.o(.rev16_text), (4 bytes). + Removing drv_common.o(.revsh_text), (4 bytes). + Removing drv_common.o(i.drv_common_disable_systick), (20 bytes). + Removing drv_common.o(i.drv_common_get_otp_value), (28 bytes). + Removing drv_common.o(i.drv_common_get_tick), (12 bytes). + Removing drv_common.o(i.drv_common_idle_mode), (40 bytes). + Removing drv_common.o(i.drv_common_systick_register_cb), (12 bytes). + Removing drv_crgu.o(.rev16_text), (4 bytes). + Removing drv_crgu.o(.revsh_text), (4 bytes). + Removing drv_crgu.o(i.drv_crgu_clear_all_reset_flags), (12 bytes). + Removing drv_crgu.o(i.drv_crgu_clear_reset_flag), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_config_clocks), (16 bytes). + Removing drv_crgu.o(i.drv_crgu_config_clocks_div), (16 bytes). + Removing drv_crgu.o(i.drv_crgu_config_clocks_src), (16 bytes). + Removing drv_crgu.o(i.drv_crgu_get_ana_clk_status), (24 bytes). + Removing drv_crgu.o(i.drv_crgu_get_fpga_id), (12 bytes). + Removing drv_crgu.o(i.drv_crgu_get_mipi_ref_src), (16 bytes). + Removing drv_crgu.o(i.drv_crgu_get_reset_flag), (24 bytes). + Removing drv_crgu.o(i.drv_crgu_get_system_clk), (28 bytes). + Removing drv_crgu.o(i.drv_crgu_reset_chip), (12 bytes). + Removing drv_crgu.o(i.drv_crgu_set_200m_scan_src), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_300m_scan_src), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_abp_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_adc_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_adc_src), (24 bytes). + Removing drv_crgu.o(i.drv_crgu_set_fls_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_fls_src), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_monitor_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_monitor_src), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_swire_div), (20 bytes). + Removing drv_dma.o(.rev16_text), (4 bytes). + Removing drv_dma.o(.revsh_text), (4 bytes). + Removing drv_dma.o(i.drv_dma_abort_transfer), (18 bytes). + Removing drv_dma.o(i.drv_dma_ahb_init), (72 bytes). + Removing drv_dma.o(i.drv_dma_channel_is_active), (28 bytes). + Removing drv_dma.o(i.drv_dma_deinit), (32 bytes). + Removing drv_dma.o(i.drv_dma_disenable_channel_interrupts), (32 bytes). + Removing drv_dma.o(i.drv_dma_get_remaining_bytes), (36 bytes). + Removing drv_dma.o(i.drv_dma_init), (20 bytes). + Removing drv_dma.o(i.drv_dma_m2m_init), (66 bytes). + Removing drv_dma.o(i.drv_dma_reset), (10 bytes). + Removing drv_dma.o(i.drv_dma_set_ccr), (114 bytes). + Removing drv_dma.o(i.drv_dma_start_transfer), (18 bytes). + Removing drv_fls.o(.rev16_text), (4 bytes). + Removing drv_fls.o(.revsh_text), (4 bytes). + Removing drv_fls.o(i.__NVIC_DisableIRQ), (32 bytes). + Removing drv_fls.o(i.drv_fls_gpio_connect), (28 bytes). + Removing drv_fls.o(i.drv_fls_gpio_disconnect), (32 bytes). + Removing drv_fls.o(i.fls_EnableClk), (12 bytes). + Removing drv_fls.o(i.fls_busy_pending), (12 bytes). + Removing drv_fls.o(i.fls_ctrl_cfg_init), (72 bytes). + Removing drv_fls.o(i.fls_ddat_enable), (24 bytes). + Removing drv_fls.o(i.fls_de_init), (44 bytes). + Removing drv_fls.o(i.fls_descr), (10 bytes). + Removing drv_fls.o(i.fls_disable_it), (36 bytes). + Removing drv_fls.o(i.fls_en_scr), (10 bytes). + Removing drv_fls.o(i.fls_enable_it), (48 bytes). + Removing drv_fls.o(i.fls_get_crcout), (4 bytes). + Removing drv_fls.o(i.fls_get_default_fls_config), (20 bytes). + Removing drv_fls.o(i.fls_get_default_spi_config), (44 bytes). + Removing drv_fls.o(i.fls_get_default_tuning), (12 bytes). + Removing drv_fls.o(i.fls_get_tuning), (18 bytes). + Removing drv_fls.o(i.fls_init), (62 bytes). + Removing drv_fls.o(i.fls_qadr_enable), (22 bytes). + Removing drv_fls.o(i.fls_qcmd_enable), (22 bytes). + Removing drv_fls.o(i.fls_qdat_enable), (22 bytes). + Removing drv_fls.o(i.fls_read_byte_data), (126 bytes). + Removing drv_fls.o(i.fls_read_cmd), (104 bytes). + Removing drv_fls.o(i.fls_read_cmd_it), (110 bytes). + Removing drv_fls.o(i.fls_reset_crc), (18 bytes). + Removing drv_fls.o(i.fls_scr_clear), (10 bytes). + Removing drv_fls.o(i.fls_set_addr_dummy), (32 bytes). + Removing drv_fls.o(i.fls_set_addr_len), (32 bytes). + Removing drv_fls.o(i.fls_set_irq_mask), (26 bytes). + Removing drv_fls.o(i.fls_set_read), (10 bytes). + Removing drv_fls.o(i.fls_set_tuning), (24 bytes). + Removing drv_fls.o(i.fls_set_write), (10 bytes). + Removing drv_fls.o(i.fls_single_mode), (16 bytes). + Removing drv_fls.o(i.fls_spi_init), (180 bytes). + Removing drv_fls.o(i.fls_spi_start), (10 bytes). + Removing drv_fls.o(i.fls_swrst), (18 bytes). + Removing drv_fls.o(i.fls_write_byte_data), (160 bytes). + Removing drv_fls.o(i.fls_write_cmd), (58 bytes). + Removing drv_fls.o(.data), (4 bytes). + Removing drv_gpio.o(.rev16_text), (4 bytes). + Removing drv_gpio.o(.revsh_text), (4 bytes). + Removing drv_gpio.o(i.drv_gpio_get_pull_state), (224 bytes). + Removing drv_gpio.o(i.drv_gpio_set_driving_strength), (312 bytes). + Removing drv_gpio.o(i.drv_gpio_set_schmitt_trigger), (168 bytes). + Removing drv_gpio.o(i.drv_gpio_set_slew_rate), (168 bytes). + Removing drv_i2c_dma.o(.rev16_text), (4 bytes). + Removing drv_i2c_dma.o(.revsh_text), (4 bytes). + Removing drv_i2c_master.o(.rev16_text), (4 bytes). + Removing drv_i2c_master.o(.revsh_text), (4 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_bus_init), (36 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_deinit), (44 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_enable), (32 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_get_fifo_status), (28 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_read_data), (32 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_set_fifo_threshold), (24 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_set_sys_mask), (48 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_write_data), (32 bytes). + Removing drv_i2c_slave.o(.rev16_text), (4 bytes). + Removing drv_i2c_slave.o(.revsh_text), (4 bytes). + Removing drv_i2c_slave.o(i.drv_i2c_s_bus_init), (36 bytes). + Removing drv_i2c_slave.o(i.drv_i2c_s_deinit), (44 bytes). + Removing drv_i2c_slave.o(i.drv_i2c_s_enable), (32 bytes). + Removing drv_i2c_slave.o(i.drv_i2c_s_get_tx_byte_num), (12 bytes). + Removing drv_i2c_slave.o(i.drv_i2c_s_read_data), (32 bytes). + Removing drv_i2c_slave.o(i.drv_i2c_s_set_fifo_threshold), (24 bytes). + Removing drv_i2c_slave.o(i.drv_i2c_s_set_sys_mask), (48 bytes). + Removing drv_param_init.o(.rev16_text), (4 bytes). + Removing drv_param_init.o(.revsh_text), (4 bytes). + Removing drv_param_init.o(i.drv_param_init_set_scld_filter), (100 bytes). + Removing drv_param_init.o(i.drv_param_init_set_sclu_filter), (52 bytes). + Removing drv_param_init.o(i.drv_param_set_enh_chr), (12 bytes). + Removing drv_param_init.o(i.drv_param_set_enh_chr2), (16 bytes). + Removing drv_param_init.o(i.drv_param_set_enh_lum), (12 bytes). + Removing drv_param_init.o(i.drv_param_set_gain), (16 bytes). + Removing drv_param_init.o(.data), (4 bytes). + Removing drv_param_init.o(.data), (4 bytes). + Removing drv_param_init.o(.data), (4 bytes). + Removing drv_param_init.o(.data), (4 bytes). + Removing drv_param_init.o(.data), (4 bytes). + Removing drv_param_init.o(.data), (4 bytes). + Removing drv_param_init.o(.data), (4 bytes). + Removing drv_param_init.o(.data), (4 bytes). + Removing drv_param_init.o(.data), (4 bytes). + Removing drv_param_init.o(.data), (4 bytes). + Removing drv_pwr.o(.rev16_text), (4 bytes). + Removing drv_pwr.o(.revsh_text), (4 bytes). + Removing drv_pwr.o(i.drv_pwr_enter_deep_sleep_mode), (40 bytes). + Removing drv_spi_dma.o(.rev16_text), (4 bytes). + Removing drv_spi_dma.o(.revsh_text), (4 bytes). + Removing drv_spi_dma.o(i.__NVIC_ClearPendingIRQ), (24 bytes). + Removing drv_spi_dma.o(i.drv_spi_abort_dma), (80 bytes). + Removing drv_spi_dma.o(i.drv_spi_dma_callback), (52 bytes). + Removing drv_spi_dma.o(i.drv_spi_dma_init), (188 bytes). + Removing drv_spi_dma.o(i.drv_spi_set_dma_irq_callback), (80 bytes). + Removing drv_spi_dma.o(i.drv_spim_dma_read), (512 bytes). + Removing drv_spi_dma.o(i.drv_spim_dma_write), (84 bytes). + Removing drv_spi_dma.o(i.drv_spis_dma_write), (56 bytes). + Removing drv_spi_dma.o(.bss), (24 bytes). + Removing drv_spi_dma.o(.data), (8 bytes). + Removing drv_spi_master.o(.rev16_text), (4 bytes). + Removing drv_spi_master.o(.revsh_text), (4 bytes). + Removing drv_spi_master.o(i.drv_spi_m_deinit), (56 bytes). + Removing drv_spi_master.o(i.drv_spi_m_disable_int), (72 bytes). + Removing drv_spi_master.o(i.drv_spi_m_enable), (32 bytes). + Removing drv_spi_master.o(i.drv_spi_m_enable_int), (76 bytes). + Removing drv_spi_master.o(i.drv_spi_m_enable_rx_dma), (32 bytes). + Removing drv_spi_master.o(i.drv_spi_m_enable_tx_dma), (28 bytes). + Removing drv_spi_master.o(i.drv_spi_m_gpio_init), (32 bytes). + Removing drv_spi_master.o(i.drv_spi_m_set_intr_callback), (12 bytes). + Removing drv_spi_master.o(i.drv_spi_m_write_data), (44 bytes). + Removing drv_spi_master.o(i.drv_spi_master_init), (164 bytes). + Removing drv_swire.o(.rev16_text), (4 bytes). + Removing drv_swire.o(.revsh_text), (4 bytes). + Removing drv_swire.o(i.drv_swire_enable), (28 bytes). + Removing drv_swire.o(i.drv_swire_register_callback), (12 bytes). + Removing drv_swire.o(i.drv_swire_set_bit_time), (24 bytes). + Removing drv_swire.o(i.drv_swire_set_pulse_count), (12 bytes). + Removing drv_sys_cfg.o(.rev16_text), (4 bytes). + Removing drv_sys_cfg.o(.revsh_text), (4 bytes). + Removing drv_sys_cfg.o(i.drv_sys_cfg_dma_req_mask), (32 bytes). + Removing drv_sys_cfg.o(i.drv_sys_cfg_read_version0_id), (12 bytes). + Removing drv_sys_cfg.o(i.drv_sys_cfg_set_ap_reset), (28 bytes). + Removing drv_timer.o(.rev16_text), (4 bytes). + Removing drv_timer.o(.revsh_text), (4 bytes). + Removing drv_timer.o(i.drv_timer_get_status), (38 bytes). + Removing drv_timer.o(i.drv_timer_set_repeat), (16 bytes). + Removing dcs_packet_fifo.o(i.dcs_packet_get_fifo_size), (16 bytes). + Removing hal_internal_vsync.o(.rev16_text), (4 bytes). + Removing hal_internal_vsync.o(.revsh_text), (4 bytes). + Removing hal_internal_vsync.o(i.hal_internal_vsync_set_dcs_direct_mode), (48 bytes). + Removing drv_dsi_rx.o(.rev16_text), (4 bytes). + Removing drv_dsi_rx.o(.revsh_text), (4 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_get_phy_stopstate), (66 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_get_version), (4 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_phy_resistor_calibration), (236 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_pg_cfg), (32 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_pg_cfg), (48 bytes). + Removing drv_dsi_rx.o(i.drv_rx_phy_test_read), (12 bytes). + Removing drv_dsi_tx.o(.rev16_text), (4 bytes). + Removing drv_dsi_tx.o(.revsh_text), (4 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_command_get_payload), (4 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_force_interrupt), (8 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_get_phy_status), (6 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_forcepll), (12 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_resistor_calibration), (232 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_start), (18 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_status_pll_lock), (10 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ulpsactivenot), (62 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_trigger), (92 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter), (344 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit), (276 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_sdf_3d), (28 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_set_bta), (22 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_set_vpg), (70 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_version), (4 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_vid_shadow), (16 bytes). + Removing drv_dsi_tx.o(i.drv_tx_phy_test_read), (10 bytes). + Removing drv_lcdc.o(.rev16_text), (4 bytes). + Removing drv_lcdc.o(.revsh_text), (4 bytes). + Removing drv_lcdc.o(i.drv_lcdc_config_rgb_to_pentile), (26 bytes). + Removing drv_lcdc.o(i.drv_lcdc_config_sclu_filter), (54 bytes). + Removing drv_lcdc.o(i.drv_lcdc_enable), (42 bytes). + Removing drv_lcdc.o(i.drv_lcdc_get_disp_buff_pix), (16 bytes). + Removing drv_lcdc.o(i.drv_lcdc_get_read_buff_data), (40 bytes). + Removing drv_memc.o(.rev16_text), (4 bytes). + Removing drv_memc.o(.revsh_text), (4 bytes). + Removing drv_memc.o(i.drv_memc_set_ahb2ram), (14 bytes). + Removing drv_memc.o(i.drv_memc_set_fb_pri_inverse), (16 bytes). + Removing drv_memc.o(i.drv_memc_set_inten), (20 bytes). + Removing drv_phy_common.o(.rev16_text), (4 bytes). + Removing drv_phy_common.o(.revsh_text), (4 bytes). + Removing drv_phy_common.o(i.drv_phy_test_read), (8 bytes). + Removing drv_rxbr.o(.rev16_text), (4 bytes). + Removing drv_rxbr.o(.revsh_text), (4 bytes). + Removing drv_rxbr.o(i.drv_rxbr_dsc_flush), (16 bytes). + Removing drv_rxbr.o(i.drv_rxbr_err_reset), (98 bytes). + Removing drv_rxbr.o(i.drv_rxbr_get_ipi_vsync_interval), (8 bytes). + Removing drv_rxbr.o(i.drv_rxbr_get_pix_fmt), (8 bytes). + Removing drv_rxbr.o(i.drv_rxbr_hline_rcv1_cfg), (10 bytes). + Removing drv_rxbr.o(i.drv_rxbr_hw_rcv_cmd), (8 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_col_addr), (4 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_compress), (24 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_page_addr), (4 bytes). + Removing drv_vidc.o(.rev16_text), (4 bytes). + Removing drv_vidc.o(.revsh_text), (4 bytes). + Removing drv_vidc.o(i.drv_vidc_clear_status0), (14 bytes). + Removing drv_vidc.o(i.drv_vidc_debug_cap_pixel), (24 bytes). + Removing drv_vidc.o(i.drv_vidc_debug_signal_frame), (30 bytes). + Removing drv_vidc.o(i.drv_vidc_get_irq_status), (18 bytes). + Removing drv_vidc.o(i.drv_vidc_get_status0), (20 bytes). + Removing drv_vidc.o(i.drv_vidc_get_status1), (20 bytes). + Removing drv_vidc.o(i.drv_vidc_get_status2), (6 bytes). + Removing drv_vidc.o(i.drv_vidc_set_dsc_thresh), (4 bytes). + Removing drv_vidc.o(i.drv_vidc_set_frmst_latency), (4 bytes). + Removing drv_vidc.o(i.drv_vidc_set_inff_thresh), (12 bytes). + Removing drv_vidc.o(i.drv_vidc_set_outff_thresh), (14 bytes). + Removing drv_vidc.o(i.drv_vidc_set_parameter), (576 bytes). + Removing drv_vidc.o(i.drv_vidc_set_pentile_swap), (24 bytes). + Removing drv_vidc.o(i.drv_vidc_set_y4t2_hinit), (14 bytes). + Removing drv_vidc.o(i.drv_vidc_set_y4t2_vinit), (14 bytes). + Removing drv_vidc.o(i.drv_vidc_update_src_format), (14 bytes). + Removing drv_vidc.o(.conststring), (344 bytes). + Removing irq_redirect .o(.rev16_text), (4 bytes). + Removing irq_redirect .o(.revsh_text), (4 bytes). + Removing drv_chip_info.o(.rev16_text), (4 bytes). + Removing drv_chip_info.o(.revsh_text), (4 bytes). + Removing drv_dsc_dec.o(.rev16_text), (4 bytes). + Removing drv_dsc_dec.o(.revsh_text), (4 bytes). + Removing drv_dsc_dec.o(i.drv_dsc_dec_set_u32_pps), (120 bytes). + Removing hal_spi_slave.o(.rev16_text), (4 bytes). + Removing hal_spi_slave.o(.revsh_text), (4 bytes). + Removing hal_spi_slave.o(i.hal_spi_s_set_high_impedance), (94 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_auto_transfer_abort), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_auto_transfer_start), (52 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_busy), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_deinit), (10 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_disable), (12 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_enable), (96 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_flush_fifo), (28 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_get_rxfifo_notempty), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_gpio_init), (8 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_init), (76 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_read_data), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_register_callback), (12 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_reset_tx), (68 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_set_auto_rx_buffer), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_set_auto_tx_buffer), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_write_data), (14 bytes). + Removing drv_fls_dma.o(.rev16_text), (4 bytes). + Removing drv_fls_dma.o(.revsh_text), (4 bytes). + Removing drv_fls_dma.o(i.fls_abort_dma), (42 bytes). + Removing drv_fls_dma.o(i.fls_dma_disable), (10 bytes). + Removing drv_fls_dma.o(i.fls_dma_enable), (10 bytes). + Removing drv_fls_dma.o(i.fls_dma_read_prepare), (22 bytes). + Removing drv_fls_dma.o(i.fls_dma_rw_prepare), (100 bytes). + Removing drv_fls_dma.o(i.fls_dma_write_prepare), (22 bytes). + Removing drv_fls_dma.o(i.fls_read_dmacallback), (36 bytes). + Removing drv_fls_dma.o(i.fls_transfer_create_handle_dma), (188 bytes). + Removing drv_fls_dma.o(i.fls_transfer_dma), (102 bytes). + Removing drv_fls_dma.o(i.fls_transfer_get_receive_count_dma), (34 bytes). + Removing drv_fls_dma.o(i.fls_write_dmacallback), (36 bytes). + Removing drv_fls_dma.o(.data), (8 bytes). + Removing drv_pwm.o(.rev16_text), (4 bytes). + Removing drv_pwm.o(.revsh_text), (4 bytes). + Removing drv_pwm.o(i.drv_pwm_in_clear_pwm_int_all), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_in_enable), (32 bytes). + Removing drv_pwm.o(i.drv_pwm_in_get_counter_period), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_in_get_current_count), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_in_get_high_period), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_in_get_low_period), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_in_register_callback), (24 bytes). + Removing drv_pwm.o(i.drv_pwm_in_set_pwm_int), (32 bytes). + Removing drv_pwm.o(i.drv_pwm_in_set_sys_int), (52 bytes). + Removing drv_pwm.o(i.drv_pwm_out_enable), (32 bytes). + Removing drv_pwm.o(i.drv_pwm_out_get_sync_flag), (16 bytes). + Removing drv_pwm.o(i.drv_pwm_out_pause), (28 bytes). + Removing drv_pwm.o(i.drv_pwm_out_set_control), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_out_set_period), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_out_set_sync_mode), (32 bytes). + Removing drv_pwm.o(i.drv_pwm_out_set_threshold), (12 bytes). + Removing drv_uart.o(.rev16_text), (4 bytes). + Removing drv_uart.o(.revsh_text), (4 bytes). + Removing drv_uart.o(i.UART_AbortReceive), (30 bytes). + Removing drv_uart.o(i.UART_AbortSend), (30 bytes). + Removing drv_uart.o(i.UART_Deinit), (28 bytes). + Removing drv_uart.o(i.UART_Disable_IT), (68 bytes). + Removing drv_uart.o(i.UART_EnableDma), (32 bytes). + Removing drv_uart.o(i.UART_Enable_IT), (44 bytes). + Removing drv_uart.o(i.UART_GetDefaultConfig), (72 bytes). + Removing drv_uart.o(i.UART_GetFIFO_Ctrl), (20 bytes). + Removing drv_uart.o(i.UART_GetReceiveCount), (22 bytes). + Removing drv_uart.o(i.UART_GetReceiveStatus), (20 bytes). + Removing drv_uart.o(i.UART_GetRxRingBufferLength), (28 bytes). + Removing drv_uart.o(i.UART_GetSendCount), (22 bytes). + Removing drv_uart.o(i.UART_GetSendStatus), (20 bytes). + Removing drv_uart.o(i.UART_ReadBlocking), (32 bytes). + Removing drv_uart.o(i.UART_ReceiveNonBlocking), (50 bytes). + Removing drv_uart.o(i.UART_ResetTxFIFO), (36 bytes). + Removing drv_uart.o(i.UART_SendNonBlocking), (38 bytes). + Removing drv_uart.o(i.UART_TransferCreateHandle), (96 bytes). + Removing drv_uart.o(i.UART_TransferStartRingBuffer), (30 bytes). + Removing drv_uart.o(.constdata), (1 bytes). + Removing drv_uart_dma.o(.rev16_text), (4 bytes). + Removing drv_uart_dma.o(.revsh_text), (4 bytes). + Removing drv_uart_dma.o(i.UART_DMAInit), (70 bytes). + Removing drv_uart_dma.o(i.UART_TransferAbortReceiveDMA), (16 bytes). + Removing drv_uart_dma.o(i.UART_TransferAbortSendDMA), (16 bytes). + Removing drv_uart_dma.o(i.UART_TransferCreateHandleDMA), (168 bytes). + Removing drv_uart_dma.o(i.UART_TransferGetReceiveCountDMA), (34 bytes). + Removing drv_uart_dma.o(i.UART_TransferReceiveDMA), (54 bytes). + Removing drv_uart_dma.o(i.UART_TransferReceiveDMACallback), (38 bytes). + Removing drv_uart_dma.o(i.UART_TransferSendDMA), (54 bytes). + Removing drv_uart_dma.o(i.UART_TransferSendDMACallback), (38 bytes). + Removing drv_uart_dma.o(.data), (8 bytes). + Removing drv_wdg.o(.rev16_text), (4 bytes). + Removing drv_wdg.o(.revsh_text), (4 bytes). + Removing drv_wdg.o(i.drv_wdg_enable), (32 bytes). + Removing drv_wdg.o(i.drv_wdg_load_match), (12 bytes). + Removing drv_wdg.o(i.drv_wdg_register_callback), (12 bytes). + Removing drv_wdg.o(i.drv_wdg_sel_mode), (28 bytes). + Removing drv_wdg.o(i.drv_wdg_set_repeat), (12 bytes). + Removing drv_spi_slave.o(.rev16_text), (4 bytes). + Removing drv_spi_slave.o(.revsh_text), (4 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_deinit), (52 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_disable_int), (64 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_enable), (32 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_enable_int), (72 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_enable_rx_dma), (32 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_enable_tx_dma), (28 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_gpio_init), (24 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_read_data), (32 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_set_intr_callback), (12 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_write_data), (44 bytes). + Removing drv_spi_slave.o(i.drv_spi_slave_init), (76 bytes). + Removing drv_spi_slave.o(.data), (4 bytes). + +570 unused section(s) (total 22786 bytes) removed from the image. + +============================================================================== + +Image Symbol Table + + Local Symbols + + Symbol Name Value Ov Type Size Object(Section) + + ../clib/../cmprslib/zerorunl2.c 0x00000000 Number 0 __dczerorl2.o ABSOLUTE + ../clib/microlib/division.c 0x00000000 Number 0 uldiv.o ABSOLUTE + ../clib/microlib/division.c 0x00000000 Number 0 idiv.o ABSOLUTE + ../clib/microlib/division.c 0x00000000 Number 0 uidiv.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry10b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry10a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry9b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry8b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry8a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry7b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry9a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry7a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry5.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry2.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry11a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry11b.o ABSOLUTE + ../clib/microlib/longlong.c 0x00000000 Number 0 llshl.o ABSOLUTE + ../clib/microlib/longlong.c 0x00000000 Number 0 llushr.o ABSOLUTE + ../clib/microlib/longlong.c 0x00000000 Number 0 llsshr.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf7.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf6.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf5.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf4.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf2.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf1.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf0.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printfb.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf3.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printfa.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf8.o ABSOLUTE + ../clib/microlib/printf/stubs.s 0x00000000 Number 0 stubs.o ABSOLUTE + ../clib/microlib/stdio/streams.c 0x00000000 Number 0 stdout.o ABSOLUTE + ../clib/microlib/string/memcpy.c 0x00000000 Number 0 memcpyb.o ABSOLUTE + ../clib/microlib/string/memcpy.c 0x00000000 Number 0 memcpya.o ABSOLUTE + ../clib/microlib/string/memset.c 0x00000000 Number 0 memseta.o ABSOLUTE + ../clib/microlib/stubs.s 0x00000000 Number 0 iusefp.o ABSOLUTE + ../fplib/microlib/f2d.c 0x00000000 Number 0 f2d.o ABSOLUTE + ../fplib/microlib/fpadd.c 0x00000000 Number 0 fadd.o ABSOLUTE + ../fplib/microlib/fpadd.c 0x00000000 Number 0 dadd.o ABSOLUTE + ../fplib/microlib/fpdiv.c 0x00000000 Number 0 fdiv.o ABSOLUTE + ../fplib/microlib/fpdiv.c 0x00000000 Number 0 ddiv.o ABSOLUTE + ../fplib/microlib/fpepilogue.c 0x00000000 Number 0 depilogue.o ABSOLUTE + ../fplib/microlib/fpepilogue.c 0x00000000 Number 0 fepilogue.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 ffixi.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 ffixui.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 dfixui.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 dfixul.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 dfixi.o ABSOLUTE + ../fplib/microlib/fpflt.c 0x00000000 Number 0 ffltui.o ABSOLUTE + ../fplib/microlib/fpflt.c 0x00000000 Number 0 dfltui.o ABSOLUTE + ../fplib/microlib/fpflt.c 0x00000000 Number 0 fflti.o ABSOLUTE + ../fplib/microlib/fpmul.c 0x00000000 Number 0 fmul.o ABSOLUTE + ../fplib/microlib/fpmul.c 0x00000000 Number 0 dmul.o ABSOLUTE + ../fplib/microlib/fpscalb.c 0x00000000 Number 0 fscalb.o ABSOLUTE + ../mathlib/ceil.c 0x00000000 Number 0 ceil.o ABSOLUTE + ..\..\..\src\common\tau_delay.c 0x00000000 Number 0 tau_delay.o ABSOLUTE + ..\..\..\src\common\tau_log.c 0x00000000 Number 0 tau_log.o ABSOLUTE + ..\..\..\src\driver\lark\src\drv_chip_info.c 0x00000000 Number 0 drv_chip_info.o ABSOLUTE + ..\..\..\src\driver\lark\src\drv_dsc_dec.c 0x00000000 Number 0 drv_dsc_dec.o ABSOLUTE + ..\..\..\src\driver\source\lark\drv\drv_dsi_rx.c 0x00000000 Number 0 drv_dsi_rx.o ABSOLUTE + ..\..\..\src\driver\source\lark\drv\drv_dsi_tx.c 0x00000000 Number 0 drv_dsi_tx.o ABSOLUTE + ..\..\..\src\driver\source\lark\drv\drv_lcdc.c 0x00000000 Number 0 drv_lcdc.o ABSOLUTE + ..\..\..\src\driver\source\lark\drv\drv_memc.c 0x00000000 Number 0 drv_memc.o ABSOLUTE + ..\..\..\src\driver\source\lark\drv\drv_phy_common.c 0x00000000 Number 0 drv_phy_common.o ABSOLUTE + ..\..\..\src\driver\source\lark\drv\drv_rxbr.c 0x00000000 Number 0 drv_rxbr.o ABSOLUTE + ..\..\..\src\driver\source\lark\drv\drv_vidc.c 0x00000000 Number 0 drv_vidc.o ABSOLUTE + ..\..\..\src\driver\source\lark\drv\irq_redirect .c 0x00000000 Number 0 irq_redirect .o ABSOLUTE + ..\..\..\src\driver\source\lark\hal\internal\dcs_packet_fifo.c 0x00000000 Number 0 dcs_packet_fifo.o ABSOLUTE + ..\..\..\src\driver\source\lark\hal\internal\hal_internal_vsync.c 0x00000000 Number 0 hal_internal_vsync.o ABSOLUTE + ..\..\..\src\sdk\lark\src\drv\drv_common.c 0x00000000 Number 0 drv_common.o ABSOLUTE + ..\..\..\src\sdk\lark\src\drv\drv_crgu.c 0x00000000 Number 0 drv_crgu.o ABSOLUTE + ..\..\..\src\sdk\lark\src\drv\drv_dma.c 0x00000000 Number 0 drv_dma.o ABSOLUTE + ..\..\..\src\sdk\lark\src\drv\drv_fls.c 0x00000000 Number 0 drv_fls.o ABSOLUTE + ..\..\..\src\sdk\lark\src\drv\drv_fls_dma.c 0x00000000 Number 0 drv_fls_dma.o ABSOLUTE + ..\..\..\src\sdk\lark\src\drv\drv_gpio.c 0x00000000 Number 0 drv_gpio.o ABSOLUTE + ..\..\..\src\sdk\lark\src\drv\drv_i2c_dma.c 0x00000000 Number 0 drv_i2c_dma.o ABSOLUTE + ..\..\..\src\sdk\lark\src\drv\drv_i2c_master.c 0x00000000 Number 0 drv_i2c_master.o ABSOLUTE + ..\..\..\src\sdk\lark\src\drv\drv_i2c_slave.c 0x00000000 Number 0 drv_i2c_slave.o ABSOLUTE + ..\..\..\src\sdk\lark\src\drv\drv_param_init.c 0x00000000 Number 0 drv_param_init.o ABSOLUTE + ..\..\..\src\sdk\lark\src\drv\drv_pwm.c 0x00000000 Number 0 drv_pwm.o ABSOLUTE + ..\..\..\src\sdk\lark\src\drv\drv_pwr.c 0x00000000 Number 0 drv_pwr.o ABSOLUTE + ..\..\..\src\sdk\lark\src\drv\drv_spi_dma.c 0x00000000 Number 0 drv_spi_dma.o ABSOLUTE + ..\..\..\src\sdk\lark\src\drv\drv_spi_master.c 0x00000000 Number 0 drv_spi_master.o ABSOLUTE + ..\..\..\src\sdk\lark\src\drv\drv_spi_slave.c 0x00000000 Number 0 drv_spi_slave.o ABSOLUTE + ..\..\..\src\sdk\lark\src\drv\drv_swire.c 0x00000000 Number 0 drv_swire.o ABSOLUTE + ..\..\..\src\sdk\lark\src\drv\drv_sys_cfg.c 0x00000000 Number 0 drv_sys_cfg.o ABSOLUTE + ..\..\..\src\sdk\lark\src\drv\drv_timer.c 0x00000000 Number 0 drv_timer.o ABSOLUTE + ..\..\..\src\sdk\lark\src\drv\drv_uart.c 0x00000000 Number 0 drv_uart.o ABSOLUTE + ..\..\..\src\sdk\lark\src\drv\drv_uart_dma.c 0x00000000 Number 0 drv_uart_dma.o ABSOLUTE + ..\..\..\src\sdk\lark\src\drv\drv_wdg.c 0x00000000 Number 0 drv_wdg.o ABSOLUTE + ..\..\..\src\sdk\lark\src\hal\hal_dsi_rx_ctrl.c 0x00000000 Number 0 hal_dsi_rx_ctrl.o ABSOLUTE + ..\..\..\src\sdk\lark\src\hal\hal_dsi_tx_ctrl.c 0x00000000 Number 0 hal_dsi_tx_ctrl.o ABSOLUTE + ..\..\..\src\sdk\lark\src\hal\hal_gpio.c 0x00000000 Number 0 hal_gpio.o ABSOLUTE + ..\..\..\src\sdk\lark\src\hal\hal_i2c_master.c 0x00000000 Number 0 hal_i2c_master.o ABSOLUTE + ..\..\..\src\sdk\lark\src\hal\hal_i2c_slave.c 0x00000000 Number 0 hal_i2c_slave.o ABSOLUTE + ..\..\..\src\sdk\lark\src\hal\hal_spi_master.c 0x00000000 Number 0 hal_spi_master.o ABSOLUTE + ..\..\..\src\sdk\lark\src\hal\hal_spi_slave.c 0x00000000 Number 0 hal_spi_slave.o ABSOLUTE + ..\..\..\src\sdk\lark\src\hal\hal_swire.c 0x00000000 Number 0 hal_swire.o ABSOLUTE + ..\..\..\src\sdk\lark\src\hal\hal_system.c 0x00000000 Number 0 hal_system.o ABSOLUTE + ..\..\..\src\sdk\lark\src\hal\hal_timer.c 0x00000000 Number 0 hal_timer.o ABSOLUTE + ..\..\..\src\sdk\lark\src\hal\hal_uart.c 0x00000000 Number 0 hal_uart.o ABSOLUTE + ..\..\..\src\sdk\lark\src\hal\internal\norflash.c 0x00000000 Number 0 norflash.o ABSOLUTE + ..\..\src\app\demo\ap_demo.c 0x00000000 Number 0 ap_demo.o ABSOLUTE + ..\..\src\app\demo\app_tp_for_custom_s8.c 0x00000000 Number 0 app_tp_for_custom_s8.o ABSOLUTE + ..\..\src\app\demo\app_tp_transfer.c 0x00000000 Number 0 app_tp_transfer.o ABSOLUTE + ..\..\src\app\main.c 0x00000000 Number 0 main.o ABSOLUTE + ..\..\src\board\board.c 0x00000000 Number 0 board.o ABSOLUTE + ..\..\src\board\startup\startup_ARMCM0.s 0x00000000 Number 0 startup_armcm0.o ABSOLUTE + ..\\..\\..\\src\\common\\tau_delay.c 0x00000000 Number 0 tau_delay.o ABSOLUTE + ..\\..\\..\\src\\common\\tau_log.c 0x00000000 Number 0 tau_log.o ABSOLUTE + ..\\..\\..\\src\\driver\\lark\\src\\drv_chip_info.c 0x00000000 Number 0 drv_chip_info.o ABSOLUTE + ..\\..\\..\\src\\driver\\lark\\src\\drv_dsc_dec.c 0x00000000 Number 0 drv_dsc_dec.o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\lark\\drv\\drv_dsi_rx.c 0x00000000 Number 0 drv_dsi_rx.o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\lark\\drv\\drv_dsi_tx.c 0x00000000 Number 0 drv_dsi_tx.o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\lark\\drv\\drv_lcdc.c 0x00000000 Number 0 drv_lcdc.o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\lark\\drv\\drv_memc.c 0x00000000 Number 0 drv_memc.o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\lark\\drv\\drv_phy_common.c 0x00000000 Number 0 drv_phy_common.o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\lark\\drv\\drv_rxbr.c 0x00000000 Number 0 drv_rxbr.o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\lark\\drv\\drv_vidc.c 0x00000000 Number 0 drv_vidc.o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\lark\\drv\\irq_redirect .c 0x00000000 Number 0 irq_redirect .o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\lark\\hal\\internal\\hal_internal_vsync.c 0x00000000 Number 0 hal_internal_vsync.o ABSOLUTE + ..\\..\\..\\src\\sdk\\lark\\src\\drv\\drv_common.c 0x00000000 Number 0 drv_common.o ABSOLUTE + ..\\..\\..\\src\\sdk\\lark\\src\\drv\\drv_crgu.c 0x00000000 Number 0 drv_crgu.o ABSOLUTE + ..\\..\\..\\src\\sdk\\lark\\src\\drv\\drv_dma.c 0x00000000 Number 0 drv_dma.o ABSOLUTE + ..\\..\\..\\src\\sdk\\lark\\src\\drv\\drv_fls.c 0x00000000 Number 0 drv_fls.o ABSOLUTE + ..\\..\\..\\src\\sdk\\lark\\src\\drv\\drv_fls_dma.c 0x00000000 Number 0 drv_fls_dma.o ABSOLUTE + ..\\..\\..\\src\\sdk\\lark\\src\\drv\\drv_gpio.c 0x00000000 Number 0 drv_gpio.o ABSOLUTE + ..\\..\\..\\src\\sdk\\lark\\src\\drv\\drv_i2c_dma.c 0x00000000 Number 0 drv_i2c_dma.o ABSOLUTE + ..\\..\\..\\src\\sdk\\lark\\src\\drv\\drv_i2c_master.c 0x00000000 Number 0 drv_i2c_master.o ABSOLUTE + ..\\..\\..\\src\\sdk\\lark\\src\\drv\\drv_i2c_slave.c 0x00000000 Number 0 drv_i2c_slave.o ABSOLUTE + ..\\..\\..\\src\\sdk\\lark\\src\\drv\\drv_param_init.c 0x00000000 Number 0 drv_param_init.o ABSOLUTE + ..\\..\\..\\src\\sdk\\lark\\src\\drv\\drv_pwm.c 0x00000000 Number 0 drv_pwm.o ABSOLUTE + ..\\..\\..\\src\\sdk\\lark\\src\\drv\\drv_pwr.c 0x00000000 Number 0 drv_pwr.o ABSOLUTE + ..\\..\\..\\src\\sdk\\lark\\src\\drv\\drv_spi_dma.c 0x00000000 Number 0 drv_spi_dma.o ABSOLUTE + ..\\..\\..\\src\\sdk\\lark\\src\\drv\\drv_spi_master.c 0x00000000 Number 0 drv_spi_master.o ABSOLUTE + ..\\..\\..\\src\\sdk\\lark\\src\\drv\\drv_spi_slave.c 0x00000000 Number 0 drv_spi_slave.o ABSOLUTE + ..\\..\\..\\src\\sdk\\lark\\src\\drv\\drv_swire.c 0x00000000 Number 0 drv_swire.o ABSOLUTE + ..\\..\\..\\src\\sdk\\lark\\src\\drv\\drv_sys_cfg.c 0x00000000 Number 0 drv_sys_cfg.o ABSOLUTE + ..\\..\\..\\src\\sdk\\lark\\src\\drv\\drv_timer.c 0x00000000 Number 0 drv_timer.o ABSOLUTE + ..\\..\\..\\src\\sdk\\lark\\src\\drv\\drv_uart.c 0x00000000 Number 0 drv_uart.o ABSOLUTE + ..\\..\\..\\src\\sdk\\lark\\src\\drv\\drv_uart_dma.c 0x00000000 Number 0 drv_uart_dma.o ABSOLUTE + ..\\..\\..\\src\\sdk\\lark\\src\\drv\\drv_wdg.c 0x00000000 Number 0 drv_wdg.o ABSOLUTE + ..\\..\\..\\src\\sdk\\lark\\src\\hal\\hal_dsi_rx_ctrl.c 0x00000000 Number 0 hal_dsi_rx_ctrl.o ABSOLUTE + ..\\..\\..\\src\\sdk\\lark\\src\\hal\\hal_dsi_tx_ctrl.c 0x00000000 Number 0 hal_dsi_tx_ctrl.o ABSOLUTE + ..\\..\\..\\src\\sdk\\lark\\src\\hal\\hal_gpio.c 0x00000000 Number 0 hal_gpio.o ABSOLUTE + ..\\..\\..\\src\\sdk\\lark\\src\\hal\\hal_i2c_master.c 0x00000000 Number 0 hal_i2c_master.o ABSOLUTE + ..\\..\\..\\src\\sdk\\lark\\src\\hal\\hal_i2c_slave.c 0x00000000 Number 0 hal_i2c_slave.o ABSOLUTE + ..\\..\\..\\src\\sdk\\lark\\src\\hal\\hal_spi_master.c 0x00000000 Number 0 hal_spi_master.o ABSOLUTE + ..\\..\\..\\src\\sdk\\lark\\src\\hal\\hal_spi_slave.c 0x00000000 Number 0 hal_spi_slave.o ABSOLUTE + ..\\..\\..\\src\\sdk\\lark\\src\\hal\\hal_swire.c 0x00000000 Number 0 hal_swire.o ABSOLUTE + ..\\..\\..\\src\\sdk\\lark\\src\\hal\\hal_system.c 0x00000000 Number 0 hal_system.o ABSOLUTE + ..\\..\\..\\src\\sdk\\lark\\src\\hal\\hal_timer.c 0x00000000 Number 0 hal_timer.o ABSOLUTE + ..\\..\\..\\src\\sdk\\lark\\src\\hal\\hal_uart.c 0x00000000 Number 0 hal_uart.o ABSOLUTE + ..\\..\\..\\src\\sdk\\lark\\src\\hal\\internal\\norflash.c 0x00000000 Number 0 norflash.o ABSOLUTE + ..\\..\\src\\app\\demo\\ap_demo.c 0x00000000 Number 0 ap_demo.o ABSOLUTE + ..\\..\\src\\app\\demo\\app_tp_for_custom_s8.c 0x00000000 Number 0 app_tp_for_custom_s8.o ABSOLUTE + ..\\..\\src\\app\\demo\\app_tp_transfer.c 0x00000000 Number 0 app_tp_transfer.o ABSOLUTE + ..\\..\\src\\app\\main.c 0x00000000 Number 0 main.o ABSOLUTE + ..\\..\\src\\board\\board.c 0x00000000 Number 0 board.o ABSOLUTE + cdrcmple.s 0x00000000 Number 0 cdrcmple.o ABSOLUTE + cfrcmple.s 0x00000000 Number 0 cfrcmple.o ABSOLUTE + dc.s 0x00000000 Number 0 dc.o ABSOLUTE + handlers.s 0x00000000 Number 0 handlers.o ABSOLUTE + init.s 0x00000000 Number 0 init.o ABSOLUTE + RESET 0x00010000 Section 192 startup_armcm0.o(RESET) + .ARM.Collect$$$$00000000 0x000100c0 Section 0 entry.o(.ARM.Collect$$$$00000000) + .ARM.Collect$$$$00000001 0x000100c0 Section 4 entry2.o(.ARM.Collect$$$$00000001) + .ARM.Collect$$$$00000004 0x000100c4 Section 4 entry5.o(.ARM.Collect$$$$00000004) + .ARM.Collect$$$$00000008 0x000100c8 Section 0 entry7b.o(.ARM.Collect$$$$00000008) + .ARM.Collect$$$$0000000A 0x000100c8 Section 0 entry8b.o(.ARM.Collect$$$$0000000A) + .ARM.Collect$$$$0000000B 0x000100c8 Section 8 entry9a.o(.ARM.Collect$$$$0000000B) + .ARM.Collect$$$$0000000D 0x000100d0 Section 0 entry10a.o(.ARM.Collect$$$$0000000D) + .ARM.Collect$$$$0000000F 0x000100d0 Section 0 entry11a.o(.ARM.Collect$$$$0000000F) + .ARM.Collect$$$$00002712 0x000100d0 Section 4 entry2.o(.ARM.Collect$$$$00002712) + __lit__00000000 0x000100d0 Data 4 entry2.o(.ARM.Collect$$$$00002712) + .text 0x000100d4 Section 120 startup_armcm0.o(.text) + .text 0x0001014c Section 0 uidiv.o(.text) + .text 0x00010178 Section 0 idiv.o(.text) + .text 0x000101a0 Section 0 memcpya.o(.text) + .text 0x000101c4 Section 0 memseta.o(.text) + .text 0x000101e8 Section 0 fadd.o(.text) + .text 0x0001029a Section 0 fmul.o(.text) + .text 0x00010314 Section 0 fdiv.o(.text) + .text 0x00010390 Section 0 fscalb.o(.text) + .text 0x000103a8 Section 0 dadd.o(.text) + .text 0x0001050c Section 0 fflti.o(.text) + .text 0x00010522 Section 0 ffltui.o(.text) + .text 0x00010530 Section 0 dfltui.o(.text) + .text 0x0001054c Section 0 ffixi.o(.text) + .text 0x0001057e Section 0 ffixui.o(.text) + .text 0x000105a8 Section 0 dfixi.o(.text) + .text 0x000105f0 Section 0 dfixui.o(.text) + .text 0x0001062c Section 0 f2d.o(.text) + .text 0x00010654 Section 20 cfrcmple.o(.text) + .text 0x00010668 Section 0 uldiv.o(.text) + .text 0x000106c8 Section 0 llshl.o(.text) + .text 0x000106e8 Section 0 llushr.o(.text) + .text 0x0001070a Section 0 llsshr.o(.text) + .text 0x00010730 Section 0 fepilogue.o(.text) + .text 0x00010730 Section 0 iusefp.o(.text) + .text 0x000107b2 Section 0 depilogue.o(.text) + .text 0x00010870 Section 0 dmul.o(.text) + .text 0x00010940 Section 0 ddiv.o(.text) + .text 0x00010a30 Section 0 dfixul.o(.text) + .text 0x00010a70 Section 40 cdrcmple.o(.text) + .text 0x00010a98 Section 36 init.o(.text) + .text 0x00010abc Section 0 __dczerorl2.o(.text) + i.ADC_IRQn_Handler 0x00010b14 Section 0 irq_redirect .o(i.ADC_IRQn_Handler) + i.AP_NRESET_IRQn_Handler 0x00010b2c Section 0 irq_redirect .o(i.AP_NRESET_IRQn_Handler) + i.DMA_IRQn_Handler 0x00010b48 Section 0 irq_redirect .o(i.DMA_IRQn_Handler) + i.EXTI_INT0_IRQn_Handler 0x00010b5c Section 0 irq_redirect .o(i.EXTI_INT0_IRQn_Handler) + i.EXTI_INT1_IRQn_Handler 0x00010b78 Section 0 irq_redirect .o(i.EXTI_INT1_IRQn_Handler) + i.EXTI_INT2_IRQn_Handler 0x00010b94 Section 0 irq_redirect .o(i.EXTI_INT2_IRQn_Handler) + i.EXTI_INT3_IRQn_Handler 0x00010bb0 Section 0 irq_redirect .o(i.EXTI_INT3_IRQn_Handler) + i.EXTI_INT4_IRQn_Handler 0x00010bcc Section 0 irq_redirect .o(i.EXTI_INT4_IRQn_Handler) + i.EXTI_INT5_IRQn_Handler 0x00010be8 Section 0 irq_redirect .o(i.EXTI_INT5_IRQn_Handler) + i.EXTI_INT6_IRQn_Handler 0x00010c04 Section 0 irq_redirect .o(i.EXTI_INT6_IRQn_Handler) + i.EXTI_INT7_IRQn_Handler 0x00010c20 Section 0 irq_redirect .o(i.EXTI_INT7_IRQn_Handler) + i.FLSCTRL_IRQn_Handler 0x00010c3c Section 0 irq_redirect .o(i.FLSCTRL_IRQn_Handler) + i.Gpio_swire_output 0x00010c50 Section 0 ap_demo.o(i.Gpio_swire_output) + i.HardFault_Handler 0x00010cc4 Section 0 irq_redirect .o(i.HardFault_Handler) + i.I2C0_IRQn_Handler 0x00010cd8 Section 0 irq_redirect .o(i.I2C0_IRQn_Handler) + i.I2C1_IRQn_Handler 0x00010cf0 Section 0 irq_redirect .o(i.I2C1_IRQn_Handler) + i.LCDC_IRQn_Handler 0x00010d08 Section 0 irq_redirect .o(i.LCDC_IRQn_Handler) + i.LOG_printf 0x00010d20 Section 0 tau_log.o(i.LOG_printf) + i.MEMC_IRQn_Handler 0x00010d48 Section 0 irq_redirect .o(i.MEMC_IRQn_Handler) + i.MIPI_RX_IRQn_Handler 0x00010d60 Section 0 irq_redirect .o(i.MIPI_RX_IRQn_Handler) + i.MIPI_TX_IRQn_Handler 0x00010d78 Section 0 irq_redirect .o(i.MIPI_TX_IRQn_Handler) + i.PWMDET_IRQn_Handler 0x00010d90 Section 0 irq_redirect .o(i.PWMDET_IRQn_Handler) + i.S20_Start_init 0x00010dac Section 0 app_tp_transfer.o(i.S20_Start_init) + i.SPIM_IRQn_Handler 0x00010ed0 Section 0 irq_redirect .o(i.SPIM_IRQn_Handler) + i.SPIS_IRQn_Handler 0x00010eec Section 0 irq_redirect .o(i.SPIS_IRQn_Handler) + i.SWIRE_IRQn_Handler 0x00010f08 Section 0 irq_redirect .o(i.SWIRE_IRQn_Handler) + i.SysTick_Handler 0x00010f24 Section 0 irq_redirect .o(i.SysTick_Handler) + i.TIMER0_IRQn_Handler 0x00010f3c Section 0 irq_redirect .o(i.TIMER0_IRQn_Handler) + i.TIMER1_IRQn_Handler 0x00010f54 Section 0 irq_redirect .o(i.TIMER1_IRQn_Handler) + i.TIMER2_IRQn_Handler 0x00010f6c Section 0 irq_redirect .o(i.TIMER2_IRQn_Handler) + i.TIMER3_IRQn_Handler 0x00010f84 Section 0 irq_redirect .o(i.TIMER3_IRQn_Handler) + i.UART_DisableDma 0x00010f9c Section 0 drv_uart.o(i.UART_DisableDma) + i.UART_GetInstance 0x00010f9e Section 0 drv_uart.o(i.UART_GetInstance) + i.UART_IRQ_Handle 0x00010fa4 Section 0 drv_uart.o(i.UART_IRQ_Handle) + i.UART_IRQn_Handler 0x00010fc0 Section 0 irq_redirect .o(i.UART_IRQn_Handler) + i.UART_ResetRxFIFO 0x00010fd8 Section 0 drv_uart.o(i.UART_ResetRxFIFO) + i.__scatterload_null 0x00010ffc Section 2 handlers.o(i.__scatterload_null) + .constdata 0x00010ffe Section 1 app_tp_for_custom_s8.o(.constdata) + .ARM.__at_0x11000 0x00011000 Section 20 drv_common.o(.ARM.__at_0x11000) + i.UART_SetBaudRate 0x00011014 Section 0 drv_uart.o(i.UART_SetBaudRate) + i.UART_SwitchSCLK 0x0001105c Section 0 drv_uart.o(i.UART_SwitchSCLK) + i.UART_TransferHandleIRQ 0x00011076 Section 0 drv_uart.o(i.UART_TransferHandleIRQ) + i.UART_WriteBlocking 0x000111aa Section 0 drv_uart.o(i.UART_WriteBlocking) + i.UART_init 0x000111c4 Section 0 drv_uart.o(i.UART_init) + i.VIDC_IRQn_Handler 0x00011280 Section 0 irq_redirect .o(i.VIDC_IRQn_Handler) + i.VPRE_IRQn_Handler 0x00011298 Section 0 irq_redirect .o(i.VPRE_IRQn_Handler) + i.WDG_IRQn_Handler 0x000112b0 Section 0 irq_redirect .o(i.WDG_IRQn_Handler) + i.__0printf 0x000112c8 Section 0 printfa.o(i.__0printf) + i.__0vsprintf 0x000112e8 Section 0 printfa.o(i.__0vsprintf) + i.__ARM_clz 0x0001130c Section 0 depilogue.o(i.__ARM_clz) + i.__ARM_common_switch8 0x0001133a Section 0 ap_demo.o(i.__ARM_common_switch8) + i.__NVIC_ClearPendingIRQ 0x00011354 Section 0 drv_i2c_master.o(i.__NVIC_ClearPendingIRQ) + __NVIC_ClearPendingIRQ 0x00011355 Thumb Code 18 drv_i2c_master.o(i.__NVIC_ClearPendingIRQ) + i.__NVIC_ClearPendingIRQ 0x0001136c Section 0 drv_i2c_slave.o(i.__NVIC_ClearPendingIRQ) + __NVIC_ClearPendingIRQ 0x0001136d Thumb Code 18 drv_i2c_slave.o(i.__NVIC_ClearPendingIRQ) + i.__NVIC_SetPriority 0x00011384 Section 0 hal_spi_slave.o(i.__NVIC_SetPriority) + __NVIC_SetPriority 0x00011385 Thumb Code 60 hal_spi_slave.o(i.__NVIC_SetPriority) + i.__scatterload_copy 0x000113c8 Section 14 handlers.o(i.__scatterload_copy) + i.__scatterload_zeroinit 0x000113d6 Section 14 handlers.o(i.__scatterload_zeroinit) + i._fp_digits 0x000113e4 Section 0 printfa.o(i._fp_digits) + _fp_digits 0x000113e5 Thumb Code 344 printfa.o(i._fp_digits) + i._printf_core 0x00011558 Section 0 printfa.o(i._printf_core) + _printf_core 0x00011559 Thumb Code 1754 printfa.o(i._printf_core) + i._printf_post_padding 0x00011c44 Section 0 printfa.o(i._printf_post_padding) + _printf_post_padding 0x00011c45 Thumb Code 32 printfa.o(i._printf_post_padding) + i._printf_pre_padding 0x00011c64 Section 0 printfa.o(i._printf_pre_padding) + _printf_pre_padding 0x00011c65 Thumb Code 44 printfa.o(i._printf_pre_padding) + i._sputc 0x00011c90 Section 0 printfa.o(i._sputc) + _sputc 0x00011c91 Thumb Code 10 printfa.o(i._sputc) + i.ap_dcs_read 0x00011c9c Section 0 ap_demo.o(i.ap_dcs_read) + ap_dcs_read 0x00011c9d Thumb Code 5006 ap_demo.o(i.ap_dcs_read) + i.ap_demo 0x00013030 Section 0 ap_demo.o(i.ap_demo) + i.ap_get_reg_ca 0x000131a4 Section 0 ap_demo.o(i.ap_get_reg_ca) + ap_get_reg_ca 0x000131a5 Thumb Code 38 ap_demo.o(i.ap_get_reg_ca) + i.ap_get_reg_df 0x000131d0 Section 0 ap_demo.o(i.ap_get_reg_df) + ap_get_reg_df 0x000131d1 Thumb Code 172 ap_demo.o(i.ap_get_reg_df) + i.ap_reset_cb 0x00013280 Section 0 ap_demo.o(i.ap_reset_cb) + ap_reset_cb 0x00013281 Thumb Code 40 ap_demo.o(i.ap_reset_cb) + i.ap_set_backlight 0x000132dc Section 0 ap_demo.o(i.ap_set_backlight) + ap_set_backlight 0x000132dd Thumb Code 832 ap_demo.o(i.ap_set_backlight) + i.ap_set_display_off 0x0001363c Section 0 ap_demo.o(i.ap_set_display_off) + ap_set_display_off 0x0001363d Thumb Code 42 ap_demo.o(i.ap_set_display_off) + i.ap_set_display_on 0x00013694 Section 0 ap_demo.o(i.ap_set_display_on) + ap_set_display_on 0x00013695 Thumb Code 22 ap_demo.o(i.ap_set_display_on) + i.ap_set_enter_sleep_mode 0x000136d8 Section 0 ap_demo.o(i.ap_set_enter_sleep_mode) + ap_set_enter_sleep_mode 0x000136d9 Thumb Code 42 ap_demo.o(i.ap_set_enter_sleep_mode) + i.ap_set_exit_sleep_mode 0x00013738 Section 0 ap_demo.o(i.ap_set_exit_sleep_mode) + ap_set_exit_sleep_mode 0x00013739 Thumb Code 20 ap_demo.o(i.ap_set_exit_sleep_mode) + i.ap_set_tp_calibration_04 0x00013780 Section 0 ap_demo.o(i.ap_set_tp_calibration_04) + ap_set_tp_calibration_04 0x00013781 Thumb Code 22 ap_demo.o(i.ap_set_tp_calibration_04) + i.ap_tp_calibration 0x0001379c Section 0 app_tp_transfer.o(i.ap_tp_calibration) + i.ap_tp_scan_point_init 0x0001384c Section 0 app_tp_transfer.o(i.ap_tp_scan_point_init) + i.ap_tp_scan_point_record_event 0x00013868 Section 0 app_tp_transfer.o(i.ap_tp_scan_point_record_event) + i.ap_tp_scan_point_record_event_exec 0x00013904 Section 0 app_tp_transfer.o(i.ap_tp_scan_point_record_event_exec) + i.ap_tp_simulate_finger_release_event 0x00013954 Section 0 app_tp_transfer.o(i.ap_tp_simulate_finger_release_event) + i.ap_tp_system_softReset 0x00013988 Section 0 app_tp_transfer.o(i.ap_tp_system_softReset) + i.app_AP_NRESET_IRQn_Handler 0x000139c8 Section 0 drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) + i.app_EXTI_INT0_IRQn_Handler 0x000139ec Section 0 drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) + i.app_EXTI_INT1_IRQn_Handler 0x00013a08 Section 0 drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) + i.app_EXTI_INT2_IRQn_Handler 0x00013a24 Section 0 drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) + i.app_EXTI_INT3_IRQn_Handler 0x00013a40 Section 0 drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) + i.app_EXTI_INT4_IRQn_Handler 0x00013a5c Section 0 drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) + i.app_EXTI_INT5_IRQn_Handler 0x00013a78 Section 0 drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) + i.app_EXTI_INT6_IRQn_Handler 0x00013a94 Section 0 drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) + i.app_EXTI_INT7_IRQn_Handler 0x00013ab0 Section 0 drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) + i.app_HardFault_Handler 0x00013acc Section 0 drv_common.o(i.app_HardFault_Handler) + i.app_I2C0_IRQn_Handler 0x00013b14 Section 0 drv_i2c_slave.o(i.app_I2C0_IRQn_Handler) + i.app_I2C1_IRQn_Handler 0x00013b24 Section 0 drv_i2c_master.o(i.app_I2C1_IRQn_Handler) + i.app_LCDC_IRQn_Handler 0x00013b34 Section 0 hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) + i.app_MEMC_IRQn_Handler 0x00013c14 Section 0 drv_memc.o(i.app_MEMC_IRQn_Handler) + i.app_MIPI_RX_IRQn_Handler 0x00013c74 Section 0 drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) + i.app_MIPI_TX_IRQn_Handler 0x00013f0c Section 0 drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) + i.app_PWMDET_IRQn_Handler 0x00013fac Section 0 drv_pwm.o(i.app_PWMDET_IRQn_Handler) + i.app_SPIM_IRQn_Handler 0x00013ff4 Section 0 drv_spi_master.o(i.app_SPIM_IRQn_Handler) + i.app_SPIS_IRQn_Handler 0x00014014 Section 0 hal_spi_slave.o(i.app_SPIS_IRQn_Handler) + i.app_SWIRE_IRQn_Handler 0x00014214 Section 0 drv_swire.o(i.app_SWIRE_IRQn_Handler) + i.app_SysTick_Handler 0x00014234 Section 0 drv_common.o(i.app_SysTick_Handler) + i.app_TIMER0_IRQn_Handler 0x0001424c Section 0 drv_timer.o(i.app_TIMER0_IRQn_Handler) + i.app_TIMER1_IRQn_Handler 0x00014256 Section 0 drv_timer.o(i.app_TIMER1_IRQn_Handler) + i.app_TIMER2_IRQn_Handler 0x00014260 Section 0 drv_timer.o(i.app_TIMER2_IRQn_Handler) + i.app_TIMER3_IRQn_Handler 0x0001426a Section 0 drv_timer.o(i.app_TIMER3_IRQn_Handler) + i.app_UART_IRQn_Handler 0x00014274 Section 0 drv_uart.o(i.app_UART_IRQn_Handler) + i.app_VIDC_IRQn_Handler 0x0001427c Section 0 hal_internal_vsync.o(i.app_VIDC_IRQn_Handler) + i.app_VPRE_IRQn_Handler 0x00014360 Section 0 hal_internal_vsync.o(i.app_VPRE_IRQn_Handler) + i.app_WDG_IRQn_Handler 0x000145e4 Section 0 drv_wdg.o(i.app_WDG_IRQn_Handler) + i.app_dma_irq_handler 0x0001461c Section 0 drv_dma.o(i.app_dma_irq_handler) + i.app_fls_ctrl_Handler 0x00014624 Section 0 norflash.o(i.app_fls_ctrl_Handler) + i.app_tp_I2C_init 0x00014654 Section 0 app_tp_transfer.o(i.app_tp_I2C_init) + i.app_tp_calibration_exec 0x00014678 Section 0 ap_demo.o(i.app_tp_calibration_exec) + i.app_tp_i2cs_callback 0x000146d4 Section 0 app_tp_transfer.o(i.app_tp_i2cs_callback) + app_tp_i2cs_callback 0x000146d5 Thumb Code 10 app_tp_transfer.o(i.app_tp_i2cs_callback) + i.app_tp_init 0x000146e0 Section 0 app_tp_transfer.o(i.app_tp_init) + i.app_tp_m_read 0x00014728 Section 0 app_tp_transfer.o(i.app_tp_m_read) + app_tp_m_read 0x00014729 Thumb Code 32 app_tp_transfer.o(i.app_tp_m_read) + i.app_tp_m_transfer_complate 0x00014748 Section 0 app_tp_transfer.o(i.app_tp_m_transfer_complate) + i.app_tp_m_write 0x00014750 Section 0 app_tp_transfer.o(i.app_tp_m_write) + app_tp_m_write 0x00014751 Thumb Code 8 app_tp_transfer.o(i.app_tp_m_write) + i.app_tp_phone_analysis_data 0x00014758 Section 0 app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) + i.app_tp_phone_clear_reset_on 0x00014b68 Section 0 app_tp_transfer.o(i.app_tp_phone_clear_reset_on) + i.app_tp_s_read 0x00014b74 Section 0 app_tp_transfer.o(i.app_tp_s_read) + i.app_tp_s_write 0x00014b7c Section 0 app_tp_transfer.o(i.app_tp_s_write) + i.app_tp_screen_analysis_int 0x00014b84 Section 0 app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) + i.app_tp_screen_init 0x00014e50 Section 0 app_tp_transfer.o(i.app_tp_screen_init) + i.app_tp_screen_int_callback 0x00014e80 Section 0 app_tp_transfer.o(i.app_tp_screen_int_callback) + app_tp_screen_int_callback 0x00014e81 Thumb Code 8 app_tp_transfer.o(i.app_tp_screen_int_callback) + i.app_tp_screen_int_init 0x00014e8c Section 0 app_tp_transfer.o(i.app_tp_screen_int_init) + app_tp_screen_int_init 0x00014e8d Thumb Code 48 app_tp_transfer.o(i.app_tp_screen_int_init) + i.app_tp_screen_int_lvl_low 0x00014ec4 Section 0 app_tp_transfer.o(i.app_tp_screen_int_lvl_low) + app_tp_screen_int_lvl_low 0x00014ec5 Thumb Code 4 app_tp_transfer.o(i.app_tp_screen_int_lvl_low) + i.app_tp_transfer_phone 0x00014ec8 Section 0 app_tp_transfer.o(i.app_tp_transfer_phone) + app_tp_transfer_phone 0x00014ec9 Thumb Code 44 app_tp_transfer.o(i.app_tp_transfer_phone) + i.app_tp_transfer_screen_const 0x00014ef8 Section 0 app_tp_transfer.o(i.app_tp_transfer_screen_const) + app_tp_transfer_screen_const 0x00014ef9 Thumb Code 50 app_tp_transfer.o(i.app_tp_transfer_screen_const) + i.app_tp_transfer_screen_int 0x00014f38 Section 0 app_tp_transfer.o(i.app_tp_transfer_screen_int) + i.app_tp_transfer_screen_start 0x00015118 Section 0 app_tp_transfer.o(i.app_tp_transfer_screen_start) + i.blue_change_ccm 0x00015130 Section 0 ap_demo.o(i.blue_change_ccm) + i.board_Init 0x00015168 Section 0 board.o(i.board_Init) + i.calc_framebuffer_setting 0x00015184 Section 0 hal_internal_vsync.o(i.calc_framebuffer_setting) + calc_framebuffer_setting 0x00015185 Thumb Code 462 hal_internal_vsync.o(i.calc_framebuffer_setting) + i.ceil 0x00015370 Section 0 ceil.o(i.ceil) + i.check_mipi_rx_tx_video_info 0x00015438 Section 0 hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) + check_mipi_rx_tx_video_info 0x00015439 Thumb Code 44 hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) + i.check_pkt_buf_rev 0x00015464 Section 0 hal_internal_vsync.o(i.check_pkt_buf_rev) + check_pkt_buf_rev 0x00015465 Thumb Code 38 hal_internal_vsync.o(i.check_pkt_buf_rev) + i.dcs_packet_fifo_alloc 0x00015490 Section 0 dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) + i.dcs_packet_fifo_init 0x000154e8 Section 0 dcs_packet_fifo.o(i.dcs_packet_fifo_init) + i.dcs_packet_free_fifo_header 0x00015500 Section 0 dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) + i.dcs_packet_get_fifo_header 0x00015544 Section 0 dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) + i.dcs_sw_filter 0x00015568 Section 0 hal_internal_vsync.o(i.dcs_sw_filter) + dcs_sw_filter 0x00015569 Thumb Code 24 hal_internal_vsync.o(i.dcs_sw_filter) + i.delayMs 0x00015584 Section 0 tau_delay.o(i.delayMs) + i.delayUs 0x0001559c Section 0 tau_delay.o(i.delayUs) + i.disable_mipi_timer_cb 0x000155c0 Section 0 ap_demo.o(i.disable_mipi_timer_cb) + disable_mipi_timer_cb 0x000155c1 Thumb Code 88 ap_demo.o(i.disable_mipi_timer_cb) + i.drv_ap_rst_trig_edge_detect 0x00015654 Section 0 drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) + i.drv_chip_info_get_version 0x0001568c Section 0 drv_chip_info.o(i.drv_chip_info_get_version) + i.drv_chip_info_init 0x00015698 Section 0 drv_chip_info.o(i.drv_chip_info_init) + i.drv_chip_rx_info_check 0x00015748 Section 0 drv_chip_info.o(i.drv_chip_rx_info_check) + i.drv_chip_rx_init_done 0x000157a4 Section 0 drv_chip_info.o(i.drv_chip_rx_init_done) + i.drv_common_enable_systick 0x000157b8 Section 0 drv_common.o(i.drv_common_enable_systick) + i.drv_common_system_init 0x00015810 Section 0 drv_common.o(i.drv_common_system_init) + i.drv_crgu_config_reset_modules 0x00015840 Section 0 drv_crgu.o(i.drv_crgu_config_reset_modules) + i.drv_crgu_set_ahb_pre_div 0x00015850 Section 0 drv_crgu.o(i.drv_crgu_set_ahb_pre_div) + i.drv_crgu_set_ahb_src 0x00015864 Section 0 drv_crgu.o(i.drv_crgu_set_ahb_src) + i.drv_crgu_set_clock 0x00015878 Section 0 drv_crgu.o(i.drv_crgu_set_clock) + i.drv_crgu_set_dpi_mux_src 0x00015898 Section 0 drv_crgu.o(i.drv_crgu_set_dpi_mux_src) + i.drv_crgu_set_dpi_pre_div 0x000158ac Section 0 drv_crgu.o(i.drv_crgu_set_dpi_pre_div) + i.drv_crgu_set_dpi_pre_src 0x000158c4 Section 0 drv_crgu.o(i.drv_crgu_set_dpi_pre_src) + i.drv_crgu_set_dsc_core_div 0x000158d8 Section 0 drv_crgu.o(i.drv_crgu_set_dsc_core_div) + i.drv_crgu_set_dsco_src 0x000158ec Section 0 drv_crgu.o(i.drv_crgu_set_dsco_src) + i.drv_crgu_set_dsco_src_div 0x00015900 Section 0 drv_crgu.o(i.drv_crgu_set_dsco_src_div) + i.drv_crgu_set_fb_div 0x00015914 Section 0 drv_crgu.o(i.drv_crgu_set_fb_div) + i.drv_crgu_set_fb_src 0x00015928 Section 0 drv_crgu.o(i.drv_crgu_set_fb_src) + i.drv_crgu_set_lcdc_div 0x0001593c Section 0 drv_crgu.o(i.drv_crgu_set_lcdc_div) + i.drv_crgu_set_lcdc_src 0x00015950 Section 0 drv_crgu.o(i.drv_crgu_set_lcdc_src) + i.drv_crgu_set_mipi_cfg_src 0x00015964 Section 0 drv_crgu.o(i.drv_crgu_set_mipi_cfg_src) + i.drv_crgu_set_mipi_ref_src 0x00015978 Section 0 drv_crgu.o(i.drv_crgu_set_mipi_ref_src) + i.drv_crgu_set_reset 0x00015990 Section 0 drv_crgu.o(i.drv_crgu_set_reset) + i.drv_crgu_set_rxbr_div 0x000159a8 Section 0 drv_crgu.o(i.drv_crgu_set_rxbr_div) + i.drv_crgu_set_rxbr_src 0x000159bc Section 0 drv_crgu.o(i.drv_crgu_set_rxbr_src) + i.drv_crgu_set_vidc_src 0x000159d0 Section 0 drv_crgu.o(i.drv_crgu_set_vidc_src) + i.drv_dma_clear_flag 0x000159e4 Section 0 drv_dma.o(i.drv_dma_clear_flag) + i.drv_dma_create_handle 0x00015a00 Section 0 drv_dma.o(i.drv_dma_create_handle) + i.drv_dma_disenable_channel 0x00015a18 Section 0 drv_dma.o(i.drv_dma_disenable_channel) + i.drv_dma_enable_channel 0x00015a30 Section 0 drv_dma.o(i.drv_dma_enable_channel) + i.drv_dma_enable_channel_interrupts 0x00015a48 Section 0 drv_dma.o(i.drv_dma_enable_channel_interrupts) + i.drv_dma_enable_cycle 0x00015a7c Section 0 drv_dma.o(i.drv_dma_enable_cycle) + i.drv_dma_get_channel_flag 0x00015aac Section 0 drv_dma.o(i.drv_dma_get_channel_flag) + i.drv_dma_irq_handler 0x00015ac0 Section 0 drv_dma.o(i.drv_dma_irq_handler) + i.drv_dma_prepar_transfer 0x00015b3c Section 0 drv_dma.o(i.drv_dma_prepar_transfer) + i.drv_dma_set_burst 0x00015b54 Section 0 drv_dma.o(i.drv_dma_set_burst) + i.drv_dma_set_callback 0x00015b70 Section 0 drv_dma.o(i.drv_dma_set_callback) + i.drv_dma_set_transfer 0x00015b78 Section 0 drv_dma.o(i.drv_dma_set_transfer) + i.drv_dsc_dec_convert_pps_rc_parameter 0x00015bbc Section 0 drv_dsc_dec.o(i.drv_dsc_dec_convert_pps_rc_parameter) + i.drv_dsc_dec_disable 0x00015bf2 Section 0 drv_dsc_dec.o(i.drv_dsc_dec_disable) + i.drv_dsc_dec_enable 0x00015c00 Section 0 drv_dsc_dec.o(i.drv_dsc_dec_enable) + i.drv_dsc_dec_get_nslc 0x00015cb4 Section 0 drv_dsc_dec.o(i.drv_dsc_dec_get_nslc) + i.drv_dsc_dec_set_u8_pps 0x00015cbe Section 0 drv_dsc_dec.o(i.drv_dsc_dec_set_u8_pps) + i.drv_dsi_rx_calc_ipi_tx_delay 0x00015ce8 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) + i.drv_dsi_rx_enable_irq 0x00015dec Section 0 drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) + i.drv_dsi_rx_get_color_bpp 0x00015e2c Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) + drv_dsi_rx_get_color_bpp 0x00015e2d Thumb Code 62 drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) + i.drv_dsi_rx_get_color_pcc 0x00015e7c Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_color_pcc) + drv_dsi_rx_get_color_pcc 0x00015e7d Thumb Code 24 drv_dsi_rx.o(i.drv_dsi_rx_get_color_pcc) + i.drv_dsi_rx_get_compression_en 0x00015e98 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) + i.drv_dsi_rx_get_max_ret_size 0x00015ea0 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_max_ret_size) + i.drv_dsi_rx_power_up 0x00015ea6 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_power_up) + i.drv_dsi_rx_set_ctrl_cfg 0x00015eb4 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_ctrl_cfg) + i.drv_dsi_rx_set_ddi_cfg 0x00015ed0 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) + i.drv_dsi_rx_set_inten 0x00015ee0 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_inten) + i.drv_dsi_rx_set_ipi_cfg 0x00015ee4 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_cfg) + i.drv_dsi_rx_set_resp_cnt 0x00015ef4 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_resp_cnt) + i.drv_dsi_rx_set_up_phy 0x00015f1c Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) + i.drv_dsi_rx_shut_down 0x00015fac Section 0 drv_dsi_rx.o(i.drv_dsi_rx_shut_down) + i.drv_dsi_tx_command_header 0x00015fba Section 0 drv_dsi_tx.o(i.drv_dsi_tx_command_header) + i.drv_dsi_tx_command_mode_cfg 0x00015fce Section 0 drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) + i.drv_dsi_tx_command_put_payload 0x0001603a Section 0 drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) + i.drv_dsi_tx_config_eotp 0x0001603e Section 0 drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) + i.drv_dsi_tx_config_int 0x00016056 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_config_int) + i.drv_dsi_tx_dpi_lpcmd_time 0x0001605e Section 0 drv_dsi_tx.o(i.drv_dsi_tx_dpi_lpcmd_time) + i.drv_dsi_tx_dpi_mode 0x00016066 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_dpi_mode) + i.drv_dsi_tx_dpi_polarity 0x00016070 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_dpi_polarity) + i.drv_dsi_tx_get_cmd_status 0x00016094 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) + i.drv_dsi_tx_mode 0x00016098 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_mode) + i.drv_dsi_tx_phy_clock_lane_auto_lp 0x0001609c Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_auto_lp) + i.drv_dsi_tx_phy_clock_lane_req_hs 0x000160b4 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) + i.drv_dsi_tx_phy_lane_mode 0x000160ce Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_lane_mode) + i.drv_dsi_tx_phy_status_ready 0x000160da Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ready) + i.drv_dsi_tx_phy_status_stopstate 0x0001613e Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) + i.drv_dsi_tx_phy_test_setup 0x0001617c Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) + i.drv_dsi_tx_phy_time_cfg 0x00016260 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_time_cfg) + i.drv_dsi_tx_powerup 0x0001627e Section 0 drv_dsi_tx.o(i.drv_dsi_tx_powerup) + i.drv_dsi_tx_response_mode 0x00016286 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_response_mode) + i.drv_dsi_tx_set_bta_ack 0x000162a2 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_bta_ack) + i.drv_dsi_tx_set_esc_div 0x000162ba Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) + i.drv_dsi_tx_set_int 0x000162c8 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_int) + i.drv_dsi_tx_set_time_out_div 0x000162fc Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_time_out_div) + i.drv_dsi_tx_set_video_chunk 0x0001630c Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_video_chunk) + i.drv_dsi_tx_set_video_timing 0x00016314 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_video_timing) + i.drv_dsi_tx_shutdown 0x00016336 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_shutdown) + i.drv_dsi_tx_timeout_cfg 0x0001633e Section 0 drv_dsi_tx.o(i.drv_dsi_tx_timeout_cfg) + i.drv_dsi_tx_video_mode_cfg 0x00016364 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_cfg) + i.drv_dsi_tx_video_mode_disable_hact_cmd 0x0001640e Section 0 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_disable_hact_cmd) + i.drv_dsi_tx_video_mode_set_lp_cmd 0x00016424 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_set_lp_cmd) + i.drv_gpio_get_input_data 0x0001643c Section 0 drv_gpio.o(i.drv_gpio_get_input_data) + i.drv_gpio_register_ap_reset_callback 0x00016454 Section 0 drv_gpio.o(i.drv_gpio_register_ap_reset_callback) + i.drv_gpio_register_callback 0x00016460 Section 0 drv_gpio.o(i.drv_gpio_register_callback) + i.drv_gpio_set_int 0x00016474 Section 0 drv_gpio.o(i.drv_gpio_set_int) + i.drv_gpio_set_ioe 0x000164b8 Section 0 drv_gpio.o(i.drv_gpio_set_ioe) + i.drv_gpio_set_mode0 0x000164d8 Section 0 drv_gpio.o(i.drv_gpio_set_mode0) + i.drv_gpio_set_mode1 0x000164e8 Section 0 drv_gpio.o(i.drv_gpio_set_mode1) + i.drv_gpio_set_mode2 0x000164f8 Section 0 drv_gpio.o(i.drv_gpio_set_mode2) + i.drv_gpio_set_mode3 0x00016508 Section 0 drv_gpio.o(i.drv_gpio_set_mode3) + i.drv_gpio_set_output_data 0x00016518 Section 0 hal_gpio.o(i.drv_gpio_set_output_data) + drv_gpio_set_output_data 0x00016519 Thumb Code 26 hal_gpio.o(i.drv_gpio_set_output_data) + i.drv_gpio_set_pull_state 0x00016538 Section 0 drv_gpio.o(i.drv_gpio_set_pull_state) + i.drv_i2c_clear_m_it_pending_bit 0x00016668 Section 0 drv_i2c_master.o(i.drv_i2c_clear_m_it_pending_bit) + i.drv_i2c_clear_s_it_pending_bit 0x000166c8 Section 0 drv_i2c_slave.o(i.drv_i2c_clear_s_it_pending_bit) + i.drv_i2c_dma_callback 0x00016724 Section 0 drv_i2c_dma.o(i.drv_i2c_dma_callback) + drv_i2c_dma_callback 0x00016725 Thumb Code 38 drv_i2c_dma.o(i.drv_i2c_dma_callback) + i.drv_i2c_dma_init 0x00016758 Section 0 drv_i2c_dma.o(i.drv_i2c_dma_init) + i.drv_i2c_enable_rx_dma 0x00016804 Section 0 drv_i2c_dma.o(i.drv_i2c_enable_rx_dma) + i.drv_i2c_enable_tx_dma 0x0001681e Section 0 drv_i2c_dma.o(i.drv_i2c_enable_tx_dma) + i.drv_i2c_m_enable_intr 0x00016838 Section 0 drv_i2c_master.o(i.drv_i2c_m_enable_intr) + i.drv_i2c_m_set_callback 0x00016870 Section 0 drv_i2c_master.o(i.drv_i2c_m_set_callback) + i.drv_i2c_master_init 0x0001687c Section 0 drv_i2c_master.o(i.drv_i2c_master_init) + i.drv_i2c_master_read_dma 0x00016908 Section 0 drv_i2c_dma.o(i.drv_i2c_master_read_dma) + i.drv_i2c_master_write_dma 0x00016984 Section 0 drv_i2c_dma.o(i.drv_i2c_master_write_dma) + i.drv_i2c_master_write_read_cmd 0x000169c4 Section 0 drv_i2c_dma.o(i.drv_i2c_master_write_read_cmd) + drv_i2c_master_write_read_cmd 0x000169c5 Thumb Code 46 drv_i2c_dma.o(i.drv_i2c_master_write_read_cmd) + i.drv_i2c_s_enable_intr 0x000169f4 Section 0 drv_i2c_slave.o(i.drv_i2c_s_enable_intr) + i.drv_i2c_s_get_fifo_status 0x00016a28 Section 0 drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) + i.drv_i2c_s_set_callback 0x00016a44 Section 0 drv_i2c_slave.o(i.drv_i2c_s_set_callback) + i.drv_i2c_s_write_data 0x00016a50 Section 0 drv_i2c_slave.o(i.drv_i2c_s_write_data) + i.drv_i2c_set_dma_irq_callback 0x00016a70 Section 0 drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) + i.drv_i2c_slave_init 0x00016ac0 Section 0 drv_i2c_slave.o(i.drv_i2c_slave_init) + i.drv_i2c_slave_write_dma 0x00016b04 Section 0 drv_i2c_dma.o(i.drv_i2c_slave_write_dma) + i.drv_lcdc_config_420_to_444_mode 0x00016b28 Section 0 drv_lcdc.o(i.drv_lcdc_config_420_to_444_mode) + i.drv_lcdc_config_bypass 0x00016b40 Section 0 drv_lcdc.o(i.drv_lcdc_config_bypass) + i.drv_lcdc_config_cbcr 0x00016b58 Section 0 drv_lcdc.o(i.drv_lcdc_config_cbcr) + i.drv_lcdc_config_ccm 0x00016b70 Section 0 drv_lcdc.o(i.drv_lcdc_config_ccm) + i.drv_lcdc_config_disp_mode 0x00016ba0 Section 0 drv_lcdc.o(i.drv_lcdc_config_disp_mode) + i.drv_lcdc_config_dpi_polarity 0x00016bb6 Section 0 drv_lcdc.o(i.drv_lcdc_config_dpi_polarity) + i.drv_lcdc_config_dpi_timing 0x00016bda Section 0 drv_lcdc.o(i.drv_lcdc_config_dpi_timing) + i.drv_lcdc_config_endianness 0x00016c00 Section 0 drv_lcdc.o(i.drv_lcdc_config_endianness) + i.drv_lcdc_config_horiz_flip 0x00016c16 Section 0 drv_lcdc.o(i.drv_lcdc_config_horiz_flip) + i.drv_lcdc_config_input_size 0x00016c36 Section 0 drv_lcdc.o(i.drv_lcdc_config_input_size) + i.drv_lcdc_config_int 0x00016c42 Section 0 drv_lcdc.o(i.drv_lcdc_config_int) + i.drv_lcdc_config_int_single 0x00016c60 Section 0 drv_lcdc.o(i.drv_lcdc_config_int_single) + i.drv_lcdc_config_overwrite 0x00016c82 Section 0 drv_lcdc.o(i.drv_lcdc_config_overwrite) + i.drv_lcdc_config_overwrite_rgb 0x00016ca4 Section 0 drv_lcdc.o(i.drv_lcdc_config_overwrite_rgb) + i.drv_lcdc_config_partial_display_area 0x00016cb0 Section 0 drv_lcdc.o(i.drv_lcdc_config_partial_display_area) + i.drv_lcdc_config_partial_display_enable 0x00016cca Section 0 drv_lcdc.o(i.drv_lcdc_config_partial_display_enable) + i.drv_lcdc_config_src_parameter 0x00016cec Section 0 drv_lcdc.o(i.drv_lcdc_config_src_parameter) + i.drv_lcdc_config_thresh 0x00016d5e Section 0 drv_lcdc.o(i.drv_lcdc_config_thresh) + i.drv_lcdc_config_upscaler 0x00016d66 Section 0 drv_lcdc.o(i.drv_lcdc_config_upscaler) + i.drv_lcdc_config_yuv420_threshold 0x00016dc6 Section 0 drv_lcdc.o(i.drv_lcdc_config_yuv420_threshold) + i.drv_lcdc_ctrl_flow 0x00016dd0 Section 0 drv_lcdc.o(i.drv_lcdc_ctrl_flow) + i.drv_lcdc_enable_shadow_reg 0x00016de2 Section 0 drv_lcdc.o(i.drv_lcdc_enable_shadow_reg) + i.drv_lcdc_set_int 0x00016e04 Section 0 drv_lcdc.o(i.drv_lcdc_set_int) + i.drv_lcdc_start 0x00016e38 Section 0 drv_lcdc.o(i.drv_lcdc_start) + i.drv_lcdc_update_shadow_reg 0x00016e58 Section 0 drv_lcdc.o(i.drv_lcdc_update_shadow_reg) + i.drv_memc_bypass_fifo_empty 0x00016e64 Section 0 drv_memc.o(i.drv_memc_bypass_fifo_empty) + i.drv_memc_clear_status 0x00016e74 Section 0 drv_memc.o(i.drv_memc_clear_status) + i.drv_memc_enable_irq 0x00016e80 Section 0 drv_memc.o(i.drv_memc_enable_irq) + i.drv_memc_gen_a_tear_signal 0x00016ec0 Section 0 drv_memc.o(i.drv_memc_gen_a_tear_signal) + i.drv_memc_get_status 0x00016ecc Section 0 drv_memc.o(i.drv_memc_get_status) + i.drv_memc_rate_transfer_sel 0x00016ede Section 0 drv_memc.o(i.drv_memc_rate_transfer_sel) + i.drv_memc_sel_vsync 0x00016eee Section 0 drv_memc.o(i.drv_memc_sel_vsync) + i.drv_memc_set_data_mode 0x00016efc Section 0 drv_memc.o(i.drv_memc_set_data_mode) + i.drv_memc_set_tear_hwclr 0x00016f08 Section 0 drv_memc.o(i.drv_memc_set_tear_hwclr) + i.drv_memc_set_tear_mode 0x00016f18 Section 0 drv_memc.o(i.drv_memc_set_tear_mode) + i.drv_memc_set_tear_waveform 0x00016f28 Section 0 drv_memc.o(i.drv_memc_set_tear_waveform) + i.drv_memc_set_yuv420_cfg 0x00016f4c Section 0 drv_memc.o(i.drv_memc_set_yuv420_cfg) + i.drv_param_get_picture_quality_setting 0x00016f5c Section 0 drv_param_init.o(i.drv_param_get_picture_quality_setting) + i.drv_param_init_get_ccm 0x00016f6c Section 0 drv_param_init.o(i.drv_param_init_get_ccm) + i.drv_param_init_get_scld_filter_h 0x00016f74 Section 0 drv_param_init.o(i.drv_param_init_get_scld_filter_h) + i.drv_param_init_get_scld_filter_v 0x00016f88 Section 0 drv_param_init.o(i.drv_param_init_get_scld_filter_v) + i.drv_param_init_get_sclu_filter_h 0x00016f9c Section 0 drv_param_init.o(i.drv_param_init_get_sclu_filter_h) + i.drv_param_init_get_sclu_filter_v 0x00016fa4 Section 0 drv_param_init.o(i.drv_param_init_get_sclu_filter_v) + i.drv_param_init_set_ccm 0x00016fac Section 0 drv_param_init.o(i.drv_param_init_set_ccm) + i.drv_param_p2r_filter_init 0x00016fc0 Section 0 drv_param_init.o(i.drv_param_p2r_filter_init) + i.drv_param_yuv420_filter_init 0x00016ffc Section 0 drv_param_init.o(i.drv_param_yuv420_filter_init) + i.drv_phy_get_pll_para 0x00017030 Section 0 drv_phy_common.o(i.drv_phy_get_pll_para) + i.drv_phy_get_rate_para 0x00017090 Section 0 drv_phy_common.o(i.drv_phy_get_rate_para) + i.drv_phy_test_clear 0x000170e4 Section 0 drv_phy_common.o(i.drv_phy_test_clear) + i.drv_phy_test_lock 0x000170f4 Section 0 drv_phy_common.o(i.drv_phy_test_lock) + i.drv_phy_test_write_1_byte 0x0001710c Section 0 drv_phy_common.o(i.drv_phy_test_write_1_byte) + i.drv_phy_test_write_2_byte 0x0001712c Section 0 drv_phy_common.o(i.drv_phy_test_write_2_byte) + i.drv_phy_test_write_code 0x00017152 Section 0 drv_phy_common.o(i.drv_phy_test_write_code) + i.drv_phy_test_write_data 0x00017170 Section 0 drv_phy_common.o(i.drv_phy_test_write_data) + drv_phy_test_write_data 0x00017171 Thumb Code 32 drv_phy_common.o(i.drv_phy_test_write_data) + i.drv_pwr_set_cp_mode 0x00017190 Section 0 drv_pwr.o(i.drv_pwr_set_cp_mode) + i.drv_pwr_set_pvd_mode 0x000171b0 Section 0 drv_pwr.o(i.drv_pwr_set_pvd_mode) + i.drv_pwr_set_system_clk_src 0x000171cc Section 0 drv_pwr.o(i.drv_pwr_set_system_clk_src) + i.drv_rx_phy_test_clear 0x000171fc Section 0 drv_dsi_rx.o(i.drv_rx_phy_test_clear) + drv_rx_phy_test_clear 0x000171fd Thumb Code 12 drv_dsi_rx.o(i.drv_rx_phy_test_clear) + i.drv_rx_phy_test_lock 0x00017208 Section 0 drv_dsi_rx.o(i.drv_rx_phy_test_lock) + drv_rx_phy_test_lock 0x00017209 Thumb Code 16 drv_dsi_rx.o(i.drv_rx_phy_test_lock) + i.drv_rx_phy_test_write_1_byte 0x00017218 Section 0 drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) + drv_rx_phy_test_write_1_byte 0x00017219 Thumb Code 20 drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) + i.drv_rx_phy_test_write_2_byte 0x0001722c Section 0 drv_dsi_rx.o(i.drv_rx_phy_test_write_2_byte) + drv_rx_phy_test_write_2_byte 0x0001722d Thumb Code 22 drv_dsi_rx.o(i.drv_rx_phy_test_write_2_byte) + i.drv_rxbr_clear_pkt_buffer 0x00017242 Section 0 drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) + i.drv_rxbr_clear_status 0x00017248 Section 0 drv_rxbr.o(i.drv_rxbr_clear_status) + i.drv_rxbr_enable_irq 0x0001724c Section 0 drv_rxbr.o(i.drv_rxbr_enable_irq) + i.drv_rxbr_frame_drop_cfg 0x0001728c Section 0 drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) + i.drv_rxbr_get_clk 0x00017294 Section 0 drv_rxbr.o(i.drv_rxbr_get_clk) + i.drv_rxbr_get_col_addr 0x000172d0 Section 0 drv_rxbr.o(i.drv_rxbr_get_col_addr) + i.drv_rxbr_get_cur_hline_rcv_cnt 0x000172d4 Section 0 drv_rxbr.o(i.drv_rxbr_get_cur_hline_rcv_cnt) + i.drv_rxbr_get_hline_rcv_cfg 0x000172dc Section 0 drv_rxbr.o(i.drv_rxbr_get_hline_rcv_cfg) + i.drv_rxbr_get_int_source 0x000172ec Section 0 hal_internal_vsync.o(i.drv_rxbr_get_int_source) + drv_rxbr_get_int_source 0x000172ed Thumb Code 18 hal_internal_vsync.o(i.drv_rxbr_get_int_source) + i.drv_rxbr_get_page_addr 0x000172fe Section 0 drv_rxbr.o(i.drv_rxbr_get_page_addr) + i.drv_rxbr_get_status 0x00017302 Section 0 hal_dsi_rx_ctrl.o(i.drv_rxbr_get_status) + drv_rxbr_get_status 0x00017303 Thumb Code 18 hal_dsi_rx_ctrl.o(i.drv_rxbr_get_status) + i.drv_rxbr_get_status 0x00017314 Section 0 hal_internal_vsync.o(i.drv_rxbr_get_status) + drv_rxbr_get_status 0x00017315 Thumb Code 18 hal_internal_vsync.o(i.drv_rxbr_get_status) + i.drv_rxbr_hline_rcv0_cfg 0x00017326 Section 0 drv_rxbr.o(i.drv_rxbr_hline_rcv0_cfg) + i.drv_rxbr_hline_rcv_cfg 0x00017332 Section 0 drv_rxbr.o(i.drv_rxbr_hline_rcv_cfg) + i.drv_rxbr_set_ack_pkt_header 0x0001733a Section 0 drv_rxbr.o(i.drv_rxbr_set_ack_pkt_header) + i.drv_rxbr_set_cmd_filter 0x0001734e Section 0 drv_rxbr.o(i.drv_rxbr_set_cmd_filter) + i.drv_rxbr_set_color_format 0x0001741a Section 0 drv_rxbr.o(i.drv_rxbr_set_color_format) + i.drv_rxbr_set_inten 0x0001742e Section 0 drv_rxbr.o(i.drv_rxbr_set_inten) + i.drv_rxbr_set_usr_cfg 0x00017442 Section 0 drv_rxbr.o(i.drv_rxbr_set_usr_cfg) + i.drv_rxbr_set_usr_col 0x00017464 Section 0 drv_rxbr.o(i.drv_rxbr_set_usr_col) + i.drv_rxbr_set_usr_row 0x0001746c Section 0 drv_rxbr.o(i.drv_rxbr_set_usr_row) + i.drv_spi_m_read_data 0x00017474 Section 0 drv_spi_master.o(i.drv_spi_m_read_data) + i.drv_swire_set_int 0x00017494 Section 0 drv_swire.o(i.drv_swire_set_int) + i.drv_swire_set_power_down 0x000174dc Section 0 drv_swire.o(i.drv_swire_set_power_down) + i.drv_sys_cfg_clear_all_int 0x000174f8 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_clear_all_int) + i.drv_sys_cfg_clear_pending 0x00017504 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) + i.drv_sys_cfg_sel_ap_rst_lvl_trig 0x0001752c Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_lvl_trig) + i.drv_sys_cfg_sel_ap_rst_trig 0x00017544 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) + i.drv_sys_cfg_sel_gpio_group 0x00017560 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_gpio_group) + i.drv_sys_cfg_sel_int_trig 0x00017584 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_int_trig) + i.drv_sys_cfg_set_dma_rx_req 0x000175a8 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) + i.drv_sys_cfg_set_dma_tx_req 0x000175b8 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) + i.drv_sys_cfg_set_int 0x000175c8 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_set_int) + i.drv_timer_clear_status_flags 0x000175ec Section 0 drv_timer.o(i.drv_timer_clear_status_flags) + drv_timer_clear_status_flags 0x000175ed Thumb Code 26 drv_timer.o(i.drv_timer_clear_status_flags) + i.drv_timer_enable 0x00017606 Section 0 drv_timer.o(i.drv_timer_enable) + i.drv_timer_get_instance 0x00017628 Section 0 drv_timer.o(i.drv_timer_get_instance) + i.drv_timer_get_prescaler 0x00017638 Section 0 drv_timer.o(i.drv_timer_get_prescaler) + i.drv_timer_handle_interrupt 0x00017648 Section 0 drv_timer.o(i.drv_timer_handle_interrupt) + drv_timer_handle_interrupt 0x00017649 Thumb Code 54 drv_timer.o(i.drv_timer_handle_interrupt) + i.drv_timer_register_callback 0x00017684 Section 0 drv_timer.o(i.drv_timer_register_callback) + i.drv_timer_set_compare_val 0x00017698 Section 0 drv_timer.o(i.drv_timer_set_compare_val) + i.drv_timer_set_int 0x000176a8 Section 0 drv_timer.o(i.drv_timer_set_int) + i.drv_timer_set_prescaler 0x000176f0 Section 0 drv_timer.o(i.drv_timer_set_prescaler) + i.drv_tx_phy_test_clear 0x00017718 Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_clear) + drv_tx_phy_test_clear 0x00017719 Thumb Code 10 drv_dsi_tx.o(i.drv_tx_phy_test_clear) + i.drv_tx_phy_test_enter 0x00017722 Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_enter) + i.drv_tx_phy_test_exit 0x0001773e Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_exit) + i.drv_tx_phy_test_write_1_byte 0x0001775a Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) + drv_tx_phy_test_write_1_byte 0x0001775b Thumb Code 18 drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) + i.drv_tx_phy_test_write_2_byte 0x0001776c Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_write_2_byte) + drv_tx_phy_test_write_2_byte 0x0001776d Thumb Code 20 drv_dsi_tx.o(i.drv_tx_phy_test_write_2_byte) + i.drv_tx_phy_test_write_code 0x00017780 Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_write_code) + drv_tx_phy_test_write_code 0x00017781 Thumb Code 16 drv_dsi_tx.o(i.drv_tx_phy_test_write_code) + i.drv_vidc_clear_irq 0x00017790 Section 0 drv_vidc.o(i.drv_vidc_clear_irq) + i.drv_vidc_enable 0x00017798 Section 0 drv_vidc.o(i.drv_vidc_enable) + i.drv_vidc_enable_irq 0x000177b0 Section 0 drv_vidc.o(i.drv_vidc_enable_irq) + i.drv_vidc_get_int_source 0x000177f0 Section 0 drv_vidc.o(i.drv_vidc_get_int_source) + i.drv_vidc_module_enable 0x00017818 Section 0 drv_vidc.o(i.drv_vidc_module_enable) + i.drv_vidc_reset 0x0001785c Section 0 drv_vidc.o(i.drv_vidc_reset) + i.drv_vidc_set_dst_parameter 0x00017862 Section 0 drv_vidc.o(i.drv_vidc_set_dst_parameter) + i.drv_vidc_set_enh_chr 0x000178be Section 0 drv_vidc.o(i.drv_vidc_set_enh_chr) + i.drv_vidc_set_enh_chr2 0x000178cc Section 0 drv_vidc.o(i.drv_vidc_set_enh_chr2) + i.drv_vidc_set_enh_lum 0x000178de Section 0 drv_vidc.o(i.drv_vidc_set_enh_lum) + i.drv_vidc_set_gain 0x000178ec Section 0 drv_vidc.o(i.drv_vidc_set_gain) + i.drv_vidc_set_irqen 0x0001791c Section 0 drv_vidc.o(i.drv_vidc_set_irqen) + i.drv_vidc_set_p2r_hcoef0 0x00017930 Section 0 drv_vidc.o(i.drv_vidc_set_p2r_hcoef0) + i.drv_vidc_set_p2r_hcoef1 0x00017938 Section 0 drv_vidc.o(i.drv_vidc_set_p2r_hcoef1) + i.drv_vidc_set_p2r_hinitb 0x00017940 Section 0 drv_vidc.o(i.drv_vidc_set_p2r_hinitb) + i.drv_vidc_set_p2r_hinitr 0x00017968 Section 0 drv_vidc.o(i.drv_vidc_set_p2r_hinitr) + i.drv_vidc_set_p2r_step 0x00017990 Section 0 drv_vidc.o(i.drv_vidc_set_p2r_step) + i.drv_vidc_set_pu_ctrl 0x00017998 Section 0 drv_vidc.o(i.drv_vidc_set_pu_ctrl) + i.drv_vidc_set_pu_scld 0x000179b8 Section 0 drv_vidc.o(i.drv_vidc_set_pu_scld) + i.drv_vidc_set_scld_hcoef0 0x000179c6 Section 0 drv_vidc.o(i.drv_vidc_set_scld_hcoef0) + i.drv_vidc_set_scld_hcoef1 0x000179d0 Section 0 drv_vidc.o(i.drv_vidc_set_scld_hcoef1) + i.drv_vidc_set_scld_step 0x000179da Section 0 drv_vidc.o(i.drv_vidc_set_scld_step) + i.drv_vidc_set_scld_vcoef0 0x000179ec Section 0 drv_vidc.o(i.drv_vidc_set_scld_vcoef0) + i.drv_vidc_set_scld_vcoef1 0x000179f6 Section 0 drv_vidc.o(i.drv_vidc_set_scld_vcoef1) + i.drv_vidc_set_sclu_hcoef0c 0x00017a00 Section 0 drv_vidc.o(i.drv_vidc_set_sclu_hcoef0c) + i.drv_vidc_set_sclu_hcoef0y 0x00017a0a Section 0 drv_vidc.o(i.drv_vidc_set_sclu_hcoef0y) + i.drv_vidc_set_sclu_hcoef1c 0x00017a14 Section 0 drv_vidc.o(i.drv_vidc_set_sclu_hcoef1c) + i.drv_vidc_set_sclu_hcoef1y 0x00017a1e Section 0 drv_vidc.o(i.drv_vidc_set_sclu_hcoef1y) + i.drv_vidc_set_sclu_vcoef0c 0x00017a28 Section 0 drv_vidc.o(i.drv_vidc_set_sclu_vcoef0c) + i.drv_vidc_set_sclu_vcoef0y 0x00017a32 Section 0 drv_vidc.o(i.drv_vidc_set_sclu_vcoef0y) + i.drv_vidc_set_sclu_vcoef1c 0x00017a3c Section 0 drv_vidc.o(i.drv_vidc_set_sclu_vcoef1c) + i.drv_vidc_set_sclu_vcoef1y 0x00017a46 Section 0 drv_vidc.o(i.drv_vidc_set_sclu_vcoef1y) + i.drv_vidc_set_src_parameter 0x00017a50 Section 0 drv_vidc.o(i.drv_vidc_set_src_parameter) + i.drv_vidc_set_y4t2_hcoef0 0x00017a74 Section 0 drv_vidc.o(i.drv_vidc_set_y4t2_hcoef0) + i.drv_vidc_set_y4t2_hcoef1 0x00017a7e Section 0 drv_vidc.o(i.drv_vidc_set_y4t2_hcoef1) + i.drv_vidc_set_y4t2_vcoef0 0x00017a88 Section 0 drv_vidc.o(i.drv_vidc_set_y4t2_vcoef0) + i.drv_vidc_set_y4t2_vcoef1 0x00017a92 Section 0 drv_vidc.o(i.drv_vidc_set_y4t2_vcoef1) + i.drv_wdg_clear_counter 0x00017a9c Section 0 drv_wdg.o(i.drv_wdg_clear_counter) + i.drv_wdg_clear_edge_flag 0x00017aac Section 0 drv_wdg.o(i.drv_wdg_clear_edge_flag) + drv_wdg_clear_edge_flag 0x00017aad Thumb Code 12 drv_wdg.o(i.drv_wdg_clear_edge_flag) + i.drv_wdg_read_edge_flag 0x00017abc Section 0 drv_wdg.o(i.drv_wdg_read_edge_flag) + drv_wdg_read_edge_flag 0x00017abd Thumb Code 10 drv_wdg.o(i.drv_wdg_read_edge_flag) + i.drv_wdg_set_int 0x00017acc Section 0 drv_wdg.o(i.drv_wdg_set_int) + i.fls_clear_irq_status 0x00017b00 Section 0 drv_fls.o(i.fls_clear_irq_status) + i.fputc 0x00017b06 Section 0 tau_log.o(i.fputc) + i.hal_dsi_rx_ctrl_create_handle 0x00017b1c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) + i.hal_dsi_rx_ctrl_deinit 0x00017b4c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) + i.hal_dsi_rx_ctrl_dsc_async_handler 0x00017be8 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) + i.hal_dsi_rx_ctrl_gen_a_tear_signal 0x00017c6c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) + i.hal_dsi_rx_ctrl_get_max_ret_size 0x00017c94 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) + i.hal_dsi_rx_ctrl_init 0x00017cbc Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) + i.hal_dsi_rx_ctrl_init_clk 0x00017d20 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) + hal_dsi_rx_ctrl_init_clk 0x00017d21 Thumb Code 218 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) + i.hal_dsi_rx_ctrl_init_dsc_dec 0x00017e44 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsc_dec) + hal_dsi_rx_ctrl_init_dsc_dec 0x00017e45 Thumb Code 66 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsc_dec) + i.hal_dsi_rx_ctrl_init_dsi_rx 0x00017e8c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) + hal_dsi_rx_ctrl_init_dsi_rx 0x00017e8d Thumb Code 172 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) + i.hal_dsi_rx_ctrl_init_memc 0x00017f58 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) + hal_dsi_rx_ctrl_init_memc 0x00017f59 Thumb Code 186 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) + i.hal_dsi_rx_ctrl_init_rxbr 0x0001801c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) + hal_dsi_rx_ctrl_init_rxbr 0x0001801d Thumb Code 314 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) + i.hal_dsi_rx_ctrl_init_vidc 0x00018168 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) + hal_dsi_rx_ctrl_init_vidc 0x00018169 Thumb Code 892 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) + i.hal_dsi_rx_ctrl_pre_init_pps 0x000184f0 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_pre_init_pps) + i.hal_dsi_rx_ctrl_send_ack_cmd 0x0001852c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) + i.hal_dsi_rx_ctrl_set_cus_sync_line 0x0001861c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) + i.hal_dsi_rx_ctrl_set_hw_tear_mode 0x00018650 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode) + i.hal_dsi_rx_ctrl_set_ipi_cfg 0x00018684 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) + hal_dsi_rx_ctrl_set_ipi_cfg 0x00018685 Thumb Code 48 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) + i.hal_dsi_rx_ctrl_set_rxbr_clk 0x000186b8 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) + hal_dsi_rx_ctrl_set_rxbr_clk 0x000186b9 Thumb Code 114 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) + i.hal_dsi_rx_ctrl_set_sw_tear_mode 0x0001872c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) + i.hal_dsi_rx_ctrl_start 0x00018760 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) + i.hal_dsi_rx_ctrl_stop 0x0001879c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) + i.hal_dsi_rx_ctrl_toggle_resolution 0x000187e4 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) + i.hal_dsi_tx_calc_video_chunks 0x00018804 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) + hal_dsi_tx_calc_video_chunks 0x00018805 Thumb Code 384 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) + i.hal_dsi_tx_config_params_for_lane_rate 0x00018994 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) + hal_dsi_tx_config_params_for_lane_rate 0x00018995 Thumb Code 42 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) + i.hal_dsi_tx_count_lane_rate 0x000189c8 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) + hal_dsi_tx_count_lane_rate 0x000189c9 Thumb Code 950 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) + i.hal_dsi_tx_ctrl_create_handle 0x00018d88 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) + i.hal_dsi_tx_ctrl_deinit 0x00018db4 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) + i.hal_dsi_tx_ctrl_enter_init_panel_mode 0x00018dfc Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) + i.hal_dsi_tx_ctrl_exit_init_panel_mode 0x00018e48 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) + i.hal_dsi_tx_ctrl_init 0x00018e6c Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) + i.hal_dsi_tx_ctrl_init_clk 0x00018f30 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) + hal_dsi_tx_ctrl_init_clk 0x00018f31 Thumb Code 36 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) + i.hal_dsi_tx_ctrl_panel_reset_pin 0x00018f54 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_panel_reset_pin) + i.hal_dsi_tx_ctrl_set_ccm 0x00018f60 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) + i.hal_dsi_tx_ctrl_set_overwrite_rgb 0x00018f80 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) + i.hal_dsi_tx_ctrl_set_partial_disp 0x00018f94 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp) + i.hal_dsi_tx_ctrl_set_partial_disp_area 0x00018fa4 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp_area) + i.hal_dsi_tx_ctrl_start 0x00018fc8 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) + i.hal_dsi_tx_ctrl_stop 0x00019028 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) + i.hal_dsi_tx_ctrl_write_array_cmd 0x0001906c Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) + i.hal_dsi_tx_ctrl_write_cmd 0x00019208 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) + i.hal_dsi_tx_init_data_mode 0x00019358 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) + hal_dsi_tx_init_data_mode 0x00019359 Thumb Code 36 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) + i.hal_dsi_tx_init_dpi_cfg 0x00019380 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) + hal_dsi_tx_init_dpi_cfg 0x00019381 Thumb Code 42 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) + i.hal_dsi_tx_init_interrupt 0x000193b0 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) + hal_dsi_tx_init_interrupt 0x000193b1 Thumb Code 28 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) + i.hal_dsi_tx_init_phy_cfg 0x000193d0 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) + hal_dsi_tx_init_phy_cfg 0x000193d1 Thumb Code 28 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) + i.hal_dsi_tx_init_remains 0x000193f0 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) + hal_dsi_tx_init_remains 0x000193f1 Thumb Code 142 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) + i.hal_dsi_tx_init_video_mode 0x00019484 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) + hal_dsi_tx_init_video_mode 0x00019485 Thumb Code 82 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) + i.hal_dsi_tx_send_cmd 0x000194dc Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) + hal_dsi_tx_send_cmd 0x000194dd Thumb Code 60 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) + i.hal_gpio_ctrl_eint 0x00019520 Section 0 hal_gpio.o(i.hal_gpio_ctrl_eint) + i.hal_gpio_get_input_data 0x00019538 Section 0 hal_gpio.o(i.hal_gpio_get_input_data) + i.hal_gpio_init_eint 0x0001954c Section 0 hal_gpio.o(i.hal_gpio_init_eint) + i.hal_gpio_init_input 0x0001958c Section 0 hal_gpio.o(i.hal_gpio_init_input) + i.hal_gpio_init_output 0x000195ac Section 0 hal_gpio.o(i.hal_gpio_init_output) + i.hal_gpio_reg_eint_cb 0x000195d4 Section 0 hal_gpio.o(i.hal_gpio_reg_eint_cb) + i.hal_gpio_set_ap_reset_int 0x000195ec Section 0 hal_gpio.o(i.hal_gpio_set_ap_reset_int) + i.hal_gpio_set_mode 0x0001963c Section 0 hal_gpio.o(i.hal_gpio_set_mode) + i.hal_gpio_set_output_data 0x0001969c Section 0 hal_gpio.o(i.hal_gpio_set_output_data) + i.hal_gpio_set_pull_state 0x000196a4 Section 0 hal_gpio.o(i.hal_gpio_set_pull_state) + i.hal_i2c_m_dma_init 0x000196c4 Section 0 hal_i2c_master.o(i.hal_i2c_m_dma_init) + i.hal_i2c_m_dma_read 0x00019730 Section 0 hal_i2c_master.o(i.hal_i2c_m_dma_read) + i.hal_i2c_m_dma_write 0x0001975c Section 0 hal_i2c_master.o(i.hal_i2c_m_dma_write) + i.hal_i2c_m_transfer_complate 0x00019784 Section 0 hal_i2c_master.o(i.hal_i2c_m_transfer_complate) + i.hal_i2c_master_irq_callback 0x000197a4 Section 0 hal_i2c_master.o(i.hal_i2c_master_irq_callback) + hal_i2c_master_irq_callback 0x000197a5 Thumb Code 24 hal_i2c_master.o(i.hal_i2c_master_irq_callback) + i.hal_i2c_s_dma_user_callback 0x000197c4 Section 0 hal_i2c_slave.o(i.hal_i2c_s_dma_user_callback) + hal_i2c_s_dma_user_callback 0x000197c5 Thumb Code 12 hal_i2c_slave.o(i.hal_i2c_s_dma_user_callback) + i.hal_i2c_s_dma_write 0x000197d4 Section 0 hal_i2c_slave.o(i.hal_i2c_s_dma_write) + i.hal_i2c_s_init 0x00019810 Section 0 hal_i2c_slave.o(i.hal_i2c_s_init) + i.hal_i2c_s_nonblocking_read 0x0001987c Section 0 hal_i2c_slave.o(i.hal_i2c_s_nonblocking_read) + i.hal_i2c_s_set_transfer 0x00019890 Section 0 hal_i2c_slave.o(i.hal_i2c_s_set_transfer) + i.hal_i2c_slave_irq_callback 0x0001989c Section 0 hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) + hal_i2c_slave_irq_callback 0x0001989d Thumb Code 306 hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) + i.hal_internal_init_memc 0x000199ec Section 0 hal_internal_vsync.o(i.hal_internal_init_memc) + i.hal_internal_sync_get_fb_setting 0x00019a9c Section 0 hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) + i.hal_internal_sync_input_resolution_change 0x00019aac Section 0 hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) + i.hal_internal_sync_set_fb_setting_manual 0x00019cf8 Section 0 hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual) + i.hal_internal_vsync_deinit 0x00019e80 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_deinit) + i.hal_internal_vsync_get_rx_state 0x00019e9c Section 0 hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) + i.hal_internal_vsync_get_sync_line 0x00019ea8 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) + i.hal_internal_vsync_get_tx_state 0x00019ec4 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) + i.hal_internal_vsync_get_y2t4_use_sclu 0x00019ed0 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_get_y2t4_use_sclu) + i.hal_internal_vsync_init_rx 0x00019ef0 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_init_rx) + i.hal_internal_vsync_init_tx 0x00019fac Section 0 hal_internal_vsync.o(i.hal_internal_vsync_init_tx) + i.hal_internal_vsync_set_auto_hw_filter 0x0001a050 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) + i.hal_internal_vsync_set_rx_state 0x0001a16c Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) + i.hal_internal_vsync_set_sync_line 0x0001a184 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) + i.hal_internal_vsync_set_tear_mode 0x0001a1a4 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) + i.hal_internal_vsync_set_tx_state 0x0001a1ec Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) + i.hal_lcdc_config_ccm 0x0001a230 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) + hal_lcdc_config_ccm 0x0001a231 Thumb Code 30 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) + i.hal_lcdc_config_remains 0x0001a254 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) + hal_lcdc_config_remains 0x0001a255 Thumb Code 80 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) + i.hal_lcdc_config_rgb_to_pentile 0x0001a2a8 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_rgb_to_pentile) + hal_lcdc_config_rgb_to_pentile 0x0001a2a9 Thumb Code 14 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_rgb_to_pentile) + i.hal_lcdc_config_upscaler 0x0001a2bc Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) + hal_lcdc_config_upscaler 0x0001a2bd Thumb Code 444 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) + i.hal_lcdc_config_yuv_to_rgb 0x0001a484 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_yuv_to_rgb) + hal_lcdc_config_yuv_to_rgb 0x0001a485 Thumb Code 26 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_yuv_to_rgb) + i.hal_lcdc_init_cfg 0x0001a4a4 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) + hal_lcdc_init_cfg 0x0001a4a5 Thumb Code 58 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) + i.hal_lcdc_init_clk 0x0001a4e0 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) + hal_lcdc_init_clk 0x0001a4e1 Thumb Code 376 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) + i.hal_lcdc_init_interrupt 0x0001a660 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) + hal_lcdc_init_interrupt 0x0001a661 Thumb Code 58 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) + i.hal_spi_m_clear_rxfifo 0x0001a6a0 Section 0 hal_spi_master.o(i.hal_spi_m_clear_rxfifo) + i.hal_swire_open 0x0001a6ae Section 0 hal_swire.o(i.hal_swire_open) + i.hal_system_enable_systick 0x0001a6c4 Section 0 hal_system.o(i.hal_system_enable_systick) + i.hal_system_init 0x0001a6cc Section 0 hal_system.o(i.hal_system_init) + i.hal_system_init_console 0x0001a754 Section 0 hal_system.o(i.hal_system_init_console) + i.hal_system_set_pvd 0x0001a770 Section 0 hal_system.o(i.hal_system_set_pvd) + i.hal_system_set_vcc 0x0001a778 Section 0 hal_system.o(i.hal_system_set_vcc) + i.hal_timer_init 0x0001a780 Section 0 hal_timer.o(i.hal_timer_init) + i.hal_timer_start 0x0001a79c Section 0 hal_timer.o(i.hal_timer_start) + i.hal_timer_stop 0x0001a7e4 Section 0 hal_timer.o(i.hal_timer_stop) + i.hal_uart_init 0x0001a80c Section 0 hal_uart.o(i.hal_uart_init) + i.hal_uart_transmit_blocking 0x0001a898 Section 0 hal_uart.o(i.hal_uart_transmit_blocking) + i.handle_init 0x0001a8a8 Section 0 irq_redirect .o(i.handle_init) + i.init_mipi_tx 0x0001a9b0 Section 0 ap_demo.o(i.init_mipi_tx) + init_mipi_tx 0x0001a9b1 Thumb Code 100 ap_demo.o(i.init_mipi_tx) + i.init_panel 0x0001aa18 Section 0 ap_demo.o(i.init_panel) + init_panel 0x0001aa19 Thumb Code 134 ap_demo.o(i.init_panel) + i.main 0x0001aad0 Section 0 main.o(i.main) + i.open_mipi_rx 0x0001aadc Section 0 ap_demo.o(i.open_mipi_rx) + open_mipi_rx 0x0001aadd Thumb Code 140 ap_demo.o(i.open_mipi_rx) + i.pps_update_handle 0x0001ab80 Section 0 ap_demo.o(i.pps_update_handle) + pps_update_handle 0x0001ab81 Thumb Code 78 ap_demo.o(i.pps_update_handle) + i.rx_get_dcs_packet_data 0x0001abd4 Section 0 hal_internal_vsync.o(i.rx_get_dcs_packet_data) + rx_get_dcs_packet_data 0x0001abd5 Thumb Code 740 hal_internal_vsync.o(i.rx_get_dcs_packet_data) + i.rx_partial_update 0x0001afe4 Section 0 hal_internal_vsync.o(i.rx_partial_update) + rx_partial_update 0x0001afe5 Thumb Code 302 hal_internal_vsync.o(i.rx_partial_update) + i.rx_receive_packet 0x0001b120 Section 0 hal_internal_vsync.o(i.rx_receive_packet) + rx_receive_packet 0x0001b121 Thumb Code 90 hal_internal_vsync.o(i.rx_receive_packet) + i.rx_receive_pps 0x0001b184 Section 0 hal_internal_vsync.o(i.rx_receive_pps) + rx_receive_pps 0x0001b185 Thumb Code 266 hal_internal_vsync.o(i.rx_receive_pps) + i.send_panel_init_code 0x0001b304 Section 0 ap_demo.o(i.send_panel_init_code) + send_panel_init_code 0x0001b305 Thumb Code 42 ap_demo.o(i.send_panel_init_code) + i.soft_disable_mipi_timer_init 0x0001b330 Section 0 ap_demo.o(i.soft_disable_mipi_timer_init) + soft_disable_mipi_timer_init 0x0001b331 Thumb Code 32 ap_demo.o(i.soft_disable_mipi_timer_init) + i.soft_gen_te 0x0001b390 Section 0 hal_internal_vsync.o(i.soft_gen_te) + soft_gen_te 0x0001b391 Thumb Code 116 hal_internal_vsync.o(i.soft_gen_te) + i.soft_timer3_cb 0x0001b41c Section 0 ap_demo.o(i.soft_timer3_cb) + soft_timer3_cb 0x0001b41d Thumb Code 36 ap_demo.o(i.soft_timer3_cb) + i.tp_heartbeat_exec 0x0001b44c Section 0 ap_demo.o(i.tp_heartbeat_exec) + i.tx_display_on 0x0001b494 Section 0 ap_demo.o(i.tx_display_on) + tx_display_on 0x0001b495 Thumb Code 16 ap_demo.o(i.tx_display_on) + i.tx_panel_reset 0x0001b4a8 Section 0 ap_demo.o(i.tx_panel_reset) + tx_panel_reset 0x0001b4a9 Thumb Code 40 ap_demo.o(i.tx_panel_reset) + i.vpre_err_reset 0x0001b4d0 Section 0 hal_internal_vsync.o(i.vpre_err_reset) + vpre_err_reset 0x0001b4d1 Thumb Code 184 hal_internal_vsync.o(i.vpre_err_reset) + i.vsync_set_te_mode 0x0001b5a0 Section 0 hal_internal_vsync.o(i.vsync_set_te_mode) + vsync_set_te_mode 0x0001b5a1 Thumb Code 254 hal_internal_vsync.o(i.vsync_set_te_mode) + .constdata 0x0001b73c Section 236 ap_demo.o(.constdata) + g_cus_rx_dcs_execute_table 0x0001b73c Data 108 ap_demo.o(.constdata) + .constdata 0x0001b828 Section 8528 app_tp_for_custom_s8.o(.constdata) + .constdata 0x0001d978 Section 210 hal_gpio.o(.constdata) + s_gpio_map 0x0001d978 Data 120 hal_gpio.o(.constdata) + s_gpio_perf 0x0001d9f0 Data 90 hal_gpio.o(.constdata) + .constdata 0x0001da4c Section 272 drv_param_init.o(.constdata) + .constdata 0x0001db5c Section 390 drv_phy_common.o(.constdata) + phy_para_mapping_h 0x0001db5c Data 184 drv_phy_common.o(.constdata) + phy_para_mapping_l 0x0001dc14 Data 128 drv_phy_common.o(.constdata) + phy_data_high_map 0x0001dc94 Data 48 drv_phy_common.o(.constdata) + phy_data_lp_map 0x0001dcc4 Data 30 drv_phy_common.o(.constdata) + .conststring 0x0001dce4 Section 72 hal_dsi_rx_ctrl.o(.conststring) + .conststring 0x0001dd2c Section 296 hal_internal_vsync.o(.conststring) + .ARM.__AT_0x00070100 0x00070100 Section 192 irq_redirect .o(.ARM.__AT_0x00070100) + .data 0x000701d0 Section 10009 ap_demo.o(.data) + start_display_on 0x000701d0 Data 1 ap_demo.o(.data) + g_need_enter_sleep_mode 0x000701d1 Data 1 ap_demo.o(.data) + g_mipi_path_off 0x000701d2 Data 1 ap_demo.o(.data) + phone_off_flag 0x000701d3 Data 1 ap_demo.o(.data) + g_exit_sleep_mode 0x000701d4 Data 1 ap_demo.o(.data) + panel_display_done 0x000701d5 Data 1 ap_demo.o(.data) + g_calibration_flag 0x000701da Data 1 ap_demo.o(.data) + b3_read_flag 0x000701db Data 1 ap_demo.o(.data) + c8_read_flag 0x000701dc Data 1 ap_demo.o(.data) + c9_read_flag 0x000701dd Data 1 ap_demo.o(.data) + bl_adj_flag 0x000701e0 Data 1 ap_demo.o(.data) + flag_5a 0x000701e2 Data 1 ap_demo.o(.data) + g_rx_ctrl_handle 0x000701f4 Data 4 ap_demo.o(.data) + g_tx_ctrl_handle 0x000701f8 Data 4 ap_demo.o(.data) + value_reg_df 0x00070204 Data 4 ap_demo.o(.data) + .data 0x000728ea Section 228 app_tp_for_custom_s8.o(.data) + app_tp_count 0x000728f4 Data 1 app_tp_for_custom_s8.o(.data) + phone_85_flag 0x000728f5 Data 1 app_tp_for_custom_s8.o(.data) + phone_F6_flag 0x000728f6 Data 1 app_tp_for_custom_s8.o(.data) + phone_E4_flag 0x000728f7 Data 1 app_tp_for_custom_s8.o(.data) + phone_72_flag 0x000728f8 Data 1 app_tp_for_custom_s8.o(.data) + phone_75_flag 0x000728f9 Data 1 app_tp_for_custom_s8.o(.data) + phone_92_flag 0x000728fa Data 1 app_tp_for_custom_s8.o(.data) + phone_74_flag 0x000728fb Data 1 app_tp_for_custom_s8.o(.data) + u16CoordY 0x000728fe Data 2 app_tp_for_custom_s8.o(.data) + u16CoordX 0x00072900 Data 2 app_tp_for_custom_s8.o(.data) + u16CoordY_back 0x00072902 Data 2 app_tp_for_custom_s8.o(.data) + u16CoordX_back 0x00072904 Data 2 app_tp_for_custom_s8.o(.data) + .data 0x000729ce Section 1 app_tp_for_custom_s8.o(.data) + .data 0x000729cf Section 1 app_tp_for_custom_s8.o(.data) + .data 0x000729d0 Section 1 app_tp_for_custom_s8.o(.data) + .data 0x000729d1 Section 3 app_tp_for_custom_s8.o(.data) + .data 0x000729d4 Section 5 app_tp_for_custom_s8.o(.data) + .data 0x000729dc Section 48 app_tp_for_custom_s8.o(.data) + .data 0x00072a0c Section 49 app_tp_transfer.o(.data) + s_spim_write 0x00072a0c Data 1 app_tp_transfer.o(.data) + s_screen_int_flag 0x00072a0d Data 1 app_tp_transfer.o(.data) + s_phone_reset_flag 0x00072a0e Data 1 app_tp_transfer.o(.data) + s_screen_int_transfer_status 0x00072a0f Data 1 app_tp_transfer.o(.data) + s_screen_const_transfer_count 0x00072a11 Data 1 app_tp_transfer.o(.data) + screen_int_transfer_count 0x00072a12 Data 1 app_tp_transfer.o(.data) + screen_int_transfer_buffer_ready 0x00072a13 Data 1 app_tp_transfer.o(.data) + .data 0x00072a40 Section 8 hal_dsi_rx_ctrl.o(.data) + g_hw_auto_filter 0x00072a40 Data 1 hal_dsi_rx_ctrl.o(.data) + g_esc_clk 0x00072a44 Data 4 hal_dsi_rx_ctrl.o(.data) + .data 0x00072a48 Section 1 hal_i2c_master.o(.data) + s_i2c_m_transfer_end 0x00072a48 Data 1 hal_i2c_master.o(.data) + .data 0x00072a4c Section 28 hal_i2c_slave.o(.data) + s_txbuffer_complate 0x00072a4c Data 1 hal_i2c_slave.o(.data) + s_i2c_s_dma_end 0x00072a4d Data 1 hal_i2c_slave.o(.data) + s_i2c_s_receive_cnt 0x00072a4e Data 1 hal_i2c_slave.o(.data) + s_hal_slave_rxbuffer 0x00072a50 Data 4 hal_i2c_slave.o(.data) + s_hal_slave_rxbuffer_size 0x00072a54 Data 4 hal_i2c_slave.o(.data) + hal_i2c_s_callback 0x00072a58 Data 4 hal_i2c_slave.o(.data) + s_receive_count 0x00072a5c Data 4 hal_i2c_slave.o(.data) + s_tx_buffer_t 0x00072a60 Data 4 hal_i2c_slave.o(.data) + tx_sum 0x00072a64 Data 4 hal_i2c_slave.o(.data) + .data 0x00072a68 Section 18 norflash.o(.data) + tmprg 0x00072a70 Data 4 norflash.o(.data) + .data 0x00072a7c Section 12 drv_common.o(.data) + s_my_tick 0x00072a7c Data 4 drv_common.o(.data) + .data 0x00072a88 Section 4 drv_gpio.o(.data) + g_ap_reset_cb 0x00072a88 Data 4 drv_gpio.o(.data) + .data 0x00072a8c Section 8 drv_i2c_dma.o(.data) + i2c0_dma_callback 0x00072a8c Data 4 drv_i2c_dma.o(.data) + i2c1_dma_callback 0x00072a90 Data 4 drv_i2c_dma.o(.data) + .data 0x00072a94 Section 4 drv_i2c_master.o(.data) + i2c1_intr_callback 0x00072a94 Data 4 drv_i2c_master.o(.data) + .data 0x00072a98 Section 8 drv_i2c_slave.o(.data) + i2c0_intr_callback 0x00072a98 Data 4 drv_i2c_slave.o(.data) + .data 0x00072aa0 Section 1612 drv_param_init.o(.data) + .data 0x000730ec Section 4 drv_spi_master.o(.data) + SPIM_intr_callback 0x000730ec Data 4 drv_spi_master.o(.data) + .data 0x000730f0 Section 8 drv_swire.o(.data) + s_swire_cb 0x000730f0 Data 8 drv_swire.o(.data) + .data 0x000730f8 Section 1 drv_sys_cfg.o(.data) + sg_ap_rstn_trigger_type 0x000730f8 Data 1 drv_sys_cfg.o(.data) + .data 0x000730fc Section 80 drv_timer.o(.data) + sg_timer_info 0x000730fc Data 80 drv_timer.o(.data) + .data 0x0007314c Section 4 hal_internal_vsync.o(.data) + sg_cur_te_info 0x0007314c Data 4 hal_internal_vsync.o(.data) + .data 0x00073150 Section 8 drv_chip_info.o(.data) + sg_chip_ver 0x00073150 Data 1 drv_chip_info.o(.data) + sg_3k_flag 0x00073154 Data 4 drv_chip_info.o(.data) + .data 0x00073158 Section 12 drv_pwm.o(.data) + s_pwm_type 0x00073158 Data 1 drv_pwm.o(.data) + s_pwm_cb 0x0007315c Data 8 drv_pwm.o(.data) + .data 0x00073164 Section 8 drv_uart.o(.data) + s_UartFcrReg 0x00073164 Data 4 drv_uart.o(.data) + uart_userData 0x00073168 Data 4 drv_uart.o(.data) + .data 0x0007316c Section 12 drv_wdg.o(.data) + sg_wdg_repeat 0x0007316c Data 1 drv_wdg.o(.data) + sg_wdg_cb 0x00073170 Data 8 drv_wdg.o(.data) + .data 0x00073178 Section 4 stdout.o(.data) + .bss 0x0007317c Section 412 app_tp_transfer.o(.bss) + s_screen_read_buffer 0x0007317c Data 200 app_tp_transfer.o(.bss) + s_phone_read_buffer 0x00073244 Data 200 app_tp_transfer.o(.bss) + .bss 0x00073318 Section 184 hal_dsi_rx_ctrl.o(.bss) + g_rx_ctrl_handle 0x00073318 Data 184 hal_dsi_rx_ctrl.o(.bss) + .bss 0x000733d0 Section 64 hal_dsi_tx_ctrl.o(.bss) + g_tx_ctrl_handle 0x000733d0 Data 64 hal_dsi_tx_ctrl.o(.bss) + .bss 0x00073410 Section 256 tau_log.o(.bss) + .bss 0x00073510 Section 60 hal_uart.o(.bss) + .bss 0x0007354c Section 24 drv_dma.o(.bss) + s_dma_handle 0x0007354c Data 24 drv_dma.o(.bss) + .bss 0x00073564 Section 64 drv_gpio.o(.bss) + s_gpio_cb 0x00073564 Data 64 drv_gpio.o(.bss) + .bss 0x000735a4 Section 24 drv_i2c_dma.o(.bss) + i2c0_dma_slave_handle 0x000735a4 Data 12 drv_i2c_dma.o(.bss) + i2c1_dma_master_handle 0x000735b0 Data 12 drv_i2c_dma.o(.bss) + .bss 0x000735bc Section 2764 dcs_packet_fifo.o(.bss) + .bss 0x00074088 Section 2408 hal_internal_vsync.o(.bss) + g_vsync_hande 0x00074088 Data 72 hal_internal_vsync.o(.bss) + g_dcs_execute_table 0x000740d0 Data 2048 hal_internal_vsync.o(.bss) + g_imm_buffer 0x000748d0 Data 255 hal_internal_vsync.o(.bss) + sg_te_info 0x000749d0 Data 12 hal_internal_vsync.o(.bss) + g_imm_packet 0x000749dc Data 20 hal_internal_vsync.o(.bss) + .bss 0x000749f0 Section 32 hal_spi_slave.o(.bss) + STACK 0x00074a10 Section 4096 startup_armcm0.o(STACK) + + Global Symbols + + Symbol Name Value Ov Type Size Object(Section) + + BuildAttributes$$THM_ISAv3M$S$PE$A:L22$X:L11$S22$IEEE1$IW$USESV6$~STKCKD$USESV7$~SHL$OTIME$ROPI$IEEEJ$EBA8$MICROLIB$REQ8$PRES8$EABIv2 0x00000000 Number 0 anon$$obj.o ABSOLUTE + __ARM_use_no_argv 0x00000000 Number 0 main.o ABSOLUTE + _printf_a 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_c 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_charcount 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_d 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_e 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_f 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_flags 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_fp_dec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_fp_hex 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_g 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_i 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_int_dec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_l 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_lc 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_ll 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_lld 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_lli 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_llo 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_llu 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_llx 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_longlong_dec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_longlong_hex 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_longlong_oct 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_ls 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_mbtowc 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_n 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_o 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_p 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_percent 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_pre_padding 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_return_value 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_s 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_sizespec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_str 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_truncate_signed 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_truncate_unsigned 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_u 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_wc 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_wctomb 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_widthprec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_x 0x00000000 Number 0 stubs.o ABSOLUTE + __cpp_initialize__aeabi_ - Undefined Weak Reference + __cxa_finalize - Undefined Weak Reference + _clock_init - Undefined Weak Reference + _microlib_exit - Undefined Weak Reference + __Vectors_Size 0x000000c0 Number 0 startup_armcm0.o ABSOLUTE + __Vectors 0x00010000 Data 4 startup_armcm0.o(RESET) + __Vectors_End 0x000100c0 Data 0 startup_armcm0.o(RESET) + __main 0x000100c1 Thumb Code 0 entry.o(.ARM.Collect$$$$00000000) + _main_stk 0x000100c1 Thumb Code 0 entry2.o(.ARM.Collect$$$$00000001) + _main_scatterload 0x000100c5 Thumb Code 0 entry5.o(.ARM.Collect$$$$00000004) + __main_after_scatterload 0x000100c9 Thumb Code 0 entry5.o(.ARM.Collect$$$$00000004) + _main_clock 0x000100c9 Thumb Code 0 entry7b.o(.ARM.Collect$$$$00000008) + _main_cpp_init 0x000100c9 Thumb Code 0 entry8b.o(.ARM.Collect$$$$0000000A) + _main_init 0x000100c9 Thumb Code 0 entry9a.o(.ARM.Collect$$$$0000000B) + __rt_final_cpp 0x000100d1 Thumb Code 0 entry10a.o(.ARM.Collect$$$$0000000D) + __rt_final_exit 0x000100d1 Thumb Code 0 entry11a.o(.ARM.Collect$$$$0000000F) + Reset_Handler 0x000100d5 Thumb Code 28 startup_armcm0.o(.text) + NMI_Handler 0x000100f1 Thumb Code 2 startup_armcm0.o(.text) + SVC_Handler 0x000100f5 Thumb Code 2 startup_armcm0.o(.text) + PendSV_Handler 0x000100f7 Thumb Code 2 startup_armcm0.o(.text) + OTP_IRQn_Handler 0x00010123 Thumb Code 2 startup_armcm0.o(.text) + PVD_IRQn_Handler 0x00010127 Thumb Code 2 startup_armcm0.o(.text) + __aeabi_uidiv 0x0001014d Thumb Code 0 uidiv.o(.text) + __aeabi_uidivmod 0x0001014d Thumb Code 44 uidiv.o(.text) + __aeabi_idiv 0x00010179 Thumb Code 0 idiv.o(.text) + __aeabi_idivmod 0x00010179 Thumb Code 40 idiv.o(.text) + __aeabi_memcpy 0x000101a1 Thumb Code 36 memcpya.o(.text) + __aeabi_memcpy4 0x000101a1 Thumb Code 0 memcpya.o(.text) + __aeabi_memcpy8 0x000101a1 Thumb Code 0 memcpya.o(.text) + __aeabi_memset 0x000101c5 Thumb Code 14 memseta.o(.text) + __aeabi_memset4 0x000101c5 Thumb Code 0 memseta.o(.text) + __aeabi_memset8 0x000101c5 Thumb Code 0 memseta.o(.text) + __aeabi_memclr 0x000101d3 Thumb Code 4 memseta.o(.text) + __aeabi_memclr4 0x000101d3 Thumb Code 0 memseta.o(.text) + __aeabi_memclr8 0x000101d3 Thumb Code 0 memseta.o(.text) + _memset$wrapper 0x000101d7 Thumb Code 18 memseta.o(.text) + __aeabi_fadd 0x000101e9 Thumb Code 162 fadd.o(.text) + __aeabi_fsub 0x0001028b Thumb Code 8 fadd.o(.text) + __aeabi_frsub 0x00010293 Thumb Code 8 fadd.o(.text) + __aeabi_fmul 0x0001029b Thumb Code 122 fmul.o(.text) + __aeabi_fdiv 0x00010315 Thumb Code 124 fdiv.o(.text) + __ARM_scalbnf 0x00010391 Thumb Code 24 fscalb.o(.text) + scalbnf 0x00010391 Thumb Code 0 fscalb.o(.text) + __aeabi_dadd 0x000103a9 Thumb Code 328 dadd.o(.text) + __aeabi_dsub 0x000104f1 Thumb Code 12 dadd.o(.text) + __aeabi_drsub 0x000104fd Thumb Code 12 dadd.o(.text) + __aeabi_i2f 0x0001050d Thumb Code 22 fflti.o(.text) + __aeabi_ui2f 0x00010523 Thumb Code 14 ffltui.o(.text) + __aeabi_ui2d 0x00010531 Thumb Code 24 dfltui.o(.text) + __aeabi_f2iz 0x0001054d Thumb Code 50 ffixi.o(.text) + __aeabi_f2uiz 0x0001057f Thumb Code 40 ffixui.o(.text) + __aeabi_d2iz 0x000105a9 Thumb Code 62 dfixi.o(.text) + __aeabi_d2uiz 0x000105f1 Thumb Code 50 dfixui.o(.text) + __aeabi_f2d 0x0001062d Thumb Code 40 f2d.o(.text) + __aeabi_cfrcmple 0x00010655 Thumb Code 20 cfrcmple.o(.text) + __aeabi_uldivmod 0x00010669 Thumb Code 96 uldiv.o(.text) + __aeabi_llsl 0x000106c9 Thumb Code 32 llshl.o(.text) + _ll_shift_l 0x000106c9 Thumb Code 0 llshl.o(.text) + __aeabi_llsr 0x000106e9 Thumb Code 34 llushr.o(.text) + _ll_ushift_r 0x000106e9 Thumb Code 0 llushr.o(.text) + __aeabi_lasr 0x0001070b Thumb Code 38 llsshr.o(.text) + _ll_sshift_r 0x0001070b Thumb Code 0 llsshr.o(.text) + __I$use$fp 0x00010731 Thumb Code 0 iusefp.o(.text) + _float_round 0x00010731 Thumb Code 16 fepilogue.o(.text) + _float_epilogue 0x00010741 Thumb Code 114 fepilogue.o(.text) + _double_round 0x000107b3 Thumb Code 26 depilogue.o(.text) + _double_epilogue 0x000107cd Thumb Code 164 depilogue.o(.text) + __aeabi_dmul 0x00010871 Thumb Code 202 dmul.o(.text) + __aeabi_ddiv 0x00010941 Thumb Code 234 ddiv.o(.text) + __aeabi_d2ulz 0x00010a31 Thumb Code 54 dfixul.o(.text) + __aeabi_cdrcmple 0x00010a71 Thumb Code 38 cdrcmple.o(.text) + __scatterload 0x00010a99 Thumb Code 28 init.o(.text) + __scatterload_rt2 0x00010a99 Thumb Code 0 init.o(.text) + __decompress 0x00010abd Thumb Code 0 __dczerorl2.o(.text) + __decompress1 0x00010abd Thumb Code 86 __dczerorl2.o(.text) + ADC_IRQn_Handler 0x00010b15 Thumb Code 18 irq_redirect .o(i.ADC_IRQn_Handler) + AP_NRESET_IRQn_Handler 0x00010b2d Thumb Code 22 irq_redirect .o(i.AP_NRESET_IRQn_Handler) + DMA_IRQn_Handler 0x00010b49 Thumb Code 14 irq_redirect .o(i.DMA_IRQn_Handler) + EXTI_INT0_IRQn_Handler 0x00010b5d Thumb Code 22 irq_redirect .o(i.EXTI_INT0_IRQn_Handler) + EXTI_INT1_IRQn_Handler 0x00010b79 Thumb Code 22 irq_redirect .o(i.EXTI_INT1_IRQn_Handler) + EXTI_INT2_IRQn_Handler 0x00010b95 Thumb Code 22 irq_redirect .o(i.EXTI_INT2_IRQn_Handler) + EXTI_INT3_IRQn_Handler 0x00010bb1 Thumb Code 22 irq_redirect .o(i.EXTI_INT3_IRQn_Handler) + EXTI_INT4_IRQn_Handler 0x00010bcd Thumb Code 22 irq_redirect .o(i.EXTI_INT4_IRQn_Handler) + EXTI_INT5_IRQn_Handler 0x00010be9 Thumb Code 22 irq_redirect .o(i.EXTI_INT5_IRQn_Handler) + EXTI_INT6_IRQn_Handler 0x00010c05 Thumb Code 22 irq_redirect .o(i.EXTI_INT6_IRQn_Handler) + EXTI_INT7_IRQn_Handler 0x00010c21 Thumb Code 22 irq_redirect .o(i.EXTI_INT7_IRQn_Handler) + FLSCTRL_IRQn_Handler 0x00010c3d Thumb Code 14 irq_redirect .o(i.FLSCTRL_IRQn_Handler) + Gpio_swire_output 0x00010c51 Thumb Code 110 ap_demo.o(i.Gpio_swire_output) + HardFault_Handler 0x00010cc5 Thumb Code 14 irq_redirect .o(i.HardFault_Handler) + I2C0_IRQn_Handler 0x00010cd9 Thumb Code 18 irq_redirect .o(i.I2C0_IRQn_Handler) + I2C1_IRQn_Handler 0x00010cf1 Thumb Code 18 irq_redirect .o(i.I2C1_IRQn_Handler) + LCDC_IRQn_Handler 0x00010d09 Thumb Code 18 irq_redirect .o(i.LCDC_IRQn_Handler) + LOG_printf 0x00010d21 Thumb Code 30 tau_log.o(i.LOG_printf) + MEMC_IRQn_Handler 0x00010d49 Thumb Code 18 irq_redirect .o(i.MEMC_IRQn_Handler) + MIPI_RX_IRQn_Handler 0x00010d61 Thumb Code 18 irq_redirect .o(i.MIPI_RX_IRQn_Handler) + MIPI_TX_IRQn_Handler 0x00010d79 Thumb Code 18 irq_redirect .o(i.MIPI_TX_IRQn_Handler) + PWMDET_IRQn_Handler 0x00010d91 Thumb Code 22 irq_redirect .o(i.PWMDET_IRQn_Handler) + S20_Start_init 0x00010dad Thumb Code 270 app_tp_transfer.o(i.S20_Start_init) + SPIM_IRQn_Handler 0x00010ed1 Thumb Code 22 irq_redirect .o(i.SPIM_IRQn_Handler) + SPIS_IRQn_Handler 0x00010eed Thumb Code 22 irq_redirect .o(i.SPIS_IRQn_Handler) + SWIRE_IRQn_Handler 0x00010f09 Thumb Code 22 irq_redirect .o(i.SWIRE_IRQn_Handler) + SysTick_Handler 0x00010f25 Thumb Code 18 irq_redirect .o(i.SysTick_Handler) + TIMER0_IRQn_Handler 0x00010f3d Thumb Code 18 irq_redirect .o(i.TIMER0_IRQn_Handler) + TIMER1_IRQn_Handler 0x00010f55 Thumb Code 18 irq_redirect .o(i.TIMER1_IRQn_Handler) + TIMER2_IRQn_Handler 0x00010f6d Thumb Code 18 irq_redirect .o(i.TIMER2_IRQn_Handler) + TIMER3_IRQn_Handler 0x00010f85 Thumb Code 18 irq_redirect .o(i.TIMER3_IRQn_Handler) + UART_DisableDma 0x00010f9d Thumb Code 2 drv_uart.o(i.UART_DisableDma) + UART_GetInstance 0x00010f9f Thumb Code 4 drv_uart.o(i.UART_GetInstance) + UART_IRQ_Handle 0x00010fa5 Thumb Code 20 drv_uart.o(i.UART_IRQ_Handle) + UART_IRQn_Handler 0x00010fc1 Thumb Code 18 irq_redirect .o(i.UART_IRQn_Handler) + UART_ResetRxFIFO 0x00010fd9 Thumb Code 32 drv_uart.o(i.UART_ResetRxFIFO) + __scatterload_null 0x00010ffd Thumb Code 2 handlers.o(i.__scatterload_null) + screen_reg_start_data_size 0x00010ffe Data 1 app_tp_for_custom_s8.o(.constdata) + s_RAM_CK 0x00011000 Data 20 drv_common.o(.ARM.__at_0x11000) + UART_SetBaudRate 0x00011015 Thumb Code 72 drv_uart.o(i.UART_SetBaudRate) + UART_SwitchSCLK 0x0001105d Thumb Code 26 drv_uart.o(i.UART_SwitchSCLK) + UART_TransferHandleIRQ 0x00011077 Thumb Code 308 drv_uart.o(i.UART_TransferHandleIRQ) + UART_WriteBlocking 0x000111ab Thumb Code 26 drv_uart.o(i.UART_WriteBlocking) + UART_init 0x000111c5 Thumb Code 182 drv_uart.o(i.UART_init) + VIDC_IRQn_Handler 0x00011281 Thumb Code 18 irq_redirect .o(i.VIDC_IRQn_Handler) + VPRE_IRQn_Handler 0x00011299 Thumb Code 18 irq_redirect .o(i.VPRE_IRQn_Handler) + WDG_IRQn_Handler 0x000112b1 Thumb Code 18 irq_redirect .o(i.WDG_IRQn_Handler) + __0printf 0x000112c9 Thumb Code 24 printfa.o(i.__0printf) + __1printf 0x000112c9 Thumb Code 0 printfa.o(i.__0printf) + __2printf 0x000112c9 Thumb Code 0 printfa.o(i.__0printf) + __c89printf 0x000112c9 Thumb Code 0 printfa.o(i.__0printf) + printf 0x000112c9 Thumb Code 0 printfa.o(i.__0printf) + __0vsprintf 0x000112e9 Thumb Code 30 printfa.o(i.__0vsprintf) + __1vsprintf 0x000112e9 Thumb Code 0 printfa.o(i.__0vsprintf) + __2vsprintf 0x000112e9 Thumb Code 0 printfa.o(i.__0vsprintf) + __c89vsprintf 0x000112e9 Thumb Code 0 printfa.o(i.__0vsprintf) + vsprintf 0x000112e9 Thumb Code 0 printfa.o(i.__0vsprintf) + __ARM_clz 0x0001130d Thumb Code 46 depilogue.o(i.__ARM_clz) + __ARM_common_switch8 0x0001133b Thumb Code 26 ap_demo.o(i.__ARM_common_switch8) + __scatterload_copy 0x000113c9 Thumb Code 14 handlers.o(i.__scatterload_copy) + __scatterload_zeroinit 0x000113d7 Thumb Code 14 handlers.o(i.__scatterload_zeroinit) + ap_demo 0x00013031 Thumb Code 280 ap_demo.o(i.ap_demo) + ap_tp_calibration 0x0001379d Thumb Code 170 app_tp_transfer.o(i.ap_tp_calibration) + ap_tp_scan_point_init 0x0001384d Thumb Code 24 app_tp_transfer.o(i.ap_tp_scan_point_init) + ap_tp_scan_point_record_event 0x00013869 Thumb Code 150 app_tp_transfer.o(i.ap_tp_scan_point_record_event) + ap_tp_scan_point_record_event_exec 0x00013905 Thumb Code 50 app_tp_transfer.o(i.ap_tp_scan_point_record_event_exec) + ap_tp_simulate_finger_release_event 0x00013955 Thumb Code 44 app_tp_transfer.o(i.ap_tp_simulate_finger_release_event) + ap_tp_system_softReset 0x00013989 Thumb Code 58 app_tp_transfer.o(i.ap_tp_system_softReset) + app_AP_NRESET_IRQn_Handler 0x000139c9 Thumb Code 32 drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) + app_EXTI_INT0_IRQn_Handler 0x000139ed Thumb Code 22 drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) + app_EXTI_INT1_IRQn_Handler 0x00013a09 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) + app_EXTI_INT2_IRQn_Handler 0x00013a25 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) + app_EXTI_INT3_IRQn_Handler 0x00013a41 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) + app_EXTI_INT4_IRQn_Handler 0x00013a5d Thumb Code 22 drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) + app_EXTI_INT5_IRQn_Handler 0x00013a79 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) + app_EXTI_INT6_IRQn_Handler 0x00013a95 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) + app_EXTI_INT7_IRQn_Handler 0x00013ab1 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) + app_HardFault_Handler 0x00013acd Thumb Code 12 drv_common.o(i.app_HardFault_Handler) + app_I2C0_IRQn_Handler 0x00013b15 Thumb Code 8 drv_i2c_slave.o(i.app_I2C0_IRQn_Handler) + app_I2C1_IRQn_Handler 0x00013b25 Thumb Code 8 drv_i2c_master.o(i.app_I2C1_IRQn_Handler) + app_LCDC_IRQn_Handler 0x00013b35 Thumb Code 98 hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) + app_MEMC_IRQn_Handler 0x00013c15 Thumb Code 92 drv_memc.o(i.app_MEMC_IRQn_Handler) + app_MIPI_RX_IRQn_Handler 0x00013c75 Thumb Code 232 drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) + app_MIPI_TX_IRQn_Handler 0x00013f0d Thumb Code 56 drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) + app_PWMDET_IRQn_Handler 0x00013fad Thumb Code 62 drv_pwm.o(i.app_PWMDET_IRQn_Handler) + app_SPIM_IRQn_Handler 0x00013ff5 Thumb Code 22 drv_spi_master.o(i.app_SPIM_IRQn_Handler) + app_SPIS_IRQn_Handler 0x00014015 Thumb Code 500 hal_spi_slave.o(i.app_SPIS_IRQn_Handler) + app_SWIRE_IRQn_Handler 0x00014215 Thumb Code 28 drv_swire.o(i.app_SWIRE_IRQn_Handler) + app_SysTick_Handler 0x00014235 Thumb Code 20 drv_common.o(i.app_SysTick_Handler) + app_TIMER0_IRQn_Handler 0x0001424d Thumb Code 10 drv_timer.o(i.app_TIMER0_IRQn_Handler) + app_TIMER1_IRQn_Handler 0x00014257 Thumb Code 10 drv_timer.o(i.app_TIMER1_IRQn_Handler) + app_TIMER2_IRQn_Handler 0x00014261 Thumb Code 10 drv_timer.o(i.app_TIMER2_IRQn_Handler) + app_TIMER3_IRQn_Handler 0x0001426b Thumb Code 10 drv_timer.o(i.app_TIMER3_IRQn_Handler) + app_UART_IRQn_Handler 0x00014275 Thumb Code 8 drv_uart.o(i.app_UART_IRQn_Handler) + app_VIDC_IRQn_Handler 0x0001427d Thumb Code 190 hal_internal_vsync.o(i.app_VIDC_IRQn_Handler) + app_VPRE_IRQn_Handler 0x00014361 Thumb Code 544 hal_internal_vsync.o(i.app_VPRE_IRQn_Handler) + app_WDG_IRQn_Handler 0x000145e5 Thumb Code 52 drv_wdg.o(i.app_WDG_IRQn_Handler) + app_dma_irq_handler 0x0001461d Thumb Code 8 drv_dma.o(i.app_dma_irq_handler) + app_fls_ctrl_Handler 0x00014625 Thumb Code 38 norflash.o(i.app_fls_ctrl_Handler) + app_tp_I2C_init 0x00014655 Thumb Code 26 app_tp_transfer.o(i.app_tp_I2C_init) + app_tp_calibration_exec 0x00014679 Thumb Code 30 ap_demo.o(i.app_tp_calibration_exec) + app_tp_init 0x000146e1 Thumb Code 60 app_tp_transfer.o(i.app_tp_init) + app_tp_m_transfer_complate 0x00014749 Thumb Code 8 app_tp_transfer.o(i.app_tp_m_transfer_complate) + app_tp_phone_analysis_data 0x00014759 Thumb Code 980 app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) + app_tp_phone_clear_reset_on 0x00014b69 Thumb Code 8 app_tp_transfer.o(i.app_tp_phone_clear_reset_on) + app_tp_s_read 0x00014b75 Thumb Code 8 app_tp_transfer.o(i.app_tp_s_read) + app_tp_s_write 0x00014b7d Thumb Code 8 app_tp_transfer.o(i.app_tp_s_write) + app_tp_screen_analysis_int 0x00014b85 Thumb Code 704 app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) + app_tp_screen_init 0x00014e51 Thumb Code 42 app_tp_transfer.o(i.app_tp_screen_init) + app_tp_transfer_screen_int 0x00014f39 Thumb Code 420 app_tp_transfer.o(i.app_tp_transfer_screen_int) + app_tp_transfer_screen_start 0x00015119 Thumb Code 18 app_tp_transfer.o(i.app_tp_transfer_screen_start) + blue_change_ccm 0x00015131 Thumb Code 54 ap_demo.o(i.blue_change_ccm) + board_Init 0x00015169 Thumb Code 24 board.o(i.board_Init) + ceil 0x00015371 Thumb Code 180 ceil.o(i.ceil) + dcs_packet_fifo_alloc 0x00015491 Thumb Code 80 dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) + dcs_packet_fifo_init 0x000154e9 Thumb Code 18 dcs_packet_fifo.o(i.dcs_packet_fifo_init) + dcs_packet_free_fifo_header 0x00015501 Thumb Code 60 dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) + dcs_packet_get_fifo_header 0x00015545 Thumb Code 26 dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) + delayMs 0x00015585 Thumb Code 24 tau_delay.o(i.delayMs) + delayUs 0x0001559d Thumb Code 34 tau_delay.o(i.delayUs) + drv_ap_rst_trig_edge_detect 0x00015655 Thumb Code 46 drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) + drv_chip_info_get_version 0x0001568d Thumb Code 6 drv_chip_info.o(i.drv_chip_info_get_version) + drv_chip_info_init 0x00015699 Thumb Code 158 drv_chip_info.o(i.drv_chip_info_init) + drv_chip_rx_info_check 0x00015749 Thumb Code 54 drv_chip_info.o(i.drv_chip_rx_info_check) + drv_chip_rx_init_done 0x000157a5 Thumb Code 16 drv_chip_info.o(i.drv_chip_rx_init_done) + drv_common_enable_systick 0x000157b9 Thumb Code 70 drv_common.o(i.drv_common_enable_systick) + drv_common_system_init 0x00015811 Thumb Code 34 drv_common.o(i.drv_common_system_init) + drv_crgu_config_reset_modules 0x00015841 Thumb Code 10 drv_crgu.o(i.drv_crgu_config_reset_modules) + drv_crgu_set_ahb_pre_div 0x00015851 Thumb Code 14 drv_crgu.o(i.drv_crgu_set_ahb_pre_div) + drv_crgu_set_ahb_src 0x00015865 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_ahb_src) + drv_crgu_set_clock 0x00015879 Thumb Code 26 drv_crgu.o(i.drv_crgu_set_clock) + drv_crgu_set_dpi_mux_src 0x00015899 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dpi_mux_src) + drv_crgu_set_dpi_pre_div 0x000158ad Thumb Code 18 drv_crgu.o(i.drv_crgu_set_dpi_pre_div) + drv_crgu_set_dpi_pre_src 0x000158c5 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dpi_pre_src) + drv_crgu_set_dsc_core_div 0x000158d9 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dsc_core_div) + drv_crgu_set_dsco_src 0x000158ed Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dsco_src) + drv_crgu_set_dsco_src_div 0x00015901 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dsco_src_div) + drv_crgu_set_fb_div 0x00015915 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_fb_div) + drv_crgu_set_fb_src 0x00015929 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_fb_src) + drv_crgu_set_lcdc_div 0x0001593d Thumb Code 16 drv_crgu.o(i.drv_crgu_set_lcdc_div) + drv_crgu_set_lcdc_src 0x00015951 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_lcdc_src) + drv_crgu_set_mipi_cfg_src 0x00015965 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_mipi_cfg_src) + drv_crgu_set_mipi_ref_src 0x00015979 Thumb Code 18 drv_crgu.o(i.drv_crgu_set_mipi_ref_src) + drv_crgu_set_reset 0x00015991 Thumb Code 20 drv_crgu.o(i.drv_crgu_set_reset) + drv_crgu_set_rxbr_div 0x000159a9 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_rxbr_div) + drv_crgu_set_rxbr_src 0x000159bd Thumb Code 16 drv_crgu.o(i.drv_crgu_set_rxbr_src) + drv_crgu_set_vidc_src 0x000159d1 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_vidc_src) + drv_dma_clear_flag 0x000159e5 Thumb Code 22 drv_dma.o(i.drv_dma_clear_flag) + drv_dma_create_handle 0x00015a01 Thumb Code 18 drv_dma.o(i.drv_dma_create_handle) + drv_dma_disenable_channel 0x00015a19 Thumb Code 18 drv_dma.o(i.drv_dma_disenable_channel) + drv_dma_enable_channel 0x00015a31 Thumb Code 18 drv_dma.o(i.drv_dma_enable_channel) + drv_dma_enable_channel_interrupts 0x00015a49 Thumb Code 42 drv_dma.o(i.drv_dma_enable_channel_interrupts) + drv_dma_enable_cycle 0x00015a7d Thumb Code 42 drv_dma.o(i.drv_dma_enable_cycle) + drv_dma_get_channel_flag 0x00015aad Thumb Code 14 drv_dma.o(i.drv_dma_get_channel_flag) + drv_dma_irq_handler 0x00015ac1 Thumb Code 118 drv_dma.o(i.drv_dma_irq_handler) + drv_dma_prepar_transfer 0x00015b3d Thumb Code 18 drv_dma.o(i.drv_dma_prepar_transfer) + drv_dma_set_burst 0x00015b55 Thumb Code 24 drv_dma.o(i.drv_dma_set_burst) + drv_dma_set_callback 0x00015b71 Thumb Code 6 drv_dma.o(i.drv_dma_set_callback) + drv_dma_set_transfer 0x00015b79 Thumb Code 62 drv_dma.o(i.drv_dma_set_transfer) + drv_dsc_dec_convert_pps_rc_parameter 0x00015bbd Thumb Code 54 drv_dsc_dec.o(i.drv_dsc_dec_convert_pps_rc_parameter) + drv_dsc_dec_disable 0x00015bf3 Thumb Code 12 drv_dsc_dec.o(i.drv_dsc_dec_disable) + drv_dsc_dec_enable 0x00015c01 Thumb Code 146 drv_dsc_dec.o(i.drv_dsc_dec_enable) + drv_dsc_dec_get_nslc 0x00015cb5 Thumb Code 10 drv_dsc_dec.o(i.drv_dsc_dec_get_nslc) + drv_dsc_dec_set_u8_pps 0x00015cbf Thumb Code 40 drv_dsc_dec.o(i.drv_dsc_dec_set_u8_pps) + drv_dsi_rx_calc_ipi_tx_delay 0x00015ce9 Thumb Code 244 drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) + drv_dsi_rx_enable_irq 0x00015ded Thumb Code 58 drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) + drv_dsi_rx_get_compression_en 0x00015e99 Thumb Code 8 drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) + drv_dsi_rx_get_max_ret_size 0x00015ea1 Thumb Code 6 drv_dsi_rx.o(i.drv_dsi_rx_get_max_ret_size) + drv_dsi_rx_power_up 0x00015ea7 Thumb Code 14 drv_dsi_rx.o(i.drv_dsi_rx_power_up) + drv_dsi_rx_set_ctrl_cfg 0x00015eb5 Thumb Code 28 drv_dsi_rx.o(i.drv_dsi_rx_set_ctrl_cfg) + drv_dsi_rx_set_ddi_cfg 0x00015ed1 Thumb Code 16 drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) + drv_dsi_rx_set_inten 0x00015ee1 Thumb Code 4 drv_dsi_rx.o(i.drv_dsi_rx_set_inten) + drv_dsi_rx_set_ipi_cfg 0x00015ee5 Thumb Code 16 drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_cfg) + drv_dsi_rx_set_resp_cnt 0x00015ef5 Thumb Code 38 drv_dsi_rx.o(i.drv_dsi_rx_set_resp_cnt) + drv_dsi_rx_set_up_phy 0x00015f1d Thumb Code 138 drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) + drv_dsi_rx_shut_down 0x00015fad Thumb Code 14 drv_dsi_rx.o(i.drv_dsi_rx_shut_down) + drv_dsi_tx_command_header 0x00015fbb Thumb Code 20 drv_dsi_tx.o(i.drv_dsi_tx_command_header) + drv_dsi_tx_command_mode_cfg 0x00015fcf Thumb Code 108 drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) + drv_dsi_tx_command_put_payload 0x0001603b Thumb Code 4 drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) + drv_dsi_tx_config_eotp 0x0001603f Thumb Code 24 drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) + drv_dsi_tx_config_int 0x00016057 Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_config_int) + drv_dsi_tx_dpi_lpcmd_time 0x0001605f Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_dpi_lpcmd_time) + drv_dsi_tx_dpi_mode 0x00016067 Thumb Code 10 drv_dsi_tx.o(i.drv_dsi_tx_dpi_mode) + drv_dsi_tx_dpi_polarity 0x00016071 Thumb Code 36 drv_dsi_tx.o(i.drv_dsi_tx_dpi_polarity) + drv_dsi_tx_get_cmd_status 0x00016095 Thumb Code 4 drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) + drv_dsi_tx_mode 0x00016099 Thumb Code 4 drv_dsi_tx.o(i.drv_dsi_tx_mode) + drv_dsi_tx_phy_clock_lane_auto_lp 0x0001609d Thumb Code 24 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_auto_lp) + drv_dsi_tx_phy_clock_lane_req_hs 0x000160b5 Thumb Code 26 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) + drv_dsi_tx_phy_lane_mode 0x000160cf Thumb Code 12 drv_dsi_tx.o(i.drv_dsi_tx_phy_lane_mode) + drv_dsi_tx_phy_status_ready 0x000160db Thumb Code 100 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ready) + drv_dsi_tx_phy_status_stopstate 0x0001613f Thumb Code 62 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) + drv_dsi_tx_phy_test_setup 0x0001617d Thumb Code 228 drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) + drv_dsi_tx_phy_time_cfg 0x00016261 Thumb Code 30 drv_dsi_tx.o(i.drv_dsi_tx_phy_time_cfg) + drv_dsi_tx_powerup 0x0001627f Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_powerup) + drv_dsi_tx_response_mode 0x00016287 Thumb Code 28 drv_dsi_tx.o(i.drv_dsi_tx_response_mode) + drv_dsi_tx_set_bta_ack 0x000162a3 Thumb Code 24 drv_dsi_tx.o(i.drv_dsi_tx_set_bta_ack) + drv_dsi_tx_set_esc_div 0x000162bb Thumb Code 12 drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) + drv_dsi_tx_set_int 0x000162c9 Thumb Code 46 drv_dsi_tx.o(i.drv_dsi_tx_set_int) + drv_dsi_tx_set_time_out_div 0x000162fd Thumb Code 16 drv_dsi_tx.o(i.drv_dsi_tx_set_time_out_div) + drv_dsi_tx_set_video_chunk 0x0001630d Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_set_video_chunk) + drv_dsi_tx_set_video_timing 0x00016315 Thumb Code 34 drv_dsi_tx.o(i.drv_dsi_tx_set_video_timing) + drv_dsi_tx_shutdown 0x00016337 Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_shutdown) + drv_dsi_tx_timeout_cfg 0x0001633f Thumb Code 38 drv_dsi_tx.o(i.drv_dsi_tx_timeout_cfg) + drv_dsi_tx_video_mode_cfg 0x00016365 Thumb Code 170 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_cfg) + drv_dsi_tx_video_mode_disable_hact_cmd 0x0001640f Thumb Code 22 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_disable_hact_cmd) + drv_dsi_tx_video_mode_set_lp_cmd 0x00016425 Thumb Code 24 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_set_lp_cmd) + drv_gpio_get_input_data 0x0001643d Thumb Code 20 drv_gpio.o(i.drv_gpio_get_input_data) + drv_gpio_register_ap_reset_callback 0x00016455 Thumb Code 6 drv_gpio.o(i.drv_gpio_register_ap_reset_callback) + drv_gpio_register_callback 0x00016461 Thumb Code 14 drv_gpio.o(i.drv_gpio_register_callback) + drv_gpio_set_int 0x00016475 Thumb Code 62 drv_gpio.o(i.drv_gpio_set_int) + drv_gpio_set_ioe 0x000164b9 Thumb Code 26 drv_gpio.o(i.drv_gpio_set_ioe) + drv_gpio_set_mode0 0x000164d9 Thumb Code 12 drv_gpio.o(i.drv_gpio_set_mode0) + drv_gpio_set_mode1 0x000164e9 Thumb Code 12 drv_gpio.o(i.drv_gpio_set_mode1) + drv_gpio_set_mode2 0x000164f9 Thumb Code 12 drv_gpio.o(i.drv_gpio_set_mode2) + drv_gpio_set_mode3 0x00016509 Thumb Code 12 drv_gpio.o(i.drv_gpio_set_mode3) + drv_gpio_set_pull_state 0x00016539 Thumb Code 298 drv_gpio.o(i.drv_gpio_set_pull_state) + drv_i2c_clear_m_it_pending_bit 0x00016669 Thumb Code 86 drv_i2c_master.o(i.drv_i2c_clear_m_it_pending_bit) + drv_i2c_clear_s_it_pending_bit 0x000166c9 Thumb Code 84 drv_i2c_slave.o(i.drv_i2c_clear_s_it_pending_bit) + drv_i2c_dma_init 0x00016759 Thumb Code 146 drv_i2c_dma.o(i.drv_i2c_dma_init) + drv_i2c_enable_rx_dma 0x00016805 Thumb Code 26 drv_i2c_dma.o(i.drv_i2c_enable_rx_dma) + drv_i2c_enable_tx_dma 0x0001681f Thumb Code 24 drv_i2c_dma.o(i.drv_i2c_enable_tx_dma) + drv_i2c_m_enable_intr 0x00016839 Thumb Code 42 drv_i2c_master.o(i.drv_i2c_m_enable_intr) + drv_i2c_m_set_callback 0x00016871 Thumb Code 6 drv_i2c_master.o(i.drv_i2c_m_set_callback) + drv_i2c_master_init 0x0001687d Thumb Code 118 drv_i2c_master.o(i.drv_i2c_master_init) + drv_i2c_master_read_dma 0x00016909 Thumb Code 114 drv_i2c_dma.o(i.drv_i2c_master_read_dma) + drv_i2c_master_write_dma 0x00016985 Thumb Code 60 drv_i2c_dma.o(i.drv_i2c_master_write_dma) + drv_i2c_s_enable_intr 0x000169f5 Thumb Code 40 drv_i2c_slave.o(i.drv_i2c_s_enable_intr) + drv_i2c_s_get_fifo_status 0x00016a29 Thumb Code 22 drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) + drv_i2c_s_set_callback 0x00016a45 Thumb Code 6 drv_i2c_slave.o(i.drv_i2c_s_set_callback) + drv_i2c_s_write_data 0x00016a51 Thumb Code 26 drv_i2c_slave.o(i.drv_i2c_s_write_data) + drv_i2c_set_dma_irq_callback 0x00016a71 Thumb Code 62 drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) + drv_i2c_slave_init 0x00016ac1 Thumb Code 60 drv_i2c_slave.o(i.drv_i2c_slave_init) + drv_i2c_slave_write_dma 0x00016b05 Thumb Code 30 drv_i2c_dma.o(i.drv_i2c_slave_write_dma) + drv_lcdc_config_420_to_444_mode 0x00016b29 Thumb Code 24 drv_lcdc.o(i.drv_lcdc_config_420_to_444_mode) + drv_lcdc_config_bypass 0x00016b41 Thumb Code 24 drv_lcdc.o(i.drv_lcdc_config_bypass) + drv_lcdc_config_cbcr 0x00016b59 Thumb Code 24 drv_lcdc.o(i.drv_lcdc_config_cbcr) + drv_lcdc_config_ccm 0x00016b71 Thumb Code 48 drv_lcdc.o(i.drv_lcdc_config_ccm) + drv_lcdc_config_disp_mode 0x00016ba1 Thumb Code 22 drv_lcdc.o(i.drv_lcdc_config_disp_mode) + drv_lcdc_config_dpi_polarity 0x00016bb7 Thumb Code 36 drv_lcdc.o(i.drv_lcdc_config_dpi_polarity) + drv_lcdc_config_dpi_timing 0x00016bdb Thumb Code 38 drv_lcdc.o(i.drv_lcdc_config_dpi_timing) + drv_lcdc_config_endianness 0x00016c01 Thumb Code 22 drv_lcdc.o(i.drv_lcdc_config_endianness) + drv_lcdc_config_horiz_flip 0x00016c17 Thumb Code 32 drv_lcdc.o(i.drv_lcdc_config_horiz_flip) + drv_lcdc_config_input_size 0x00016c37 Thumb Code 12 drv_lcdc.o(i.drv_lcdc_config_input_size) + drv_lcdc_config_int 0x00016c43 Thumb Code 30 drv_lcdc.o(i.drv_lcdc_config_int) + drv_lcdc_config_int_single 0x00016c61 Thumb Code 34 drv_lcdc.o(i.drv_lcdc_config_int_single) + drv_lcdc_config_overwrite 0x00016c83 Thumb Code 34 drv_lcdc.o(i.drv_lcdc_config_overwrite) + drv_lcdc_config_overwrite_rgb 0x00016ca5 Thumb Code 12 drv_lcdc.o(i.drv_lcdc_config_overwrite_rgb) + drv_lcdc_config_partial_display_area 0x00016cb1 Thumb Code 26 drv_lcdc.o(i.drv_lcdc_config_partial_display_area) + drv_lcdc_config_partial_display_enable 0x00016ccb Thumb Code 34 drv_lcdc.o(i.drv_lcdc_config_partial_display_enable) + drv_lcdc_config_src_parameter 0x00016ced Thumb Code 114 drv_lcdc.o(i.drv_lcdc_config_src_parameter) + drv_lcdc_config_thresh 0x00016d5f Thumb Code 8 drv_lcdc.o(i.drv_lcdc_config_thresh) + drv_lcdc_config_upscaler 0x00016d67 Thumb Code 96 drv_lcdc.o(i.drv_lcdc_config_upscaler) + drv_lcdc_config_yuv420_threshold 0x00016dc7 Thumb Code 10 drv_lcdc.o(i.drv_lcdc_config_yuv420_threshold) + drv_lcdc_ctrl_flow 0x00016dd1 Thumb Code 18 drv_lcdc.o(i.drv_lcdc_ctrl_flow) + drv_lcdc_enable_shadow_reg 0x00016de3 Thumb Code 32 drv_lcdc.o(i.drv_lcdc_enable_shadow_reg) + drv_lcdc_set_int 0x00016e05 Thumb Code 46 drv_lcdc.o(i.drv_lcdc_set_int) + drv_lcdc_start 0x00016e39 Thumb Code 32 drv_lcdc.o(i.drv_lcdc_start) + drv_lcdc_update_shadow_reg 0x00016e59 Thumb Code 12 drv_lcdc.o(i.drv_lcdc_update_shadow_reg) + drv_memc_bypass_fifo_empty 0x00016e65 Thumb Code 16 drv_memc.o(i.drv_memc_bypass_fifo_empty) + drv_memc_clear_status 0x00016e75 Thumb Code 12 drv_memc.o(i.drv_memc_clear_status) + drv_memc_enable_irq 0x00016e81 Thumb Code 58 drv_memc.o(i.drv_memc_enable_irq) + drv_memc_gen_a_tear_signal 0x00016ec1 Thumb Code 12 drv_memc.o(i.drv_memc_gen_a_tear_signal) + drv_memc_get_status 0x00016ecd Thumb Code 18 drv_memc.o(i.drv_memc_get_status) + drv_memc_rate_transfer_sel 0x00016edf Thumb Code 16 drv_memc.o(i.drv_memc_rate_transfer_sel) + drv_memc_sel_vsync 0x00016eef Thumb Code 14 drv_memc.o(i.drv_memc_sel_vsync) + drv_memc_set_data_mode 0x00016efd Thumb Code 12 drv_memc.o(i.drv_memc_set_data_mode) + drv_memc_set_tear_hwclr 0x00016f09 Thumb Code 16 drv_memc.o(i.drv_memc_set_tear_hwclr) + drv_memc_set_tear_mode 0x00016f19 Thumb Code 14 drv_memc.o(i.drv_memc_set_tear_mode) + drv_memc_set_tear_waveform 0x00016f29 Thumb Code 28 drv_memc.o(i.drv_memc_set_tear_waveform) + drv_memc_set_yuv420_cfg 0x00016f4d Thumb Code 16 drv_memc.o(i.drv_memc_set_yuv420_cfg) + drv_param_get_picture_quality_setting 0x00016f5d Thumb Code 12 drv_param_init.o(i.drv_param_get_picture_quality_setting) + drv_param_init_get_ccm 0x00016f6d Thumb Code 4 drv_param_init.o(i.drv_param_init_get_ccm) + drv_param_init_get_scld_filter_h 0x00016f75 Thumb Code 12 drv_param_init.o(i.drv_param_init_get_scld_filter_h) + drv_param_init_get_scld_filter_v 0x00016f89 Thumb Code 12 drv_param_init.o(i.drv_param_init_get_scld_filter_v) + drv_param_init_get_sclu_filter_h 0x00016f9d Thumb Code 4 drv_param_init.o(i.drv_param_init_get_sclu_filter_h) + drv_param_init_get_sclu_filter_v 0x00016fa5 Thumb Code 4 drv_param_init.o(i.drv_param_init_get_sclu_filter_v) + drv_param_init_set_ccm 0x00016fad Thumb Code 14 drv_param_init.o(i.drv_param_init_set_ccm) + drv_param_p2r_filter_init 0x00016fc1 Thumb Code 54 drv_param_init.o(i.drv_param_p2r_filter_init) + drv_param_yuv420_filter_init 0x00016ffd Thumb Code 48 drv_param_init.o(i.drv_param_yuv420_filter_init) + drv_phy_get_pll_para 0x00017031 Thumb Code 88 drv_phy_common.o(i.drv_phy_get_pll_para) + drv_phy_get_rate_para 0x00017091 Thumb Code 76 drv_phy_common.o(i.drv_phy_get_rate_para) + drv_phy_test_clear 0x000170e5 Thumb Code 16 drv_phy_common.o(i.drv_phy_test_clear) + drv_phy_test_lock 0x000170f5 Thumb Code 24 drv_phy_common.o(i.drv_phy_test_lock) + drv_phy_test_write_1_byte 0x0001710d Thumb Code 32 drv_phy_common.o(i.drv_phy_test_write_1_byte) + drv_phy_test_write_2_byte 0x0001712d Thumb Code 38 drv_phy_common.o(i.drv_phy_test_write_2_byte) + drv_phy_test_write_code 0x00017153 Thumb Code 30 drv_phy_common.o(i.drv_phy_test_write_code) + drv_pwr_set_cp_mode 0x00017191 Thumb Code 26 drv_pwr.o(i.drv_pwr_set_cp_mode) + drv_pwr_set_pvd_mode 0x000171b1 Thumb Code 24 drv_pwr.o(i.drv_pwr_set_pvd_mode) + drv_pwr_set_system_clk_src 0x000171cd Thumb Code 36 drv_pwr.o(i.drv_pwr_set_system_clk_src) + drv_rxbr_clear_pkt_buffer 0x00017243 Thumb Code 6 drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) + drv_rxbr_clear_status 0x00017249 Thumb Code 4 drv_rxbr.o(i.drv_rxbr_clear_status) + drv_rxbr_enable_irq 0x0001724d Thumb Code 58 drv_rxbr.o(i.drv_rxbr_enable_irq) + drv_rxbr_frame_drop_cfg 0x0001728d Thumb Code 8 drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) + drv_rxbr_get_clk 0x00017295 Thumb Code 44 drv_rxbr.o(i.drv_rxbr_get_clk) + drv_rxbr_get_col_addr 0x000172d1 Thumb Code 4 drv_rxbr.o(i.drv_rxbr_get_col_addr) + drv_rxbr_get_cur_hline_rcv_cnt 0x000172d5 Thumb Code 8 drv_rxbr.o(i.drv_rxbr_get_cur_hline_rcv_cnt) + drv_rxbr_get_hline_rcv_cfg 0x000172dd Thumb Code 10 drv_rxbr.o(i.drv_rxbr_get_hline_rcv_cfg) + drv_rxbr_get_page_addr 0x000172ff Thumb Code 4 drv_rxbr.o(i.drv_rxbr_get_page_addr) + drv_rxbr_hline_rcv0_cfg 0x00017327 Thumb Code 12 drv_rxbr.o(i.drv_rxbr_hline_rcv0_cfg) + drv_rxbr_hline_rcv_cfg 0x00017333 Thumb Code 8 drv_rxbr.o(i.drv_rxbr_hline_rcv_cfg) + drv_rxbr_set_ack_pkt_header 0x0001733b Thumb Code 20 drv_rxbr.o(i.drv_rxbr_set_ack_pkt_header) + drv_rxbr_set_cmd_filter 0x0001734f Thumb Code 204 drv_rxbr.o(i.drv_rxbr_set_cmd_filter) + drv_rxbr_set_color_format 0x0001741b Thumb Code 20 drv_rxbr.o(i.drv_rxbr_set_color_format) + drv_rxbr_set_inten 0x0001742f Thumb Code 20 drv_rxbr.o(i.drv_rxbr_set_inten) + drv_rxbr_set_usr_cfg 0x00017443 Thumb Code 34 drv_rxbr.o(i.drv_rxbr_set_usr_cfg) + drv_rxbr_set_usr_col 0x00017465 Thumb Code 8 drv_rxbr.o(i.drv_rxbr_set_usr_col) + drv_rxbr_set_usr_row 0x0001746d Thumb Code 8 drv_rxbr.o(i.drv_rxbr_set_usr_row) + drv_spi_m_read_data 0x00017475 Thumb Code 28 drv_spi_master.o(i.drv_spi_m_read_data) + drv_swire_set_int 0x00017495 Thumb Code 64 drv_swire.o(i.drv_swire_set_int) + drv_swire_set_power_down 0x000174dd Thumb Code 24 drv_swire.o(i.drv_swire_set_power_down) + drv_sys_cfg_clear_all_int 0x000174f9 Thumb Code 8 drv_sys_cfg.o(i.drv_sys_cfg_clear_all_int) + drv_sys_cfg_clear_pending 0x00017505 Thumb Code 32 drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) + drv_sys_cfg_sel_ap_rst_lvl_trig 0x0001752d Thumb Code 18 drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_lvl_trig) + drv_sys_cfg_sel_ap_rst_trig 0x00017545 Thumb Code 22 drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) + drv_sys_cfg_sel_gpio_group 0x00017561 Thumb Code 30 drv_sys_cfg.o(i.drv_sys_cfg_sel_gpio_group) + drv_sys_cfg_sel_int_trig 0x00017585 Thumb Code 30 drv_sys_cfg.o(i.drv_sys_cfg_sel_int_trig) + drv_sys_cfg_set_dma_rx_req 0x000175a9 Thumb Code 10 drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) + drv_sys_cfg_set_dma_tx_req 0x000175b9 Thumb Code 10 drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) + drv_sys_cfg_set_int 0x000175c9 Thumb Code 30 drv_sys_cfg.o(i.drv_sys_cfg_set_int) + drv_timer_enable 0x00017607 Thumb Code 32 drv_timer.o(i.drv_timer_enable) + drv_timer_get_instance 0x00017629 Thumb Code 10 drv_timer.o(i.drv_timer_get_instance) + drv_timer_get_prescaler 0x00017639 Thumb Code 12 drv_timer.o(i.drv_timer_get_prescaler) + drv_timer_register_callback 0x00017685 Thumb Code 14 drv_timer.o(i.drv_timer_register_callback) + drv_timer_set_compare_val 0x00017699 Thumb Code 16 drv_timer.o(i.drv_timer_set_compare_val) + drv_timer_set_int 0x000176a9 Thumb Code 68 drv_timer.o(i.drv_timer_set_int) + drv_timer_set_prescaler 0x000176f1 Thumb Code 36 drv_timer.o(i.drv_timer_set_prescaler) + drv_tx_phy_test_enter 0x00017723 Thumb Code 28 drv_dsi_tx.o(i.drv_tx_phy_test_enter) + drv_tx_phy_test_exit 0x0001773f Thumb Code 28 drv_dsi_tx.o(i.drv_tx_phy_test_exit) + drv_vidc_clear_irq 0x00017791 Thumb Code 8 drv_vidc.o(i.drv_vidc_clear_irq) + drv_vidc_enable 0x00017799 Thumb Code 24 drv_vidc.o(i.drv_vidc_enable) + drv_vidc_enable_irq 0x000177b1 Thumb Code 58 drv_vidc.o(i.drv_vidc_enable_irq) + drv_vidc_get_int_source 0x000177f1 Thumb Code 38 drv_vidc.o(i.drv_vidc_get_int_source) + drv_vidc_module_enable 0x00017819 Thumb Code 62 drv_vidc.o(i.drv_vidc_module_enable) + drv_vidc_reset 0x0001785d Thumb Code 6 drv_vidc.o(i.drv_vidc_reset) + drv_vidc_set_dst_parameter 0x00017863 Thumb Code 92 drv_vidc.o(i.drv_vidc_set_dst_parameter) + drv_vidc_set_enh_chr 0x000178bf Thumb Code 14 drv_vidc.o(i.drv_vidc_set_enh_chr) + drv_vidc_set_enh_chr2 0x000178cd Thumb Code 18 drv_vidc.o(i.drv_vidc_set_enh_chr2) + drv_vidc_set_enh_lum 0x000178df Thumb Code 14 drv_vidc.o(i.drv_vidc_set_enh_lum) + drv_vidc_set_gain 0x000178ed Thumb Code 48 drv_vidc.o(i.drv_vidc_set_gain) + drv_vidc_set_irqen 0x0001791d Thumb Code 20 drv_vidc.o(i.drv_vidc_set_irqen) + drv_vidc_set_p2r_hcoef0 0x00017931 Thumb Code 8 drv_vidc.o(i.drv_vidc_set_p2r_hcoef0) + drv_vidc_set_p2r_hcoef1 0x00017939 Thumb Code 8 drv_vidc.o(i.drv_vidc_set_p2r_hcoef1) + drv_vidc_set_p2r_hinitb 0x00017941 Thumb Code 40 drv_vidc.o(i.drv_vidc_set_p2r_hinitb) + drv_vidc_set_p2r_hinitr 0x00017969 Thumb Code 40 drv_vidc.o(i.drv_vidc_set_p2r_hinitr) + drv_vidc_set_p2r_step 0x00017991 Thumb Code 8 drv_vidc.o(i.drv_vidc_set_p2r_step) + drv_vidc_set_pu_ctrl 0x00017999 Thumb Code 32 drv_vidc.o(i.drv_vidc_set_pu_ctrl) + drv_vidc_set_pu_scld 0x000179b9 Thumb Code 14 drv_vidc.o(i.drv_vidc_set_pu_scld) + drv_vidc_set_scld_hcoef0 0x000179c7 Thumb Code 10 drv_vidc.o(i.drv_vidc_set_scld_hcoef0) + drv_vidc_set_scld_hcoef1 0x000179d1 Thumb Code 10 drv_vidc.o(i.drv_vidc_set_scld_hcoef1) + drv_vidc_set_scld_step 0x000179db Thumb Code 18 drv_vidc.o(i.drv_vidc_set_scld_step) + drv_vidc_set_scld_vcoef0 0x000179ed Thumb Code 10 drv_vidc.o(i.drv_vidc_set_scld_vcoef0) + drv_vidc_set_scld_vcoef1 0x000179f7 Thumb Code 10 drv_vidc.o(i.drv_vidc_set_scld_vcoef1) + drv_vidc_set_sclu_hcoef0c 0x00017a01 Thumb Code 10 drv_vidc.o(i.drv_vidc_set_sclu_hcoef0c) + drv_vidc_set_sclu_hcoef0y 0x00017a0b Thumb Code 10 drv_vidc.o(i.drv_vidc_set_sclu_hcoef0y) + drv_vidc_set_sclu_hcoef1c 0x00017a15 Thumb Code 10 drv_vidc.o(i.drv_vidc_set_sclu_hcoef1c) + drv_vidc_set_sclu_hcoef1y 0x00017a1f Thumb Code 10 drv_vidc.o(i.drv_vidc_set_sclu_hcoef1y) + drv_vidc_set_sclu_vcoef0c 0x00017a29 Thumb Code 10 drv_vidc.o(i.drv_vidc_set_sclu_vcoef0c) + drv_vidc_set_sclu_vcoef0y 0x00017a33 Thumb Code 10 drv_vidc.o(i.drv_vidc_set_sclu_vcoef0y) + drv_vidc_set_sclu_vcoef1c 0x00017a3d Thumb Code 10 drv_vidc.o(i.drv_vidc_set_sclu_vcoef1c) + drv_vidc_set_sclu_vcoef1y 0x00017a47 Thumb Code 10 drv_vidc.o(i.drv_vidc_set_sclu_vcoef1y) + drv_vidc_set_src_parameter 0x00017a51 Thumb Code 32 drv_vidc.o(i.drv_vidc_set_src_parameter) + drv_vidc_set_y4t2_hcoef0 0x00017a75 Thumb Code 10 drv_vidc.o(i.drv_vidc_set_y4t2_hcoef0) + drv_vidc_set_y4t2_hcoef1 0x00017a7f Thumb Code 10 drv_vidc.o(i.drv_vidc_set_y4t2_hcoef1) + drv_vidc_set_y4t2_vcoef0 0x00017a89 Thumb Code 10 drv_vidc.o(i.drv_vidc_set_y4t2_vcoef0) + drv_vidc_set_y4t2_vcoef1 0x00017a93 Thumb Code 10 drv_vidc.o(i.drv_vidc_set_y4t2_vcoef1) + drv_wdg_clear_counter 0x00017a9d Thumb Code 12 drv_wdg.o(i.drv_wdg_clear_counter) + drv_wdg_set_int 0x00017acd Thumb Code 48 drv_wdg.o(i.drv_wdg_set_int) + fls_clear_irq_status 0x00017b01 Thumb Code 6 drv_fls.o(i.fls_clear_irq_status) + fputc 0x00017b07 Thumb Code 20 tau_log.o(i.fputc) + hal_dsi_rx_ctrl_create_handle 0x00017b1d Thumb Code 42 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) + hal_dsi_rx_ctrl_deinit 0x00017b4d Thumb Code 148 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) + hal_dsi_rx_ctrl_dsc_async_handler 0x00017be9 Thumb Code 122 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) + hal_dsi_rx_ctrl_gen_a_tear_signal 0x00017c6d Thumb Code 32 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) + hal_dsi_rx_ctrl_get_max_ret_size 0x00017c95 Thumb Code 30 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) + hal_dsi_rx_ctrl_init 0x00017cbd Thumb Code 92 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) + hal_dsi_rx_ctrl_pre_init_pps 0x000184f1 Thumb Code 56 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_pre_init_pps) + hal_dsi_rx_ctrl_send_ack_cmd 0x0001852d Thumb Code 212 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) + hal_dsi_rx_ctrl_set_cus_sync_line 0x0001861d Thumb Code 44 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) + hal_dsi_rx_ctrl_set_hw_tear_mode 0x00018651 Thumb Code 42 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode) + hal_dsi_rx_ctrl_set_sw_tear_mode 0x0001872d Thumb Code 42 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) + hal_dsi_rx_ctrl_start 0x00018761 Thumb Code 46 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) + hal_dsi_rx_ctrl_stop 0x0001879d Thumb Code 58 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) + hal_dsi_rx_ctrl_toggle_resolution 0x000187e5 Thumb Code 28 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) + hal_dsi_tx_ctrl_create_handle 0x00018d89 Thumb Code 34 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) + hal_dsi_tx_ctrl_deinit 0x00018db5 Thumb Code 68 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) + hal_dsi_tx_ctrl_enter_init_panel_mode 0x00018dfd Thumb Code 68 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) + hal_dsi_tx_ctrl_exit_init_panel_mode 0x00018e49 Thumb Code 30 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) + hal_dsi_tx_ctrl_init 0x00018e6d Thumb Code 188 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) + hal_dsi_tx_ctrl_panel_reset_pin 0x00018f55 Thumb Code 12 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_panel_reset_pin) + hal_dsi_tx_ctrl_set_ccm 0x00018f61 Thumb Code 28 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) + hal_dsi_tx_ctrl_set_overwrite_rgb 0x00018f81 Thumb Code 16 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) + hal_dsi_tx_ctrl_set_partial_disp 0x00018f95 Thumb Code 12 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp) + hal_dsi_tx_ctrl_set_partial_disp_area 0x00018fa5 Thumb Code 30 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp_area) + hal_dsi_tx_ctrl_start 0x00018fc9 Thumb Code 84 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) + hal_dsi_tx_ctrl_stop 0x00019029 Thumb Code 54 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) + hal_dsi_tx_ctrl_write_array_cmd 0x0001906d Thumb Code 406 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) + hal_dsi_tx_ctrl_write_cmd 0x00019209 Thumb Code 332 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) + hal_gpio_ctrl_eint 0x00019521 Thumb Code 18 hal_gpio.o(i.hal_gpio_ctrl_eint) + hal_gpio_get_input_data 0x00019539 Thumb Code 18 hal_gpio.o(i.hal_gpio_get_input_data) + hal_gpio_init_eint 0x0001954d Thumb Code 58 hal_gpio.o(i.hal_gpio_init_eint) + hal_gpio_init_input 0x0001958d Thumb Code 28 hal_gpio.o(i.hal_gpio_init_input) + hal_gpio_init_output 0x000195ad Thumb Code 34 hal_gpio.o(i.hal_gpio_init_output) + hal_gpio_reg_eint_cb 0x000195d5 Thumb Code 20 hal_gpio.o(i.hal_gpio_reg_eint_cb) + hal_gpio_set_ap_reset_int 0x000195ed Thumb Code 76 hal_gpio.o(i.hal_gpio_set_ap_reset_int) + hal_gpio_set_mode 0x0001963d Thumb Code 90 hal_gpio.o(i.hal_gpio_set_mode) + hal_gpio_set_output_data 0x0001969d Thumb Code 8 hal_gpio.o(i.hal_gpio_set_output_data) + hal_gpio_set_pull_state 0x000196a5 Thumb Code 26 hal_gpio.o(i.hal_gpio_set_pull_state) + hal_i2c_m_dma_init 0x000196c5 Thumb Code 92 hal_i2c_master.o(i.hal_i2c_m_dma_init) + hal_i2c_m_dma_read 0x00019731 Thumb Code 36 hal_i2c_master.o(i.hal_i2c_m_dma_read) + hal_i2c_m_dma_write 0x0001975d Thumb Code 32 hal_i2c_master.o(i.hal_i2c_m_dma_write) + hal_i2c_m_transfer_complate 0x00019785 Thumb Code 24 hal_i2c_master.o(i.hal_i2c_m_transfer_complate) + hal_i2c_s_dma_write 0x000197d5 Thumb Code 52 hal_i2c_slave.o(i.hal_i2c_s_dma_write) + hal_i2c_s_init 0x00019811 Thumb Code 92 hal_i2c_slave.o(i.hal_i2c_s_init) + hal_i2c_s_nonblocking_read 0x0001987d Thumb Code 14 hal_i2c_slave.o(i.hal_i2c_s_nonblocking_read) + hal_i2c_s_set_transfer 0x00019891 Thumb Code 6 hal_i2c_slave.o(i.hal_i2c_s_set_transfer) + hal_internal_init_memc 0x000199ed Thumb Code 96 hal_internal_vsync.o(i.hal_internal_init_memc) + hal_internal_sync_get_fb_setting 0x00019a9d Thumb Code 12 hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) + hal_internal_sync_input_resolution_change 0x00019aad Thumb Code 414 hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) + hal_internal_sync_set_fb_setting_manual 0x00019cf9 Thumb Code 372 hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual) + hal_internal_vsync_deinit 0x00019e81 Thumb Code 24 hal_internal_vsync.o(i.hal_internal_vsync_deinit) + hal_internal_vsync_get_rx_state 0x00019e9d Thumb Code 6 hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) + hal_internal_vsync_get_sync_line 0x00019ea9 Thumb Code 24 hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) + hal_internal_vsync_get_tx_state 0x00019ec5 Thumb Code 6 hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) + hal_internal_vsync_get_y2t4_use_sclu 0x00019ed1 Thumb Code 28 hal_internal_vsync.o(i.hal_internal_vsync_get_y2t4_use_sclu) + hal_internal_vsync_init_rx 0x00019ef1 Thumb Code 166 hal_internal_vsync.o(i.hal_internal_vsync_init_rx) + hal_internal_vsync_init_tx 0x00019fad Thumb Code 160 hal_internal_vsync.o(i.hal_internal_vsync_init_tx) + hal_internal_vsync_set_auto_hw_filter 0x0001a051 Thumb Code 222 hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) + hal_internal_vsync_set_rx_state 0x0001a16d Thumb Code 20 hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) + hal_internal_vsync_set_sync_line 0x0001a185 Thumb Code 26 hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) + hal_internal_vsync_set_tear_mode 0x0001a1a5 Thumb Code 64 hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) + hal_internal_vsync_set_tx_state 0x0001a1ed Thumb Code 58 hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) + hal_spi_m_clear_rxfifo 0x0001a6a1 Thumb Code 14 hal_spi_master.o(i.hal_spi_m_clear_rxfifo) + hal_swire_open 0x0001a6af Thumb Code 22 hal_swire.o(i.hal_swire_open) + hal_system_enable_systick 0x0001a6c5 Thumb Code 8 hal_system.o(i.hal_system_enable_systick) + hal_system_init 0x0001a6cd Thumb Code 104 hal_system.o(i.hal_system_init) + hal_system_init_console 0x0001a755 Thumb Code 28 hal_system.o(i.hal_system_init_console) + hal_system_set_pvd 0x0001a771 Thumb Code 8 hal_system.o(i.hal_system_set_pvd) + hal_system_set_vcc 0x0001a779 Thumb Code 8 hal_system.o(i.hal_system_set_vcc) + hal_timer_init 0x0001a781 Thumb Code 26 hal_timer.o(i.hal_timer_init) + hal_timer_start 0x0001a79d Thumb Code 66 hal_timer.o(i.hal_timer_start) + hal_timer_stop 0x0001a7e5 Thumb Code 40 hal_timer.o(i.hal_timer_stop) + hal_uart_init 0x0001a80d Thumb Code 126 hal_uart.o(i.hal_uart_init) + hal_uart_transmit_blocking 0x0001a899 Thumb Code 12 hal_uart.o(i.hal_uart_transmit_blocking) + handle_init 0x0001a8a9 Thumb Code 136 irq_redirect .o(i.handle_init) + main 0x0001aad1 Thumb Code 10 main.o(i.main) + tp_heartbeat_exec 0x0001b44d Thumb Code 56 ap_demo.o(i.tp_heartbeat_exec) + phone_data_21 0x0001b828 Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_55 0x0001b829 Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_85_1 0x0001b82a Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_92_1 0x0001b82b Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_F5_1 0x0001b82c Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_F5_2 0x0001b82d Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_F5_3 0x0001b82e Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_F5_4 0x0001b82f Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_30 0x0001b830 Data 2 app_tp_for_custom_s8.o(.constdata) + phone_data_52 0x0001b832 Data 3 app_tp_for_custom_s8.o(.constdata) + phone_data_92_3 0x0001b835 Data 3 app_tp_for_custom_s8.o(.constdata) + phone_data_A3 0x0001b838 Data 4 app_tp_for_custom_s8.o(.constdata) + phone_data_A4 0x0001b83c Data 4 app_tp_for_custom_s8.o(.constdata) + phone_data_A5 0x0001b840 Data 4 app_tp_for_custom_s8.o(.constdata) + phone_data_AF 0x0001b844 Data 4 app_tp_for_custom_s8.o(.constdata) + phone_data_F1 0x0001b848 Data 4 app_tp_for_custom_s8.o(.constdata) + phone_data_22 0x0001b84c Data 5 app_tp_for_custom_s8.o(.constdata) + phone_data_92_2 0x0001b851 Data 6 app_tp_for_custom_s8.o(.constdata) + phone_data_F6_1 0x0001b857 Data 6 app_tp_for_custom_s8.o(.constdata) + phone_data_F6_2 0x0001b85d Data 6 app_tp_for_custom_s8.o(.constdata) + phone_data_F6_3 0x0001b863 Data 6 app_tp_for_custom_s8.o(.constdata) + phone_data_F6_4 0x0001b869 Data 6 app_tp_for_custom_s8.o(.constdata) + phone_data_60_1 0x0001b86f Data 16 app_tp_for_custom_s8.o(.constdata) + phone_data_23 0x0001b87f Data 11 app_tp_for_custom_s8.o(.constdata) + phone_data_85_2 0x0001b88a Data 28 app_tp_for_custom_s8.o(.constdata) + phone_data_90 0x0001b8a6 Data 10 app_tp_for_custom_s8.o(.constdata) + phone_data_72_0 0x0001b8b0 Data 1292 app_tp_for_custom_s8.o(.constdata) + phone_data_72_5 0x0001bdbc Data 1292 app_tp_for_custom_s8.o(.constdata) + phone_data_72_13 0x0001c2c8 Data 1292 app_tp_for_custom_s8.o(.constdata) + phone_data_75_01 0x0001c7d4 Data 654 app_tp_for_custom_s8.o(.constdata) + phone_data_75_02 0x0001ca62 Data 654 app_tp_for_custom_s8.o(.constdata) + phone_data_75_03 0x0001ccf0 Data 654 app_tp_for_custom_s8.o(.constdata) + phone_data_75_06 0x0001cf7e Data 654 app_tp_for_custom_s8.o(.constdata) + phone_data_75_07 0x0001d20c Data 654 app_tp_for_custom_s8.o(.constdata) + phone_data_75_05 0x0001d49a Data 654 app_tp_for_custom_s8.o(.constdata) + phone_data_75_00 0x0001d728 Data 288 app_tp_for_custom_s8.o(.constdata) + phone_data_75_FF 0x0001d848 Data 288 app_tp_for_custom_s8.o(.constdata) + sleep_on 0x0001d968 Data 16 app_tp_for_custom_s8.o(.constdata) + Region$$Table$$Base 0x0001de54 Number 0 anon$$obj.o(Region$$Table) + Region$$Table$$Limit 0x0001de84 Number 0 anon$$obj.o(Region$$Table) + g_fun_handle 0x00070100 Data 192 irq_redirect .o(.ARM.__AT_0x00070100) + phone_86_flag 0x000701d6 Data 1 ap_demo.o(.data) + phone_A6_flag 0x000701d7 Data 1 ap_demo.o(.data) + phone_start_flag 0x000701d8 Data 1 ap_demo.o(.data) + phone_DisplayOFF_flag 0x000701d9 Data 1 ap_demo.o(.data) + ap_tear_flag 0x000701de Data 1 ap_demo.o(.data) + g_enter_display_off 0x000701df Data 1 ap_demo.o(.data) + panel_mode 0x000701e1 Data 1 ap_demo.o(.data) + phone_DisplayOFF_count 0x000701e4 Data 2 ap_demo.o(.data) + value_reg_b1 0x000701e6 Data 2 ap_demo.o(.data) + value_reg_b1_bak 0x000701e8 Data 2 ap_demo.o(.data) + value_reg51 0x000701ea Data 2 ap_demo.o(.data) + value_reg51_bak 0x000701ec Data 2 ap_demo.o(.data) + panel_r 0x000701ee Data 2 ap_demo.o(.data) + panel_g 0x000701f0 Data 2 ap_demo.o(.data) + panel_b 0x000701f2 Data 2 ap_demo.o(.data) + s_heartbeat 0x000701fc Data 4 ap_demo.o(.data) + value_reg_ca 0x00070200 Data 4 ap_demo.o(.data) + panel_init_code 0x00070208 Data 9953 ap_demo.o(.data) + phone_data_E4 0x000728ea Data 1 app_tp_for_custom_s8.o(.data) + tp_flag 0x000728eb Data 1 app_tp_for_custom_s8.o(.data) + g_phone_output_int_pad 0x000728ec Data 1 app_tp_for_custom_s8.o(.data) + tp_sleep_in 0x000728ed Data 1 app_tp_for_custom_s8.o(.data) + tp_sleep_count 0x000728ee Data 1 app_tp_for_custom_s8.o(.data) + sleep_double_EN 0x000728ef Data 1 app_tp_for_custom_s8.o(.data) + Flag_EA_EN 0x000728f0 Data 1 app_tp_for_custom_s8.o(.data) + Flag_touch_count 0x000728f1 Data 1 app_tp_for_custom_s8.o(.data) + touchnum_bak 0x000728f2 Data 1 app_tp_for_custom_s8.o(.data) + Flag_blacklight_EN 0x000728f3 Data 1 app_tp_for_custom_s8.o(.data) + phone_data_B1 0x000728fc Data 2 app_tp_for_custom_s8.o(.data) + phone_reg_coord_back 0x00072906 Data 200 app_tp_for_custom_s8.o(.data) + g_screen_input_rst_pad 0x000729ce Data 1 app_tp_for_custom_s8.o(.data) + g_screen_input_int_pad 0x000729cf Data 1 app_tp_for_custom_s8.o(.data) + screen_data_write_1 0x000729d0 Data 1 app_tp_for_custom_s8.o(.data) + screen_data_write_2 0x000729d1 Data 3 app_tp_for_custom_s8.o(.data) + screen_data_write_3 0x000729d4 Data 5 app_tp_for_custom_s8.o(.data) + screen_reg_int_data 0x000729dc Data 48 app_tp_for_custom_s8.o(.data) + s_screen_init_complate 0x00072a10 Data 1 app_tp_transfer.o(.data) + MI10_PRO_screen_init_data1 0x00072a14 Data 3 app_tp_transfer.o(.data) + MI10_PRO_screen_init_data3 0x00072a17 Data 3 app_tp_transfer.o(.data) + MI10_PRO_screen_init_data4 0x00072a1a Data 3 app_tp_transfer.o(.data) + MI10_PRO_TP_Tuning_data1 0x00072a1d Data 3 app_tp_transfer.o(.data) + MI10_PRO_TP_Tuning_data2 0x00072a20 Data 3 app_tp_transfer.o(.data) + MI10_PRO_TP_Tuning_data3 0x00072a23 Data 3 app_tp_transfer.o(.data) + MI10_PRO_TP_Tuning_data6 0x00072a26 Data 3 app_tp_transfer.o(.data) + MI10_PRO_TP_Tuning_data7 0x00072a29 Data 3 app_tp_transfer.o(.data) + MI10_PRO_TP_Tuning_data8 0x00072a2c Data 3 app_tp_transfer.o(.data) + MI10_PRO_TP_Tuning_data4 0x00072a2f Data 4 app_tp_transfer.o(.data) + MI10_PRO_TP_Tuning_data5 0x00072a33 Data 4 app_tp_transfer.o(.data) + MI10_PRO_screen_init_data2 0x00072a37 Data 6 app_tp_transfer.o(.data) + g_fls_w_cmd 0x00072a68 Data 1 norflash.o(.data) + g_fls_r_cmd 0x00072a69 Data 1 norflash.o(.data) + g_fls_write_en_status 0x00072a6a Data 1 norflash.o(.data) + isFlsTransferEnd 0x00072a6b Data 1 norflash.o(.data) + isFlsFifoReq 0x00072a6c Data 1 norflash.o(.data) + isNandWriteCompleted 0x00072a6d Data 1 norflash.o(.data) + isNandReadCompleted 0x00072a6e Data 1 norflash.o(.data) + g_fls_error_info 0x00072a74 Data 6 norflash.o(.data) + g_systick_cb_func 0x00072a80 Data 4 drv_common.o(.data) + g_system_clock 0x00072a84 Data 4 drv_common.o(.data) + tx_byte_num 0x00072a9c Data 4 drv_i2c_slave.o(.data) + g_scld_filter_h 0x00072aa0 Data 256 drv_param_init.o(.data) + g_scld_filter_v 0x00072ba0 Data 256 drv_param_init.o(.data) + g_scld_720_filter_h 0x00072ca0 Data 256 drv_param_init.o(.data) + g_scld_720_filter_v 0x00072da0 Data 256 drv_param_init.o(.data) + g_sclu_filter_h 0x00072ea0 Data 256 drv_param_init.o(.data) + g_sclu_filter_v 0x00072fa0 Data 256 drv_param_init.o(.data) + g_pq_setting 0x000730a0 Data 40 drv_param_init.o(.data) + g_ccm_setting 0x000730c8 Data 36 drv_param_init.o(.data) + __stdout 0x00073178 Data 4 stdout.o(.data) + tp_scan_data 0x0007330c Data 12 app_tp_transfer.o(.bss) + string 0x00073410 Data 256 tau_log.o(.bss) + hal_dmahandle 0x00073510 Data 12 hal_uart.o(.bss) + hal_uarthandle_dma 0x0007351c Data 32 hal_uart.o(.bss) + hal_uart_handle_global 0x0007353c Data 16 hal_uart.o(.bss) + g_packet_fifo 0x000735bc Data 2764 dcs_packet_fifo.o(.bss) + g_spis_ctrl_handle 0x000749f0 Data 32 hal_spi_slave.o(.bss) + __stack_limit 0x00074a10 Data 0 startup_armcm0.o(STACK) + __initial_sp 0x00075a10 Data 0 startup_armcm0.o(STACK) + + + +============================================================================== + +Memory Map of the image + + Image Entry point : 0x000100c1 + + Load Region LR_IROM2 (Base: 0x00010000, Size: 0x00010e30, Max: 0x00010000, ABSOLUTE, COMPRESSED[0x0000fdac]) + + Execution Region ER_IROM2 (Exec base: 0x00010000, Load base: 0x00010000, Size: 0x0000de84, Max: 0x00010000, ABSOLUTE) + + Exec Addr Load Addr Size Type Attr Idx E Section Name Object + + 0x00010000 0x00010000 0x000000c0 Data RO 587 RESET startup_armcm0.o + 0x000100c0 0x000100c0 0x00000000 Code RO 2568 * .ARM.Collect$$$$00000000 mc_p.l(entry.o) + 0x000100c0 0x000100c0 0x00000004 Code RO 2870 .ARM.Collect$$$$00000001 mc_p.l(entry2.o) + 0x000100c4 0x000100c4 0x00000004 Code RO 2873 .ARM.Collect$$$$00000004 mc_p.l(entry5.o) + 0x000100c8 0x000100c8 0x00000000 Code RO 2875 .ARM.Collect$$$$00000008 mc_p.l(entry7b.o) + 0x000100c8 0x000100c8 0x00000000 Code RO 2877 .ARM.Collect$$$$0000000A mc_p.l(entry8b.o) + 0x000100c8 0x000100c8 0x00000008 Code RO 2878 .ARM.Collect$$$$0000000B mc_p.l(entry9a.o) + 0x000100d0 0x000100d0 0x00000000 Code RO 2880 .ARM.Collect$$$$0000000D mc_p.l(entry10a.o) + 0x000100d0 0x000100d0 0x00000000 Code RO 2882 .ARM.Collect$$$$0000000F mc_p.l(entry11a.o) + 0x000100d0 0x000100d0 0x00000004 Code RO 2871 .ARM.Collect$$$$00002712 mc_p.l(entry2.o) + 0x000100d4 0x000100d4 0x00000078 Code RO 588 .text startup_armcm0.o + 0x0001014c 0x0001014c 0x0000002c Code RO 2571 .text mc_p.l(uidiv.o) + 0x00010178 0x00010178 0x00000028 Code RO 2573 .text mc_p.l(idiv.o) + 0x000101a0 0x000101a0 0x00000024 Code RO 2575 .text mc_p.l(memcpya.o) + 0x000101c4 0x000101c4 0x00000024 Code RO 2577 .text mc_p.l(memseta.o) + 0x000101e8 0x000101e8 0x000000b2 Code RO 2842 .text mf_p.l(fadd.o) + 0x0001029a 0x0001029a 0x0000007a Code RO 2844 .text mf_p.l(fmul.o) + 0x00010314 0x00010314 0x0000007c Code RO 2846 .text mf_p.l(fdiv.o) + 0x00010390 0x00010390 0x00000018 Code RO 2848 .text mf_p.l(fscalb.o) + 0x000103a8 0x000103a8 0x00000164 Code RO 2850 .text mf_p.l(dadd.o) + 0x0001050c 0x0001050c 0x00000016 Code RO 2852 .text mf_p.l(fflti.o) + 0x00010522 0x00010522 0x0000000e Code RO 2854 .text mf_p.l(ffltui.o) + 0x00010530 0x00010530 0x0000001c Code RO 2856 .text mf_p.l(dfltui.o) + 0x0001054c 0x0001054c 0x00000032 Code RO 2858 .text mf_p.l(ffixi.o) + 0x0001057e 0x0001057e 0x00000028 Code RO 2860 .text mf_p.l(ffixui.o) + 0x000105a6 0x000105a6 0x00000002 PAD + 0x000105a8 0x000105a8 0x00000048 Code RO 2862 .text mf_p.l(dfixi.o) + 0x000105f0 0x000105f0 0x0000003c Code RO 2864 .text mf_p.l(dfixui.o) + 0x0001062c 0x0001062c 0x00000028 Code RO 2866 .text mf_p.l(f2d.o) + 0x00010654 0x00010654 0x00000014 Code RO 2868 .text mf_p.l(cfrcmple.o) + 0x00010668 0x00010668 0x00000060 Code RO 2885 .text mc_p.l(uldiv.o) + 0x000106c8 0x000106c8 0x00000020 Code RO 2887 .text mc_p.l(llshl.o) + 0x000106e8 0x000106e8 0x00000022 Code RO 2889 .text mc_p.l(llushr.o) + 0x0001070a 0x0001070a 0x00000026 Code RO 2891 .text mc_p.l(llsshr.o) + 0x00010730 0x00010730 0x00000000 Code RO 2893 .text mc_p.l(iusefp.o) + 0x00010730 0x00010730 0x00000082 Code RO 2894 .text mf_p.l(fepilogue.o) + 0x000107b2 0x000107b2 0x000000be Code RO 2896 .text mf_p.l(depilogue.o) + 0x00010870 0x00010870 0x000000d0 Code RO 2900 .text mf_p.l(dmul.o) + 0x00010940 0x00010940 0x000000f0 Code RO 2902 .text mf_p.l(ddiv.o) + 0x00010a30 0x00010a30 0x00000040 Code RO 2904 .text mf_p.l(dfixul.o) + 0x00010a70 0x00010a70 0x00000028 Code RO 2906 .text mf_p.l(cdrcmple.o) + 0x00010a98 0x00010a98 0x00000024 Code RO 2908 .text mc_p.l(init.o) + 0x00010abc 0x00010abc 0x00000056 Code RO 2918 .text mc_p.l(__dczerorl2.o) + 0x00010b12 0x00010b12 0x00000002 PAD + 0x00010b14 0x00010b14 0x00000018 Code RO 2218 i.ADC_IRQn_Handler CVWL518.lib(irq_redirect .o) + 0x00010b2c 0x00010b2c 0x0000001c Code RO 2219 i.AP_NRESET_IRQn_Handler CVWL518.lib(irq_redirect .o) + 0x00010b48 0x00010b48 0x00000014 Code RO 2220 i.DMA_IRQn_Handler CVWL518.lib(irq_redirect .o) + 0x00010b5c 0x00010b5c 0x0000001c Code RO 2221 i.EXTI_INT0_IRQn_Handler CVWL518.lib(irq_redirect .o) + 0x00010b78 0x00010b78 0x0000001c Code RO 2222 i.EXTI_INT1_IRQn_Handler CVWL518.lib(irq_redirect .o) + 0x00010b94 0x00010b94 0x0000001c Code RO 2223 i.EXTI_INT2_IRQn_Handler CVWL518.lib(irq_redirect .o) + 0x00010bb0 0x00010bb0 0x0000001c Code RO 2224 i.EXTI_INT3_IRQn_Handler CVWL518.lib(irq_redirect .o) + 0x00010bcc 0x00010bcc 0x0000001c Code RO 2225 i.EXTI_INT4_IRQn_Handler CVWL518.lib(irq_redirect .o) + 0x00010be8 0x00010be8 0x0000001c Code RO 2226 i.EXTI_INT5_IRQn_Handler CVWL518.lib(irq_redirect .o) + 0x00010c04 0x00010c04 0x0000001c Code RO 2227 i.EXTI_INT6_IRQn_Handler CVWL518.lib(irq_redirect .o) + 0x00010c20 0x00010c20 0x0000001c Code RO 2228 i.EXTI_INT7_IRQn_Handler CVWL518.lib(irq_redirect .o) + 0x00010c3c 0x00010c3c 0x00000014 Code RO 2229 i.FLSCTRL_IRQn_Handler CVWL518.lib(irq_redirect .o) + 0x00010c50 0x00010c50 0x00000074 Code RO 99 i.Gpio_swire_output ap_demo.o + 0x00010cc4 0x00010cc4 0x00000014 Code RO 2230 i.HardFault_Handler CVWL518.lib(irq_redirect .o) + 0x00010cd8 0x00010cd8 0x00000018 Code RO 2231 i.I2C0_IRQn_Handler CVWL518.lib(irq_redirect .o) + 0x00010cf0 0x00010cf0 0x00000018 Code RO 2232 i.I2C1_IRQn_Handler CVWL518.lib(irq_redirect .o) + 0x00010d08 0x00010d08 0x00000018 Code RO 2233 i.LCDC_IRQn_Handler CVWL518.lib(irq_redirect .o) + 0x00010d20 0x00010d20 0x00000028 Code RO 978 i.LOG_printf CVWL518.lib(tau_log.o) + 0x00010d48 0x00010d48 0x00000018 Code RO 2234 i.MEMC_IRQn_Handler CVWL518.lib(irq_redirect .o) + 0x00010d60 0x00010d60 0x00000018 Code RO 2235 i.MIPI_RX_IRQn_Handler CVWL518.lib(irq_redirect .o) + 0x00010d78 0x00010d78 0x00000018 Code RO 2236 i.MIPI_TX_IRQn_Handler CVWL518.lib(irq_redirect .o) + 0x00010d90 0x00010d90 0x0000001c Code RO 2237 i.PWMDET_IRQn_Handler CVWL518.lib(irq_redirect .o) + 0x00010dac 0x00010dac 0x00000124 Code RO 376 i.S20_Start_init app_tp_transfer.o + 0x00010ed0 0x00010ed0 0x0000001c Code RO 2238 i.SPIM_IRQn_Handler CVWL518.lib(irq_redirect .o) + 0x00010eec 0x00010eec 0x0000001c Code RO 2239 i.SPIS_IRQn_Handler CVWL518.lib(irq_redirect .o) + 0x00010f08 0x00010f08 0x0000001c Code RO 2240 i.SWIRE_IRQn_Handler CVWL518.lib(irq_redirect .o) + 0x00010f24 0x00010f24 0x00000018 Code RO 2241 i.SysTick_Handler CVWL518.lib(irq_redirect .o) + 0x00010f3c 0x00010f3c 0x00000018 Code RO 2242 i.TIMER0_IRQn_Handler CVWL518.lib(irq_redirect .o) + 0x00010f54 0x00010f54 0x00000018 Code RO 2243 i.TIMER1_IRQn_Handler CVWL518.lib(irq_redirect .o) + 0x00010f6c 0x00010f6c 0x00000018 Code RO 2244 i.TIMER2_IRQn_Handler CVWL518.lib(irq_redirect .o) + 0x00010f84 0x00010f84 0x00000018 Code RO 2245 i.TIMER3_IRQn_Handler CVWL518.lib(irq_redirect .o) + 0x00010f9c 0x00010f9c 0x00000002 Code RO 2430 i.UART_DisableDma CVWL518.lib(drv_uart.o) + 0x00010f9e 0x00010f9e 0x00000004 Code RO 2436 i.UART_GetInstance CVWL518.lib(drv_uart.o) + 0x00010fa2 0x00010fa2 0x00000002 PAD + 0x00010fa4 0x00010fa4 0x0000001c Code RO 2442 i.UART_IRQ_Handle CVWL518.lib(drv_uart.o) + 0x00010fc0 0x00010fc0 0x00000018 Code RO 2246 i.UART_IRQn_Handler CVWL518.lib(irq_redirect .o) + 0x00010fd8 0x00010fd8 0x00000024 Code RO 2445 i.UART_ResetRxFIFO CVWL518.lib(drv_uart.o) + 0x00010ffc 0x00010ffc 0x00000002 Code RO 2913 i.__scatterload_null mc_p.l(handlers.o) + 0x00010ffe 0x00010ffe 0x00000001 Data RO 305 .constdata app_tp_for_custom_s8.o + 0x00010fff 0x00010fff 0x00000001 PAD + 0x00011000 0x00011000 0x00000014 Data RO 1101 .ARM.__at_0x11000 CVWL518.lib(drv_common.o) + 0x00011014 0x00011014 0x00000048 Code RO 2448 i.UART_SetBaudRate CVWL518.lib(drv_uart.o) + 0x0001105c 0x0001105c 0x0000001a Code RO 2449 i.UART_SwitchSCLK CVWL518.lib(drv_uart.o) + 0x00011076 0x00011076 0x00000134 Code RO 2451 i.UART_TransferHandleIRQ CVWL518.lib(drv_uart.o) + 0x000111aa 0x000111aa 0x0000001a Code RO 2453 i.UART_WriteBlocking CVWL518.lib(drv_uart.o) + 0x000111c4 0x000111c4 0x000000bc Code RO 2454 i.UART_init CVWL518.lib(drv_uart.o) + 0x00011280 0x00011280 0x00000018 Code RO 2247 i.VIDC_IRQn_Handler CVWL518.lib(irq_redirect .o) + 0x00011298 0x00011298 0x00000018 Code RO 2248 i.VPRE_IRQn_Handler CVWL518.lib(irq_redirect .o) + 0x000112b0 0x000112b0 0x00000018 Code RO 2249 i.WDG_IRQn_Handler CVWL518.lib(irq_redirect .o) + 0x000112c8 0x000112c8 0x00000020 Code RO 2814 i.__0printf mc_p.l(printfa.o) + 0x000112e8 0x000112e8 0x00000024 Code RO 2820 i.__0vsprintf mc_p.l(printfa.o) + 0x0001130c 0x0001130c 0x0000002e Code RO 2898 i.__ARM_clz mf_p.l(depilogue.o) + 0x0001133a 0x0001133a 0x0000001a Code RO 244 i.__ARM_common_switch8 ap_demo.o + 0x00011354 0x00011354 0x00000018 Code RO 1414 i.__NVIC_ClearPendingIRQ CVWL518.lib(drv_i2c_master.o) + 0x0001136c 0x0001136c 0x00000018 Code RO 1447 i.__NVIC_ClearPendingIRQ CVWL518.lib(drv_i2c_slave.o) + 0x00011384 0x00011384 0x00000044 Code RO 2318 i.__NVIC_SetPriority CVWL518.lib(hal_spi_slave.o) + 0x000113c8 0x000113c8 0x0000000e Code RO 2912 i.__scatterload_copy mc_p.l(handlers.o) + 0x000113d6 0x000113d6 0x0000000e Code RO 2914 i.__scatterload_zeroinit mc_p.l(handlers.o) + 0x000113e4 0x000113e4 0x00000174 Code RO 2821 i._fp_digits mc_p.l(printfa.o) + 0x00011558 0x00011558 0x000006ec Code RO 2822 i._printf_core mc_p.l(printfa.o) + 0x00011c44 0x00011c44 0x00000020 Code RO 2823 i._printf_post_padding mc_p.l(printfa.o) + 0x00011c64 0x00011c64 0x0000002c Code RO 2824 i._printf_pre_padding mc_p.l(printfa.o) + 0x00011c90 0x00011c90 0x0000000a Code RO 2826 i._sputc mc_p.l(printfa.o) + 0x00011c9a 0x00011c9a 0x00000002 PAD + 0x00011c9c 0x00011c9c 0x00001394 Code RO 100 i.ap_dcs_read ap_demo.o + 0x00013030 0x00013030 0x00000174 Code RO 101 i.ap_demo ap_demo.o + 0x000131a4 0x000131a4 0x0000002c Code RO 102 i.ap_get_reg_ca ap_demo.o + 0x000131d0 0x000131d0 0x000000b0 Code RO 103 i.ap_get_reg_df ap_demo.o + 0x00013280 0x00013280 0x0000005c Code RO 104 i.ap_reset_cb ap_demo.o + 0x000132dc 0x000132dc 0x00000360 Code RO 105 i.ap_set_backlight ap_demo.o + 0x0001363c 0x0001363c 0x00000058 Code RO 106 i.ap_set_display_off ap_demo.o + 0x00013694 0x00013694 0x00000044 Code RO 107 i.ap_set_display_on ap_demo.o + 0x000136d8 0x000136d8 0x00000060 Code RO 108 i.ap_set_enter_sleep_mode ap_demo.o + 0x00013738 0x00013738 0x00000048 Code RO 109 i.ap_set_exit_sleep_mode ap_demo.o + 0x00013780 0x00013780 0x0000001c Code RO 110 i.ap_set_tp_calibration_04 ap_demo.o + 0x0001379c 0x0001379c 0x000000b0 Code RO 377 i.ap_tp_calibration app_tp_transfer.o + 0x0001384c 0x0001384c 0x0000001c Code RO 378 i.ap_tp_scan_point_init app_tp_transfer.o + 0x00013868 0x00013868 0x0000009c Code RO 379 i.ap_tp_scan_point_record_event app_tp_transfer.o + 0x00013904 0x00013904 0x00000050 Code RO 380 i.ap_tp_scan_point_record_event_exec app_tp_transfer.o + 0x00013954 0x00013954 0x00000034 Code RO 381 i.ap_tp_simulate_finger_release_event app_tp_transfer.o + 0x00013988 0x00013988 0x00000040 Code RO 382 i.ap_tp_system_softReset app_tp_transfer.o + 0x000139c8 0x000139c8 0x00000024 Code RO 1338 i.app_AP_NRESET_IRQn_Handler CVWL518.lib(drv_gpio.o) + 0x000139ec 0x000139ec 0x0000001c Code RO 1339 i.app_EXTI_INT0_IRQn_Handler CVWL518.lib(drv_gpio.o) + 0x00013a08 0x00013a08 0x0000001c Code RO 1340 i.app_EXTI_INT1_IRQn_Handler CVWL518.lib(drv_gpio.o) + 0x00013a24 0x00013a24 0x0000001c Code RO 1341 i.app_EXTI_INT2_IRQn_Handler CVWL518.lib(drv_gpio.o) + 0x00013a40 0x00013a40 0x0000001c Code RO 1342 i.app_EXTI_INT3_IRQn_Handler CVWL518.lib(drv_gpio.o) + 0x00013a5c 0x00013a5c 0x0000001c Code RO 1343 i.app_EXTI_INT4_IRQn_Handler CVWL518.lib(drv_gpio.o) + 0x00013a78 0x00013a78 0x0000001c Code RO 1344 i.app_EXTI_INT5_IRQn_Handler CVWL518.lib(drv_gpio.o) + 0x00013a94 0x00013a94 0x0000001c Code RO 1345 i.app_EXTI_INT6_IRQn_Handler CVWL518.lib(drv_gpio.o) + 0x00013ab0 0x00013ab0 0x0000001c Code RO 1346 i.app_EXTI_INT7_IRQn_Handler CVWL518.lib(drv_gpio.o) + 0x00013acc 0x00013acc 0x00000048 Code RO 1092 i.app_HardFault_Handler CVWL518.lib(drv_common.o) + 0x00013b14 0x00013b14 0x00000010 Code RO 1448 i.app_I2C0_IRQn_Handler CVWL518.lib(drv_i2c_slave.o) + 0x00013b24 0x00013b24 0x00000010 Code RO 1415 i.app_I2C1_IRQn_Handler CVWL518.lib(drv_i2c_master.o) + 0x00013b34 0x00013b34 0x000000e0 Code RO 1687 i.app_LCDC_IRQn_Handler CVWL518.lib(hal_internal_vsync.o) + 0x00013c14 0x00013c14 0x00000060 Code RO 1990 i.app_MEMC_IRQn_Handler CVWL518.lib(drv_memc.o) + 0x00013c74 0x00013c74 0x00000298 Code RO 1760 i.app_MIPI_RX_IRQn_Handler CVWL518.lib(drv_dsi_rx.o) + 0x00013f0c 0x00013f0c 0x000000a0 Code RO 1814 i.app_MIPI_TX_IRQn_Handler CVWL518.lib(drv_dsi_tx.o) + 0x00013fac 0x00013fac 0x00000048 Code RO 2388 i.app_PWMDET_IRQn_Handler CVWL518.lib(drv_pwm.o) + 0x00013ff4 0x00013ff4 0x00000020 Code RO 1562 i.app_SPIM_IRQn_Handler CVWL518.lib(drv_spi_master.o) + 0x00014014 0x00014014 0x00000200 Code RO 2319 i.app_SPIS_IRQn_Handler CVWL518.lib(hal_spi_slave.o) + 0x00014214 0x00014214 0x00000020 Code RO 1591 i.app_SWIRE_IRQn_Handler CVWL518.lib(drv_swire.o) + 0x00014234 0x00014234 0x00000018 Code RO 1093 i.app_SysTick_Handler CVWL518.lib(drv_common.o) + 0x0001424c 0x0001424c 0x0000000a Code RO 1641 i.app_TIMER0_IRQn_Handler CVWL518.lib(drv_timer.o) + 0x00014256 0x00014256 0x0000000a Code RO 1642 i.app_TIMER1_IRQn_Handler CVWL518.lib(drv_timer.o) + 0x00014260 0x00014260 0x0000000a Code RO 1643 i.app_TIMER2_IRQn_Handler CVWL518.lib(drv_timer.o) + 0x0001426a 0x0001426a 0x0000000a Code RO 1644 i.app_TIMER3_IRQn_Handler CVWL518.lib(drv_timer.o) + 0x00014274 0x00014274 0x00000008 Code RO 2455 i.app_UART_IRQn_Handler CVWL518.lib(drv_uart.o) + 0x0001427c 0x0001427c 0x000000e4 Code RO 1688 i.app_VIDC_IRQn_Handler CVWL518.lib(hal_internal_vsync.o) + 0x00014360 0x00014360 0x00000284 Code RO 1689 i.app_VPRE_IRQn_Handler CVWL518.lib(hal_internal_vsync.o) + 0x000145e4 0x000145e4 0x00000038 Code RO 2514 i.app_WDG_IRQn_Handler CVWL518.lib(drv_wdg.o) + 0x0001461c 0x0001461c 0x00000008 Code RO 1202 i.app_dma_irq_handler CVWL518.lib(drv_dma.o) + 0x00014624 0x00014624 0x00000030 Code RO 989 i.app_fls_ctrl_Handler CVWL518.lib(norflash.o) + 0x00014654 0x00014654 0x00000024 Code RO 383 i.app_tp_I2C_init app_tp_transfer.o + 0x00014678 0x00014678 0x0000005c Code RO 111 i.app_tp_calibration_exec ap_demo.o + 0x000146d4 0x000146d4 0x0000000a Code RO 384 i.app_tp_i2cs_callback app_tp_transfer.o + 0x000146de 0x000146de 0x00000002 PAD + 0x000146e0 0x000146e0 0x00000048 Code RO 385 i.app_tp_init app_tp_transfer.o + 0x00014728 0x00014728 0x00000020 Code RO 386 i.app_tp_m_read app_tp_transfer.o + 0x00014748 0x00014748 0x00000008 Code RO 387 i.app_tp_m_transfer_complate app_tp_transfer.o + 0x00014750 0x00014750 0x00000008 Code RO 388 i.app_tp_m_write app_tp_transfer.o + 0x00014758 0x00014758 0x00000410 Code RO 288 i.app_tp_phone_analysis_data app_tp_for_custom_s8.o + 0x00014b68 0x00014b68 0x0000000c Code RO 389 i.app_tp_phone_clear_reset_on app_tp_transfer.o + 0x00014b74 0x00014b74 0x00000008 Code RO 391 i.app_tp_s_read app_tp_transfer.o + 0x00014b7c 0x00014b7c 0x00000008 Code RO 393 i.app_tp_s_write app_tp_transfer.o + 0x00014b84 0x00014b84 0x000002cc Code RO 290 i.app_tp_screen_analysis_int app_tp_for_custom_s8.o + 0x00014e50 0x00014e50 0x00000030 Code RO 394 i.app_tp_screen_init app_tp_transfer.o + 0x00014e80 0x00014e80 0x0000000c Code RO 395 i.app_tp_screen_int_callback app_tp_transfer.o + 0x00014e8c 0x00014e8c 0x00000038 Code RO 396 i.app_tp_screen_int_init app_tp_transfer.o + 0x00014ec4 0x00014ec4 0x00000004 Code RO 397 i.app_tp_screen_int_lvl_low app_tp_transfer.o + 0x00014ec8 0x00014ec8 0x00000030 Code RO 398 i.app_tp_transfer_phone app_tp_transfer.o + 0x00014ef8 0x00014ef8 0x00000040 Code RO 399 i.app_tp_transfer_screen_const app_tp_transfer.o + 0x00014f38 0x00014f38 0x000001e0 Code RO 400 i.app_tp_transfer_screen_int app_tp_transfer.o + 0x00015118 0x00015118 0x00000018 Code RO 401 i.app_tp_transfer_screen_start app_tp_transfer.o + 0x00015130 0x00015130 0x00000036 Code RO 112 i.blue_change_ccm ap_demo.o + 0x00015166 0x00015166 0x00000002 PAD + 0x00015168 0x00015168 0x0000001c Code RO 567 i.board_Init board.o + 0x00015184 0x00015184 0x000001ec Code RO 1690 i.calc_framebuffer_setting CVWL518.lib(hal_internal_vsync.o) + 0x00015370 0x00015370 0x000000c8 Code RO 2565 i.ceil m_ps.l(ceil.o) + 0x00015438 0x00015438 0x0000002c Code RO 1691 i.check_mipi_rx_tx_video_info CVWL518.lib(hal_internal_vsync.o) + 0x00015464 0x00015464 0x0000002c Code RO 1692 i.check_pkt_buf_rev CVWL518.lib(hal_internal_vsync.o) + 0x00015490 0x00015490 0x00000058 Code RO 1674 i.dcs_packet_fifo_alloc CVWL518.lib(dcs_packet_fifo.o) + 0x000154e8 0x000154e8 0x00000018 Code RO 1675 i.dcs_packet_fifo_init CVWL518.lib(dcs_packet_fifo.o) + 0x00015500 0x00015500 0x00000044 Code RO 1676 i.dcs_packet_free_fifo_header CVWL518.lib(dcs_packet_fifo.o) + 0x00015544 0x00015544 0x00000024 Code RO 1677 i.dcs_packet_get_fifo_header CVWL518.lib(dcs_packet_fifo.o) + 0x00015568 0x00015568 0x0000001c Code RO 1693 i.dcs_sw_filter CVWL518.lib(hal_internal_vsync.o) + 0x00015584 0x00015584 0x00000018 Code RO 970 i.delayMs CVWL518.lib(tau_delay.o) + 0x0001559c 0x0001559c 0x00000022 Code RO 971 i.delayUs CVWL518.lib(tau_delay.o) + 0x000155be 0x000155be 0x00000002 PAD + 0x000155c0 0x000155c0 0x00000094 Code RO 113 i.disable_mipi_timer_cb ap_demo.o + 0x00015654 0x00015654 0x00000038 Code RO 1610 i.drv_ap_rst_trig_edge_detect CVWL518.lib(drv_sys_cfg.o) + 0x0001568c 0x0001568c 0x0000000c Code RO 2289 i.drv_chip_info_get_version CVWL518.lib(drv_chip_info.o) + 0x00015698 0x00015698 0x000000b0 Code RO 2290 i.drv_chip_info_init CVWL518.lib(drv_chip_info.o) + 0x00015748 0x00015748 0x0000005c Code RO 2291 i.drv_chip_rx_info_check CVWL518.lib(drv_chip_info.o) + 0x000157a4 0x000157a4 0x00000014 Code RO 2292 i.drv_chip_rx_init_done CVWL518.lib(drv_chip_info.o) + 0x000157b8 0x000157b8 0x00000058 Code RO 1095 i.drv_common_enable_systick CVWL518.lib(drv_common.o) + 0x00015810 0x00015810 0x00000030 Code RO 1099 i.drv_common_system_init CVWL518.lib(drv_common.o) + 0x00015840 0x00015840 0x00000010 Code RO 1121 i.drv_crgu_config_reset_modules CVWL518.lib(drv_crgu.o) + 0x00015850 0x00015850 0x00000014 Code RO 1133 i.drv_crgu_set_ahb_pre_div CVWL518.lib(drv_crgu.o) + 0x00015864 0x00015864 0x00000014 Code RO 1134 i.drv_crgu_set_ahb_src CVWL518.lib(drv_crgu.o) + 0x00015878 0x00015878 0x00000020 Code RO 1135 i.drv_crgu_set_clock CVWL518.lib(drv_crgu.o) + 0x00015898 0x00015898 0x00000014 Code RO 1136 i.drv_crgu_set_dpi_mux_src CVWL518.lib(drv_crgu.o) + 0x000158ac 0x000158ac 0x00000018 Code RO 1137 i.drv_crgu_set_dpi_pre_div CVWL518.lib(drv_crgu.o) + 0x000158c4 0x000158c4 0x00000014 Code RO 1138 i.drv_crgu_set_dpi_pre_src CVWL518.lib(drv_crgu.o) + 0x000158d8 0x000158d8 0x00000014 Code RO 1139 i.drv_crgu_set_dsc_core_div CVWL518.lib(drv_crgu.o) + 0x000158ec 0x000158ec 0x00000014 Code RO 1140 i.drv_crgu_set_dsco_src CVWL518.lib(drv_crgu.o) + 0x00015900 0x00015900 0x00000014 Code RO 1141 i.drv_crgu_set_dsco_src_div CVWL518.lib(drv_crgu.o) + 0x00015914 0x00015914 0x00000014 Code RO 1142 i.drv_crgu_set_fb_div CVWL518.lib(drv_crgu.o) + 0x00015928 0x00015928 0x00000014 Code RO 1143 i.drv_crgu_set_fb_src CVWL518.lib(drv_crgu.o) + 0x0001593c 0x0001593c 0x00000014 Code RO 1146 i.drv_crgu_set_lcdc_div CVWL518.lib(drv_crgu.o) + 0x00015950 0x00015950 0x00000014 Code RO 1147 i.drv_crgu_set_lcdc_src CVWL518.lib(drv_crgu.o) + 0x00015964 0x00015964 0x00000014 Code RO 1148 i.drv_crgu_set_mipi_cfg_src CVWL518.lib(drv_crgu.o) + 0x00015978 0x00015978 0x00000018 Code RO 1149 i.drv_crgu_set_mipi_ref_src CVWL518.lib(drv_crgu.o) + 0x00015990 0x00015990 0x00000018 Code RO 1152 i.drv_crgu_set_reset CVWL518.lib(drv_crgu.o) + 0x000159a8 0x000159a8 0x00000014 Code RO 1153 i.drv_crgu_set_rxbr_div CVWL518.lib(drv_crgu.o) + 0x000159bc 0x000159bc 0x00000014 Code RO 1154 i.drv_crgu_set_rxbr_src CVWL518.lib(drv_crgu.o) + 0x000159d0 0x000159d0 0x00000014 Code RO 1156 i.drv_crgu_set_vidc_src CVWL518.lib(drv_crgu.o) + 0x000159e4 0x000159e4 0x0000001c Code RO 1206 i.drv_dma_clear_flag CVWL518.lib(drv_dma.o) + 0x00015a00 0x00015a00 0x00000018 Code RO 1207 i.drv_dma_create_handle CVWL518.lib(drv_dma.o) + 0x00015a18 0x00015a18 0x00000018 Code RO 1209 i.drv_dma_disenable_channel CVWL518.lib(drv_dma.o) + 0x00015a30 0x00015a30 0x00000018 Code RO 1211 i.drv_dma_enable_channel CVWL518.lib(drv_dma.o) + 0x00015a48 0x00015a48 0x00000034 Code RO 1212 i.drv_dma_enable_channel_interrupts CVWL518.lib(drv_dma.o) + 0x00015a7c 0x00015a7c 0x00000030 Code RO 1213 i.drv_dma_enable_cycle CVWL518.lib(drv_dma.o) + 0x00015aac 0x00015aac 0x00000014 Code RO 1214 i.drv_dma_get_channel_flag CVWL518.lib(drv_dma.o) + 0x00015ac0 0x00015ac0 0x0000007c Code RO 1217 i.drv_dma_irq_handler CVWL518.lib(drv_dma.o) + 0x00015b3c 0x00015b3c 0x00000018 Code RO 1219 i.drv_dma_prepar_transfer CVWL518.lib(drv_dma.o) + 0x00015b54 0x00015b54 0x0000001c Code RO 1221 i.drv_dma_set_burst CVWL518.lib(drv_dma.o) + 0x00015b70 0x00015b70 0x00000006 Code RO 1222 i.drv_dma_set_callback CVWL518.lib(drv_dma.o) + 0x00015b76 0x00015b76 0x00000002 PAD + 0x00015b78 0x00015b78 0x00000044 Code RO 1224 i.drv_dma_set_transfer CVWL518.lib(drv_dma.o) + 0x00015bbc 0x00015bbc 0x00000036 Code RO 2302 i.drv_dsc_dec_convert_pps_rc_parameter CVWL518.lib(drv_dsc_dec.o) + 0x00015bf2 0x00015bf2 0x0000000c Code RO 2303 i.drv_dsc_dec_disable CVWL518.lib(drv_dsc_dec.o) + 0x00015bfe 0x00015bfe 0x00000002 PAD + 0x00015c00 0x00015c00 0x000000b4 Code RO 2304 i.drv_dsc_dec_enable CVWL518.lib(drv_dsc_dec.o) + 0x00015cb4 0x00015cb4 0x0000000a Code RO 2305 i.drv_dsc_dec_get_nslc CVWL518.lib(drv_dsc_dec.o) + 0x00015cbe 0x00015cbe 0x00000028 Code RO 2307 i.drv_dsc_dec_set_u8_pps CVWL518.lib(drv_dsc_dec.o) + 0x00015ce6 0x00015ce6 0x00000002 PAD + 0x00015ce8 0x00015ce8 0x00000104 Code RO 1761 i.drv_dsi_rx_calc_ipi_tx_delay CVWL518.lib(drv_dsi_rx.o) + 0x00015dec 0x00015dec 0x00000040 Code RO 1762 i.drv_dsi_rx_enable_irq CVWL518.lib(drv_dsi_rx.o) + 0x00015e2c 0x00015e2c 0x00000050 Code RO 1763 i.drv_dsi_rx_get_color_bpp CVWL518.lib(drv_dsi_rx.o) + 0x00015e7c 0x00015e7c 0x0000001c Code RO 1764 i.drv_dsi_rx_get_color_pcc CVWL518.lib(drv_dsi_rx.o) + 0x00015e98 0x00015e98 0x00000008 Code RO 1765 i.drv_dsi_rx_get_compression_en CVWL518.lib(drv_dsi_rx.o) + 0x00015ea0 0x00015ea0 0x00000006 Code RO 1766 i.drv_dsi_rx_get_max_ret_size CVWL518.lib(drv_dsi_rx.o) + 0x00015ea6 0x00015ea6 0x0000000e Code RO 1770 i.drv_dsi_rx_power_up CVWL518.lib(drv_dsi_rx.o) + 0x00015eb4 0x00015eb4 0x0000001c Code RO 1771 i.drv_dsi_rx_set_ctrl_cfg CVWL518.lib(drv_dsi_rx.o) + 0x00015ed0 0x00015ed0 0x00000010 Code RO 1772 i.drv_dsi_rx_set_ddi_cfg CVWL518.lib(drv_dsi_rx.o) + 0x00015ee0 0x00015ee0 0x00000004 Code RO 1774 i.drv_dsi_rx_set_inten CVWL518.lib(drv_dsi_rx.o) + 0x00015ee4 0x00015ee4 0x00000010 Code RO 1775 i.drv_dsi_rx_set_ipi_cfg CVWL518.lib(drv_dsi_rx.o) + 0x00015ef4 0x00015ef4 0x00000026 Code RO 1777 i.drv_dsi_rx_set_resp_cnt CVWL518.lib(drv_dsi_rx.o) + 0x00015f1a 0x00015f1a 0x00000002 PAD + 0x00015f1c 0x00015f1c 0x00000090 Code RO 1778 i.drv_dsi_rx_set_up_phy CVWL518.lib(drv_dsi_rx.o) + 0x00015fac 0x00015fac 0x0000000e Code RO 1779 i.drv_dsi_rx_shut_down CVWL518.lib(drv_dsi_rx.o) + 0x00015fba 0x00015fba 0x00000014 Code RO 1816 i.drv_dsi_tx_command_header CVWL518.lib(drv_dsi_tx.o) + 0x00015fce 0x00015fce 0x0000006c Code RO 1817 i.drv_dsi_tx_command_mode_cfg CVWL518.lib(drv_dsi_tx.o) + 0x0001603a 0x0001603a 0x00000004 Code RO 1818 i.drv_dsi_tx_command_put_payload CVWL518.lib(drv_dsi_tx.o) + 0x0001603e 0x0001603e 0x00000018 Code RO 1819 i.drv_dsi_tx_config_eotp CVWL518.lib(drv_dsi_tx.o) + 0x00016056 0x00016056 0x00000008 Code RO 1820 i.drv_dsi_tx_config_int CVWL518.lib(drv_dsi_tx.o) + 0x0001605e 0x0001605e 0x00000008 Code RO 1821 i.drv_dsi_tx_dpi_lpcmd_time CVWL518.lib(drv_dsi_tx.o) + 0x00016066 0x00016066 0x0000000a Code RO 1822 i.drv_dsi_tx_dpi_mode CVWL518.lib(drv_dsi_tx.o) + 0x00016070 0x00016070 0x00000024 Code RO 1823 i.drv_dsi_tx_dpi_polarity CVWL518.lib(drv_dsi_tx.o) + 0x00016094 0x00016094 0x00000004 Code RO 1825 i.drv_dsi_tx_get_cmd_status CVWL518.lib(drv_dsi_tx.o) + 0x00016098 0x00016098 0x00000004 Code RO 1827 i.drv_dsi_tx_mode CVWL518.lib(drv_dsi_tx.o) + 0x0001609c 0x0001609c 0x00000018 Code RO 1828 i.drv_dsi_tx_phy_clock_lane_auto_lp CVWL518.lib(drv_dsi_tx.o) + 0x000160b4 0x000160b4 0x0000001a Code RO 1829 i.drv_dsi_tx_phy_clock_lane_req_hs CVWL518.lib(drv_dsi_tx.o) + 0x000160ce 0x000160ce 0x0000000c Code RO 1831 i.drv_dsi_tx_phy_lane_mode CVWL518.lib(drv_dsi_tx.o) + 0x000160da 0x000160da 0x00000064 Code RO 1835 i.drv_dsi_tx_phy_status_ready CVWL518.lib(drv_dsi_tx.o) + 0x0001613e 0x0001613e 0x0000003e Code RO 1836 i.drv_dsi_tx_phy_status_stopstate CVWL518.lib(drv_dsi_tx.o) + 0x0001617c 0x0001617c 0x000000e4 Code RO 1838 i.drv_dsi_tx_phy_test_setup CVWL518.lib(drv_dsi_tx.o) + 0x00016260 0x00016260 0x0000001e Code RO 1839 i.drv_dsi_tx_phy_time_cfg CVWL518.lib(drv_dsi_tx.o) + 0x0001627e 0x0001627e 0x00000008 Code RO 1843 i.drv_dsi_tx_powerup CVWL518.lib(drv_dsi_tx.o) + 0x00016286 0x00016286 0x0000001c Code RO 1844 i.drv_dsi_tx_response_mode CVWL518.lib(drv_dsi_tx.o) + 0x000162a2 0x000162a2 0x00000018 Code RO 1847 i.drv_dsi_tx_set_bta_ack CVWL518.lib(drv_dsi_tx.o) + 0x000162ba 0x000162ba 0x0000000c Code RO 1848 i.drv_dsi_tx_set_esc_div CVWL518.lib(drv_dsi_tx.o) + 0x000162c6 0x000162c6 0x00000002 PAD + 0x000162c8 0x000162c8 0x00000034 Code RO 1849 i.drv_dsi_tx_set_int CVWL518.lib(drv_dsi_tx.o) + 0x000162fc 0x000162fc 0x00000010 Code RO 1850 i.drv_dsi_tx_set_time_out_div CVWL518.lib(drv_dsi_tx.o) + 0x0001630c 0x0001630c 0x00000008 Code RO 1851 i.drv_dsi_tx_set_video_chunk CVWL518.lib(drv_dsi_tx.o) + 0x00016314 0x00016314 0x00000022 Code RO 1852 i.drv_dsi_tx_set_video_timing CVWL518.lib(drv_dsi_tx.o) + 0x00016336 0x00016336 0x00000008 Code RO 1854 i.drv_dsi_tx_shutdown CVWL518.lib(drv_dsi_tx.o) + 0x0001633e 0x0001633e 0x00000026 Code RO 1855 i.drv_dsi_tx_timeout_cfg CVWL518.lib(drv_dsi_tx.o) + 0x00016364 0x00016364 0x000000aa Code RO 1858 i.drv_dsi_tx_video_mode_cfg CVWL518.lib(drv_dsi_tx.o) + 0x0001640e 0x0001640e 0x00000016 Code RO 1859 i.drv_dsi_tx_video_mode_disable_hact_cmd CVWL518.lib(drv_dsi_tx.o) + 0x00016424 0x00016424 0x00000018 Code RO 1860 i.drv_dsi_tx_video_mode_set_lp_cmd CVWL518.lib(drv_dsi_tx.o) + 0x0001643c 0x0001643c 0x00000018 Code RO 1347 i.drv_gpio_get_input_data CVWL518.lib(drv_gpio.o) + 0x00016454 0x00016454 0x0000000c Code RO 1349 i.drv_gpio_register_ap_reset_callback CVWL518.lib(drv_gpio.o) + 0x00016460 0x00016460 0x00000014 Code RO 1350 i.drv_gpio_register_callback CVWL518.lib(drv_gpio.o) + 0x00016474 0x00016474 0x00000044 Code RO 1352 i.drv_gpio_set_int CVWL518.lib(drv_gpio.o) + 0x000164b8 0x000164b8 0x00000020 Code RO 1353 i.drv_gpio_set_ioe CVWL518.lib(drv_gpio.o) + 0x000164d8 0x000164d8 0x00000010 Code RO 1354 i.drv_gpio_set_mode0 CVWL518.lib(drv_gpio.o) + 0x000164e8 0x000164e8 0x00000010 Code RO 1355 i.drv_gpio_set_mode1 CVWL518.lib(drv_gpio.o) + 0x000164f8 0x000164f8 0x00000010 Code RO 1356 i.drv_gpio_set_mode2 CVWL518.lib(drv_gpio.o) + 0x00016508 0x00016508 0x00000010 Code RO 1357 i.drv_gpio_set_mode3 CVWL518.lib(drv_gpio.o) + 0x00016518 0x00016518 0x00000020 Code RO 786 i.drv_gpio_set_output_data CVWL518.lib(hal_gpio.o) + 0x00016538 0x00016538 0x00000130 Code RO 1358 i.drv_gpio_set_pull_state CVWL518.lib(drv_gpio.o) + 0x00016668 0x00016668 0x00000060 Code RO 1416 i.drv_i2c_clear_m_it_pending_bit CVWL518.lib(drv_i2c_master.o) + 0x000166c8 0x000166c8 0x0000005c Code RO 1449 i.drv_i2c_clear_s_it_pending_bit CVWL518.lib(drv_i2c_slave.o) + 0x00016724 0x00016724 0x00000034 Code RO 1390 i.drv_i2c_dma_callback CVWL518.lib(drv_i2c_dma.o) + 0x00016758 0x00016758 0x000000ac Code RO 1391 i.drv_i2c_dma_init CVWL518.lib(drv_i2c_dma.o) + 0x00016804 0x00016804 0x0000001a Code RO 1392 i.drv_i2c_enable_rx_dma CVWL518.lib(drv_i2c_dma.o) + 0x0001681e 0x0001681e 0x00000018 Code RO 1393 i.drv_i2c_enable_tx_dma CVWL518.lib(drv_i2c_dma.o) + 0x00016836 0x00016836 0x00000002 PAD + 0x00016838 0x00016838 0x00000038 Code RO 1420 i.drv_i2c_m_enable_intr CVWL518.lib(drv_i2c_master.o) + 0x00016870 0x00016870 0x0000000c Code RO 1423 i.drv_i2c_m_set_callback CVWL518.lib(drv_i2c_master.o) + 0x0001687c 0x0001687c 0x0000008c Code RO 1427 i.drv_i2c_master_init CVWL518.lib(drv_i2c_master.o) + 0x00016908 0x00016908 0x0000007c Code RO 1394 i.drv_i2c_master_read_dma CVWL518.lib(drv_i2c_dma.o) + 0x00016984 0x00016984 0x00000040 Code RO 1395 i.drv_i2c_master_write_dma CVWL518.lib(drv_i2c_dma.o) + 0x000169c4 0x000169c4 0x0000002e Code RO 1396 i.drv_i2c_master_write_read_cmd CVWL518.lib(drv_i2c_dma.o) + 0x000169f2 0x000169f2 0x00000002 PAD + 0x000169f4 0x000169f4 0x00000034 Code RO 1453 i.drv_i2c_s_enable_intr CVWL518.lib(drv_i2c_slave.o) + 0x00016a28 0x00016a28 0x0000001c Code RO 1454 i.drv_i2c_s_get_fifo_status CVWL518.lib(drv_i2c_slave.o) + 0x00016a44 0x00016a44 0x0000000c Code RO 1457 i.drv_i2c_s_set_callback CVWL518.lib(drv_i2c_slave.o) + 0x00016a50 0x00016a50 0x00000020 Code RO 1460 i.drv_i2c_s_write_data CVWL518.lib(drv_i2c_slave.o) + 0x00016a70 0x00016a70 0x00000050 Code RO 1397 i.drv_i2c_set_dma_irq_callback CVWL518.lib(drv_i2c_dma.o) + 0x00016ac0 0x00016ac0 0x00000044 Code RO 1461 i.drv_i2c_slave_init CVWL518.lib(drv_i2c_slave.o) + 0x00016b04 0x00016b04 0x00000024 Code RO 1398 i.drv_i2c_slave_write_dma CVWL518.lib(drv_i2c_dma.o) + 0x00016b28 0x00016b28 0x00000018 Code RO 1926 i.drv_lcdc_config_420_to_444_mode CVWL518.lib(drv_lcdc.o) + 0x00016b40 0x00016b40 0x00000018 Code RO 1927 i.drv_lcdc_config_bypass CVWL518.lib(drv_lcdc.o) + 0x00016b58 0x00016b58 0x00000018 Code RO 1928 i.drv_lcdc_config_cbcr CVWL518.lib(drv_lcdc.o) + 0x00016b70 0x00016b70 0x00000030 Code RO 1929 i.drv_lcdc_config_ccm CVWL518.lib(drv_lcdc.o) + 0x00016ba0 0x00016ba0 0x00000016 Code RO 1930 i.drv_lcdc_config_disp_mode CVWL518.lib(drv_lcdc.o) + 0x00016bb6 0x00016bb6 0x00000024 Code RO 1931 i.drv_lcdc_config_dpi_polarity CVWL518.lib(drv_lcdc.o) + 0x00016bda 0x00016bda 0x00000026 Code RO 1932 i.drv_lcdc_config_dpi_timing CVWL518.lib(drv_lcdc.o) + 0x00016c00 0x00016c00 0x00000016 Code RO 1933 i.drv_lcdc_config_endianness CVWL518.lib(drv_lcdc.o) + 0x00016c16 0x00016c16 0x00000020 Code RO 1934 i.drv_lcdc_config_horiz_flip CVWL518.lib(drv_lcdc.o) + 0x00016c36 0x00016c36 0x0000000c Code RO 1935 i.drv_lcdc_config_input_size CVWL518.lib(drv_lcdc.o) + 0x00016c42 0x00016c42 0x0000001e Code RO 1936 i.drv_lcdc_config_int CVWL518.lib(drv_lcdc.o) + 0x00016c60 0x00016c60 0x00000022 Code RO 1937 i.drv_lcdc_config_int_single CVWL518.lib(drv_lcdc.o) + 0x00016c82 0x00016c82 0x00000022 Code RO 1938 i.drv_lcdc_config_overwrite CVWL518.lib(drv_lcdc.o) + 0x00016ca4 0x00016ca4 0x0000000c Code RO 1939 i.drv_lcdc_config_overwrite_rgb CVWL518.lib(drv_lcdc.o) + 0x00016cb0 0x00016cb0 0x0000001a Code RO 1940 i.drv_lcdc_config_partial_display_area CVWL518.lib(drv_lcdc.o) + 0x00016cca 0x00016cca 0x00000022 Code RO 1941 i.drv_lcdc_config_partial_display_enable CVWL518.lib(drv_lcdc.o) + 0x00016cec 0x00016cec 0x00000072 Code RO 1944 i.drv_lcdc_config_src_parameter CVWL518.lib(drv_lcdc.o) + 0x00016d5e 0x00016d5e 0x00000008 Code RO 1945 i.drv_lcdc_config_thresh CVWL518.lib(drv_lcdc.o) + 0x00016d66 0x00016d66 0x00000060 Code RO 1946 i.drv_lcdc_config_upscaler CVWL518.lib(drv_lcdc.o) + 0x00016dc6 0x00016dc6 0x0000000a Code RO 1947 i.drv_lcdc_config_yuv420_threshold CVWL518.lib(drv_lcdc.o) + 0x00016dd0 0x00016dd0 0x00000012 Code RO 1948 i.drv_lcdc_ctrl_flow CVWL518.lib(drv_lcdc.o) + 0x00016de2 0x00016de2 0x00000020 Code RO 1950 i.drv_lcdc_enable_shadow_reg CVWL518.lib(drv_lcdc.o) + 0x00016e02 0x00016e02 0x00000002 PAD + 0x00016e04 0x00016e04 0x00000034 Code RO 1953 i.drv_lcdc_set_int CVWL518.lib(drv_lcdc.o) + 0x00016e38 0x00016e38 0x00000020 Code RO 1954 i.drv_lcdc_start CVWL518.lib(drv_lcdc.o) + 0x00016e58 0x00016e58 0x0000000c Code RO 1955 i.drv_lcdc_update_shadow_reg CVWL518.lib(drv_lcdc.o) + 0x00016e64 0x00016e64 0x00000010 Code RO 1991 i.drv_memc_bypass_fifo_empty CVWL518.lib(drv_memc.o) + 0x00016e74 0x00016e74 0x0000000c Code RO 1992 i.drv_memc_clear_status CVWL518.lib(drv_memc.o) + 0x00016e80 0x00016e80 0x00000040 Code RO 1993 i.drv_memc_enable_irq CVWL518.lib(drv_memc.o) + 0x00016ec0 0x00016ec0 0x0000000c Code RO 1994 i.drv_memc_gen_a_tear_signal CVWL518.lib(drv_memc.o) + 0x00016ecc 0x00016ecc 0x00000012 Code RO 1995 i.drv_memc_get_status CVWL518.lib(drv_memc.o) + 0x00016ede 0x00016ede 0x00000010 Code RO 1996 i.drv_memc_rate_transfer_sel CVWL518.lib(drv_memc.o) + 0x00016eee 0x00016eee 0x0000000e Code RO 1997 i.drv_memc_sel_vsync CVWL518.lib(drv_memc.o) + 0x00016efc 0x00016efc 0x0000000c Code RO 1999 i.drv_memc_set_data_mode CVWL518.lib(drv_memc.o) + 0x00016f08 0x00016f08 0x00000010 Code RO 2002 i.drv_memc_set_tear_hwclr CVWL518.lib(drv_memc.o) + 0x00016f18 0x00016f18 0x0000000e Code RO 2003 i.drv_memc_set_tear_mode CVWL518.lib(drv_memc.o) + 0x00016f26 0x00016f26 0x00000002 PAD + 0x00016f28 0x00016f28 0x00000024 Code RO 2004 i.drv_memc_set_tear_waveform CVWL518.lib(drv_memc.o) + 0x00016f4c 0x00016f4c 0x00000010 Code RO 2005 i.drv_memc_set_yuv420_cfg CVWL518.lib(drv_memc.o) + 0x00016f5c 0x00016f5c 0x00000010 Code RO 1482 i.drv_param_get_picture_quality_setting CVWL518.lib(drv_param_init.o) + 0x00016f6c 0x00016f6c 0x00000008 Code RO 1483 i.drv_param_init_get_ccm CVWL518.lib(drv_param_init.o) + 0x00016f74 0x00016f74 0x00000014 Code RO 1484 i.drv_param_init_get_scld_filter_h CVWL518.lib(drv_param_init.o) + 0x00016f88 0x00016f88 0x00000014 Code RO 1485 i.drv_param_init_get_scld_filter_v CVWL518.lib(drv_param_init.o) + 0x00016f9c 0x00016f9c 0x00000008 Code RO 1486 i.drv_param_init_get_sclu_filter_h CVWL518.lib(drv_param_init.o) + 0x00016fa4 0x00016fa4 0x00000008 Code RO 1487 i.drv_param_init_get_sclu_filter_v CVWL518.lib(drv_param_init.o) + 0x00016fac 0x00016fac 0x00000014 Code RO 1488 i.drv_param_init_set_ccm CVWL518.lib(drv_param_init.o) + 0x00016fc0 0x00016fc0 0x0000003c Code RO 1491 i.drv_param_p2r_filter_init CVWL518.lib(drv_param_init.o) + 0x00016ffc 0x00016ffc 0x00000034 Code RO 1496 i.drv_param_yuv420_filter_init CVWL518.lib(drv_param_init.o) + 0x00017030 0x00017030 0x00000060 Code RO 2026 i.drv_phy_get_pll_para CVWL518.lib(drv_phy_common.o) + 0x00017090 0x00017090 0x00000054 Code RO 2027 i.drv_phy_get_rate_para CVWL518.lib(drv_phy_common.o) + 0x000170e4 0x000170e4 0x00000010 Code RO 2028 i.drv_phy_test_clear CVWL518.lib(drv_phy_common.o) + 0x000170f4 0x000170f4 0x00000018 Code RO 2029 i.drv_phy_test_lock CVWL518.lib(drv_phy_common.o) + 0x0001710c 0x0001710c 0x00000020 Code RO 2031 i.drv_phy_test_write_1_byte CVWL518.lib(drv_phy_common.o) + 0x0001712c 0x0001712c 0x00000026 Code RO 2032 i.drv_phy_test_write_2_byte CVWL518.lib(drv_phy_common.o) + 0x00017152 0x00017152 0x0000001e Code RO 2033 i.drv_phy_test_write_code CVWL518.lib(drv_phy_common.o) + 0x00017170 0x00017170 0x00000020 Code RO 2034 i.drv_phy_test_write_data CVWL518.lib(drv_phy_common.o) + 0x00017190 0x00017190 0x00000020 Code RO 1529 i.drv_pwr_set_cp_mode CVWL518.lib(drv_pwr.o) + 0x000171b0 0x000171b0 0x0000001c Code RO 1530 i.drv_pwr_set_pvd_mode CVWL518.lib(drv_pwr.o) + 0x000171cc 0x000171cc 0x00000030 Code RO 1531 i.drv_pwr_set_system_clk_src CVWL518.lib(drv_pwr.o) + 0x000171fc 0x000171fc 0x0000000c Code RO 1780 i.drv_rx_phy_test_clear CVWL518.lib(drv_dsi_rx.o) + 0x00017208 0x00017208 0x00000010 Code RO 1781 i.drv_rx_phy_test_lock CVWL518.lib(drv_dsi_rx.o) + 0x00017218 0x00017218 0x00000014 Code RO 1783 i.drv_rx_phy_test_write_1_byte CVWL518.lib(drv_dsi_rx.o) + 0x0001722c 0x0001722c 0x00000016 Code RO 1784 i.drv_rx_phy_test_write_2_byte CVWL518.lib(drv_dsi_rx.o) + 0x00017242 0x00017242 0x00000006 Code RO 2049 i.drv_rxbr_clear_pkt_buffer CVWL518.lib(drv_rxbr.o) + 0x00017248 0x00017248 0x00000004 Code RO 2050 i.drv_rxbr_clear_status CVWL518.lib(drv_rxbr.o) + 0x0001724c 0x0001724c 0x00000040 Code RO 2052 i.drv_rxbr_enable_irq CVWL518.lib(drv_rxbr.o) + 0x0001728c 0x0001728c 0x00000008 Code RO 2054 i.drv_rxbr_frame_drop_cfg CVWL518.lib(drv_rxbr.o) + 0x00017294 0x00017294 0x0000003c Code RO 2055 i.drv_rxbr_get_clk CVWL518.lib(drv_rxbr.o) + 0x000172d0 0x000172d0 0x00000004 Code RO 2056 i.drv_rxbr_get_col_addr CVWL518.lib(drv_rxbr.o) + 0x000172d4 0x000172d4 0x00000008 Code RO 2057 i.drv_rxbr_get_cur_hline_rcv_cnt CVWL518.lib(drv_rxbr.o) + 0x000172dc 0x000172dc 0x00000010 Code RO 2058 i.drv_rxbr_get_hline_rcv_cfg CVWL518.lib(drv_rxbr.o) + 0x000172ec 0x000172ec 0x00000012 Code RO 1694 i.drv_rxbr_get_int_source CVWL518.lib(hal_internal_vsync.o) + 0x000172fe 0x000172fe 0x00000004 Code RO 2060 i.drv_rxbr_get_page_addr CVWL518.lib(drv_rxbr.o) + 0x00017302 0x00017302 0x00000012 Code RO 594 i.drv_rxbr_get_status CVWL518.lib(hal_dsi_rx_ctrl.o) + 0x00017314 0x00017314 0x00000012 Code RO 1695 i.drv_rxbr_get_status CVWL518.lib(hal_internal_vsync.o) + 0x00017326 0x00017326 0x0000000c Code RO 2062 i.drv_rxbr_hline_rcv0_cfg CVWL518.lib(drv_rxbr.o) + 0x00017332 0x00017332 0x00000008 Code RO 2064 i.drv_rxbr_hline_rcv_cfg CVWL518.lib(drv_rxbr.o) + 0x0001733a 0x0001733a 0x00000014 Code RO 2066 i.drv_rxbr_set_ack_pkt_header CVWL518.lib(drv_rxbr.o) + 0x0001734e 0x0001734e 0x000000cc Code RO 2067 i.drv_rxbr_set_cmd_filter CVWL518.lib(drv_rxbr.o) + 0x0001741a 0x0001741a 0x00000014 Code RO 2069 i.drv_rxbr_set_color_format CVWL518.lib(drv_rxbr.o) + 0x0001742e 0x0001742e 0x00000014 Code RO 2071 i.drv_rxbr_set_inten CVWL518.lib(drv_rxbr.o) + 0x00017442 0x00017442 0x00000022 Code RO 2073 i.drv_rxbr_set_usr_cfg CVWL518.lib(drv_rxbr.o) + 0x00017464 0x00017464 0x00000008 Code RO 2074 i.drv_rxbr_set_usr_col CVWL518.lib(drv_rxbr.o) + 0x0001746c 0x0001746c 0x00000008 Code RO 2075 i.drv_rxbr_set_usr_row CVWL518.lib(drv_rxbr.o) + 0x00017474 0x00017474 0x00000020 Code RO 1570 i.drv_spi_m_read_data CVWL518.lib(drv_spi_master.o) + 0x00017494 0x00017494 0x00000048 Code RO 1595 i.drv_swire_set_int CVWL518.lib(drv_swire.o) + 0x000174dc 0x000174dc 0x0000001c Code RO 1596 i.drv_swire_set_power_down CVWL518.lib(drv_swire.o) + 0x000174f8 0x000174f8 0x0000000c Code RO 1611 i.drv_sys_cfg_clear_all_int CVWL518.lib(drv_sys_cfg.o) + 0x00017504 0x00017504 0x00000028 Code RO 1612 i.drv_sys_cfg_clear_pending CVWL518.lib(drv_sys_cfg.o) + 0x0001752c 0x0001752c 0x00000018 Code RO 1615 i.drv_sys_cfg_sel_ap_rst_lvl_trig CVWL518.lib(drv_sys_cfg.o) + 0x00017544 0x00017544 0x0000001c Code RO 1616 i.drv_sys_cfg_sel_ap_rst_trig CVWL518.lib(drv_sys_cfg.o) + 0x00017560 0x00017560 0x00000024 Code RO 1617 i.drv_sys_cfg_sel_gpio_group CVWL518.lib(drv_sys_cfg.o) + 0x00017584 0x00017584 0x00000024 Code RO 1618 i.drv_sys_cfg_sel_int_trig CVWL518.lib(drv_sys_cfg.o) + 0x000175a8 0x000175a8 0x00000010 Code RO 1620 i.drv_sys_cfg_set_dma_rx_req CVWL518.lib(drv_sys_cfg.o) + 0x000175b8 0x000175b8 0x00000010 Code RO 1621 i.drv_sys_cfg_set_dma_tx_req CVWL518.lib(drv_sys_cfg.o) + 0x000175c8 0x000175c8 0x00000024 Code RO 1622 i.drv_sys_cfg_set_int CVWL518.lib(drv_sys_cfg.o) + 0x000175ec 0x000175ec 0x0000001a Code RO 1645 i.drv_timer_clear_status_flags CVWL518.lib(drv_timer.o) + 0x00017606 0x00017606 0x00000020 Code RO 1646 i.drv_timer_enable CVWL518.lib(drv_timer.o) + 0x00017626 0x00017626 0x00000002 PAD + 0x00017628 0x00017628 0x00000010 Code RO 1647 i.drv_timer_get_instance CVWL518.lib(drv_timer.o) + 0x00017638 0x00017638 0x00000010 Code RO 1648 i.drv_timer_get_prescaler CVWL518.lib(drv_timer.o) + 0x00017648 0x00017648 0x0000003c Code RO 1650 i.drv_timer_handle_interrupt CVWL518.lib(drv_timer.o) + 0x00017684 0x00017684 0x00000014 Code RO 1651 i.drv_timer_register_callback CVWL518.lib(drv_timer.o) + 0x00017698 0x00017698 0x00000010 Code RO 1652 i.drv_timer_set_compare_val CVWL518.lib(drv_timer.o) + 0x000176a8 0x000176a8 0x00000048 Code RO 1653 i.drv_timer_set_int CVWL518.lib(drv_timer.o) + 0x000176f0 0x000176f0 0x00000028 Code RO 1654 i.drv_timer_set_prescaler CVWL518.lib(drv_timer.o) + 0x00017718 0x00017718 0x0000000a Code RO 1861 i.drv_tx_phy_test_clear CVWL518.lib(drv_dsi_tx.o) + 0x00017722 0x00017722 0x0000001c Code RO 1862 i.drv_tx_phy_test_enter CVWL518.lib(drv_dsi_tx.o) + 0x0001773e 0x0001773e 0x0000001c Code RO 1863 i.drv_tx_phy_test_exit CVWL518.lib(drv_dsi_tx.o) + 0x0001775a 0x0001775a 0x00000012 Code RO 1865 i.drv_tx_phy_test_write_1_byte CVWL518.lib(drv_dsi_tx.o) + 0x0001776c 0x0001776c 0x00000014 Code RO 1866 i.drv_tx_phy_test_write_2_byte CVWL518.lib(drv_dsi_tx.o) + 0x00017780 0x00017780 0x00000010 Code RO 1867 i.drv_tx_phy_test_write_code CVWL518.lib(drv_dsi_tx.o) + 0x00017790 0x00017790 0x00000008 Code RO 2107 i.drv_vidc_clear_irq CVWL518.lib(drv_vidc.o) + 0x00017798 0x00017798 0x00000018 Code RO 2111 i.drv_vidc_enable CVWL518.lib(drv_vidc.o) + 0x000177b0 0x000177b0 0x00000040 Code RO 2112 i.drv_vidc_enable_irq CVWL518.lib(drv_vidc.o) + 0x000177f0 0x000177f0 0x00000026 Code RO 2113 i.drv_vidc_get_int_source CVWL518.lib(drv_vidc.o) + 0x00017816 0x00017816 0x00000002 PAD + 0x00017818 0x00017818 0x00000044 Code RO 2118 i.drv_vidc_module_enable CVWL518.lib(drv_vidc.o) + 0x0001785c 0x0001785c 0x00000006 Code RO 2119 i.drv_vidc_reset CVWL518.lib(drv_vidc.o) + 0x00017862 0x00017862 0x0000005c Code RO 2121 i.drv_vidc_set_dst_parameter CVWL518.lib(drv_vidc.o) + 0x000178be 0x000178be 0x0000000e Code RO 2122 i.drv_vidc_set_enh_chr CVWL518.lib(drv_vidc.o) + 0x000178cc 0x000178cc 0x00000012 Code RO 2123 i.drv_vidc_set_enh_chr2 CVWL518.lib(drv_vidc.o) + 0x000178de 0x000178de 0x0000000e Code RO 2124 i.drv_vidc_set_enh_lum CVWL518.lib(drv_vidc.o) + 0x000178ec 0x000178ec 0x00000030 Code RO 2126 i.drv_vidc_set_gain CVWL518.lib(drv_vidc.o) + 0x0001791c 0x0001791c 0x00000014 Code RO 2128 i.drv_vidc_set_irqen CVWL518.lib(drv_vidc.o) + 0x00017930 0x00017930 0x00000008 Code RO 2130 i.drv_vidc_set_p2r_hcoef0 CVWL518.lib(drv_vidc.o) + 0x00017938 0x00017938 0x00000008 Code RO 2131 i.drv_vidc_set_p2r_hcoef1 CVWL518.lib(drv_vidc.o) + 0x00017940 0x00017940 0x00000028 Code RO 2132 i.drv_vidc_set_p2r_hinitb CVWL518.lib(drv_vidc.o) + 0x00017968 0x00017968 0x00000028 Code RO 2133 i.drv_vidc_set_p2r_hinitr CVWL518.lib(drv_vidc.o) + 0x00017990 0x00017990 0x00000008 Code RO 2134 i.drv_vidc_set_p2r_step CVWL518.lib(drv_vidc.o) + 0x00017998 0x00017998 0x00000020 Code RO 2137 i.drv_vidc_set_pu_ctrl CVWL518.lib(drv_vidc.o) + 0x000179b8 0x000179b8 0x0000000e Code RO 2138 i.drv_vidc_set_pu_scld CVWL518.lib(drv_vidc.o) + 0x000179c6 0x000179c6 0x0000000a Code RO 2139 i.drv_vidc_set_scld_hcoef0 CVWL518.lib(drv_vidc.o) + 0x000179d0 0x000179d0 0x0000000a Code RO 2140 i.drv_vidc_set_scld_hcoef1 CVWL518.lib(drv_vidc.o) + 0x000179da 0x000179da 0x00000012 Code RO 2141 i.drv_vidc_set_scld_step CVWL518.lib(drv_vidc.o) + 0x000179ec 0x000179ec 0x0000000a Code RO 2142 i.drv_vidc_set_scld_vcoef0 CVWL518.lib(drv_vidc.o) + 0x000179f6 0x000179f6 0x0000000a Code RO 2143 i.drv_vidc_set_scld_vcoef1 CVWL518.lib(drv_vidc.o) + 0x00017a00 0x00017a00 0x0000000a Code RO 2144 i.drv_vidc_set_sclu_hcoef0c CVWL518.lib(drv_vidc.o) + 0x00017a0a 0x00017a0a 0x0000000a Code RO 2145 i.drv_vidc_set_sclu_hcoef0y CVWL518.lib(drv_vidc.o) + 0x00017a14 0x00017a14 0x0000000a Code RO 2146 i.drv_vidc_set_sclu_hcoef1c CVWL518.lib(drv_vidc.o) + 0x00017a1e 0x00017a1e 0x0000000a Code RO 2147 i.drv_vidc_set_sclu_hcoef1y CVWL518.lib(drv_vidc.o) + 0x00017a28 0x00017a28 0x0000000a Code RO 2148 i.drv_vidc_set_sclu_vcoef0c CVWL518.lib(drv_vidc.o) + 0x00017a32 0x00017a32 0x0000000a Code RO 2149 i.drv_vidc_set_sclu_vcoef0y CVWL518.lib(drv_vidc.o) + 0x00017a3c 0x00017a3c 0x0000000a Code RO 2150 i.drv_vidc_set_sclu_vcoef1c CVWL518.lib(drv_vidc.o) + 0x00017a46 0x00017a46 0x0000000a Code RO 2151 i.drv_vidc_set_sclu_vcoef1y CVWL518.lib(drv_vidc.o) + 0x00017a50 0x00017a50 0x00000024 Code RO 2152 i.drv_vidc_set_src_parameter CVWL518.lib(drv_vidc.o) + 0x00017a74 0x00017a74 0x0000000a Code RO 2153 i.drv_vidc_set_y4t2_hcoef0 CVWL518.lib(drv_vidc.o) + 0x00017a7e 0x00017a7e 0x0000000a Code RO 2154 i.drv_vidc_set_y4t2_hcoef1 CVWL518.lib(drv_vidc.o) + 0x00017a88 0x00017a88 0x0000000a Code RO 2156 i.drv_vidc_set_y4t2_vcoef0 CVWL518.lib(drv_vidc.o) + 0x00017a92 0x00017a92 0x0000000a Code RO 2157 i.drv_vidc_set_y4t2_vcoef1 CVWL518.lib(drv_vidc.o) + 0x00017a9c 0x00017a9c 0x00000010 Code RO 2515 i.drv_wdg_clear_counter CVWL518.lib(drv_wdg.o) + 0x00017aac 0x00017aac 0x00000010 Code RO 2516 i.drv_wdg_clear_edge_flag CVWL518.lib(drv_wdg.o) + 0x00017abc 0x00017abc 0x00000010 Code RO 2519 i.drv_wdg_read_edge_flag CVWL518.lib(drv_wdg.o) + 0x00017acc 0x00017acc 0x00000034 Code RO 2522 i.drv_wdg_set_int CVWL518.lib(drv_wdg.o) + 0x00017b00 0x00017b00 0x00000006 Code RO 1260 i.fls_clear_irq_status CVWL518.lib(drv_fls.o) + 0x00017b06 0x00017b06 0x00000014 Code RO 980 i.fputc CVWL518.lib(tau_log.o) + 0x00017b1a 0x00017b1a 0x00000002 PAD + 0x00017b1c 0x00017b1c 0x00000030 Code RO 597 i.hal_dsi_rx_ctrl_create_handle CVWL518.lib(hal_dsi_rx_ctrl.o) + 0x00017b4c 0x00017b4c 0x0000009c Code RO 598 i.hal_dsi_rx_ctrl_deinit CVWL518.lib(hal_dsi_rx_ctrl.o) + 0x00017be8 0x00017be8 0x00000084 Code RO 599 i.hal_dsi_rx_ctrl_dsc_async_handler CVWL518.lib(hal_dsi_rx_ctrl.o) + 0x00017c6c 0x00017c6c 0x00000028 Code RO 601 i.hal_dsi_rx_ctrl_gen_a_tear_signal CVWL518.lib(hal_dsi_rx_ctrl.o) + 0x00017c94 0x00017c94 0x00000028 Code RO 603 i.hal_dsi_rx_ctrl_get_max_ret_size CVWL518.lib(hal_dsi_rx_ctrl.o) + 0x00017cbc 0x00017cbc 0x00000064 Code RO 605 i.hal_dsi_rx_ctrl_init CVWL518.lib(hal_dsi_rx_ctrl.o) + 0x00017d20 0x00017d20 0x00000124 Code RO 606 i.hal_dsi_rx_ctrl_init_clk CVWL518.lib(hal_dsi_rx_ctrl.o) + 0x00017e44 0x00017e44 0x00000048 Code RO 607 i.hal_dsi_rx_ctrl_init_dsc_dec CVWL518.lib(hal_dsi_rx_ctrl.o) + 0x00017e8c 0x00017e8c 0x000000cc Code RO 608 i.hal_dsi_rx_ctrl_init_dsi_rx CVWL518.lib(hal_dsi_rx_ctrl.o) + 0x00017f58 0x00017f58 0x000000c4 Code RO 609 i.hal_dsi_rx_ctrl_init_memc CVWL518.lib(hal_dsi_rx_ctrl.o) + 0x0001801c 0x0001801c 0x0000014c Code RO 610 i.hal_dsi_rx_ctrl_init_rxbr CVWL518.lib(hal_dsi_rx_ctrl.o) + 0x00018168 0x00018168 0x00000388 Code RO 611 i.hal_dsi_rx_ctrl_init_vidc CVWL518.lib(hal_dsi_rx_ctrl.o) + 0x000184f0 0x000184f0 0x0000003c Code RO 612 i.hal_dsi_rx_ctrl_pre_init_pps CVWL518.lib(hal_dsi_rx_ctrl.o) + 0x0001852c 0x0001852c 0x000000f0 Code RO 615 i.hal_dsi_rx_ctrl_send_ack_cmd CVWL518.lib(hal_dsi_rx_ctrl.o) + 0x0001861c 0x0001861c 0x00000034 Code RO 623 i.hal_dsi_rx_ctrl_set_cus_sync_line CVWL518.lib(hal_dsi_rx_ctrl.o) + 0x00018650 0x00018650 0x00000034 Code RO 626 i.hal_dsi_rx_ctrl_set_hw_tear_mode CVWL518.lib(hal_dsi_rx_ctrl.o) + 0x00018684 0x00018684 0x00000034 Code RO 627 i.hal_dsi_rx_ctrl_set_ipi_cfg CVWL518.lib(hal_dsi_rx_ctrl.o) + 0x000186b8 0x000186b8 0x00000072 Code RO 630 i.hal_dsi_rx_ctrl_set_rxbr_clk CVWL518.lib(hal_dsi_rx_ctrl.o) + 0x0001872a 0x0001872a 0x00000002 PAD + 0x0001872c 0x0001872c 0x00000034 Code RO 631 i.hal_dsi_rx_ctrl_set_sw_tear_mode CVWL518.lib(hal_dsi_rx_ctrl.o) + 0x00018760 0x00018760 0x0000003c Code RO 634 i.hal_dsi_rx_ctrl_start CVWL518.lib(hal_dsi_rx_ctrl.o) + 0x0001879c 0x0001879c 0x00000048 Code RO 635 i.hal_dsi_rx_ctrl_stop CVWL518.lib(hal_dsi_rx_ctrl.o) + 0x000187e4 0x000187e4 0x00000020 Code RO 637 i.hal_dsi_rx_ctrl_toggle_resolution CVWL518.lib(hal_dsi_rx_ctrl.o) + 0x00018804 0x00018804 0x00000190 Code RO 689 i.hal_dsi_tx_calc_video_chunks CVWL518.lib(hal_dsi_tx_ctrl.o) + 0x00018994 0x00018994 0x00000034 Code RO 690 i.hal_dsi_tx_config_params_for_lane_rate CVWL518.lib(hal_dsi_tx_ctrl.o) + 0x000189c8 0x000189c8 0x000003c0 Code RO 691 i.hal_dsi_tx_count_lane_rate CVWL518.lib(hal_dsi_tx_ctrl.o) + 0x00018d88 0x00018d88 0x0000002c Code RO 693 i.hal_dsi_tx_ctrl_create_handle CVWL518.lib(hal_dsi_tx_ctrl.o) + 0x00018db4 0x00018db4 0x00000048 Code RO 694 i.hal_dsi_tx_ctrl_deinit CVWL518.lib(hal_dsi_tx_ctrl.o) + 0x00018dfc 0x00018dfc 0x0000004c Code RO 695 i.hal_dsi_tx_ctrl_enter_init_panel_mode CVWL518.lib(hal_dsi_tx_ctrl.o) + 0x00018e48 0x00018e48 0x00000024 Code RO 697 i.hal_dsi_tx_ctrl_exit_init_panel_mode CVWL518.lib(hal_dsi_tx_ctrl.o) + 0x00018e6c 0x00018e6c 0x000000c4 Code RO 699 i.hal_dsi_tx_ctrl_init CVWL518.lib(hal_dsi_tx_ctrl.o) + 0x00018f30 0x00018f30 0x00000024 Code RO 700 i.hal_dsi_tx_ctrl_init_clk CVWL518.lib(hal_dsi_tx_ctrl.o) + 0x00018f54 0x00018f54 0x0000000c Code RO 701 i.hal_dsi_tx_ctrl_panel_reset_pin CVWL518.lib(hal_dsi_tx_ctrl.o) + 0x00018f60 0x00018f60 0x00000020 Code RO 704 i.hal_dsi_tx_ctrl_set_ccm CVWL518.lib(hal_dsi_tx_ctrl.o) + 0x00018f80 0x00018f80 0x00000014 Code RO 712 i.hal_dsi_tx_ctrl_set_overwrite_rgb CVWL518.lib(hal_dsi_tx_ctrl.o) + 0x00018f94 0x00018f94 0x00000010 Code RO 713 i.hal_dsi_tx_ctrl_set_partial_disp CVWL518.lib(hal_dsi_tx_ctrl.o) + 0x00018fa4 0x00018fa4 0x00000024 Code RO 714 i.hal_dsi_tx_ctrl_set_partial_disp_area CVWL518.lib(hal_dsi_tx_ctrl.o) + 0x00018fc8 0x00018fc8 0x00000060 Code RO 716 i.hal_dsi_tx_ctrl_start CVWL518.lib(hal_dsi_tx_ctrl.o) + 0x00019028 0x00019028 0x00000044 Code RO 717 i.hal_dsi_tx_ctrl_stop CVWL518.lib(hal_dsi_tx_ctrl.o) + 0x0001906c 0x0001906c 0x0000019c Code RO 718 i.hal_dsi_tx_ctrl_write_array_cmd CVWL518.lib(hal_dsi_tx_ctrl.o) + 0x00019208 0x00019208 0x00000150 Code RO 719 i.hal_dsi_tx_ctrl_write_cmd CVWL518.lib(hal_dsi_tx_ctrl.o) + 0x00019358 0x00019358 0x00000028 Code RO 720 i.hal_dsi_tx_init_data_mode CVWL518.lib(hal_dsi_tx_ctrl.o) + 0x00019380 0x00019380 0x00000030 Code RO 721 i.hal_dsi_tx_init_dpi_cfg CVWL518.lib(hal_dsi_tx_ctrl.o) + 0x000193b0 0x000193b0 0x00000020 Code RO 722 i.hal_dsi_tx_init_interrupt CVWL518.lib(hal_dsi_tx_ctrl.o) + 0x000193d0 0x000193d0 0x00000020 Code RO 723 i.hal_dsi_tx_init_phy_cfg CVWL518.lib(hal_dsi_tx_ctrl.o) + 0x000193f0 0x000193f0 0x00000094 Code RO 724 i.hal_dsi_tx_init_remains CVWL518.lib(hal_dsi_tx_ctrl.o) + 0x00019484 0x00019484 0x00000058 Code RO 725 i.hal_dsi_tx_init_video_mode CVWL518.lib(hal_dsi_tx_ctrl.o) + 0x000194dc 0x000194dc 0x00000044 Code RO 726 i.hal_dsi_tx_send_cmd CVWL518.lib(hal_dsi_tx_ctrl.o) + 0x00019520 0x00019520 0x00000018 Code RO 787 i.hal_gpio_ctrl_eint CVWL518.lib(hal_gpio.o) + 0x00019538 0x00019538 0x00000012 Code RO 788 i.hal_gpio_get_input_data CVWL518.lib(hal_gpio.o) + 0x0001954a 0x0001954a 0x00000002 PAD + 0x0001954c 0x0001954c 0x00000040 Code RO 791 i.hal_gpio_init_eint CVWL518.lib(hal_gpio.o) + 0x0001958c 0x0001958c 0x00000020 Code RO 792 i.hal_gpio_init_input CVWL518.lib(hal_gpio.o) + 0x000195ac 0x000195ac 0x00000028 Code RO 793 i.hal_gpio_init_output CVWL518.lib(hal_gpio.o) + 0x000195d4 0x000195d4 0x00000018 Code RO 794 i.hal_gpio_reg_eint_cb CVWL518.lib(hal_gpio.o) + 0x000195ec 0x000195ec 0x00000050 Code RO 795 i.hal_gpio_set_ap_reset_int CVWL518.lib(hal_gpio.o) + 0x0001963c 0x0001963c 0x00000060 Code RO 797 i.hal_gpio_set_mode CVWL518.lib(hal_gpio.o) + 0x0001969c 0x0001969c 0x00000008 Code RO 798 i.hal_gpio_set_output_data CVWL518.lib(hal_gpio.o) + 0x000196a4 0x000196a4 0x00000020 Code RO 800 i.hal_gpio_set_pull_state CVWL518.lib(hal_gpio.o) + 0x000196c4 0x000196c4 0x0000006c Code RO 826 i.hal_i2c_m_dma_init CVWL518.lib(hal_i2c_master.o) + 0x00019730 0x00019730 0x0000002c Code RO 827 i.hal_i2c_m_dma_read CVWL518.lib(hal_i2c_master.o) + 0x0001975c 0x0001975c 0x00000028 Code RO 828 i.hal_i2c_m_dma_write CVWL518.lib(hal_i2c_master.o) + 0x00019784 0x00019784 0x00000020 Code RO 830 i.hal_i2c_m_transfer_complate CVWL518.lib(hal_i2c_master.o) + 0x000197a4 0x000197a4 0x00000020 Code RO 831 i.hal_i2c_master_irq_callback CVWL518.lib(hal_i2c_master.o) + 0x000197c4 0x000197c4 0x00000010 Code RO 845 i.hal_i2c_s_dma_user_callback CVWL518.lib(hal_i2c_slave.o) + 0x000197d4 0x000197d4 0x0000003c Code RO 846 i.hal_i2c_s_dma_write CVWL518.lib(hal_i2c_slave.o) + 0x00019810 0x00019810 0x0000006c Code RO 848 i.hal_i2c_s_init CVWL518.lib(hal_i2c_slave.o) + 0x0001987c 0x0001987c 0x00000014 Code RO 849 i.hal_i2c_s_nonblocking_read CVWL518.lib(hal_i2c_slave.o) + 0x00019890 0x00019890 0x0000000c Code RO 856 i.hal_i2c_s_set_transfer CVWL518.lib(hal_i2c_slave.o) + 0x0001989c 0x0001989c 0x00000150 Code RO 859 i.hal_i2c_slave_irq_callback CVWL518.lib(hal_i2c_slave.o) + 0x000199ec 0x000199ec 0x000000b0 Code RO 1696 i.hal_internal_init_memc CVWL518.lib(hal_internal_vsync.o) + 0x00019a9c 0x00019a9c 0x00000010 Code RO 1697 i.hal_internal_sync_get_fb_setting CVWL518.lib(hal_internal_vsync.o) + 0x00019aac 0x00019aac 0x0000024c Code RO 1698 i.hal_internal_sync_input_resolution_change CVWL518.lib(hal_internal_vsync.o) + 0x00019cf8 0x00019cf8 0x00000188 Code RO 1699 i.hal_internal_sync_set_fb_setting_manual CVWL518.lib(hal_internal_vsync.o) + 0x00019e80 0x00019e80 0x0000001c Code RO 1700 i.hal_internal_vsync_deinit CVWL518.lib(hal_internal_vsync.o) + 0x00019e9c 0x00019e9c 0x0000000c Code RO 1701 i.hal_internal_vsync_get_rx_state CVWL518.lib(hal_internal_vsync.o) + 0x00019ea8 0x00019ea8 0x0000001c Code RO 1702 i.hal_internal_vsync_get_sync_line CVWL518.lib(hal_internal_vsync.o) + 0x00019ec4 0x00019ec4 0x0000000c Code RO 1703 i.hal_internal_vsync_get_tx_state CVWL518.lib(hal_internal_vsync.o) + 0x00019ed0 0x00019ed0 0x00000020 Code RO 1704 i.hal_internal_vsync_get_y2t4_use_sclu CVWL518.lib(hal_internal_vsync.o) + 0x00019ef0 0x00019ef0 0x000000bc Code RO 1705 i.hal_internal_vsync_init_rx CVWL518.lib(hal_internal_vsync.o) + 0x00019fac 0x00019fac 0x000000a4 Code RO 1706 i.hal_internal_vsync_init_tx CVWL518.lib(hal_internal_vsync.o) + 0x0001a050 0x0001a050 0x0000011c Code RO 1707 i.hal_internal_vsync_set_auto_hw_filter CVWL518.lib(hal_internal_vsync.o) + 0x0001a16c 0x0001a16c 0x00000018 Code RO 1709 i.hal_internal_vsync_set_rx_state CVWL518.lib(hal_internal_vsync.o) + 0x0001a184 0x0001a184 0x00000020 Code RO 1710 i.hal_internal_vsync_set_sync_line CVWL518.lib(hal_internal_vsync.o) + 0x0001a1a4 0x0001a1a4 0x00000048 Code RO 1711 i.hal_internal_vsync_set_tear_mode CVWL518.lib(hal_internal_vsync.o) + 0x0001a1ec 0x0001a1ec 0x00000044 Code RO 1712 i.hal_internal_vsync_set_tx_state CVWL518.lib(hal_internal_vsync.o) + 0x0001a230 0x0001a230 0x00000024 Code RO 727 i.hal_lcdc_config_ccm CVWL518.lib(hal_dsi_tx_ctrl.o) + 0x0001a254 0x0001a254 0x00000054 Code RO 728 i.hal_lcdc_config_remains CVWL518.lib(hal_dsi_tx_ctrl.o) + 0x0001a2a8 0x0001a2a8 0x00000014 Code RO 729 i.hal_lcdc_config_rgb_to_pentile CVWL518.lib(hal_dsi_tx_ctrl.o) + 0x0001a2bc 0x0001a2bc 0x000001c8 Code RO 730 i.hal_lcdc_config_upscaler CVWL518.lib(hal_dsi_tx_ctrl.o) + 0x0001a484 0x0001a484 0x00000020 Code RO 731 i.hal_lcdc_config_yuv_to_rgb CVWL518.lib(hal_dsi_tx_ctrl.o) + 0x0001a4a4 0x0001a4a4 0x0000003a Code RO 732 i.hal_lcdc_init_cfg CVWL518.lib(hal_dsi_tx_ctrl.o) + 0x0001a4de 0x0001a4de 0x00000002 PAD + 0x0001a4e0 0x0001a4e0 0x00000180 Code RO 733 i.hal_lcdc_init_clk CVWL518.lib(hal_dsi_tx_ctrl.o) + 0x0001a660 0x0001a660 0x00000040 Code RO 734 i.hal_lcdc_init_interrupt CVWL518.lib(hal_dsi_tx_ctrl.o) + 0x0001a6a0 0x0001a6a0 0x0000000e Code RO 882 i.hal_spi_m_clear_rxfifo CVWL518.lib(hal_spi_master.o) + 0x0001a6ae 0x0001a6ae 0x00000016 Code RO 906 i.hal_swire_open CVWL518.lib(hal_swire.o) + 0x0001a6c4 0x0001a6c4 0x00000008 Code RO 920 i.hal_system_enable_systick CVWL518.lib(hal_system.o) + 0x0001a6cc 0x0001a6cc 0x00000088 Code RO 925 i.hal_system_init CVWL518.lib(hal_system.o) + 0x0001a754 0x0001a754 0x0000001c Code RO 926 i.hal_system_init_console CVWL518.lib(hal_system.o) + 0x0001a770 0x0001a770 0x00000008 Code RO 929 i.hal_system_set_pvd CVWL518.lib(hal_system.o) + 0x0001a778 0x0001a778 0x00000008 Code RO 930 i.hal_system_set_vcc CVWL518.lib(hal_system.o) + 0x0001a780 0x0001a780 0x0000001a Code RO 954 i.hal_timer_init CVWL518.lib(hal_timer.o) + 0x0001a79a 0x0001a79a 0x00000002 PAD + 0x0001a79c 0x0001a79c 0x00000048 Code RO 956 i.hal_timer_start CVWL518.lib(hal_timer.o) + 0x0001a7e4 0x0001a7e4 0x00000028 Code RO 958 i.hal_timer_stop CVWL518.lib(hal_timer.o) + 0x0001a80c 0x0001a80c 0x0000008c Code RO 1075 i.hal_uart_init CVWL518.lib(hal_uart.o) + 0x0001a898 0x0001a898 0x00000010 Code RO 1078 i.hal_uart_transmit_blocking CVWL518.lib(hal_uart.o) + 0x0001a8a8 0x0001a8a8 0x00000108 Code RO 2250 i.handle_init CVWL518.lib(irq_redirect .o) + 0x0001a9b0 0x0001a9b0 0x00000068 Code RO 114 i.init_mipi_tx ap_demo.o + 0x0001aa18 0x0001aa18 0x000000b8 Code RO 115 i.init_panel ap_demo.o + 0x0001aad0 0x0001aad0 0x0000000a Code RO 3 i.main main.o + 0x0001aada 0x0001aada 0x00000002 PAD + 0x0001aadc 0x0001aadc 0x000000a4 Code RO 116 i.open_mipi_rx ap_demo.o + 0x0001ab80 0x0001ab80 0x00000054 Code RO 117 i.pps_update_handle ap_demo.o + 0x0001abd4 0x0001abd4 0x00000410 Code RO 1713 i.rx_get_dcs_packet_data CVWL518.lib(hal_internal_vsync.o) + 0x0001afe4 0x0001afe4 0x0000013c Code RO 1714 i.rx_partial_update CVWL518.lib(hal_internal_vsync.o) + 0x0001b120 0x0001b120 0x00000064 Code RO 1715 i.rx_receive_packet CVWL518.lib(hal_internal_vsync.o) + 0x0001b184 0x0001b184 0x00000180 Code RO 1716 i.rx_receive_pps CVWL518.lib(hal_internal_vsync.o) + 0x0001b304 0x0001b304 0x0000002a Code RO 118 i.send_panel_init_code ap_demo.o + 0x0001b32e 0x0001b32e 0x00000002 PAD + 0x0001b330 0x0001b330 0x00000060 Code RO 119 i.soft_disable_mipi_timer_init ap_demo.o + 0x0001b390 0x0001b390 0x0000008c Code RO 1717 i.soft_gen_te CVWL518.lib(hal_internal_vsync.o) + 0x0001b41c 0x0001b41c 0x00000030 Code RO 120 i.soft_timer3_cb ap_demo.o + 0x0001b44c 0x0001b44c 0x00000048 Code RO 121 i.tp_heartbeat_exec ap_demo.o + 0x0001b494 0x0001b494 0x00000014 Code RO 122 i.tx_display_on ap_demo.o + 0x0001b4a8 0x0001b4a8 0x00000028 Code RO 123 i.tx_panel_reset ap_demo.o + 0x0001b4d0 0x0001b4d0 0x000000d0 Code RO 1718 i.vpre_err_reset CVWL518.lib(hal_internal_vsync.o) + 0x0001b5a0 0x0001b5a0 0x0000019c Code RO 1719 i.vsync_set_te_mode CVWL518.lib(hal_internal_vsync.o) + 0x0001b73c 0x0001b73c 0x000000ec Data RO 124 .constdata ap_demo.o + 0x0001b828 0x0001b828 0x00002150 Data RO 292 .constdata app_tp_for_custom_s8.o + 0x0001d978 0x0001d978 0x000000d2 Data RO 803 .constdata CVWL518.lib(hal_gpio.o) + 0x0001da4a 0x0001da4a 0x00000002 PAD + 0x0001da4c 0x0001da4c 0x00000110 Data RO 1497 .constdata CVWL518.lib(drv_param_init.o) + 0x0001db5c 0x0001db5c 0x00000186 Data RO 2035 .constdata CVWL518.lib(drv_phy_common.o) + 0x0001dce2 0x0001dce2 0x00000002 PAD + 0x0001dce4 0x0001dce4 0x00000048 Data RO 639 .conststring CVWL518.lib(hal_dsi_rx_ctrl.o) + 0x0001dd2c 0x0001dd2c 0x00000128 Data RO 1721 .conststring CVWL518.lib(hal_internal_vsync.o) + 0x0001de54 0x0001de54 0x00000030 Data RO 2910 Region$$Table anon$$obj.o + + + Execution Region RW_RAM1 (Exec base: 0x00070000, Load base: 0x0001de84, Size: 0x00000000, Max: 0x000000f0, ABSOLUTE) + + **** No section assigned to this execution region **** + + + Execution Region RW_RAM2 (Exec base: 0x00070100, Load base: 0x0001de84, Size: 0x000000c0, Max: 0x000000d0, ABSOLUTE) + + Exec Addr Load Addr Size Type Attr Idx E Section Name Object + + 0x00070100 - 0x000000c0 Zero RW 2251 .ARM.__AT_0x00070100 CVWL518.lib(irq_redirect .o) + + + Execution Region RW_RAM3 (Exec base: 0x000701d0, Load base: 0x0001de84, Size: 0x00005840, Max: 0x00007e30, ABSOLUTE, COMPRESSED[0x00001f28]) + + Exec Addr Load Addr Size Type Attr Idx E Section Name Object + + 0x000701d0 COMPRESSED 0x00002719 Data RW 125 .data ap_demo.o + 0x000728e9 COMPRESSED 0x00000001 PAD + 0x000728ea COMPRESSED 0x000000e4 Data RW 306 .data app_tp_for_custom_s8.o + 0x000729ce COMPRESSED 0x00000001 Data RW 309 .data app_tp_for_custom_s8.o + 0x000729cf COMPRESSED 0x00000001 Data RW 310 .data app_tp_for_custom_s8.o + 0x000729d0 COMPRESSED 0x00000001 Data RW 315 .data app_tp_for_custom_s8.o + 0x000729d1 COMPRESSED 0x00000003 Data RW 316 .data app_tp_for_custom_s8.o + 0x000729d4 COMPRESSED 0x00000005 Data RW 317 .data app_tp_for_custom_s8.o + 0x000729d9 COMPRESSED 0x00000003 PAD + 0x000729dc COMPRESSED 0x00000030 Data RW 327 .data app_tp_for_custom_s8.o + 0x00072a0c COMPRESSED 0x00000031 Data RW 403 .data app_tp_transfer.o + 0x00072a3d COMPRESSED 0x00000003 PAD + 0x00072a40 COMPRESSED 0x00000008 Data RW 640 .data CVWL518.lib(hal_dsi_rx_ctrl.o) + 0x00072a48 COMPRESSED 0x00000001 Data RW 832 .data CVWL518.lib(hal_i2c_master.o) + 0x00072a49 COMPRESSED 0x00000003 PAD + 0x00072a4c COMPRESSED 0x0000001c Data RW 860 .data CVWL518.lib(hal_i2c_slave.o) + 0x00072a68 COMPRESSED 0x00000012 Data RW 1029 .data CVWL518.lib(norflash.o) + 0x00072a7a COMPRESSED 0x00000002 PAD + 0x00072a7c COMPRESSED 0x0000000c Data RW 1102 .data CVWL518.lib(drv_common.o) + 0x00072a88 COMPRESSED 0x00000004 Data RW 1362 .data CVWL518.lib(drv_gpio.o) + 0x00072a8c COMPRESSED 0x00000008 Data RW 1400 .data CVWL518.lib(drv_i2c_dma.o) + 0x00072a94 COMPRESSED 0x00000004 Data RW 1428 .data CVWL518.lib(drv_i2c_master.o) + 0x00072a98 COMPRESSED 0x00000008 Data RW 1462 .data CVWL518.lib(drv_i2c_slave.o) + 0x00072aa0 COMPRESSED 0x0000064c Data RW 1498 .data CVWL518.lib(drv_param_init.o) + 0x000730ec COMPRESSED 0x00000004 Data RW 1574 .data CVWL518.lib(drv_spi_master.o) + 0x000730f0 COMPRESSED 0x00000008 Data RW 1598 .data CVWL518.lib(drv_swire.o) + 0x000730f8 COMPRESSED 0x00000001 Data RW 1623 .data CVWL518.lib(drv_sys_cfg.o) + 0x000730f9 COMPRESSED 0x00000003 PAD + 0x000730fc COMPRESSED 0x00000050 Data RW 1656 .data CVWL518.lib(drv_timer.o) + 0x0007314c COMPRESSED 0x00000004 Data RW 1722 .data CVWL518.lib(hal_internal_vsync.o) + 0x00073150 COMPRESSED 0x00000008 Data RW 2293 .data CVWL518.lib(drv_chip_info.o) + 0x00073158 COMPRESSED 0x0000000c Data RW 2405 .data CVWL518.lib(drv_pwm.o) + 0x00073164 COMPRESSED 0x00000008 Data RW 2457 .data CVWL518.lib(drv_uart.o) + 0x0007316c COMPRESSED 0x0000000c Data RW 2524 .data CVWL518.lib(drv_wdg.o) + 0x00073178 COMPRESSED 0x00000004 Data RW 2884 .data mc_p.l(stdout.o) + 0x0007317c - 0x0000019c Zero RW 402 .bss app_tp_transfer.o + 0x00073318 - 0x000000b8 Zero RW 638 .bss CVWL518.lib(hal_dsi_rx_ctrl.o) + 0x000733d0 - 0x00000040 Zero RW 735 .bss CVWL518.lib(hal_dsi_tx_ctrl.o) + 0x00073410 - 0x00000100 Zero RW 981 .bss CVWL518.lib(tau_log.o) + 0x00073510 - 0x0000003c Zero RW 1080 .bss CVWL518.lib(hal_uart.o) + 0x0007354c - 0x00000018 Zero RW 1226 .bss CVWL518.lib(drv_dma.o) + 0x00073564 - 0x00000040 Zero RW 1361 .bss CVWL518.lib(drv_gpio.o) + 0x000735a4 - 0x00000018 Zero RW 1399 .bss CVWL518.lib(drv_i2c_dma.o) + 0x000735bc - 0x00000acc Zero RW 1679 .bss CVWL518.lib(dcs_packet_fifo.o) + 0x00074088 - 0x00000968 Zero RW 1720 .bss CVWL518.lib(hal_internal_vsync.o) + 0x000749f0 - 0x00000020 Zero RW 2337 .bss CVWL518.lib(hal_spi_slave.o) + 0x00074a10 - 0x00001000 Zero RW 585 STACK startup_armcm0.o + + +============================================================================== + +Image component sizes + + + Code (inc. data) RO Data RW Data ZI Data Debug Object Name + + 8202 846 236 10009 0 38740 ap_demo.o + 1756 72 8529 287 0 13583 app_tp_for_custom_s8.o + 1778 210 0 49 412 17388 app_tp_transfer.o + 28 4 0 0 0 445 board.o + 10 0 0 0 0 10151 main.o + 120 18 192 0 4096 2028 startup_armcm0.o + + ---------------------------------------------------------------------- + 11902 1150 9006 10352 4508 82335 Object Totals + 0 0 48 0 0 0 (incl. Generated) + 8 0 1 7 0 0 (incl. Padding) + + ---------------------------------------------------------------------- + + Code (inc. data) RO Data RW Data ZI Data Debug Library Member Name + + 216 32 0 0 2764 252 dcs_packet_fifo.o + 300 66 0 8 0 264 drv_chip_info.o + 232 96 20 12 0 264 drv_common.o + 420 90 0 0 0 1200 drv_crgu.o + 478 68 0 0 24 856 drv_dma.o + 296 34 0 0 0 344 drv_dsc_dec.o + 1454 496 0 0 0 1260 drv_dsi_rx.o + 1432 118 0 0 0 2364 drv_dsi_tx.o + 6 0 0 0 0 60 drv_fls.o + 784 112 0 4 64 1236 drv_gpio.o + 624 78 0 8 24 624 drv_i2c_dma.o + 344 80 0 4 0 396 drv_i2c_master.o + 324 74 0 8 0 516 drv_i2c_slave.o + 826 6 0 0 0 1588 drv_lcdc.o + 342 18 0 0 0 804 drv_memc.o + 212 48 272 1612 0 592 drv_param_init.o + 352 16 390 0 0 532 drv_phy_common.o + 72 10 0 12 0 76 drv_pwm.o + 108 22 0 0 0 180 drv_pwr.o + 508 38 0 0 0 1136 drv_rxbr.o + 64 14 0 4 0 128 drv_spi_master.o + 132 16 0 8 0 200 drv_swire.o + 300 64 0 1 0 628 drv_sys_cfg.o + 338 30 0 80 0 872 drv_timer.o + 698 18 0 8 0 680 drv_uart.o + 778 16 0 0 0 2312 drv_vidc.o + 156 22 0 12 0 316 drv_wdg.o + 3320 306 72 8 184 1660 hal_dsi_rx_ctrl.o + 4490 212 0 0 64 2444 hal_dsi_tx_ctrl.o + 450 48 210 0 0 752 hal_gpio.o + 256 48 0 1 0 340 hal_i2c_master.o + 552 70 0 28 0 400 hal_i2c_slave.o + 6456 1370 296 4 2408 2324 hal_internal_vsync.o + 14 0 0 0 0 68 hal_spi_master.o + 580 32 0 0 32 136 hal_spi_slave.o + 22 0 0 0 0 68 hal_swire.o + 188 32 0 0 0 340 hal_system.o + 138 6 0 0 0 208 hal_timer.o + 156 18 0 0 60 144 hal_uart.o + 1072 320 0 0 192 1980 irq_redirect .o + 48 10 0 18 0 68 norflash.o + 58 0 0 0 0 128 tau_delay.o + 60 10 0 0 256 156 tau_log.o + 200 20 0 0 0 76 ceil.o + 86 0 0 0 0 0 __dczerorl2.o + 0 0 0 0 0 0 entry.o + 0 0 0 0 0 0 entry10a.o + 0 0 0 0 0 0 entry11a.o + 8 4 0 0 0 0 entry2.o + 4 0 0 0 0 0 entry5.o + 0 0 0 0 0 0 entry7b.o + 0 0 0 0 0 0 entry8b.o + 8 4 0 0 0 0 entry9a.o + 30 0 0 0 0 0 handlers.o + 40 0 0 0 0 72 idiv.o + 36 8 0 0 0 68 init.o + 0 0 0 0 0 0 iusefp.o + 32 0 0 0 0 68 llshl.o + 38 0 0 0 0 68 llsshr.o + 34 0 0 0 0 68 llushr.o + 36 0 0 0 0 60 memcpya.o + 36 0 0 0 0 100 memseta.o + 2298 104 0 0 0 544 printfa.o + 0 0 0 4 0 0 stdout.o + 44 0 0 0 0 72 uidiv.o + 96 0 0 0 0 84 uldiv.o + 40 2 0 0 0 68 cdrcmple.o + 20 0 0 0 0 68 cfrcmple.o + 356 4 0 0 0 140 dadd.o + 240 6 0 0 0 84 ddiv.o + 236 0 0 0 0 216 depilogue.o + 72 10 0 0 0 72 dfixi.o + 60 10 0 0 0 68 dfixui.o + 64 10 0 0 0 68 dfixul.o + 28 4 0 0 0 68 dfltui.o + 208 6 0 0 0 88 dmul.o + 40 0 0 0 0 60 f2d.o + 178 0 0 0 0 108 fadd.o + 124 0 0 0 0 72 fdiv.o + 130 0 0 0 0 144 fepilogue.o + 50 0 0 0 0 60 ffixi.o + 40 0 0 0 0 60 ffixui.o + 22 0 0 0 0 68 fflti.o + 14 0 0 0 0 68 ffltui.o + 122 0 0 0 0 72 fmul.o + 24 0 0 0 0 60 fscalb.o + + ---------------------------------------------------------------------- + 34792 4356 1264 1852 6072 33888 Library Totals + 42 0 4 8 0 0 (incl. Padding) + + ---------------------------------------------------------------------- + + Code (inc. data) RO Data RW Data ZI Data Debug Library Name + + 29656 4164 1260 1840 6072 30896 CVWL518.lib + 200 20 0 0 0 76 m_ps.l + 2826 120 0 4 0 1204 mc_p.l + 2068 52 0 0 0 1712 mf_p.l + + ---------------------------------------------------------------------- + 34792 4356 1264 1852 6072 33888 Library Totals + + ---------------------------------------------------------------------- + +============================================================================== + + + Code (inc. data) RO Data RW Data ZI Data Debug + + 46694 5506 10270 12204 10580 92099 Grand Totals + 46694 5506 10270 7976 10580 92099 ELF Image Totals (compressed) + 46694 5506 10270 7976 0 0 ROM Totals + +============================================================================== + + Total RO Size (Code + RO Data) 56964 ( 55.63kB) + Total RW Size (RW Data + ZI Data) 22784 ( 22.25kB) + Total ROM Size (Code + RO Data + RW Data) 64940 ( 63.42kB) + +============================================================================== + diff --git a/project/ISP_568/Listings/WL518_20P_HX667.map b/project/ISP_568/Listings/WL518_20P_HX667.map new file mode 100644 index 0000000..39f8ef7 --- /dev/null +++ b/project/ISP_568/Listings/WL518_20P_HX667.map @@ -0,0 +1,5078 @@ +Component: ARM Compiler 5.06 update 6 (build 750) Tool: armlink [4d35ed] + +============================================================================== + +Section Cross References + + main.o(i.main) refers to board.o(i.board_Init) for board_Init + main.o(i.main) refers to ap_demo.o(i.ap_demo) for ap_demo + ap_demo.o(i.Gpio_swire_output) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + ap_demo.o(i.Gpio_swire_output) refers to tau_delay.o(i.delayUs) for delayUs + ap_demo.o(i.Gpio_swire_output) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + ap_demo.o(i.ap_dcs_read) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) for hal_dsi_rx_ctrl_get_max_ret_size + ap_demo.o(i.ap_dcs_read) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) for hal_dsi_rx_ctrl_send_ack_cmd + ap_demo.o(i.ap_dcs_read) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_dcs_read) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_demo) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + ap_demo.o(i.ap_demo) refers to app_tp_transfer.o(i.app_tp_I2C_init) for app_tp_I2C_init + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.open_mipi_rx) for open_mipi_rx + ap_demo.o(i.ap_demo) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.init_mipi_tx) for init_mipi_tx + ap_demo.o(i.ap_demo) refers to app_tp_transfer.o(i.app_tp_init) for app_tp_init + ap_demo.o(i.ap_demo) refers to hal_timer.o(i.hal_timer_init) for hal_timer_init + ap_demo.o(i.ap_demo) refers to hal_timer.o(i.hal_timer_start) for hal_timer_start + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.tx_display_on) for tx_display_on + ap_demo.o(i.ap_demo) refers to hal_gpio.o(i.hal_gpio_set_ap_reset_int) for hal_gpio_set_ap_reset_int + ap_demo.o(i.ap_demo) refers to app_tp_transfer.o(i.app_tp_phone_clear_reset_on) for app_tp_phone_clear_reset_on + ap_demo.o(i.ap_demo) refers to tau_delay.o(i.delayMs) for delayMs + ap_demo.o(i.ap_demo) refers to app_tp_transfer.o(i.app_tp_transfer_screen_start) for app_tp_transfer_screen_start + ap_demo.o(i.ap_demo) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) for hal_dsi_rx_ctrl_dsc_async_handler + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.app_tp_calibration_exec) for app_tp_calibration_exec + ap_demo.o(i.ap_demo) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.ap_demo) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + ap_demo.o(i.ap_demo) refers to app_tp_transfer.o(i.app_tp_transfer_screen_int) for app_tp_transfer_screen_int + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.tp_heartbeat_exec) for tp_heartbeat_exec + ap_demo.o(i.ap_demo) refers to app_tp_transfer.o(i.ap_tp_scan_point_record_event_exec) for ap_tp_scan_point_record_event_exec + ap_demo.o(i.ap_demo) refers to app_tp_transfer.o(i.S20_Start_init) for S20_Start_init + ap_demo.o(i.ap_demo) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_demo) refers to app_tp_for_custom_s8.o(.data) for tp_sleep_count + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.soft_timer3_cb) for soft_timer3_cb + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.ap_reset_cb) for ap_reset_cb + ap_demo.o(i.ap_get_reg_ca) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_get_reg_df) refers to ap_demo.o(i.blue_change_ccm) for blue_change_ccm + ap_demo.o(i.ap_get_reg_df) refers to memcpya.o(.text) for __aeabi_memcpy4 + ap_demo.o(i.ap_get_reg_df) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) for hal_dsi_tx_ctrl_set_ccm + ap_demo.o(i.ap_get_reg_df) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_reset_cb) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_reset_cb) refers to hal_system.o(i.hal_system_set_pvd) for hal_system_set_pvd + ap_demo.o(i.ap_reset_cb) refers to hal_system.o(i.hal_system_set_vcc) for hal_system_set_vcc + ap_demo.o(i.ap_set_backlight) refers to ap_demo.o(i.__ARM_common_switch8) for __ARM_common_switch8 + ap_demo.o(i.ap_set_backlight) refers to idiv.o(.text) for __aeabi_idivmod + ap_demo.o(i.ap_set_backlight) refers to uidiv.o(.text) for __aeabi_uidivmod + ap_demo.o(i.ap_set_backlight) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.ap_set_backlight) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_set_display_off) refers to ap_demo.o(i.Gpio_swire_output) for Gpio_swire_output + ap_demo.o(i.ap_set_display_off) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_set_display_off) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.ap_set_display_off) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_set_display_on) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_set_display_on) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_set_enter_sleep_mode) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.ap_set_enter_sleep_mode) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_set_enter_sleep_mode) refers to ap_demo.o(i.soft_disable_mipi_timer_init) for soft_disable_mipi_timer_init + ap_demo.o(i.ap_set_enter_sleep_mode) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_set_exit_sleep_mode) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_set_exit_sleep_mode) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_set_tp_calibration_04) refers to ap_demo.o(.data) for .data + ap_demo.o(i.app_tp_calibration_exec) refers to app_tp_transfer.o(i.ap_tp_calibration) for ap_tp_calibration + ap_demo.o(i.app_tp_calibration_exec) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.app_tp_calibration_exec) refers to ap_demo.o(.data) for .data + ap_demo.o(i.blue_change_ccm) refers to memcpya.o(.text) for __aeabi_memcpy4 + ap_demo.o(i.blue_change_ccm) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) for hal_dsi_tx_ctrl_set_ccm + ap_demo.o(i.disable_mipi_timer_cb) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + ap_demo.o(i.disable_mipi_timer_cb) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) for hal_dsi_tx_ctrl_stop + ap_demo.o(i.disable_mipi_timer_cb) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) for hal_dsi_tx_ctrl_deinit + ap_demo.o(i.disable_mipi_timer_cb) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) for hal_dsi_rx_ctrl_stop + ap_demo.o(i.disable_mipi_timer_cb) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) for hal_dsi_rx_ctrl_deinit + ap_demo.o(i.disable_mipi_timer_cb) refers to hal_swire.o(i.hal_swire_open) for hal_swire_open + ap_demo.o(i.disable_mipi_timer_cb) refers to hal_timer.o(i.hal_timer_stop) for hal_timer_stop + ap_demo.o(i.disable_mipi_timer_cb) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + ap_demo.o(i.disable_mipi_timer_cb) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_panel_reset_pin) for hal_dsi_tx_ctrl_panel_reset_pin + ap_demo.o(i.disable_mipi_timer_cb) refers to hal_system.o(i.hal_system_set_vcc) for hal_system_set_vcc + ap_demo.o(i.disable_mipi_timer_cb) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.disable_mipi_timer_cb) refers to ap_demo.o(.data) for .data + ap_demo.o(i.disable_mipi_timer_cb) refers to app_tp_for_custom_s8.o(.data) for tp_sleep_in + ap_demo.o(i.init_mipi_tx) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) for hal_dsi_tx_ctrl_create_handle + ap_demo.o(i.init_mipi_tx) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) for hal_dsi_tx_ctrl_init + ap_demo.o(i.init_mipi_tx) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) for hal_dsi_tx_ctrl_set_overwrite_rgb + ap_demo.o(i.init_mipi_tx) refers to ap_demo.o(.data) for .data + ap_demo.o(i.init_panel) refers to ap_demo.o(i.tx_panel_reset) for tx_panel_reset + ap_demo.o(i.init_panel) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) for hal_dsi_tx_ctrl_enter_init_panel_mode + ap_demo.o(i.init_panel) refers to ap_demo.o(i.send_panel_init_code) for send_panel_init_code + ap_demo.o(i.init_panel) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.init_panel) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.init_panel) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode) for hal_dsi_rx_ctrl_set_hw_tear_mode + ap_demo.o(i.init_panel) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + ap_demo.o(i.init_panel) refers to tau_delay.o(i.delayMs) for delayMs + ap_demo.o(i.init_panel) refers to ap_demo.o(i.Gpio_swire_output) for Gpio_swire_output + ap_demo.o(i.init_panel) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) for hal_dsi_tx_ctrl_exit_init_panel_mode + ap_demo.o(i.init_panel) refers to ap_demo.o(.data) for .data + ap_demo.o(i.open_mipi_rx) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) for hal_dsi_rx_ctrl_create_handle + ap_demo.o(i.open_mipi_rx) refers to memcpya.o(.text) for __aeabi_memcpy4 + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_pre_init_pps) for hal_dsi_rx_ctrl_pre_init_pps + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) for hal_dsi_rx_ctrl_init + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) for hal_dsi_rx_ctrl_set_cus_sync_line + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) for hal_dsi_rx_ctrl_start + ap_demo.o(i.open_mipi_rx) refers to ap_demo.o(.data) for .data + ap_demo.o(i.open_mipi_rx) refers to ap_demo.o(.constdata) for .constdata + ap_demo.o(i.open_mipi_rx) refers to ap_demo.o(i.ap_dcs_read) for ap_dcs_read + ap_demo.o(i.open_mipi_rx) refers to ap_demo.o(i.pps_update_handle) for pps_update_handle + ap_demo.o(i.pps_update_handle) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) for hal_dsi_rx_ctrl_set_sw_tear_mode + ap_demo.o(i.pps_update_handle) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) for hal_dsi_rx_ctrl_toggle_resolution + ap_demo.o(i.pps_update_handle) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode) for hal_dsi_rx_ctrl_set_hw_tear_mode + ap_demo.o(i.pps_update_handle) refers to ap_demo.o(.data) for .data + ap_demo.o(i.send_panel_init_code) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) for hal_dsi_tx_ctrl_write_array_cmd + ap_demo.o(i.send_panel_init_code) refers to tau_delay.o(i.delayUs) for delayUs + ap_demo.o(i.soft_disable_mipi_timer_init) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.soft_disable_mipi_timer_init) refers to hal_timer.o(i.hal_timer_init) for hal_timer_init + ap_demo.o(i.soft_disable_mipi_timer_init) refers to hal_timer.o(i.hal_timer_start) for hal_timer_start + ap_demo.o(i.soft_disable_mipi_timer_init) refers to ap_demo.o(i.disable_mipi_timer_cb) for disable_mipi_timer_cb + ap_demo.o(i.soft_timer3_cb) refers to hal_timer.o(i.hal_timer_start) for hal_timer_start + ap_demo.o(i.soft_timer3_cb) refers to app_tp_for_custom_s8.o(.data) for tp_sleep_count + ap_demo.o(i.soft_timer3_cb) refers to ap_demo.o(.data) for .data + ap_demo.o(i.tp_heartbeat_exec) refers to hal_gpio.o(i.hal_gpio_get_input_data) for hal_gpio_get_input_data + ap_demo.o(i.tp_heartbeat_exec) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.tp_heartbeat_exec) refers to app_tp_transfer.o(i.ap_tp_system_softReset) for ap_tp_system_softReset + ap_demo.o(i.tp_heartbeat_exec) refers to app_tp_transfer.o(.data) for s_screen_init_complate + ap_demo.o(i.tp_heartbeat_exec) refers to ap_demo.o(.data) for .data + ap_demo.o(i.tx_display_on) refers to ap_demo.o(i.init_panel) for init_panel + ap_demo.o(i.tx_display_on) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) for hal_dsi_tx_ctrl_start + ap_demo.o(i.tx_display_on) refers to ap_demo.o(.data) for .data + ap_demo.o(i.tx_panel_reset) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_panel_reset_pin) for hal_dsi_tx_ctrl_panel_reset_pin + ap_demo.o(i.tx_panel_reset) refers to tau_delay.o(i.delayMs) for delayMs + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_display_on) for ap_set_display_on + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_display_off) for ap_set_display_off + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_get_reg_df) for ap_get_reg_df + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_get_reg_ca) for ap_get_reg_ca + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_backlight) for ap_set_backlight + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_enter_sleep_mode) for ap_set_enter_sleep_mode + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_exit_sleep_mode) for ap_set_exit_sleep_mode + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_tp_calibration_04) for ap_set_tp_calibration_04 + app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) refers to app_tp_for_custom_s8.o(.data) for .data + app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) refers to app_tp_for_custom_s8.o(.constdata) for .constdata + app_tp_for_custom_s8.o(i.app_tp_screen_analysis_const) refers to app_tp_transfer.o(i.app_tp_screen_init) for app_tp_screen_init + app_tp_for_custom_s8.o(i.app_tp_screen_analysis_const) refers to app_tp_for_custom_s8.o(.data) for .data + app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) refers to uidiv.o(.text) for __aeabi_uidivmod + app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) refers to app_tp_for_custom_s8.o(.data) for .data + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_1 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_2 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_3 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_4 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_5 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_6 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_7 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for phone_reg_point_data + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for phone_reg_point_back + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for phone_reg_coord_data + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for phone_reg_coord_back + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_transfer.o(i.app_tp_m_read) for app_tp_m_read + app_tp_transfer.o(i.S20_Start_init) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_transfer.o(i.S20_Start_init) refers to tau_delay.o(i.delayMs) for delayMs + app_tp_transfer.o(i.S20_Start_init) refers to hal_gpio.o(i.hal_gpio_get_input_data) for hal_gpio_get_input_data + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_transfer.o(i.app_tp_m_write) for app_tp_m_write + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_transfer.o(i.app_tp_screen_int_init) for app_tp_screen_int_init + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_for_custom_s8.o(.data) for screen_reg_int_data + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_transfer.o(.bss) for .bss + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_for_custom_s8.o(.data) for g_screen_input_int_pad + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.S20_Start_init) refers to ap_demo.o(.data) for phone_start_flag + app_tp_transfer.o(i.ap_tp_calibration) refers to app_tp_transfer.o(i.app_tp_m_write) for app_tp_m_write + app_tp_transfer.o(i.ap_tp_calibration) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_transfer.o(i.ap_tp_calibration) refers to tau_delay.o(i.delayMs) for delayMs + app_tp_transfer.o(i.ap_tp_calibration) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.ap_tp_scan_point_init) refers to app_tp_transfer.o(.bss) for .bss + app_tp_transfer.o(i.ap_tp_scan_point_record_event) refers to app_tp_transfer.o(.bss) for .bss + app_tp_transfer.o(i.ap_tp_scan_point_record_event_exec) refers to printfa.o(i.__0printf) for __2printf + app_tp_transfer.o(i.ap_tp_scan_point_record_event_exec) refers to app_tp_transfer.o(i.ap_tp_simulate_finger_release_event) for ap_tp_simulate_finger_release_event + app_tp_transfer.o(i.ap_tp_scan_point_record_event_exec) refers to app_tp_transfer.o(i.ap_tp_scan_point_init) for ap_tp_scan_point_init + app_tp_transfer.o(i.ap_tp_scan_point_record_event_exec) refers to app_tp_transfer.o(.bss) for .bss + app_tp_transfer.o(i.ap_tp_simulate_finger_release_event) refers to app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) for app_tp_screen_analysis_int + app_tp_transfer.o(i.ap_tp_simulate_finger_release_event) refers to tau_delay.o(i.delayMs) for delayMs + app_tp_transfer.o(i.ap_tp_system_softReset) refers to app_tp_transfer.o(i.ap_tp_simulate_finger_release_event) for ap_tp_simulate_finger_release_event + app_tp_transfer.o(i.ap_tp_system_softReset) refers to app_tp_transfer.o(i.ap_tp_scan_point_init) for ap_tp_scan_point_init + app_tp_transfer.o(i.ap_tp_system_softReset) refers to app_tp_transfer.o(i.app_tp_m_write) for app_tp_m_write + app_tp_transfer.o(i.ap_tp_system_softReset) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_transfer.o(i.ap_tp_system_softReset) refers to tau_delay.o(i.delayMs) for delayMs + app_tp_transfer.o(i.ap_tp_system_softReset) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.app_tp_I2C_init) refers to hal_i2c_slave.o(i.hal_i2c_s_init) for hal_i2c_s_init + app_tp_transfer.o(i.app_tp_I2C_init) refers to hal_i2c_slave.o(i.hal_i2c_s_set_transfer) for hal_i2c_s_set_transfer + app_tp_transfer.o(i.app_tp_I2C_init) refers to hal_i2c_slave.o(i.hal_i2c_s_nonblocking_read) for hal_i2c_s_nonblocking_read + app_tp_transfer.o(i.app_tp_I2C_init) refers to app_tp_transfer.o(i.app_tp_i2cs_callback) for app_tp_i2cs_callback + app_tp_transfer.o(i.app_tp_I2C_init) refers to app_tp_transfer.o(.bss) for .bss + app_tp_transfer.o(i.app_tp_i2cs_callback) refers to app_tp_transfer.o(i.app_tp_transfer_phone) for app_tp_transfer_phone + app_tp_transfer.o(i.app_tp_init) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + app_tp_transfer.o(i.app_tp_init) refers to app_tp_transfer.o(i.app_tp_screen_init) for app_tp_screen_init + app_tp_transfer.o(i.app_tp_init) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + app_tp_transfer.o(i.app_tp_init) refers to hal_gpio.o(i.hal_gpio_init_input) for hal_gpio_init_input + app_tp_transfer.o(i.app_tp_init) refers to hal_i2c_master.o(i.hal_i2c_m_dma_init) for hal_i2c_m_dma_init + app_tp_transfer.o(i.app_tp_init) refers to app_tp_transfer.o(i.ap_tp_scan_point_init) for ap_tp_scan_point_init + app_tp_transfer.o(i.app_tp_init) refers to app_tp_for_custom_s8.o(.data) for g_phone_output_int_pad + app_tp_transfer.o(i.app_tp_init) refers to app_tp_for_custom_s8.o(.data) for g_screen_input_int_pad + app_tp_transfer.o(i.app_tp_m_read) refers to hal_i2c_master.o(i.hal_i2c_m_dma_read) for hal_i2c_m_dma_read + app_tp_transfer.o(i.app_tp_m_transfer_complate) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_transfer.o(i.app_tp_m_write) refers to hal_i2c_master.o(i.hal_i2c_m_dma_write) for hal_i2c_m_dma_write + app_tp_transfer.o(i.app_tp_phone_clear_reset_on) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.app_tp_phone_reset_on) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.app_tp_s_read) refers to hal_i2c_slave.o(i.hal_i2c_s_nonblocking_read) for hal_i2c_s_nonblocking_read + app_tp_transfer.o(i.app_tp_s_transfer_complate) refers to hal_i2c_slave.o(i.hal_i2c_s_write_complate) for hal_i2c_s_write_complate + app_tp_transfer.o(i.app_tp_s_transfer_complate) refers to hal_i2c_slave.o(i.hal_i2c_s_read_complate) for hal_i2c_s_read_complate + app_tp_transfer.o(i.app_tp_s_write) refers to hal_i2c_slave.o(i.hal_i2c_s_dma_write) for hal_i2c_s_dma_write + app_tp_transfer.o(i.app_tp_screen_init) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + app_tp_transfer.o(i.app_tp_screen_init) refers to tau_delay.o(i.delayUs) for delayUs + app_tp_transfer.o(i.app_tp_screen_init) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + app_tp_transfer.o(i.app_tp_screen_init) refers to app_tp_for_custom_s8.o(.data) for g_screen_input_rst_pad + app_tp_transfer.o(i.app_tp_screen_int_callback) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.app_tp_screen_int_init) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + app_tp_transfer.o(i.app_tp_screen_int_init) refers to hal_gpio.o(i.hal_gpio_ctrl_eint) for hal_gpio_ctrl_eint + app_tp_transfer.o(i.app_tp_screen_int_init) refers to hal_gpio.o(i.hal_gpio_init_eint) for hal_gpio_init_eint + app_tp_transfer.o(i.app_tp_screen_int_init) refers to hal_gpio.o(i.hal_gpio_reg_eint_cb) for hal_gpio_reg_eint_cb + app_tp_transfer.o(i.app_tp_screen_int_init) refers to app_tp_for_custom_s8.o(.data) for g_screen_input_int_pad + app_tp_transfer.o(i.app_tp_screen_int_init) refers to app_tp_transfer.o(i.app_tp_screen_int_callback) for app_tp_screen_int_callback + app_tp_transfer.o(i.app_tp_transfer_phone) refers to app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) for app_tp_phone_analysis_data + app_tp_transfer.o(i.app_tp_transfer_phone) refers to app_tp_transfer.o(i.app_tp_s_read) for app_tp_s_read + app_tp_transfer.o(i.app_tp_transfer_phone) refers to app_tp_transfer.o(i.app_tp_s_write) for app_tp_s_write + app_tp_transfer.o(i.app_tp_transfer_phone) refers to app_tp_transfer.o(.bss) for .bss + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to app_tp_transfer.o(i.app_tp_m_transfer_complate) for app_tp_m_transfer_complate + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to hal_spi_master.o(i.hal_spi_m_clear_rxfifo) for hal_spi_m_clear_rxfifo + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to app_tp_transfer.o(i.S20_Start_init) for S20_Start_init + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to app_tp_for_custom_s8.o(.constdata) for screen_reg_start_data_size + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to ap_demo.o(.data) for phone_start_flag + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_transfer.o(i.app_tp_transfer_screen_const) for app_tp_transfer_screen_const + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_transfer.o(i.app_tp_screen_int_lvl_low) for app_tp_screen_int_lvl_low + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_transfer.o(i.app_tp_m_transfer_complate) for app_tp_m_transfer_complate + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to hal_spi_master.o(i.hal_spi_m_clear_rxfifo) for hal_spi_m_clear_rxfifo + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_transfer.o(i.app_tp_m_read) for app_tp_m_read + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to tau_delay.o(i.delayUs) for delayUs + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_transfer.o(i.ap_tp_system_softReset) for ap_tp_system_softReset + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to tau_log.o(i.LOG_printf) for LOG_printf + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to tau_delay.o(i.delayMs) for delayMs + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to hal_gpio.o(i.hal_gpio_get_input_data) for hal_gpio_get_input_data + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_transfer.o(i.ap_tp_scan_point_record_event) for ap_tp_scan_point_record_event + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) for app_tp_screen_analysis_int + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_for_custom_s8.o(.data) for screen_reg_int_data + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_transfer.o(.bss) for .bss + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_for_custom_s8.o(.data) for g_screen_input_int_pad + app_tp_transfer.o(i.app_tp_transfer_screen_start) refers to app_tp_transfer.o(i.app_tp_transfer_screen_const) for app_tp_transfer_screen_const + app_tp_transfer.o(i.app_tp_transfer_screen_start) refers to app_tp_transfer.o(.data) for .data + board.o(i.board_Init) refers to hal_system.o(i.hal_system_init) for hal_system_init + board.o(i.board_Init) refers to hal_system.o(i.hal_system_enable_systick) for hal_system_enable_systick + board.o(i.board_Init) refers to hal_system.o(i.hal_system_init_console) for hal_system_init_console + startup_armcm0.o(RESET) refers to startup_armcm0.o(STACK) for __initial_sp + startup_armcm0.o(RESET) refers to startup_armcm0.o(.text) for Reset_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.HardFault_Handler) for HardFault_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.SysTick_Handler) for SysTick_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.VIDC_IRQn_Handler) for VIDC_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.LCDC_IRQn_Handler) for LCDC_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.MIPI_RX_IRQn_Handler) for MIPI_RX_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.MIPI_TX_IRQn_Handler) for MIPI_TX_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.MEMC_IRQn_Handler) for MEMC_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.VPRE_IRQn_Handler) for VPRE_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.FLSCTRL_IRQn_Handler) for FLSCTRL_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.DMA_IRQn_Handler) for DMA_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.TIMER0_IRQn_Handler) for TIMER0_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.TIMER1_IRQn_Handler) for TIMER1_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.TIMER2_IRQn_Handler) for TIMER2_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.TIMER3_IRQn_Handler) for TIMER3_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.WDG_IRQn_Handler) for WDG_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.UART_IRQn_Handler) for UART_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.I2C0_IRQn_Handler) for I2C0_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.I2C1_IRQn_Handler) for I2C1_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.SPIS_IRQn_Handler) for SPIS_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.SPIM_IRQn_Handler) for SPIM_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.ADC_IRQn_Handler) for ADC_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.PWMDET_IRQn_Handler) for PWMDET_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.SWIRE_IRQn_Handler) for SWIRE_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.AP_NRESET_IRQn_Handler) for AP_NRESET_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT0_IRQn_Handler) for EXTI_INT0_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT1_IRQn_Handler) for EXTI_INT1_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT2_IRQn_Handler) for EXTI_INT2_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT3_IRQn_Handler) for EXTI_INT3_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT4_IRQn_Handler) for EXTI_INT4_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT5_IRQn_Handler) for EXTI_INT5_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT6_IRQn_Handler) for EXTI_INT6_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT7_IRQn_Handler) for EXTI_INT7_IRQn_Handler + startup_armcm0.o(.text) refers to entry.o(.ARM.Collect$$$$00000000) for __main + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) for hal_internal_vsync_get_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_dsc_dec.o(i.drv_dsc_dec_disable) for drv_dsc_dec_disable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) for drv_dsi_rx_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_rxbr.o(i.drv_rxbr_enable_irq) for drv_rxbr_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_vidc.o(i.drv_vidc_enable_irq) for drv_vidc_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_memc.o(i.drv_memc_enable_irq) for drv_memc_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) for hal_internal_vsync_get_tx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_config_reset_modules) for drv_crgu_config_reset_modules + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) for hal_internal_vsync_set_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) refers to dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) for dcs_packet_get_fifo_header + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) refers to dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) for dcs_packet_free_fifo_header + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) refers to hal_dsi_rx_ctrl.o(i.drv_rxbr_get_status) for drv_rxbr_get_status + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_pg_cfg) for drv_dsi_rx_set_ddi_pg_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_crgu.o(i.drv_crgu_set_rxbr_src) for drv_crgu_set_rxbr_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_crgu.o(i.drv_crgu_set_rxbr_div) for drv_crgu_set_rxbr_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_pg_cfg) for drv_dsi_rx_set_ipi_pg_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) refers to drv_memc.o(i.drv_memc_gen_a_tear_signal) for drv_memc_gen_a_tear_signal + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_compressen_en) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) for drv_dsi_rx_get_compression_en + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_max_ret_size) for drv_dsi_rx_get_max_ret_size + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) refers to drv_crgu.o(i.drv_crgu_set_rxbr_src) for drv_crgu_set_rxbr_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) refers to drv_crgu.o(i.drv_crgu_set_rxbr_div) for drv_crgu_set_rxbr_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) for drv_dsi_rx_set_ddi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) for hal_dsi_rx_ctrl_set_ipi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) refers to drv_crgu.o(i.drv_crgu_set_dsco_src) for drv_crgu_set_dsco_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) refers to drv_crgu.o(i.drv_crgu_set_dsco_src_div) for drv_crgu_set_dsco_src_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) refers to drv_crgu.o(i.drv_crgu_set_dsc_core_div) for drv_crgu_set_dsc_core_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) refers to drv_crgu.o(i.drv_crgu_set_vidc_src) for drv_crgu_set_vidc_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) refers to drv_crgu.o(i.drv_crgu_set_fb_src) for drv_crgu_set_fb_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) refers to drv_crgu.o(i.drv_crgu_set_fb_div) for drv_crgu_set_fb_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) for hal_dsi_rx_ctrl_init_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_vsync_init_rx) for hal_internal_vsync_init_rx + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) for hal_dsi_rx_ctrl_init_dsi_rx + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) for hal_dsi_rx_ctrl_init_rxbr + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsc_dec) for hal_dsi_rx_ctrl_init_dsc_dec + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to drv_dsc_dec.o(i.drv_dsc_dec_disable) for drv_dsc_dec_disable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) for hal_dsi_rx_ctrl_init_vidc + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) for hal_dsi_rx_ctrl_init_memc + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) for hal_internal_vsync_set_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to drv_chip_info.o(i.drv_chip_rx_init_done) for drv_chip_rx_init_done + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_vidc_src) for drv_crgu_set_vidc_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_fb_src) for drv_crgu_set_fb_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_fb_div) for drv_crgu_set_fb_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) for hal_dsi_rx_ctrl_set_rxbr_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsc_dec) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsc_dec) refers to drv_dsc_dec.o(i.drv_dsc_dec_enable) for drv_dsc_dec_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsc_dec) refers to drv_dsc_dec.o(i.drv_dsc_dec_set_u8_pps) for drv_dsc_dec_set_u8_pps + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ctrl_cfg) for drv_dsi_rx_set_ctrl_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) for drv_dsi_rx_set_ddi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) for hal_dsi_rx_ctrl_set_ipi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) for drv_dsi_rx_set_up_phy + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_inten) for drv_dsi_rx_set_inten + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_resp_cnt) for drv_dsi_rx_set_resp_cnt + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) for drv_dsi_rx_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_data_mode) for drv_memc_set_data_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to ap_demo.o(i.__ARM_common_switch8) for __ARM_common_switch8 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_rate_transfer_sel) for drv_memc_rate_transfer_sel + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_tear_waveform) for drv_memc_set_tear_waveform + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_tear_hwclr) for drv_memc_set_tear_hwclr + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_sel_vsync) for drv_memc_sel_vsync + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_yuv420_cfg) for drv_memc_set_yuv420_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_bypass_fifo_empty) for drv_memc_bypass_fifo_empty + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_color_format) for drv_rxbr_set_color_format + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) for drv_rxbr_frame_drop_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_usr_cfg) for drv_rxbr_set_usr_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_usr_col) for drv_rxbr_set_usr_col + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_usr_row) for drv_rxbr_set_usr_row + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_hline_rcv_cfg) for drv_rxbr_hline_rcv_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_enable_irq) for drv_rxbr_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) for hal_internal_vsync_set_auto_hw_filter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_src_parameter) for drv_vidc_set_src_parameter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_dst_parameter) for drv_vidc_set_dst_parameter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_module_enable) for drv_vidc_module_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to dadd.o(.text) for __aeabi_dadd + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_step) for drv_vidc_set_scld_step + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_param_init.o(i.drv_param_init_get_scld_filter_h) for drv_param_init_get_scld_filter_h + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_param_init.o(i.drv_param_init_get_scld_filter_v) for drv_param_init_get_scld_filter_v + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_hcoef0) for drv_vidc_set_scld_hcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_hcoef1) for drv_vidc_set_scld_hcoef1 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_vcoef0) for drv_vidc_set_scld_vcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_vcoef1) for drv_vidc_set_scld_vcoef1 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_param_init.o(i.drv_param_yuv420_filter_init) for drv_param_yuv420_filter_init + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_y4t2_hcoef0) for drv_vidc_set_y4t2_hcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_y4t2_hcoef1) for drv_vidc_set_y4t2_hcoef1 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_y4t2_vcoef0) for drv_vidc_set_y4t2_vcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_y4t2_vcoef1) for drv_vidc_set_y4t2_vcoef1 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_param_init.o(i.drv_param_p2r_filter_init) for drv_param_p2r_filter_init + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_p2r_step) for drv_vidc_set_p2r_step + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_p2r_hinitr) for drv_vidc_set_p2r_hinitr + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_p2r_hinitb) for drv_vidc_set_p2r_hinitb + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_p2r_hcoef0) for drv_vidc_set_p2r_hcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_p2r_hcoef1) for drv_vidc_set_p2r_hcoef1 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_pu_scld) for drv_vidc_set_pu_scld + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_param_init.o(i.drv_param_init_get_sclu_filter_h) for drv_param_init_get_sclu_filter_h + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_param_init.o(i.drv_param_init_get_sclu_filter_v) for drv_param_init_get_sclu_filter_v + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_sclu_hcoef0y) for drv_vidc_set_sclu_hcoef0y + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_sclu_hcoef1y) for drv_vidc_set_sclu_hcoef1y + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_sclu_vcoef0y) for drv_vidc_set_sclu_vcoef0y + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_sclu_vcoef1y) for drv_vidc_set_sclu_vcoef1y + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_sclu_hcoef0c) for drv_vidc_set_sclu_hcoef0c + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_sclu_hcoef1c) for drv_vidc_set_sclu_hcoef1c + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_sclu_vcoef0c) for drv_vidc_set_sclu_vcoef0c + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_sclu_vcoef1c) for drv_vidc_set_sclu_vcoef1c + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_pu_ctrl) for drv_vidc_set_pu_ctrl + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_param_init.o(i.drv_param_get_picture_quality_setting) for drv_param_get_picture_quality_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_gain) for drv_vidc_set_gain + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_enh_lum) for drv_vidc_set_enh_lum + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_enh_chr) for drv_vidc_set_enh_chr + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_enh_chr2) for drv_vidc_set_enh_chr2 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_irqen) for drv_vidc_set_irqen + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_enable_irq) for drv_vidc_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_pre_init_pps) refers to drv_dsc_dec.o(i.drv_dsc_dec_convert_pps_rc_parameter) for drv_dsc_dec_convert_pps_rc_parameter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_pre_init_pps) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_release_handle) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) for hal_dsi_rx_ctrl_init + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) for hal_internal_vsync_get_tx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) for hal_dsi_rx_ctrl_start + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) refers to drv_rxbr.o(i.drv_rxbr_set_ack_pkt_header) for drv_rxbr_set_ack_pkt_header + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) refers to hal_dsi_rx_ctrl.o(.conststring) for .conststring + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_auto_hw_filter) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) for hal_internal_vsync_set_auto_hw_filter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_auto_hw_filter) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) for drv_dsi_rx_set_ddi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_pq_enh_chr) refers to drv_vidc.o(i.drv_vidc_set_enh_chr) for drv_vidc_set_enh_chr + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_pq_enh_chr) refers to drv_param_init.o(i.drv_param_set_enh_chr) for drv_param_set_enh_chr + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_pq_enh_chr) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_pq_enh_chr2) refers to drv_vidc.o(i.drv_vidc_set_enh_chr2) for drv_vidc_set_enh_chr2 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_pq_enh_chr2) refers to drv_param_init.o(i.drv_param_set_enh_chr2) for drv_param_set_enh_chr2 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_pq_enh_chr2) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_pq_enh_lum) refers to drv_vidc.o(i.drv_vidc_set_enh_lum) for drv_vidc_set_enh_lum + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_pq_enh_lum) refers to drv_param_init.o(i.drv_param_set_enh_lum) for drv_param_set_enh_lum + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_pq_enh_lum) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_pq_gain) refers to drv_vidc.o(i.drv_vidc_set_gain) for drv_vidc_set_gain + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_pq_gain) refers to drv_param_init.o(i.drv_param_set_gain) for drv_param_set_gain + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_pq_gain) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to drv_vidc.o(i.drv_vidc_set_scld_hcoef0) for drv_vidc_set_scld_hcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to drv_vidc.o(i.drv_vidc_set_scld_hcoef1) for drv_vidc_set_scld_hcoef1 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to drv_vidc.o(i.drv_vidc_set_scld_vcoef0) for drv_vidc_set_scld_vcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to drv_vidc.o(i.drv_vidc_set_scld_vcoef1) for drv_vidc_set_scld_vcoef1 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to drv_param_init.o(i.drv_param_init_set_scld_filter) for drv_param_init_set_scld_filter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) for hal_internal_vsync_set_sync_line + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) refers to drv_rxbr.o(i.drv_rxbr_hline_rcv0_cfg) for drv_rxbr_hline_rcv0_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_dcs_direct_mode) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_dcs_direct_mode) for hal_internal_vsync_set_dcs_direct_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_cmd_filter) refers to drv_rxbr.o(i.drv_rxbr_set_cmd_filter) for drv_rxbr_set_cmd_filter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_cmd_filter) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) for hal_internal_vsync_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) refers to drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) for drv_dsi_rx_calc_ipi_tx_delay + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_cfg) for drv_dsi_rx_set_ipi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pentile_format) refers to drv_vidc.o(i.drv_vidc_update_src_format) for drv_vidc_update_src_format + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pentile_format) refers to drv_vidc.o(i.drv_vidc_set_pentile_swap) for drv_vidc_set_pentile_swap + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pentile_format) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) for hal_dsi_rx_ctrl_set_rxbr_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) for drv_dsi_rx_set_ddi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) for hal_dsi_rx_ctrl_set_ipi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_rxbr_src) for drv_crgu_set_rxbr_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_rxbr_div) for drv_crgu_set_rxbr_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_dsco_src) for drv_crgu_set_dsco_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_dsco_src_div) for drv_crgu_set_dsco_src_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_dsc_core_div) for drv_crgu_set_dsc_core_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) for hal_internal_vsync_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_te_waveform) refers to drv_memc.o(i.drv_memc_set_tear_waveform) for drv_memc_set_tear_waveform + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_te_waveform) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_tear_mode_ex) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) for hal_internal_vsync_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) refers to drv_dsi_rx.o(i.drv_dsi_rx_power_up) for drv_dsi_rx_power_up + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) for hal_internal_vsync_set_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) for hal_internal_vsync_get_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) refers to drv_dsi_rx.o(i.drv_dsi_rx_shut_down) for drv_dsi_rx_shut_down + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) for hal_internal_vsync_set_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate) refers to ap_demo.o(i.__ARM_common_switch8) for __ARM_common_switch8 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate) refers to drv_memc.o(i.drv_memc_rate_transfer_sel) for drv_memc_rate_transfer_sel + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate) refers to drv_memc.o(i.drv_memc_sel_vsync) for drv_memc_sel_vsync + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate) refers to drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) for drv_rxbr_frame_drop_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate) refers to drv_rxbr.o(i.drv_rxbr_hline_rcv0_cfg) for drv_rxbr_hline_rcv0_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) refers to hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) for hal_internal_sync_input_resolution_change + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to ffltui.o(.text) for __aeabi_ui2f + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to fscalb.o(.text) for __ARM_scalbnf + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to fdiv.o(.text) for __aeabi_fdiv + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to fmul.o(.text) for __aeabi_fmul + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to idiv.o(.text) for __aeabi_idivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to fflti.o(.text) for __aeabi_i2f + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to ffixi.o(.text) for __aeabi_f2iz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to f2d.o(.text) for __aeabi_f2d + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to ceil.o(i.ceil) for ceil + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to dfixi.o(.text) for __aeabi_d2iz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to fadd.o(.text) for __aeabi_fadd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_video_chunk) for drv_dsi_tx_set_video_chunk + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_video_timing) for drv_dsi_tx_set_video_timing + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) refers to fadd.o(.text) for __aeabi_fadd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to ffltui.o(.text) for __aeabi_ui2f + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to fmul.o(.text) for __aeabi_fmul + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to fdiv.o(.text) for __aeabi_fdiv + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to f2d.o(.text) for __aeabi_f2d + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to ceil.o(i.ceil) for ceil + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to drv_phy_common.o(i.drv_phy_get_rate_para) for drv_phy_get_rate_para + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to dfixi.o(.text) for __aeabi_d2iz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to idiv.o(.text) for __aeabi_idivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to fadd.o(.text) for __aeabi_fsub + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to ffixui.o(.text) for __aeabi_f2uiz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) for hal_lcdc_config_upscaler + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic) refers to drv_lcdc.o(i.drv_lcdc_config_src_parameter) for drv_lcdc_config_src_parameter + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_config_reset_modules) for drv_crgu_config_reset_modules + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) for drv_dsi_tx_command_mode_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_mode) for drv_dsi_tx_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_ulps_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) for drv_dsi_tx_phy_ulps_enter + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) for drv_dsi_tx_command_mode_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_mode) for drv_dsi_tx_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_ulps_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) for drv_dsi_tx_phy_ulps_exit + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) for hal_dsi_tx_ctrl_init_clk + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_vsync_init_tx) for hal_internal_vsync_init_tx + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) for hal_dsi_tx_config_params_for_lane_rate + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) for hal_dsi_tx_count_lane_rate + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) for hal_dsi_tx_init_phy_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) for drv_dsi_tx_phy_test_setup + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) for hal_lcdc_init_clk + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) for hal_lcdc_init_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) for hal_dsi_tx_init_dpi_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) for hal_dsi_tx_init_data_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) for hal_dsi_tx_init_remains + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) for hal_dsi_tx_init_interrupt + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ready) for drv_dsi_tx_phy_status_ready + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to drv_dsi_tx.o(i.drv_dsi_tx_powerup) for drv_dsi_tx_powerup + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_panel_reset_pin) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) for hal_dsi_tx_send_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) for drv_dsi_tx_get_cmd_status + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_get_payload) for drv_dsi_tx_command_get_payload + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to memcpya.o(.text) for __aeabi_memcpy + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_release_handle) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) refers to drv_param_init.o(i.drv_param_init_set_ccm) for drv_param_init_set_ccm + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_cus_pq_edge) refers to drv_lcdc.o(i.drv_lcdc_config_yuv420_threshold) for drv_lcdc_config_yuv420_threshold + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_cus_pq_filter) refers to drv_lcdc.o(i.drv_lcdc_config_sclu_filter) for drv_lcdc_config_sclu_filter + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_endianness) refers to drv_lcdc.o(i.drv_lcdc_config_endianness) for drv_lcdc_config_endianness + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_escape_clock_div) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) for drv_dsi_tx_set_esc_div + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_horizon_flip) refers to drv_lcdc.o(i.drv_lcdc_config_horiz_flip) for drv_lcdc_config_horiz_flip + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_lp_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_video_mode_set_lp_cmd) for drv_dsi_tx_video_mode_set_lp_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite) for drv_lcdc_config_overwrite + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite_rgb) for drv_lcdc_config_overwrite_rgb + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp) refers to drv_lcdc.o(i.drv_lcdc_config_partial_display_enable) for drv_lcdc_config_partial_display_enable + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp_area) refers to drv_lcdc.o(i.drv_lcdc_config_partial_display_area) for drv_lcdc_config_partial_display_area + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_vpg) for drv_dsi_tx_set_vpg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) for drv_dsi_tx_config_eotp + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) for drv_dsi_tx_phy_clock_lane_req_hs + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_lcdc.o(i.drv_lcdc_enable_shadow_reg) for drv_lcdc_enable_shadow_reg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite) for drv_lcdc_config_overwrite + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_lcdc.o(i.drv_lcdc_start) for drv_lcdc_start + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to drv_lcdc.o(i.drv_lcdc_start) for drv_lcdc_start + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to drv_lcdc.o(i.drv_lcdc_set_int) for drv_lcdc_set_int + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_int) for drv_dsi_tx_set_int + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to drv_dsi_tx.o(i.drv_dsi_tx_shutdown) for drv_dsi_tx_shutdown + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) for drv_dsi_tx_get_cmd_status + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) for hal_dsi_tx_send_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) for drv_dsi_tx_command_put_payload + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) for drv_dsi_tx_get_cmd_status + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) for hal_dsi_tx_send_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) for drv_dsi_tx_command_put_payload + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_mode) for drv_dsi_tx_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) for hal_dsi_tx_init_video_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_dpi_mode) for drv_dsi_tx_dpi_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_dpi_polarity) for drv_dsi_tx_dpi_polarity + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_dpi_lpcmd_time) for drv_dsi_tx_dpi_lpcmd_time + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_int) for drv_dsi_tx_set_int + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) refers to drv_dsi_tx.o(i.drv_dsi_tx_config_int) for drv_dsi_tx_config_int + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_lane_mode) for drv_dsi_tx_phy_lane_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_time_cfg) for drv_dsi_tx_phy_time_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_response_mode) for drv_dsi_tx_response_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) for drv_dsi_tx_set_esc_div + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_time_out_div) for drv_dsi_tx_set_time_out_div + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_timeout_cfg) for drv_dsi_tx_timeout_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) for drv_dsi_tx_config_eotp + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) for drv_dsi_tx_phy_clock_lane_req_hs + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_auto_lp) for drv_dsi_tx_phy_clock_lane_auto_lp + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_video_mode_cfg) for drv_dsi_tx_video_mode_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_bta_ack) for drv_dsi_tx_set_bta_ack + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_video_mode_set_lp_cmd) for drv_dsi_tx_video_mode_set_lp_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_video_mode_disable_hact_cmd) for drv_dsi_tx_video_mode_disable_hact_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) for hal_dsi_tx_calc_video_chunks + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) for drv_dsi_tx_get_cmd_status + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_header) for drv_dsi_tx_command_header + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) for drv_dsi_tx_phy_status_stopstate + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) refers to drv_param_init.o(i.drv_param_init_get_ccm) for drv_param_init_get_ccm + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) refers to drv_lcdc.o(i.drv_lcdc_config_ccm) for drv_lcdc_config_ccm + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_disp_mode) for drv_lcdc_config_disp_mode + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_endianness) for drv_lcdc_config_endianness + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_horiz_flip) for drv_lcdc_config_horiz_flip + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_cbcr) for drv_lcdc_config_cbcr + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_thresh) for drv_lcdc_config_thresh + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_dpi_polarity) for drv_lcdc_config_dpi_polarity + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_src_parameter) for drv_lcdc_config_src_parameter + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_rgb_to_pentile) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_y2t4_use_sclu) for hal_internal_vsync_get_y2t4_use_sclu + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to drv_lcdc.o(i.drv_lcdc_config_yuv420_threshold) for drv_lcdc_config_yuv420_threshold + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to drv_lcdc.o(i.drv_lcdc_config_420_to_444_mode) for drv_lcdc_config_420_to_444_mode + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to dadd.o(.text) for __aeabi_dadd + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp_area) for hal_dsi_tx_ctrl_set_partial_disp_area + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp) for hal_dsi_tx_ctrl_set_partial_disp + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to drv_lcdc.o(i.drv_lcdc_config_upscaler) for drv_lcdc_config_upscaler + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_yuv_to_rgb) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) for hal_lcdc_config_upscaler + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_yuv_to_rgb) for hal_lcdc_config_yuv_to_rgb + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) for hal_lcdc_config_ccm + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_rgb_to_pentile) for hal_lcdc_config_rgb_to_pentile + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) for hal_lcdc_config_remains + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) for hal_lcdc_init_interrupt + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to ffltui.o(.text) for __aeabi_ui2f + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_dpi_pre_div) for drv_crgu_set_dpi_pre_div + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_dpi_pre_src) for drv_crgu_set_dpi_pre_src + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_dpi_mux_src) for drv_crgu_set_dpi_mux_src + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to fmul.o(.text) for __aeabi_fmul + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to fdiv.o(.text) for __aeabi_fdiv + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to f2d.o(.text) for __aeabi_f2d + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to ceil.o(i.ceil) for ceil + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_lcdc.o(i.drv_lcdc_config_dpi_timing) for drv_lcdc_config_dpi_timing + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to cfrcmple.o(.text) for __aeabi_cfrcmple + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to ffixi.o(.text) for __aeabi_f2iz + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to idiv.o(.text) for __aeabi_idivmod + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_lcdc_div) for drv_crgu_set_lcdc_div + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_lcdc_src) for drv_crgu_set_lcdc_src + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) for hal_internal_vsync_get_sync_line + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) refers to drv_lcdc.o(i.drv_lcdc_set_int) for drv_lcdc_set_int + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) refers to drv_lcdc.o(i.drv_lcdc_ctrl_flow) for drv_lcdc_ctrl_flow + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) refers to drv_lcdc.o(i.drv_lcdc_config_int) for drv_lcdc_config_int + hal_gpio.o(i.hal_gpio_ctrl_eint) refers to drv_gpio.o(i.drv_gpio_set_int) for drv_gpio_set_int + hal_gpio.o(i.hal_gpio_ctrl_eint) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_get_input_data) refers to drv_gpio.o(i.drv_gpio_get_input_data) for drv_gpio_get_input_data + hal_gpio.o(i.hal_gpio_get_int_type) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_get_pull_state) refers to drv_gpio.o(i.drv_gpio_get_pull_state) for drv_gpio_get_pull_state + hal_gpio.o(i.hal_gpio_get_pull_state) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_init_eint) refers to drv_gpio.o(i.drv_gpio_set_ioe) for drv_gpio_set_ioe + hal_gpio.o(i.hal_gpio_init_eint) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_gpio.o(i.hal_gpio_init_eint) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_gpio_group) for drv_sys_cfg_sel_gpio_group + hal_gpio.o(i.hal_gpio_init_eint) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_int_trig) for drv_sys_cfg_sel_int_trig + hal_gpio.o(i.hal_gpio_init_eint) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_gpio.o(i.hal_gpio_init_eint) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_init_input) refers to drv_gpio.o(i.drv_gpio_set_ioe) for drv_gpio_set_ioe + hal_gpio.o(i.hal_gpio_init_input) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_gpio.o(i.hal_gpio_init_input) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_init_output) refers to hal_gpio.o(i.drv_gpio_set_output_data) for drv_gpio_set_output_data + hal_gpio.o(i.hal_gpio_init_output) refers to drv_gpio.o(i.drv_gpio_set_ioe) for drv_gpio_set_ioe + hal_gpio.o(i.hal_gpio_init_output) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_gpio.o(i.hal_gpio_init_output) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_reg_eint_cb) refers to drv_gpio.o(i.drv_gpio_register_callback) for drv_gpio_register_callback + hal_gpio.o(i.hal_gpio_reg_eint_cb) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_ap_reset_int) refers to drv_gpio.o(i.drv_gpio_register_ap_reset_callback) for drv_gpio_register_ap_reset_callback + hal_gpio.o(i.hal_gpio_set_ap_reset_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) for drv_sys_cfg_sel_ap_rst_trig + hal_gpio.o(i.hal_gpio_set_ap_reset_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_gpio.o(i.hal_gpio_set_ap_reset_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + hal_gpio.o(i.hal_gpio_set_driving_strength) refers to drv_gpio.o(i.drv_gpio_set_driving_strength) for drv_gpio_set_driving_strength + hal_gpio.o(i.hal_gpio_set_driving_strength) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_mode) refers to drv_gpio.o(i.drv_gpio_set_mode3) for drv_gpio_set_mode3 + hal_gpio.o(i.hal_gpio_set_mode) refers to drv_gpio.o(i.drv_gpio_set_mode2) for drv_gpio_set_mode2 + hal_gpio.o(i.hal_gpio_set_mode) refers to drv_gpio.o(i.drv_gpio_set_mode1) for drv_gpio_set_mode1 + hal_gpio.o(i.hal_gpio_set_mode) refers to drv_gpio.o(i.drv_gpio_set_mode0) for drv_gpio_set_mode0 + hal_gpio.o(i.hal_gpio_set_mode) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_output_data) refers to hal_gpio.o(i.drv_gpio_set_output_data) for drv_gpio_set_output_data + hal_gpio.o(i.hal_gpio_set_pull_state) refers to drv_gpio.o(i.drv_gpio_set_pull_state) for drv_gpio_set_pull_state + hal_gpio.o(i.hal_gpio_set_pull_state) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_schmitt_trigger) refers to drv_gpio.o(i.drv_gpio_set_schmitt_trigger) for drv_gpio_set_schmitt_trigger + hal_gpio.o(i.hal_gpio_set_schmitt_trigger) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_slew_rate) refers to drv_gpio.o(i.drv_gpio_set_slew_rate) for drv_gpio_set_slew_rate + hal_gpio.o(i.hal_gpio_set_slew_rate) refers to hal_gpio.o(.constdata) for .constdata + hal_i2c_master.o(i.hal_i2c_m_deinit) refers to drv_i2c_master.o(i.drv_i2c_m_deinit) for drv_i2c_m_deinit + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_master.o(i.drv_i2c_master_init) for drv_i2c_master_init + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_master.o(i.drv_i2c_m_set_callback) for drv_i2c_m_set_callback + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_master.o(i.drv_i2c_m_enable_intr) for drv_i2c_m_enable_intr + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_dma.o(i.drv_i2c_dma_init) for drv_i2c_dma_init + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_dma.o(i.drv_i2c_enable_rx_dma) for drv_i2c_enable_rx_dma + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_dma.o(i.drv_i2c_enable_tx_dma) for drv_i2c_enable_tx_dma + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to hal_i2c_master.o(i.hal_i2c_master_irq_callback) for hal_i2c_master_irq_callback + hal_i2c_master.o(i.hal_i2c_m_dma_read) refers to drv_i2c_dma.o(i.drv_i2c_master_read_dma) for drv_i2c_master_read_dma + hal_i2c_master.o(i.hal_i2c_m_dma_read) refers to hal_i2c_master.o(.data) for .data + hal_i2c_master.o(i.hal_i2c_m_dma_write) refers to drv_i2c_dma.o(i.drv_i2c_master_write_dma) for drv_i2c_master_write_dma + hal_i2c_master.o(i.hal_i2c_m_dma_write) refers to hal_i2c_master.o(.data) for .data + hal_i2c_master.o(i.hal_i2c_m_set_high_impedance) refers to drv_i2c_master.o(i.drv_i2c_m_enable) for drv_i2c_m_enable + hal_i2c_master.o(i.hal_i2c_m_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_i2c_master.o(i.hal_i2c_m_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + hal_i2c_master.o(i.hal_i2c_m_transfer_complate) refers to hal_i2c_master.o(.data) for .data + hal_i2c_master.o(i.hal_i2c_master_irq_callback) refers to drv_i2c_master.o(i.drv_i2c_clear_m_it_pending_bit) for drv_i2c_clear_m_it_pending_bit + hal_i2c_master.o(i.hal_i2c_master_irq_callback) refers to hal_i2c_master.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_deinit) refers to drv_i2c_slave.o(i.drv_i2c_s_deinit) for drv_i2c_s_deinit + hal_i2c_slave.o(i.hal_i2c_s_dma_user_callback) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_dma_write) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + hal_i2c_slave.o(i.hal_i2c_s_dma_write) refers to drv_dma.o(i.drv_dma_enable_channel_interrupts) for drv_dma_enable_channel_interrupts + hal_i2c_slave.o(i.hal_i2c_s_dma_write) refers to drv_i2c_dma.o(i.drv_i2c_slave_write_dma) for drv_i2c_slave_write_dma + hal_i2c_slave.o(i.hal_i2c_s_dma_write) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_get_tx_byte_num) refers to drv_i2c_slave.o(i.drv_i2c_s_get_tx_byte_num) for drv_i2c_s_get_tx_byte_num + hal_i2c_slave.o(i.hal_i2c_s_init) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_slave.o(i.drv_i2c_slave_init) for drv_i2c_slave_init + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_slave.o(i.drv_i2c_s_set_callback) for drv_i2c_s_set_callback + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_slave.o(i.drv_i2c_s_enable_intr) for drv_i2c_s_enable_intr + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_dma.o(i.drv_i2c_dma_init) for drv_i2c_dma_init + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) for drv_i2c_set_dma_irq_callback + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) for drv_sys_cfg_set_dma_tx_req + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_dma.o(i.drv_i2c_enable_tx_dma) for drv_i2c_enable_tx_dma + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_dma.o(i.drv_dma_enable_channel_interrupts) for drv_dma_enable_channel_interrupts + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_dma.o(i.drv_dma_enable_cycle) for drv_dma_enable_cycle + hal_i2c_slave.o(i.hal_i2c_s_init) refers to hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) for hal_i2c_slave_irq_callback + hal_i2c_slave.o(i.hal_i2c_s_init) refers to hal_i2c_slave.o(i.hal_i2c_s_dma_user_callback) for hal_i2c_s_dma_user_callback + hal_i2c_slave.o(i.hal_i2c_s_nonblocking_read) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_read_complate) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_read_complate_clear) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_read_data) refers to drv_i2c_slave.o(i.drv_i2c_s_read_data) for drv_i2c_s_read_data + hal_i2c_slave.o(i.hal_i2c_s_rxfifo_notempty) refers to drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) for drv_i2c_s_get_fifo_status + hal_i2c_slave.o(i.hal_i2c_s_set_dma_tx_cycle) refers to drv_dma.o(i.drv_dma_enable_cycle) for drv_dma_enable_cycle + hal_i2c_slave.o(i.hal_i2c_s_set_high_impedance) refers to drv_i2c_slave.o(i.drv_i2c_s_enable) for drv_i2c_s_enable + hal_i2c_slave.o(i.hal_i2c_s_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_i2c_slave.o(i.hal_i2c_s_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + hal_i2c_slave.o(i.hal_i2c_s_set_transfer) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_write_complate) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_write_data) refers to drv_i2c_slave.o(i.drv_i2c_s_write_data) for drv_i2c_s_write_data + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) for drv_i2c_s_get_fifo_status + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_i2c_slave.o(i.drv_i2c_clear_s_it_pending_bit) for drv_i2c_clear_s_it_pending_bit + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_i2c_slave.o(i.drv_i2c_s_write_data) for drv_i2c_s_write_data + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_i2c_slave.o(.data) for tx_byte_num + hal_spi_master.o(i.hal_spi_m_callback) refers to drv_spi_dma.o(i.drv_spi_abort_dma) for drv_spi_abort_dma + hal_spi_master.o(i.hal_spi_m_callback) refers to hal_spi_master.o(.data) for .data + hal_spi_master.o(i.hal_spi_m_clear_rxfifo) refers to drv_spi_master.o(i.drv_spi_m_read_data) for drv_spi_m_read_data + hal_spi_master.o(i.hal_spi_m_deinit) refers to drv_spi_master.o(i.drv_spi_m_deinit) for drv_spi_m_deinit + hal_spi_master.o(i.hal_spi_m_dma_init) refers to hal_spi_master.o(i.hal_spi_m_gpio_init) for hal_spi_m_gpio_init + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_master.o(i.drv_spi_master_init) for drv_spi_master_init + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_dma.o(i.drv_spi_dma_init) for drv_spi_dma_init + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) for drv_spi_set_dma_irq_callback + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_master.o(i.drv_spi_m_enable_rx_dma) for drv_spi_m_enable_rx_dma + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_master.o(i.drv_spi_m_enable_tx_dma) for drv_spi_m_enable_tx_dma + hal_spi_master.o(i.hal_spi_m_dma_init) refers to hal_spi_master.o(i.hal_spi_m_callback) for hal_spi_m_callback + hal_spi_master.o(i.hal_spi_m_dma_read) refers to drv_spi_dma.o(i.drv_spim_dma_read) for drv_spim_dma_read + hal_spi_master.o(i.hal_spi_m_dma_read) refers to hal_spi_master.o(.data) for .data + hal_spi_master.o(i.hal_spi_m_dma_write) refers to drv_spi_dma.o(i.drv_spim_dma_write) for drv_spim_dma_write + hal_spi_master.o(i.hal_spi_m_dma_write) refers to hal_spi_master.o(.data) for .data + hal_spi_master.o(i.hal_spi_m_get_transfer_complate) refers to hal_spi_master.o(.data) for .data + hal_spi_master.o(i.hal_spi_m_gpio_init) refers to drv_spi_master.o(i.drv_spi_m_gpio_init) for drv_spi_m_gpio_init + hal_spi_master.o(i.hal_spi_m_set_high_impedance) refers to drv_spi_master.o(i.drv_spi_m_enable) for drv_spi_m_enable + hal_spi_master.o(i.hal_spi_m_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_spi_master.o(i.hal_spi_m_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_init_input) for hal_gpio_init_input + hal_spi_master.o(i.hal_spi_m_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + hal_swire.o(i.hal_swire_deinit) refers to drv_swire.o(i.drv_swire_enable) for drv_swire_enable + hal_swire.o(i.hal_swire_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_swire.o(i.hal_swire_init) refers to drv_crgu.o(i.drv_crgu_set_swire_div) for drv_crgu_set_swire_div + hal_swire.o(i.hal_swire_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_swire.o(i.hal_swire_init) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_swire.o(i.hal_swire_init) refers to drv_swire.o(i.drv_swire_enable) for drv_swire_enable + hal_swire.o(i.hal_swire_open) refers to drv_swire.o(i.drv_swire_set_power_down) for drv_swire_set_power_down + hal_swire.o(i.hal_swire_register_callback) refers to drv_swire.o(i.drv_swire_register_callback) for drv_swire_register_callback + hal_swire.o(i.hal_swire_start) refers to drv_swire.o(i.drv_swire_set_int) for drv_swire_set_int + hal_swire.o(i.hal_swire_start) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_swire.o(i.hal_swire_start) refers to drv_swire.o(i.drv_swire_set_bit_time) for drv_swire_set_bit_time + hal_swire.o(i.hal_swire_start) refers to drv_swire.o(i.drv_swire_set_pulse_count) for drv_swire_set_pulse_count + hal_swire.o(i.hal_swire_start) refers to drv_common.o(.data) for g_system_clock + hal_system.o(i.hal_system_deep_sleep_mode) refers to drv_pwr.o(i.drv_pwr_enter_deep_sleep_mode) for drv_pwr_enter_deep_sleep_mode + hal_system.o(i.hal_system_disable_systick) refers to drv_common.o(i.drv_common_disable_systick) for drv_common_disable_systick + hal_system.o(i.hal_system_enable_systick) refers to drv_common.o(i.drv_common_enable_systick) for drv_common_enable_systick + hal_system.o(i.hal_system_flash_read) refers to norflash.o(i.norflash_init) for norflash_init + hal_system.o(i.hal_system_flash_read) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + hal_system.o(i.hal_system_flash_read) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_system.o(i.hal_system_flash_read) refers to norflash.o(i.norflash_dual_read) for norflash_dual_read + hal_system.o(i.hal_system_flash_write) refers to norflash.o(i.norflash_init) for norflash_init + hal_system.o(i.hal_system_flash_write) refers to norflash.o(i.norflash_erase_block) for norflash_erase_block + hal_system.o(i.hal_system_flash_write) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_system.o(i.hal_system_flash_write) refers to norflash.o(i.norflash_write) for norflash_write + hal_system.o(i.hal_system_get_tick) refers to drv_common.o(i.drv_common_get_tick) for drv_common_get_tick + hal_system.o(i.hal_system_idle_mode) refers to drv_common.o(i.drv_common_idle_mode) for drv_common_idle_mode + hal_system.o(i.hal_system_init) refers to drv_pwr.o(i.drv_pwr_set_system_clk_src) for drv_pwr_set_system_clk_src + hal_system.o(i.hal_system_init) refers to drv_crgu.o(i.drv_crgu_set_ahb_src) for drv_crgu_set_ahb_src + hal_system.o(i.hal_system_init) refers to drv_crgu.o(i.drv_crgu_set_ahb_pre_div) for drv_crgu_set_ahb_pre_div + hal_system.o(i.hal_system_init) refers to irq_redirect .o(i.handle_init) for handle_init + hal_system.o(i.hal_system_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_all_int) for drv_sys_cfg_clear_all_int + hal_system.o(i.hal_system_init) refers to drv_common.o(i.drv_common_system_init) for drv_common_system_init + hal_system.o(i.hal_system_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_system.o(i.hal_system_init) refers to drv_pwr.o(i.drv_pwr_set_pvd_mode) for drv_pwr_set_pvd_mode + hal_system.o(i.hal_system_init) refers to drv_common.o(.data) for g_system_clock + hal_system.o(i.hal_system_init_console) refers to hal_uart.o(i.hal_uart_init) for hal_uart_init + hal_system.o(i.hal_system_register_systick_cb) refers to drv_common.o(i.drv_common_systick_register_cb) for drv_common_systick_register_cb + hal_system.o(i.hal_system_set_pvd) refers to drv_pwr.o(i.drv_pwr_set_pvd_mode) for drv_pwr_set_pvd_mode + hal_system.o(i.hal_system_set_vcc) refers to drv_pwr.o(i.drv_pwr_set_cp_mode) for drv_pwr_set_cp_mode + hal_system.o(i.hal_system_share_flash_mode) refers to drv_fls.o(i.drv_fls_gpio_connect) for drv_fls_gpio_connect + hal_system.o(i.hal_system_share_flash_mode) refers to drv_fls.o(i.drv_fls_gpio_disconnect) for drv_fls_gpio_disconnect + hal_system.o(i.hal_system_sleep_mode) refers to drv_crgu.o(i.drv_crgu_config_clocks) for drv_crgu_config_clocks + hal_timer.o(i.hal_timer_deinit) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + hal_timer.o(i.hal_timer_deinit) refers to drv_timer.o(i.drv_timer_set_repeat) for drv_timer_set_repeat + hal_timer.o(i.hal_timer_deinit) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_timer.o(i.hal_timer_deinit) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_timer.o(i.hal_timer_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_timer.o(i.hal_timer_get_status) refers to drv_timer.o(i.drv_timer_get_status) for drv_timer_get_status + hal_timer.o(i.hal_timer_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_timer.o(i.hal_timer_init) refers to drv_timer.o(i.drv_timer_set_prescaler) for drv_timer_set_prescaler + hal_timer.o(i.hal_timer_set_repeat) refers to drv_timer.o(i.drv_timer_set_repeat) for drv_timer_set_repeat + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_register_callback) for drv_timer_register_callback + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_get_prescaler) for drv_timer_get_prescaler + hal_timer.o(i.hal_timer_start) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_set_compare_val) for drv_timer_set_compare_val + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_timer.o(i.hal_timer_start) refers to drv_common.o(.data) for g_system_clock + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_register_callback) for drv_timer_register_callback + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_get_prescaler) for drv_timer_get_prescaler + hal_timer.o(i.hal_timer_start_ex) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_set_compare_val) for drv_timer_set_compare_val + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_timer.o(i.hal_timer_start_ex) refers to drv_common.o(.data) for g_system_clock + hal_timer.o(i.hal_timer_stop) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_timer.o(i.hal_timer_stop) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + hal_timer.o(i.hal_timer_stop) refers to drv_timer.o(i.drv_timer_register_callback) for drv_timer_register_callback + hal_timer.o(i.hal_timer_stop) refers to drv_timer.o(i.drv_timer_set_compare_val) for drv_timer_set_compare_val + tau_delay.o(i.delayMs) refers to tau_delay.o(i.delayUs) for delayUs + tau_log.o(i.LOG_printf) refers to printfa.o(i.__0vsprintf) for vsprintf + tau_log.o(i.LOG_printf) refers to printfa.o(i.__0printf) for __2printf + tau_log.o(i.LOG_printf) refers to tau_log.o(.bss) for .bss + tau_log.o(i.fgetc) refers to hal_uart.o(i.hal_uart_receive_blocking) for hal_uart_receive_blocking + tau_log.o(i.fputc) refers to hal_uart.o(i.hal_uart_transmit_blocking) for hal_uart_transmit_blocking + norflash.o(i.app_fls_ctrl_Handler) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + norflash.o(i.app_fls_ctrl_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + norflash.o(i.app_fls_ctrl_Handler) refers to norflash.o(.data) for .data + norflash.o(i.norflash_best_cfg_init) refers to drv_fls.o(i.fls_spi_init) for fls_spi_init + norflash.o(i.norflash_best_cfg_init) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_check_id) refers to norflash.o(i.norflash_read_id) for norflash_read_id + norflash.o(i.norflash_check_id) refers to tau_delay.o(i.delayUs) for delayUs + norflash.o(i.norflash_check_id) refers to norflash.o(.data) for .data + norflash.o(i.norflash_dma_callback) refers to norflash.o(.data) for .data + norflash.o(i.norflash_dma_read) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + norflash.o(i.norflash_dma_read) refers to drv_fls_dma.o(i.fls_transfer_create_handle_dma) for fls_transfer_create_handle_dma + norflash.o(i.norflash_dma_read) refers to drv_fls_dma.o(i.fls_dma_read_prepare) for fls_dma_read_prepare + norflash.o(i.norflash_dma_read) refers to drv_fls_dma.o(i.fls_transfer_dma) for fls_transfer_dma + norflash.o(i.norflash_dma_read) refers to drv_fls_dma.o(i.fls_dma_disable) for fls_dma_disable + norflash.o(i.norflash_dma_read) refers to norflash.o(.data) for .data + norflash.o(i.norflash_dma_read) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_dma_read) refers to norflash.o(i.norflash_dma_callback) for norflash_dma_callback + norflash.o(i.norflash_dma_write) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + norflash.o(i.norflash_dma_write) refers to drv_fls_dma.o(i.fls_transfer_create_handle_dma) for fls_transfer_create_handle_dma + norflash.o(i.norflash_dma_write) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_dma_write) refers to norflash.o(i.norflash_switch_fls_spi) for norflash_switch_fls_spi + norflash.o(i.norflash_dma_write) refers to drv_fls_dma.o(i.fls_dma_write_prepare) for fls_dma_write_prepare + norflash.o(i.norflash_dma_write) refers to drv_fls_dma.o(i.fls_transfer_dma) for fls_transfer_dma + norflash.o(i.norflash_dma_write) refers to drv_fls_dma.o(i.fls_dma_disable) for fls_dma_disable + norflash.o(i.norflash_dma_write) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_dma_write) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_dma_write) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_dma_write) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_dma_write) refers to norflash.o(i.norflash_dma_callback) for norflash_dma_callback + norflash.o(i.norflash_dma_write) refers to norflash.o(.data) for .data + norflash.o(i.norflash_dual_read) refers to drv_fls.o(i.fls_ddat_enable) for fls_ddat_enable + norflash.o(i.norflash_dual_read) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_dual_read) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_dual_write) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_dual_write) refers to norflash.o(i.norflash_switch_fls_spi) for norflash_switch_fls_spi + norflash.o(i.norflash_dual_write) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_dual_write) refers to drv_fls.o(i.fls_ddat_enable) for fls_ddat_enable + norflash.o(i.norflash_dual_write) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_dual_write) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_en4b) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_en4b) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + norflash.o(i.norflash_en4b) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_en4b) refers to norflash.o(i.norflash_read_config_reg) for norflash_read_config_reg + norflash.o(i.norflash_en4b) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_en_quad) refers to norflash.o(i.norflash_en_quad_check) for norflash_en_quad_check + norflash.o(i.norflash_en_quad) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_en_quad) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_en_quad) refers to drv_fls.o(i.fls_busy_pending) for fls_busy_pending + norflash.o(i.norflash_en_quad) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_en_quad_check) refers to norflash.o(i.norflash_get_dual_hstatus) for norflash_get_dual_hstatus + norflash.o(i.norflash_en_quad_check) refers to norflash.o(i.norflash_get_hstatus) for norflash_get_hstatus + norflash.o(i.norflash_en_quad_check) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_en_quad_check) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_erase_block) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_erase_block) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_erase_block) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_erase_block) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_erase_chip) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_erase_chip) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + norflash.o(i.norflash_erase_chip) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_erase_sector) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_erase_sector) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_erase_sector) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_erase_sector) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_ex4b) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_ex4b) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + norflash.o(i.norflash_ex4b) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_ex4b) refers to norflash.o(i.norflash_read_config_reg) for norflash_read_config_reg + norflash.o(i.norflash_ex4b) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_exit_quad) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_exit_quad) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_exit_quad) refers to norflash.o(i.norflash_en_quad_check) for norflash_en_quad_check + norflash.o(i.norflash_exit_quad) refers to drv_fls.o(i.fls_busy_pending) for fls_busy_pending + norflash.o(i.norflash_exit_quad) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_get_dual_hstatus) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_get_dual_hstatus) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_get_dual_hstatus) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_get_hstatus) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_get_hstatus) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_get_hstatus) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_get_status) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_get_status) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_get_status) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_init) refers to drv_fls.o(i.fls_get_default_spi_config) for fls_get_default_spi_config + norflash.o(i.norflash_init) refers to drv_fls.o(i.fls_get_default_fls_config) for fls_get_default_fls_config + norflash.o(i.norflash_init) refers to drv_fls.o(i.fls_get_default_tuning) for fls_get_default_tuning + norflash.o(i.norflash_init) refers to drv_fls.o(i.fls_init) for fls_init + norflash.o(i.norflash_init) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_init) refers to drv_fls.o(.data) for g_fls_tuning + norflash.o(i.norflash_quad_read) refers to drv_fls.o(i.fls_qdat_enable) for fls_qdat_enable + norflash.o(i.norflash_quad_read) refers to drv_fls.o(i.fls_qadr_enable) for fls_qadr_enable + norflash.o(i.norflash_quad_read) refers to drv_fls.o(i.fls_qcmd_enable) for fls_qcmd_enable + norflash.o(i.norflash_quad_read) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_quad_read) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_quad_write) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_quad_write) refers to norflash.o(i.norflash_switch_fls_spi) for norflash_switch_fls_spi + norflash.o(i.norflash_quad_write) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_quad_write) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_quad_write) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_quad_write) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_read) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_read_config_reg) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_read_id) refers to drv_fls.o(i.fls_read_cmd) for fls_read_cmd + norflash.o(i.norflash_set_best_cfg) refers to memseta.o(.text) for __aeabi_memclr4 + norflash.o(i.norflash_set_best_read_cfg) refers to norflash.o(i.norflash_en_quad) for norflash_en_quad + norflash.o(i.norflash_set_best_read_cfg) refers to norflash.o(.data) for .data + norflash.o(i.norflash_set_best_read_cfg) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_set_best_write_cfg) refers to norflash.o(i.norflash_en_quad) for norflash_en_quad + norflash.o(i.norflash_set_best_write_cfg) refers to norflash.o(.data) for .data + norflash.o(i.norflash_set_best_write_cfg) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_switch_fls_spi) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_switch_fls_spi) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_switch_fls_spi) refers to drv_fls.o(i.fls_ddat_enable) for fls_ddat_enable + norflash.o(i.norflash_switch_fls_spi) refers to drv_fls.o(i.fls_qdat_enable) for fls_qdat_enable + norflash.o(i.norflash_switch_fls_spi) refers to drv_fls.o(i.fls_qadr_enable) for fls_qadr_enable + norflash.o(i.norflash_write) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_write) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_write) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_write) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_write_disable) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + norflash.o(i.norflash_write_disable) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_write_disable) refers to norflash.o(.data) for .data + norflash.o(i.norflash_write_disable) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_write_enable) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + norflash.o(i.norflash_write_enable) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_write_enable) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_write_enable) refers to norflash.o(.data) for .data + norflash.o(i.norflash_write_endian_scr) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_write_endian_scr) refers to norflash.o(i.norflash_big_end_enable) for norflash_big_end_enable + norflash.o(i.norflash_write_endian_scr) refers to drv_fls.o(i.fls_en_scr) for fls_en_scr + norflash.o(i.norflash_write_endian_scr) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_write_endian_scr) refers to norflash.o(i.norflash_big_end_clear) for norflash_big_end_clear + norflash.o(i.norflash_write_endian_scr) refers to drv_fls.o(i.fls_scr_clear) for fls_scr_clear + norflash.o(i.norflash_write_endian_scr) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_write_endian_scr) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + hal_uart.o(i.hal_uart_deinit) refers to drv_dma.o(i.drv_dma_deinit) for drv_dma_deinit + hal_uart.o(i.hal_uart_deinit) refers to drv_uart.o(i.UART_Deinit) for UART_Deinit + hal_uart.o(i.hal_uart_dmacallback) refers to hal_uart.o(.bss) for .bss + hal_uart.o(i.hal_uart_init) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_uart.o(i.hal_uart_init) refers to memseta.o(.text) for __aeabi_memclr4 + hal_uart.o(i.hal_uart_init) refers to drv_uart.o(i.UART_init) for UART_init + hal_uart.o(i.hal_uart_init) refers to drv_common.o(.data) for g_system_clock + hal_uart.o(i.hal_uart_init) refers to hal_uart.o(.bss) for .bss + hal_uart.o(i.hal_uart_receive_blocking) refers to drv_uart.o(i.UART_ReadBlocking) for UART_ReadBlocking + hal_uart.o(i.hal_uart_receive_dma) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + hal_uart.o(i.hal_uart_receive_dma) refers to drv_uart_dma.o(i.UART_TransferCreateHandleDMA) for UART_TransferCreateHandleDMA + hal_uart.o(i.hal_uart_receive_dma) refers to drv_uart_dma.o(i.UART_TransferReceiveDMA) for UART_TransferReceiveDMA + hal_uart.o(i.hal_uart_receive_dma) refers to hal_uart.o(.bss) for .bss + hal_uart.o(i.hal_uart_receive_dma) refers to hal_uart.o(i.hal_uart_dmacallback) for hal_uart_dmacallback + hal_uart.o(i.hal_uart_transmit_blocking) refers to drv_uart.o(i.UART_WriteBlocking) for UART_WriteBlocking + hal_uart.o(i.hal_uart_transmit_dma) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + hal_uart.o(i.hal_uart_transmit_dma) refers to drv_uart_dma.o(i.UART_TransferCreateHandleDMA) for UART_TransferCreateHandleDMA + hal_uart.o(i.hal_uart_transmit_dma) refers to drv_uart_dma.o(i.UART_TransferSendDMA) for UART_TransferSendDMA + hal_uart.o(i.hal_uart_transmit_dma) refers to hal_uart.o(.bss) for .bss + hal_uart.o(i.hal_uart_transmit_dma) refers to hal_uart.o(i.hal_uart_dmacallback) for hal_uart_dmacallback + drv_common.o(i.app_HardFault_Handler) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_common.o(i.app_SysTick_Handler) refers to drv_common.o(.data) for .data + drv_common.o(i.drv_common_enable_systick) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_common.o(i.drv_common_enable_systick) refers to drv_common.o(.data) for .data + drv_common.o(i.drv_common_get_tick) refers to drv_common.o(.data) for .data + drv_common.o(i.drv_common_system_init) refers to drv_chip_info.o(i.drv_chip_info_init) for drv_chip_info_init + drv_common.o(i.drv_common_system_init) refers to drv_chip_info.o(i.drv_chip_info_get_version) for drv_chip_info_get_version + drv_common.o(i.drv_common_systick_register_cb) refers to drv_common.o(.data) for .data + drv_dma.o(i.app_dma_irq_handler) refers to drv_dma.o(i.drv_dma_irq_handler) for drv_dma_irq_handler + drv_dma.o(i.drv_dma_abort_transfer) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + drv_dma.o(i.drv_dma_abort_transfer) refers to drv_dma.o(i.drv_dma_disenable_channel_interrupts) for drv_dma_disenable_channel_interrupts + drv_dma.o(i.drv_dma_ahb_init) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + drv_dma.o(i.drv_dma_ahb_init) refers to drv_dma.o(i.drv_dma_disenable_channel_interrupts) for drv_dma_disenable_channel_interrupts + drv_dma.o(i.drv_dma_ahb_init) refers to drv_dma.o(i.drv_dma_clear_flag) for drv_dma_clear_flag + drv_dma.o(i.drv_dma_ahb_init) refers to drv_dma.o(i.drv_dma_set_ccr) for drv_dma_set_ccr + drv_dma.o(i.drv_dma_ahb_init) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_dma.o(i.drv_dma_clear_flag) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dma.o(i.drv_dma_create_handle) refers to drv_dma.o(.bss) for .bss + drv_dma.o(i.drv_dma_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_dma.o(i.drv_dma_disenable_channel_interrupts) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dma.o(i.drv_dma_enable_channel_interrupts) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_dma.o(i.drv_dma_enable_cycle) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + drv_dma.o(i.drv_dma_get_remaining_bytes) refers to drv_dma.o(i.drv_dma_channel_is_active) for drv_dma_channel_is_active + drv_dma.o(i.drv_dma_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_dma.o(i.drv_dma_init) refers to drv_dma.o(i.drv_dma_ahb_init) for drv_dma_ahb_init + drv_dma.o(i.drv_dma_irq_handler) refers to drv_dma.o(i.drv_dma_get_channel_flag) for drv_dma_get_channel_flag + drv_dma.o(i.drv_dma_irq_handler) refers to drv_dma.o(i.drv_dma_clear_flag) for drv_dma_clear_flag + drv_dma.o(i.drv_dma_irq_handler) refers to drv_dma.o(.bss) for .bss + drv_dma.o(i.drv_dma_m2m_init) refers to memseta.o(.text) for __aeabi_memclr4 + drv_dma.o(i.drv_dma_m2m_init) refers to drv_dma.o(i.drv_dma_init) for drv_dma_init + drv_dma.o(i.drv_dma_reset) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + drv_dma.o(i.drv_dma_set_burst) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + drv_dma.o(i.drv_dma_set_transfer) refers to drv_dma.o(i.drv_dma_set_burst) for drv_dma_set_burst + drv_dma.o(i.drv_dma_start_transfer) refers to drv_dma.o(i.drv_dma_enable_channel_interrupts) for drv_dma_enable_channel_interrupts + drv_dma.o(i.drv_dma_start_transfer) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_fls.o(i.drv_fls_gpio_connect) refers to drv_fls.o(i.drv_fls_gpio_disconnect) for drv_fls_gpio_disconnect + drv_fls.o(i.drv_fls_gpio_disconnect) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_fls.o(i.fls_EnableClk) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_fls.o(i.fls_busy_pending) refers to norflash.o(i.norflash_get_status) for norflash_get_status + drv_fls.o(i.fls_de_init) refers to drv_fls_dma.o(i.fls_dma_disable) for fls_dma_disable + drv_fls.o(i.fls_de_init) refers to drv_dma.o(i.drv_dma_clear_flag) for drv_dma_clear_flag + drv_fls.o(i.fls_de_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_fls.o(i.fls_disable_it) refers to drv_fls.o(i.__NVIC_DisableIRQ) for __NVIC_DisableIRQ + drv_fls.o(i.fls_disable_it) refers to drv_fls.o(i.fls_set_irq_mask) for fls_set_irq_mask + drv_fls.o(i.fls_enable_it) refers to drv_fls.o(i.__NVIC_DisableIRQ) for __NVIC_DisableIRQ + drv_fls.o(i.fls_enable_it) refers to drv_fls.o(i.fls_set_irq_mask) for fls_set_irq_mask + drv_fls.o(i.fls_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_fls.o(i.fls_init) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + drv_fls.o(i.fls_init) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_init) refers to drv_fls.o(i.fls_spi_init) for fls_spi_init + drv_fls.o(i.fls_init) refers to drv_fls.o(i.fls_ctrl_cfg_init) for fls_ctrl_cfg_init + drv_fls.o(i.fls_init) refers to drv_fls.o(i.fls_set_tuning) for fls_set_tuning + drv_fls.o(i.fls_init) refers to drv_fls_dma.o(i.fls_dma_disable) for fls_dma_disable + drv_fls.o(i.fls_read_byte_data) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_read_byte_data) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls.o(i.fls_read_byte_data) refers to drv_fls.o(i.fls_set_read) for fls_set_read + drv_fls.o(i.fls_read_byte_data) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls.o(i.fls_read_cmd) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_read_cmd) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls.o(i.fls_read_cmd) refers to drv_fls.o(i.fls_set_read) for fls_set_read + drv_fls.o(i.fls_read_cmd) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls.o(i.fls_read_cmd_it) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_read_cmd_it) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls.o(i.fls_read_cmd_it) refers to drv_fls.o(i.fls_set_read) for fls_set_read + drv_fls.o(i.fls_read_cmd_it) refers to drv_fls.o(i.fls_enable_it) for fls_enable_it + drv_fls.o(i.fls_read_cmd_it) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls.o(i.fls_set_irq_mask) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_fls.o(i.fls_set_irq_mask) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_fls.o(i.fls_write_byte_data) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_write_byte_data) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls.o(i.fls_write_byte_data) refers to drv_fls.o(i.fls_set_write) for fls_set_write + drv_fls.o(i.fls_write_byte_data) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls.o(i.fls_write_cmd) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_write_cmd) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls.o(i.fls_write_cmd) refers to drv_fls.o(i.fls_set_write) for fls_set_write + drv_fls.o(i.fls_write_cmd) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) for drv_ap_rst_trig_edge_detect + drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) refers to drv_gpio.o(.data) for .data + drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.drv_gpio_get_pull_state) refers to ap_demo.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_gpio.o(i.drv_gpio_register_ap_reset_callback) refers to drv_gpio.o(.data) for .data + drv_gpio.o(i.drv_gpio_register_callback) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.drv_gpio_set_driving_strength) refers to ap_demo.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_gpio.o(i.drv_gpio_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_gpio.o(i.drv_gpio_set_pull_state) refers to ap_demo.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_gpio.o(i.drv_gpio_set_schmitt_trigger) refers to ap_demo.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_gpio.o(i.drv_gpio_set_slew_rate) refers to ap_demo.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_i2c_dma.o(i.drv_i2c_dma_callback) refers to drv_i2c_dma.o(.data) for .data + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) for drv_sys_cfg_set_dma_rx_req + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_dma.o(i.drv_dma_set_transfer) for drv_dma_set_transfer + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_i2c_dma.o(i.drv_i2c_master_write_read_cmd) for drv_i2c_master_write_read_cmd + drv_i2c_dma.o(i.drv_i2c_master_write_dma) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) for drv_sys_cfg_set_dma_tx_req + drv_i2c_dma.o(i.drv_i2c_master_write_dma) refers to drv_dma.o(i.drv_dma_set_transfer) for drv_dma_set_transfer + drv_i2c_dma.o(i.drv_i2c_master_write_dma) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_i2c_dma.o(i.drv_i2c_master_write_dma) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) refers to drv_dma.o(i.drv_dma_set_callback) for drv_dma_set_callback + drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) refers to drv_i2c_dma.o(.data) for .data + drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) refers to drv_i2c_dma.o(.bss) for .bss + drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) refers to drv_i2c_dma.o(i.drv_i2c_dma_callback) for drv_i2c_dma_callback + drv_i2c_dma.o(i.drv_i2c_slave_write_dma) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_i2c_master.o(i.app_I2C1_IRQn_Handler) refers to drv_i2c_master.o(.data) for .data + drv_i2c_master.o(i.drv_i2c_clear_m_it_pending_bit) refers to ap_demo.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_i2c_master.o(i.drv_i2c_clear_m_it_pending_bit) refers to drv_i2c_master.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_i2c_master.o(i.drv_i2c_m_enable_intr) refers to drv_i2c_master.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_i2c_master.o(i.drv_i2c_m_read_data) refers to drv_i2c_master.o(i.drv_i2c_m_get_fifo_status) for drv_i2c_m_get_fifo_status + drv_i2c_master.o(i.drv_i2c_m_set_callback) refers to drv_i2c_master.o(.data) for .data + drv_i2c_master.o(i.drv_i2c_m_set_sys_mask) refers to drv_i2c_master.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_i2c_master.o(i.drv_i2c_m_write_data) refers to drv_i2c_master.o(i.drv_i2c_m_get_fifo_status) for drv_i2c_m_get_fifo_status + drv_i2c_master.o(i.drv_i2c_master_init) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_i2c_master.o(i.drv_i2c_master_init) refers to drv_common.o(.data) for g_system_clock + drv_i2c_slave.o(i.app_I2C0_IRQn_Handler) refers to drv_i2c_slave.o(.data) for .data + drv_i2c_slave.o(i.drv_i2c_clear_s_it_pending_bit) refers to ap_demo.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_i2c_slave.o(i.drv_i2c_clear_s_it_pending_bit) refers to drv_i2c_slave.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_i2c_slave.o(i.drv_i2c_s_enable_intr) refers to drv_i2c_slave.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_i2c_slave.o(i.drv_i2c_s_get_tx_byte_num) refers to drv_i2c_slave.o(.data) for .data + drv_i2c_slave.o(i.drv_i2c_s_read_data) refers to drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) for drv_i2c_s_get_fifo_status + drv_i2c_slave.o(i.drv_i2c_s_set_callback) refers to drv_i2c_slave.o(.data) for .data + drv_i2c_slave.o(i.drv_i2c_s_set_sys_mask) refers to drv_i2c_slave.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_i2c_slave.o(i.drv_i2c_s_write_data) refers to drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) for drv_i2c_s_get_fifo_status + drv_param_init.o(i.drv_param_get_picture_quality_setting) refers to memcpya.o(.text) for __aeabi_memcpy4 + drv_param_init.o(i.drv_param_get_picture_quality_setting) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_get_ccm) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_get_scld_filter_h) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_get_scld_filter_v) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_get_sclu_filter_h) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_get_sclu_filter_v) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_set_ccm) refers to memcpya.o(.text) for __aeabi_memcpy4 + drv_param_init.o(i.drv_param_init_set_ccm) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_set_scld_filter) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_set_sclu_filter) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_p2r_filter_init) refers to memcpya.o(.text) for __aeabi_memcpy4 + drv_param_init.o(i.drv_param_p2r_filter_init) refers to drv_param_init.o(.constdata) for .constdata + drv_param_init.o(i.drv_param_set_enh_chr) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_set_enh_chr2) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_set_enh_lum) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_set_gain) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_yuv420_filter_init) refers to drv_param_init.o(.constdata) for .constdata + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_dma.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_dma.o(.bss) for .bss + drv_spi_dma.o(i.drv_spi_dma_callback) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_dma_init) refers to drv_spi_dma.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) refers to drv_dma.o(i.drv_dma_set_callback) for drv_dma_set_callback + drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) refers to drv_spi_dma.o(.bss) for .bss + drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) refers to drv_spi_dma.o(i.drv_spi_dma_callback) for drv_spi_dma_callback + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) for drv_sys_cfg_set_dma_rx_req + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_dma.o(i.drv_dma_set_transfer) for drv_dma_set_transfer + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_dma.o(i.drv_dma_start_transfer) for drv_dma_start_transfer + drv_spi_dma.o(i.drv_spim_dma_read) refers to ap_demo.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_spi_dma.o(.bss) for .bss + drv_spi_dma.o(i.drv_spim_dma_write) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) for drv_sys_cfg_set_dma_tx_req + drv_spi_dma.o(i.drv_spim_dma_write) refers to drv_dma.o(i.drv_dma_set_transfer) for drv_dma_set_transfer + drv_spi_dma.o(i.drv_spim_dma_write) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_spi_dma.o(i.drv_spim_dma_write) refers to drv_dma.o(i.drv_dma_start_transfer) for drv_dma_start_transfer + drv_spi_dma.o(i.drv_spim_dma_write) refers to drv_spi_dma.o(.bss) for .bss + drv_spi_dma.o(i.drv_spis_dma_write) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_spi_dma.o(i.drv_spis_dma_write) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_spi_dma.o(i.drv_spis_dma_write) refers to drv_spi_dma.o(.bss) for .bss + drv_spi_master.o(i.app_SPIM_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_spi_master.o(i.app_SPIM_IRQn_Handler) refers to drv_spi_master.o(.data) for .data + drv_spi_master.o(i.drv_spi_m_disable_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_spi_master.o(i.drv_spi_m_disable_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_spi_master.o(i.drv_spi_m_enable_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_spi_master.o(i.drv_spi_m_set_intr_callback) refers to drv_spi_master.o(.data) for .data + drv_spi_master.o(i.drv_spi_master_init) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_spi_master.o(i.drv_spi_master_init) refers to drv_common.o(.data) for g_system_clock + drv_swire.o(i.app_SWIRE_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_swire.o(i.app_SWIRE_IRQn_Handler) refers to drv_swire.o(i.drv_swire_set_int) for drv_swire_set_int + drv_swire.o(i.app_SWIRE_IRQn_Handler) refers to drv_swire.o(.data) for .data + drv_swire.o(i.drv_swire_register_callback) refers to drv_swire.o(.data) for .data + drv_swire.o(i.drv_swire_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_lvl_trig) for drv_sys_cfg_sel_ap_rst_lvl_trig + drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) refers to drv_sys_cfg.o(.data) for .data + drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_lvl_trig) for drv_sys_cfg_sel_ap_rst_lvl_trig + drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) refers to drv_sys_cfg.o(.data) for .data + drv_timer.o(i.app_TIMER0_IRQn_Handler) refers to drv_timer.o(i.drv_timer_handle_interrupt) for drv_timer_handle_interrupt + drv_timer.o(i.app_TIMER1_IRQn_Handler) refers to drv_timer.o(i.drv_timer_handle_interrupt) for drv_timer_handle_interrupt + drv_timer.o(i.app_TIMER2_IRQn_Handler) refers to drv_timer.o(i.drv_timer_handle_interrupt) for drv_timer_handle_interrupt + drv_timer.o(i.app_TIMER3_IRQn_Handler) refers to drv_timer.o(i.drv_timer_handle_interrupt) for drv_timer_handle_interrupt + drv_timer.o(i.drv_timer_clear_status_flags) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_clear_status_flags) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_timer.o(i.drv_timer_enable) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_get_instance) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_get_prescaler) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_get_status) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(i.drv_timer_clear_status_flags) for drv_timer_clear_status_flags + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(i.drv_timer_set_compare_val) for drv_timer_set_compare_val + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_register_callback) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_set_compare_val) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_timer.o(i.drv_timer_set_prescaler) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_set_prescaler) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_set_repeat) refers to drv_timer.o(.data) for .data + dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) refers to dcs_packet_fifo.o(.bss) for .bss + dcs_packet_fifo.o(i.dcs_packet_fifo_init) refers to dcs_packet_fifo.o(.bss) for .bss + dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) refers to dcs_packet_fifo.o(.bss) for .bss + dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) refers to dcs_packet_fifo.o(.bss) for .bss + dcs_packet_fifo.o(i.dcs_packet_get_fifo_size) refers to dcs_packet_fifo.o(.bss) for .bss + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to hal_internal_vsync.o(i.soft_gen_te) for soft_gen_te + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_param_init.o(i.drv_param_init_get_ccm) for drv_param_init_get_ccm + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_lcdc.o(i.drv_lcdc_config_ccm) for drv_lcdc_config_ccm + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_internal_vsync.o(i.app_VIDC_IRQn_Handler) refers to drv_vidc.o(i.drv_vidc_get_int_source) for drv_vidc_get_int_source + hal_internal_vsync.o(i.app_VIDC_IRQn_Handler) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite) for drv_lcdc_config_overwrite + hal_internal_vsync.o(i.app_VIDC_IRQn_Handler) refers to drv_vidc.o(i.drv_vidc_clear_irq) for drv_vidc_clear_irq + hal_internal_vsync.o(i.app_VIDC_IRQn_Handler) refers to drv_vidc.o(i.drv_vidc_set_irqen) for drv_vidc_set_irqen + hal_internal_vsync.o(i.app_VIDC_IRQn_Handler) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.app_VIDC_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_internal_vsync.o(i.app_VIDC_IRQn_Handler) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.app_VIDC_IRQn_Handler) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.app_VPRE_IRQn_Handler) refers to hal_internal_vsync.o(i.drv_rxbr_get_int_source) for drv_rxbr_get_int_source + hal_internal_vsync.o(i.app_VPRE_IRQn_Handler) refers to hal_internal_vsync.o(i.rx_receive_packet) for rx_receive_packet + hal_internal_vsync.o(i.app_VPRE_IRQn_Handler) refers to drv_rxbr.o(i.drv_rxbr_clear_status) for drv_rxbr_clear_status + hal_internal_vsync.o(i.app_VPRE_IRQn_Handler) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.app_VPRE_IRQn_Handler) refers to hal_internal_vsync.o(i.vpre_err_reset) for vpre_err_reset + hal_internal_vsync.o(i.app_VPRE_IRQn_Handler) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_internal_vsync.o(i.app_VPRE_IRQn_Handler) refers to hal_internal_vsync.o(i.drv_rxbr_get_status) for drv_rxbr_get_status + hal_internal_vsync.o(i.app_VPRE_IRQn_Handler) refers to drv_rxbr.o(i.drv_rxbr_get_cur_hline_rcv_cnt) for drv_rxbr_get_cur_hline_rcv_cnt + hal_internal_vsync.o(i.app_VPRE_IRQn_Handler) refers to drv_rxbr.o(i.drv_rxbr_get_hline_rcv_cfg) for drv_rxbr_get_hline_rcv_cfg + hal_internal_vsync.o(i.app_VPRE_IRQn_Handler) refers to drv_lcdc.o(i.drv_lcdc_update_shadow_reg) for drv_lcdc_update_shadow_reg + hal_internal_vsync.o(i.app_VPRE_IRQn_Handler) refers to drv_lcdc.o(i.drv_lcdc_start) for drv_lcdc_start + hal_internal_vsync.o(i.app_VPRE_IRQn_Handler) refers to drv_memc.o(i.drv_memc_set_data_mode) for drv_memc_set_data_mode + hal_internal_vsync.o(i.app_VPRE_IRQn_Handler) refers to hal_internal_vsync.o(i.rx_partial_update) for rx_partial_update + hal_internal_vsync.o(i.app_VPRE_IRQn_Handler) refers to drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) for drv_rxbr_clear_pkt_buffer + hal_internal_vsync.o(i.app_VPRE_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_internal_vsync.o(i.app_VPRE_IRQn_Handler) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.app_VPRE_IRQn_Handler) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual) for hal_internal_sync_set_fb_setting_manual + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.check_pkt_buf_rev) refers to hal_internal_vsync.o(i.drv_rxbr_get_status) for drv_rxbr_get_status + hal_internal_vsync.o(i.dcs_sw_filter) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_data_mode) for drv_memc_set_data_mode + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_tear_waveform) for drv_memc_set_tear_waveform + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_tear_hwclr) for drv_memc_set_tear_hwclr + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_yuv420_cfg) for drv_memc_set_yuv420_cfg + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_bypass_fifo_empty) for drv_memc_bypass_fifo_empty + hal_internal_vsync.o(i.hal_internal_init_memc) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_init_memc) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(i.calc_framebuffer_setting) for calc_framebuffer_setting + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_vidc.o(i.drv_vidc_reset) for drv_vidc_reset + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) for hal_dsi_rx_ctrl_init + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) for hal_dsi_tx_ctrl_init + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) for hal_dsi_rx_ctrl_start + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_rxbr.o(i.drv_rxbr_clear_status) for drv_rxbr_clear_status + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) for hal_dsi_rx_ctrl_gen_a_tear_signal + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to tau_delay.o(i.delayUs) for delayUs + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_dsi_tx.o(i.drv_dsi_tx_shutdown) for drv_dsi_tx_shutdown + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_crgu.o(i.drv_crgu_config_reset_modules) for drv_crgu_config_reset_modules + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(i.hal_internal_init_memc) for hal_internal_init_memc + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) for hal_dsi_tx_ctrl_start + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_deinit) refers to memseta.o(.text) for __aeabi_memclr4 + hal_internal_vsync.o(i.hal_internal_vsync_deinit) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_get_y2t4_use_sclu) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to drv_chip_info.o(i.drv_chip_rx_info_check) for drv_chip_rx_info_check + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) for check_mipi_rx_tx_video_info + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.calc_framebuffer_setting) for calc_framebuffer_setting + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to dcs_packet_fifo.o(i.dcs_packet_fifo_init) for dcs_packet_fifo_init + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) for check_mipi_rx_tx_video_info + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to hal_internal_vsync.o(i.calc_framebuffer_setting) for calc_framebuffer_setting + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) refers to drv_rxbr.o(i.drv_rxbr_set_cmd_filter) for drv_rxbr_set_cmd_filter + hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_dcs_direct_mode) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) for hal_internal_vsync_set_auto_hw_filter + hal_internal_vsync.o(i.hal_internal_vsync_set_dcs_direct_mode) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) refers to hal_internal_vsync.o(i.hal_internal_vsync_deinit) for hal_internal_vsync_deinit + hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to hal_internal_vsync.o(i.vsync_set_te_mode) for vsync_set_te_mode + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to hal_internal_vsync.o(i.hal_internal_vsync_deinit) for hal_internal_vsync_deinit + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite) for drv_lcdc_config_overwrite + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to hal_internal_vsync.o(i.vsync_set_te_mode) for vsync_set_te_mode + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to hal_internal_vsync.o(i.dcs_sw_filter) for dcs_sw_filter + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) for dcs_packet_fifo_alloc + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) for hal_dsi_rx_ctrl_dsc_async_handler + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_header) for drv_dsi_tx_command_header + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to hal_internal_vsync.o(i.check_pkt_buf_rev) for check_pkt_buf_rev + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) for drv_dsi_tx_command_put_payload + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rx_partial_update) refers to drv_rxbr.o(i.drv_rxbr_get_col_addr) for drv_rxbr_get_col_addr + hal_internal_vsync.o(i.rx_partial_update) refers to drv_rxbr.o(i.drv_rxbr_get_page_addr) for drv_rxbr_get_page_addr + hal_internal_vsync.o(i.rx_partial_update) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.rx_partial_update) refers to drv_dsc_dec.o(i.drv_dsc_dec_get_nslc) for drv_dsc_dec_get_nslc + hal_internal_vsync.o(i.rx_partial_update) refers to drv_crgu.o(i.drv_crgu_set_dsco_src) for drv_crgu_set_dsco_src + hal_internal_vsync.o(i.rx_partial_update) refers to drv_crgu.o(i.drv_crgu_set_dsco_src_div) for drv_crgu_set_dsco_src_div + hal_internal_vsync.o(i.rx_partial_update) refers to drv_crgu.o(i.drv_crgu_set_dsc_core_div) for drv_crgu_set_dsc_core_div + hal_internal_vsync.o(i.rx_partial_update) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rx_receive_packet) refers to hal_internal_vsync.o(i.rx_get_dcs_packet_data) for rx_get_dcs_packet_data + hal_internal_vsync.o(i.rx_receive_packet) refers to hal_internal_vsync.o(i.rx_receive_pps) for rx_receive_pps + hal_internal_vsync.o(i.rx_receive_packet) refers to hal_internal_vsync.o(i.drv_rxbr_get_status) for drv_rxbr_get_status + hal_internal_vsync.o(i.rx_receive_packet) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rx_receive_pps) refers to memseta.o(.text) for __aeabi_memclr4 + hal_internal_vsync.o(i.rx_receive_pps) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.rx_receive_pps) refers to drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) for drv_rxbr_clear_pkt_buffer + hal_internal_vsync.o(i.rx_receive_pps) refers to hal_internal_vsync.o(i.check_pkt_buf_rev) for check_pkt_buf_rev + hal_internal_vsync.o(i.rx_receive_pps) refers to drv_dsc_dec.o(i.drv_dsc_dec_convert_pps_rc_parameter) for drv_dsc_dec_convert_pps_rc_parameter + hal_internal_vsync.o(i.rx_receive_pps) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.rx_receive_pps) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) for drv_dsi_rx_get_compression_en + hal_internal_vsync.o(i.rx_receive_pps) refers to drv_dsc_dec.o(i.drv_dsc_dec_enable) for drv_dsc_dec_enable + hal_internal_vsync.o(i.rx_receive_pps) refers to drv_dsc_dec.o(i.drv_dsc_dec_set_u8_pps) for drv_dsc_dec_set_u8_pps + hal_internal_vsync.o(i.rx_receive_pps) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.rx_receive_pps) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.soft_gen_te) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.soft_gen_te) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.vpre_err_reset) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_internal_vsync.o(i.vpre_err_reset) refers to drv_vidc.o(i.drv_vidc_reset) for drv_vidc_reset + hal_internal_vsync.o(i.vpre_err_reset) refers to drv_dsc_dec.o(i.drv_dsc_dec_set_u8_pps) for drv_dsc_dec_set_u8_pps + hal_internal_vsync.o(i.vpre_err_reset) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.vsync_set_te_mode) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_internal_vsync.o(i.vsync_set_te_mode) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_internal_vsync.o(i.vsync_set_te_mode) refers to drv_lcdc.o(i.drv_lcdc_ctrl_flow) for drv_lcdc_ctrl_flow + hal_internal_vsync.o(i.vsync_set_te_mode) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.vsync_set_te_mode) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.vsync_set_te_mode) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.vsync_set_te_mode) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(.data) refers to hal_internal_vsync.o(.bss) for sg_te_info + drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to ffltui.o(.text) for __aeabi_ui2f + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to fdiv.o(.text) for __aeabi_fdiv + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to fmul.o(.text) for __aeabi_fmul + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) for drv_dsi_rx_get_color_bpp + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_color_pcc) for drv_dsi_rx_get_color_pcc + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to fadd.o(.text) for __aeabi_fadd + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to cfrcmple.o(.text) for __aeabi_cfrcmple + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to f2d.o(.text) for __aeabi_f2d + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to dadd.o(.text) for __aeabi_dadd + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to dfixui.o(.text) for __aeabi_d2uiz + drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) refers to ap_demo.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_dsi_rx.o(i.drv_dsi_rx_get_phy_stopstate) refers to ap_demo.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_dsi_rx.o(i.drv_dsi_rx_phy_resistor_calibration) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_dsi_rx.o(i.drv_dsi_rx_phy_resistor_calibration) refers to drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) for drv_rx_phy_test_write_1_byte + drv_dsi_rx.o(i.drv_dsi_rx_phy_resistor_calibration) refers to drv_dsi_rx.o(i.drv_rx_phy_test_read) for drv_rx_phy_test_read + drv_dsi_rx.o(i.drv_dsi_rx_phy_resistor_calibration) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_phy_common.o(i.drv_phy_get_rate_para) for drv_phy_get_rate_para + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_dsi_rx.o(i.drv_rx_phy_test_clear) for drv_rx_phy_test_clear + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) for drv_rx_phy_test_write_1_byte + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_dsi_rx.o(i.drv_rx_phy_test_write_2_byte) for drv_rx_phy_test_write_2_byte + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_dsi_rx.o(i.drv_rx_phy_test_lock) for drv_rx_phy_test_lock + drv_dsi_rx.o(i.drv_rx_phy_test_clear) refers to drv_phy_common.o(i.drv_phy_test_clear) for drv_phy_test_clear + drv_dsi_rx.o(i.drv_rx_phy_test_lock) refers to drv_phy_common.o(i.drv_phy_test_lock) for drv_phy_test_lock + drv_dsi_rx.o(i.drv_rx_phy_test_read) refers to drv_phy_common.o(i.drv_phy_test_read) for drv_phy_test_read + drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) refers to drv_phy_common.o(i.drv_phy_test_write_1_byte) for drv_phy_test_write_1_byte + drv_dsi_rx.o(i.drv_rx_phy_test_write_2_byte) refers to drv_phy_common.o(i.drv_phy_test_write_2_byte) for drv_phy_test_write_2_byte + drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dsi_tx.o(i.drv_dsi_tx_phy_resistor_calibration) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_dsi_tx.o(i.drv_dsi_tx_phy_resistor_calibration) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) for drv_tx_phy_test_write_1_byte + drv_dsi_tx.o(i.drv_dsi_tx_phy_resistor_calibration) refers to drv_dsi_tx.o(i.drv_tx_phy_test_read) for drv_tx_phy_test_read + drv_dsi_tx.o(i.drv_dsi_tx_phy_resistor_calibration) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) refers to ap_demo.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ulpsactivenot) refers to ap_demo.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_phy_common.o(i.drv_phy_get_rate_para) for drv_phy_get_rate_para + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_phy_common.o(i.drv_phy_get_pll_para) for drv_phy_get_pll_para + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_enter) for drv_tx_phy_test_enter + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_crgu.o(i.drv_crgu_set_mipi_ref_src) for drv_crgu_set_mipi_ref_src + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_crgu.o(i.drv_crgu_set_mipi_cfg_src) for drv_crgu_set_mipi_cfg_src + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_clear) for drv_tx_phy_test_clear + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) for drv_tx_phy_test_write_1_byte + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_2_byte) for drv_tx_phy_test_write_2_byte + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_code) for drv_tx_phy_test_write_code + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_exit) for drv_tx_phy_test_exit + drv_dsi_tx.o(i.drv_dsi_tx_phy_trigger) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) for drv_dsi_tx_phy_status_stopstate + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) for drv_dsi_tx_phy_status_stopstate + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_pll_lock) for drv_dsi_tx_phy_status_pll_lock + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ulpsactivenot) for drv_dsi_tx_phy_status_ulpsactivenot + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ulpsactivenot) for drv_dsi_tx_phy_status_ulpsactivenot + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) for drv_tx_phy_test_write_1_byte + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_pll_lock) for drv_dsi_tx_phy_status_pll_lock + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to drv_dsi_tx.o(i.drv_dsi_tx_version) for drv_dsi_tx_version + drv_dsi_tx.o(i.drv_dsi_tx_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_dsi_tx.o(i.drv_tx_phy_test_clear) refers to drv_phy_common.o(i.drv_phy_test_clear) for drv_phy_test_clear + drv_dsi_tx.o(i.drv_tx_phy_test_read) refers to drv_phy_common.o(i.drv_phy_test_read) for drv_phy_test_read + drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) refers to drv_phy_common.o(i.drv_phy_test_write_1_byte) for drv_phy_test_write_1_byte + drv_dsi_tx.o(i.drv_tx_phy_test_write_2_byte) refers to drv_phy_common.o(i.drv_phy_test_write_2_byte) for drv_phy_test_write_2_byte + drv_dsi_tx.o(i.drv_tx_phy_test_write_code) refers to drv_phy_common.o(i.drv_phy_test_write_code) for drv_phy_test_write_code + drv_lcdc.o(i.drv_lcdc_config_src_parameter) refers to drv_lcdc.o(i.drv_lcdc_config_input_size) for drv_lcdc_config_input_size + drv_lcdc.o(i.drv_lcdc_config_upscaler) refers to drv_param_init.o(i.drv_param_init_get_sclu_filter_h) for drv_param_init_get_sclu_filter_h + drv_lcdc.o(i.drv_lcdc_config_upscaler) refers to drv_param_init.o(i.drv_param_init_get_sclu_filter_v) for drv_param_init_get_sclu_filter_v + drv_lcdc.o(i.drv_lcdc_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_memc.o(i.app_MEMC_IRQn_Handler) refers to drv_memc.o(i.drv_memc_get_status) for drv_memc_get_status + drv_memc.o(i.app_MEMC_IRQn_Handler) refers to drv_memc.o(i.drv_memc_clear_status) for drv_memc_clear_status + drv_memc.o(i.app_MEMC_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_memc.o(i.drv_memc_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_memc.o(i.drv_memc_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_phy_common.o(i.drv_phy_get_pll_para) refers to drv_phy_common.o(.constdata) for .constdata + drv_phy_common.o(i.drv_phy_get_rate_para) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_phy_common.o(i.drv_phy_get_rate_para) refers to drv_phy_common.o(.constdata) for .constdata + drv_phy_common.o(i.drv_phy_test_write_1_byte) refers to drv_phy_common.o(i.drv_phy_test_write_code) for drv_phy_test_write_code + drv_phy_common.o(i.drv_phy_test_write_1_byte) refers to drv_phy_common.o(i.drv_phy_test_write_data) for drv_phy_test_write_data + drv_phy_common.o(i.drv_phy_test_write_2_byte) refers to drv_phy_common.o(i.drv_phy_test_write_code) for drv_phy_test_write_code + drv_phy_common.o(i.drv_phy_test_write_2_byte) refers to drv_phy_common.o(i.drv_phy_test_write_data) for drv_phy_test_write_data + drv_rxbr.o(i.drv_rxbr_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_rxbr.o(i.drv_rxbr_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_rxbr.o(i.drv_rxbr_err_reset) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + drv_rxbr.o(i.drv_rxbr_set_cmd_filter) refers to ap_demo.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_vidc.o(i.drv_vidc_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_vidc.o(i.drv_vidc_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_vidc.o(i.drv_vidc_set_parameter) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_vidc.o(i.drv_vidc_set_parameter) refers to drv_vidc.o(.conststring) for .conststring + irq_redirect .o(i.ADC_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.AP_NRESET_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.DMA_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT0_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT1_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT2_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT3_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT4_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT5_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT6_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT7_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.FLSCTRL_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.HardFault_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.I2C0_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.I2C1_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.LCDC_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.MEMC_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.MIPI_RX_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.MIPI_TX_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.PWMDET_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.SPIM_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.SPIS_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.SWIRE_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.SysTick_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.TIMER0_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.TIMER1_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.TIMER2_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.TIMER3_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.UART_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.VIDC_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.VPRE_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.WDG_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.handle_init) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.handle_init) refers to drv_common.o(i.app_SysTick_Handler) for app_SysTick_Handler + irq_redirect .o(i.handle_init) refers to hal_internal_vsync.o(i.app_VIDC_IRQn_Handler) for app_VIDC_IRQn_Handler + irq_redirect .o(i.handle_init) refers to hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) for app_LCDC_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) for app_MIPI_RX_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) for app_MIPI_TX_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_memc.o(i.app_MEMC_IRQn_Handler) for app_MEMC_IRQn_Handler + irq_redirect .o(i.handle_init) refers to hal_internal_vsync.o(i.app_VPRE_IRQn_Handler) for app_VPRE_IRQn_Handler + irq_redirect .o(i.handle_init) refers to norflash.o(i.app_fls_ctrl_Handler) for app_fls_ctrl_Handler + irq_redirect .o(i.handle_init) refers to drv_dma.o(i.app_dma_irq_handler) for app_dma_irq_handler + irq_redirect .o(i.handle_init) refers to drv_timer.o(i.app_TIMER0_IRQn_Handler) for app_TIMER0_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_timer.o(i.app_TIMER1_IRQn_Handler) for app_TIMER1_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_timer.o(i.app_TIMER2_IRQn_Handler) for app_TIMER2_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_timer.o(i.app_TIMER3_IRQn_Handler) for app_TIMER3_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_wdg.o(i.app_WDG_IRQn_Handler) for app_WDG_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_uart.o(i.app_UART_IRQn_Handler) for app_UART_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_i2c_slave.o(i.app_I2C0_IRQn_Handler) for app_I2C0_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_i2c_master.o(i.app_I2C1_IRQn_Handler) for app_I2C1_IRQn_Handler + irq_redirect .o(i.handle_init) refers to hal_spi_slave.o(i.app_SPIS_IRQn_Handler) for app_SPIS_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_spi_master.o(i.app_SPIM_IRQn_Handler) for app_SPIM_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_pwm.o(i.app_PWMDET_IRQn_Handler) for app_PWMDET_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_swire.o(i.app_SWIRE_IRQn_Handler) for app_SWIRE_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) for app_AP_NRESET_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) for app_EXTI_INT0_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) for app_EXTI_INT1_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) for app_EXTI_INT2_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) for app_EXTI_INT3_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) for app_EXTI_INT4_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) for app_EXTI_INT5_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) for app_EXTI_INT6_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) for app_EXTI_INT7_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_common.o(i.app_HardFault_Handler) for app_HardFault_Handler + drv_chip_info.o(i.drv_chip_info_get_version) refers to drv_chip_info.o(.data) for .data + drv_chip_info.o(i.drv_chip_info_init) refers to drv_chip_info.o(.data) for .data + drv_chip_info.o(i.drv_chip_rx_info_check) refers to printfa.o(i.__0printf) for __2printf + drv_chip_info.o(i.drv_chip_rx_info_check) refers to drv_chip_info.o(.data) for .data + drv_dsc_dec.o(i.drv_dsc_dec_enable) refers to drv_chip_info.o(i.drv_chip_info_get_version) for drv_chip_info_get_version + drv_dsc_dec.o(i.drv_dsc_dec_enable) refers to printfa.o(i.__0printf) for __2printf + hal_spi_slave.o(i.app_SPIS_IRQn_Handler) refers to ap_demo.o(i.__ARM_common_switch8) for __ARM_common_switch8 + hal_spi_slave.o(i.app_SPIS_IRQn_Handler) refers to hal_spi_slave.o(i.__NVIC_SetPriority) for __NVIC_SetPriority + hal_spi_slave.o(i.app_SPIS_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_spi_slave.o(i.app_SPIS_IRQn_Handler) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_s_set_high_impedance) refers to drv_spi_slave.o(i.drv_spi_s_enable) for drv_spi_s_enable + hal_spi_slave.o(i.hal_spi_s_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_spi_slave.o(i.hal_spi_s_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_init_input) for hal_gpio_init_input + hal_spi_slave.o(i.hal_spi_s_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + hal_spi_slave.o(i.hal_spi_slave_auto_transfer_abort) refers to drv_spi_dma.o(i.drv_spi_abort_dma) for drv_spi_abort_dma + hal_spi_slave.o(i.hal_spi_slave_auto_transfer_start) refers to drv_dma.o(i.drv_dma_enable_cycle) for drv_dma_enable_cycle + hal_spi_slave.o(i.hal_spi_slave_auto_transfer_start) refers to drv_spi_dma.o(i.drv_spis_dma_write) for drv_spis_dma_write + hal_spi_slave.o(i.hal_spi_slave_auto_transfer_start) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_deinit) refers to drv_spi_slave.o(i.drv_spi_s_deinit) for drv_spi_s_deinit + hal_spi_slave.o(i.hal_spi_slave_disable) refers to drv_spi_slave.o(i.drv_spi_s_enable) for drv_spi_s_enable + hal_spi_slave.o(i.hal_spi_slave_enable) refers to drv_spi_slave.o(i.drv_spi_s_enable_int) for drv_spi_s_enable_int + hal_spi_slave.o(i.hal_spi_slave_enable) refers to drv_spi_slave.o(i.drv_spi_s_enable) for drv_spi_s_enable + hal_spi_slave.o(i.hal_spi_slave_enable) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_spi_slave.o(i.hal_spi_slave_enable) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_gpio_init) refers to drv_spi_slave.o(i.drv_spi_s_gpio_init) for drv_spi_s_gpio_init + hal_spi_slave.o(i.hal_spi_slave_init) refers to hal_spi_slave.o(i.hal_spi_slave_gpio_init) for hal_spi_slave_gpio_init + hal_spi_slave.o(i.hal_spi_slave_init) refers to drv_spi_slave.o(i.drv_spi_slave_init) for drv_spi_slave_init + hal_spi_slave.o(i.hal_spi_slave_init) refers to drv_spi_dma.o(i.drv_spi_dma_init) for drv_spi_dma_init + hal_spi_slave.o(i.hal_spi_slave_init) refers to drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) for drv_spi_set_dma_irq_callback + hal_spi_slave.o(i.hal_spi_slave_init) refers to drv_spi_slave.o(i.drv_spi_s_enable_tx_dma) for drv_spi_s_enable_tx_dma + hal_spi_slave.o(i.hal_spi_slave_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) for drv_sys_cfg_set_dma_tx_req + hal_spi_slave.o(i.hal_spi_slave_init) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_register_callback) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_reset_tx) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_set_auto_rx_buffer) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_set_auto_tx_buffer) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_write_data) refers to drv_spi_slave.o(i.drv_spi_s_write_data) for drv_spi_s_write_data + drv_fls_dma.o(i.fls_abort_dma) refers to drv_dma.o(i.drv_dma_abort_transfer) for drv_dma_abort_transfer + drv_fls_dma.o(i.fls_abort_dma) refers to drv_fls_dma.o(i.fls_dma_disable) for fls_dma_disable + drv_fls_dma.o(i.fls_dma_read_prepare) refers to drv_fls_dma.o(i.fls_dma_rw_prepare) for fls_dma_rw_prepare + drv_fls_dma.o(i.fls_dma_rw_prepare) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls_dma.o(i.fls_dma_rw_prepare) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls_dma.o(i.fls_dma_rw_prepare) refers to drv_fls.o(i.fls_set_write) for fls_set_write + drv_fls_dma.o(i.fls_dma_rw_prepare) refers to drv_fls.o(i.fls_set_read) for fls_set_read + drv_fls_dma.o(i.fls_dma_rw_prepare) refers to drv_fls_dma.o(i.fls_dma_enable) for fls_dma_enable + drv_fls_dma.o(i.fls_dma_rw_prepare) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls_dma.o(i.fls_dma_write_prepare) refers to drv_fls_dma.o(i.fls_dma_rw_prepare) for fls_dma_rw_prepare + drv_fls_dma.o(i.fls_read_dmacallback) refers to drv_dma.o(i.drv_dma_abort_transfer) for drv_dma_abort_transfer + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to memseta.o(.text) for __aeabi_memclr4 + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to drv_dma.o(i.drv_dma_init) for drv_dma_init + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to drv_dma.o(i.drv_dma_set_callback) for drv_dma_set_callback + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to drv_fls_dma.o(.data) for .data + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to drv_fls_dma.o(i.fls_read_dmacallback) for fls_read_dmacallback + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to drv_fls_dma.o(i.fls_write_dmacallback) for fls_write_dmacallback + drv_fls_dma.o(i.fls_transfer_dma) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_fls_dma.o(i.fls_transfer_dma) refers to drv_dma.o(i.drv_dma_start_transfer) for drv_dma_start_transfer + drv_fls_dma.o(i.fls_transfer_get_receive_count_dma) refers to drv_dma.o(i.drv_dma_get_remaining_bytes) for drv_dma_get_remaining_bytes + drv_fls_dma.o(i.fls_write_dmacallback) refers to drv_dma.o(i.drv_dma_abort_transfer) for drv_dma_abort_transfer + drv_pwm.o(i.app_PWMDET_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_pwm.o(i.app_PWMDET_IRQn_Handler) refers to drv_pwm.o(.data) for .data + drv_pwm.o(i.drv_pwm_in_register_callback) refers to drv_pwm.o(.data) for .data + drv_pwm.o(i.drv_pwm_in_set_sys_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_uart.o(i.UART_AbortReceive) refers to drv_uart.o(i.UART_Disable_IT) for UART_Disable_IT + drv_uart.o(i.UART_AbortReceive) refers to drv_uart.o(i.UART_ResetRxFIFO) for UART_ResetRxFIFO + drv_uart.o(i.UART_AbortSend) refers to drv_uart.o(i.UART_Disable_IT) for UART_Disable_IT + drv_uart.o(i.UART_AbortSend) refers to drv_uart.o(i.UART_ResetTxFIFO) for UART_ResetTxFIFO + drv_uart.o(i.UART_Deinit) refers to drv_uart.o(i.UART_SwitchSCLK) for UART_SwitchSCLK + drv_uart.o(i.UART_Disable_IT) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_Disable_IT) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_uart.o(i.UART_Disable_IT) refers to drv_uart.o(.constdata) for .constdata + drv_uart.o(i.UART_EnableDma) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) for drv_sys_cfg_set_dma_rx_req + drv_uart.o(i.UART_EnableDma) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) for drv_sys_cfg_set_dma_tx_req + drv_uart.o(i.UART_Enable_IT) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_Enable_IT) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_uart.o(i.UART_GetDefaultConfig) refers to memseta.o(.text) for __aeabi_memclr4 + drv_uart.o(i.UART_GetDefaultConfig) refers to drv_common.o(.data) for g_system_clock + drv_uart.o(i.UART_GetFIFO_Ctrl) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_GetFIFO_Ctrl) refers to drv_uart.o(.data) for .data + drv_uart.o(i.UART_IRQ_Handle) refers to drv_uart.o(i.UART_TransferHandleIRQ) for UART_TransferHandleIRQ + drv_uart.o(i.UART_IRQ_Handle) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_uart.o(i.UART_IRQ_Handle) refers to drv_uart.o(.data) for .data + drv_uart.o(i.UART_ResetRxFIFO) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_ResetRxFIFO) refers to drv_uart.o(.data) for .data + drv_uart.o(i.UART_ResetTxFIFO) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_ResetTxFIFO) refers to drv_uart.o(.data) for .data + drv_uart.o(i.UART_SetBaudRate) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_uart.o(i.UART_SwitchSCLK) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_uart.o(i.UART_TransferCreateHandle) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_TransferCreateHandle) refers to memseta.o(.text) for __aeabi_memclr4 + drv_uart.o(i.UART_TransferCreateHandle) refers to drv_uart.o(i.UART_Enable_IT) for UART_Enable_IT + drv_uart.o(i.UART_TransferCreateHandle) refers to drv_uart.o(.data) for .data + drv_uart.o(i.UART_TransferHandleIRQ) refers to drv_uart.o(i.UART_ResetRxFIFO) for UART_ResetRxFIFO + drv_uart.o(i.UART_init) refers to drv_uart.o(i.UART_DisableDma) for UART_DisableDma + drv_uart.o(i.UART_init) refers to drv_uart.o(i.UART_SwitchSCLK) for UART_SwitchSCLK + drv_uart.o(i.UART_init) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_init) refers to drv_uart.o(i.UART_SetBaudRate) for UART_SetBaudRate + drv_uart.o(i.UART_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_uart.o(i.UART_init) refers to drv_uart.o(.data) for .data + drv_uart.o(i.app_UART_IRQn_Handler) refers to drv_uart.o(i.UART_IRQ_Handle) for UART_IRQ_Handle + drv_uart_dma.o(i.UART_DMAInit) refers to memseta.o(.text) for __aeabi_memclr4 + drv_uart_dma.o(i.UART_DMAInit) refers to drv_dma.o(i.drv_dma_init) for drv_dma_init + drv_uart_dma.o(i.UART_TransferAbortReceiveDMA) refers to drv_dma.o(i.drv_dma_abort_transfer) for drv_dma_abort_transfer + drv_uart_dma.o(i.UART_TransferAbortSendDMA) refers to drv_dma.o(i.drv_dma_abort_transfer) for drv_dma_abort_transfer + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to memseta.o(.text) for __aeabi_memclr4 + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart.o(i.UART_EnableDma) for UART_EnableDma + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart_dma.o(i.UART_DMAInit) for UART_DMAInit + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_dma.o(i.drv_dma_set_callback) for drv_dma_set_callback + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart_dma.o(.data) for .data + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart_dma.o(i.UART_TransferReceiveDMACallback) for UART_TransferReceiveDMACallback + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart_dma.o(i.UART_TransferSendDMACallback) for UART_TransferSendDMACallback + drv_uart_dma.o(i.UART_TransferGetReceiveCountDMA) refers to drv_dma.o(i.drv_dma_get_remaining_bytes) for drv_dma_get_remaining_bytes + drv_uart_dma.o(i.UART_TransferReceiveDMA) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_uart_dma.o(i.UART_TransferReceiveDMA) refers to drv_uart.o(i.UART_EnableDma) for UART_EnableDma + drv_uart_dma.o(i.UART_TransferReceiveDMA) refers to drv_dma.o(i.drv_dma_start_transfer) for drv_dma_start_transfer + drv_uart_dma.o(i.UART_TransferSendDMA) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_uart_dma.o(i.UART_TransferSendDMA) refers to drv_uart.o(i.UART_EnableDma) for UART_EnableDma + drv_uart_dma.o(i.UART_TransferSendDMA) refers to drv_dma.o(i.drv_dma_start_transfer) for drv_dma_start_transfer + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_wdg.o(i.drv_wdg_set_int) for drv_wdg_set_int + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_wdg.o(i.drv_wdg_clear_counter) for drv_wdg_clear_counter + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_wdg.o(i.drv_wdg_read_edge_flag) for drv_wdg_read_edge_flag + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_wdg.o(i.drv_wdg_clear_edge_flag) for drv_wdg_clear_edge_flag + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_wdg.o(.data) for .data + drv_wdg.o(i.drv_wdg_register_callback) refers to drv_wdg.o(.data) for .data + drv_wdg.o(i.drv_wdg_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_wdg.o(i.drv_wdg_set_repeat) refers to drv_wdg.o(.data) for .data + drv_spi_slave.o(i.drv_spi_s_disable_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_spi_slave.o(i.drv_spi_s_disable_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_spi_slave.o(i.drv_spi_s_enable_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_spi_slave.o(i.drv_spi_s_set_intr_callback) refers to drv_spi_slave.o(.data) for .data + ceil.o(i.__softfp_ceil) refers (Special) to iusefp.o(.text) for __I$use$fp + ceil.o(i.__softfp_ceil) refers to ceil.o(i.ceil) for ceil + ceil.o(i.ceil) refers (Special) to iusefp.o(.text) for __I$use$fp + ceil.o(i.ceil) refers to dadd.o(.text) for __aeabi_dadd + ceil.o(i.ceil) refers to cdrcmple.o(.text) for __aeabi_cdrcmple + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry10a.o(.ARM.Collect$$$$0000000D) for __rt_final_cpp + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry11a.o(.ARM.Collect$$$$0000000F) for __rt_final_exit + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry7b.o(.ARM.Collect$$$$00000008) for _main_clock + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry8b.o(.ARM.Collect$$$$0000000A) for _main_cpp_init + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry9a.o(.ARM.Collect$$$$0000000B) for _main_init + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry5.o(.ARM.Collect$$$$00000004) for _main_scatterload + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry2.o(.ARM.Collect$$$$00000001) for _main_stk + idiv.o(.text) refers to uidiv.o(.text) for __aeabi_uidivmod + printfb.o(i.__0fprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0fprintf$bare) refers to tau_log.o(i.fputc) for fputc + printfb.o(i.__0printf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0printf$bare) refers to tau_log.o(i.fputc) for fputc + printfb.o(i.__0printf$bare) refers to stdout.o(.data) for __stdout + printfb.o(i.__0snprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0snprintf$bare) refers to printfb.o(i._snputc) for _snputc + printfb.o(i.__0sprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0sprintf$bare) refers to printfb.o(i._sputc) for _sputc + printfb.o(i.__0vfprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vfprintf$bare) refers to tau_log.o(i.fputc) for fputc + printfb.o(i.__0vprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vprintf$bare) refers to tau_log.o(i.fputc) for fputc + printfb.o(i.__0vprintf$bare) refers to stdout.o(.data) for __stdout + printfb.o(i.__0vsnprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vsnprintf$bare) refers to printfb.o(i._snputc) for _snputc + printfb.o(i.__0vsprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vsprintf$bare) refers to printfb.o(i._sputc) for _sputc + printf0.o(i.__0fprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0fprintf$0) refers to tau_log.o(i.fputc) for fputc + printf0.o(i.__0printf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0printf$0) refers to tau_log.o(i.fputc) for fputc + printf0.o(i.__0printf$0) refers to stdout.o(.data) for __stdout + printf0.o(i.__0snprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0snprintf$0) refers to printf0.o(i._snputc) for _snputc + printf0.o(i.__0sprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0sprintf$0) refers to printf0.o(i._sputc) for _sputc + printf0.o(i.__0vfprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vfprintf$0) refers to tau_log.o(i.fputc) for fputc + printf0.o(i.__0vprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vprintf$0) refers to tau_log.o(i.fputc) for fputc + printf0.o(i.__0vprintf$0) refers to stdout.o(.data) for __stdout + printf0.o(i.__0vsnprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vsnprintf$0) refers to printf0.o(i._snputc) for _snputc + printf0.o(i.__0vsprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vsprintf$0) refers to printf0.o(i._sputc) for _sputc + printf1.o(i.__0fprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0fprintf$1) refers to tau_log.o(i.fputc) for fputc + printf1.o(i.__0printf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0printf$1) refers to tau_log.o(i.fputc) for fputc + printf1.o(i.__0printf$1) refers to stdout.o(.data) for __stdout + printf1.o(i.__0snprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0snprintf$1) refers to printf1.o(i._snputc) for _snputc + printf1.o(i.__0sprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0sprintf$1) refers to printf1.o(i._sputc) for _sputc + printf1.o(i.__0vfprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vfprintf$1) refers to tau_log.o(i.fputc) for fputc + printf1.o(i.__0vprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vprintf$1) refers to tau_log.o(i.fputc) for fputc + printf1.o(i.__0vprintf$1) refers to stdout.o(.data) for __stdout + printf1.o(i.__0vsnprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vsnprintf$1) refers to printf1.o(i._snputc) for _snputc + printf1.o(i.__0vsprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vsprintf$1) refers to printf1.o(i._sputc) for _sputc + printf1.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printf2.o(i.__0fprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0fprintf$2) refers to tau_log.o(i.fputc) for fputc + printf2.o(i.__0printf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0printf$2) refers to tau_log.o(i.fputc) for fputc + printf2.o(i.__0printf$2) refers to stdout.o(.data) for __stdout + printf2.o(i.__0snprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0snprintf$2) refers to printf2.o(i._snputc) for _snputc + printf2.o(i.__0sprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0sprintf$2) refers to printf2.o(i._sputc) for _sputc + printf2.o(i.__0vfprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vfprintf$2) refers to tau_log.o(i.fputc) for fputc + printf2.o(i.__0vprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vprintf$2) refers to tau_log.o(i.fputc) for fputc + printf2.o(i.__0vprintf$2) refers to stdout.o(.data) for __stdout + printf2.o(i.__0vsnprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vsnprintf$2) refers to printf2.o(i._snputc) for _snputc + printf2.o(i.__0vsprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vsprintf$2) refers to printf2.o(i._sputc) for _sputc + printf3.o(i.__0fprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0fprintf$3) refers to tau_log.o(i.fputc) for fputc + printf3.o(i.__0printf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0printf$3) refers to tau_log.o(i.fputc) for fputc + printf3.o(i.__0printf$3) refers to stdout.o(.data) for __stdout + printf3.o(i.__0snprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0snprintf$3) refers to printf3.o(i._snputc) for _snputc + printf3.o(i.__0sprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0sprintf$3) refers to printf3.o(i._sputc) for _sputc + printf3.o(i.__0vfprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vfprintf$3) refers to tau_log.o(i.fputc) for fputc + printf3.o(i.__0vprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vprintf$3) refers to tau_log.o(i.fputc) for fputc + printf3.o(i.__0vprintf$3) refers to stdout.o(.data) for __stdout + printf3.o(i.__0vsnprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vsnprintf$3) refers to printf3.o(i._snputc) for _snputc + printf3.o(i.__0vsprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vsprintf$3) refers to printf3.o(i._sputc) for _sputc + printf3.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printf4.o(i.__0fprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0fprintf$4) refers to tau_log.o(i.fputc) for fputc + printf4.o(i.__0printf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0printf$4) refers to tau_log.o(i.fputc) for fputc + printf4.o(i.__0printf$4) refers to stdout.o(.data) for __stdout + printf4.o(i.__0snprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0snprintf$4) refers to printf4.o(i._snputc) for _snputc + printf4.o(i.__0sprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0sprintf$4) refers to printf4.o(i._sputc) for _sputc + printf4.o(i.__0vfprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vfprintf$4) refers to tau_log.o(i.fputc) for fputc + printf4.o(i.__0vprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vprintf$4) refers to tau_log.o(i.fputc) for fputc + printf4.o(i.__0vprintf$4) refers to stdout.o(.data) for __stdout + printf4.o(i.__0vsnprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vsnprintf$4) refers to printf4.o(i._snputc) for _snputc + printf4.o(i.__0vsprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vsprintf$4) refers to printf4.o(i._sputc) for _sputc + printf4.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printf5.o(i.__0fprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0fprintf$5) refers to tau_log.o(i.fputc) for fputc + printf5.o(i.__0printf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0printf$5) refers to tau_log.o(i.fputc) for fputc + printf5.o(i.__0printf$5) refers to stdout.o(.data) for __stdout + printf5.o(i.__0snprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0snprintf$5) refers to printf5.o(i._snputc) for _snputc + printf5.o(i.__0sprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0sprintf$5) refers to printf5.o(i._sputc) for _sputc + printf5.o(i.__0vfprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vfprintf$5) refers to tau_log.o(i.fputc) for fputc + printf5.o(i.__0vprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vprintf$5) refers to tau_log.o(i.fputc) for fputc + printf5.o(i.__0vprintf$5) refers to stdout.o(.data) for __stdout + printf5.o(i.__0vsnprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vsnprintf$5) refers to printf5.o(i._snputc) for _snputc + printf5.o(i.__0vsprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vsprintf$5) refers to printf5.o(i._sputc) for _sputc + printf5.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printf6.o(i.__0fprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0fprintf$6) refers to tau_log.o(i.fputc) for fputc + printf6.o(i.__0printf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0printf$6) refers to tau_log.o(i.fputc) for fputc + printf6.o(i.__0printf$6) refers to stdout.o(.data) for __stdout + printf6.o(i.__0snprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0snprintf$6) refers to printf6.o(i._snputc) for _snputc + printf6.o(i.__0sprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0sprintf$6) refers to printf6.o(i._sputc) for _sputc + printf6.o(i.__0vfprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vfprintf$6) refers to tau_log.o(i.fputc) for fputc + printf6.o(i.__0vprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vprintf$6) refers to tau_log.o(i.fputc) for fputc + printf6.o(i.__0vprintf$6) refers to stdout.o(.data) for __stdout + printf6.o(i.__0vsnprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vsnprintf$6) refers to printf6.o(i._snputc) for _snputc + printf6.o(i.__0vsprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vsprintf$6) refers to printf6.o(i._sputc) for _sputc + printf6.o(i._printf_core) refers to printf6.o(i._printf_pre_padding) for _printf_pre_padding + printf6.o(i._printf_core) refers to printf6.o(i._printf_post_padding) for _printf_post_padding + printf6.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printf7.o(i.__0fprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0fprintf$7) refers to tau_log.o(i.fputc) for fputc + printf7.o(i.__0printf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0printf$7) refers to tau_log.o(i.fputc) for fputc + printf7.o(i.__0printf$7) refers to stdout.o(.data) for __stdout + printf7.o(i.__0snprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0snprintf$7) refers to printf7.o(i._snputc) for _snputc + printf7.o(i.__0sprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0sprintf$7) refers to printf7.o(i._sputc) for _sputc + printf7.o(i.__0vfprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vfprintf$7) refers to tau_log.o(i.fputc) for fputc + printf7.o(i.__0vprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vprintf$7) refers to tau_log.o(i.fputc) for fputc + printf7.o(i.__0vprintf$7) refers to stdout.o(.data) for __stdout + printf7.o(i.__0vsnprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vsnprintf$7) refers to printf7.o(i._snputc) for _snputc + printf7.o(i.__0vsprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vsprintf$7) refers to printf7.o(i._sputc) for _sputc + printf7.o(i._printf_core) refers to printf7.o(i._printf_pre_padding) for _printf_pre_padding + printf7.o(i._printf_core) refers to printf7.o(i._printf_post_padding) for _printf_post_padding + printf7.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printf8.o(i.__0fprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0fprintf$8) refers to tau_log.o(i.fputc) for fputc + printf8.o(i.__0printf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0printf$8) refers to tau_log.o(i.fputc) for fputc + printf8.o(i.__0printf$8) refers to stdout.o(.data) for __stdout + printf8.o(i.__0snprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0snprintf$8) refers to printf8.o(i._snputc) for _snputc + printf8.o(i.__0sprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0sprintf$8) refers to printf8.o(i._sputc) for _sputc + printf8.o(i.__0vfprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vfprintf$8) refers to tau_log.o(i.fputc) for fputc + printf8.o(i.__0vprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vprintf$8) refers to tau_log.o(i.fputc) for fputc + printf8.o(i.__0vprintf$8) refers to stdout.o(.data) for __stdout + printf8.o(i.__0vsnprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vsnprintf$8) refers to printf8.o(i._snputc) for _snputc + printf8.o(i.__0vsprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vsprintf$8) refers to printf8.o(i._sputc) for _sputc + printf8.o(i._printf_core) refers to printf8.o(i._printf_pre_padding) for _printf_pre_padding + printf8.o(i._printf_core) refers to printf8.o(i._printf_post_padding) for _printf_post_padding + printf8.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printfa.o(i.__0fprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0fprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0fprintf) refers to tau_log.o(i.fputc) for fputc + printfa.o(i.__0printf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0printf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0printf) refers to tau_log.o(i.fputc) for fputc + printfa.o(i.__0printf) refers to stdout.o(.data) for __stdout + printfa.o(i.__0snprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0snprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0snprintf) refers to printfa.o(i._snputc) for _snputc + printfa.o(i.__0sprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0sprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0sprintf) refers to printfa.o(i._sputc) for _sputc + printfa.o(i.__0vfprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vfprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vfprintf) refers to tau_log.o(i.fputc) for fputc + printfa.o(i.__0vprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vprintf) refers to tau_log.o(i.fputc) for fputc + printfa.o(i.__0vprintf) refers to stdout.o(.data) for __stdout + printfa.o(i.__0vsnprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vsnprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vsnprintf) refers to printfa.o(i._snputc) for _snputc + printfa.o(i.__0vsprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vsprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vsprintf) refers to printfa.o(i._sputc) for _sputc + printfa.o(i._fp_digits) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._fp_digits) refers to dmul.o(.text) for __aeabi_dmul + printfa.o(i._fp_digits) refers to ddiv.o(.text) for __aeabi_ddiv + printfa.o(i._fp_digits) refers to cdrcmple.o(.text) for __aeabi_cdrcmple + printfa.o(i._fp_digits) refers to dadd.o(.text) for __aeabi_dadd + printfa.o(i._fp_digits) refers to dfixul.o(.text) for __aeabi_d2ulz + printfa.o(i._fp_digits) refers to uldiv.o(.text) for __aeabi_uldivmod + printfa.o(i._printf_core) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._printf_core) refers to printfa.o(i._printf_pre_padding) for _printf_pre_padding + printfa.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printfa.o(i._printf_core) refers to printfa.o(i._printf_post_padding) for _printf_post_padding + printfa.o(i._printf_core) refers to printfa.o(i._fp_digits) for _fp_digits + printfa.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printfa.o(i._printf_post_padding) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._printf_pre_padding) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._snputc) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._sputc) refers (Special) to iusefp.o(.text) for __I$use$fp + fadd.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + fadd.o(.text) refers to fepilogue.o(.text) for _float_epilogue + fmul.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + fdiv.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + fdiv.o(.text) refers to fepilogue.o(.text) for _float_round + fscalb.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dadd.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dadd.o(.text) refers to llshl.o(.text) for __aeabi_llsl + dadd.o(.text) refers to llsshr.o(.text) for __aeabi_lasr + dadd.o(.text) refers to depilogue.o(.text) for _double_epilogue + fflti.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + fflti.o(.text) refers to fepilogue.o(.text) for _float_epilogue + ffltui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + ffltui.o(.text) refers to fepilogue.o(.text) for _float_epilogue + dfltui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dfltui.o(.text) refers to depilogue.o(.text) for _double_epilogue + ffixi.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + ffixui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dfixi.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dfixi.o(.text) refers to llushr.o(.text) for __aeabi_llsr + dfixui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dfixui.o(.text) refers to llushr.o(.text) for __aeabi_llsr + f2d.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + cfrcmple.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + entry2.o(.ARM.Collect$$$$00000001) refers to entry2.o(.ARM.Collect$$$$00002712) for __lit__00000000 + entry2.o(.ARM.Collect$$$$00002712) refers to startup_armcm0.o(STACK) for __initial_sp + entry2.o(__vectab_stack_and_reset_area) refers to startup_armcm0.o(STACK) for __initial_sp + entry2.o(__vectab_stack_and_reset_area) refers to entry.o(.ARM.Collect$$$$00000000) for __main + entry5.o(.ARM.Collect$$$$00000004) refers to init.o(.text) for __scatterload + entry9a.o(.ARM.Collect$$$$0000000B) refers to main.o(i.main) for main + entry9b.o(.ARM.Collect$$$$0000000C) refers to main.o(i.main) for main + uldiv.o(.text) refers to llushr.o(.text) for __aeabi_llsr + uldiv.o(.text) refers to llshl.o(.text) for __aeabi_llsl + depilogue.o(.text) refers to depilogue.o(i.__ARM_clz) for __ARM_clz + depilogue.o(.text) refers to llshl.o(.text) for __aeabi_llsl + depilogue.o(.text) refers to llushr.o(.text) for __aeabi_llsr + dmul.o(.text) refers to depilogue.o(.text) for _double_epilogue + ddiv.o(.text) refers to depilogue.o(.text) for _double_round + dfixul.o(.text) refers to llushr.o(.text) for __aeabi_llsr + dfixul.o(.text) refers to llshl.o(.text) for __aeabi_llsl + init.o(.text) refers to entry5.o(.ARM.Collect$$$$00000004) for __main_after_scatterload + + +============================================================================== + +Removing Unused input sections from the image. + + Removing main.o(.rev16_text), (4 bytes). + Removing main.o(.revsh_text), (4 bytes). + Removing ap_demo.o(.rev16_text), (4 bytes). + Removing ap_demo.o(.revsh_text), (4 bytes). + Removing ap_demo.o(.data), (1 bytes). + Removing ap_demo.o(.data), (4 bytes). + Removing app_tp_for_custom_s8.o(.rev16_text), (4 bytes). + Removing app_tp_for_custom_s8.o(.revsh_text), (4 bytes). + Removing app_tp_for_custom_s8.o(i.app_tp_screen_analysis_const), (56 bytes). + Removing app_tp_for_custom_s8.o(.bss), (200 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (37 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (1 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (3 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (3 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (1 bytes). + Removing app_tp_for_custom_s8.o(.data), (11 bytes). + Removing app_tp_for_custom_s8.o(.data), (10 bytes). + Removing app_tp_for_custom_s8.o(.data), (1 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (1 bytes). + Removing app_tp_for_custom_s8.o(.data), (1 bytes). + Removing app_tp_for_custom_s8.o(.data), (64 bytes). + Removing app_tp_for_custom_s8.o(.data), (3 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (1 bytes). + Removing app_tp_for_custom_s8.o(.data), (32 bytes). + Removing app_tp_for_custom_s8.o(.data), (1 bytes). + Removing app_tp_transfer.o(.rev16_text), (4 bytes). + Removing app_tp_transfer.o(.revsh_text), (4 bytes). + Removing app_tp_transfer.o(i.app_tp_phone_reset_on), (12 bytes). + Removing app_tp_transfer.o(i.app_tp_s_transfer_complate), (26 bytes). + Removing app_tp_transfer.o(.data), (3 bytes). + Removing app_tp_transfer.o(.data), (3 bytes). + Removing app_tp_transfer.o(.data), (5 bytes). + Removing app_tp_transfer.o(.data), (6 bytes). + Removing app_tp_transfer.o(.data), (2 bytes). + Removing app_tp_transfer.o(.data), (3 bytes). + Removing app_tp_transfer.o(.data), (1 bytes). + Removing app_tp_transfer.o(.data), (2 bytes). + Removing app_tp_transfer.o(.data), (2 bytes). + Removing board.o(.rev16_text), (4 bytes). + Removing board.o(.revsh_text), (4 bytes). + Removing startup_armcm0.o(HEAP), (3072 bytes). + Removing hal_dsi_rx_ctrl.o(.rev16_text), (4 bytes). + Removing hal_dsi_rx_ctrl.o(.revsh_text), (4 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_ack_long_cmd), (88 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_ack_short_cmd), (28 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern), (296 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_compressen_en), (16 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode), (128 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_release_handle), (32 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart), (72 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_auto_hw_filter), (28 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk), (44 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_pq_enh_chr), (56 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_pq_enh_chr2), (64 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_pq_enh_lum), (56 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_pq_gain), (64 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter), (120 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_dcs_direct_mode), (8 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_cmd_filter), (40 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pentile_format), (56 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk), (64 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_te_waveform), (52 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_tear_mode_ex), (14 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate), (112 bytes). + Removing hal_dsi_tx_ctrl.o(.rev16_text), (4 bytes). + Removing hal_dsi_tx_ctrl.o(.revsh_text), (4 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic), (164 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_ulps_mode), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_ulps_mode), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd), (140 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_release_handle), (28 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_cus_pq_edge), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_cus_pq_filter), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_endianness), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_escape_clock_div), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_horizon_flip), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_lp_cmd), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg), (24 bytes). + Removing hal_gpio.o(.rev16_text), (4 bytes). + Removing hal_gpio.o(.revsh_text), (4 bytes). + Removing hal_gpio.o(i.hal_gpio_get_int_type), (20 bytes). + Removing hal_gpio.o(i.hal_gpio_get_pull_state), (32 bytes). + Removing hal_gpio.o(i.hal_gpio_set_driving_strength), (32 bytes). + Removing hal_gpio.o(i.hal_gpio_set_output_data_ex), (36 bytes). + Removing hal_gpio.o(i.hal_gpio_set_schmitt_trigger), (32 bytes). + Removing hal_gpio.o(i.hal_gpio_set_slew_rate), (32 bytes). + Removing hal_i2c_master.o(.rev16_text), (4 bytes). + Removing hal_i2c_master.o(.revsh_text), (4 bytes). + Removing hal_i2c_master.o(i.hal_i2c_m_deinit), (8 bytes). + Removing hal_i2c_master.o(i.hal_i2c_m_set_high_impedance), (46 bytes). + Removing hal_i2c_slave.o(.rev16_text), (4 bytes). + Removing hal_i2c_slave.o(.revsh_text), (4 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_deinit), (8 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_get_tx_byte_num), (8 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_read_complate), (12 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_read_complate_clear), (12 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_read_data), (8 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_rxfifo_notempty), (16 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_set_dma_tx_cycle), (12 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_set_high_impedance), (46 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_write_complate), (12 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_write_data), (8 bytes). + Removing hal_spi_master.o(.rev16_text), (4 bytes). + Removing hal_spi_master.o(.revsh_text), (4 bytes). + Removing hal_spi_master.o(i.hal_spi_m_callback), (28 bytes). + Removing hal_spi_master.o(i.hal_spi_m_deinit), (10 bytes). + Removing hal_spi_master.o(i.hal_spi_m_dma_init), (64 bytes). + Removing hal_spi_master.o(i.hal_spi_m_dma_read), (64 bytes). + Removing hal_spi_master.o(i.hal_spi_m_dma_write), (40 bytes). + Removing hal_spi_master.o(i.hal_spi_m_get_transfer_complate), (36 bytes). + Removing hal_spi_master.o(i.hal_spi_m_gpio_init), (8 bytes). + Removing hal_spi_master.o(i.hal_spi_m_set_high_impedance), (94 bytes). + Removing hal_spi_master.o(.data), (1 bytes). + Removing hal_swire.o(.rev16_text), (4 bytes). + Removing hal_swire.o(.revsh_text), (4 bytes). + Removing hal_swire.o(i.hal_swire_deinit), (18 bytes). + Removing hal_swire.o(i.hal_swire_init), (32 bytes). + Removing hal_swire.o(i.hal_swire_register_callback), (10 bytes). + Removing hal_swire.o(i.hal_swire_start), (112 bytes). + Removing hal_system.o(.rev16_text), (4 bytes). + Removing hal_system.o(.revsh_text), (4 bytes). + Removing hal_system.o(i.hal_system_deep_sleep_mode), (8 bytes). + Removing hal_system.o(i.hal_system_disable_systick), (8 bytes). + Removing hal_system.o(i.hal_system_flash_read), (56 bytes). + Removing hal_system.o(i.hal_system_flash_write), (58 bytes). + Removing hal_system.o(i.hal_system_get_tick), (8 bytes). + Removing hal_system.o(i.hal_system_idle_mode), (8 bytes). + Removing hal_system.o(i.hal_system_register_systick_cb), (8 bytes). + Removing hal_system.o(i.hal_system_reset_chip), (32 bytes). + Removing hal_system.o(i.hal_system_share_flash_mode), (20 bytes). + Removing hal_system.o(i.hal_system_sleep_mode), (48 bytes). + Removing hal_timer.o(.rev16_text), (4 bytes). + Removing hal_timer.o(.revsh_text), (4 bytes). + Removing hal_timer.o(i.hal_timer_deinit), (46 bytes). + Removing hal_timer.o(i.hal_timer_get_status), (8 bytes). + Removing hal_timer.o(i.hal_timer_set_repeat), (8 bytes). + Removing hal_timer.o(i.hal_timer_start_ex), (72 bytes). + Removing tau_delay.o(.rev16_text), (4 bytes). + Removing tau_delay.o(.revsh_text), (4 bytes). + Removing tau_log.o(.rev16_text), (4 bytes). + Removing tau_log.o(.revsh_text), (4 bytes). + Removing tau_log.o(i.fgetc), (22 bytes). + Removing norflash.o(.rev16_text), (4 bytes). + Removing norflash.o(.revsh_text), (4 bytes). + Removing norflash.o(i.norflash_best_cfg_init), (44 bytes). + Removing norflash.o(i.norflash_big_end_clear), (14 bytes). + Removing norflash.o(i.norflash_big_end_enable), (20 bytes). + Removing norflash.o(i.norflash_check_crc32), (14 bytes). + Removing norflash.o(i.norflash_check_id), (72 bytes). + Removing norflash.o(i.norflash_dma_callback), (24 bytes). + Removing norflash.o(i.norflash_dma_read), (148 bytes). + Removing norflash.o(i.norflash_dma_write), (244 bytes). + Removing norflash.o(i.norflash_dual_read), (60 bytes). + Removing norflash.o(i.norflash_dual_write), (112 bytes). + Removing norflash.o(i.norflash_en4b), (40 bytes). + Removing norflash.o(i.norflash_en_quad), (116 bytes). + Removing norflash.o(i.norflash_en_quad_check), (64 bytes). + Removing norflash.o(i.norflash_erase_block), (44 bytes). + Removing norflash.o(i.norflash_erase_chip), (28 bytes). + Removing norflash.o(i.norflash_erase_sector), (44 bytes). + Removing norflash.o(i.norflash_ex4b), (40 bytes). + Removing norflash.o(i.norflash_exit_quad), (76 bytes). + Removing norflash.o(i.norflash_get_dual_hstatus), (52 bytes). + Removing norflash.o(i.norflash_get_hstatus), (52 bytes). + Removing norflash.o(i.norflash_get_status), (52 bytes). + Removing norflash.o(i.norflash_init), (48 bytes). + Removing norflash.o(i.norflash_quad_read), (76 bytes). + Removing norflash.o(i.norflash_quad_write), (108 bytes). + Removing norflash.o(i.norflash_read), (28 bytes). + Removing norflash.o(i.norflash_read_config_reg), (36 bytes). + Removing norflash.o(i.norflash_read_id), (20 bytes). + Removing norflash.o(i.norflash_reset), (2 bytes). + Removing norflash.o(i.norflash_reset_crc32), (32 bytes). + Removing norflash.o(i.norflash_set_best_cfg), (50 bytes). + Removing norflash.o(i.norflash_set_best_read_cfg), (84 bytes). + Removing norflash.o(i.norflash_set_best_write_cfg), (84 bytes). + Removing norflash.o(i.norflash_switch_fls_spi), (112 bytes). + Removing norflash.o(i.norflash_write), (96 bytes). + Removing norflash.o(i.norflash_write_disable), (64 bytes). + Removing norflash.o(i.norflash_write_enable), (56 bytes). + Removing norflash.o(i.norflash_write_endian_scr), (132 bytes). + Removing norflash.o(.bss), (116 bytes). + Removing norflash.o(.bss), (32 bytes). + Removing norflash.o(.data), (2 bytes). + Removing hal_uart.o(.rev16_text), (4 bytes). + Removing hal_uart.o(.revsh_text), (4 bytes). + Removing hal_uart.o(i.hal_uart_deinit), (20 bytes). + Removing hal_uart.o(i.hal_uart_dmacallback), (36 bytes). + Removing hal_uart.o(i.hal_uart_receive_blocking), (16 bytes). + Removing hal_uart.o(i.hal_uart_receive_dma), (72 bytes). + Removing hal_uart.o(i.hal_uart_transmit_dma), (68 bytes). + Removing drv_common.o(.rev16_text), (4 bytes). + Removing drv_common.o(.revsh_text), (4 bytes). + Removing drv_common.o(i.drv_common_disable_systick), (20 bytes). + Removing drv_common.o(i.drv_common_get_otp_value), (28 bytes). + Removing drv_common.o(i.drv_common_get_tick), (12 bytes). + Removing drv_common.o(i.drv_common_idle_mode), (40 bytes). + Removing drv_common.o(i.drv_common_systick_register_cb), (12 bytes). + Removing drv_crgu.o(.rev16_text), (4 bytes). + Removing drv_crgu.o(.revsh_text), (4 bytes). + Removing drv_crgu.o(i.drv_crgu_clear_all_reset_flags), (12 bytes). + Removing drv_crgu.o(i.drv_crgu_clear_reset_flag), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_config_clocks), (16 bytes). + Removing drv_crgu.o(i.drv_crgu_config_clocks_div), (16 bytes). + Removing drv_crgu.o(i.drv_crgu_config_clocks_src), (16 bytes). + Removing drv_crgu.o(i.drv_crgu_get_ana_clk_status), (24 bytes). + Removing drv_crgu.o(i.drv_crgu_get_fpga_id), (12 bytes). + Removing drv_crgu.o(i.drv_crgu_get_mipi_ref_src), (16 bytes). + Removing drv_crgu.o(i.drv_crgu_get_reset_flag), (24 bytes). + Removing drv_crgu.o(i.drv_crgu_get_system_clk), (28 bytes). + Removing drv_crgu.o(i.drv_crgu_reset_chip), (12 bytes). + Removing drv_crgu.o(i.drv_crgu_set_200m_scan_src), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_300m_scan_src), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_abp_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_adc_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_adc_src), (24 bytes). + Removing drv_crgu.o(i.drv_crgu_set_fls_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_fls_src), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_monitor_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_monitor_src), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_swire_div), (20 bytes). + Removing drv_dma.o(.rev16_text), (4 bytes). + Removing drv_dma.o(.revsh_text), (4 bytes). + Removing drv_dma.o(i.drv_dma_abort_transfer), (18 bytes). + Removing drv_dma.o(i.drv_dma_ahb_init), (72 bytes). + Removing drv_dma.o(i.drv_dma_channel_is_active), (28 bytes). + Removing drv_dma.o(i.drv_dma_deinit), (32 bytes). + Removing drv_dma.o(i.drv_dma_disenable_channel_interrupts), (32 bytes). + Removing drv_dma.o(i.drv_dma_get_remaining_bytes), (36 bytes). + Removing drv_dma.o(i.drv_dma_init), (20 bytes). + Removing drv_dma.o(i.drv_dma_m2m_init), (66 bytes). + Removing drv_dma.o(i.drv_dma_reset), (10 bytes). + Removing drv_dma.o(i.drv_dma_set_ccr), (114 bytes). + Removing drv_dma.o(i.drv_dma_start_transfer), (18 bytes). + Removing drv_fls.o(.rev16_text), (4 bytes). + Removing drv_fls.o(.revsh_text), (4 bytes). + Removing drv_fls.o(i.__NVIC_DisableIRQ), (32 bytes). + Removing drv_fls.o(i.drv_fls_gpio_connect), (28 bytes). + Removing drv_fls.o(i.drv_fls_gpio_disconnect), (32 bytes). + Removing drv_fls.o(i.fls_EnableClk), (12 bytes). + Removing drv_fls.o(i.fls_busy_pending), (12 bytes). + Removing drv_fls.o(i.fls_ctrl_cfg_init), (72 bytes). + Removing drv_fls.o(i.fls_ddat_enable), (24 bytes). + Removing drv_fls.o(i.fls_de_init), (44 bytes). + Removing drv_fls.o(i.fls_descr), (10 bytes). + Removing drv_fls.o(i.fls_disable_it), (36 bytes). + Removing drv_fls.o(i.fls_en_scr), (10 bytes). + Removing drv_fls.o(i.fls_enable_it), (48 bytes). + Removing drv_fls.o(i.fls_get_crcout), (4 bytes). + Removing drv_fls.o(i.fls_get_default_fls_config), (20 bytes). + Removing drv_fls.o(i.fls_get_default_spi_config), (44 bytes). + Removing drv_fls.o(i.fls_get_default_tuning), (12 bytes). + Removing drv_fls.o(i.fls_get_tuning), (18 bytes). + Removing drv_fls.o(i.fls_init), (62 bytes). + Removing drv_fls.o(i.fls_qadr_enable), (22 bytes). + Removing drv_fls.o(i.fls_qcmd_enable), (22 bytes). + Removing drv_fls.o(i.fls_qdat_enable), (22 bytes). + Removing drv_fls.o(i.fls_read_byte_data), (126 bytes). + Removing drv_fls.o(i.fls_read_cmd), (104 bytes). + Removing drv_fls.o(i.fls_read_cmd_it), (110 bytes). + Removing drv_fls.o(i.fls_reset_crc), (18 bytes). + Removing drv_fls.o(i.fls_scr_clear), (10 bytes). + Removing drv_fls.o(i.fls_set_addr_dummy), (32 bytes). + Removing drv_fls.o(i.fls_set_addr_len), (32 bytes). + Removing drv_fls.o(i.fls_set_irq_mask), (26 bytes). + Removing drv_fls.o(i.fls_set_read), (10 bytes). + Removing drv_fls.o(i.fls_set_tuning), (24 bytes). + Removing drv_fls.o(i.fls_set_write), (10 bytes). + Removing drv_fls.o(i.fls_single_mode), (16 bytes). + Removing drv_fls.o(i.fls_spi_init), (180 bytes). + Removing drv_fls.o(i.fls_spi_start), (10 bytes). + Removing drv_fls.o(i.fls_swrst), (18 bytes). + Removing drv_fls.o(i.fls_write_byte_data), (160 bytes). + Removing drv_fls.o(i.fls_write_cmd), (58 bytes). + Removing drv_fls.o(.data), (4 bytes). + Removing drv_gpio.o(.rev16_text), (4 bytes). + Removing drv_gpio.o(.revsh_text), (4 bytes). + Removing drv_gpio.o(i.drv_gpio_get_pull_state), (224 bytes). + Removing drv_gpio.o(i.drv_gpio_set_driving_strength), (312 bytes). + Removing drv_gpio.o(i.drv_gpio_set_schmitt_trigger), (168 bytes). + Removing drv_gpio.o(i.drv_gpio_set_slew_rate), (168 bytes). + Removing drv_i2c_dma.o(.rev16_text), (4 bytes). + Removing drv_i2c_dma.o(.revsh_text), (4 bytes). + Removing drv_i2c_master.o(.rev16_text), (4 bytes). + Removing drv_i2c_master.o(.revsh_text), (4 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_bus_init), (36 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_deinit), (44 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_enable), (32 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_get_fifo_status), (28 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_read_data), (32 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_set_fifo_threshold), (24 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_set_sys_mask), (48 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_write_data), (32 bytes). + Removing drv_i2c_slave.o(.rev16_text), (4 bytes). + Removing drv_i2c_slave.o(.revsh_text), (4 bytes). + Removing drv_i2c_slave.o(i.drv_i2c_s_bus_init), (36 bytes). + Removing drv_i2c_slave.o(i.drv_i2c_s_deinit), (44 bytes). + Removing drv_i2c_slave.o(i.drv_i2c_s_enable), (32 bytes). + Removing drv_i2c_slave.o(i.drv_i2c_s_get_tx_byte_num), (12 bytes). + Removing drv_i2c_slave.o(i.drv_i2c_s_read_data), (32 bytes). + Removing drv_i2c_slave.o(i.drv_i2c_s_set_fifo_threshold), (24 bytes). + Removing drv_i2c_slave.o(i.drv_i2c_s_set_sys_mask), (48 bytes). + Removing drv_param_init.o(.rev16_text), (4 bytes). + Removing drv_param_init.o(.revsh_text), (4 bytes). + Removing drv_param_init.o(i.drv_param_init_set_scld_filter), (100 bytes). + Removing drv_param_init.o(i.drv_param_init_set_sclu_filter), (52 bytes). + Removing drv_param_init.o(i.drv_param_set_enh_chr), (12 bytes). + Removing drv_param_init.o(i.drv_param_set_enh_chr2), (16 bytes). + Removing drv_param_init.o(i.drv_param_set_enh_lum), (12 bytes). + Removing drv_param_init.o(i.drv_param_set_gain), (16 bytes). + Removing drv_param_init.o(.data), (4 bytes). + Removing drv_param_init.o(.data), (4 bytes). + Removing drv_param_init.o(.data), (4 bytes). + Removing drv_param_init.o(.data), (4 bytes). + Removing drv_param_init.o(.data), (4 bytes). + Removing drv_param_init.o(.data), (4 bytes). + Removing drv_param_init.o(.data), (4 bytes). + Removing drv_param_init.o(.data), (4 bytes). + Removing drv_param_init.o(.data), (4 bytes). + Removing drv_param_init.o(.data), (4 bytes). + Removing drv_pwr.o(.rev16_text), (4 bytes). + Removing drv_pwr.o(.revsh_text), (4 bytes). + Removing drv_pwr.o(i.drv_pwr_enter_deep_sleep_mode), (40 bytes). + Removing drv_spi_dma.o(.rev16_text), (4 bytes). + Removing drv_spi_dma.o(.revsh_text), (4 bytes). + Removing drv_spi_dma.o(i.__NVIC_ClearPendingIRQ), (24 bytes). + Removing drv_spi_dma.o(i.drv_spi_abort_dma), (80 bytes). + Removing drv_spi_dma.o(i.drv_spi_dma_callback), (52 bytes). + Removing drv_spi_dma.o(i.drv_spi_dma_init), (188 bytes). + Removing drv_spi_dma.o(i.drv_spi_set_dma_irq_callback), (80 bytes). + Removing drv_spi_dma.o(i.drv_spim_dma_read), (512 bytes). + Removing drv_spi_dma.o(i.drv_spim_dma_write), (84 bytes). + Removing drv_spi_dma.o(i.drv_spis_dma_write), (56 bytes). + Removing drv_spi_dma.o(.bss), (24 bytes). + Removing drv_spi_dma.o(.data), (8 bytes). + Removing drv_spi_master.o(.rev16_text), (4 bytes). + Removing drv_spi_master.o(.revsh_text), (4 bytes). + Removing drv_spi_master.o(i.drv_spi_m_deinit), (56 bytes). + Removing drv_spi_master.o(i.drv_spi_m_disable_int), (72 bytes). + Removing drv_spi_master.o(i.drv_spi_m_enable), (32 bytes). + Removing drv_spi_master.o(i.drv_spi_m_enable_int), (76 bytes). + Removing drv_spi_master.o(i.drv_spi_m_enable_rx_dma), (32 bytes). + Removing drv_spi_master.o(i.drv_spi_m_enable_tx_dma), (28 bytes). + Removing drv_spi_master.o(i.drv_spi_m_gpio_init), (32 bytes). + Removing drv_spi_master.o(i.drv_spi_m_set_intr_callback), (12 bytes). + Removing drv_spi_master.o(i.drv_spi_m_write_data), (44 bytes). + Removing drv_spi_master.o(i.drv_spi_master_init), (164 bytes). + Removing drv_swire.o(.rev16_text), (4 bytes). + Removing drv_swire.o(.revsh_text), (4 bytes). + Removing drv_swire.o(i.drv_swire_enable), (28 bytes). + Removing drv_swire.o(i.drv_swire_register_callback), (12 bytes). + Removing drv_swire.o(i.drv_swire_set_bit_time), (24 bytes). + Removing drv_swire.o(i.drv_swire_set_pulse_count), (12 bytes). + Removing drv_sys_cfg.o(.rev16_text), (4 bytes). + Removing drv_sys_cfg.o(.revsh_text), (4 bytes). + Removing drv_sys_cfg.o(i.drv_sys_cfg_dma_req_mask), (32 bytes). + Removing drv_sys_cfg.o(i.drv_sys_cfg_read_version0_id), (12 bytes). + Removing drv_sys_cfg.o(i.drv_sys_cfg_set_ap_reset), (28 bytes). + Removing drv_timer.o(.rev16_text), (4 bytes). + Removing drv_timer.o(.revsh_text), (4 bytes). + Removing drv_timer.o(i.drv_timer_get_status), (38 bytes). + Removing drv_timer.o(i.drv_timer_set_repeat), (16 bytes). + Removing dcs_packet_fifo.o(i.dcs_packet_get_fifo_size), (16 bytes). + Removing hal_internal_vsync.o(.rev16_text), (4 bytes). + Removing hal_internal_vsync.o(.revsh_text), (4 bytes). + Removing hal_internal_vsync.o(i.hal_internal_vsync_set_dcs_direct_mode), (48 bytes). + Removing drv_dsi_rx.o(.rev16_text), (4 bytes). + Removing drv_dsi_rx.o(.revsh_text), (4 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_get_phy_stopstate), (66 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_get_version), (4 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_phy_resistor_calibration), (236 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_pg_cfg), (32 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_pg_cfg), (48 bytes). + Removing drv_dsi_rx.o(i.drv_rx_phy_test_read), (12 bytes). + Removing drv_dsi_tx.o(.rev16_text), (4 bytes). + Removing drv_dsi_tx.o(.revsh_text), (4 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_command_get_payload), (4 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_force_interrupt), (8 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_get_phy_status), (6 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_forcepll), (12 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_resistor_calibration), (232 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_start), (18 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_status_pll_lock), (10 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ulpsactivenot), (62 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_trigger), (92 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter), (344 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit), (276 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_sdf_3d), (28 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_set_bta), (22 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_set_vpg), (70 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_version), (4 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_vid_shadow), (16 bytes). + Removing drv_dsi_tx.o(i.drv_tx_phy_test_read), (10 bytes). + Removing drv_lcdc.o(.rev16_text), (4 bytes). + Removing drv_lcdc.o(.revsh_text), (4 bytes). + Removing drv_lcdc.o(i.drv_lcdc_config_rgb_to_pentile), (26 bytes). + Removing drv_lcdc.o(i.drv_lcdc_config_sclu_filter), (54 bytes). + Removing drv_lcdc.o(i.drv_lcdc_enable), (42 bytes). + Removing drv_lcdc.o(i.drv_lcdc_get_disp_buff_pix), (16 bytes). + Removing drv_lcdc.o(i.drv_lcdc_get_read_buff_data), (40 bytes). + Removing drv_memc.o(.rev16_text), (4 bytes). + Removing drv_memc.o(.revsh_text), (4 bytes). + Removing drv_memc.o(i.drv_memc_set_ahb2ram), (14 bytes). + Removing drv_memc.o(i.drv_memc_set_fb_pri_inverse), (16 bytes). + Removing drv_memc.o(i.drv_memc_set_inten), (20 bytes). + Removing drv_phy_common.o(.rev16_text), (4 bytes). + Removing drv_phy_common.o(.revsh_text), (4 bytes). + Removing drv_phy_common.o(i.drv_phy_test_read), (8 bytes). + Removing drv_rxbr.o(.rev16_text), (4 bytes). + Removing drv_rxbr.o(.revsh_text), (4 bytes). + Removing drv_rxbr.o(i.drv_rxbr_dsc_flush), (16 bytes). + Removing drv_rxbr.o(i.drv_rxbr_err_reset), (98 bytes). + Removing drv_rxbr.o(i.drv_rxbr_get_ipi_vsync_interval), (8 bytes). + Removing drv_rxbr.o(i.drv_rxbr_get_pix_fmt), (8 bytes). + Removing drv_rxbr.o(i.drv_rxbr_hline_rcv1_cfg), (10 bytes). + Removing drv_rxbr.o(i.drv_rxbr_hw_rcv_cmd), (8 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_col_addr), (4 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_compress), (24 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_page_addr), (4 bytes). + Removing drv_vidc.o(.rev16_text), (4 bytes). + Removing drv_vidc.o(.revsh_text), (4 bytes). + Removing drv_vidc.o(i.drv_vidc_clear_status0), (14 bytes). + Removing drv_vidc.o(i.drv_vidc_debug_cap_pixel), (24 bytes). + Removing drv_vidc.o(i.drv_vidc_debug_signal_frame), (30 bytes). + Removing drv_vidc.o(i.drv_vidc_get_irq_status), (18 bytes). + Removing drv_vidc.o(i.drv_vidc_get_status0), (20 bytes). + Removing drv_vidc.o(i.drv_vidc_get_status1), (20 bytes). + Removing drv_vidc.o(i.drv_vidc_get_status2), (6 bytes). + Removing drv_vidc.o(i.drv_vidc_set_dsc_thresh), (4 bytes). + Removing drv_vidc.o(i.drv_vidc_set_frmst_latency), (4 bytes). + Removing drv_vidc.o(i.drv_vidc_set_inff_thresh), (12 bytes). + Removing drv_vidc.o(i.drv_vidc_set_outff_thresh), (14 bytes). + Removing drv_vidc.o(i.drv_vidc_set_parameter), (576 bytes). + Removing drv_vidc.o(i.drv_vidc_set_pentile_swap), (24 bytes). + Removing drv_vidc.o(i.drv_vidc_set_y4t2_hinit), (14 bytes). + Removing drv_vidc.o(i.drv_vidc_set_y4t2_vinit), (14 bytes). + Removing drv_vidc.o(i.drv_vidc_update_src_format), (14 bytes). + Removing drv_vidc.o(.conststring), (344 bytes). + Removing irq_redirect .o(.rev16_text), (4 bytes). + Removing irq_redirect .o(.revsh_text), (4 bytes). + Removing drv_chip_info.o(.rev16_text), (4 bytes). + Removing drv_chip_info.o(.revsh_text), (4 bytes). + Removing drv_dsc_dec.o(.rev16_text), (4 bytes). + Removing drv_dsc_dec.o(.revsh_text), (4 bytes). + Removing drv_dsc_dec.o(i.drv_dsc_dec_set_u32_pps), (120 bytes). + Removing hal_spi_slave.o(.rev16_text), (4 bytes). + Removing hal_spi_slave.o(.revsh_text), (4 bytes). + Removing hal_spi_slave.o(i.hal_spi_s_set_high_impedance), (94 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_auto_transfer_abort), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_auto_transfer_start), (52 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_busy), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_deinit), (10 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_disable), (12 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_enable), (96 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_flush_fifo), (28 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_get_rxfifo_notempty), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_gpio_init), (8 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_init), (76 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_read_data), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_register_callback), (12 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_reset_tx), (68 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_set_auto_rx_buffer), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_set_auto_tx_buffer), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_write_data), (14 bytes). + Removing drv_fls_dma.o(.rev16_text), (4 bytes). + Removing drv_fls_dma.o(.revsh_text), (4 bytes). + Removing drv_fls_dma.o(i.fls_abort_dma), (42 bytes). + Removing drv_fls_dma.o(i.fls_dma_disable), (10 bytes). + Removing drv_fls_dma.o(i.fls_dma_enable), (10 bytes). + Removing drv_fls_dma.o(i.fls_dma_read_prepare), (22 bytes). + Removing drv_fls_dma.o(i.fls_dma_rw_prepare), (100 bytes). + Removing drv_fls_dma.o(i.fls_dma_write_prepare), (22 bytes). + Removing drv_fls_dma.o(i.fls_read_dmacallback), (36 bytes). + Removing drv_fls_dma.o(i.fls_transfer_create_handle_dma), (188 bytes). + Removing drv_fls_dma.o(i.fls_transfer_dma), (102 bytes). + Removing drv_fls_dma.o(i.fls_transfer_get_receive_count_dma), (34 bytes). + Removing drv_fls_dma.o(i.fls_write_dmacallback), (36 bytes). + Removing drv_fls_dma.o(.data), (8 bytes). + Removing drv_pwm.o(.rev16_text), (4 bytes). + Removing drv_pwm.o(.revsh_text), (4 bytes). + Removing drv_pwm.o(i.drv_pwm_in_clear_pwm_int_all), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_in_enable), (32 bytes). + Removing drv_pwm.o(i.drv_pwm_in_get_counter_period), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_in_get_current_count), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_in_get_high_period), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_in_get_low_period), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_in_register_callback), (24 bytes). + Removing drv_pwm.o(i.drv_pwm_in_set_pwm_int), (32 bytes). + Removing drv_pwm.o(i.drv_pwm_in_set_sys_int), (52 bytes). + Removing drv_pwm.o(i.drv_pwm_out_enable), (32 bytes). + Removing drv_pwm.o(i.drv_pwm_out_get_sync_flag), (16 bytes). + Removing drv_pwm.o(i.drv_pwm_out_pause), (28 bytes). + Removing drv_pwm.o(i.drv_pwm_out_set_control), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_out_set_period), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_out_set_sync_mode), (32 bytes). + Removing drv_pwm.o(i.drv_pwm_out_set_threshold), (12 bytes). + Removing drv_uart.o(.rev16_text), (4 bytes). + Removing drv_uart.o(.revsh_text), (4 bytes). + Removing drv_uart.o(i.UART_AbortReceive), (30 bytes). + Removing drv_uart.o(i.UART_AbortSend), (30 bytes). + Removing drv_uart.o(i.UART_Deinit), (28 bytes). + Removing drv_uart.o(i.UART_Disable_IT), (68 bytes). + Removing drv_uart.o(i.UART_EnableDma), (32 bytes). + Removing drv_uart.o(i.UART_Enable_IT), (44 bytes). + Removing drv_uart.o(i.UART_GetDefaultConfig), (72 bytes). + Removing drv_uart.o(i.UART_GetFIFO_Ctrl), (20 bytes). + Removing drv_uart.o(i.UART_GetReceiveCount), (22 bytes). + Removing drv_uart.o(i.UART_GetReceiveStatus), (20 bytes). + Removing drv_uart.o(i.UART_GetRxRingBufferLength), (28 bytes). + Removing drv_uart.o(i.UART_GetSendCount), (22 bytes). + Removing drv_uart.o(i.UART_GetSendStatus), (20 bytes). + Removing drv_uart.o(i.UART_ReadBlocking), (32 bytes). + Removing drv_uart.o(i.UART_ReceiveNonBlocking), (50 bytes). + Removing drv_uart.o(i.UART_ResetTxFIFO), (36 bytes). + Removing drv_uart.o(i.UART_SendNonBlocking), (38 bytes). + Removing drv_uart.o(i.UART_TransferCreateHandle), (96 bytes). + Removing drv_uart.o(i.UART_TransferStartRingBuffer), (30 bytes). + Removing drv_uart.o(.constdata), (1 bytes). + Removing drv_uart_dma.o(.rev16_text), (4 bytes). + Removing drv_uart_dma.o(.revsh_text), (4 bytes). + Removing drv_uart_dma.o(i.UART_DMAInit), (70 bytes). + Removing drv_uart_dma.o(i.UART_TransferAbortReceiveDMA), (16 bytes). + Removing drv_uart_dma.o(i.UART_TransferAbortSendDMA), (16 bytes). + Removing drv_uart_dma.o(i.UART_TransferCreateHandleDMA), (168 bytes). + Removing drv_uart_dma.o(i.UART_TransferGetReceiveCountDMA), (34 bytes). + Removing drv_uart_dma.o(i.UART_TransferReceiveDMA), (54 bytes). + Removing drv_uart_dma.o(i.UART_TransferReceiveDMACallback), (38 bytes). + Removing drv_uart_dma.o(i.UART_TransferSendDMA), (54 bytes). + Removing drv_uart_dma.o(i.UART_TransferSendDMACallback), (38 bytes). + Removing drv_uart_dma.o(.data), (8 bytes). + Removing drv_wdg.o(.rev16_text), (4 bytes). + Removing drv_wdg.o(.revsh_text), (4 bytes). + Removing drv_wdg.o(i.drv_wdg_enable), (32 bytes). + Removing drv_wdg.o(i.drv_wdg_load_match), (12 bytes). + Removing drv_wdg.o(i.drv_wdg_register_callback), (12 bytes). + Removing drv_wdg.o(i.drv_wdg_sel_mode), (28 bytes). + Removing drv_wdg.o(i.drv_wdg_set_repeat), (12 bytes). + Removing drv_spi_slave.o(.rev16_text), (4 bytes). + Removing drv_spi_slave.o(.revsh_text), (4 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_deinit), (52 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_disable_int), (64 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_enable), (32 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_enable_int), (72 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_enable_rx_dma), (32 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_enable_tx_dma), (28 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_gpio_init), (24 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_read_data), (32 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_set_intr_callback), (12 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_write_data), (44 bytes). + Removing drv_spi_slave.o(i.drv_spi_slave_init), (76 bytes). + Removing drv_spi_slave.o(.data), (4 bytes). + +570 unused section(s) (total 22786 bytes) removed from the image. + +============================================================================== + +Image Symbol Table + + Local Symbols + + Symbol Name Value Ov Type Size Object(Section) + + ../clib/../cmprslib/zerorunl2.c 0x00000000 Number 0 __dczerorl2.o ABSOLUTE + ../clib/microlib/division.c 0x00000000 Number 0 uldiv.o ABSOLUTE + ../clib/microlib/division.c 0x00000000 Number 0 idiv.o ABSOLUTE + ../clib/microlib/division.c 0x00000000 Number 0 uidiv.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry10b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry10a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry9b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry8b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry8a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry7b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry9a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry7a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry5.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry2.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry11a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry11b.o ABSOLUTE + ../clib/microlib/longlong.c 0x00000000 Number 0 llshl.o ABSOLUTE + ../clib/microlib/longlong.c 0x00000000 Number 0 llushr.o ABSOLUTE + ../clib/microlib/longlong.c 0x00000000 Number 0 llsshr.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf7.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf6.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf5.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf4.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf2.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf1.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf0.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printfb.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf3.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printfa.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf8.o ABSOLUTE + ../clib/microlib/printf/stubs.s 0x00000000 Number 0 stubs.o ABSOLUTE + ../clib/microlib/stdio/streams.c 0x00000000 Number 0 stdout.o ABSOLUTE + ../clib/microlib/string/memcpy.c 0x00000000 Number 0 memcpyb.o ABSOLUTE + ../clib/microlib/string/memcpy.c 0x00000000 Number 0 memcpya.o ABSOLUTE + ../clib/microlib/string/memset.c 0x00000000 Number 0 memseta.o ABSOLUTE + ../clib/microlib/stubs.s 0x00000000 Number 0 iusefp.o ABSOLUTE + ../fplib/microlib/f2d.c 0x00000000 Number 0 f2d.o ABSOLUTE + ../fplib/microlib/fpadd.c 0x00000000 Number 0 fadd.o ABSOLUTE + ../fplib/microlib/fpadd.c 0x00000000 Number 0 dadd.o ABSOLUTE + ../fplib/microlib/fpdiv.c 0x00000000 Number 0 fdiv.o ABSOLUTE + ../fplib/microlib/fpdiv.c 0x00000000 Number 0 ddiv.o ABSOLUTE + ../fplib/microlib/fpepilogue.c 0x00000000 Number 0 depilogue.o ABSOLUTE + ../fplib/microlib/fpepilogue.c 0x00000000 Number 0 fepilogue.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 ffixi.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 ffixui.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 dfixui.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 dfixul.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 dfixi.o ABSOLUTE + ../fplib/microlib/fpflt.c 0x00000000 Number 0 ffltui.o ABSOLUTE + ../fplib/microlib/fpflt.c 0x00000000 Number 0 dfltui.o ABSOLUTE + ../fplib/microlib/fpflt.c 0x00000000 Number 0 fflti.o ABSOLUTE + ../fplib/microlib/fpmul.c 0x00000000 Number 0 fmul.o ABSOLUTE + ../fplib/microlib/fpmul.c 0x00000000 Number 0 dmul.o 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..\\..\\..\\src\\sdk\\lark\\src\\hal\\hal_system.c 0x00000000 Number 0 hal_system.o ABSOLUTE + ..\\..\\..\\src\\sdk\\lark\\src\\hal\\hal_timer.c 0x00000000 Number 0 hal_timer.o ABSOLUTE + ..\\..\\..\\src\\sdk\\lark\\src\\hal\\hal_uart.c 0x00000000 Number 0 hal_uart.o ABSOLUTE + ..\\..\\..\\src\\sdk\\lark\\src\\hal\\internal\\norflash.c 0x00000000 Number 0 norflash.o ABSOLUTE + ..\\..\\src\\app\\demo\\ap_demo.c 0x00000000 Number 0 ap_demo.o ABSOLUTE + ..\\..\\src\\app\\demo\\app_tp_for_custom_s8.c 0x00000000 Number 0 app_tp_for_custom_s8.o ABSOLUTE + ..\\..\\src\\app\\demo\\app_tp_transfer.c 0x00000000 Number 0 app_tp_transfer.o ABSOLUTE + ..\\..\\src\\app\\main.c 0x00000000 Number 0 main.o ABSOLUTE + ..\\..\\src\\board\\board.c 0x00000000 Number 0 board.o ABSOLUTE + cdrcmple.s 0x00000000 Number 0 cdrcmple.o ABSOLUTE + cfrcmple.s 0x00000000 Number 0 cfrcmple.o ABSOLUTE + dc.s 0x00000000 Number 0 dc.o ABSOLUTE + handlers.s 0x00000000 Number 0 handlers.o ABSOLUTE + init.s 0x00000000 Number 0 init.o ABSOLUTE + RESET 0x00010000 Section 192 startup_armcm0.o(RESET) + .ARM.Collect$$$$00000000 0x000100c0 Section 0 entry.o(.ARM.Collect$$$$00000000) + .ARM.Collect$$$$00000001 0x000100c0 Section 4 entry2.o(.ARM.Collect$$$$00000001) + .ARM.Collect$$$$00000004 0x000100c4 Section 4 entry5.o(.ARM.Collect$$$$00000004) + .ARM.Collect$$$$00000008 0x000100c8 Section 0 entry7b.o(.ARM.Collect$$$$00000008) + .ARM.Collect$$$$0000000A 0x000100c8 Section 0 entry8b.o(.ARM.Collect$$$$0000000A) + .ARM.Collect$$$$0000000B 0x000100c8 Section 8 entry9a.o(.ARM.Collect$$$$0000000B) + .ARM.Collect$$$$0000000D 0x000100d0 Section 0 entry10a.o(.ARM.Collect$$$$0000000D) + .ARM.Collect$$$$0000000F 0x000100d0 Section 0 entry11a.o(.ARM.Collect$$$$0000000F) + .ARM.Collect$$$$00002712 0x000100d0 Section 4 entry2.o(.ARM.Collect$$$$00002712) + __lit__00000000 0x000100d0 Data 4 entry2.o(.ARM.Collect$$$$00002712) + .text 0x000100d4 Section 120 startup_armcm0.o(.text) + .text 0x0001014c Section 0 uidiv.o(.text) + .text 0x00010178 Section 0 idiv.o(.text) + .text 0x000101a0 Section 0 memcpya.o(.text) + .text 0x000101c4 Section 0 memseta.o(.text) + .text 0x000101e8 Section 0 fadd.o(.text) + .text 0x0001029a Section 0 fmul.o(.text) + .text 0x00010314 Section 0 fdiv.o(.text) + .text 0x00010390 Section 0 fscalb.o(.text) + .text 0x000103a8 Section 0 dadd.o(.text) + .text 0x0001050c Section 0 fflti.o(.text) + .text 0x00010522 Section 0 ffltui.o(.text) + .text 0x00010530 Section 0 dfltui.o(.text) + .text 0x0001054c Section 0 ffixi.o(.text) + .text 0x0001057e Section 0 ffixui.o(.text) + .text 0x000105a8 Section 0 dfixi.o(.text) + .text 0x000105f0 Section 0 dfixui.o(.text) + .text 0x0001062c Section 0 f2d.o(.text) + .text 0x00010654 Section 20 cfrcmple.o(.text) + .text 0x00010668 Section 0 uldiv.o(.text) + .text 0x000106c8 Section 0 llshl.o(.text) + .text 0x000106e8 Section 0 llushr.o(.text) + .text 0x0001070a Section 0 llsshr.o(.text) + .text 0x00010730 Section 0 fepilogue.o(.text) + .text 0x00010730 Section 0 iusefp.o(.text) + .text 0x000107b2 Section 0 depilogue.o(.text) + .text 0x00010870 Section 0 dmul.o(.text) + .text 0x00010940 Section 0 ddiv.o(.text) + .text 0x00010a30 Section 0 dfixul.o(.text) + .text 0x00010a70 Section 40 cdrcmple.o(.text) + .text 0x00010a98 Section 36 init.o(.text) + .text 0x00010abc Section 0 __dczerorl2.o(.text) + i.ADC_IRQn_Handler 0x00010b14 Section 0 irq_redirect .o(i.ADC_IRQn_Handler) + i.AP_NRESET_IRQn_Handler 0x00010b2c Section 0 irq_redirect .o(i.AP_NRESET_IRQn_Handler) + i.DMA_IRQn_Handler 0x00010b48 Section 0 irq_redirect .o(i.DMA_IRQn_Handler) + i.EXTI_INT0_IRQn_Handler 0x00010b5c Section 0 irq_redirect .o(i.EXTI_INT0_IRQn_Handler) + i.EXTI_INT1_IRQn_Handler 0x00010b78 Section 0 irq_redirect .o(i.EXTI_INT1_IRQn_Handler) + i.EXTI_INT2_IRQn_Handler 0x00010b94 Section 0 irq_redirect .o(i.EXTI_INT2_IRQn_Handler) + i.EXTI_INT3_IRQn_Handler 0x00010bb0 Section 0 irq_redirect .o(i.EXTI_INT3_IRQn_Handler) + i.EXTI_INT4_IRQn_Handler 0x00010bcc Section 0 irq_redirect .o(i.EXTI_INT4_IRQn_Handler) + i.EXTI_INT5_IRQn_Handler 0x00010be8 Section 0 irq_redirect .o(i.EXTI_INT5_IRQn_Handler) + i.EXTI_INT6_IRQn_Handler 0x00010c04 Section 0 irq_redirect .o(i.EXTI_INT6_IRQn_Handler) + i.EXTI_INT7_IRQn_Handler 0x00010c20 Section 0 irq_redirect .o(i.EXTI_INT7_IRQn_Handler) + i.FLSCTRL_IRQn_Handler 0x00010c3c Section 0 irq_redirect .o(i.FLSCTRL_IRQn_Handler) + i.Gpio_swire_output 0x00010c50 Section 0 ap_demo.o(i.Gpio_swire_output) + i.HardFault_Handler 0x00010cc4 Section 0 irq_redirect .o(i.HardFault_Handler) + i.I2C0_IRQn_Handler 0x00010cd8 Section 0 irq_redirect .o(i.I2C0_IRQn_Handler) + i.I2C1_IRQn_Handler 0x00010cf0 Section 0 irq_redirect .o(i.I2C1_IRQn_Handler) + i.LCDC_IRQn_Handler 0x00010d08 Section 0 irq_redirect .o(i.LCDC_IRQn_Handler) + i.LOG_printf 0x00010d20 Section 0 tau_log.o(i.LOG_printf) + i.MEMC_IRQn_Handler 0x00010d48 Section 0 irq_redirect .o(i.MEMC_IRQn_Handler) + i.MIPI_RX_IRQn_Handler 0x00010d60 Section 0 irq_redirect .o(i.MIPI_RX_IRQn_Handler) + i.MIPI_TX_IRQn_Handler 0x00010d78 Section 0 irq_redirect .o(i.MIPI_TX_IRQn_Handler) + i.PWMDET_IRQn_Handler 0x00010d90 Section 0 irq_redirect .o(i.PWMDET_IRQn_Handler) + i.S20_Start_init 0x00010dac Section 0 app_tp_transfer.o(i.S20_Start_init) + i.SPIM_IRQn_Handler 0x00010ed0 Section 0 irq_redirect .o(i.SPIM_IRQn_Handler) + i.SPIS_IRQn_Handler 0x00010eec Section 0 irq_redirect .o(i.SPIS_IRQn_Handler) + i.SWIRE_IRQn_Handler 0x00010f08 Section 0 irq_redirect .o(i.SWIRE_IRQn_Handler) + i.SysTick_Handler 0x00010f24 Section 0 irq_redirect .o(i.SysTick_Handler) + i.TIMER0_IRQn_Handler 0x00010f3c Section 0 irq_redirect .o(i.TIMER0_IRQn_Handler) + i.TIMER1_IRQn_Handler 0x00010f54 Section 0 irq_redirect .o(i.TIMER1_IRQn_Handler) + i.TIMER2_IRQn_Handler 0x00010f6c Section 0 irq_redirect .o(i.TIMER2_IRQn_Handler) + i.TIMER3_IRQn_Handler 0x00010f84 Section 0 irq_redirect .o(i.TIMER3_IRQn_Handler) + i.UART_DisableDma 0x00010f9c Section 0 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i.VPRE_IRQn_Handler 0x00011298 Section 0 irq_redirect .o(i.VPRE_IRQn_Handler) + i.WDG_IRQn_Handler 0x000112b0 Section 0 irq_redirect .o(i.WDG_IRQn_Handler) + i.__0printf 0x000112c8 Section 0 printfa.o(i.__0printf) + i.__0vsprintf 0x000112e8 Section 0 printfa.o(i.__0vsprintf) + i.__ARM_clz 0x0001130c Section 0 depilogue.o(i.__ARM_clz) + i.__ARM_common_switch8 0x0001133a Section 0 ap_demo.o(i.__ARM_common_switch8) + i.__NVIC_ClearPendingIRQ 0x00011354 Section 0 drv_i2c_master.o(i.__NVIC_ClearPendingIRQ) + __NVIC_ClearPendingIRQ 0x00011355 Thumb Code 18 drv_i2c_master.o(i.__NVIC_ClearPendingIRQ) + i.__NVIC_ClearPendingIRQ 0x0001136c Section 0 drv_i2c_slave.o(i.__NVIC_ClearPendingIRQ) + __NVIC_ClearPendingIRQ 0x0001136d Thumb Code 18 drv_i2c_slave.o(i.__NVIC_ClearPendingIRQ) + i.__NVIC_SetPriority 0x00011384 Section 0 hal_spi_slave.o(i.__NVIC_SetPriority) + __NVIC_SetPriority 0x00011385 Thumb Code 60 hal_spi_slave.o(i.__NVIC_SetPriority) + i.__scatterload_copy 0x000113c8 Section 14 handlers.o(i.__scatterload_copy) + i.__scatterload_zeroinit 0x000113d6 Section 14 handlers.o(i.__scatterload_zeroinit) + i._fp_digits 0x000113e4 Section 0 printfa.o(i._fp_digits) + _fp_digits 0x000113e5 Thumb Code 344 printfa.o(i._fp_digits) + i._printf_core 0x00011558 Section 0 printfa.o(i._printf_core) + _printf_core 0x00011559 Thumb Code 1754 printfa.o(i._printf_core) + i._printf_post_padding 0x00011c44 Section 0 printfa.o(i._printf_post_padding) + _printf_post_padding 0x00011c45 Thumb Code 32 printfa.o(i._printf_post_padding) + i._printf_pre_padding 0x00011c64 Section 0 printfa.o(i._printf_pre_padding) + _printf_pre_padding 0x00011c65 Thumb Code 44 printfa.o(i._printf_pre_padding) + i._sputc 0x00011c90 Section 0 printfa.o(i._sputc) + _sputc 0x00011c91 Thumb Code 10 printfa.o(i._sputc) + i.ap_dcs_read 0x00011c9c Section 0 ap_demo.o(i.ap_dcs_read) + ap_dcs_read 0x00011c9d Thumb Code 5006 ap_demo.o(i.ap_dcs_read) + i.ap_demo 0x00013030 Section 0 ap_demo.o(i.ap_demo) + i.ap_get_reg_ca 0x000131cc Section 0 ap_demo.o(i.ap_get_reg_ca) + ap_get_reg_ca 0x000131cd Thumb Code 38 ap_demo.o(i.ap_get_reg_ca) + i.ap_get_reg_df 0x000131f8 Section 0 ap_demo.o(i.ap_get_reg_df) + ap_get_reg_df 0x000131f9 Thumb Code 172 ap_demo.o(i.ap_get_reg_df) + i.ap_reset_cb 0x000132a8 Section 0 ap_demo.o(i.ap_reset_cb) + ap_reset_cb 0x000132a9 Thumb Code 40 ap_demo.o(i.ap_reset_cb) + i.ap_set_backlight 0x00013304 Section 0 ap_demo.o(i.ap_set_backlight) + ap_set_backlight 0x00013305 Thumb Code 832 ap_demo.o(i.ap_set_backlight) + i.ap_set_display_off 0x00013664 Section 0 ap_demo.o(i.ap_set_display_off) + ap_set_display_off 0x00013665 Thumb Code 42 ap_demo.o(i.ap_set_display_off) + i.ap_set_display_on 0x000136bc Section 0 ap_demo.o(i.ap_set_display_on) + ap_set_display_on 0x000136bd Thumb Code 22 ap_demo.o(i.ap_set_display_on) + i.ap_set_enter_sleep_mode 0x000136fc Section 0 ap_demo.o(i.ap_set_enter_sleep_mode) + ap_set_enter_sleep_mode 0x000136fd Thumb Code 42 ap_demo.o(i.ap_set_enter_sleep_mode) + i.ap_set_exit_sleep_mode 0x0001375c Section 0 ap_demo.o(i.ap_set_exit_sleep_mode) + ap_set_exit_sleep_mode 0x0001375d Thumb Code 20 ap_demo.o(i.ap_set_exit_sleep_mode) + i.ap_set_tp_calibration_04 0x000137a0 Section 0 ap_demo.o(i.ap_set_tp_calibration_04) + ap_set_tp_calibration_04 0x000137a1 Thumb Code 22 ap_demo.o(i.ap_set_tp_calibration_04) + i.ap_tp_calibration 0x000137bc Section 0 app_tp_transfer.o(i.ap_tp_calibration) + i.ap_tp_scan_point_init 0x0001386c Section 0 app_tp_transfer.o(i.ap_tp_scan_point_init) + i.ap_tp_scan_point_record_event 0x00013888 Section 0 app_tp_transfer.o(i.ap_tp_scan_point_record_event) + i.ap_tp_scan_point_record_event_exec 0x00013924 Section 0 app_tp_transfer.o(i.ap_tp_scan_point_record_event_exec) + i.ap_tp_simulate_finger_release_event 0x00013974 Section 0 app_tp_transfer.o(i.ap_tp_simulate_finger_release_event) + i.ap_tp_system_softReset 0x000139a8 Section 0 app_tp_transfer.o(i.ap_tp_system_softReset) + i.app_AP_NRESET_IRQn_Handler 0x000139e8 Section 0 drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) + i.app_EXTI_INT0_IRQn_Handler 0x00013a0c Section 0 drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) + i.app_EXTI_INT1_IRQn_Handler 0x00013a28 Section 0 drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) + i.app_EXTI_INT2_IRQn_Handler 0x00013a44 Section 0 drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) + i.app_EXTI_INT3_IRQn_Handler 0x00013a60 Section 0 drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) + i.app_EXTI_INT4_IRQn_Handler 0x00013a7c Section 0 drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) + i.app_EXTI_INT5_IRQn_Handler 0x00013a98 Section 0 drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) + i.app_EXTI_INT6_IRQn_Handler 0x00013ab4 Section 0 drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) + i.app_EXTI_INT7_IRQn_Handler 0x00013ad0 Section 0 drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) + i.app_HardFault_Handler 0x00013aec Section 0 drv_common.o(i.app_HardFault_Handler) + i.app_I2C0_IRQn_Handler 0x00013b34 Section 0 drv_i2c_slave.o(i.app_I2C0_IRQn_Handler) + i.app_I2C1_IRQn_Handler 0x00013b44 Section 0 drv_i2c_master.o(i.app_I2C1_IRQn_Handler) + i.app_LCDC_IRQn_Handler 0x00013b54 Section 0 hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) + i.app_MEMC_IRQn_Handler 0x00013c34 Section 0 drv_memc.o(i.app_MEMC_IRQn_Handler) + i.app_MIPI_RX_IRQn_Handler 0x00013c94 Section 0 drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) + i.app_MIPI_TX_IRQn_Handler 0x00013f2c Section 0 drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) + i.app_PWMDET_IRQn_Handler 0x00013fcc Section 0 drv_pwm.o(i.app_PWMDET_IRQn_Handler) + i.app_SPIM_IRQn_Handler 0x00014014 Section 0 drv_spi_master.o(i.app_SPIM_IRQn_Handler) + i.app_SPIS_IRQn_Handler 0x00014034 Section 0 hal_spi_slave.o(i.app_SPIS_IRQn_Handler) + i.app_SWIRE_IRQn_Handler 0x00014234 Section 0 drv_swire.o(i.app_SWIRE_IRQn_Handler) + i.app_SysTick_Handler 0x00014254 Section 0 drv_common.o(i.app_SysTick_Handler) + i.app_TIMER0_IRQn_Handler 0x0001426c Section 0 drv_timer.o(i.app_TIMER0_IRQn_Handler) + i.app_TIMER1_IRQn_Handler 0x00014276 Section 0 drv_timer.o(i.app_TIMER1_IRQn_Handler) + i.app_TIMER2_IRQn_Handler 0x00014280 Section 0 drv_timer.o(i.app_TIMER2_IRQn_Handler) + i.app_TIMER3_IRQn_Handler 0x0001428a Section 0 drv_timer.o(i.app_TIMER3_IRQn_Handler) + i.app_UART_IRQn_Handler 0x00014294 Section 0 drv_uart.o(i.app_UART_IRQn_Handler) + i.app_VIDC_IRQn_Handler 0x0001429c Section 0 hal_internal_vsync.o(i.app_VIDC_IRQn_Handler) + i.app_VPRE_IRQn_Handler 0x00014380 Section 0 hal_internal_vsync.o(i.app_VPRE_IRQn_Handler) + i.app_WDG_IRQn_Handler 0x00014604 Section 0 drv_wdg.o(i.app_WDG_IRQn_Handler) + i.app_dma_irq_handler 0x0001463c Section 0 drv_dma.o(i.app_dma_irq_handler) + i.app_fls_ctrl_Handler 0x00014644 Section 0 norflash.o(i.app_fls_ctrl_Handler) + i.app_tp_I2C_init 0x00014674 Section 0 app_tp_transfer.o(i.app_tp_I2C_init) + i.app_tp_calibration_exec 0x00014698 Section 0 ap_demo.o(i.app_tp_calibration_exec) + i.app_tp_i2cs_callback 0x000146f4 Section 0 app_tp_transfer.o(i.app_tp_i2cs_callback) + app_tp_i2cs_callback 0x000146f5 Thumb Code 10 app_tp_transfer.o(i.app_tp_i2cs_callback) + i.app_tp_init 0x00014700 Section 0 app_tp_transfer.o(i.app_tp_init) + i.app_tp_m_read 0x00014748 Section 0 app_tp_transfer.o(i.app_tp_m_read) + app_tp_m_read 0x00014749 Thumb Code 32 app_tp_transfer.o(i.app_tp_m_read) + i.app_tp_m_transfer_complate 0x00014768 Section 0 app_tp_transfer.o(i.app_tp_m_transfer_complate) + i.app_tp_m_write 0x00014770 Section 0 app_tp_transfer.o(i.app_tp_m_write) + app_tp_m_write 0x00014771 Thumb Code 8 app_tp_transfer.o(i.app_tp_m_write) + i.app_tp_phone_analysis_data 0x00014778 Section 0 app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) + i.app_tp_phone_clear_reset_on 0x00014b94 Section 0 app_tp_transfer.o(i.app_tp_phone_clear_reset_on) + i.app_tp_s_read 0x00014ba0 Section 0 app_tp_transfer.o(i.app_tp_s_read) + i.app_tp_s_write 0x00014ba8 Section 0 app_tp_transfer.o(i.app_tp_s_write) + i.app_tp_screen_analysis_int 0x00014bb0 Section 0 app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) + i.app_tp_screen_init 0x00014e80 Section 0 app_tp_transfer.o(i.app_tp_screen_init) + i.app_tp_screen_int_callback 0x00014eb0 Section 0 app_tp_transfer.o(i.app_tp_screen_int_callback) + app_tp_screen_int_callback 0x00014eb1 Thumb Code 8 app_tp_transfer.o(i.app_tp_screen_int_callback) + i.app_tp_screen_int_init 0x00014ebc Section 0 app_tp_transfer.o(i.app_tp_screen_int_init) + app_tp_screen_int_init 0x00014ebd Thumb Code 48 app_tp_transfer.o(i.app_tp_screen_int_init) + i.app_tp_screen_int_lvl_low 0x00014ef4 Section 0 app_tp_transfer.o(i.app_tp_screen_int_lvl_low) + app_tp_screen_int_lvl_low 0x00014ef5 Thumb Code 4 app_tp_transfer.o(i.app_tp_screen_int_lvl_low) + i.app_tp_transfer_phone 0x00014ef8 Section 0 app_tp_transfer.o(i.app_tp_transfer_phone) + app_tp_transfer_phone 0x00014ef9 Thumb Code 44 app_tp_transfer.o(i.app_tp_transfer_phone) + i.app_tp_transfer_screen_const 0x00014f28 Section 0 app_tp_transfer.o(i.app_tp_transfer_screen_const) + app_tp_transfer_screen_const 0x00014f29 Thumb Code 50 app_tp_transfer.o(i.app_tp_transfer_screen_const) + i.app_tp_transfer_screen_int 0x00014f68 Section 0 app_tp_transfer.o(i.app_tp_transfer_screen_int) + i.app_tp_transfer_screen_start 0x00015148 Section 0 app_tp_transfer.o(i.app_tp_transfer_screen_start) + i.blue_change_ccm 0x00015160 Section 0 ap_demo.o(i.blue_change_ccm) + i.board_Init 0x00015198 Section 0 board.o(i.board_Init) + i.calc_framebuffer_setting 0x000151b4 Section 0 hal_internal_vsync.o(i.calc_framebuffer_setting) + calc_framebuffer_setting 0x000151b5 Thumb Code 462 hal_internal_vsync.o(i.calc_framebuffer_setting) + i.ceil 0x000153a0 Section 0 ceil.o(i.ceil) + i.check_mipi_rx_tx_video_info 0x00015468 Section 0 hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) + check_mipi_rx_tx_video_info 0x00015469 Thumb Code 44 hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) + i.check_pkt_buf_rev 0x00015494 Section 0 hal_internal_vsync.o(i.check_pkt_buf_rev) + check_pkt_buf_rev 0x00015495 Thumb Code 38 hal_internal_vsync.o(i.check_pkt_buf_rev) + i.dcs_packet_fifo_alloc 0x000154c0 Section 0 dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) + i.dcs_packet_fifo_init 0x00015518 Section 0 dcs_packet_fifo.o(i.dcs_packet_fifo_init) + i.dcs_packet_free_fifo_header 0x00015530 Section 0 dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) + i.dcs_packet_get_fifo_header 0x00015574 Section 0 dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) + i.dcs_sw_filter 0x00015598 Section 0 hal_internal_vsync.o(i.dcs_sw_filter) + dcs_sw_filter 0x00015599 Thumb Code 24 hal_internal_vsync.o(i.dcs_sw_filter) + i.delayMs 0x000155b4 Section 0 tau_delay.o(i.delayMs) + i.delayUs 0x000155cc Section 0 tau_delay.o(i.delayUs) + i.disable_mipi_timer_cb 0x000155f0 Section 0 ap_demo.o(i.disable_mipi_timer_cb) + disable_mipi_timer_cb 0x000155f1 Thumb Code 88 ap_demo.o(i.disable_mipi_timer_cb) + i.drv_ap_rst_trig_edge_detect 0x00015684 Section 0 drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) + i.drv_chip_info_get_version 0x000156bc Section 0 drv_chip_info.o(i.drv_chip_info_get_version) + i.drv_chip_info_init 0x000156c8 Section 0 drv_chip_info.o(i.drv_chip_info_init) + i.drv_chip_rx_info_check 0x00015778 Section 0 drv_chip_info.o(i.drv_chip_rx_info_check) + i.drv_chip_rx_init_done 0x000157d4 Section 0 drv_chip_info.o(i.drv_chip_rx_init_done) + i.drv_common_enable_systick 0x000157e8 Section 0 drv_common.o(i.drv_common_enable_systick) + i.drv_common_system_init 0x00015840 Section 0 drv_common.o(i.drv_common_system_init) + i.drv_crgu_config_reset_modules 0x00015870 Section 0 drv_crgu.o(i.drv_crgu_config_reset_modules) + i.drv_crgu_set_ahb_pre_div 0x00015880 Section 0 drv_crgu.o(i.drv_crgu_set_ahb_pre_div) + i.drv_crgu_set_ahb_src 0x00015894 Section 0 drv_crgu.o(i.drv_crgu_set_ahb_src) + i.drv_crgu_set_clock 0x000158a8 Section 0 drv_crgu.o(i.drv_crgu_set_clock) + i.drv_crgu_set_dpi_mux_src 0x000158c8 Section 0 drv_crgu.o(i.drv_crgu_set_dpi_mux_src) + i.drv_crgu_set_dpi_pre_div 0x000158dc Section 0 drv_crgu.o(i.drv_crgu_set_dpi_pre_div) + i.drv_crgu_set_dpi_pre_src 0x000158f4 Section 0 drv_crgu.o(i.drv_crgu_set_dpi_pre_src) + i.drv_crgu_set_dsc_core_div 0x00015908 Section 0 drv_crgu.o(i.drv_crgu_set_dsc_core_div) + i.drv_crgu_set_dsco_src 0x0001591c Section 0 drv_crgu.o(i.drv_crgu_set_dsco_src) + i.drv_crgu_set_dsco_src_div 0x00015930 Section 0 drv_crgu.o(i.drv_crgu_set_dsco_src_div) + i.drv_crgu_set_fb_div 0x00015944 Section 0 drv_crgu.o(i.drv_crgu_set_fb_div) + i.drv_crgu_set_fb_src 0x00015958 Section 0 drv_crgu.o(i.drv_crgu_set_fb_src) + i.drv_crgu_set_lcdc_div 0x0001596c Section 0 drv_crgu.o(i.drv_crgu_set_lcdc_div) + i.drv_crgu_set_lcdc_src 0x00015980 Section 0 drv_crgu.o(i.drv_crgu_set_lcdc_src) + i.drv_crgu_set_mipi_cfg_src 0x00015994 Section 0 drv_crgu.o(i.drv_crgu_set_mipi_cfg_src) + i.drv_crgu_set_mipi_ref_src 0x000159a8 Section 0 drv_crgu.o(i.drv_crgu_set_mipi_ref_src) + i.drv_crgu_set_reset 0x000159c0 Section 0 drv_crgu.o(i.drv_crgu_set_reset) + i.drv_crgu_set_rxbr_div 0x000159d8 Section 0 drv_crgu.o(i.drv_crgu_set_rxbr_div) + i.drv_crgu_set_rxbr_src 0x000159ec Section 0 drv_crgu.o(i.drv_crgu_set_rxbr_src) + i.drv_crgu_set_vidc_src 0x00015a00 Section 0 drv_crgu.o(i.drv_crgu_set_vidc_src) + i.drv_dma_clear_flag 0x00015a14 Section 0 drv_dma.o(i.drv_dma_clear_flag) + i.drv_dma_create_handle 0x00015a30 Section 0 drv_dma.o(i.drv_dma_create_handle) + i.drv_dma_disenable_channel 0x00015a48 Section 0 drv_dma.o(i.drv_dma_disenable_channel) + i.drv_dma_enable_channel 0x00015a60 Section 0 drv_dma.o(i.drv_dma_enable_channel) + i.drv_dma_enable_channel_interrupts 0x00015a78 Section 0 drv_dma.o(i.drv_dma_enable_channel_interrupts) + i.drv_dma_enable_cycle 0x00015aac Section 0 drv_dma.o(i.drv_dma_enable_cycle) + i.drv_dma_get_channel_flag 0x00015adc Section 0 drv_dma.o(i.drv_dma_get_channel_flag) + i.drv_dma_irq_handler 0x00015af0 Section 0 drv_dma.o(i.drv_dma_irq_handler) + i.drv_dma_prepar_transfer 0x00015b6c Section 0 drv_dma.o(i.drv_dma_prepar_transfer) + i.drv_dma_set_burst 0x00015b84 Section 0 drv_dma.o(i.drv_dma_set_burst) + i.drv_dma_set_callback 0x00015ba0 Section 0 drv_dma.o(i.drv_dma_set_callback) + i.drv_dma_set_transfer 0x00015ba8 Section 0 drv_dma.o(i.drv_dma_set_transfer) + i.drv_dsc_dec_convert_pps_rc_parameter 0x00015bec Section 0 drv_dsc_dec.o(i.drv_dsc_dec_convert_pps_rc_parameter) + i.drv_dsc_dec_disable 0x00015c22 Section 0 drv_dsc_dec.o(i.drv_dsc_dec_disable) + i.drv_dsc_dec_enable 0x00015c30 Section 0 drv_dsc_dec.o(i.drv_dsc_dec_enable) + i.drv_dsc_dec_get_nslc 0x00015ce4 Section 0 drv_dsc_dec.o(i.drv_dsc_dec_get_nslc) + i.drv_dsc_dec_set_u8_pps 0x00015cee Section 0 drv_dsc_dec.o(i.drv_dsc_dec_set_u8_pps) + i.drv_dsi_rx_calc_ipi_tx_delay 0x00015d18 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) + i.drv_dsi_rx_enable_irq 0x00015e1c Section 0 drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) + i.drv_dsi_rx_get_color_bpp 0x00015e5c Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) + drv_dsi_rx_get_color_bpp 0x00015e5d Thumb Code 62 drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) + i.drv_dsi_rx_get_color_pcc 0x00015eac Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_color_pcc) + drv_dsi_rx_get_color_pcc 0x00015ead Thumb Code 24 drv_dsi_rx.o(i.drv_dsi_rx_get_color_pcc) + i.drv_dsi_rx_get_compression_en 0x00015ec8 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) + i.drv_dsi_rx_get_max_ret_size 0x00015ed0 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_max_ret_size) + i.drv_dsi_rx_power_up 0x00015ed6 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_power_up) + i.drv_dsi_rx_set_ctrl_cfg 0x00015ee4 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_ctrl_cfg) + i.drv_dsi_rx_set_ddi_cfg 0x00015f00 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) + i.drv_dsi_rx_set_inten 0x00015f10 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_inten) + i.drv_dsi_rx_set_ipi_cfg 0x00015f14 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_cfg) + i.drv_dsi_rx_set_resp_cnt 0x00015f24 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_resp_cnt) + i.drv_dsi_rx_set_up_phy 0x00015f4c Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) + i.drv_dsi_rx_shut_down 0x00015fdc Section 0 drv_dsi_rx.o(i.drv_dsi_rx_shut_down) + i.drv_dsi_tx_command_header 0x00015fea Section 0 drv_dsi_tx.o(i.drv_dsi_tx_command_header) + i.drv_dsi_tx_command_mode_cfg 0x00015ffe Section 0 drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) + i.drv_dsi_tx_command_put_payload 0x0001606a Section 0 drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) + i.drv_dsi_tx_config_eotp 0x0001606e Section 0 drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) + i.drv_dsi_tx_config_int 0x00016086 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_config_int) + i.drv_dsi_tx_dpi_lpcmd_time 0x0001608e Section 0 drv_dsi_tx.o(i.drv_dsi_tx_dpi_lpcmd_time) + i.drv_dsi_tx_dpi_mode 0x00016096 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_dpi_mode) + i.drv_dsi_tx_dpi_polarity 0x000160a0 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_dpi_polarity) + i.drv_dsi_tx_get_cmd_status 0x000160c4 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) + i.drv_dsi_tx_mode 0x000160c8 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_mode) + i.drv_dsi_tx_phy_clock_lane_auto_lp 0x000160cc Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_auto_lp) + i.drv_dsi_tx_phy_clock_lane_req_hs 0x000160e4 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) + i.drv_dsi_tx_phy_lane_mode 0x000160fe Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_lane_mode) + i.drv_dsi_tx_phy_status_ready 0x0001610a Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ready) + i.drv_dsi_tx_phy_status_stopstate 0x0001616e Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) + i.drv_dsi_tx_phy_test_setup 0x000161ac Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) + i.drv_dsi_tx_phy_time_cfg 0x00016290 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_time_cfg) + i.drv_dsi_tx_powerup 0x000162ae Section 0 drv_dsi_tx.o(i.drv_dsi_tx_powerup) + i.drv_dsi_tx_response_mode 0x000162b6 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_response_mode) + i.drv_dsi_tx_set_bta_ack 0x000162d2 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_bta_ack) + i.drv_dsi_tx_set_esc_div 0x000162ea Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) + i.drv_dsi_tx_set_int 0x000162f8 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_int) + i.drv_dsi_tx_set_time_out_div 0x0001632c Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_time_out_div) + i.drv_dsi_tx_set_video_chunk 0x0001633c Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_video_chunk) + i.drv_dsi_tx_set_video_timing 0x00016344 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_video_timing) + i.drv_dsi_tx_shutdown 0x00016366 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_shutdown) + i.drv_dsi_tx_timeout_cfg 0x0001636e Section 0 drv_dsi_tx.o(i.drv_dsi_tx_timeout_cfg) + i.drv_dsi_tx_video_mode_cfg 0x00016394 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_cfg) + i.drv_dsi_tx_video_mode_disable_hact_cmd 0x0001643e Section 0 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_disable_hact_cmd) + i.drv_dsi_tx_video_mode_set_lp_cmd 0x00016454 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_set_lp_cmd) + i.drv_gpio_get_input_data 0x0001646c Section 0 drv_gpio.o(i.drv_gpio_get_input_data) + i.drv_gpio_register_ap_reset_callback 0x00016484 Section 0 drv_gpio.o(i.drv_gpio_register_ap_reset_callback) + i.drv_gpio_register_callback 0x00016490 Section 0 drv_gpio.o(i.drv_gpio_register_callback) + i.drv_gpio_set_int 0x000164a4 Section 0 drv_gpio.o(i.drv_gpio_set_int) + i.drv_gpio_set_ioe 0x000164e8 Section 0 drv_gpio.o(i.drv_gpio_set_ioe) + i.drv_gpio_set_mode0 0x00016508 Section 0 drv_gpio.o(i.drv_gpio_set_mode0) + i.drv_gpio_set_mode1 0x00016518 Section 0 drv_gpio.o(i.drv_gpio_set_mode1) + i.drv_gpio_set_mode2 0x00016528 Section 0 drv_gpio.o(i.drv_gpio_set_mode2) + i.drv_gpio_set_mode3 0x00016538 Section 0 drv_gpio.o(i.drv_gpio_set_mode3) + i.drv_gpio_set_output_data 0x00016548 Section 0 hal_gpio.o(i.drv_gpio_set_output_data) + drv_gpio_set_output_data 0x00016549 Thumb Code 26 hal_gpio.o(i.drv_gpio_set_output_data) + i.drv_gpio_set_pull_state 0x00016568 Section 0 drv_gpio.o(i.drv_gpio_set_pull_state) + i.drv_i2c_clear_m_it_pending_bit 0x00016698 Section 0 drv_i2c_master.o(i.drv_i2c_clear_m_it_pending_bit) + i.drv_i2c_clear_s_it_pending_bit 0x000166f8 Section 0 drv_i2c_slave.o(i.drv_i2c_clear_s_it_pending_bit) + i.drv_i2c_dma_callback 0x00016754 Section 0 drv_i2c_dma.o(i.drv_i2c_dma_callback) + drv_i2c_dma_callback 0x00016755 Thumb Code 38 drv_i2c_dma.o(i.drv_i2c_dma_callback) + i.drv_i2c_dma_init 0x00016788 Section 0 drv_i2c_dma.o(i.drv_i2c_dma_init) + i.drv_i2c_enable_rx_dma 0x00016834 Section 0 drv_i2c_dma.o(i.drv_i2c_enable_rx_dma) + i.drv_i2c_enable_tx_dma 0x0001684e Section 0 drv_i2c_dma.o(i.drv_i2c_enable_tx_dma) + i.drv_i2c_m_enable_intr 0x00016868 Section 0 drv_i2c_master.o(i.drv_i2c_m_enable_intr) + i.drv_i2c_m_set_callback 0x000168a0 Section 0 drv_i2c_master.o(i.drv_i2c_m_set_callback) + i.drv_i2c_master_init 0x000168ac Section 0 drv_i2c_master.o(i.drv_i2c_master_init) + i.drv_i2c_master_read_dma 0x00016938 Section 0 drv_i2c_dma.o(i.drv_i2c_master_read_dma) + i.drv_i2c_master_write_dma 0x000169b4 Section 0 drv_i2c_dma.o(i.drv_i2c_master_write_dma) + i.drv_i2c_master_write_read_cmd 0x000169f4 Section 0 drv_i2c_dma.o(i.drv_i2c_master_write_read_cmd) + drv_i2c_master_write_read_cmd 0x000169f5 Thumb Code 46 drv_i2c_dma.o(i.drv_i2c_master_write_read_cmd) + i.drv_i2c_s_enable_intr 0x00016a24 Section 0 drv_i2c_slave.o(i.drv_i2c_s_enable_intr) + i.drv_i2c_s_get_fifo_status 0x00016a58 Section 0 drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) + i.drv_i2c_s_set_callback 0x00016a74 Section 0 drv_i2c_slave.o(i.drv_i2c_s_set_callback) + i.drv_i2c_s_write_data 0x00016a80 Section 0 drv_i2c_slave.o(i.drv_i2c_s_write_data) + i.drv_i2c_set_dma_irq_callback 0x00016aa0 Section 0 drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) + i.drv_i2c_slave_init 0x00016af0 Section 0 drv_i2c_slave.o(i.drv_i2c_slave_init) + i.drv_i2c_slave_write_dma 0x00016b34 Section 0 drv_i2c_dma.o(i.drv_i2c_slave_write_dma) + i.drv_lcdc_config_420_to_444_mode 0x00016b58 Section 0 drv_lcdc.o(i.drv_lcdc_config_420_to_444_mode) + i.drv_lcdc_config_bypass 0x00016b70 Section 0 drv_lcdc.o(i.drv_lcdc_config_bypass) + i.drv_lcdc_config_cbcr 0x00016b88 Section 0 drv_lcdc.o(i.drv_lcdc_config_cbcr) + i.drv_lcdc_config_ccm 0x00016ba0 Section 0 drv_lcdc.o(i.drv_lcdc_config_ccm) + i.drv_lcdc_config_disp_mode 0x00016bd0 Section 0 drv_lcdc.o(i.drv_lcdc_config_disp_mode) + i.drv_lcdc_config_dpi_polarity 0x00016be6 Section 0 drv_lcdc.o(i.drv_lcdc_config_dpi_polarity) + i.drv_lcdc_config_dpi_timing 0x00016c0a Section 0 drv_lcdc.o(i.drv_lcdc_config_dpi_timing) + i.drv_lcdc_config_endianness 0x00016c30 Section 0 drv_lcdc.o(i.drv_lcdc_config_endianness) + i.drv_lcdc_config_horiz_flip 0x00016c46 Section 0 drv_lcdc.o(i.drv_lcdc_config_horiz_flip) + i.drv_lcdc_config_input_size 0x00016c66 Section 0 drv_lcdc.o(i.drv_lcdc_config_input_size) + i.drv_lcdc_config_int 0x00016c72 Section 0 drv_lcdc.o(i.drv_lcdc_config_int) + i.drv_lcdc_config_int_single 0x00016c90 Section 0 drv_lcdc.o(i.drv_lcdc_config_int_single) + i.drv_lcdc_config_overwrite 0x00016cb2 Section 0 drv_lcdc.o(i.drv_lcdc_config_overwrite) + i.drv_lcdc_config_overwrite_rgb 0x00016cd4 Section 0 drv_lcdc.o(i.drv_lcdc_config_overwrite_rgb) + i.drv_lcdc_config_partial_display_area 0x00016ce0 Section 0 drv_lcdc.o(i.drv_lcdc_config_partial_display_area) + i.drv_lcdc_config_partial_display_enable 0x00016cfa Section 0 drv_lcdc.o(i.drv_lcdc_config_partial_display_enable) + i.drv_lcdc_config_src_parameter 0x00016d1c Section 0 drv_lcdc.o(i.drv_lcdc_config_src_parameter) + i.drv_lcdc_config_thresh 0x00016d8e Section 0 drv_lcdc.o(i.drv_lcdc_config_thresh) + i.drv_lcdc_config_upscaler 0x00016d96 Section 0 drv_lcdc.o(i.drv_lcdc_config_upscaler) + i.drv_lcdc_config_yuv420_threshold 0x00016df6 Section 0 drv_lcdc.o(i.drv_lcdc_config_yuv420_threshold) + i.drv_lcdc_ctrl_flow 0x00016e00 Section 0 drv_lcdc.o(i.drv_lcdc_ctrl_flow) + i.drv_lcdc_enable_shadow_reg 0x00016e12 Section 0 drv_lcdc.o(i.drv_lcdc_enable_shadow_reg) + i.drv_lcdc_set_int 0x00016e34 Section 0 drv_lcdc.o(i.drv_lcdc_set_int) + i.drv_lcdc_start 0x00016e68 Section 0 drv_lcdc.o(i.drv_lcdc_start) + i.drv_lcdc_update_shadow_reg 0x00016e88 Section 0 drv_lcdc.o(i.drv_lcdc_update_shadow_reg) + i.drv_memc_bypass_fifo_empty 0x00016e94 Section 0 drv_memc.o(i.drv_memc_bypass_fifo_empty) + i.drv_memc_clear_status 0x00016ea4 Section 0 drv_memc.o(i.drv_memc_clear_status) + i.drv_memc_enable_irq 0x00016eb0 Section 0 drv_memc.o(i.drv_memc_enable_irq) + i.drv_memc_gen_a_tear_signal 0x00016ef0 Section 0 drv_memc.o(i.drv_memc_gen_a_tear_signal) + i.drv_memc_get_status 0x00016efc Section 0 drv_memc.o(i.drv_memc_get_status) + i.drv_memc_rate_transfer_sel 0x00016f0e Section 0 drv_memc.o(i.drv_memc_rate_transfer_sel) + i.drv_memc_sel_vsync 0x00016f1e Section 0 drv_memc.o(i.drv_memc_sel_vsync) + i.drv_memc_set_data_mode 0x00016f2c Section 0 drv_memc.o(i.drv_memc_set_data_mode) + i.drv_memc_set_tear_hwclr 0x00016f38 Section 0 drv_memc.o(i.drv_memc_set_tear_hwclr) + i.drv_memc_set_tear_mode 0x00016f48 Section 0 drv_memc.o(i.drv_memc_set_tear_mode) + i.drv_memc_set_tear_waveform 0x00016f58 Section 0 drv_memc.o(i.drv_memc_set_tear_waveform) + i.drv_memc_set_yuv420_cfg 0x00016f7c Section 0 drv_memc.o(i.drv_memc_set_yuv420_cfg) + i.drv_param_get_picture_quality_setting 0x00016f8c Section 0 drv_param_init.o(i.drv_param_get_picture_quality_setting) + i.drv_param_init_get_ccm 0x00016f9c Section 0 drv_param_init.o(i.drv_param_init_get_ccm) + i.drv_param_init_get_scld_filter_h 0x00016fa4 Section 0 drv_param_init.o(i.drv_param_init_get_scld_filter_h) + i.drv_param_init_get_scld_filter_v 0x00016fb8 Section 0 drv_param_init.o(i.drv_param_init_get_scld_filter_v) + i.drv_param_init_get_sclu_filter_h 0x00016fcc Section 0 drv_param_init.o(i.drv_param_init_get_sclu_filter_h) + i.drv_param_init_get_sclu_filter_v 0x00016fd4 Section 0 drv_param_init.o(i.drv_param_init_get_sclu_filter_v) + i.drv_param_init_set_ccm 0x00016fdc Section 0 drv_param_init.o(i.drv_param_init_set_ccm) + i.drv_param_p2r_filter_init 0x00016ff0 Section 0 drv_param_init.o(i.drv_param_p2r_filter_init) + i.drv_param_yuv420_filter_init 0x0001702c Section 0 drv_param_init.o(i.drv_param_yuv420_filter_init) + i.drv_phy_get_pll_para 0x00017060 Section 0 drv_phy_common.o(i.drv_phy_get_pll_para) + i.drv_phy_get_rate_para 0x000170c0 Section 0 drv_phy_common.o(i.drv_phy_get_rate_para) + i.drv_phy_test_clear 0x00017114 Section 0 drv_phy_common.o(i.drv_phy_test_clear) + i.drv_phy_test_lock 0x00017124 Section 0 drv_phy_common.o(i.drv_phy_test_lock) + i.drv_phy_test_write_1_byte 0x0001713c Section 0 drv_phy_common.o(i.drv_phy_test_write_1_byte) + i.drv_phy_test_write_2_byte 0x0001715c Section 0 drv_phy_common.o(i.drv_phy_test_write_2_byte) + i.drv_phy_test_write_code 0x00017182 Section 0 drv_phy_common.o(i.drv_phy_test_write_code) + i.drv_phy_test_write_data 0x000171a0 Section 0 drv_phy_common.o(i.drv_phy_test_write_data) + drv_phy_test_write_data 0x000171a1 Thumb Code 32 drv_phy_common.o(i.drv_phy_test_write_data) + i.drv_pwr_set_cp_mode 0x000171c0 Section 0 drv_pwr.o(i.drv_pwr_set_cp_mode) + i.drv_pwr_set_pvd_mode 0x000171e0 Section 0 drv_pwr.o(i.drv_pwr_set_pvd_mode) + i.drv_pwr_set_system_clk_src 0x000171fc Section 0 drv_pwr.o(i.drv_pwr_set_system_clk_src) + i.drv_rx_phy_test_clear 0x0001722c Section 0 drv_dsi_rx.o(i.drv_rx_phy_test_clear) + drv_rx_phy_test_clear 0x0001722d Thumb Code 12 drv_dsi_rx.o(i.drv_rx_phy_test_clear) + i.drv_rx_phy_test_lock 0x00017238 Section 0 drv_dsi_rx.o(i.drv_rx_phy_test_lock) + drv_rx_phy_test_lock 0x00017239 Thumb Code 16 drv_dsi_rx.o(i.drv_rx_phy_test_lock) + i.drv_rx_phy_test_write_1_byte 0x00017248 Section 0 drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) + drv_rx_phy_test_write_1_byte 0x00017249 Thumb Code 20 drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) + i.drv_rx_phy_test_write_2_byte 0x0001725c Section 0 drv_dsi_rx.o(i.drv_rx_phy_test_write_2_byte) + drv_rx_phy_test_write_2_byte 0x0001725d Thumb Code 22 drv_dsi_rx.o(i.drv_rx_phy_test_write_2_byte) + i.drv_rxbr_clear_pkt_buffer 0x00017272 Section 0 drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) + i.drv_rxbr_clear_status 0x00017278 Section 0 drv_rxbr.o(i.drv_rxbr_clear_status) + i.drv_rxbr_enable_irq 0x0001727c Section 0 drv_rxbr.o(i.drv_rxbr_enable_irq) + i.drv_rxbr_frame_drop_cfg 0x000172bc Section 0 drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) + i.drv_rxbr_get_clk 0x000172c4 Section 0 drv_rxbr.o(i.drv_rxbr_get_clk) + i.drv_rxbr_get_col_addr 0x00017300 Section 0 drv_rxbr.o(i.drv_rxbr_get_col_addr) + i.drv_rxbr_get_cur_hline_rcv_cnt 0x00017304 Section 0 drv_rxbr.o(i.drv_rxbr_get_cur_hline_rcv_cnt) + i.drv_rxbr_get_hline_rcv_cfg 0x0001730c Section 0 drv_rxbr.o(i.drv_rxbr_get_hline_rcv_cfg) + i.drv_rxbr_get_int_source 0x0001731c Section 0 hal_internal_vsync.o(i.drv_rxbr_get_int_source) + drv_rxbr_get_int_source 0x0001731d Thumb Code 18 hal_internal_vsync.o(i.drv_rxbr_get_int_source) + i.drv_rxbr_get_page_addr 0x0001732e Section 0 drv_rxbr.o(i.drv_rxbr_get_page_addr) + i.drv_rxbr_get_status 0x00017332 Section 0 hal_dsi_rx_ctrl.o(i.drv_rxbr_get_status) + drv_rxbr_get_status 0x00017333 Thumb Code 18 hal_dsi_rx_ctrl.o(i.drv_rxbr_get_status) + i.drv_rxbr_get_status 0x00017344 Section 0 hal_internal_vsync.o(i.drv_rxbr_get_status) + drv_rxbr_get_status 0x00017345 Thumb Code 18 hal_internal_vsync.o(i.drv_rxbr_get_status) + i.drv_rxbr_hline_rcv0_cfg 0x00017356 Section 0 drv_rxbr.o(i.drv_rxbr_hline_rcv0_cfg) + i.drv_rxbr_hline_rcv_cfg 0x00017362 Section 0 drv_rxbr.o(i.drv_rxbr_hline_rcv_cfg) + i.drv_rxbr_set_ack_pkt_header 0x0001736a Section 0 drv_rxbr.o(i.drv_rxbr_set_ack_pkt_header) + i.drv_rxbr_set_cmd_filter 0x0001737e Section 0 drv_rxbr.o(i.drv_rxbr_set_cmd_filter) + i.drv_rxbr_set_color_format 0x0001744a Section 0 drv_rxbr.o(i.drv_rxbr_set_color_format) + i.drv_rxbr_set_inten 0x0001745e Section 0 drv_rxbr.o(i.drv_rxbr_set_inten) + i.drv_rxbr_set_usr_cfg 0x00017472 Section 0 drv_rxbr.o(i.drv_rxbr_set_usr_cfg) + i.drv_rxbr_set_usr_col 0x00017494 Section 0 drv_rxbr.o(i.drv_rxbr_set_usr_col) + i.drv_rxbr_set_usr_row 0x0001749c Section 0 drv_rxbr.o(i.drv_rxbr_set_usr_row) + i.drv_spi_m_read_data 0x000174a4 Section 0 drv_spi_master.o(i.drv_spi_m_read_data) + i.drv_swire_set_int 0x000174c4 Section 0 drv_swire.o(i.drv_swire_set_int) + i.drv_swire_set_power_down 0x0001750c Section 0 drv_swire.o(i.drv_swire_set_power_down) + i.drv_sys_cfg_clear_all_int 0x00017528 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_clear_all_int) + i.drv_sys_cfg_clear_pending 0x00017534 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) + i.drv_sys_cfg_sel_ap_rst_lvl_trig 0x0001755c Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_lvl_trig) + i.drv_sys_cfg_sel_ap_rst_trig 0x00017574 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) + i.drv_sys_cfg_sel_gpio_group 0x00017590 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_gpio_group) + i.drv_sys_cfg_sel_int_trig 0x000175b4 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_int_trig) + i.drv_sys_cfg_set_dma_rx_req 0x000175d8 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) + i.drv_sys_cfg_set_dma_tx_req 0x000175e8 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) + i.drv_sys_cfg_set_int 0x000175f8 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_set_int) + i.drv_timer_clear_status_flags 0x0001761c Section 0 drv_timer.o(i.drv_timer_clear_status_flags) + drv_timer_clear_status_flags 0x0001761d Thumb Code 26 drv_timer.o(i.drv_timer_clear_status_flags) + i.drv_timer_enable 0x00017636 Section 0 drv_timer.o(i.drv_timer_enable) + i.drv_timer_get_instance 0x00017658 Section 0 drv_timer.o(i.drv_timer_get_instance) + i.drv_timer_get_prescaler 0x00017668 Section 0 drv_timer.o(i.drv_timer_get_prescaler) + i.drv_timer_handle_interrupt 0x00017678 Section 0 drv_timer.o(i.drv_timer_handle_interrupt) + drv_timer_handle_interrupt 0x00017679 Thumb Code 54 drv_timer.o(i.drv_timer_handle_interrupt) + i.drv_timer_register_callback 0x000176b4 Section 0 drv_timer.o(i.drv_timer_register_callback) + i.drv_timer_set_compare_val 0x000176c8 Section 0 drv_timer.o(i.drv_timer_set_compare_val) + i.drv_timer_set_int 0x000176d8 Section 0 drv_timer.o(i.drv_timer_set_int) + i.drv_timer_set_prescaler 0x00017720 Section 0 drv_timer.o(i.drv_timer_set_prescaler) + i.drv_tx_phy_test_clear 0x00017748 Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_clear) + drv_tx_phy_test_clear 0x00017749 Thumb Code 10 drv_dsi_tx.o(i.drv_tx_phy_test_clear) + i.drv_tx_phy_test_enter 0x00017752 Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_enter) + i.drv_tx_phy_test_exit 0x0001776e Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_exit) + i.drv_tx_phy_test_write_1_byte 0x0001778a Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) + drv_tx_phy_test_write_1_byte 0x0001778b Thumb Code 18 drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) + i.drv_tx_phy_test_write_2_byte 0x0001779c Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_write_2_byte) + drv_tx_phy_test_write_2_byte 0x0001779d Thumb Code 20 drv_dsi_tx.o(i.drv_tx_phy_test_write_2_byte) + i.drv_tx_phy_test_write_code 0x000177b0 Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_write_code) + drv_tx_phy_test_write_code 0x000177b1 Thumb Code 16 drv_dsi_tx.o(i.drv_tx_phy_test_write_code) + i.drv_vidc_clear_irq 0x000177c0 Section 0 drv_vidc.o(i.drv_vidc_clear_irq) + i.drv_vidc_enable 0x000177c8 Section 0 drv_vidc.o(i.drv_vidc_enable) + i.drv_vidc_enable_irq 0x000177e0 Section 0 drv_vidc.o(i.drv_vidc_enable_irq) + i.drv_vidc_get_int_source 0x00017820 Section 0 drv_vidc.o(i.drv_vidc_get_int_source) + i.drv_vidc_module_enable 0x00017848 Section 0 drv_vidc.o(i.drv_vidc_module_enable) + i.drv_vidc_reset 0x0001788c Section 0 drv_vidc.o(i.drv_vidc_reset) + i.drv_vidc_set_dst_parameter 0x00017892 Section 0 drv_vidc.o(i.drv_vidc_set_dst_parameter) + i.drv_vidc_set_enh_chr 0x000178ee Section 0 drv_vidc.o(i.drv_vidc_set_enh_chr) + i.drv_vidc_set_enh_chr2 0x000178fc Section 0 drv_vidc.o(i.drv_vidc_set_enh_chr2) + i.drv_vidc_set_enh_lum 0x0001790e Section 0 drv_vidc.o(i.drv_vidc_set_enh_lum) + i.drv_vidc_set_gain 0x0001791c Section 0 drv_vidc.o(i.drv_vidc_set_gain) + i.drv_vidc_set_irqen 0x0001794c Section 0 drv_vidc.o(i.drv_vidc_set_irqen) + i.drv_vidc_set_p2r_hcoef0 0x00017960 Section 0 drv_vidc.o(i.drv_vidc_set_p2r_hcoef0) + i.drv_vidc_set_p2r_hcoef1 0x00017968 Section 0 drv_vidc.o(i.drv_vidc_set_p2r_hcoef1) + i.drv_vidc_set_p2r_hinitb 0x00017970 Section 0 drv_vidc.o(i.drv_vidc_set_p2r_hinitb) + i.drv_vidc_set_p2r_hinitr 0x00017998 Section 0 drv_vidc.o(i.drv_vidc_set_p2r_hinitr) + i.drv_vidc_set_p2r_step 0x000179c0 Section 0 drv_vidc.o(i.drv_vidc_set_p2r_step) + i.drv_vidc_set_pu_ctrl 0x000179c8 Section 0 drv_vidc.o(i.drv_vidc_set_pu_ctrl) + i.drv_vidc_set_pu_scld 0x000179e8 Section 0 drv_vidc.o(i.drv_vidc_set_pu_scld) + i.drv_vidc_set_scld_hcoef0 0x000179f6 Section 0 drv_vidc.o(i.drv_vidc_set_scld_hcoef0) + i.drv_vidc_set_scld_hcoef1 0x00017a00 Section 0 drv_vidc.o(i.drv_vidc_set_scld_hcoef1) + i.drv_vidc_set_scld_step 0x00017a0a Section 0 drv_vidc.o(i.drv_vidc_set_scld_step) + i.drv_vidc_set_scld_vcoef0 0x00017a1c Section 0 drv_vidc.o(i.drv_vidc_set_scld_vcoef0) + i.drv_vidc_set_scld_vcoef1 0x00017a26 Section 0 drv_vidc.o(i.drv_vidc_set_scld_vcoef1) + i.drv_vidc_set_sclu_hcoef0c 0x00017a30 Section 0 drv_vidc.o(i.drv_vidc_set_sclu_hcoef0c) + i.drv_vidc_set_sclu_hcoef0y 0x00017a3a Section 0 drv_vidc.o(i.drv_vidc_set_sclu_hcoef0y) + i.drv_vidc_set_sclu_hcoef1c 0x00017a44 Section 0 drv_vidc.o(i.drv_vidc_set_sclu_hcoef1c) + i.drv_vidc_set_sclu_hcoef1y 0x00017a4e Section 0 drv_vidc.o(i.drv_vidc_set_sclu_hcoef1y) + i.drv_vidc_set_sclu_vcoef0c 0x00017a58 Section 0 drv_vidc.o(i.drv_vidc_set_sclu_vcoef0c) + i.drv_vidc_set_sclu_vcoef0y 0x00017a62 Section 0 drv_vidc.o(i.drv_vidc_set_sclu_vcoef0y) + i.drv_vidc_set_sclu_vcoef1c 0x00017a6c Section 0 drv_vidc.o(i.drv_vidc_set_sclu_vcoef1c) + i.drv_vidc_set_sclu_vcoef1y 0x00017a76 Section 0 drv_vidc.o(i.drv_vidc_set_sclu_vcoef1y) + i.drv_vidc_set_src_parameter 0x00017a80 Section 0 drv_vidc.o(i.drv_vidc_set_src_parameter) + i.drv_vidc_set_y4t2_hcoef0 0x00017aa4 Section 0 drv_vidc.o(i.drv_vidc_set_y4t2_hcoef0) + i.drv_vidc_set_y4t2_hcoef1 0x00017aae Section 0 drv_vidc.o(i.drv_vidc_set_y4t2_hcoef1) + i.drv_vidc_set_y4t2_vcoef0 0x00017ab8 Section 0 drv_vidc.o(i.drv_vidc_set_y4t2_vcoef0) + i.drv_vidc_set_y4t2_vcoef1 0x00017ac2 Section 0 drv_vidc.o(i.drv_vidc_set_y4t2_vcoef1) + i.drv_wdg_clear_counter 0x00017acc Section 0 drv_wdg.o(i.drv_wdg_clear_counter) + i.drv_wdg_clear_edge_flag 0x00017adc Section 0 drv_wdg.o(i.drv_wdg_clear_edge_flag) + drv_wdg_clear_edge_flag 0x00017add Thumb Code 12 drv_wdg.o(i.drv_wdg_clear_edge_flag) + i.drv_wdg_read_edge_flag 0x00017aec Section 0 drv_wdg.o(i.drv_wdg_read_edge_flag) + drv_wdg_read_edge_flag 0x00017aed Thumb Code 10 drv_wdg.o(i.drv_wdg_read_edge_flag) + i.drv_wdg_set_int 0x00017afc Section 0 drv_wdg.o(i.drv_wdg_set_int) + i.fls_clear_irq_status 0x00017b30 Section 0 drv_fls.o(i.fls_clear_irq_status) + i.fputc 0x00017b36 Section 0 tau_log.o(i.fputc) + i.hal_dsi_rx_ctrl_create_handle 0x00017b4c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) + i.hal_dsi_rx_ctrl_deinit 0x00017b7c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) + i.hal_dsi_rx_ctrl_dsc_async_handler 0x00017c18 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) + i.hal_dsi_rx_ctrl_gen_a_tear_signal 0x00017c9c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) + i.hal_dsi_rx_ctrl_get_max_ret_size 0x00017cc4 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) + i.hal_dsi_rx_ctrl_init 0x00017cec Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) + i.hal_dsi_rx_ctrl_init_clk 0x00017d50 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) + hal_dsi_rx_ctrl_init_clk 0x00017d51 Thumb Code 218 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) + i.hal_dsi_rx_ctrl_init_dsc_dec 0x00017e74 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsc_dec) + hal_dsi_rx_ctrl_init_dsc_dec 0x00017e75 Thumb Code 66 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsc_dec) + i.hal_dsi_rx_ctrl_init_dsi_rx 0x00017ebc Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) + hal_dsi_rx_ctrl_init_dsi_rx 0x00017ebd Thumb Code 172 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) + i.hal_dsi_rx_ctrl_init_memc 0x00017f88 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) + hal_dsi_rx_ctrl_init_memc 0x00017f89 Thumb Code 186 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) + i.hal_dsi_rx_ctrl_init_rxbr 0x0001804c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) + hal_dsi_rx_ctrl_init_rxbr 0x0001804d Thumb Code 314 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) + i.hal_dsi_rx_ctrl_init_vidc 0x00018198 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) + hal_dsi_rx_ctrl_init_vidc 0x00018199 Thumb Code 892 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) + i.hal_dsi_rx_ctrl_pre_init_pps 0x00018520 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_pre_init_pps) + i.hal_dsi_rx_ctrl_send_ack_cmd 0x0001855c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) + i.hal_dsi_rx_ctrl_set_cus_sync_line 0x0001864c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) + i.hal_dsi_rx_ctrl_set_hw_tear_mode 0x00018680 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode) + i.hal_dsi_rx_ctrl_set_ipi_cfg 0x000186b4 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) + hal_dsi_rx_ctrl_set_ipi_cfg 0x000186b5 Thumb Code 48 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) + i.hal_dsi_rx_ctrl_set_rxbr_clk 0x000186e8 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) + hal_dsi_rx_ctrl_set_rxbr_clk 0x000186e9 Thumb Code 114 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) + i.hal_dsi_rx_ctrl_set_sw_tear_mode 0x0001875c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) + i.hal_dsi_rx_ctrl_start 0x00018790 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) + i.hal_dsi_rx_ctrl_stop 0x000187cc Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) + i.hal_dsi_rx_ctrl_toggle_resolution 0x00018814 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) + i.hal_dsi_tx_calc_video_chunks 0x00018834 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) + hal_dsi_tx_calc_video_chunks 0x00018835 Thumb Code 384 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) + i.hal_dsi_tx_config_params_for_lane_rate 0x000189c4 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) + hal_dsi_tx_config_params_for_lane_rate 0x000189c5 Thumb Code 42 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) + i.hal_dsi_tx_count_lane_rate 0x000189f8 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) + hal_dsi_tx_count_lane_rate 0x000189f9 Thumb Code 950 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) + i.hal_dsi_tx_ctrl_create_handle 0x00018db8 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) + i.hal_dsi_tx_ctrl_deinit 0x00018de4 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) + i.hal_dsi_tx_ctrl_enter_init_panel_mode 0x00018e2c Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) + i.hal_dsi_tx_ctrl_exit_init_panel_mode 0x00018e78 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) + i.hal_dsi_tx_ctrl_init 0x00018e9c Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) + i.hal_dsi_tx_ctrl_init_clk 0x00018f60 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) + hal_dsi_tx_ctrl_init_clk 0x00018f61 Thumb Code 36 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) + i.hal_dsi_tx_ctrl_panel_reset_pin 0x00018f84 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_panel_reset_pin) + i.hal_dsi_tx_ctrl_set_ccm 0x00018f90 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) + i.hal_dsi_tx_ctrl_set_overwrite_rgb 0x00018fb0 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) + i.hal_dsi_tx_ctrl_set_partial_disp 0x00018fc4 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp) + i.hal_dsi_tx_ctrl_set_partial_disp_area 0x00018fd4 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp_area) + i.hal_dsi_tx_ctrl_start 0x00018ff8 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) + i.hal_dsi_tx_ctrl_stop 0x00019058 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) + i.hal_dsi_tx_ctrl_write_array_cmd 0x0001909c Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) + i.hal_dsi_tx_ctrl_write_cmd 0x00019238 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) + i.hal_dsi_tx_init_data_mode 0x00019388 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) + hal_dsi_tx_init_data_mode 0x00019389 Thumb Code 36 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) + i.hal_dsi_tx_init_dpi_cfg 0x000193b0 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) + hal_dsi_tx_init_dpi_cfg 0x000193b1 Thumb Code 42 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) + i.hal_dsi_tx_init_interrupt 0x000193e0 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) + hal_dsi_tx_init_interrupt 0x000193e1 Thumb Code 28 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) + i.hal_dsi_tx_init_phy_cfg 0x00019400 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) + hal_dsi_tx_init_phy_cfg 0x00019401 Thumb Code 28 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) + i.hal_dsi_tx_init_remains 0x00019420 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) + hal_dsi_tx_init_remains 0x00019421 Thumb Code 142 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) + i.hal_dsi_tx_init_video_mode 0x000194b4 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) + hal_dsi_tx_init_video_mode 0x000194b5 Thumb Code 82 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) + i.hal_dsi_tx_send_cmd 0x0001950c Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) + hal_dsi_tx_send_cmd 0x0001950d Thumb Code 60 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) + i.hal_gpio_ctrl_eint 0x00019550 Section 0 hal_gpio.o(i.hal_gpio_ctrl_eint) + i.hal_gpio_get_input_data 0x00019568 Section 0 hal_gpio.o(i.hal_gpio_get_input_data) + i.hal_gpio_init_eint 0x0001957c Section 0 hal_gpio.o(i.hal_gpio_init_eint) + i.hal_gpio_init_input 0x000195bc Section 0 hal_gpio.o(i.hal_gpio_init_input) + i.hal_gpio_init_output 0x000195dc Section 0 hal_gpio.o(i.hal_gpio_init_output) + i.hal_gpio_reg_eint_cb 0x00019604 Section 0 hal_gpio.o(i.hal_gpio_reg_eint_cb) + i.hal_gpio_set_ap_reset_int 0x0001961c Section 0 hal_gpio.o(i.hal_gpio_set_ap_reset_int) + i.hal_gpio_set_mode 0x0001966c Section 0 hal_gpio.o(i.hal_gpio_set_mode) + i.hal_gpio_set_output_data 0x000196cc Section 0 hal_gpio.o(i.hal_gpio_set_output_data) + i.hal_gpio_set_pull_state 0x000196d4 Section 0 hal_gpio.o(i.hal_gpio_set_pull_state) + i.hal_i2c_m_dma_init 0x000196f4 Section 0 hal_i2c_master.o(i.hal_i2c_m_dma_init) + i.hal_i2c_m_dma_read 0x00019760 Section 0 hal_i2c_master.o(i.hal_i2c_m_dma_read) + i.hal_i2c_m_dma_write 0x0001978c Section 0 hal_i2c_master.o(i.hal_i2c_m_dma_write) + i.hal_i2c_m_transfer_complate 0x000197b4 Section 0 hal_i2c_master.o(i.hal_i2c_m_transfer_complate) + i.hal_i2c_master_irq_callback 0x000197d4 Section 0 hal_i2c_master.o(i.hal_i2c_master_irq_callback) + hal_i2c_master_irq_callback 0x000197d5 Thumb Code 24 hal_i2c_master.o(i.hal_i2c_master_irq_callback) + i.hal_i2c_s_dma_user_callback 0x000197f4 Section 0 hal_i2c_slave.o(i.hal_i2c_s_dma_user_callback) + hal_i2c_s_dma_user_callback 0x000197f5 Thumb Code 12 hal_i2c_slave.o(i.hal_i2c_s_dma_user_callback) + i.hal_i2c_s_dma_write 0x00019804 Section 0 hal_i2c_slave.o(i.hal_i2c_s_dma_write) + i.hal_i2c_s_init 0x00019840 Section 0 hal_i2c_slave.o(i.hal_i2c_s_init) + i.hal_i2c_s_nonblocking_read 0x000198ac Section 0 hal_i2c_slave.o(i.hal_i2c_s_nonblocking_read) + i.hal_i2c_s_set_transfer 0x000198c0 Section 0 hal_i2c_slave.o(i.hal_i2c_s_set_transfer) + i.hal_i2c_slave_irq_callback 0x000198cc Section 0 hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) + hal_i2c_slave_irq_callback 0x000198cd Thumb Code 306 hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) + i.hal_internal_init_memc 0x00019a1c Section 0 hal_internal_vsync.o(i.hal_internal_init_memc) + i.hal_internal_sync_get_fb_setting 0x00019acc Section 0 hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) + i.hal_internal_sync_input_resolution_change 0x00019adc Section 0 hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) + i.hal_internal_sync_set_fb_setting_manual 0x00019d28 Section 0 hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual) + i.hal_internal_vsync_deinit 0x00019eb0 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_deinit) + i.hal_internal_vsync_get_rx_state 0x00019ecc Section 0 hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) + i.hal_internal_vsync_get_sync_line 0x00019ed8 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) + i.hal_internal_vsync_get_tx_state 0x00019ef4 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) + i.hal_internal_vsync_get_y2t4_use_sclu 0x00019f00 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_get_y2t4_use_sclu) + i.hal_internal_vsync_init_rx 0x00019f20 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_init_rx) + i.hal_internal_vsync_init_tx 0x00019fdc Section 0 hal_internal_vsync.o(i.hal_internal_vsync_init_tx) + i.hal_internal_vsync_set_auto_hw_filter 0x0001a080 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) + i.hal_internal_vsync_set_rx_state 0x0001a19c Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) + i.hal_internal_vsync_set_sync_line 0x0001a1b4 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) + i.hal_internal_vsync_set_tear_mode 0x0001a1d4 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) + i.hal_internal_vsync_set_tx_state 0x0001a21c Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) + i.hal_lcdc_config_ccm 0x0001a260 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) + hal_lcdc_config_ccm 0x0001a261 Thumb Code 30 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) + i.hal_lcdc_config_remains 0x0001a284 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) + hal_lcdc_config_remains 0x0001a285 Thumb Code 80 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) + i.hal_lcdc_config_rgb_to_pentile 0x0001a2d8 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_rgb_to_pentile) + hal_lcdc_config_rgb_to_pentile 0x0001a2d9 Thumb Code 14 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_rgb_to_pentile) + i.hal_lcdc_config_upscaler 0x0001a2ec Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) + hal_lcdc_config_upscaler 0x0001a2ed Thumb Code 444 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) + i.hal_lcdc_config_yuv_to_rgb 0x0001a4b4 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_yuv_to_rgb) + hal_lcdc_config_yuv_to_rgb 0x0001a4b5 Thumb Code 26 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_yuv_to_rgb) + i.hal_lcdc_init_cfg 0x0001a4d4 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) + hal_lcdc_init_cfg 0x0001a4d5 Thumb Code 58 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) + i.hal_lcdc_init_clk 0x0001a510 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) + hal_lcdc_init_clk 0x0001a511 Thumb Code 376 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) + i.hal_lcdc_init_interrupt 0x0001a690 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) + hal_lcdc_init_interrupt 0x0001a691 Thumb Code 58 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) + i.hal_spi_m_clear_rxfifo 0x0001a6d0 Section 0 hal_spi_master.o(i.hal_spi_m_clear_rxfifo) + i.hal_swire_open 0x0001a6de Section 0 hal_swire.o(i.hal_swire_open) + i.hal_system_enable_systick 0x0001a6f4 Section 0 hal_system.o(i.hal_system_enable_systick) + i.hal_system_init 0x0001a6fc Section 0 hal_system.o(i.hal_system_init) + i.hal_system_init_console 0x0001a784 Section 0 hal_system.o(i.hal_system_init_console) + i.hal_system_set_pvd 0x0001a7a0 Section 0 hal_system.o(i.hal_system_set_pvd) + i.hal_system_set_vcc 0x0001a7a8 Section 0 hal_system.o(i.hal_system_set_vcc) + i.hal_timer_init 0x0001a7b0 Section 0 hal_timer.o(i.hal_timer_init) + i.hal_timer_start 0x0001a7cc Section 0 hal_timer.o(i.hal_timer_start) + i.hal_timer_stop 0x0001a814 Section 0 hal_timer.o(i.hal_timer_stop) + i.hal_uart_init 0x0001a83c Section 0 hal_uart.o(i.hal_uart_init) + i.hal_uart_transmit_blocking 0x0001a8c8 Section 0 hal_uart.o(i.hal_uart_transmit_blocking) + i.handle_init 0x0001a8d8 Section 0 irq_redirect .o(i.handle_init) + i.init_mipi_tx 0x0001a9e0 Section 0 ap_demo.o(i.init_mipi_tx) + init_mipi_tx 0x0001a9e1 Thumb Code 100 ap_demo.o(i.init_mipi_tx) + i.init_panel 0x0001aa48 Section 0 ap_demo.o(i.init_panel) + init_panel 0x0001aa49 Thumb Code 134 ap_demo.o(i.init_panel) + i.main 0x0001ab00 Section 0 main.o(i.main) + i.open_mipi_rx 0x0001ab0c Section 0 ap_demo.o(i.open_mipi_rx) + open_mipi_rx 0x0001ab0d Thumb Code 140 ap_demo.o(i.open_mipi_rx) + i.pps_update_handle 0x0001abb0 Section 0 ap_demo.o(i.pps_update_handle) + pps_update_handle 0x0001abb1 Thumb Code 78 ap_demo.o(i.pps_update_handle) + i.rx_get_dcs_packet_data 0x0001ac04 Section 0 hal_internal_vsync.o(i.rx_get_dcs_packet_data) + rx_get_dcs_packet_data 0x0001ac05 Thumb Code 740 hal_internal_vsync.o(i.rx_get_dcs_packet_data) + i.rx_partial_update 0x0001b014 Section 0 hal_internal_vsync.o(i.rx_partial_update) + rx_partial_update 0x0001b015 Thumb Code 302 hal_internal_vsync.o(i.rx_partial_update) + i.rx_receive_packet 0x0001b150 Section 0 hal_internal_vsync.o(i.rx_receive_packet) + rx_receive_packet 0x0001b151 Thumb Code 90 hal_internal_vsync.o(i.rx_receive_packet) + i.rx_receive_pps 0x0001b1b4 Section 0 hal_internal_vsync.o(i.rx_receive_pps) + rx_receive_pps 0x0001b1b5 Thumb Code 266 hal_internal_vsync.o(i.rx_receive_pps) + i.send_panel_init_code 0x0001b334 Section 0 ap_demo.o(i.send_panel_init_code) + send_panel_init_code 0x0001b335 Thumb Code 42 ap_demo.o(i.send_panel_init_code) + i.soft_disable_mipi_timer_init 0x0001b360 Section 0 ap_demo.o(i.soft_disable_mipi_timer_init) + soft_disable_mipi_timer_init 0x0001b361 Thumb Code 32 ap_demo.o(i.soft_disable_mipi_timer_init) + i.soft_gen_te 0x0001b3c0 Section 0 hal_internal_vsync.o(i.soft_gen_te) + soft_gen_te 0x0001b3c1 Thumb Code 116 hal_internal_vsync.o(i.soft_gen_te) + i.soft_timer3_cb 0x0001b44c Section 0 ap_demo.o(i.soft_timer3_cb) + soft_timer3_cb 0x0001b44d Thumb Code 36 ap_demo.o(i.soft_timer3_cb) + i.tp_heartbeat_exec 0x0001b47c Section 0 ap_demo.o(i.tp_heartbeat_exec) + i.tx_display_on 0x0001b4e8 Section 0 ap_demo.o(i.tx_display_on) + tx_display_on 0x0001b4e9 Thumb Code 16 ap_demo.o(i.tx_display_on) + i.tx_panel_reset 0x0001b4fc Section 0 ap_demo.o(i.tx_panel_reset) + tx_panel_reset 0x0001b4fd Thumb Code 40 ap_demo.o(i.tx_panel_reset) + i.vpre_err_reset 0x0001b524 Section 0 hal_internal_vsync.o(i.vpre_err_reset) + vpre_err_reset 0x0001b525 Thumb Code 184 hal_internal_vsync.o(i.vpre_err_reset) + i.vsync_set_te_mode 0x0001b5f4 Section 0 hal_internal_vsync.o(i.vsync_set_te_mode) + vsync_set_te_mode 0x0001b5f5 Thumb Code 254 hal_internal_vsync.o(i.vsync_set_te_mode) + .constdata 0x0001b790 Section 236 ap_demo.o(.constdata) + g_cus_rx_dcs_execute_table 0x0001b790 Data 108 ap_demo.o(.constdata) + .constdata 0x0001b87c Section 8528 app_tp_for_custom_s8.o(.constdata) + .constdata 0x0001d9cc Section 210 hal_gpio.o(.constdata) + s_gpio_map 0x0001d9cc Data 120 hal_gpio.o(.constdata) + s_gpio_perf 0x0001da44 Data 90 hal_gpio.o(.constdata) + .constdata 0x0001daa0 Section 272 drv_param_init.o(.constdata) + .constdata 0x0001dbb0 Section 390 drv_phy_common.o(.constdata) + phy_para_mapping_h 0x0001dbb0 Data 184 drv_phy_common.o(.constdata) + phy_para_mapping_l 0x0001dc68 Data 128 drv_phy_common.o(.constdata) + phy_data_high_map 0x0001dce8 Data 48 drv_phy_common.o(.constdata) + phy_data_lp_map 0x0001dd18 Data 30 drv_phy_common.o(.constdata) + .conststring 0x0001dd38 Section 72 hal_dsi_rx_ctrl.o(.conststring) + .conststring 0x0001dd80 Section 296 hal_internal_vsync.o(.conststring) + .ARM.__AT_0x00070100 0x00070100 Section 192 irq_redirect .o(.ARM.__AT_0x00070100) + .data 0x000701d0 Section 10009 ap_demo.o(.data) + start_display_on 0x000701d0 Data 1 ap_demo.o(.data) + g_need_enter_sleep_mode 0x000701d1 Data 1 ap_demo.o(.data) + g_mipi_path_off 0x000701d2 Data 1 ap_demo.o(.data) + phone_off_flag 0x000701d3 Data 1 ap_demo.o(.data) + g_exit_sleep_mode 0x000701d4 Data 1 ap_demo.o(.data) + panel_display_done 0x000701d5 Data 1 ap_demo.o(.data) + g_calibration_flag 0x000701da Data 1 ap_demo.o(.data) + b3_read_flag 0x000701db Data 1 ap_demo.o(.data) + c8_read_flag 0x000701dc Data 1 ap_demo.o(.data) + c9_read_flag 0x000701dd Data 1 ap_demo.o(.data) + bl_adj_flag 0x000701e0 Data 1 ap_demo.o(.data) + flag_5a 0x000701e2 Data 1 ap_demo.o(.data) + g_rx_ctrl_handle 0x000701f4 Data 4 ap_demo.o(.data) + g_tx_ctrl_handle 0x000701f8 Data 4 ap_demo.o(.data) + value_reg_df 0x00070204 Data 4 ap_demo.o(.data) + .data 0x000728ea Section 228 app_tp_for_custom_s8.o(.data) + app_tp_count 0x000728f4 Data 1 app_tp_for_custom_s8.o(.data) + phone_85_flag 0x000728f5 Data 1 app_tp_for_custom_s8.o(.data) + phone_F6_flag 0x000728f6 Data 1 app_tp_for_custom_s8.o(.data) + phone_E4_flag 0x000728f7 Data 1 app_tp_for_custom_s8.o(.data) + phone_72_flag 0x000728f8 Data 1 app_tp_for_custom_s8.o(.data) + phone_75_flag 0x000728f9 Data 1 app_tp_for_custom_s8.o(.data) + phone_92_flag 0x000728fa Data 1 app_tp_for_custom_s8.o(.data) + phone_74_flag 0x000728fb Data 1 app_tp_for_custom_s8.o(.data) + u16CoordY 0x000728fe Data 2 app_tp_for_custom_s8.o(.data) + u16CoordX 0x00072900 Data 2 app_tp_for_custom_s8.o(.data) + u16CoordY_back 0x00072902 Data 2 app_tp_for_custom_s8.o(.data) + u16CoordX_back 0x00072904 Data 2 app_tp_for_custom_s8.o(.data) + .data 0x000729ce Section 1 app_tp_for_custom_s8.o(.data) + .data 0x000729cf Section 1 app_tp_for_custom_s8.o(.data) + .data 0x000729d0 Section 1 app_tp_for_custom_s8.o(.data) + .data 0x000729d1 Section 3 app_tp_for_custom_s8.o(.data) + .data 0x000729d4 Section 5 app_tp_for_custom_s8.o(.data) + .data 0x000729dc Section 48 app_tp_for_custom_s8.o(.data) + .data 0x00072a0c Section 49 app_tp_transfer.o(.data) + s_spim_write 0x00072a0c Data 1 app_tp_transfer.o(.data) + s_screen_int_flag 0x00072a0d Data 1 app_tp_transfer.o(.data) + s_phone_reset_flag 0x00072a0e Data 1 app_tp_transfer.o(.data) + s_screen_int_transfer_status 0x00072a0f Data 1 app_tp_transfer.o(.data) + s_screen_const_transfer_count 0x00072a11 Data 1 app_tp_transfer.o(.data) + screen_int_transfer_count 0x00072a12 Data 1 app_tp_transfer.o(.data) + screen_int_transfer_buffer_ready 0x00072a13 Data 1 app_tp_transfer.o(.data) + .data 0x00072a40 Section 8 hal_dsi_rx_ctrl.o(.data) + g_hw_auto_filter 0x00072a40 Data 1 hal_dsi_rx_ctrl.o(.data) + g_esc_clk 0x00072a44 Data 4 hal_dsi_rx_ctrl.o(.data) + .data 0x00072a48 Section 1 hal_i2c_master.o(.data) + s_i2c_m_transfer_end 0x00072a48 Data 1 hal_i2c_master.o(.data) + .data 0x00072a4c Section 28 hal_i2c_slave.o(.data) + s_txbuffer_complate 0x00072a4c Data 1 hal_i2c_slave.o(.data) + s_i2c_s_dma_end 0x00072a4d Data 1 hal_i2c_slave.o(.data) + s_i2c_s_receive_cnt 0x00072a4e Data 1 hal_i2c_slave.o(.data) + s_hal_slave_rxbuffer 0x00072a50 Data 4 hal_i2c_slave.o(.data) + s_hal_slave_rxbuffer_size 0x00072a54 Data 4 hal_i2c_slave.o(.data) + hal_i2c_s_callback 0x00072a58 Data 4 hal_i2c_slave.o(.data) + s_receive_count 0x00072a5c Data 4 hal_i2c_slave.o(.data) + s_tx_buffer_t 0x00072a60 Data 4 hal_i2c_slave.o(.data) + tx_sum 0x00072a64 Data 4 hal_i2c_slave.o(.data) + .data 0x00072a68 Section 18 norflash.o(.data) + tmprg 0x00072a70 Data 4 norflash.o(.data) + .data 0x00072a7c Section 12 drv_common.o(.data) + s_my_tick 0x00072a7c Data 4 drv_common.o(.data) + .data 0x00072a88 Section 4 drv_gpio.o(.data) + g_ap_reset_cb 0x00072a88 Data 4 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hal_internal_vsync.o(.data) + .data 0x00073150 Section 8 drv_chip_info.o(.data) + sg_chip_ver 0x00073150 Data 1 drv_chip_info.o(.data) + sg_3k_flag 0x00073154 Data 4 drv_chip_info.o(.data) + .data 0x00073158 Section 12 drv_pwm.o(.data) + s_pwm_type 0x00073158 Data 1 drv_pwm.o(.data) + s_pwm_cb 0x0007315c Data 8 drv_pwm.o(.data) + .data 0x00073164 Section 8 drv_uart.o(.data) + s_UartFcrReg 0x00073164 Data 4 drv_uart.o(.data) + uart_userData 0x00073168 Data 4 drv_uart.o(.data) + .data 0x0007316c Section 12 drv_wdg.o(.data) + sg_wdg_repeat 0x0007316c Data 1 drv_wdg.o(.data) + sg_wdg_cb 0x00073170 Data 8 drv_wdg.o(.data) + .data 0x00073178 Section 4 stdout.o(.data) + .bss 0x0007317c Section 412 app_tp_transfer.o(.bss) + s_screen_read_buffer 0x0007317c Data 200 app_tp_transfer.o(.bss) + s_phone_read_buffer 0x00073244 Data 200 app_tp_transfer.o(.bss) + .bss 0x00073318 Section 184 hal_dsi_rx_ctrl.o(.bss) + g_rx_ctrl_handle 0x00073318 Data 184 hal_dsi_rx_ctrl.o(.bss) + .bss 0x000733d0 Section 64 hal_dsi_tx_ctrl.o(.bss) + g_tx_ctrl_handle 0x000733d0 Data 64 hal_dsi_tx_ctrl.o(.bss) + .bss 0x00073410 Section 256 tau_log.o(.bss) + .bss 0x00073510 Section 60 hal_uart.o(.bss) + .bss 0x0007354c Section 24 drv_dma.o(.bss) + s_dma_handle 0x0007354c Data 24 drv_dma.o(.bss) + .bss 0x00073564 Section 64 drv_gpio.o(.bss) + s_gpio_cb 0x00073564 Data 64 drv_gpio.o(.bss) + .bss 0x000735a4 Section 24 drv_i2c_dma.o(.bss) + i2c0_dma_slave_handle 0x000735a4 Data 12 drv_i2c_dma.o(.bss) + i2c1_dma_master_handle 0x000735b0 Data 12 drv_i2c_dma.o(.bss) + .bss 0x000735bc Section 2764 dcs_packet_fifo.o(.bss) + .bss 0x00074088 Section 2408 hal_internal_vsync.o(.bss) + g_vsync_hande 0x00074088 Data 72 hal_internal_vsync.o(.bss) + g_dcs_execute_table 0x000740d0 Data 2048 hal_internal_vsync.o(.bss) + g_imm_buffer 0x000748d0 Data 255 hal_internal_vsync.o(.bss) + sg_te_info 0x000749d0 Data 12 hal_internal_vsync.o(.bss) + g_imm_packet 0x000749dc Data 20 hal_internal_vsync.o(.bss) + .bss 0x000749f0 Section 32 hal_spi_slave.o(.bss) + STACK 0x00074a10 Section 4096 startup_armcm0.o(STACK) + + Global Symbols + + Symbol Name Value Ov Type Size Object(Section) + + BuildAttributes$$THM_ISAv3M$S$PE$A:L22$X:L11$S22$IEEE1$IW$USESV6$~STKCKD$USESV7$~SHL$OTIME$ROPI$IEEEJ$EBA8$MICROLIB$REQ8$PRES8$EABIv2 0x00000000 Number 0 anon$$obj.o ABSOLUTE + __ARM_use_no_argv 0x00000000 Number 0 main.o ABSOLUTE + _printf_a 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_c 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_charcount 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_d 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_e 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_f 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_flags 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_fp_dec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_fp_hex 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_g 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_i 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_int_dec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_l 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_lc 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_ll 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_lld 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_lli 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_llo 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_llu 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_llx 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_longlong_dec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_longlong_hex 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_longlong_oct 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_ls 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_mbtowc 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_n 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_o 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_p 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_percent 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_pre_padding 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_return_value 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_s 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_sizespec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_str 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_truncate_signed 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_truncate_unsigned 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_u 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_wc 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_wctomb 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_widthprec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_x 0x00000000 Number 0 stubs.o ABSOLUTE + __cpp_initialize__aeabi_ - Undefined Weak Reference + __cxa_finalize - Undefined Weak Reference + _clock_init - Undefined Weak Reference + _microlib_exit - Undefined Weak Reference + __Vectors_Size 0x000000c0 Number 0 startup_armcm0.o ABSOLUTE + __Vectors 0x00010000 Data 4 startup_armcm0.o(RESET) + __Vectors_End 0x000100c0 Data 0 startup_armcm0.o(RESET) + __main 0x000100c1 Thumb Code 0 entry.o(.ARM.Collect$$$$00000000) + _main_stk 0x000100c1 Thumb Code 0 entry2.o(.ARM.Collect$$$$00000001) + _main_scatterload 0x000100c5 Thumb Code 0 entry5.o(.ARM.Collect$$$$00000004) + __main_after_scatterload 0x000100c9 Thumb Code 0 entry5.o(.ARM.Collect$$$$00000004) + _main_clock 0x000100c9 Thumb Code 0 entry7b.o(.ARM.Collect$$$$00000008) + _main_cpp_init 0x000100c9 Thumb Code 0 entry8b.o(.ARM.Collect$$$$0000000A) + _main_init 0x000100c9 Thumb Code 0 entry9a.o(.ARM.Collect$$$$0000000B) + __rt_final_cpp 0x000100d1 Thumb Code 0 entry10a.o(.ARM.Collect$$$$0000000D) + __rt_final_exit 0x000100d1 Thumb Code 0 entry11a.o(.ARM.Collect$$$$0000000F) + Reset_Handler 0x000100d5 Thumb Code 28 startup_armcm0.o(.text) + NMI_Handler 0x000100f1 Thumb Code 2 startup_armcm0.o(.text) + SVC_Handler 0x000100f5 Thumb Code 2 startup_armcm0.o(.text) + PendSV_Handler 0x000100f7 Thumb Code 2 startup_armcm0.o(.text) + OTP_IRQn_Handler 0x00010123 Thumb Code 2 startup_armcm0.o(.text) + PVD_IRQn_Handler 0x00010127 Thumb Code 2 startup_armcm0.o(.text) + __aeabi_uidiv 0x0001014d Thumb Code 0 uidiv.o(.text) + __aeabi_uidivmod 0x0001014d Thumb Code 44 uidiv.o(.text) + __aeabi_idiv 0x00010179 Thumb Code 0 idiv.o(.text) + __aeabi_idivmod 0x00010179 Thumb Code 40 idiv.o(.text) + __aeabi_memcpy 0x000101a1 Thumb Code 36 memcpya.o(.text) + __aeabi_memcpy4 0x000101a1 Thumb Code 0 memcpya.o(.text) + __aeabi_memcpy8 0x000101a1 Thumb Code 0 memcpya.o(.text) + __aeabi_memset 0x000101c5 Thumb Code 14 memseta.o(.text) + __aeabi_memset4 0x000101c5 Thumb Code 0 memseta.o(.text) + __aeabi_memset8 0x000101c5 Thumb Code 0 memseta.o(.text) + __aeabi_memclr 0x000101d3 Thumb Code 4 memseta.o(.text) + __aeabi_memclr4 0x000101d3 Thumb Code 0 memseta.o(.text) + __aeabi_memclr8 0x000101d3 Thumb Code 0 memseta.o(.text) + _memset$wrapper 0x000101d7 Thumb Code 18 memseta.o(.text) + __aeabi_fadd 0x000101e9 Thumb Code 162 fadd.o(.text) + __aeabi_fsub 0x0001028b Thumb Code 8 fadd.o(.text) + __aeabi_frsub 0x00010293 Thumb Code 8 fadd.o(.text) + __aeabi_fmul 0x0001029b Thumb Code 122 fmul.o(.text) + __aeabi_fdiv 0x00010315 Thumb Code 124 fdiv.o(.text) + __ARM_scalbnf 0x00010391 Thumb Code 24 fscalb.o(.text) + scalbnf 0x00010391 Thumb Code 0 fscalb.o(.text) + __aeabi_dadd 0x000103a9 Thumb Code 328 dadd.o(.text) + __aeabi_dsub 0x000104f1 Thumb Code 12 dadd.o(.text) + __aeabi_drsub 0x000104fd Thumb Code 12 dadd.o(.text) + __aeabi_i2f 0x0001050d Thumb Code 22 fflti.o(.text) + __aeabi_ui2f 0x00010523 Thumb Code 14 ffltui.o(.text) + __aeabi_ui2d 0x00010531 Thumb Code 24 dfltui.o(.text) + __aeabi_f2iz 0x0001054d Thumb Code 50 ffixi.o(.text) + __aeabi_f2uiz 0x0001057f Thumb Code 40 ffixui.o(.text) + __aeabi_d2iz 0x000105a9 Thumb Code 62 dfixi.o(.text) + __aeabi_d2uiz 0x000105f1 Thumb Code 50 dfixui.o(.text) + __aeabi_f2d 0x0001062d Thumb Code 40 f2d.o(.text) + __aeabi_cfrcmple 0x00010655 Thumb Code 20 cfrcmple.o(.text) + __aeabi_uldivmod 0x00010669 Thumb Code 96 uldiv.o(.text) + __aeabi_llsl 0x000106c9 Thumb Code 32 llshl.o(.text) + _ll_shift_l 0x000106c9 Thumb Code 0 llshl.o(.text) + __aeabi_llsr 0x000106e9 Thumb Code 34 llushr.o(.text) + _ll_ushift_r 0x000106e9 Thumb Code 0 llushr.o(.text) + __aeabi_lasr 0x0001070b Thumb Code 38 llsshr.o(.text) + _ll_sshift_r 0x0001070b Thumb Code 0 llsshr.o(.text) + __I$use$fp 0x00010731 Thumb Code 0 iusefp.o(.text) + _float_round 0x00010731 Thumb Code 16 fepilogue.o(.text) + _float_epilogue 0x00010741 Thumb Code 114 fepilogue.o(.text) + _double_round 0x000107b3 Thumb Code 26 depilogue.o(.text) + _double_epilogue 0x000107cd Thumb Code 164 depilogue.o(.text) + __aeabi_dmul 0x00010871 Thumb Code 202 dmul.o(.text) + __aeabi_ddiv 0x00010941 Thumb Code 234 ddiv.o(.text) + __aeabi_d2ulz 0x00010a31 Thumb Code 54 dfixul.o(.text) + __aeabi_cdrcmple 0x00010a71 Thumb Code 38 cdrcmple.o(.text) + __scatterload 0x00010a99 Thumb Code 28 init.o(.text) + __scatterload_rt2 0x00010a99 Thumb Code 0 init.o(.text) + __decompress 0x00010abd Thumb Code 0 __dczerorl2.o(.text) + __decompress1 0x00010abd Thumb Code 86 __dczerorl2.o(.text) + ADC_IRQn_Handler 0x00010b15 Thumb Code 18 irq_redirect .o(i.ADC_IRQn_Handler) + AP_NRESET_IRQn_Handler 0x00010b2d Thumb Code 22 irq_redirect .o(i.AP_NRESET_IRQn_Handler) + DMA_IRQn_Handler 0x00010b49 Thumb Code 14 irq_redirect .o(i.DMA_IRQn_Handler) + EXTI_INT0_IRQn_Handler 0x00010b5d Thumb Code 22 irq_redirect .o(i.EXTI_INT0_IRQn_Handler) + EXTI_INT1_IRQn_Handler 0x00010b79 Thumb Code 22 irq_redirect .o(i.EXTI_INT1_IRQn_Handler) + EXTI_INT2_IRQn_Handler 0x00010b95 Thumb Code 22 irq_redirect .o(i.EXTI_INT2_IRQn_Handler) + EXTI_INT3_IRQn_Handler 0x00010bb1 Thumb Code 22 irq_redirect .o(i.EXTI_INT3_IRQn_Handler) + EXTI_INT4_IRQn_Handler 0x00010bcd Thumb Code 22 irq_redirect .o(i.EXTI_INT4_IRQn_Handler) + EXTI_INT5_IRQn_Handler 0x00010be9 Thumb Code 22 irq_redirect .o(i.EXTI_INT5_IRQn_Handler) + EXTI_INT6_IRQn_Handler 0x00010c05 Thumb Code 22 irq_redirect .o(i.EXTI_INT6_IRQn_Handler) + EXTI_INT7_IRQn_Handler 0x00010c21 Thumb Code 22 irq_redirect .o(i.EXTI_INT7_IRQn_Handler) + FLSCTRL_IRQn_Handler 0x00010c3d Thumb Code 14 irq_redirect .o(i.FLSCTRL_IRQn_Handler) + Gpio_swire_output 0x00010c51 Thumb Code 110 ap_demo.o(i.Gpio_swire_output) + HardFault_Handler 0x00010cc5 Thumb Code 14 irq_redirect .o(i.HardFault_Handler) + I2C0_IRQn_Handler 0x00010cd9 Thumb Code 18 irq_redirect .o(i.I2C0_IRQn_Handler) + I2C1_IRQn_Handler 0x00010cf1 Thumb Code 18 irq_redirect .o(i.I2C1_IRQn_Handler) + LCDC_IRQn_Handler 0x00010d09 Thumb Code 18 irq_redirect .o(i.LCDC_IRQn_Handler) + LOG_printf 0x00010d21 Thumb Code 30 tau_log.o(i.LOG_printf) + MEMC_IRQn_Handler 0x00010d49 Thumb Code 18 irq_redirect .o(i.MEMC_IRQn_Handler) + MIPI_RX_IRQn_Handler 0x00010d61 Thumb Code 18 irq_redirect .o(i.MIPI_RX_IRQn_Handler) + MIPI_TX_IRQn_Handler 0x00010d79 Thumb Code 18 irq_redirect .o(i.MIPI_TX_IRQn_Handler) + PWMDET_IRQn_Handler 0x00010d91 Thumb Code 22 irq_redirect .o(i.PWMDET_IRQn_Handler) + S20_Start_init 0x00010dad Thumb Code 270 app_tp_transfer.o(i.S20_Start_init) + SPIM_IRQn_Handler 0x00010ed1 Thumb Code 22 irq_redirect .o(i.SPIM_IRQn_Handler) + SPIS_IRQn_Handler 0x00010eed Thumb Code 22 irq_redirect .o(i.SPIS_IRQn_Handler) + SWIRE_IRQn_Handler 0x00010f09 Thumb Code 22 irq_redirect .o(i.SWIRE_IRQn_Handler) + SysTick_Handler 0x00010f25 Thumb Code 18 irq_redirect .o(i.SysTick_Handler) + TIMER0_IRQn_Handler 0x00010f3d Thumb Code 18 irq_redirect .o(i.TIMER0_IRQn_Handler) + TIMER1_IRQn_Handler 0x00010f55 Thumb Code 18 irq_redirect .o(i.TIMER1_IRQn_Handler) + TIMER2_IRQn_Handler 0x00010f6d Thumb Code 18 irq_redirect .o(i.TIMER2_IRQn_Handler) + TIMER3_IRQn_Handler 0x00010f85 Thumb Code 18 irq_redirect .o(i.TIMER3_IRQn_Handler) + UART_DisableDma 0x00010f9d Thumb Code 2 drv_uart.o(i.UART_DisableDma) + UART_GetInstance 0x00010f9f Thumb Code 4 drv_uart.o(i.UART_GetInstance) + UART_IRQ_Handle 0x00010fa5 Thumb Code 20 drv_uart.o(i.UART_IRQ_Handle) + UART_IRQn_Handler 0x00010fc1 Thumb Code 18 irq_redirect .o(i.UART_IRQn_Handler) + UART_ResetRxFIFO 0x00010fd9 Thumb Code 32 drv_uart.o(i.UART_ResetRxFIFO) + __scatterload_null 0x00010ffd Thumb Code 2 handlers.o(i.__scatterload_null) + screen_reg_start_data_size 0x00010ffe Data 1 app_tp_for_custom_s8.o(.constdata) + s_RAM_CK 0x00011000 Data 20 drv_common.o(.ARM.__at_0x11000) + UART_SetBaudRate 0x00011015 Thumb Code 72 drv_uart.o(i.UART_SetBaudRate) + UART_SwitchSCLK 0x0001105d Thumb Code 26 drv_uart.o(i.UART_SwitchSCLK) + UART_TransferHandleIRQ 0x00011077 Thumb Code 308 drv_uart.o(i.UART_TransferHandleIRQ) + UART_WriteBlocking 0x000111ab Thumb Code 26 drv_uart.o(i.UART_WriteBlocking) + UART_init 0x000111c5 Thumb Code 182 drv_uart.o(i.UART_init) + VIDC_IRQn_Handler 0x00011281 Thumb Code 18 irq_redirect .o(i.VIDC_IRQn_Handler) + VPRE_IRQn_Handler 0x00011299 Thumb Code 18 irq_redirect .o(i.VPRE_IRQn_Handler) + WDG_IRQn_Handler 0x000112b1 Thumb Code 18 irq_redirect .o(i.WDG_IRQn_Handler) + __0printf 0x000112c9 Thumb Code 24 printfa.o(i.__0printf) + __1printf 0x000112c9 Thumb Code 0 printfa.o(i.__0printf) + __2printf 0x000112c9 Thumb Code 0 printfa.o(i.__0printf) + __c89printf 0x000112c9 Thumb Code 0 printfa.o(i.__0printf) + printf 0x000112c9 Thumb Code 0 printfa.o(i.__0printf) + __0vsprintf 0x000112e9 Thumb Code 30 printfa.o(i.__0vsprintf) + __1vsprintf 0x000112e9 Thumb Code 0 printfa.o(i.__0vsprintf) + __2vsprintf 0x000112e9 Thumb Code 0 printfa.o(i.__0vsprintf) + __c89vsprintf 0x000112e9 Thumb Code 0 printfa.o(i.__0vsprintf) + vsprintf 0x000112e9 Thumb Code 0 printfa.o(i.__0vsprintf) + __ARM_clz 0x0001130d Thumb Code 46 depilogue.o(i.__ARM_clz) + __ARM_common_switch8 0x0001133b Thumb Code 26 ap_demo.o(i.__ARM_common_switch8) + __scatterload_copy 0x000113c9 Thumb Code 14 handlers.o(i.__scatterload_copy) + __scatterload_zeroinit 0x000113d7 Thumb Code 14 handlers.o(i.__scatterload_zeroinit) + ap_demo 0x00013031 Thumb Code 286 ap_demo.o(i.ap_demo) + ap_tp_calibration 0x000137bd Thumb Code 170 app_tp_transfer.o(i.ap_tp_calibration) + ap_tp_scan_point_init 0x0001386d Thumb Code 24 app_tp_transfer.o(i.ap_tp_scan_point_init) + ap_tp_scan_point_record_event 0x00013889 Thumb Code 150 app_tp_transfer.o(i.ap_tp_scan_point_record_event) + ap_tp_scan_point_record_event_exec 0x00013925 Thumb Code 50 app_tp_transfer.o(i.ap_tp_scan_point_record_event_exec) + ap_tp_simulate_finger_release_event 0x00013975 Thumb Code 44 app_tp_transfer.o(i.ap_tp_simulate_finger_release_event) + ap_tp_system_softReset 0x000139a9 Thumb Code 58 app_tp_transfer.o(i.ap_tp_system_softReset) + app_AP_NRESET_IRQn_Handler 0x000139e9 Thumb Code 32 drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) + app_EXTI_INT0_IRQn_Handler 0x00013a0d Thumb Code 22 drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) + app_EXTI_INT1_IRQn_Handler 0x00013a29 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) + app_EXTI_INT2_IRQn_Handler 0x00013a45 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) + app_EXTI_INT3_IRQn_Handler 0x00013a61 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) + app_EXTI_INT4_IRQn_Handler 0x00013a7d Thumb Code 22 drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) + app_EXTI_INT5_IRQn_Handler 0x00013a99 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) + app_EXTI_INT6_IRQn_Handler 0x00013ab5 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) + app_EXTI_INT7_IRQn_Handler 0x00013ad1 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) + app_HardFault_Handler 0x00013aed Thumb Code 12 drv_common.o(i.app_HardFault_Handler) + app_I2C0_IRQn_Handler 0x00013b35 Thumb Code 8 drv_i2c_slave.o(i.app_I2C0_IRQn_Handler) + app_I2C1_IRQn_Handler 0x00013b45 Thumb Code 8 drv_i2c_master.o(i.app_I2C1_IRQn_Handler) + app_LCDC_IRQn_Handler 0x00013b55 Thumb Code 98 hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) + app_MEMC_IRQn_Handler 0x00013c35 Thumb Code 92 drv_memc.o(i.app_MEMC_IRQn_Handler) + app_MIPI_RX_IRQn_Handler 0x00013c95 Thumb Code 232 drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) + app_MIPI_TX_IRQn_Handler 0x00013f2d Thumb Code 56 drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) + app_PWMDET_IRQn_Handler 0x00013fcd Thumb Code 62 drv_pwm.o(i.app_PWMDET_IRQn_Handler) + app_SPIM_IRQn_Handler 0x00014015 Thumb Code 22 drv_spi_master.o(i.app_SPIM_IRQn_Handler) + app_SPIS_IRQn_Handler 0x00014035 Thumb Code 500 hal_spi_slave.o(i.app_SPIS_IRQn_Handler) + app_SWIRE_IRQn_Handler 0x00014235 Thumb Code 28 drv_swire.o(i.app_SWIRE_IRQn_Handler) + app_SysTick_Handler 0x00014255 Thumb Code 20 drv_common.o(i.app_SysTick_Handler) + app_TIMER0_IRQn_Handler 0x0001426d Thumb Code 10 drv_timer.o(i.app_TIMER0_IRQn_Handler) + app_TIMER1_IRQn_Handler 0x00014277 Thumb Code 10 drv_timer.o(i.app_TIMER1_IRQn_Handler) + app_TIMER2_IRQn_Handler 0x00014281 Thumb Code 10 drv_timer.o(i.app_TIMER2_IRQn_Handler) + app_TIMER3_IRQn_Handler 0x0001428b Thumb Code 10 drv_timer.o(i.app_TIMER3_IRQn_Handler) + app_UART_IRQn_Handler 0x00014295 Thumb Code 8 drv_uart.o(i.app_UART_IRQn_Handler) + app_VIDC_IRQn_Handler 0x0001429d Thumb Code 190 hal_internal_vsync.o(i.app_VIDC_IRQn_Handler) + app_VPRE_IRQn_Handler 0x00014381 Thumb Code 544 hal_internal_vsync.o(i.app_VPRE_IRQn_Handler) + app_WDG_IRQn_Handler 0x00014605 Thumb Code 52 drv_wdg.o(i.app_WDG_IRQn_Handler) + app_dma_irq_handler 0x0001463d Thumb Code 8 drv_dma.o(i.app_dma_irq_handler) + app_fls_ctrl_Handler 0x00014645 Thumb Code 38 norflash.o(i.app_fls_ctrl_Handler) + app_tp_I2C_init 0x00014675 Thumb Code 26 app_tp_transfer.o(i.app_tp_I2C_init) + app_tp_calibration_exec 0x00014699 Thumb Code 30 ap_demo.o(i.app_tp_calibration_exec) + app_tp_init 0x00014701 Thumb Code 60 app_tp_transfer.o(i.app_tp_init) + app_tp_m_transfer_complate 0x00014769 Thumb Code 8 app_tp_transfer.o(i.app_tp_m_transfer_complate) + app_tp_phone_analysis_data 0x00014779 Thumb Code 992 app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) + app_tp_phone_clear_reset_on 0x00014b95 Thumb Code 8 app_tp_transfer.o(i.app_tp_phone_clear_reset_on) + app_tp_s_read 0x00014ba1 Thumb Code 8 app_tp_transfer.o(i.app_tp_s_read) + app_tp_s_write 0x00014ba9 Thumb Code 8 app_tp_transfer.o(i.app_tp_s_write) + app_tp_screen_analysis_int 0x00014bb1 Thumb Code 706 app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) + app_tp_screen_init 0x00014e81 Thumb Code 42 app_tp_transfer.o(i.app_tp_screen_init) + app_tp_transfer_screen_int 0x00014f69 Thumb Code 420 app_tp_transfer.o(i.app_tp_transfer_screen_int) + app_tp_transfer_screen_start 0x00015149 Thumb Code 18 app_tp_transfer.o(i.app_tp_transfer_screen_start) + blue_change_ccm 0x00015161 Thumb Code 54 ap_demo.o(i.blue_change_ccm) + board_Init 0x00015199 Thumb Code 24 board.o(i.board_Init) + ceil 0x000153a1 Thumb Code 180 ceil.o(i.ceil) + dcs_packet_fifo_alloc 0x000154c1 Thumb Code 80 dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) + dcs_packet_fifo_init 0x00015519 Thumb Code 18 dcs_packet_fifo.o(i.dcs_packet_fifo_init) + dcs_packet_free_fifo_header 0x00015531 Thumb Code 60 dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) + dcs_packet_get_fifo_header 0x00015575 Thumb Code 26 dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) + delayMs 0x000155b5 Thumb Code 24 tau_delay.o(i.delayMs) + delayUs 0x000155cd Thumb Code 34 tau_delay.o(i.delayUs) + drv_ap_rst_trig_edge_detect 0x00015685 Thumb Code 46 drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) + drv_chip_info_get_version 0x000156bd Thumb Code 6 drv_chip_info.o(i.drv_chip_info_get_version) + drv_chip_info_init 0x000156c9 Thumb Code 158 drv_chip_info.o(i.drv_chip_info_init) + drv_chip_rx_info_check 0x00015779 Thumb Code 54 drv_chip_info.o(i.drv_chip_rx_info_check) + drv_chip_rx_init_done 0x000157d5 Thumb Code 16 drv_chip_info.o(i.drv_chip_rx_init_done) + drv_common_enable_systick 0x000157e9 Thumb Code 70 drv_common.o(i.drv_common_enable_systick) + drv_common_system_init 0x00015841 Thumb Code 34 drv_common.o(i.drv_common_system_init) + drv_crgu_config_reset_modules 0x00015871 Thumb Code 10 drv_crgu.o(i.drv_crgu_config_reset_modules) + drv_crgu_set_ahb_pre_div 0x00015881 Thumb Code 14 drv_crgu.o(i.drv_crgu_set_ahb_pre_div) + drv_crgu_set_ahb_src 0x00015895 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_ahb_src) + drv_crgu_set_clock 0x000158a9 Thumb Code 26 drv_crgu.o(i.drv_crgu_set_clock) + drv_crgu_set_dpi_mux_src 0x000158c9 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dpi_mux_src) + drv_crgu_set_dpi_pre_div 0x000158dd Thumb Code 18 drv_crgu.o(i.drv_crgu_set_dpi_pre_div) + drv_crgu_set_dpi_pre_src 0x000158f5 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dpi_pre_src) + drv_crgu_set_dsc_core_div 0x00015909 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dsc_core_div) + drv_crgu_set_dsco_src 0x0001591d Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dsco_src) + drv_crgu_set_dsco_src_div 0x00015931 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dsco_src_div) + drv_crgu_set_fb_div 0x00015945 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_fb_div) + drv_crgu_set_fb_src 0x00015959 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_fb_src) + drv_crgu_set_lcdc_div 0x0001596d Thumb Code 16 drv_crgu.o(i.drv_crgu_set_lcdc_div) + drv_crgu_set_lcdc_src 0x00015981 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_lcdc_src) + drv_crgu_set_mipi_cfg_src 0x00015995 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_mipi_cfg_src) + drv_crgu_set_mipi_ref_src 0x000159a9 Thumb Code 18 drv_crgu.o(i.drv_crgu_set_mipi_ref_src) + drv_crgu_set_reset 0x000159c1 Thumb Code 20 drv_crgu.o(i.drv_crgu_set_reset) + drv_crgu_set_rxbr_div 0x000159d9 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_rxbr_div) + drv_crgu_set_rxbr_src 0x000159ed Thumb Code 16 drv_crgu.o(i.drv_crgu_set_rxbr_src) + drv_crgu_set_vidc_src 0x00015a01 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_vidc_src) + drv_dma_clear_flag 0x00015a15 Thumb Code 22 drv_dma.o(i.drv_dma_clear_flag) + drv_dma_create_handle 0x00015a31 Thumb Code 18 drv_dma.o(i.drv_dma_create_handle) + drv_dma_disenable_channel 0x00015a49 Thumb Code 18 drv_dma.o(i.drv_dma_disenable_channel) + drv_dma_enable_channel 0x00015a61 Thumb Code 18 drv_dma.o(i.drv_dma_enable_channel) + drv_dma_enable_channel_interrupts 0x00015a79 Thumb Code 42 drv_dma.o(i.drv_dma_enable_channel_interrupts) + drv_dma_enable_cycle 0x00015aad Thumb Code 42 drv_dma.o(i.drv_dma_enable_cycle) + drv_dma_get_channel_flag 0x00015add Thumb Code 14 drv_dma.o(i.drv_dma_get_channel_flag) + drv_dma_irq_handler 0x00015af1 Thumb Code 118 drv_dma.o(i.drv_dma_irq_handler) + drv_dma_prepar_transfer 0x00015b6d Thumb Code 18 drv_dma.o(i.drv_dma_prepar_transfer) + drv_dma_set_burst 0x00015b85 Thumb Code 24 drv_dma.o(i.drv_dma_set_burst) + drv_dma_set_callback 0x00015ba1 Thumb Code 6 drv_dma.o(i.drv_dma_set_callback) + drv_dma_set_transfer 0x00015ba9 Thumb Code 62 drv_dma.o(i.drv_dma_set_transfer) + drv_dsc_dec_convert_pps_rc_parameter 0x00015bed Thumb Code 54 drv_dsc_dec.o(i.drv_dsc_dec_convert_pps_rc_parameter) + drv_dsc_dec_disable 0x00015c23 Thumb Code 12 drv_dsc_dec.o(i.drv_dsc_dec_disable) + drv_dsc_dec_enable 0x00015c31 Thumb Code 146 drv_dsc_dec.o(i.drv_dsc_dec_enable) + drv_dsc_dec_get_nslc 0x00015ce5 Thumb Code 10 drv_dsc_dec.o(i.drv_dsc_dec_get_nslc) + drv_dsc_dec_set_u8_pps 0x00015cef Thumb Code 40 drv_dsc_dec.o(i.drv_dsc_dec_set_u8_pps) + drv_dsi_rx_calc_ipi_tx_delay 0x00015d19 Thumb Code 244 drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) + drv_dsi_rx_enable_irq 0x00015e1d Thumb Code 58 drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) + drv_dsi_rx_get_compression_en 0x00015ec9 Thumb Code 8 drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) + drv_dsi_rx_get_max_ret_size 0x00015ed1 Thumb Code 6 drv_dsi_rx.o(i.drv_dsi_rx_get_max_ret_size) + drv_dsi_rx_power_up 0x00015ed7 Thumb Code 14 drv_dsi_rx.o(i.drv_dsi_rx_power_up) + drv_dsi_rx_set_ctrl_cfg 0x00015ee5 Thumb Code 28 drv_dsi_rx.o(i.drv_dsi_rx_set_ctrl_cfg) + drv_dsi_rx_set_ddi_cfg 0x00015f01 Thumb Code 16 drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) + drv_dsi_rx_set_inten 0x00015f11 Thumb Code 4 drv_dsi_rx.o(i.drv_dsi_rx_set_inten) + drv_dsi_rx_set_ipi_cfg 0x00015f15 Thumb Code 16 drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_cfg) + drv_dsi_rx_set_resp_cnt 0x00015f25 Thumb Code 38 drv_dsi_rx.o(i.drv_dsi_rx_set_resp_cnt) + drv_dsi_rx_set_up_phy 0x00015f4d Thumb Code 138 drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) + drv_dsi_rx_shut_down 0x00015fdd Thumb Code 14 drv_dsi_rx.o(i.drv_dsi_rx_shut_down) + drv_dsi_tx_command_header 0x00015feb Thumb Code 20 drv_dsi_tx.o(i.drv_dsi_tx_command_header) + drv_dsi_tx_command_mode_cfg 0x00015fff Thumb Code 108 drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) + drv_dsi_tx_command_put_payload 0x0001606b Thumb Code 4 drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) + drv_dsi_tx_config_eotp 0x0001606f Thumb Code 24 drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) + drv_dsi_tx_config_int 0x00016087 Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_config_int) + drv_dsi_tx_dpi_lpcmd_time 0x0001608f Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_dpi_lpcmd_time) + drv_dsi_tx_dpi_mode 0x00016097 Thumb Code 10 drv_dsi_tx.o(i.drv_dsi_tx_dpi_mode) + drv_dsi_tx_dpi_polarity 0x000160a1 Thumb Code 36 drv_dsi_tx.o(i.drv_dsi_tx_dpi_polarity) + drv_dsi_tx_get_cmd_status 0x000160c5 Thumb Code 4 drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) + drv_dsi_tx_mode 0x000160c9 Thumb Code 4 drv_dsi_tx.o(i.drv_dsi_tx_mode) + drv_dsi_tx_phy_clock_lane_auto_lp 0x000160cd Thumb Code 24 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_auto_lp) + drv_dsi_tx_phy_clock_lane_req_hs 0x000160e5 Thumb Code 26 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) + drv_dsi_tx_phy_lane_mode 0x000160ff Thumb Code 12 drv_dsi_tx.o(i.drv_dsi_tx_phy_lane_mode) + drv_dsi_tx_phy_status_ready 0x0001610b Thumb Code 100 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ready) + drv_dsi_tx_phy_status_stopstate 0x0001616f Thumb Code 62 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) + drv_dsi_tx_phy_test_setup 0x000161ad Thumb Code 228 drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) + drv_dsi_tx_phy_time_cfg 0x00016291 Thumb Code 30 drv_dsi_tx.o(i.drv_dsi_tx_phy_time_cfg) + drv_dsi_tx_powerup 0x000162af Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_powerup) + drv_dsi_tx_response_mode 0x000162b7 Thumb Code 28 drv_dsi_tx.o(i.drv_dsi_tx_response_mode) + drv_dsi_tx_set_bta_ack 0x000162d3 Thumb Code 24 drv_dsi_tx.o(i.drv_dsi_tx_set_bta_ack) + drv_dsi_tx_set_esc_div 0x000162eb Thumb Code 12 drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) + drv_dsi_tx_set_int 0x000162f9 Thumb Code 46 drv_dsi_tx.o(i.drv_dsi_tx_set_int) + drv_dsi_tx_set_time_out_div 0x0001632d Thumb Code 16 drv_dsi_tx.o(i.drv_dsi_tx_set_time_out_div) + drv_dsi_tx_set_video_chunk 0x0001633d Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_set_video_chunk) + drv_dsi_tx_set_video_timing 0x00016345 Thumb Code 34 drv_dsi_tx.o(i.drv_dsi_tx_set_video_timing) + drv_dsi_tx_shutdown 0x00016367 Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_shutdown) + drv_dsi_tx_timeout_cfg 0x0001636f Thumb Code 38 drv_dsi_tx.o(i.drv_dsi_tx_timeout_cfg) + drv_dsi_tx_video_mode_cfg 0x00016395 Thumb Code 170 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_cfg) + drv_dsi_tx_video_mode_disable_hact_cmd 0x0001643f Thumb Code 22 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_disable_hact_cmd) + drv_dsi_tx_video_mode_set_lp_cmd 0x00016455 Thumb Code 24 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_set_lp_cmd) + drv_gpio_get_input_data 0x0001646d Thumb Code 20 drv_gpio.o(i.drv_gpio_get_input_data) + drv_gpio_register_ap_reset_callback 0x00016485 Thumb Code 6 drv_gpio.o(i.drv_gpio_register_ap_reset_callback) + drv_gpio_register_callback 0x00016491 Thumb Code 14 drv_gpio.o(i.drv_gpio_register_callback) + drv_gpio_set_int 0x000164a5 Thumb Code 62 drv_gpio.o(i.drv_gpio_set_int) + drv_gpio_set_ioe 0x000164e9 Thumb Code 26 drv_gpio.o(i.drv_gpio_set_ioe) + drv_gpio_set_mode0 0x00016509 Thumb Code 12 drv_gpio.o(i.drv_gpio_set_mode0) + drv_gpio_set_mode1 0x00016519 Thumb Code 12 drv_gpio.o(i.drv_gpio_set_mode1) + drv_gpio_set_mode2 0x00016529 Thumb Code 12 drv_gpio.o(i.drv_gpio_set_mode2) + drv_gpio_set_mode3 0x00016539 Thumb Code 12 drv_gpio.o(i.drv_gpio_set_mode3) + drv_gpio_set_pull_state 0x00016569 Thumb Code 298 drv_gpio.o(i.drv_gpio_set_pull_state) + drv_i2c_clear_m_it_pending_bit 0x00016699 Thumb Code 86 drv_i2c_master.o(i.drv_i2c_clear_m_it_pending_bit) + drv_i2c_clear_s_it_pending_bit 0x000166f9 Thumb Code 84 drv_i2c_slave.o(i.drv_i2c_clear_s_it_pending_bit) + drv_i2c_dma_init 0x00016789 Thumb Code 146 drv_i2c_dma.o(i.drv_i2c_dma_init) + drv_i2c_enable_rx_dma 0x00016835 Thumb Code 26 drv_i2c_dma.o(i.drv_i2c_enable_rx_dma) + drv_i2c_enable_tx_dma 0x0001684f Thumb Code 24 drv_i2c_dma.o(i.drv_i2c_enable_tx_dma) + drv_i2c_m_enable_intr 0x00016869 Thumb Code 42 drv_i2c_master.o(i.drv_i2c_m_enable_intr) + drv_i2c_m_set_callback 0x000168a1 Thumb Code 6 drv_i2c_master.o(i.drv_i2c_m_set_callback) + drv_i2c_master_init 0x000168ad Thumb Code 118 drv_i2c_master.o(i.drv_i2c_master_init) + drv_i2c_master_read_dma 0x00016939 Thumb Code 114 drv_i2c_dma.o(i.drv_i2c_master_read_dma) + drv_i2c_master_write_dma 0x000169b5 Thumb Code 60 drv_i2c_dma.o(i.drv_i2c_master_write_dma) + drv_i2c_s_enable_intr 0x00016a25 Thumb Code 40 drv_i2c_slave.o(i.drv_i2c_s_enable_intr) + drv_i2c_s_get_fifo_status 0x00016a59 Thumb Code 22 drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) + drv_i2c_s_set_callback 0x00016a75 Thumb Code 6 drv_i2c_slave.o(i.drv_i2c_s_set_callback) + drv_i2c_s_write_data 0x00016a81 Thumb Code 26 drv_i2c_slave.o(i.drv_i2c_s_write_data) + drv_i2c_set_dma_irq_callback 0x00016aa1 Thumb Code 62 drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) + drv_i2c_slave_init 0x00016af1 Thumb Code 60 drv_i2c_slave.o(i.drv_i2c_slave_init) + drv_i2c_slave_write_dma 0x00016b35 Thumb Code 30 drv_i2c_dma.o(i.drv_i2c_slave_write_dma) + drv_lcdc_config_420_to_444_mode 0x00016b59 Thumb Code 24 drv_lcdc.o(i.drv_lcdc_config_420_to_444_mode) + drv_lcdc_config_bypass 0x00016b71 Thumb Code 24 drv_lcdc.o(i.drv_lcdc_config_bypass) + drv_lcdc_config_cbcr 0x00016b89 Thumb Code 24 drv_lcdc.o(i.drv_lcdc_config_cbcr) + drv_lcdc_config_ccm 0x00016ba1 Thumb Code 48 drv_lcdc.o(i.drv_lcdc_config_ccm) + drv_lcdc_config_disp_mode 0x00016bd1 Thumb Code 22 drv_lcdc.o(i.drv_lcdc_config_disp_mode) + drv_lcdc_config_dpi_polarity 0x00016be7 Thumb Code 36 drv_lcdc.o(i.drv_lcdc_config_dpi_polarity) + drv_lcdc_config_dpi_timing 0x00016c0b Thumb Code 38 drv_lcdc.o(i.drv_lcdc_config_dpi_timing) + drv_lcdc_config_endianness 0x00016c31 Thumb Code 22 drv_lcdc.o(i.drv_lcdc_config_endianness) + drv_lcdc_config_horiz_flip 0x00016c47 Thumb Code 32 drv_lcdc.o(i.drv_lcdc_config_horiz_flip) + drv_lcdc_config_input_size 0x00016c67 Thumb Code 12 drv_lcdc.o(i.drv_lcdc_config_input_size) + drv_lcdc_config_int 0x00016c73 Thumb Code 30 drv_lcdc.o(i.drv_lcdc_config_int) + drv_lcdc_config_int_single 0x00016c91 Thumb Code 34 drv_lcdc.o(i.drv_lcdc_config_int_single) + drv_lcdc_config_overwrite 0x00016cb3 Thumb Code 34 drv_lcdc.o(i.drv_lcdc_config_overwrite) + drv_lcdc_config_overwrite_rgb 0x00016cd5 Thumb Code 12 drv_lcdc.o(i.drv_lcdc_config_overwrite_rgb) + drv_lcdc_config_partial_display_area 0x00016ce1 Thumb Code 26 drv_lcdc.o(i.drv_lcdc_config_partial_display_area) + drv_lcdc_config_partial_display_enable 0x00016cfb Thumb Code 34 drv_lcdc.o(i.drv_lcdc_config_partial_display_enable) + drv_lcdc_config_src_parameter 0x00016d1d Thumb Code 114 drv_lcdc.o(i.drv_lcdc_config_src_parameter) + drv_lcdc_config_thresh 0x00016d8f Thumb Code 8 drv_lcdc.o(i.drv_lcdc_config_thresh) + drv_lcdc_config_upscaler 0x00016d97 Thumb Code 96 drv_lcdc.o(i.drv_lcdc_config_upscaler) + drv_lcdc_config_yuv420_threshold 0x00016df7 Thumb Code 10 drv_lcdc.o(i.drv_lcdc_config_yuv420_threshold) + drv_lcdc_ctrl_flow 0x00016e01 Thumb Code 18 drv_lcdc.o(i.drv_lcdc_ctrl_flow) + drv_lcdc_enable_shadow_reg 0x00016e13 Thumb Code 32 drv_lcdc.o(i.drv_lcdc_enable_shadow_reg) + drv_lcdc_set_int 0x00016e35 Thumb Code 46 drv_lcdc.o(i.drv_lcdc_set_int) + drv_lcdc_start 0x00016e69 Thumb Code 32 drv_lcdc.o(i.drv_lcdc_start) + drv_lcdc_update_shadow_reg 0x00016e89 Thumb Code 12 drv_lcdc.o(i.drv_lcdc_update_shadow_reg) + drv_memc_bypass_fifo_empty 0x00016e95 Thumb Code 16 drv_memc.o(i.drv_memc_bypass_fifo_empty) + drv_memc_clear_status 0x00016ea5 Thumb Code 12 drv_memc.o(i.drv_memc_clear_status) + drv_memc_enable_irq 0x00016eb1 Thumb Code 58 drv_memc.o(i.drv_memc_enable_irq) + drv_memc_gen_a_tear_signal 0x00016ef1 Thumb Code 12 drv_memc.o(i.drv_memc_gen_a_tear_signal) + drv_memc_get_status 0x00016efd Thumb Code 18 drv_memc.o(i.drv_memc_get_status) + drv_memc_rate_transfer_sel 0x00016f0f Thumb Code 16 drv_memc.o(i.drv_memc_rate_transfer_sel) + drv_memc_sel_vsync 0x00016f1f Thumb Code 14 drv_memc.o(i.drv_memc_sel_vsync) + drv_memc_set_data_mode 0x00016f2d Thumb Code 12 drv_memc.o(i.drv_memc_set_data_mode) + drv_memc_set_tear_hwclr 0x00016f39 Thumb Code 16 drv_memc.o(i.drv_memc_set_tear_hwclr) + drv_memc_set_tear_mode 0x00016f49 Thumb Code 14 drv_memc.o(i.drv_memc_set_tear_mode) + drv_memc_set_tear_waveform 0x00016f59 Thumb Code 28 drv_memc.o(i.drv_memc_set_tear_waveform) + drv_memc_set_yuv420_cfg 0x00016f7d Thumb Code 16 drv_memc.o(i.drv_memc_set_yuv420_cfg) + drv_param_get_picture_quality_setting 0x00016f8d Thumb Code 12 drv_param_init.o(i.drv_param_get_picture_quality_setting) + drv_param_init_get_ccm 0x00016f9d Thumb Code 4 drv_param_init.o(i.drv_param_init_get_ccm) + drv_param_init_get_scld_filter_h 0x00016fa5 Thumb Code 12 drv_param_init.o(i.drv_param_init_get_scld_filter_h) + drv_param_init_get_scld_filter_v 0x00016fb9 Thumb Code 12 drv_param_init.o(i.drv_param_init_get_scld_filter_v) + drv_param_init_get_sclu_filter_h 0x00016fcd Thumb Code 4 drv_param_init.o(i.drv_param_init_get_sclu_filter_h) + drv_param_init_get_sclu_filter_v 0x00016fd5 Thumb Code 4 drv_param_init.o(i.drv_param_init_get_sclu_filter_v) + drv_param_init_set_ccm 0x00016fdd Thumb Code 14 drv_param_init.o(i.drv_param_init_set_ccm) + drv_param_p2r_filter_init 0x00016ff1 Thumb Code 54 drv_param_init.o(i.drv_param_p2r_filter_init) + drv_param_yuv420_filter_init 0x0001702d Thumb Code 48 drv_param_init.o(i.drv_param_yuv420_filter_init) + drv_phy_get_pll_para 0x00017061 Thumb Code 88 drv_phy_common.o(i.drv_phy_get_pll_para) + drv_phy_get_rate_para 0x000170c1 Thumb Code 76 drv_phy_common.o(i.drv_phy_get_rate_para) + drv_phy_test_clear 0x00017115 Thumb Code 16 drv_phy_common.o(i.drv_phy_test_clear) + drv_phy_test_lock 0x00017125 Thumb Code 24 drv_phy_common.o(i.drv_phy_test_lock) + drv_phy_test_write_1_byte 0x0001713d Thumb Code 32 drv_phy_common.o(i.drv_phy_test_write_1_byte) + drv_phy_test_write_2_byte 0x0001715d Thumb Code 38 drv_phy_common.o(i.drv_phy_test_write_2_byte) + drv_phy_test_write_code 0x00017183 Thumb Code 30 drv_phy_common.o(i.drv_phy_test_write_code) + drv_pwr_set_cp_mode 0x000171c1 Thumb Code 26 drv_pwr.o(i.drv_pwr_set_cp_mode) + drv_pwr_set_pvd_mode 0x000171e1 Thumb Code 24 drv_pwr.o(i.drv_pwr_set_pvd_mode) + drv_pwr_set_system_clk_src 0x000171fd Thumb Code 36 drv_pwr.o(i.drv_pwr_set_system_clk_src) + drv_rxbr_clear_pkt_buffer 0x00017273 Thumb Code 6 drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) + drv_rxbr_clear_status 0x00017279 Thumb Code 4 drv_rxbr.o(i.drv_rxbr_clear_status) + drv_rxbr_enable_irq 0x0001727d Thumb Code 58 drv_rxbr.o(i.drv_rxbr_enable_irq) + drv_rxbr_frame_drop_cfg 0x000172bd Thumb Code 8 drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) + drv_rxbr_get_clk 0x000172c5 Thumb Code 44 drv_rxbr.o(i.drv_rxbr_get_clk) + drv_rxbr_get_col_addr 0x00017301 Thumb Code 4 drv_rxbr.o(i.drv_rxbr_get_col_addr) + drv_rxbr_get_cur_hline_rcv_cnt 0x00017305 Thumb Code 8 drv_rxbr.o(i.drv_rxbr_get_cur_hline_rcv_cnt) + drv_rxbr_get_hline_rcv_cfg 0x0001730d Thumb Code 10 drv_rxbr.o(i.drv_rxbr_get_hline_rcv_cfg) + drv_rxbr_get_page_addr 0x0001732f Thumb Code 4 drv_rxbr.o(i.drv_rxbr_get_page_addr) + drv_rxbr_hline_rcv0_cfg 0x00017357 Thumb Code 12 drv_rxbr.o(i.drv_rxbr_hline_rcv0_cfg) + drv_rxbr_hline_rcv_cfg 0x00017363 Thumb Code 8 drv_rxbr.o(i.drv_rxbr_hline_rcv_cfg) + drv_rxbr_set_ack_pkt_header 0x0001736b Thumb Code 20 drv_rxbr.o(i.drv_rxbr_set_ack_pkt_header) + drv_rxbr_set_cmd_filter 0x0001737f Thumb Code 204 drv_rxbr.o(i.drv_rxbr_set_cmd_filter) + drv_rxbr_set_color_format 0x0001744b Thumb Code 20 drv_rxbr.o(i.drv_rxbr_set_color_format) + drv_rxbr_set_inten 0x0001745f Thumb Code 20 drv_rxbr.o(i.drv_rxbr_set_inten) + drv_rxbr_set_usr_cfg 0x00017473 Thumb Code 34 drv_rxbr.o(i.drv_rxbr_set_usr_cfg) + drv_rxbr_set_usr_col 0x00017495 Thumb Code 8 drv_rxbr.o(i.drv_rxbr_set_usr_col) + drv_rxbr_set_usr_row 0x0001749d Thumb Code 8 drv_rxbr.o(i.drv_rxbr_set_usr_row) + drv_spi_m_read_data 0x000174a5 Thumb Code 28 drv_spi_master.o(i.drv_spi_m_read_data) + drv_swire_set_int 0x000174c5 Thumb Code 64 drv_swire.o(i.drv_swire_set_int) + drv_swire_set_power_down 0x0001750d Thumb Code 24 drv_swire.o(i.drv_swire_set_power_down) + drv_sys_cfg_clear_all_int 0x00017529 Thumb Code 8 drv_sys_cfg.o(i.drv_sys_cfg_clear_all_int) + drv_sys_cfg_clear_pending 0x00017535 Thumb Code 32 drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) + drv_sys_cfg_sel_ap_rst_lvl_trig 0x0001755d Thumb Code 18 drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_lvl_trig) + drv_sys_cfg_sel_ap_rst_trig 0x00017575 Thumb Code 22 drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) + drv_sys_cfg_sel_gpio_group 0x00017591 Thumb Code 30 drv_sys_cfg.o(i.drv_sys_cfg_sel_gpio_group) + drv_sys_cfg_sel_int_trig 0x000175b5 Thumb Code 30 drv_sys_cfg.o(i.drv_sys_cfg_sel_int_trig) + drv_sys_cfg_set_dma_rx_req 0x000175d9 Thumb Code 10 drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) + drv_sys_cfg_set_dma_tx_req 0x000175e9 Thumb Code 10 drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) + drv_sys_cfg_set_int 0x000175f9 Thumb Code 30 drv_sys_cfg.o(i.drv_sys_cfg_set_int) + drv_timer_enable 0x00017637 Thumb Code 32 drv_timer.o(i.drv_timer_enable) + drv_timer_get_instance 0x00017659 Thumb Code 10 drv_timer.o(i.drv_timer_get_instance) + drv_timer_get_prescaler 0x00017669 Thumb Code 12 drv_timer.o(i.drv_timer_get_prescaler) + drv_timer_register_callback 0x000176b5 Thumb Code 14 drv_timer.o(i.drv_timer_register_callback) + drv_timer_set_compare_val 0x000176c9 Thumb Code 16 drv_timer.o(i.drv_timer_set_compare_val) + drv_timer_set_int 0x000176d9 Thumb Code 68 drv_timer.o(i.drv_timer_set_int) + drv_timer_set_prescaler 0x00017721 Thumb Code 36 drv_timer.o(i.drv_timer_set_prescaler) + drv_tx_phy_test_enter 0x00017753 Thumb Code 28 drv_dsi_tx.o(i.drv_tx_phy_test_enter) + drv_tx_phy_test_exit 0x0001776f Thumb Code 28 drv_dsi_tx.o(i.drv_tx_phy_test_exit) + drv_vidc_clear_irq 0x000177c1 Thumb Code 8 drv_vidc.o(i.drv_vidc_clear_irq) + drv_vidc_enable 0x000177c9 Thumb Code 24 drv_vidc.o(i.drv_vidc_enable) + drv_vidc_enable_irq 0x000177e1 Thumb Code 58 drv_vidc.o(i.drv_vidc_enable_irq) + drv_vidc_get_int_source 0x00017821 Thumb Code 38 drv_vidc.o(i.drv_vidc_get_int_source) + drv_vidc_module_enable 0x00017849 Thumb Code 62 drv_vidc.o(i.drv_vidc_module_enable) + drv_vidc_reset 0x0001788d Thumb Code 6 drv_vidc.o(i.drv_vidc_reset) + drv_vidc_set_dst_parameter 0x00017893 Thumb Code 92 drv_vidc.o(i.drv_vidc_set_dst_parameter) + drv_vidc_set_enh_chr 0x000178ef Thumb Code 14 drv_vidc.o(i.drv_vidc_set_enh_chr) + drv_vidc_set_enh_chr2 0x000178fd Thumb Code 18 drv_vidc.o(i.drv_vidc_set_enh_chr2) + drv_vidc_set_enh_lum 0x0001790f Thumb Code 14 drv_vidc.o(i.drv_vidc_set_enh_lum) + drv_vidc_set_gain 0x0001791d Thumb Code 48 drv_vidc.o(i.drv_vidc_set_gain) + drv_vidc_set_irqen 0x0001794d Thumb Code 20 drv_vidc.o(i.drv_vidc_set_irqen) + drv_vidc_set_p2r_hcoef0 0x00017961 Thumb Code 8 drv_vidc.o(i.drv_vidc_set_p2r_hcoef0) + drv_vidc_set_p2r_hcoef1 0x00017969 Thumb Code 8 drv_vidc.o(i.drv_vidc_set_p2r_hcoef1) + drv_vidc_set_p2r_hinitb 0x00017971 Thumb Code 40 drv_vidc.o(i.drv_vidc_set_p2r_hinitb) + drv_vidc_set_p2r_hinitr 0x00017999 Thumb Code 40 drv_vidc.o(i.drv_vidc_set_p2r_hinitr) + drv_vidc_set_p2r_step 0x000179c1 Thumb Code 8 drv_vidc.o(i.drv_vidc_set_p2r_step) + drv_vidc_set_pu_ctrl 0x000179c9 Thumb Code 32 drv_vidc.o(i.drv_vidc_set_pu_ctrl) + drv_vidc_set_pu_scld 0x000179e9 Thumb Code 14 drv_vidc.o(i.drv_vidc_set_pu_scld) + drv_vidc_set_scld_hcoef0 0x000179f7 Thumb Code 10 drv_vidc.o(i.drv_vidc_set_scld_hcoef0) + drv_vidc_set_scld_hcoef1 0x00017a01 Thumb Code 10 drv_vidc.o(i.drv_vidc_set_scld_hcoef1) + drv_vidc_set_scld_step 0x00017a0b Thumb Code 18 drv_vidc.o(i.drv_vidc_set_scld_step) + drv_vidc_set_scld_vcoef0 0x00017a1d Thumb Code 10 drv_vidc.o(i.drv_vidc_set_scld_vcoef0) + drv_vidc_set_scld_vcoef1 0x00017a27 Thumb Code 10 drv_vidc.o(i.drv_vidc_set_scld_vcoef1) + drv_vidc_set_sclu_hcoef0c 0x00017a31 Thumb Code 10 drv_vidc.o(i.drv_vidc_set_sclu_hcoef0c) + drv_vidc_set_sclu_hcoef0y 0x00017a3b Thumb Code 10 drv_vidc.o(i.drv_vidc_set_sclu_hcoef0y) + drv_vidc_set_sclu_hcoef1c 0x00017a45 Thumb Code 10 drv_vidc.o(i.drv_vidc_set_sclu_hcoef1c) + drv_vidc_set_sclu_hcoef1y 0x00017a4f Thumb Code 10 drv_vidc.o(i.drv_vidc_set_sclu_hcoef1y) + drv_vidc_set_sclu_vcoef0c 0x00017a59 Thumb Code 10 drv_vidc.o(i.drv_vidc_set_sclu_vcoef0c) + drv_vidc_set_sclu_vcoef0y 0x00017a63 Thumb Code 10 drv_vidc.o(i.drv_vidc_set_sclu_vcoef0y) + drv_vidc_set_sclu_vcoef1c 0x00017a6d Thumb Code 10 drv_vidc.o(i.drv_vidc_set_sclu_vcoef1c) + drv_vidc_set_sclu_vcoef1y 0x00017a77 Thumb Code 10 drv_vidc.o(i.drv_vidc_set_sclu_vcoef1y) + drv_vidc_set_src_parameter 0x00017a81 Thumb Code 32 drv_vidc.o(i.drv_vidc_set_src_parameter) + drv_vidc_set_y4t2_hcoef0 0x00017aa5 Thumb Code 10 drv_vidc.o(i.drv_vidc_set_y4t2_hcoef0) + drv_vidc_set_y4t2_hcoef1 0x00017aaf Thumb Code 10 drv_vidc.o(i.drv_vidc_set_y4t2_hcoef1) + drv_vidc_set_y4t2_vcoef0 0x00017ab9 Thumb Code 10 drv_vidc.o(i.drv_vidc_set_y4t2_vcoef0) + drv_vidc_set_y4t2_vcoef1 0x00017ac3 Thumb Code 10 drv_vidc.o(i.drv_vidc_set_y4t2_vcoef1) + drv_wdg_clear_counter 0x00017acd Thumb Code 12 drv_wdg.o(i.drv_wdg_clear_counter) + drv_wdg_set_int 0x00017afd Thumb Code 48 drv_wdg.o(i.drv_wdg_set_int) + fls_clear_irq_status 0x00017b31 Thumb Code 6 drv_fls.o(i.fls_clear_irq_status) + fputc 0x00017b37 Thumb Code 20 tau_log.o(i.fputc) + hal_dsi_rx_ctrl_create_handle 0x00017b4d Thumb Code 42 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) + hal_dsi_rx_ctrl_deinit 0x00017b7d Thumb Code 148 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) + hal_dsi_rx_ctrl_dsc_async_handler 0x00017c19 Thumb Code 122 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) + hal_dsi_rx_ctrl_gen_a_tear_signal 0x00017c9d Thumb Code 32 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) + hal_dsi_rx_ctrl_get_max_ret_size 0x00017cc5 Thumb Code 30 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) + hal_dsi_rx_ctrl_init 0x00017ced Thumb Code 92 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) + hal_dsi_rx_ctrl_pre_init_pps 0x00018521 Thumb Code 56 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_pre_init_pps) + hal_dsi_rx_ctrl_send_ack_cmd 0x0001855d Thumb Code 212 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) + hal_dsi_rx_ctrl_set_cus_sync_line 0x0001864d Thumb Code 44 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) + hal_dsi_rx_ctrl_set_hw_tear_mode 0x00018681 Thumb Code 42 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode) + hal_dsi_rx_ctrl_set_sw_tear_mode 0x0001875d Thumb Code 42 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) + hal_dsi_rx_ctrl_start 0x00018791 Thumb Code 46 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) + hal_dsi_rx_ctrl_stop 0x000187cd Thumb Code 58 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) + hal_dsi_rx_ctrl_toggle_resolution 0x00018815 Thumb Code 28 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) + hal_dsi_tx_ctrl_create_handle 0x00018db9 Thumb Code 34 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) + hal_dsi_tx_ctrl_deinit 0x00018de5 Thumb Code 68 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) + hal_dsi_tx_ctrl_enter_init_panel_mode 0x00018e2d Thumb Code 68 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) + hal_dsi_tx_ctrl_exit_init_panel_mode 0x00018e79 Thumb Code 30 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) + hal_dsi_tx_ctrl_init 0x00018e9d Thumb Code 188 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) + hal_dsi_tx_ctrl_panel_reset_pin 0x00018f85 Thumb Code 12 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_panel_reset_pin) + hal_dsi_tx_ctrl_set_ccm 0x00018f91 Thumb Code 28 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) + hal_dsi_tx_ctrl_set_overwrite_rgb 0x00018fb1 Thumb Code 16 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) + hal_dsi_tx_ctrl_set_partial_disp 0x00018fc5 Thumb Code 12 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp) + hal_dsi_tx_ctrl_set_partial_disp_area 0x00018fd5 Thumb Code 30 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp_area) + hal_dsi_tx_ctrl_start 0x00018ff9 Thumb Code 84 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) + hal_dsi_tx_ctrl_stop 0x00019059 Thumb Code 54 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) + hal_dsi_tx_ctrl_write_array_cmd 0x0001909d Thumb Code 406 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) + hal_dsi_tx_ctrl_write_cmd 0x00019239 Thumb Code 332 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) + hal_gpio_ctrl_eint 0x00019551 Thumb Code 18 hal_gpio.o(i.hal_gpio_ctrl_eint) + hal_gpio_get_input_data 0x00019569 Thumb Code 18 hal_gpio.o(i.hal_gpio_get_input_data) + hal_gpio_init_eint 0x0001957d Thumb Code 58 hal_gpio.o(i.hal_gpio_init_eint) + hal_gpio_init_input 0x000195bd Thumb Code 28 hal_gpio.o(i.hal_gpio_init_input) + hal_gpio_init_output 0x000195dd Thumb Code 34 hal_gpio.o(i.hal_gpio_init_output) + hal_gpio_reg_eint_cb 0x00019605 Thumb Code 20 hal_gpio.o(i.hal_gpio_reg_eint_cb) + hal_gpio_set_ap_reset_int 0x0001961d Thumb Code 76 hal_gpio.o(i.hal_gpio_set_ap_reset_int) + hal_gpio_set_mode 0x0001966d Thumb Code 90 hal_gpio.o(i.hal_gpio_set_mode) + hal_gpio_set_output_data 0x000196cd Thumb Code 8 hal_gpio.o(i.hal_gpio_set_output_data) + hal_gpio_set_pull_state 0x000196d5 Thumb Code 26 hal_gpio.o(i.hal_gpio_set_pull_state) + hal_i2c_m_dma_init 0x000196f5 Thumb Code 92 hal_i2c_master.o(i.hal_i2c_m_dma_init) + hal_i2c_m_dma_read 0x00019761 Thumb Code 36 hal_i2c_master.o(i.hal_i2c_m_dma_read) + hal_i2c_m_dma_write 0x0001978d Thumb Code 32 hal_i2c_master.o(i.hal_i2c_m_dma_write) + hal_i2c_m_transfer_complate 0x000197b5 Thumb Code 24 hal_i2c_master.o(i.hal_i2c_m_transfer_complate) + hal_i2c_s_dma_write 0x00019805 Thumb Code 52 hal_i2c_slave.o(i.hal_i2c_s_dma_write) + hal_i2c_s_init 0x00019841 Thumb Code 92 hal_i2c_slave.o(i.hal_i2c_s_init) + hal_i2c_s_nonblocking_read 0x000198ad Thumb Code 14 hal_i2c_slave.o(i.hal_i2c_s_nonblocking_read) + hal_i2c_s_set_transfer 0x000198c1 Thumb Code 6 hal_i2c_slave.o(i.hal_i2c_s_set_transfer) + hal_internal_init_memc 0x00019a1d Thumb Code 96 hal_internal_vsync.o(i.hal_internal_init_memc) + hal_internal_sync_get_fb_setting 0x00019acd Thumb Code 12 hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) + hal_internal_sync_input_resolution_change 0x00019add Thumb Code 414 hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) + hal_internal_sync_set_fb_setting_manual 0x00019d29 Thumb Code 372 hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual) + hal_internal_vsync_deinit 0x00019eb1 Thumb Code 24 hal_internal_vsync.o(i.hal_internal_vsync_deinit) + hal_internal_vsync_get_rx_state 0x00019ecd Thumb Code 6 hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) + hal_internal_vsync_get_sync_line 0x00019ed9 Thumb Code 24 hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) + hal_internal_vsync_get_tx_state 0x00019ef5 Thumb Code 6 hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) + hal_internal_vsync_get_y2t4_use_sclu 0x00019f01 Thumb Code 28 hal_internal_vsync.o(i.hal_internal_vsync_get_y2t4_use_sclu) + hal_internal_vsync_init_rx 0x00019f21 Thumb Code 166 hal_internal_vsync.o(i.hal_internal_vsync_init_rx) + hal_internal_vsync_init_tx 0x00019fdd Thumb Code 160 hal_internal_vsync.o(i.hal_internal_vsync_init_tx) + hal_internal_vsync_set_auto_hw_filter 0x0001a081 Thumb Code 222 hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) + hal_internal_vsync_set_rx_state 0x0001a19d Thumb Code 20 hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) + hal_internal_vsync_set_sync_line 0x0001a1b5 Thumb Code 26 hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) + hal_internal_vsync_set_tear_mode 0x0001a1d5 Thumb Code 64 hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) + hal_internal_vsync_set_tx_state 0x0001a21d Thumb Code 58 hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) + hal_spi_m_clear_rxfifo 0x0001a6d1 Thumb Code 14 hal_spi_master.o(i.hal_spi_m_clear_rxfifo) + hal_swire_open 0x0001a6df Thumb Code 22 hal_swire.o(i.hal_swire_open) + hal_system_enable_systick 0x0001a6f5 Thumb Code 8 hal_system.o(i.hal_system_enable_systick) + hal_system_init 0x0001a6fd Thumb Code 104 hal_system.o(i.hal_system_init) + hal_system_init_console 0x0001a785 Thumb Code 28 hal_system.o(i.hal_system_init_console) + hal_system_set_pvd 0x0001a7a1 Thumb Code 8 hal_system.o(i.hal_system_set_pvd) + hal_system_set_vcc 0x0001a7a9 Thumb Code 8 hal_system.o(i.hal_system_set_vcc) + hal_timer_init 0x0001a7b1 Thumb Code 26 hal_timer.o(i.hal_timer_init) + hal_timer_start 0x0001a7cd Thumb Code 66 hal_timer.o(i.hal_timer_start) + hal_timer_stop 0x0001a815 Thumb Code 40 hal_timer.o(i.hal_timer_stop) + hal_uart_init 0x0001a83d Thumb Code 126 hal_uart.o(i.hal_uart_init) + hal_uart_transmit_blocking 0x0001a8c9 Thumb Code 12 hal_uart.o(i.hal_uart_transmit_blocking) + handle_init 0x0001a8d9 Thumb Code 136 irq_redirect .o(i.handle_init) + main 0x0001ab01 Thumb Code 10 main.o(i.main) + tp_heartbeat_exec 0x0001b47d Thumb Code 60 ap_demo.o(i.tp_heartbeat_exec) + phone_data_21 0x0001b87c Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_55 0x0001b87d Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_85_1 0x0001b87e Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_92_1 0x0001b87f Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_F5_1 0x0001b880 Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_F5_2 0x0001b881 Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_F5_3 0x0001b882 Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_F5_4 0x0001b883 Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_30 0x0001b884 Data 2 app_tp_for_custom_s8.o(.constdata) + phone_data_52 0x0001b886 Data 3 app_tp_for_custom_s8.o(.constdata) + phone_data_92_3 0x0001b889 Data 3 app_tp_for_custom_s8.o(.constdata) + phone_data_A3 0x0001b88c Data 4 app_tp_for_custom_s8.o(.constdata) + phone_data_A4 0x0001b890 Data 4 app_tp_for_custom_s8.o(.constdata) + phone_data_A5 0x0001b894 Data 4 app_tp_for_custom_s8.o(.constdata) + phone_data_AF 0x0001b898 Data 4 app_tp_for_custom_s8.o(.constdata) + phone_data_F1 0x0001b89c Data 4 app_tp_for_custom_s8.o(.constdata) + phone_data_22 0x0001b8a0 Data 5 app_tp_for_custom_s8.o(.constdata) + phone_data_92_2 0x0001b8a5 Data 6 app_tp_for_custom_s8.o(.constdata) + phone_data_F6_1 0x0001b8ab Data 6 app_tp_for_custom_s8.o(.constdata) + phone_data_F6_2 0x0001b8b1 Data 6 app_tp_for_custom_s8.o(.constdata) + phone_data_F6_3 0x0001b8b7 Data 6 app_tp_for_custom_s8.o(.constdata) + phone_data_F6_4 0x0001b8bd Data 6 app_tp_for_custom_s8.o(.constdata) + phone_data_60_1 0x0001b8c3 Data 16 app_tp_for_custom_s8.o(.constdata) + phone_data_23 0x0001b8d3 Data 11 app_tp_for_custom_s8.o(.constdata) + phone_data_85_2 0x0001b8de Data 28 app_tp_for_custom_s8.o(.constdata) + phone_data_90 0x0001b8fa Data 10 app_tp_for_custom_s8.o(.constdata) + phone_data_72_0 0x0001b904 Data 1292 app_tp_for_custom_s8.o(.constdata) + phone_data_72_5 0x0001be10 Data 1292 app_tp_for_custom_s8.o(.constdata) + phone_data_72_13 0x0001c31c Data 1292 app_tp_for_custom_s8.o(.constdata) + phone_data_75_01 0x0001c828 Data 654 app_tp_for_custom_s8.o(.constdata) + phone_data_75_02 0x0001cab6 Data 654 app_tp_for_custom_s8.o(.constdata) + phone_data_75_03 0x0001cd44 Data 654 app_tp_for_custom_s8.o(.constdata) + phone_data_75_06 0x0001cfd2 Data 654 app_tp_for_custom_s8.o(.constdata) + phone_data_75_07 0x0001d260 Data 654 app_tp_for_custom_s8.o(.constdata) + phone_data_75_05 0x0001d4ee Data 654 app_tp_for_custom_s8.o(.constdata) + phone_data_75_00 0x0001d77c Data 288 app_tp_for_custom_s8.o(.constdata) + phone_data_75_FF 0x0001d89c Data 288 app_tp_for_custom_s8.o(.constdata) + sleep_on 0x0001d9bc Data 16 app_tp_for_custom_s8.o(.constdata) + Region$$Table$$Base 0x0001dea8 Number 0 anon$$obj.o(Region$$Table) + Region$$Table$$Limit 0x0001ded8 Number 0 anon$$obj.o(Region$$Table) + g_fun_handle 0x00070100 Data 192 irq_redirect .o(.ARM.__AT_0x00070100) + phone_86_flag 0x000701d6 Data 1 ap_demo.o(.data) + phone_A6_flag 0x000701d7 Data 1 ap_demo.o(.data) + phone_start_flag 0x000701d8 Data 1 ap_demo.o(.data) + phone_DisplayOFF_flag 0x000701d9 Data 1 ap_demo.o(.data) + ap_tear_flag 0x000701de Data 1 ap_demo.o(.data) + g_enter_display_off 0x000701df Data 1 ap_demo.o(.data) + panel_mode 0x000701e1 Data 1 ap_demo.o(.data) + phone_DisplayOFF_count 0x000701e4 Data 2 ap_demo.o(.data) + value_reg_b1 0x000701e6 Data 2 ap_demo.o(.data) + value_reg_b1_bak 0x000701e8 Data 2 ap_demo.o(.data) + value_reg51 0x000701ea Data 2 ap_demo.o(.data) + value_reg51_bak 0x000701ec Data 2 ap_demo.o(.data) + panel_r 0x000701ee Data 2 ap_demo.o(.data) + panel_g 0x000701f0 Data 2 ap_demo.o(.data) + panel_b 0x000701f2 Data 2 ap_demo.o(.data) + s_heartbeat 0x000701fc Data 4 ap_demo.o(.data) + value_reg_ca 0x00070200 Data 4 ap_demo.o(.data) + panel_init_code 0x00070208 Data 9953 ap_demo.o(.data) + phone_data_E4 0x000728ea Data 1 app_tp_for_custom_s8.o(.data) + tp_flag 0x000728eb Data 1 app_tp_for_custom_s8.o(.data) + g_phone_output_int_pad 0x000728ec Data 1 app_tp_for_custom_s8.o(.data) + tp_sleep_in 0x000728ed Data 1 app_tp_for_custom_s8.o(.data) + tp_sleep_count 0x000728ee Data 1 app_tp_for_custom_s8.o(.data) + sleep_double_EN 0x000728ef Data 1 app_tp_for_custom_s8.o(.data) + Flag_EA_EN 0x000728f0 Data 1 app_tp_for_custom_s8.o(.data) + Flag_touch_count 0x000728f1 Data 1 app_tp_for_custom_s8.o(.data) + touchnum_bak 0x000728f2 Data 1 app_tp_for_custom_s8.o(.data) + Flag_blacklight_EN 0x000728f3 Data 1 app_tp_for_custom_s8.o(.data) + phone_data_B1 0x000728fc Data 2 app_tp_for_custom_s8.o(.data) + phone_reg_coord_back 0x00072906 Data 200 app_tp_for_custom_s8.o(.data) + g_screen_input_rst_pad 0x000729ce Data 1 app_tp_for_custom_s8.o(.data) + g_screen_input_int_pad 0x000729cf Data 1 app_tp_for_custom_s8.o(.data) + screen_data_write_1 0x000729d0 Data 1 app_tp_for_custom_s8.o(.data) + screen_data_write_2 0x000729d1 Data 3 app_tp_for_custom_s8.o(.data) + screen_data_write_3 0x000729d4 Data 5 app_tp_for_custom_s8.o(.data) + screen_reg_int_data 0x000729dc Data 48 app_tp_for_custom_s8.o(.data) + s_screen_init_complate 0x00072a10 Data 1 app_tp_transfer.o(.data) + MI10_PRO_screen_init_data1 0x00072a14 Data 3 app_tp_transfer.o(.data) + MI10_PRO_screen_init_data3 0x00072a17 Data 3 app_tp_transfer.o(.data) + MI10_PRO_screen_init_data4 0x00072a1a Data 3 app_tp_transfer.o(.data) + MI10_PRO_TP_Tuning_data1 0x00072a1d Data 3 app_tp_transfer.o(.data) + MI10_PRO_TP_Tuning_data2 0x00072a20 Data 3 app_tp_transfer.o(.data) + MI10_PRO_TP_Tuning_data3 0x00072a23 Data 3 app_tp_transfer.o(.data) + MI10_PRO_TP_Tuning_data6 0x00072a26 Data 3 app_tp_transfer.o(.data) + MI10_PRO_TP_Tuning_data7 0x00072a29 Data 3 app_tp_transfer.o(.data) + MI10_PRO_TP_Tuning_data8 0x00072a2c Data 3 app_tp_transfer.o(.data) + MI10_PRO_TP_Tuning_data4 0x00072a2f Data 4 app_tp_transfer.o(.data) + MI10_PRO_TP_Tuning_data5 0x00072a33 Data 4 app_tp_transfer.o(.data) + MI10_PRO_screen_init_data2 0x00072a37 Data 6 app_tp_transfer.o(.data) + g_fls_w_cmd 0x00072a68 Data 1 norflash.o(.data) + g_fls_r_cmd 0x00072a69 Data 1 norflash.o(.data) + g_fls_write_en_status 0x00072a6a Data 1 norflash.o(.data) + isFlsTransferEnd 0x00072a6b Data 1 norflash.o(.data) + isFlsFifoReq 0x00072a6c Data 1 norflash.o(.data) + isNandWriteCompleted 0x00072a6d Data 1 norflash.o(.data) + isNandReadCompleted 0x00072a6e Data 1 norflash.o(.data) + g_fls_error_info 0x00072a74 Data 6 norflash.o(.data) + g_systick_cb_func 0x00072a80 Data 4 drv_common.o(.data) + g_system_clock 0x00072a84 Data 4 drv_common.o(.data) + tx_byte_num 0x00072a9c Data 4 drv_i2c_slave.o(.data) + g_scld_filter_h 0x00072aa0 Data 256 drv_param_init.o(.data) + g_scld_filter_v 0x00072ba0 Data 256 drv_param_init.o(.data) + g_scld_720_filter_h 0x00072ca0 Data 256 drv_param_init.o(.data) + g_scld_720_filter_v 0x00072da0 Data 256 drv_param_init.o(.data) + g_sclu_filter_h 0x00072ea0 Data 256 drv_param_init.o(.data) + g_sclu_filter_v 0x00072fa0 Data 256 drv_param_init.o(.data) + g_pq_setting 0x000730a0 Data 40 drv_param_init.o(.data) + g_ccm_setting 0x000730c8 Data 36 drv_param_init.o(.data) + __stdout 0x00073178 Data 4 stdout.o(.data) + tp_scan_data 0x0007330c Data 12 app_tp_transfer.o(.bss) + string 0x00073410 Data 256 tau_log.o(.bss) + hal_dmahandle 0x00073510 Data 12 hal_uart.o(.bss) + hal_uarthandle_dma 0x0007351c Data 32 hal_uart.o(.bss) + hal_uart_handle_global 0x0007353c Data 16 hal_uart.o(.bss) + g_packet_fifo 0x000735bc Data 2764 dcs_packet_fifo.o(.bss) + g_spis_ctrl_handle 0x000749f0 Data 32 hal_spi_slave.o(.bss) + __stack_limit 0x00074a10 Data 0 startup_armcm0.o(STACK) + __initial_sp 0x00075a10 Data 0 startup_armcm0.o(STACK) + + + +============================================================================== + +Memory Map of the image + + Image Entry point : 0x000100c1 + + Load Region LR_IROM2 (Base: 0x00010000, Size: 0x00010e84, Max: 0x00010000, ABSOLUTE, COMPRESSED[0x0000fe00]) + + Execution Region ER_IROM2 (Exec base: 0x00010000, Load base: 0x00010000, Size: 0x0000ded8, Max: 0x00010000, ABSOLUTE) + + Exec Addr Load Addr Size Type Attr Idx E Section Name Object + + 0x00010000 0x00010000 0x000000c0 Data RO 587 RESET startup_armcm0.o + 0x000100c0 0x000100c0 0x00000000 Code RO 2568 * .ARM.Collect$$$$00000000 mc_p.l(entry.o) + 0x000100c0 0x000100c0 0x00000004 Code RO 2870 .ARM.Collect$$$$00000001 mc_p.l(entry2.o) + 0x000100c4 0x000100c4 0x00000004 Code RO 2873 .ARM.Collect$$$$00000004 mc_p.l(entry5.o) + 0x000100c8 0x000100c8 0x00000000 Code RO 2875 .ARM.Collect$$$$00000008 mc_p.l(entry7b.o) + 0x000100c8 0x000100c8 0x00000000 Code RO 2877 .ARM.Collect$$$$0000000A mc_p.l(entry8b.o) + 0x000100c8 0x000100c8 0x00000008 Code RO 2878 .ARM.Collect$$$$0000000B mc_p.l(entry9a.o) + 0x000100d0 0x000100d0 0x00000000 Code RO 2880 .ARM.Collect$$$$0000000D mc_p.l(entry10a.o) + 0x000100d0 0x000100d0 0x00000000 Code RO 2882 .ARM.Collect$$$$0000000F mc_p.l(entry11a.o) + 0x000100d0 0x000100d0 0x00000004 Code RO 2871 .ARM.Collect$$$$00002712 mc_p.l(entry2.o) + 0x000100d4 0x000100d4 0x00000078 Code RO 588 .text startup_armcm0.o + 0x0001014c 0x0001014c 0x0000002c Code RO 2571 .text mc_p.l(uidiv.o) + 0x00010178 0x00010178 0x00000028 Code RO 2573 .text mc_p.l(idiv.o) + 0x000101a0 0x000101a0 0x00000024 Code RO 2575 .text mc_p.l(memcpya.o) + 0x000101c4 0x000101c4 0x00000024 Code RO 2577 .text mc_p.l(memseta.o) + 0x000101e8 0x000101e8 0x000000b2 Code RO 2842 .text mf_p.l(fadd.o) + 0x0001029a 0x0001029a 0x0000007a Code RO 2844 .text mf_p.l(fmul.o) + 0x00010314 0x00010314 0x0000007c Code RO 2846 .text mf_p.l(fdiv.o) + 0x00010390 0x00010390 0x00000018 Code RO 2848 .text mf_p.l(fscalb.o) + 0x000103a8 0x000103a8 0x00000164 Code RO 2850 .text mf_p.l(dadd.o) + 0x0001050c 0x0001050c 0x00000016 Code RO 2852 .text mf_p.l(fflti.o) + 0x00010522 0x00010522 0x0000000e Code RO 2854 .text mf_p.l(ffltui.o) + 0x00010530 0x00010530 0x0000001c Code RO 2856 .text mf_p.l(dfltui.o) + 0x0001054c 0x0001054c 0x00000032 Code RO 2858 .text mf_p.l(ffixi.o) + 0x0001057e 0x0001057e 0x00000028 Code RO 2860 .text mf_p.l(ffixui.o) + 0x000105a6 0x000105a6 0x00000002 PAD + 0x000105a8 0x000105a8 0x00000048 Code RO 2862 .text mf_p.l(dfixi.o) + 0x000105f0 0x000105f0 0x0000003c Code RO 2864 .text mf_p.l(dfixui.o) + 0x0001062c 0x0001062c 0x00000028 Code RO 2866 .text mf_p.l(f2d.o) + 0x00010654 0x00010654 0x00000014 Code RO 2868 .text mf_p.l(cfrcmple.o) + 0x00010668 0x00010668 0x00000060 Code RO 2885 .text mc_p.l(uldiv.o) + 0x000106c8 0x000106c8 0x00000020 Code RO 2887 .text mc_p.l(llshl.o) + 0x000106e8 0x000106e8 0x00000022 Code RO 2889 .text mc_p.l(llushr.o) + 0x0001070a 0x0001070a 0x00000026 Code RO 2891 .text mc_p.l(llsshr.o) + 0x00010730 0x00010730 0x00000000 Code RO 2893 .text mc_p.l(iusefp.o) + 0x00010730 0x00010730 0x00000082 Code RO 2894 .text mf_p.l(fepilogue.o) + 0x000107b2 0x000107b2 0x000000be Code RO 2896 .text mf_p.l(depilogue.o) + 0x00010870 0x00010870 0x000000d0 Code RO 2900 .text mf_p.l(dmul.o) + 0x00010940 0x00010940 0x000000f0 Code RO 2902 .text mf_p.l(ddiv.o) + 0x00010a30 0x00010a30 0x00000040 Code RO 2904 .text mf_p.l(dfixul.o) + 0x00010a70 0x00010a70 0x00000028 Code RO 2906 .text mf_p.l(cdrcmple.o) + 0x00010a98 0x00010a98 0x00000024 Code RO 2908 .text mc_p.l(init.o) + 0x00010abc 0x00010abc 0x00000056 Code RO 2918 .text mc_p.l(__dczerorl2.o) + 0x00010b12 0x00010b12 0x00000002 PAD + 0x00010b14 0x00010b14 0x00000018 Code RO 2218 i.ADC_IRQn_Handler CVWL518.lib(irq_redirect .o) + 0x00010b2c 0x00010b2c 0x0000001c Code RO 2219 i.AP_NRESET_IRQn_Handler CVWL518.lib(irq_redirect .o) + 0x00010b48 0x00010b48 0x00000014 Code RO 2220 i.DMA_IRQn_Handler CVWL518.lib(irq_redirect .o) + 0x00010b5c 0x00010b5c 0x0000001c Code RO 2221 i.EXTI_INT0_IRQn_Handler CVWL518.lib(irq_redirect .o) + 0x00010b78 0x00010b78 0x0000001c Code RO 2222 i.EXTI_INT1_IRQn_Handler CVWL518.lib(irq_redirect .o) + 0x00010b94 0x00010b94 0x0000001c Code RO 2223 i.EXTI_INT2_IRQn_Handler CVWL518.lib(irq_redirect .o) + 0x00010bb0 0x00010bb0 0x0000001c Code RO 2224 i.EXTI_INT3_IRQn_Handler CVWL518.lib(irq_redirect .o) + 0x00010bcc 0x00010bcc 0x0000001c Code RO 2225 i.EXTI_INT4_IRQn_Handler CVWL518.lib(irq_redirect .o) + 0x00010be8 0x00010be8 0x0000001c Code RO 2226 i.EXTI_INT5_IRQn_Handler CVWL518.lib(irq_redirect .o) + 0x00010c04 0x00010c04 0x0000001c Code RO 2227 i.EXTI_INT6_IRQn_Handler CVWL518.lib(irq_redirect .o) + 0x00010c20 0x00010c20 0x0000001c Code RO 2228 i.EXTI_INT7_IRQn_Handler CVWL518.lib(irq_redirect .o) + 0x00010c3c 0x00010c3c 0x00000014 Code RO 2229 i.FLSCTRL_IRQn_Handler CVWL518.lib(irq_redirect .o) + 0x00010c50 0x00010c50 0x00000074 Code RO 99 i.Gpio_swire_output ap_demo.o + 0x00010cc4 0x00010cc4 0x00000014 Code RO 2230 i.HardFault_Handler CVWL518.lib(irq_redirect .o) + 0x00010cd8 0x00010cd8 0x00000018 Code RO 2231 i.I2C0_IRQn_Handler CVWL518.lib(irq_redirect .o) + 0x00010cf0 0x00010cf0 0x00000018 Code RO 2232 i.I2C1_IRQn_Handler CVWL518.lib(irq_redirect .o) + 0x00010d08 0x00010d08 0x00000018 Code RO 2233 i.LCDC_IRQn_Handler CVWL518.lib(irq_redirect .o) + 0x00010d20 0x00010d20 0x00000028 Code RO 978 i.LOG_printf CVWL518.lib(tau_log.o) + 0x00010d48 0x00010d48 0x00000018 Code RO 2234 i.MEMC_IRQn_Handler CVWL518.lib(irq_redirect .o) + 0x00010d60 0x00010d60 0x00000018 Code RO 2235 i.MIPI_RX_IRQn_Handler CVWL518.lib(irq_redirect .o) + 0x00010d78 0x00010d78 0x00000018 Code RO 2236 i.MIPI_TX_IRQn_Handler CVWL518.lib(irq_redirect .o) + 0x00010d90 0x00010d90 0x0000001c Code RO 2237 i.PWMDET_IRQn_Handler CVWL518.lib(irq_redirect .o) + 0x00010dac 0x00010dac 0x00000124 Code RO 376 i.S20_Start_init app_tp_transfer.o + 0x00010ed0 0x00010ed0 0x0000001c Code RO 2238 i.SPIM_IRQn_Handler CVWL518.lib(irq_redirect .o) + 0x00010eec 0x00010eec 0x0000001c Code RO 2239 i.SPIS_IRQn_Handler CVWL518.lib(irq_redirect .o) + 0x00010f08 0x00010f08 0x0000001c Code RO 2240 i.SWIRE_IRQn_Handler CVWL518.lib(irq_redirect .o) + 0x00010f24 0x00010f24 0x00000018 Code RO 2241 i.SysTick_Handler CVWL518.lib(irq_redirect .o) + 0x00010f3c 0x00010f3c 0x00000018 Code RO 2242 i.TIMER0_IRQn_Handler CVWL518.lib(irq_redirect .o) + 0x00010f54 0x00010f54 0x00000018 Code RO 2243 i.TIMER1_IRQn_Handler CVWL518.lib(irq_redirect .o) + 0x00010f6c 0x00010f6c 0x00000018 Code RO 2244 i.TIMER2_IRQn_Handler CVWL518.lib(irq_redirect .o) + 0x00010f84 0x00010f84 0x00000018 Code RO 2245 i.TIMER3_IRQn_Handler CVWL518.lib(irq_redirect .o) + 0x00010f9c 0x00010f9c 0x00000002 Code RO 2430 i.UART_DisableDma CVWL518.lib(drv_uart.o) + 0x00010f9e 0x00010f9e 0x00000004 Code RO 2436 i.UART_GetInstance CVWL518.lib(drv_uart.o) + 0x00010fa2 0x00010fa2 0x00000002 PAD + 0x00010fa4 0x00010fa4 0x0000001c Code RO 2442 i.UART_IRQ_Handle CVWL518.lib(drv_uart.o) + 0x00010fc0 0x00010fc0 0x00000018 Code RO 2246 i.UART_IRQn_Handler CVWL518.lib(irq_redirect .o) + 0x00010fd8 0x00010fd8 0x00000024 Code RO 2445 i.UART_ResetRxFIFO CVWL518.lib(drv_uart.o) + 0x00010ffc 0x00010ffc 0x00000002 Code RO 2913 i.__scatterload_null mc_p.l(handlers.o) + 0x00010ffe 0x00010ffe 0x00000001 Data RO 305 .constdata app_tp_for_custom_s8.o + 0x00010fff 0x00010fff 0x00000001 PAD + 0x00011000 0x00011000 0x00000014 Data RO 1101 .ARM.__at_0x11000 CVWL518.lib(drv_common.o) + 0x00011014 0x00011014 0x00000048 Code RO 2448 i.UART_SetBaudRate CVWL518.lib(drv_uart.o) + 0x0001105c 0x0001105c 0x0000001a Code RO 2449 i.UART_SwitchSCLK CVWL518.lib(drv_uart.o) + 0x00011076 0x00011076 0x00000134 Code RO 2451 i.UART_TransferHandleIRQ CVWL518.lib(drv_uart.o) + 0x000111aa 0x000111aa 0x0000001a Code RO 2453 i.UART_WriteBlocking CVWL518.lib(drv_uart.o) + 0x000111c4 0x000111c4 0x000000bc Code RO 2454 i.UART_init CVWL518.lib(drv_uart.o) + 0x00011280 0x00011280 0x00000018 Code RO 2247 i.VIDC_IRQn_Handler CVWL518.lib(irq_redirect .o) + 0x00011298 0x00011298 0x00000018 Code RO 2248 i.VPRE_IRQn_Handler CVWL518.lib(irq_redirect .o) + 0x000112b0 0x000112b0 0x00000018 Code RO 2249 i.WDG_IRQn_Handler CVWL518.lib(irq_redirect .o) + 0x000112c8 0x000112c8 0x00000020 Code RO 2814 i.__0printf mc_p.l(printfa.o) + 0x000112e8 0x000112e8 0x00000024 Code RO 2820 i.__0vsprintf mc_p.l(printfa.o) + 0x0001130c 0x0001130c 0x0000002e Code RO 2898 i.__ARM_clz mf_p.l(depilogue.o) + 0x0001133a 0x0001133a 0x0000001a Code RO 244 i.__ARM_common_switch8 ap_demo.o + 0x00011354 0x00011354 0x00000018 Code RO 1414 i.__NVIC_ClearPendingIRQ CVWL518.lib(drv_i2c_master.o) + 0x0001136c 0x0001136c 0x00000018 Code RO 1447 i.__NVIC_ClearPendingIRQ CVWL518.lib(drv_i2c_slave.o) + 0x00011384 0x00011384 0x00000044 Code RO 2318 i.__NVIC_SetPriority CVWL518.lib(hal_spi_slave.o) + 0x000113c8 0x000113c8 0x0000000e Code RO 2912 i.__scatterload_copy mc_p.l(handlers.o) + 0x000113d6 0x000113d6 0x0000000e Code RO 2914 i.__scatterload_zeroinit mc_p.l(handlers.o) + 0x000113e4 0x000113e4 0x00000174 Code RO 2821 i._fp_digits mc_p.l(printfa.o) + 0x00011558 0x00011558 0x000006ec Code RO 2822 i._printf_core mc_p.l(printfa.o) + 0x00011c44 0x00011c44 0x00000020 Code RO 2823 i._printf_post_padding mc_p.l(printfa.o) + 0x00011c64 0x00011c64 0x0000002c Code RO 2824 i._printf_pre_padding mc_p.l(printfa.o) + 0x00011c90 0x00011c90 0x0000000a Code RO 2826 i._sputc mc_p.l(printfa.o) + 0x00011c9a 0x00011c9a 0x00000002 PAD + 0x00011c9c 0x00011c9c 0x00001394 Code RO 100 i.ap_dcs_read ap_demo.o + 0x00013030 0x00013030 0x0000019c Code RO 101 i.ap_demo ap_demo.o + 0x000131cc 0x000131cc 0x0000002c Code RO 102 i.ap_get_reg_ca ap_demo.o + 0x000131f8 0x000131f8 0x000000b0 Code RO 103 i.ap_get_reg_df ap_demo.o + 0x000132a8 0x000132a8 0x0000005c Code RO 104 i.ap_reset_cb ap_demo.o + 0x00013304 0x00013304 0x00000360 Code RO 105 i.ap_set_backlight ap_demo.o + 0x00013664 0x00013664 0x00000058 Code RO 106 i.ap_set_display_off ap_demo.o + 0x000136bc 0x000136bc 0x00000040 Code RO 107 i.ap_set_display_on ap_demo.o + 0x000136fc 0x000136fc 0x00000060 Code RO 108 i.ap_set_enter_sleep_mode ap_demo.o + 0x0001375c 0x0001375c 0x00000044 Code RO 109 i.ap_set_exit_sleep_mode ap_demo.o + 0x000137a0 0x000137a0 0x0000001c Code RO 110 i.ap_set_tp_calibration_04 ap_demo.o + 0x000137bc 0x000137bc 0x000000b0 Code RO 377 i.ap_tp_calibration app_tp_transfer.o + 0x0001386c 0x0001386c 0x0000001c Code RO 378 i.ap_tp_scan_point_init app_tp_transfer.o + 0x00013888 0x00013888 0x0000009c Code RO 379 i.ap_tp_scan_point_record_event app_tp_transfer.o + 0x00013924 0x00013924 0x00000050 Code RO 380 i.ap_tp_scan_point_record_event_exec app_tp_transfer.o + 0x00013974 0x00013974 0x00000034 Code RO 381 i.ap_tp_simulate_finger_release_event app_tp_transfer.o + 0x000139a8 0x000139a8 0x00000040 Code RO 382 i.ap_tp_system_softReset app_tp_transfer.o + 0x000139e8 0x000139e8 0x00000024 Code RO 1338 i.app_AP_NRESET_IRQn_Handler CVWL518.lib(drv_gpio.o) + 0x00013a0c 0x00013a0c 0x0000001c Code RO 1339 i.app_EXTI_INT0_IRQn_Handler CVWL518.lib(drv_gpio.o) + 0x00013a28 0x00013a28 0x0000001c Code RO 1340 i.app_EXTI_INT1_IRQn_Handler CVWL518.lib(drv_gpio.o) + 0x00013a44 0x00013a44 0x0000001c Code RO 1341 i.app_EXTI_INT2_IRQn_Handler CVWL518.lib(drv_gpio.o) + 0x00013a60 0x00013a60 0x0000001c Code RO 1342 i.app_EXTI_INT3_IRQn_Handler CVWL518.lib(drv_gpio.o) + 0x00013a7c 0x00013a7c 0x0000001c Code RO 1343 i.app_EXTI_INT4_IRQn_Handler CVWL518.lib(drv_gpio.o) + 0x00013a98 0x00013a98 0x0000001c Code RO 1344 i.app_EXTI_INT5_IRQn_Handler CVWL518.lib(drv_gpio.o) + 0x00013ab4 0x00013ab4 0x0000001c Code RO 1345 i.app_EXTI_INT6_IRQn_Handler CVWL518.lib(drv_gpio.o) + 0x00013ad0 0x00013ad0 0x0000001c Code RO 1346 i.app_EXTI_INT7_IRQn_Handler CVWL518.lib(drv_gpio.o) + 0x00013aec 0x00013aec 0x00000048 Code RO 1092 i.app_HardFault_Handler CVWL518.lib(drv_common.o) + 0x00013b34 0x00013b34 0x00000010 Code RO 1448 i.app_I2C0_IRQn_Handler CVWL518.lib(drv_i2c_slave.o) + 0x00013b44 0x00013b44 0x00000010 Code RO 1415 i.app_I2C1_IRQn_Handler CVWL518.lib(drv_i2c_master.o) + 0x00013b54 0x00013b54 0x000000e0 Code RO 1687 i.app_LCDC_IRQn_Handler CVWL518.lib(hal_internal_vsync.o) + 0x00013c34 0x00013c34 0x00000060 Code RO 1990 i.app_MEMC_IRQn_Handler CVWL518.lib(drv_memc.o) + 0x00013c94 0x00013c94 0x00000298 Code RO 1760 i.app_MIPI_RX_IRQn_Handler CVWL518.lib(drv_dsi_rx.o) + 0x00013f2c 0x00013f2c 0x000000a0 Code RO 1814 i.app_MIPI_TX_IRQn_Handler CVWL518.lib(drv_dsi_tx.o) + 0x00013fcc 0x00013fcc 0x00000048 Code RO 2388 i.app_PWMDET_IRQn_Handler CVWL518.lib(drv_pwm.o) + 0x00014014 0x00014014 0x00000020 Code RO 1562 i.app_SPIM_IRQn_Handler CVWL518.lib(drv_spi_master.o) + 0x00014034 0x00014034 0x00000200 Code RO 2319 i.app_SPIS_IRQn_Handler CVWL518.lib(hal_spi_slave.o) + 0x00014234 0x00014234 0x00000020 Code RO 1591 i.app_SWIRE_IRQn_Handler CVWL518.lib(drv_swire.o) + 0x00014254 0x00014254 0x00000018 Code RO 1093 i.app_SysTick_Handler CVWL518.lib(drv_common.o) + 0x0001426c 0x0001426c 0x0000000a Code RO 1641 i.app_TIMER0_IRQn_Handler CVWL518.lib(drv_timer.o) + 0x00014276 0x00014276 0x0000000a Code RO 1642 i.app_TIMER1_IRQn_Handler CVWL518.lib(drv_timer.o) + 0x00014280 0x00014280 0x0000000a Code RO 1643 i.app_TIMER2_IRQn_Handler CVWL518.lib(drv_timer.o) + 0x0001428a 0x0001428a 0x0000000a Code RO 1644 i.app_TIMER3_IRQn_Handler CVWL518.lib(drv_timer.o) + 0x00014294 0x00014294 0x00000008 Code RO 2455 i.app_UART_IRQn_Handler CVWL518.lib(drv_uart.o) + 0x0001429c 0x0001429c 0x000000e4 Code RO 1688 i.app_VIDC_IRQn_Handler CVWL518.lib(hal_internal_vsync.o) + 0x00014380 0x00014380 0x00000284 Code RO 1689 i.app_VPRE_IRQn_Handler CVWL518.lib(hal_internal_vsync.o) + 0x00014604 0x00014604 0x00000038 Code RO 2514 i.app_WDG_IRQn_Handler CVWL518.lib(drv_wdg.o) + 0x0001463c 0x0001463c 0x00000008 Code RO 1202 i.app_dma_irq_handler CVWL518.lib(drv_dma.o) + 0x00014644 0x00014644 0x00000030 Code RO 989 i.app_fls_ctrl_Handler CVWL518.lib(norflash.o) + 0x00014674 0x00014674 0x00000024 Code RO 383 i.app_tp_I2C_init app_tp_transfer.o + 0x00014698 0x00014698 0x0000005c Code RO 111 i.app_tp_calibration_exec ap_demo.o + 0x000146f4 0x000146f4 0x0000000a Code RO 384 i.app_tp_i2cs_callback app_tp_transfer.o + 0x000146fe 0x000146fe 0x00000002 PAD + 0x00014700 0x00014700 0x00000048 Code RO 385 i.app_tp_init app_tp_transfer.o + 0x00014748 0x00014748 0x00000020 Code RO 386 i.app_tp_m_read app_tp_transfer.o + 0x00014768 0x00014768 0x00000008 Code RO 387 i.app_tp_m_transfer_complate app_tp_transfer.o + 0x00014770 0x00014770 0x00000008 Code RO 388 i.app_tp_m_write app_tp_transfer.o + 0x00014778 0x00014778 0x0000041c Code RO 288 i.app_tp_phone_analysis_data app_tp_for_custom_s8.o + 0x00014b94 0x00014b94 0x0000000c Code RO 389 i.app_tp_phone_clear_reset_on app_tp_transfer.o + 0x00014ba0 0x00014ba0 0x00000008 Code RO 391 i.app_tp_s_read app_tp_transfer.o + 0x00014ba8 0x00014ba8 0x00000008 Code RO 393 i.app_tp_s_write app_tp_transfer.o + 0x00014bb0 0x00014bb0 0x000002d0 Code RO 290 i.app_tp_screen_analysis_int app_tp_for_custom_s8.o + 0x00014e80 0x00014e80 0x00000030 Code RO 394 i.app_tp_screen_init app_tp_transfer.o + 0x00014eb0 0x00014eb0 0x0000000c Code RO 395 i.app_tp_screen_int_callback app_tp_transfer.o + 0x00014ebc 0x00014ebc 0x00000038 Code RO 396 i.app_tp_screen_int_init app_tp_transfer.o + 0x00014ef4 0x00014ef4 0x00000004 Code RO 397 i.app_tp_screen_int_lvl_low app_tp_transfer.o + 0x00014ef8 0x00014ef8 0x00000030 Code RO 398 i.app_tp_transfer_phone app_tp_transfer.o + 0x00014f28 0x00014f28 0x00000040 Code RO 399 i.app_tp_transfer_screen_const app_tp_transfer.o + 0x00014f68 0x00014f68 0x000001e0 Code RO 400 i.app_tp_transfer_screen_int app_tp_transfer.o + 0x00015148 0x00015148 0x00000018 Code RO 401 i.app_tp_transfer_screen_start app_tp_transfer.o + 0x00015160 0x00015160 0x00000036 Code RO 112 i.blue_change_ccm ap_demo.o + 0x00015196 0x00015196 0x00000002 PAD + 0x00015198 0x00015198 0x0000001c Code RO 567 i.board_Init board.o + 0x000151b4 0x000151b4 0x000001ec Code RO 1690 i.calc_framebuffer_setting CVWL518.lib(hal_internal_vsync.o) + 0x000153a0 0x000153a0 0x000000c8 Code RO 2565 i.ceil m_ps.l(ceil.o) + 0x00015468 0x00015468 0x0000002c Code RO 1691 i.check_mipi_rx_tx_video_info CVWL518.lib(hal_internal_vsync.o) + 0x00015494 0x00015494 0x0000002c Code RO 1692 i.check_pkt_buf_rev CVWL518.lib(hal_internal_vsync.o) + 0x000154c0 0x000154c0 0x00000058 Code RO 1674 i.dcs_packet_fifo_alloc CVWL518.lib(dcs_packet_fifo.o) + 0x00015518 0x00015518 0x00000018 Code RO 1675 i.dcs_packet_fifo_init CVWL518.lib(dcs_packet_fifo.o) + 0x00015530 0x00015530 0x00000044 Code RO 1676 i.dcs_packet_free_fifo_header CVWL518.lib(dcs_packet_fifo.o) + 0x00015574 0x00015574 0x00000024 Code RO 1677 i.dcs_packet_get_fifo_header CVWL518.lib(dcs_packet_fifo.o) + 0x00015598 0x00015598 0x0000001c Code RO 1693 i.dcs_sw_filter CVWL518.lib(hal_internal_vsync.o) + 0x000155b4 0x000155b4 0x00000018 Code RO 970 i.delayMs CVWL518.lib(tau_delay.o) + 0x000155cc 0x000155cc 0x00000022 Code RO 971 i.delayUs CVWL518.lib(tau_delay.o) + 0x000155ee 0x000155ee 0x00000002 PAD + 0x000155f0 0x000155f0 0x00000094 Code RO 113 i.disable_mipi_timer_cb ap_demo.o + 0x00015684 0x00015684 0x00000038 Code RO 1610 i.drv_ap_rst_trig_edge_detect CVWL518.lib(drv_sys_cfg.o) + 0x000156bc 0x000156bc 0x0000000c Code RO 2289 i.drv_chip_info_get_version CVWL518.lib(drv_chip_info.o) + 0x000156c8 0x000156c8 0x000000b0 Code RO 2290 i.drv_chip_info_init CVWL518.lib(drv_chip_info.o) + 0x00015778 0x00015778 0x0000005c Code RO 2291 i.drv_chip_rx_info_check CVWL518.lib(drv_chip_info.o) + 0x000157d4 0x000157d4 0x00000014 Code RO 2292 i.drv_chip_rx_init_done CVWL518.lib(drv_chip_info.o) + 0x000157e8 0x000157e8 0x00000058 Code RO 1095 i.drv_common_enable_systick CVWL518.lib(drv_common.o) + 0x00015840 0x00015840 0x00000030 Code RO 1099 i.drv_common_system_init CVWL518.lib(drv_common.o) + 0x00015870 0x00015870 0x00000010 Code RO 1121 i.drv_crgu_config_reset_modules CVWL518.lib(drv_crgu.o) + 0x00015880 0x00015880 0x00000014 Code RO 1133 i.drv_crgu_set_ahb_pre_div CVWL518.lib(drv_crgu.o) + 0x00015894 0x00015894 0x00000014 Code RO 1134 i.drv_crgu_set_ahb_src CVWL518.lib(drv_crgu.o) + 0x000158a8 0x000158a8 0x00000020 Code RO 1135 i.drv_crgu_set_clock CVWL518.lib(drv_crgu.o) + 0x000158c8 0x000158c8 0x00000014 Code RO 1136 i.drv_crgu_set_dpi_mux_src CVWL518.lib(drv_crgu.o) + 0x000158dc 0x000158dc 0x00000018 Code RO 1137 i.drv_crgu_set_dpi_pre_div CVWL518.lib(drv_crgu.o) + 0x000158f4 0x000158f4 0x00000014 Code RO 1138 i.drv_crgu_set_dpi_pre_src CVWL518.lib(drv_crgu.o) + 0x00015908 0x00015908 0x00000014 Code RO 1139 i.drv_crgu_set_dsc_core_div CVWL518.lib(drv_crgu.o) + 0x0001591c 0x0001591c 0x00000014 Code RO 1140 i.drv_crgu_set_dsco_src CVWL518.lib(drv_crgu.o) + 0x00015930 0x00015930 0x00000014 Code RO 1141 i.drv_crgu_set_dsco_src_div CVWL518.lib(drv_crgu.o) + 0x00015944 0x00015944 0x00000014 Code RO 1142 i.drv_crgu_set_fb_div CVWL518.lib(drv_crgu.o) + 0x00015958 0x00015958 0x00000014 Code RO 1143 i.drv_crgu_set_fb_src CVWL518.lib(drv_crgu.o) + 0x0001596c 0x0001596c 0x00000014 Code RO 1146 i.drv_crgu_set_lcdc_div CVWL518.lib(drv_crgu.o) + 0x00015980 0x00015980 0x00000014 Code RO 1147 i.drv_crgu_set_lcdc_src CVWL518.lib(drv_crgu.o) + 0x00015994 0x00015994 0x00000014 Code RO 1148 i.drv_crgu_set_mipi_cfg_src CVWL518.lib(drv_crgu.o) + 0x000159a8 0x000159a8 0x00000018 Code RO 1149 i.drv_crgu_set_mipi_ref_src CVWL518.lib(drv_crgu.o) + 0x000159c0 0x000159c0 0x00000018 Code RO 1152 i.drv_crgu_set_reset CVWL518.lib(drv_crgu.o) + 0x000159d8 0x000159d8 0x00000014 Code RO 1153 i.drv_crgu_set_rxbr_div CVWL518.lib(drv_crgu.o) + 0x000159ec 0x000159ec 0x00000014 Code RO 1154 i.drv_crgu_set_rxbr_src CVWL518.lib(drv_crgu.o) + 0x00015a00 0x00015a00 0x00000014 Code RO 1156 i.drv_crgu_set_vidc_src CVWL518.lib(drv_crgu.o) + 0x00015a14 0x00015a14 0x0000001c Code RO 1206 i.drv_dma_clear_flag CVWL518.lib(drv_dma.o) + 0x00015a30 0x00015a30 0x00000018 Code RO 1207 i.drv_dma_create_handle CVWL518.lib(drv_dma.o) + 0x00015a48 0x00015a48 0x00000018 Code RO 1209 i.drv_dma_disenable_channel CVWL518.lib(drv_dma.o) + 0x00015a60 0x00015a60 0x00000018 Code RO 1211 i.drv_dma_enable_channel CVWL518.lib(drv_dma.o) + 0x00015a78 0x00015a78 0x00000034 Code RO 1212 i.drv_dma_enable_channel_interrupts CVWL518.lib(drv_dma.o) + 0x00015aac 0x00015aac 0x00000030 Code RO 1213 i.drv_dma_enable_cycle CVWL518.lib(drv_dma.o) + 0x00015adc 0x00015adc 0x00000014 Code RO 1214 i.drv_dma_get_channel_flag CVWL518.lib(drv_dma.o) + 0x00015af0 0x00015af0 0x0000007c Code RO 1217 i.drv_dma_irq_handler CVWL518.lib(drv_dma.o) + 0x00015b6c 0x00015b6c 0x00000018 Code RO 1219 i.drv_dma_prepar_transfer CVWL518.lib(drv_dma.o) + 0x00015b84 0x00015b84 0x0000001c Code RO 1221 i.drv_dma_set_burst CVWL518.lib(drv_dma.o) + 0x00015ba0 0x00015ba0 0x00000006 Code RO 1222 i.drv_dma_set_callback CVWL518.lib(drv_dma.o) + 0x00015ba6 0x00015ba6 0x00000002 PAD + 0x00015ba8 0x00015ba8 0x00000044 Code RO 1224 i.drv_dma_set_transfer CVWL518.lib(drv_dma.o) + 0x00015bec 0x00015bec 0x00000036 Code RO 2302 i.drv_dsc_dec_convert_pps_rc_parameter CVWL518.lib(drv_dsc_dec.o) + 0x00015c22 0x00015c22 0x0000000c Code RO 2303 i.drv_dsc_dec_disable CVWL518.lib(drv_dsc_dec.o) + 0x00015c2e 0x00015c2e 0x00000002 PAD + 0x00015c30 0x00015c30 0x000000b4 Code RO 2304 i.drv_dsc_dec_enable CVWL518.lib(drv_dsc_dec.o) + 0x00015ce4 0x00015ce4 0x0000000a Code RO 2305 i.drv_dsc_dec_get_nslc CVWL518.lib(drv_dsc_dec.o) + 0x00015cee 0x00015cee 0x00000028 Code RO 2307 i.drv_dsc_dec_set_u8_pps CVWL518.lib(drv_dsc_dec.o) + 0x00015d16 0x00015d16 0x00000002 PAD + 0x00015d18 0x00015d18 0x00000104 Code RO 1761 i.drv_dsi_rx_calc_ipi_tx_delay CVWL518.lib(drv_dsi_rx.o) + 0x00015e1c 0x00015e1c 0x00000040 Code RO 1762 i.drv_dsi_rx_enable_irq CVWL518.lib(drv_dsi_rx.o) + 0x00015e5c 0x00015e5c 0x00000050 Code RO 1763 i.drv_dsi_rx_get_color_bpp CVWL518.lib(drv_dsi_rx.o) + 0x00015eac 0x00015eac 0x0000001c Code RO 1764 i.drv_dsi_rx_get_color_pcc CVWL518.lib(drv_dsi_rx.o) + 0x00015ec8 0x00015ec8 0x00000008 Code RO 1765 i.drv_dsi_rx_get_compression_en CVWL518.lib(drv_dsi_rx.o) + 0x00015ed0 0x00015ed0 0x00000006 Code RO 1766 i.drv_dsi_rx_get_max_ret_size CVWL518.lib(drv_dsi_rx.o) + 0x00015ed6 0x00015ed6 0x0000000e Code RO 1770 i.drv_dsi_rx_power_up CVWL518.lib(drv_dsi_rx.o) + 0x00015ee4 0x00015ee4 0x0000001c Code RO 1771 i.drv_dsi_rx_set_ctrl_cfg CVWL518.lib(drv_dsi_rx.o) + 0x00015f00 0x00015f00 0x00000010 Code RO 1772 i.drv_dsi_rx_set_ddi_cfg CVWL518.lib(drv_dsi_rx.o) + 0x00015f10 0x00015f10 0x00000004 Code RO 1774 i.drv_dsi_rx_set_inten CVWL518.lib(drv_dsi_rx.o) + 0x00015f14 0x00015f14 0x00000010 Code RO 1775 i.drv_dsi_rx_set_ipi_cfg CVWL518.lib(drv_dsi_rx.o) + 0x00015f24 0x00015f24 0x00000026 Code RO 1777 i.drv_dsi_rx_set_resp_cnt CVWL518.lib(drv_dsi_rx.o) + 0x00015f4a 0x00015f4a 0x00000002 PAD + 0x00015f4c 0x00015f4c 0x00000090 Code RO 1778 i.drv_dsi_rx_set_up_phy CVWL518.lib(drv_dsi_rx.o) + 0x00015fdc 0x00015fdc 0x0000000e Code RO 1779 i.drv_dsi_rx_shut_down CVWL518.lib(drv_dsi_rx.o) + 0x00015fea 0x00015fea 0x00000014 Code RO 1816 i.drv_dsi_tx_command_header CVWL518.lib(drv_dsi_tx.o) + 0x00015ffe 0x00015ffe 0x0000006c Code RO 1817 i.drv_dsi_tx_command_mode_cfg CVWL518.lib(drv_dsi_tx.o) + 0x0001606a 0x0001606a 0x00000004 Code RO 1818 i.drv_dsi_tx_command_put_payload CVWL518.lib(drv_dsi_tx.o) + 0x0001606e 0x0001606e 0x00000018 Code RO 1819 i.drv_dsi_tx_config_eotp CVWL518.lib(drv_dsi_tx.o) + 0x00016086 0x00016086 0x00000008 Code RO 1820 i.drv_dsi_tx_config_int CVWL518.lib(drv_dsi_tx.o) + 0x0001608e 0x0001608e 0x00000008 Code RO 1821 i.drv_dsi_tx_dpi_lpcmd_time CVWL518.lib(drv_dsi_tx.o) + 0x00016096 0x00016096 0x0000000a Code RO 1822 i.drv_dsi_tx_dpi_mode CVWL518.lib(drv_dsi_tx.o) + 0x000160a0 0x000160a0 0x00000024 Code RO 1823 i.drv_dsi_tx_dpi_polarity CVWL518.lib(drv_dsi_tx.o) + 0x000160c4 0x000160c4 0x00000004 Code RO 1825 i.drv_dsi_tx_get_cmd_status CVWL518.lib(drv_dsi_tx.o) + 0x000160c8 0x000160c8 0x00000004 Code RO 1827 i.drv_dsi_tx_mode CVWL518.lib(drv_dsi_tx.o) + 0x000160cc 0x000160cc 0x00000018 Code RO 1828 i.drv_dsi_tx_phy_clock_lane_auto_lp CVWL518.lib(drv_dsi_tx.o) + 0x000160e4 0x000160e4 0x0000001a Code RO 1829 i.drv_dsi_tx_phy_clock_lane_req_hs CVWL518.lib(drv_dsi_tx.o) + 0x000160fe 0x000160fe 0x0000000c Code RO 1831 i.drv_dsi_tx_phy_lane_mode CVWL518.lib(drv_dsi_tx.o) + 0x0001610a 0x0001610a 0x00000064 Code RO 1835 i.drv_dsi_tx_phy_status_ready CVWL518.lib(drv_dsi_tx.o) + 0x0001616e 0x0001616e 0x0000003e Code RO 1836 i.drv_dsi_tx_phy_status_stopstate CVWL518.lib(drv_dsi_tx.o) + 0x000161ac 0x000161ac 0x000000e4 Code RO 1838 i.drv_dsi_tx_phy_test_setup CVWL518.lib(drv_dsi_tx.o) + 0x00016290 0x00016290 0x0000001e Code RO 1839 i.drv_dsi_tx_phy_time_cfg CVWL518.lib(drv_dsi_tx.o) + 0x000162ae 0x000162ae 0x00000008 Code RO 1843 i.drv_dsi_tx_powerup CVWL518.lib(drv_dsi_tx.o) + 0x000162b6 0x000162b6 0x0000001c Code RO 1844 i.drv_dsi_tx_response_mode CVWL518.lib(drv_dsi_tx.o) + 0x000162d2 0x000162d2 0x00000018 Code RO 1847 i.drv_dsi_tx_set_bta_ack CVWL518.lib(drv_dsi_tx.o) + 0x000162ea 0x000162ea 0x0000000c Code RO 1848 i.drv_dsi_tx_set_esc_div CVWL518.lib(drv_dsi_tx.o) + 0x000162f6 0x000162f6 0x00000002 PAD + 0x000162f8 0x000162f8 0x00000034 Code RO 1849 i.drv_dsi_tx_set_int CVWL518.lib(drv_dsi_tx.o) + 0x0001632c 0x0001632c 0x00000010 Code RO 1850 i.drv_dsi_tx_set_time_out_div CVWL518.lib(drv_dsi_tx.o) + 0x0001633c 0x0001633c 0x00000008 Code RO 1851 i.drv_dsi_tx_set_video_chunk CVWL518.lib(drv_dsi_tx.o) + 0x00016344 0x00016344 0x00000022 Code RO 1852 i.drv_dsi_tx_set_video_timing CVWL518.lib(drv_dsi_tx.o) + 0x00016366 0x00016366 0x00000008 Code RO 1854 i.drv_dsi_tx_shutdown CVWL518.lib(drv_dsi_tx.o) + 0x0001636e 0x0001636e 0x00000026 Code RO 1855 i.drv_dsi_tx_timeout_cfg CVWL518.lib(drv_dsi_tx.o) + 0x00016394 0x00016394 0x000000aa Code RO 1858 i.drv_dsi_tx_video_mode_cfg CVWL518.lib(drv_dsi_tx.o) + 0x0001643e 0x0001643e 0x00000016 Code RO 1859 i.drv_dsi_tx_video_mode_disable_hact_cmd CVWL518.lib(drv_dsi_tx.o) + 0x00016454 0x00016454 0x00000018 Code RO 1860 i.drv_dsi_tx_video_mode_set_lp_cmd CVWL518.lib(drv_dsi_tx.o) + 0x0001646c 0x0001646c 0x00000018 Code RO 1347 i.drv_gpio_get_input_data CVWL518.lib(drv_gpio.o) + 0x00016484 0x00016484 0x0000000c Code RO 1349 i.drv_gpio_register_ap_reset_callback CVWL518.lib(drv_gpio.o) + 0x00016490 0x00016490 0x00000014 Code RO 1350 i.drv_gpio_register_callback CVWL518.lib(drv_gpio.o) + 0x000164a4 0x000164a4 0x00000044 Code RO 1352 i.drv_gpio_set_int CVWL518.lib(drv_gpio.o) + 0x000164e8 0x000164e8 0x00000020 Code RO 1353 i.drv_gpio_set_ioe CVWL518.lib(drv_gpio.o) + 0x00016508 0x00016508 0x00000010 Code RO 1354 i.drv_gpio_set_mode0 CVWL518.lib(drv_gpio.o) + 0x00016518 0x00016518 0x00000010 Code RO 1355 i.drv_gpio_set_mode1 CVWL518.lib(drv_gpio.o) + 0x00016528 0x00016528 0x00000010 Code RO 1356 i.drv_gpio_set_mode2 CVWL518.lib(drv_gpio.o) + 0x00016538 0x00016538 0x00000010 Code RO 1357 i.drv_gpio_set_mode3 CVWL518.lib(drv_gpio.o) + 0x00016548 0x00016548 0x00000020 Code RO 786 i.drv_gpio_set_output_data CVWL518.lib(hal_gpio.o) + 0x00016568 0x00016568 0x00000130 Code RO 1358 i.drv_gpio_set_pull_state CVWL518.lib(drv_gpio.o) + 0x00016698 0x00016698 0x00000060 Code RO 1416 i.drv_i2c_clear_m_it_pending_bit CVWL518.lib(drv_i2c_master.o) + 0x000166f8 0x000166f8 0x0000005c Code RO 1449 i.drv_i2c_clear_s_it_pending_bit CVWL518.lib(drv_i2c_slave.o) + 0x00016754 0x00016754 0x00000034 Code RO 1390 i.drv_i2c_dma_callback CVWL518.lib(drv_i2c_dma.o) + 0x00016788 0x00016788 0x000000ac Code RO 1391 i.drv_i2c_dma_init CVWL518.lib(drv_i2c_dma.o) + 0x00016834 0x00016834 0x0000001a Code RO 1392 i.drv_i2c_enable_rx_dma CVWL518.lib(drv_i2c_dma.o) + 0x0001684e 0x0001684e 0x00000018 Code RO 1393 i.drv_i2c_enable_tx_dma CVWL518.lib(drv_i2c_dma.o) + 0x00016866 0x00016866 0x00000002 PAD + 0x00016868 0x00016868 0x00000038 Code RO 1420 i.drv_i2c_m_enable_intr CVWL518.lib(drv_i2c_master.o) + 0x000168a0 0x000168a0 0x0000000c Code RO 1423 i.drv_i2c_m_set_callback CVWL518.lib(drv_i2c_master.o) + 0x000168ac 0x000168ac 0x0000008c Code RO 1427 i.drv_i2c_master_init CVWL518.lib(drv_i2c_master.o) + 0x00016938 0x00016938 0x0000007c Code RO 1394 i.drv_i2c_master_read_dma CVWL518.lib(drv_i2c_dma.o) + 0x000169b4 0x000169b4 0x00000040 Code RO 1395 i.drv_i2c_master_write_dma CVWL518.lib(drv_i2c_dma.o) + 0x000169f4 0x000169f4 0x0000002e Code RO 1396 i.drv_i2c_master_write_read_cmd CVWL518.lib(drv_i2c_dma.o) + 0x00016a22 0x00016a22 0x00000002 PAD + 0x00016a24 0x00016a24 0x00000034 Code RO 1453 i.drv_i2c_s_enable_intr CVWL518.lib(drv_i2c_slave.o) + 0x00016a58 0x00016a58 0x0000001c Code RO 1454 i.drv_i2c_s_get_fifo_status CVWL518.lib(drv_i2c_slave.o) + 0x00016a74 0x00016a74 0x0000000c Code RO 1457 i.drv_i2c_s_set_callback CVWL518.lib(drv_i2c_slave.o) + 0x00016a80 0x00016a80 0x00000020 Code RO 1460 i.drv_i2c_s_write_data CVWL518.lib(drv_i2c_slave.o) + 0x00016aa0 0x00016aa0 0x00000050 Code RO 1397 i.drv_i2c_set_dma_irq_callback CVWL518.lib(drv_i2c_dma.o) + 0x00016af0 0x00016af0 0x00000044 Code RO 1461 i.drv_i2c_slave_init CVWL518.lib(drv_i2c_slave.o) + 0x00016b34 0x00016b34 0x00000024 Code RO 1398 i.drv_i2c_slave_write_dma CVWL518.lib(drv_i2c_dma.o) + 0x00016b58 0x00016b58 0x00000018 Code RO 1926 i.drv_lcdc_config_420_to_444_mode CVWL518.lib(drv_lcdc.o) + 0x00016b70 0x00016b70 0x00000018 Code RO 1927 i.drv_lcdc_config_bypass CVWL518.lib(drv_lcdc.o) + 0x00016b88 0x00016b88 0x00000018 Code RO 1928 i.drv_lcdc_config_cbcr CVWL518.lib(drv_lcdc.o) + 0x00016ba0 0x00016ba0 0x00000030 Code RO 1929 i.drv_lcdc_config_ccm CVWL518.lib(drv_lcdc.o) + 0x00016bd0 0x00016bd0 0x00000016 Code RO 1930 i.drv_lcdc_config_disp_mode CVWL518.lib(drv_lcdc.o) + 0x00016be6 0x00016be6 0x00000024 Code RO 1931 i.drv_lcdc_config_dpi_polarity CVWL518.lib(drv_lcdc.o) + 0x00016c0a 0x00016c0a 0x00000026 Code RO 1932 i.drv_lcdc_config_dpi_timing CVWL518.lib(drv_lcdc.o) + 0x00016c30 0x00016c30 0x00000016 Code RO 1933 i.drv_lcdc_config_endianness CVWL518.lib(drv_lcdc.o) + 0x00016c46 0x00016c46 0x00000020 Code RO 1934 i.drv_lcdc_config_horiz_flip CVWL518.lib(drv_lcdc.o) + 0x00016c66 0x00016c66 0x0000000c Code RO 1935 i.drv_lcdc_config_input_size CVWL518.lib(drv_lcdc.o) + 0x00016c72 0x00016c72 0x0000001e Code RO 1936 i.drv_lcdc_config_int CVWL518.lib(drv_lcdc.o) + 0x00016c90 0x00016c90 0x00000022 Code RO 1937 i.drv_lcdc_config_int_single CVWL518.lib(drv_lcdc.o) + 0x00016cb2 0x00016cb2 0x00000022 Code RO 1938 i.drv_lcdc_config_overwrite CVWL518.lib(drv_lcdc.o) + 0x00016cd4 0x00016cd4 0x0000000c Code RO 1939 i.drv_lcdc_config_overwrite_rgb CVWL518.lib(drv_lcdc.o) + 0x00016ce0 0x00016ce0 0x0000001a Code RO 1940 i.drv_lcdc_config_partial_display_area CVWL518.lib(drv_lcdc.o) + 0x00016cfa 0x00016cfa 0x00000022 Code RO 1941 i.drv_lcdc_config_partial_display_enable CVWL518.lib(drv_lcdc.o) + 0x00016d1c 0x00016d1c 0x00000072 Code RO 1944 i.drv_lcdc_config_src_parameter CVWL518.lib(drv_lcdc.o) + 0x00016d8e 0x00016d8e 0x00000008 Code RO 1945 i.drv_lcdc_config_thresh CVWL518.lib(drv_lcdc.o) + 0x00016d96 0x00016d96 0x00000060 Code RO 1946 i.drv_lcdc_config_upscaler CVWL518.lib(drv_lcdc.o) + 0x00016df6 0x00016df6 0x0000000a Code RO 1947 i.drv_lcdc_config_yuv420_threshold CVWL518.lib(drv_lcdc.o) + 0x00016e00 0x00016e00 0x00000012 Code RO 1948 i.drv_lcdc_ctrl_flow CVWL518.lib(drv_lcdc.o) + 0x00016e12 0x00016e12 0x00000020 Code RO 1950 i.drv_lcdc_enable_shadow_reg CVWL518.lib(drv_lcdc.o) + 0x00016e32 0x00016e32 0x00000002 PAD + 0x00016e34 0x00016e34 0x00000034 Code RO 1953 i.drv_lcdc_set_int CVWL518.lib(drv_lcdc.o) + 0x00016e68 0x00016e68 0x00000020 Code RO 1954 i.drv_lcdc_start CVWL518.lib(drv_lcdc.o) + 0x00016e88 0x00016e88 0x0000000c Code RO 1955 i.drv_lcdc_update_shadow_reg CVWL518.lib(drv_lcdc.o) + 0x00016e94 0x00016e94 0x00000010 Code RO 1991 i.drv_memc_bypass_fifo_empty CVWL518.lib(drv_memc.o) + 0x00016ea4 0x00016ea4 0x0000000c Code RO 1992 i.drv_memc_clear_status CVWL518.lib(drv_memc.o) + 0x00016eb0 0x00016eb0 0x00000040 Code RO 1993 i.drv_memc_enable_irq CVWL518.lib(drv_memc.o) + 0x00016ef0 0x00016ef0 0x0000000c Code RO 1994 i.drv_memc_gen_a_tear_signal CVWL518.lib(drv_memc.o) + 0x00016efc 0x00016efc 0x00000012 Code RO 1995 i.drv_memc_get_status CVWL518.lib(drv_memc.o) + 0x00016f0e 0x00016f0e 0x00000010 Code RO 1996 i.drv_memc_rate_transfer_sel CVWL518.lib(drv_memc.o) + 0x00016f1e 0x00016f1e 0x0000000e Code RO 1997 i.drv_memc_sel_vsync CVWL518.lib(drv_memc.o) + 0x00016f2c 0x00016f2c 0x0000000c Code RO 1999 i.drv_memc_set_data_mode CVWL518.lib(drv_memc.o) + 0x00016f38 0x00016f38 0x00000010 Code RO 2002 i.drv_memc_set_tear_hwclr CVWL518.lib(drv_memc.o) + 0x00016f48 0x00016f48 0x0000000e Code RO 2003 i.drv_memc_set_tear_mode CVWL518.lib(drv_memc.o) + 0x00016f56 0x00016f56 0x00000002 PAD + 0x00016f58 0x00016f58 0x00000024 Code RO 2004 i.drv_memc_set_tear_waveform CVWL518.lib(drv_memc.o) + 0x00016f7c 0x00016f7c 0x00000010 Code RO 2005 i.drv_memc_set_yuv420_cfg CVWL518.lib(drv_memc.o) + 0x00016f8c 0x00016f8c 0x00000010 Code RO 1482 i.drv_param_get_picture_quality_setting CVWL518.lib(drv_param_init.o) + 0x00016f9c 0x00016f9c 0x00000008 Code RO 1483 i.drv_param_init_get_ccm CVWL518.lib(drv_param_init.o) + 0x00016fa4 0x00016fa4 0x00000014 Code RO 1484 i.drv_param_init_get_scld_filter_h CVWL518.lib(drv_param_init.o) + 0x00016fb8 0x00016fb8 0x00000014 Code RO 1485 i.drv_param_init_get_scld_filter_v CVWL518.lib(drv_param_init.o) + 0x00016fcc 0x00016fcc 0x00000008 Code RO 1486 i.drv_param_init_get_sclu_filter_h CVWL518.lib(drv_param_init.o) + 0x00016fd4 0x00016fd4 0x00000008 Code RO 1487 i.drv_param_init_get_sclu_filter_v CVWL518.lib(drv_param_init.o) + 0x00016fdc 0x00016fdc 0x00000014 Code RO 1488 i.drv_param_init_set_ccm CVWL518.lib(drv_param_init.o) + 0x00016ff0 0x00016ff0 0x0000003c Code RO 1491 i.drv_param_p2r_filter_init CVWL518.lib(drv_param_init.o) + 0x0001702c 0x0001702c 0x00000034 Code RO 1496 i.drv_param_yuv420_filter_init CVWL518.lib(drv_param_init.o) + 0x00017060 0x00017060 0x00000060 Code RO 2026 i.drv_phy_get_pll_para CVWL518.lib(drv_phy_common.o) + 0x000170c0 0x000170c0 0x00000054 Code RO 2027 i.drv_phy_get_rate_para CVWL518.lib(drv_phy_common.o) + 0x00017114 0x00017114 0x00000010 Code RO 2028 i.drv_phy_test_clear CVWL518.lib(drv_phy_common.o) + 0x00017124 0x00017124 0x00000018 Code RO 2029 i.drv_phy_test_lock CVWL518.lib(drv_phy_common.o) + 0x0001713c 0x0001713c 0x00000020 Code RO 2031 i.drv_phy_test_write_1_byte CVWL518.lib(drv_phy_common.o) + 0x0001715c 0x0001715c 0x00000026 Code RO 2032 i.drv_phy_test_write_2_byte CVWL518.lib(drv_phy_common.o) + 0x00017182 0x00017182 0x0000001e Code RO 2033 i.drv_phy_test_write_code CVWL518.lib(drv_phy_common.o) + 0x000171a0 0x000171a0 0x00000020 Code RO 2034 i.drv_phy_test_write_data CVWL518.lib(drv_phy_common.o) + 0x000171c0 0x000171c0 0x00000020 Code RO 1529 i.drv_pwr_set_cp_mode CVWL518.lib(drv_pwr.o) + 0x000171e0 0x000171e0 0x0000001c Code RO 1530 i.drv_pwr_set_pvd_mode CVWL518.lib(drv_pwr.o) + 0x000171fc 0x000171fc 0x00000030 Code RO 1531 i.drv_pwr_set_system_clk_src CVWL518.lib(drv_pwr.o) + 0x0001722c 0x0001722c 0x0000000c Code RO 1780 i.drv_rx_phy_test_clear CVWL518.lib(drv_dsi_rx.o) + 0x00017238 0x00017238 0x00000010 Code RO 1781 i.drv_rx_phy_test_lock CVWL518.lib(drv_dsi_rx.o) + 0x00017248 0x00017248 0x00000014 Code RO 1783 i.drv_rx_phy_test_write_1_byte CVWL518.lib(drv_dsi_rx.o) + 0x0001725c 0x0001725c 0x00000016 Code RO 1784 i.drv_rx_phy_test_write_2_byte CVWL518.lib(drv_dsi_rx.o) + 0x00017272 0x00017272 0x00000006 Code RO 2049 i.drv_rxbr_clear_pkt_buffer CVWL518.lib(drv_rxbr.o) + 0x00017278 0x00017278 0x00000004 Code RO 2050 i.drv_rxbr_clear_status CVWL518.lib(drv_rxbr.o) + 0x0001727c 0x0001727c 0x00000040 Code RO 2052 i.drv_rxbr_enable_irq CVWL518.lib(drv_rxbr.o) + 0x000172bc 0x000172bc 0x00000008 Code RO 2054 i.drv_rxbr_frame_drop_cfg CVWL518.lib(drv_rxbr.o) + 0x000172c4 0x000172c4 0x0000003c Code RO 2055 i.drv_rxbr_get_clk CVWL518.lib(drv_rxbr.o) + 0x00017300 0x00017300 0x00000004 Code RO 2056 i.drv_rxbr_get_col_addr CVWL518.lib(drv_rxbr.o) + 0x00017304 0x00017304 0x00000008 Code RO 2057 i.drv_rxbr_get_cur_hline_rcv_cnt CVWL518.lib(drv_rxbr.o) + 0x0001730c 0x0001730c 0x00000010 Code RO 2058 i.drv_rxbr_get_hline_rcv_cfg CVWL518.lib(drv_rxbr.o) + 0x0001731c 0x0001731c 0x00000012 Code RO 1694 i.drv_rxbr_get_int_source CVWL518.lib(hal_internal_vsync.o) + 0x0001732e 0x0001732e 0x00000004 Code RO 2060 i.drv_rxbr_get_page_addr CVWL518.lib(drv_rxbr.o) + 0x00017332 0x00017332 0x00000012 Code RO 594 i.drv_rxbr_get_status CVWL518.lib(hal_dsi_rx_ctrl.o) + 0x00017344 0x00017344 0x00000012 Code RO 1695 i.drv_rxbr_get_status CVWL518.lib(hal_internal_vsync.o) + 0x00017356 0x00017356 0x0000000c Code RO 2062 i.drv_rxbr_hline_rcv0_cfg CVWL518.lib(drv_rxbr.o) + 0x00017362 0x00017362 0x00000008 Code RO 2064 i.drv_rxbr_hline_rcv_cfg CVWL518.lib(drv_rxbr.o) + 0x0001736a 0x0001736a 0x00000014 Code RO 2066 i.drv_rxbr_set_ack_pkt_header CVWL518.lib(drv_rxbr.o) + 0x0001737e 0x0001737e 0x000000cc Code RO 2067 i.drv_rxbr_set_cmd_filter CVWL518.lib(drv_rxbr.o) + 0x0001744a 0x0001744a 0x00000014 Code RO 2069 i.drv_rxbr_set_color_format CVWL518.lib(drv_rxbr.o) + 0x0001745e 0x0001745e 0x00000014 Code RO 2071 i.drv_rxbr_set_inten CVWL518.lib(drv_rxbr.o) + 0x00017472 0x00017472 0x00000022 Code RO 2073 i.drv_rxbr_set_usr_cfg CVWL518.lib(drv_rxbr.o) + 0x00017494 0x00017494 0x00000008 Code RO 2074 i.drv_rxbr_set_usr_col CVWL518.lib(drv_rxbr.o) + 0x0001749c 0x0001749c 0x00000008 Code RO 2075 i.drv_rxbr_set_usr_row CVWL518.lib(drv_rxbr.o) + 0x000174a4 0x000174a4 0x00000020 Code RO 1570 i.drv_spi_m_read_data CVWL518.lib(drv_spi_master.o) + 0x000174c4 0x000174c4 0x00000048 Code RO 1595 i.drv_swire_set_int CVWL518.lib(drv_swire.o) + 0x0001750c 0x0001750c 0x0000001c Code RO 1596 i.drv_swire_set_power_down CVWL518.lib(drv_swire.o) + 0x00017528 0x00017528 0x0000000c Code RO 1611 i.drv_sys_cfg_clear_all_int CVWL518.lib(drv_sys_cfg.o) + 0x00017534 0x00017534 0x00000028 Code RO 1612 i.drv_sys_cfg_clear_pending CVWL518.lib(drv_sys_cfg.o) + 0x0001755c 0x0001755c 0x00000018 Code RO 1615 i.drv_sys_cfg_sel_ap_rst_lvl_trig CVWL518.lib(drv_sys_cfg.o) + 0x00017574 0x00017574 0x0000001c Code RO 1616 i.drv_sys_cfg_sel_ap_rst_trig CVWL518.lib(drv_sys_cfg.o) + 0x00017590 0x00017590 0x00000024 Code RO 1617 i.drv_sys_cfg_sel_gpio_group CVWL518.lib(drv_sys_cfg.o) + 0x000175b4 0x000175b4 0x00000024 Code RO 1618 i.drv_sys_cfg_sel_int_trig CVWL518.lib(drv_sys_cfg.o) + 0x000175d8 0x000175d8 0x00000010 Code RO 1620 i.drv_sys_cfg_set_dma_rx_req CVWL518.lib(drv_sys_cfg.o) + 0x000175e8 0x000175e8 0x00000010 Code RO 1621 i.drv_sys_cfg_set_dma_tx_req CVWL518.lib(drv_sys_cfg.o) + 0x000175f8 0x000175f8 0x00000024 Code RO 1622 i.drv_sys_cfg_set_int CVWL518.lib(drv_sys_cfg.o) + 0x0001761c 0x0001761c 0x0000001a Code RO 1645 i.drv_timer_clear_status_flags CVWL518.lib(drv_timer.o) + 0x00017636 0x00017636 0x00000020 Code RO 1646 i.drv_timer_enable CVWL518.lib(drv_timer.o) + 0x00017656 0x00017656 0x00000002 PAD + 0x00017658 0x00017658 0x00000010 Code RO 1647 i.drv_timer_get_instance CVWL518.lib(drv_timer.o) + 0x00017668 0x00017668 0x00000010 Code RO 1648 i.drv_timer_get_prescaler CVWL518.lib(drv_timer.o) + 0x00017678 0x00017678 0x0000003c Code RO 1650 i.drv_timer_handle_interrupt CVWL518.lib(drv_timer.o) + 0x000176b4 0x000176b4 0x00000014 Code RO 1651 i.drv_timer_register_callback CVWL518.lib(drv_timer.o) + 0x000176c8 0x000176c8 0x00000010 Code RO 1652 i.drv_timer_set_compare_val CVWL518.lib(drv_timer.o) + 0x000176d8 0x000176d8 0x00000048 Code RO 1653 i.drv_timer_set_int CVWL518.lib(drv_timer.o) + 0x00017720 0x00017720 0x00000028 Code RO 1654 i.drv_timer_set_prescaler CVWL518.lib(drv_timer.o) + 0x00017748 0x00017748 0x0000000a Code RO 1861 i.drv_tx_phy_test_clear CVWL518.lib(drv_dsi_tx.o) + 0x00017752 0x00017752 0x0000001c Code RO 1862 i.drv_tx_phy_test_enter CVWL518.lib(drv_dsi_tx.o) + 0x0001776e 0x0001776e 0x0000001c Code RO 1863 i.drv_tx_phy_test_exit CVWL518.lib(drv_dsi_tx.o) + 0x0001778a 0x0001778a 0x00000012 Code RO 1865 i.drv_tx_phy_test_write_1_byte CVWL518.lib(drv_dsi_tx.o) + 0x0001779c 0x0001779c 0x00000014 Code RO 1866 i.drv_tx_phy_test_write_2_byte CVWL518.lib(drv_dsi_tx.o) + 0x000177b0 0x000177b0 0x00000010 Code RO 1867 i.drv_tx_phy_test_write_code CVWL518.lib(drv_dsi_tx.o) + 0x000177c0 0x000177c0 0x00000008 Code RO 2107 i.drv_vidc_clear_irq CVWL518.lib(drv_vidc.o) + 0x000177c8 0x000177c8 0x00000018 Code RO 2111 i.drv_vidc_enable CVWL518.lib(drv_vidc.o) + 0x000177e0 0x000177e0 0x00000040 Code RO 2112 i.drv_vidc_enable_irq CVWL518.lib(drv_vidc.o) + 0x00017820 0x00017820 0x00000026 Code RO 2113 i.drv_vidc_get_int_source CVWL518.lib(drv_vidc.o) + 0x00017846 0x00017846 0x00000002 PAD + 0x00017848 0x00017848 0x00000044 Code RO 2118 i.drv_vidc_module_enable CVWL518.lib(drv_vidc.o) + 0x0001788c 0x0001788c 0x00000006 Code RO 2119 i.drv_vidc_reset CVWL518.lib(drv_vidc.o) + 0x00017892 0x00017892 0x0000005c Code RO 2121 i.drv_vidc_set_dst_parameter CVWL518.lib(drv_vidc.o) + 0x000178ee 0x000178ee 0x0000000e Code RO 2122 i.drv_vidc_set_enh_chr CVWL518.lib(drv_vidc.o) + 0x000178fc 0x000178fc 0x00000012 Code RO 2123 i.drv_vidc_set_enh_chr2 CVWL518.lib(drv_vidc.o) + 0x0001790e 0x0001790e 0x0000000e Code RO 2124 i.drv_vidc_set_enh_lum CVWL518.lib(drv_vidc.o) + 0x0001791c 0x0001791c 0x00000030 Code RO 2126 i.drv_vidc_set_gain CVWL518.lib(drv_vidc.o) + 0x0001794c 0x0001794c 0x00000014 Code RO 2128 i.drv_vidc_set_irqen CVWL518.lib(drv_vidc.o) + 0x00017960 0x00017960 0x00000008 Code RO 2130 i.drv_vidc_set_p2r_hcoef0 CVWL518.lib(drv_vidc.o) + 0x00017968 0x00017968 0x00000008 Code RO 2131 i.drv_vidc_set_p2r_hcoef1 CVWL518.lib(drv_vidc.o) + 0x00017970 0x00017970 0x00000028 Code RO 2132 i.drv_vidc_set_p2r_hinitb CVWL518.lib(drv_vidc.o) + 0x00017998 0x00017998 0x00000028 Code RO 2133 i.drv_vidc_set_p2r_hinitr CVWL518.lib(drv_vidc.o) + 0x000179c0 0x000179c0 0x00000008 Code RO 2134 i.drv_vidc_set_p2r_step CVWL518.lib(drv_vidc.o) + 0x000179c8 0x000179c8 0x00000020 Code RO 2137 i.drv_vidc_set_pu_ctrl CVWL518.lib(drv_vidc.o) + 0x000179e8 0x000179e8 0x0000000e Code RO 2138 i.drv_vidc_set_pu_scld CVWL518.lib(drv_vidc.o) + 0x000179f6 0x000179f6 0x0000000a Code RO 2139 i.drv_vidc_set_scld_hcoef0 CVWL518.lib(drv_vidc.o) + 0x00017a00 0x00017a00 0x0000000a Code RO 2140 i.drv_vidc_set_scld_hcoef1 CVWL518.lib(drv_vidc.o) + 0x00017a0a 0x00017a0a 0x00000012 Code RO 2141 i.drv_vidc_set_scld_step CVWL518.lib(drv_vidc.o) + 0x00017a1c 0x00017a1c 0x0000000a Code RO 2142 i.drv_vidc_set_scld_vcoef0 CVWL518.lib(drv_vidc.o) + 0x00017a26 0x00017a26 0x0000000a Code RO 2143 i.drv_vidc_set_scld_vcoef1 CVWL518.lib(drv_vidc.o) + 0x00017a30 0x00017a30 0x0000000a Code RO 2144 i.drv_vidc_set_sclu_hcoef0c CVWL518.lib(drv_vidc.o) + 0x00017a3a 0x00017a3a 0x0000000a Code RO 2145 i.drv_vidc_set_sclu_hcoef0y CVWL518.lib(drv_vidc.o) + 0x00017a44 0x00017a44 0x0000000a Code RO 2146 i.drv_vidc_set_sclu_hcoef1c CVWL518.lib(drv_vidc.o) + 0x00017a4e 0x00017a4e 0x0000000a Code RO 2147 i.drv_vidc_set_sclu_hcoef1y CVWL518.lib(drv_vidc.o) + 0x00017a58 0x00017a58 0x0000000a Code RO 2148 i.drv_vidc_set_sclu_vcoef0c CVWL518.lib(drv_vidc.o) + 0x00017a62 0x00017a62 0x0000000a Code RO 2149 i.drv_vidc_set_sclu_vcoef0y CVWL518.lib(drv_vidc.o) + 0x00017a6c 0x00017a6c 0x0000000a Code RO 2150 i.drv_vidc_set_sclu_vcoef1c CVWL518.lib(drv_vidc.o) + 0x00017a76 0x00017a76 0x0000000a Code RO 2151 i.drv_vidc_set_sclu_vcoef1y CVWL518.lib(drv_vidc.o) + 0x00017a80 0x00017a80 0x00000024 Code RO 2152 i.drv_vidc_set_src_parameter CVWL518.lib(drv_vidc.o) + 0x00017aa4 0x00017aa4 0x0000000a Code RO 2153 i.drv_vidc_set_y4t2_hcoef0 CVWL518.lib(drv_vidc.o) + 0x00017aae 0x00017aae 0x0000000a Code RO 2154 i.drv_vidc_set_y4t2_hcoef1 CVWL518.lib(drv_vidc.o) + 0x00017ab8 0x00017ab8 0x0000000a Code RO 2156 i.drv_vidc_set_y4t2_vcoef0 CVWL518.lib(drv_vidc.o) + 0x00017ac2 0x00017ac2 0x0000000a Code RO 2157 i.drv_vidc_set_y4t2_vcoef1 CVWL518.lib(drv_vidc.o) + 0x00017acc 0x00017acc 0x00000010 Code RO 2515 i.drv_wdg_clear_counter CVWL518.lib(drv_wdg.o) + 0x00017adc 0x00017adc 0x00000010 Code RO 2516 i.drv_wdg_clear_edge_flag CVWL518.lib(drv_wdg.o) + 0x00017aec 0x00017aec 0x00000010 Code RO 2519 i.drv_wdg_read_edge_flag CVWL518.lib(drv_wdg.o) + 0x00017afc 0x00017afc 0x00000034 Code RO 2522 i.drv_wdg_set_int CVWL518.lib(drv_wdg.o) + 0x00017b30 0x00017b30 0x00000006 Code RO 1260 i.fls_clear_irq_status CVWL518.lib(drv_fls.o) + 0x00017b36 0x00017b36 0x00000014 Code RO 980 i.fputc CVWL518.lib(tau_log.o) + 0x00017b4a 0x00017b4a 0x00000002 PAD + 0x00017b4c 0x00017b4c 0x00000030 Code RO 597 i.hal_dsi_rx_ctrl_create_handle CVWL518.lib(hal_dsi_rx_ctrl.o) + 0x00017b7c 0x00017b7c 0x0000009c Code RO 598 i.hal_dsi_rx_ctrl_deinit CVWL518.lib(hal_dsi_rx_ctrl.o) + 0x00017c18 0x00017c18 0x00000084 Code RO 599 i.hal_dsi_rx_ctrl_dsc_async_handler CVWL518.lib(hal_dsi_rx_ctrl.o) + 0x00017c9c 0x00017c9c 0x00000028 Code RO 601 i.hal_dsi_rx_ctrl_gen_a_tear_signal CVWL518.lib(hal_dsi_rx_ctrl.o) + 0x00017cc4 0x00017cc4 0x00000028 Code RO 603 i.hal_dsi_rx_ctrl_get_max_ret_size CVWL518.lib(hal_dsi_rx_ctrl.o) + 0x00017cec 0x00017cec 0x00000064 Code RO 605 i.hal_dsi_rx_ctrl_init CVWL518.lib(hal_dsi_rx_ctrl.o) + 0x00017d50 0x00017d50 0x00000124 Code RO 606 i.hal_dsi_rx_ctrl_init_clk CVWL518.lib(hal_dsi_rx_ctrl.o) + 0x00017e74 0x00017e74 0x00000048 Code RO 607 i.hal_dsi_rx_ctrl_init_dsc_dec CVWL518.lib(hal_dsi_rx_ctrl.o) + 0x00017ebc 0x00017ebc 0x000000cc Code RO 608 i.hal_dsi_rx_ctrl_init_dsi_rx CVWL518.lib(hal_dsi_rx_ctrl.o) + 0x00017f88 0x00017f88 0x000000c4 Code RO 609 i.hal_dsi_rx_ctrl_init_memc CVWL518.lib(hal_dsi_rx_ctrl.o) + 0x0001804c 0x0001804c 0x0000014c Code RO 610 i.hal_dsi_rx_ctrl_init_rxbr CVWL518.lib(hal_dsi_rx_ctrl.o) + 0x00018198 0x00018198 0x00000388 Code RO 611 i.hal_dsi_rx_ctrl_init_vidc CVWL518.lib(hal_dsi_rx_ctrl.o) + 0x00018520 0x00018520 0x0000003c Code RO 612 i.hal_dsi_rx_ctrl_pre_init_pps CVWL518.lib(hal_dsi_rx_ctrl.o) + 0x0001855c 0x0001855c 0x000000f0 Code RO 615 i.hal_dsi_rx_ctrl_send_ack_cmd CVWL518.lib(hal_dsi_rx_ctrl.o) + 0x0001864c 0x0001864c 0x00000034 Code RO 623 i.hal_dsi_rx_ctrl_set_cus_sync_line CVWL518.lib(hal_dsi_rx_ctrl.o) + 0x00018680 0x00018680 0x00000034 Code RO 626 i.hal_dsi_rx_ctrl_set_hw_tear_mode CVWL518.lib(hal_dsi_rx_ctrl.o) + 0x000186b4 0x000186b4 0x00000034 Code RO 627 i.hal_dsi_rx_ctrl_set_ipi_cfg CVWL518.lib(hal_dsi_rx_ctrl.o) + 0x000186e8 0x000186e8 0x00000072 Code RO 630 i.hal_dsi_rx_ctrl_set_rxbr_clk CVWL518.lib(hal_dsi_rx_ctrl.o) + 0x0001875a 0x0001875a 0x00000002 PAD + 0x0001875c 0x0001875c 0x00000034 Code RO 631 i.hal_dsi_rx_ctrl_set_sw_tear_mode CVWL518.lib(hal_dsi_rx_ctrl.o) + 0x00018790 0x00018790 0x0000003c Code RO 634 i.hal_dsi_rx_ctrl_start CVWL518.lib(hal_dsi_rx_ctrl.o) + 0x000187cc 0x000187cc 0x00000048 Code RO 635 i.hal_dsi_rx_ctrl_stop CVWL518.lib(hal_dsi_rx_ctrl.o) + 0x00018814 0x00018814 0x00000020 Code RO 637 i.hal_dsi_rx_ctrl_toggle_resolution CVWL518.lib(hal_dsi_rx_ctrl.o) + 0x00018834 0x00018834 0x00000190 Code RO 689 i.hal_dsi_tx_calc_video_chunks CVWL518.lib(hal_dsi_tx_ctrl.o) + 0x000189c4 0x000189c4 0x00000034 Code RO 690 i.hal_dsi_tx_config_params_for_lane_rate CVWL518.lib(hal_dsi_tx_ctrl.o) + 0x000189f8 0x000189f8 0x000003c0 Code RO 691 i.hal_dsi_tx_count_lane_rate CVWL518.lib(hal_dsi_tx_ctrl.o) + 0x00018db8 0x00018db8 0x0000002c Code RO 693 i.hal_dsi_tx_ctrl_create_handle CVWL518.lib(hal_dsi_tx_ctrl.o) + 0x00018de4 0x00018de4 0x00000048 Code RO 694 i.hal_dsi_tx_ctrl_deinit CVWL518.lib(hal_dsi_tx_ctrl.o) + 0x00018e2c 0x00018e2c 0x0000004c Code RO 695 i.hal_dsi_tx_ctrl_enter_init_panel_mode CVWL518.lib(hal_dsi_tx_ctrl.o) + 0x00018e78 0x00018e78 0x00000024 Code RO 697 i.hal_dsi_tx_ctrl_exit_init_panel_mode CVWL518.lib(hal_dsi_tx_ctrl.o) + 0x00018e9c 0x00018e9c 0x000000c4 Code RO 699 i.hal_dsi_tx_ctrl_init CVWL518.lib(hal_dsi_tx_ctrl.o) + 0x00018f60 0x00018f60 0x00000024 Code RO 700 i.hal_dsi_tx_ctrl_init_clk CVWL518.lib(hal_dsi_tx_ctrl.o) + 0x00018f84 0x00018f84 0x0000000c Code RO 701 i.hal_dsi_tx_ctrl_panel_reset_pin CVWL518.lib(hal_dsi_tx_ctrl.o) + 0x00018f90 0x00018f90 0x00000020 Code RO 704 i.hal_dsi_tx_ctrl_set_ccm CVWL518.lib(hal_dsi_tx_ctrl.o) + 0x00018fb0 0x00018fb0 0x00000014 Code RO 712 i.hal_dsi_tx_ctrl_set_overwrite_rgb CVWL518.lib(hal_dsi_tx_ctrl.o) + 0x00018fc4 0x00018fc4 0x00000010 Code RO 713 i.hal_dsi_tx_ctrl_set_partial_disp CVWL518.lib(hal_dsi_tx_ctrl.o) + 0x00018fd4 0x00018fd4 0x00000024 Code RO 714 i.hal_dsi_tx_ctrl_set_partial_disp_area CVWL518.lib(hal_dsi_tx_ctrl.o) + 0x00018ff8 0x00018ff8 0x00000060 Code RO 716 i.hal_dsi_tx_ctrl_start CVWL518.lib(hal_dsi_tx_ctrl.o) + 0x00019058 0x00019058 0x00000044 Code RO 717 i.hal_dsi_tx_ctrl_stop CVWL518.lib(hal_dsi_tx_ctrl.o) + 0x0001909c 0x0001909c 0x0000019c Code RO 718 i.hal_dsi_tx_ctrl_write_array_cmd CVWL518.lib(hal_dsi_tx_ctrl.o) + 0x00019238 0x00019238 0x00000150 Code RO 719 i.hal_dsi_tx_ctrl_write_cmd CVWL518.lib(hal_dsi_tx_ctrl.o) + 0x00019388 0x00019388 0x00000028 Code RO 720 i.hal_dsi_tx_init_data_mode CVWL518.lib(hal_dsi_tx_ctrl.o) + 0x000193b0 0x000193b0 0x00000030 Code RO 721 i.hal_dsi_tx_init_dpi_cfg CVWL518.lib(hal_dsi_tx_ctrl.o) + 0x000193e0 0x000193e0 0x00000020 Code RO 722 i.hal_dsi_tx_init_interrupt CVWL518.lib(hal_dsi_tx_ctrl.o) + 0x00019400 0x00019400 0x00000020 Code RO 723 i.hal_dsi_tx_init_phy_cfg CVWL518.lib(hal_dsi_tx_ctrl.o) + 0x00019420 0x00019420 0x00000094 Code RO 724 i.hal_dsi_tx_init_remains CVWL518.lib(hal_dsi_tx_ctrl.o) + 0x000194b4 0x000194b4 0x00000058 Code RO 725 i.hal_dsi_tx_init_video_mode CVWL518.lib(hal_dsi_tx_ctrl.o) + 0x0001950c 0x0001950c 0x00000044 Code RO 726 i.hal_dsi_tx_send_cmd CVWL518.lib(hal_dsi_tx_ctrl.o) + 0x00019550 0x00019550 0x00000018 Code RO 787 i.hal_gpio_ctrl_eint CVWL518.lib(hal_gpio.o) + 0x00019568 0x00019568 0x00000012 Code RO 788 i.hal_gpio_get_input_data CVWL518.lib(hal_gpio.o) + 0x0001957a 0x0001957a 0x00000002 PAD + 0x0001957c 0x0001957c 0x00000040 Code RO 791 i.hal_gpio_init_eint CVWL518.lib(hal_gpio.o) + 0x000195bc 0x000195bc 0x00000020 Code RO 792 i.hal_gpio_init_input CVWL518.lib(hal_gpio.o) + 0x000195dc 0x000195dc 0x00000028 Code RO 793 i.hal_gpio_init_output CVWL518.lib(hal_gpio.o) + 0x00019604 0x00019604 0x00000018 Code RO 794 i.hal_gpio_reg_eint_cb CVWL518.lib(hal_gpio.o) + 0x0001961c 0x0001961c 0x00000050 Code RO 795 i.hal_gpio_set_ap_reset_int CVWL518.lib(hal_gpio.o) + 0x0001966c 0x0001966c 0x00000060 Code RO 797 i.hal_gpio_set_mode CVWL518.lib(hal_gpio.o) + 0x000196cc 0x000196cc 0x00000008 Code RO 798 i.hal_gpio_set_output_data CVWL518.lib(hal_gpio.o) + 0x000196d4 0x000196d4 0x00000020 Code RO 800 i.hal_gpio_set_pull_state CVWL518.lib(hal_gpio.o) + 0x000196f4 0x000196f4 0x0000006c Code RO 826 i.hal_i2c_m_dma_init CVWL518.lib(hal_i2c_master.o) + 0x00019760 0x00019760 0x0000002c Code RO 827 i.hal_i2c_m_dma_read CVWL518.lib(hal_i2c_master.o) + 0x0001978c 0x0001978c 0x00000028 Code RO 828 i.hal_i2c_m_dma_write CVWL518.lib(hal_i2c_master.o) + 0x000197b4 0x000197b4 0x00000020 Code RO 830 i.hal_i2c_m_transfer_complate CVWL518.lib(hal_i2c_master.o) + 0x000197d4 0x000197d4 0x00000020 Code RO 831 i.hal_i2c_master_irq_callback CVWL518.lib(hal_i2c_master.o) + 0x000197f4 0x000197f4 0x00000010 Code RO 845 i.hal_i2c_s_dma_user_callback CVWL518.lib(hal_i2c_slave.o) + 0x00019804 0x00019804 0x0000003c Code RO 846 i.hal_i2c_s_dma_write CVWL518.lib(hal_i2c_slave.o) + 0x00019840 0x00019840 0x0000006c Code RO 848 i.hal_i2c_s_init CVWL518.lib(hal_i2c_slave.o) + 0x000198ac 0x000198ac 0x00000014 Code RO 849 i.hal_i2c_s_nonblocking_read CVWL518.lib(hal_i2c_slave.o) + 0x000198c0 0x000198c0 0x0000000c Code RO 856 i.hal_i2c_s_set_transfer CVWL518.lib(hal_i2c_slave.o) + 0x000198cc 0x000198cc 0x00000150 Code RO 859 i.hal_i2c_slave_irq_callback CVWL518.lib(hal_i2c_slave.o) + 0x00019a1c 0x00019a1c 0x000000b0 Code RO 1696 i.hal_internal_init_memc CVWL518.lib(hal_internal_vsync.o) + 0x00019acc 0x00019acc 0x00000010 Code RO 1697 i.hal_internal_sync_get_fb_setting CVWL518.lib(hal_internal_vsync.o) + 0x00019adc 0x00019adc 0x0000024c Code RO 1698 i.hal_internal_sync_input_resolution_change CVWL518.lib(hal_internal_vsync.o) + 0x00019d28 0x00019d28 0x00000188 Code RO 1699 i.hal_internal_sync_set_fb_setting_manual CVWL518.lib(hal_internal_vsync.o) + 0x00019eb0 0x00019eb0 0x0000001c Code RO 1700 i.hal_internal_vsync_deinit CVWL518.lib(hal_internal_vsync.o) + 0x00019ecc 0x00019ecc 0x0000000c Code RO 1701 i.hal_internal_vsync_get_rx_state CVWL518.lib(hal_internal_vsync.o) + 0x00019ed8 0x00019ed8 0x0000001c Code RO 1702 i.hal_internal_vsync_get_sync_line CVWL518.lib(hal_internal_vsync.o) + 0x00019ef4 0x00019ef4 0x0000000c Code RO 1703 i.hal_internal_vsync_get_tx_state CVWL518.lib(hal_internal_vsync.o) + 0x00019f00 0x00019f00 0x00000020 Code RO 1704 i.hal_internal_vsync_get_y2t4_use_sclu CVWL518.lib(hal_internal_vsync.o) + 0x00019f20 0x00019f20 0x000000bc Code RO 1705 i.hal_internal_vsync_init_rx CVWL518.lib(hal_internal_vsync.o) + 0x00019fdc 0x00019fdc 0x000000a4 Code RO 1706 i.hal_internal_vsync_init_tx CVWL518.lib(hal_internal_vsync.o) + 0x0001a080 0x0001a080 0x0000011c Code RO 1707 i.hal_internal_vsync_set_auto_hw_filter CVWL518.lib(hal_internal_vsync.o) + 0x0001a19c 0x0001a19c 0x00000018 Code RO 1709 i.hal_internal_vsync_set_rx_state CVWL518.lib(hal_internal_vsync.o) + 0x0001a1b4 0x0001a1b4 0x00000020 Code RO 1710 i.hal_internal_vsync_set_sync_line CVWL518.lib(hal_internal_vsync.o) + 0x0001a1d4 0x0001a1d4 0x00000048 Code RO 1711 i.hal_internal_vsync_set_tear_mode CVWL518.lib(hal_internal_vsync.o) + 0x0001a21c 0x0001a21c 0x00000044 Code RO 1712 i.hal_internal_vsync_set_tx_state CVWL518.lib(hal_internal_vsync.o) + 0x0001a260 0x0001a260 0x00000024 Code RO 727 i.hal_lcdc_config_ccm CVWL518.lib(hal_dsi_tx_ctrl.o) + 0x0001a284 0x0001a284 0x00000054 Code RO 728 i.hal_lcdc_config_remains CVWL518.lib(hal_dsi_tx_ctrl.o) + 0x0001a2d8 0x0001a2d8 0x00000014 Code RO 729 i.hal_lcdc_config_rgb_to_pentile CVWL518.lib(hal_dsi_tx_ctrl.o) + 0x0001a2ec 0x0001a2ec 0x000001c8 Code RO 730 i.hal_lcdc_config_upscaler CVWL518.lib(hal_dsi_tx_ctrl.o) + 0x0001a4b4 0x0001a4b4 0x00000020 Code RO 731 i.hal_lcdc_config_yuv_to_rgb CVWL518.lib(hal_dsi_tx_ctrl.o) + 0x0001a4d4 0x0001a4d4 0x0000003a Code RO 732 i.hal_lcdc_init_cfg CVWL518.lib(hal_dsi_tx_ctrl.o) + 0x0001a50e 0x0001a50e 0x00000002 PAD + 0x0001a510 0x0001a510 0x00000180 Code RO 733 i.hal_lcdc_init_clk CVWL518.lib(hal_dsi_tx_ctrl.o) + 0x0001a690 0x0001a690 0x00000040 Code RO 734 i.hal_lcdc_init_interrupt CVWL518.lib(hal_dsi_tx_ctrl.o) + 0x0001a6d0 0x0001a6d0 0x0000000e Code RO 882 i.hal_spi_m_clear_rxfifo CVWL518.lib(hal_spi_master.o) + 0x0001a6de 0x0001a6de 0x00000016 Code RO 906 i.hal_swire_open CVWL518.lib(hal_swire.o) + 0x0001a6f4 0x0001a6f4 0x00000008 Code RO 920 i.hal_system_enable_systick CVWL518.lib(hal_system.o) + 0x0001a6fc 0x0001a6fc 0x00000088 Code RO 925 i.hal_system_init CVWL518.lib(hal_system.o) + 0x0001a784 0x0001a784 0x0000001c Code RO 926 i.hal_system_init_console CVWL518.lib(hal_system.o) + 0x0001a7a0 0x0001a7a0 0x00000008 Code RO 929 i.hal_system_set_pvd CVWL518.lib(hal_system.o) + 0x0001a7a8 0x0001a7a8 0x00000008 Code RO 930 i.hal_system_set_vcc CVWL518.lib(hal_system.o) + 0x0001a7b0 0x0001a7b0 0x0000001a Code RO 954 i.hal_timer_init CVWL518.lib(hal_timer.o) + 0x0001a7ca 0x0001a7ca 0x00000002 PAD + 0x0001a7cc 0x0001a7cc 0x00000048 Code RO 956 i.hal_timer_start CVWL518.lib(hal_timer.o) + 0x0001a814 0x0001a814 0x00000028 Code RO 958 i.hal_timer_stop CVWL518.lib(hal_timer.o) + 0x0001a83c 0x0001a83c 0x0000008c Code RO 1075 i.hal_uart_init CVWL518.lib(hal_uart.o) + 0x0001a8c8 0x0001a8c8 0x00000010 Code RO 1078 i.hal_uart_transmit_blocking CVWL518.lib(hal_uart.o) + 0x0001a8d8 0x0001a8d8 0x00000108 Code RO 2250 i.handle_init CVWL518.lib(irq_redirect .o) + 0x0001a9e0 0x0001a9e0 0x00000068 Code RO 114 i.init_mipi_tx ap_demo.o + 0x0001aa48 0x0001aa48 0x000000b8 Code RO 115 i.init_panel ap_demo.o + 0x0001ab00 0x0001ab00 0x0000000a Code RO 3 i.main main.o + 0x0001ab0a 0x0001ab0a 0x00000002 PAD + 0x0001ab0c 0x0001ab0c 0x000000a4 Code RO 116 i.open_mipi_rx ap_demo.o + 0x0001abb0 0x0001abb0 0x00000054 Code RO 117 i.pps_update_handle ap_demo.o + 0x0001ac04 0x0001ac04 0x00000410 Code RO 1713 i.rx_get_dcs_packet_data CVWL518.lib(hal_internal_vsync.o) + 0x0001b014 0x0001b014 0x0000013c Code RO 1714 i.rx_partial_update CVWL518.lib(hal_internal_vsync.o) + 0x0001b150 0x0001b150 0x00000064 Code RO 1715 i.rx_receive_packet CVWL518.lib(hal_internal_vsync.o) + 0x0001b1b4 0x0001b1b4 0x00000180 Code RO 1716 i.rx_receive_pps CVWL518.lib(hal_internal_vsync.o) + 0x0001b334 0x0001b334 0x0000002a Code RO 118 i.send_panel_init_code ap_demo.o + 0x0001b35e 0x0001b35e 0x00000002 PAD + 0x0001b360 0x0001b360 0x00000060 Code RO 119 i.soft_disable_mipi_timer_init ap_demo.o + 0x0001b3c0 0x0001b3c0 0x0000008c Code RO 1717 i.soft_gen_te CVWL518.lib(hal_internal_vsync.o) + 0x0001b44c 0x0001b44c 0x00000030 Code RO 120 i.soft_timer3_cb ap_demo.o + 0x0001b47c 0x0001b47c 0x0000006c Code RO 121 i.tp_heartbeat_exec ap_demo.o + 0x0001b4e8 0x0001b4e8 0x00000014 Code RO 122 i.tx_display_on ap_demo.o + 0x0001b4fc 0x0001b4fc 0x00000028 Code RO 123 i.tx_panel_reset ap_demo.o + 0x0001b524 0x0001b524 0x000000d0 Code RO 1718 i.vpre_err_reset CVWL518.lib(hal_internal_vsync.o) + 0x0001b5f4 0x0001b5f4 0x0000019c Code RO 1719 i.vsync_set_te_mode CVWL518.lib(hal_internal_vsync.o) + 0x0001b790 0x0001b790 0x000000ec Data RO 124 .constdata ap_demo.o + 0x0001b87c 0x0001b87c 0x00002150 Data RO 292 .constdata app_tp_for_custom_s8.o + 0x0001d9cc 0x0001d9cc 0x000000d2 Data RO 803 .constdata CVWL518.lib(hal_gpio.o) + 0x0001da9e 0x0001da9e 0x00000002 PAD + 0x0001daa0 0x0001daa0 0x00000110 Data RO 1497 .constdata CVWL518.lib(drv_param_init.o) + 0x0001dbb0 0x0001dbb0 0x00000186 Data RO 2035 .constdata CVWL518.lib(drv_phy_common.o) + 0x0001dd36 0x0001dd36 0x00000002 PAD + 0x0001dd38 0x0001dd38 0x00000048 Data RO 639 .conststring CVWL518.lib(hal_dsi_rx_ctrl.o) + 0x0001dd80 0x0001dd80 0x00000128 Data RO 1721 .conststring CVWL518.lib(hal_internal_vsync.o) + 0x0001dea8 0x0001dea8 0x00000030 Data RO 2910 Region$$Table anon$$obj.o + + + Execution Region RW_RAM1 (Exec base: 0x00070000, Load base: 0x0001ded8, Size: 0x00000000, Max: 0x000000f0, ABSOLUTE) + + **** No section assigned to this execution region **** + + + Execution Region RW_RAM2 (Exec base: 0x00070100, Load base: 0x0001ded8, Size: 0x000000c0, Max: 0x000000d0, ABSOLUTE) + + Exec Addr Load Addr Size Type Attr Idx E Section Name Object + + 0x00070100 - 0x000000c0 Zero RW 2251 .ARM.__AT_0x00070100 CVWL518.lib(irq_redirect .o) + + + Execution Region RW_RAM3 (Exec base: 0x000701d0, Load base: 0x0001ded8, Size: 0x00005840, Max: 0x00007e30, ABSOLUTE, COMPRESSED[0x00001f28]) + + Exec Addr Load Addr Size Type Attr Idx E Section Name Object + + 0x000701d0 COMPRESSED 0x00002719 Data RW 125 .data ap_demo.o + 0x000728e9 COMPRESSED 0x00000001 PAD + 0x000728ea COMPRESSED 0x000000e4 Data RW 306 .data app_tp_for_custom_s8.o + 0x000729ce COMPRESSED 0x00000001 Data RW 309 .data app_tp_for_custom_s8.o + 0x000729cf COMPRESSED 0x00000001 Data RW 310 .data app_tp_for_custom_s8.o + 0x000729d0 COMPRESSED 0x00000001 Data RW 315 .data app_tp_for_custom_s8.o + 0x000729d1 COMPRESSED 0x00000003 Data RW 316 .data app_tp_for_custom_s8.o + 0x000729d4 COMPRESSED 0x00000005 Data RW 317 .data app_tp_for_custom_s8.o + 0x000729d9 COMPRESSED 0x00000003 PAD + 0x000729dc COMPRESSED 0x00000030 Data RW 327 .data app_tp_for_custom_s8.o + 0x00072a0c COMPRESSED 0x00000031 Data RW 403 .data app_tp_transfer.o + 0x00072a3d COMPRESSED 0x00000003 PAD + 0x00072a40 COMPRESSED 0x00000008 Data RW 640 .data CVWL518.lib(hal_dsi_rx_ctrl.o) + 0x00072a48 COMPRESSED 0x00000001 Data RW 832 .data CVWL518.lib(hal_i2c_master.o) + 0x00072a49 COMPRESSED 0x00000003 PAD + 0x00072a4c COMPRESSED 0x0000001c Data RW 860 .data CVWL518.lib(hal_i2c_slave.o) + 0x00072a68 COMPRESSED 0x00000012 Data RW 1029 .data CVWL518.lib(norflash.o) + 0x00072a7a COMPRESSED 0x00000002 PAD + 0x00072a7c COMPRESSED 0x0000000c Data RW 1102 .data CVWL518.lib(drv_common.o) + 0x00072a88 COMPRESSED 0x00000004 Data RW 1362 .data CVWL518.lib(drv_gpio.o) + 0x00072a8c COMPRESSED 0x00000008 Data RW 1400 .data CVWL518.lib(drv_i2c_dma.o) + 0x00072a94 COMPRESSED 0x00000004 Data RW 1428 .data CVWL518.lib(drv_i2c_master.o) + 0x00072a98 COMPRESSED 0x00000008 Data RW 1462 .data CVWL518.lib(drv_i2c_slave.o) + 0x00072aa0 COMPRESSED 0x0000064c Data RW 1498 .data CVWL518.lib(drv_param_init.o) + 0x000730ec COMPRESSED 0x00000004 Data RW 1574 .data CVWL518.lib(drv_spi_master.o) + 0x000730f0 COMPRESSED 0x00000008 Data RW 1598 .data CVWL518.lib(drv_swire.o) + 0x000730f8 COMPRESSED 0x00000001 Data RW 1623 .data CVWL518.lib(drv_sys_cfg.o) + 0x000730f9 COMPRESSED 0x00000003 PAD + 0x000730fc COMPRESSED 0x00000050 Data RW 1656 .data CVWL518.lib(drv_timer.o) + 0x0007314c COMPRESSED 0x00000004 Data RW 1722 .data CVWL518.lib(hal_internal_vsync.o) + 0x00073150 COMPRESSED 0x00000008 Data RW 2293 .data CVWL518.lib(drv_chip_info.o) + 0x00073158 COMPRESSED 0x0000000c Data RW 2405 .data CVWL518.lib(drv_pwm.o) + 0x00073164 COMPRESSED 0x00000008 Data RW 2457 .data CVWL518.lib(drv_uart.o) + 0x0007316c COMPRESSED 0x0000000c Data RW 2524 .data CVWL518.lib(drv_wdg.o) + 0x00073178 COMPRESSED 0x00000004 Data RW 2884 .data mc_p.l(stdout.o) + 0x0007317c - 0x0000019c Zero RW 402 .bss app_tp_transfer.o + 0x00073318 - 0x000000b8 Zero RW 638 .bss CVWL518.lib(hal_dsi_rx_ctrl.o) + 0x000733d0 - 0x00000040 Zero RW 735 .bss CVWL518.lib(hal_dsi_tx_ctrl.o) + 0x00073410 - 0x00000100 Zero RW 981 .bss CVWL518.lib(tau_log.o) + 0x00073510 - 0x0000003c Zero RW 1080 .bss CVWL518.lib(hal_uart.o) + 0x0007354c - 0x00000018 Zero RW 1226 .bss CVWL518.lib(drv_dma.o) + 0x00073564 - 0x00000040 Zero RW 1361 .bss CVWL518.lib(drv_gpio.o) + 0x000735a4 - 0x00000018 Zero RW 1399 .bss CVWL518.lib(drv_i2c_dma.o) + 0x000735bc - 0x00000acc Zero RW 1679 .bss CVWL518.lib(dcs_packet_fifo.o) + 0x00074088 - 0x00000968 Zero RW 1720 .bss CVWL518.lib(hal_internal_vsync.o) + 0x000749f0 - 0x00000020 Zero RW 2337 .bss CVWL518.lib(hal_spi_slave.o) + 0x00074a10 - 0x00001000 Zero RW 585 STACK startup_armcm0.o + + +============================================================================== + +Image component sizes + + + Code (inc. data) RO Data RW Data ZI Data Debug Object Name + + 8270 904 236 10009 0 40136 ap_demo.o + 1772 74 8529 287 0 13923 app_tp_for_custom_s8.o + 1778 210 0 49 412 18520 app_tp_transfer.o + 28 4 0 0 0 485 board.o + 10 0 0 0 0 10275 main.o + 120 18 192 0 4096 2072 startup_armcm0.o + + ---------------------------------------------------------------------- + 11986 1210 9006 10352 4508 85411 Object Totals + 0 0 48 0 0 0 (incl. Generated) + 8 0 1 7 0 0 (incl. Padding) + + ---------------------------------------------------------------------- + + Code (inc. data) RO Data RW Data ZI Data Debug Library Member Name + + 216 32 0 0 2764 252 dcs_packet_fifo.o + 300 66 0 8 0 264 drv_chip_info.o + 232 96 20 12 0 264 drv_common.o + 420 90 0 0 0 1200 drv_crgu.o + 478 68 0 0 24 856 drv_dma.o + 296 34 0 0 0 344 drv_dsc_dec.o + 1454 496 0 0 0 1260 drv_dsi_rx.o + 1432 118 0 0 0 2364 drv_dsi_tx.o + 6 0 0 0 0 60 drv_fls.o + 784 112 0 4 64 1236 drv_gpio.o + 624 78 0 8 24 624 drv_i2c_dma.o + 344 80 0 4 0 396 drv_i2c_master.o + 324 74 0 8 0 516 drv_i2c_slave.o + 826 6 0 0 0 1588 drv_lcdc.o + 342 18 0 0 0 804 drv_memc.o + 212 48 272 1612 0 592 drv_param_init.o + 352 16 390 0 0 532 drv_phy_common.o + 72 10 0 12 0 76 drv_pwm.o + 108 22 0 0 0 180 drv_pwr.o + 508 38 0 0 0 1136 drv_rxbr.o + 64 14 0 4 0 128 drv_spi_master.o + 132 16 0 8 0 200 drv_swire.o + 300 64 0 1 0 628 drv_sys_cfg.o + 338 30 0 80 0 872 drv_timer.o + 698 18 0 8 0 680 drv_uart.o + 778 16 0 0 0 2312 drv_vidc.o + 156 22 0 12 0 316 drv_wdg.o + 3320 306 72 8 184 1660 hal_dsi_rx_ctrl.o + 4490 212 0 0 64 2444 hal_dsi_tx_ctrl.o + 450 48 210 0 0 752 hal_gpio.o + 256 48 0 1 0 340 hal_i2c_master.o + 552 70 0 28 0 400 hal_i2c_slave.o + 6456 1370 296 4 2408 2324 hal_internal_vsync.o + 14 0 0 0 0 68 hal_spi_master.o + 580 32 0 0 32 136 hal_spi_slave.o + 22 0 0 0 0 68 hal_swire.o + 188 32 0 0 0 340 hal_system.o + 138 6 0 0 0 208 hal_timer.o + 156 18 0 0 60 144 hal_uart.o + 1072 320 0 0 192 1980 irq_redirect .o + 48 10 0 18 0 68 norflash.o + 58 0 0 0 0 128 tau_delay.o + 60 10 0 0 256 156 tau_log.o + 200 20 0 0 0 76 ceil.o + 86 0 0 0 0 0 __dczerorl2.o + 0 0 0 0 0 0 entry.o + 0 0 0 0 0 0 entry10a.o + 0 0 0 0 0 0 entry11a.o + 8 4 0 0 0 0 entry2.o + 4 0 0 0 0 0 entry5.o + 0 0 0 0 0 0 entry7b.o + 0 0 0 0 0 0 entry8b.o + 8 4 0 0 0 0 entry9a.o + 30 0 0 0 0 0 handlers.o + 40 0 0 0 0 72 idiv.o + 36 8 0 0 0 68 init.o + 0 0 0 0 0 0 iusefp.o + 32 0 0 0 0 68 llshl.o + 38 0 0 0 0 68 llsshr.o + 34 0 0 0 0 68 llushr.o + 36 0 0 0 0 60 memcpya.o + 36 0 0 0 0 100 memseta.o + 2298 104 0 0 0 544 printfa.o + 0 0 0 4 0 0 stdout.o + 44 0 0 0 0 72 uidiv.o + 96 0 0 0 0 84 uldiv.o + 40 2 0 0 0 68 cdrcmple.o + 20 0 0 0 0 68 cfrcmple.o + 356 4 0 0 0 140 dadd.o + 240 6 0 0 0 84 ddiv.o + 236 0 0 0 0 216 depilogue.o + 72 10 0 0 0 72 dfixi.o + 60 10 0 0 0 68 dfixui.o + 64 10 0 0 0 68 dfixul.o + 28 4 0 0 0 68 dfltui.o + 208 6 0 0 0 88 dmul.o + 40 0 0 0 0 60 f2d.o + 178 0 0 0 0 108 fadd.o + 124 0 0 0 0 72 fdiv.o + 130 0 0 0 0 144 fepilogue.o + 50 0 0 0 0 60 ffixi.o + 40 0 0 0 0 60 ffixui.o + 22 0 0 0 0 68 fflti.o + 14 0 0 0 0 68 ffltui.o + 122 0 0 0 0 72 fmul.o + 24 0 0 0 0 60 fscalb.o + + ---------------------------------------------------------------------- + 34792 4356 1264 1852 6072 33888 Library Totals + 42 0 4 8 0 0 (incl. Padding) + + ---------------------------------------------------------------------- + + Code (inc. data) RO Data RW Data ZI Data Debug Library Name + + 29656 4164 1260 1840 6072 30896 CVWL518.lib + 200 20 0 0 0 76 m_ps.l + 2826 120 0 4 0 1204 mc_p.l + 2068 52 0 0 0 1712 mf_p.l + + ---------------------------------------------------------------------- + 34792 4356 1264 1852 6072 33888 Library Totals + + ---------------------------------------------------------------------- + +============================================================================== + + + Code (inc. data) RO Data RW Data ZI Data Debug + + 46778 5566 10270 12204 10580 95175 Grand Totals + 46778 5566 10270 7976 10580 95175 ELF Image Totals (compressed) + 46778 5566 10270 7976 0 0 ROM Totals + +============================================================================== + + Total RO Size (Code + RO Data) 57048 ( 55.71kB) + Total RW Size (RW Data + ZI Data) 22784 ( 22.25kB) + Total ROM Size (Code + RO Data + RW Data) 65024 ( 63.50kB) + +============================================================================== + diff --git a/project/ISP_568/Listings/WL568_20U_HX667.map b/project/ISP_568/Listings/WL568_20U_HX667.map new file mode 100644 index 0000000..5abfa3d --- /dev/null +++ b/project/ISP_568/Listings/WL568_20U_HX667.map @@ -0,0 +1,5405 @@ +Component: ARM Compiler 5.06 update 6 (build 750) Tool: armlink [4d35ed] + +============================================================================== + +Section Cross References + + main.o(i.main) refers to board.o(i.board_Init) for board_Init + main.o(i.main) refers to ap_demo.o(i.ap_demo) for ap_demo + ap_demo.o(i.Gpio_swire_output) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + ap_demo.o(i.Gpio_swire_output) refers to tau_delay.o(i.delayUs) for delayUs + ap_demo.o(i.Gpio_swire_output) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + ap_demo.o(i.ap_dcs_read) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) for hal_dsi_rx_ctrl_get_max_ret_size + ap_demo.o(i.ap_dcs_read) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) for hal_dsi_rx_ctrl_send_ack_cmd + ap_demo.o(i.ap_dcs_read) refers to app_tp_st_touch.o(i.ap_get_tp_calibration_status_01) for ap_get_tp_calibration_status_01 + ap_demo.o(i.ap_dcs_read) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_demo) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + ap_demo.o(i.ap_demo) refers to app_tp_transfer.o(i.app_tp_I2C_init) for app_tp_I2C_init + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.open_mipi_rx) for open_mipi_rx + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.init_mipi_tx) for init_mipi_tx + ap_demo.o(i.ap_demo) refers to app_tp_transfer.o(i.app_tp_init) for app_tp_init + ap_demo.o(i.ap_demo) refers to hal_timer.o(i.hal_timer_init) for hal_timer_init + ap_demo.o(i.ap_demo) refers to hal_timer.o(i.hal_timer_start) for hal_timer_start + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.init_panel) for init_panel + ap_demo.o(i.ap_demo) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) for hal_dsi_tx_ctrl_start + ap_demo.o(i.ap_demo) refers to tau_delay.o(i.delayMs) for delayMs + ap_demo.o(i.ap_demo) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.Gpio_swire_output) for Gpio_swire_output + ap_demo.o(i.ap_demo) refers to hal_gpio.o(i.hal_gpio_set_ap_reset_int) for hal_gpio_set_ap_reset_int + ap_demo.o(i.ap_demo) refers to app_tp_transfer.o(i.app_tp_phone_clear_reset_on) for app_tp_phone_clear_reset_on + ap_demo.o(i.ap_demo) refers to app_tp_transfer.o(i.app_tp_transfer_screen_start) for app_tp_transfer_screen_start + ap_demo.o(i.ap_demo) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) for hal_dsi_rx_ctrl_dsc_async_handler + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.tp_heartbeat_exec) for tp_heartbeat_exec + ap_demo.o(i.ap_demo) refers to app_tp_st_touch.o(i.app_tp_calibration_exec) for app_tp_calibration_exec + ap_demo.o(i.ap_demo) refers to app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_record_event_exec) for ap_tp_st_touch_scan_point_record_event_exec + ap_demo.o(i.ap_demo) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + ap_demo.o(i.ap_demo) refers to app_tp_transfer.o(i.app_tp_transfer_screen_int) for app_tp_transfer_screen_int + ap_demo.o(i.ap_demo) refers to app_tp_transfer.o(i.S20_Start_init) for S20_Start_init + ap_demo.o(i.ap_demo) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_demo) refers to app_tp_for_custom_s8.o(.data) for tp_sleep_count + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.soft_timer3_cb) for soft_timer3_cb + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.ap_reset_cb) for ap_reset_cb + ap_demo.o(i.ap_get_reg_ca) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_get_reg_df) refers to ap_demo.o(i.blue_change_ccm) for blue_change_ccm + ap_demo.o(i.ap_get_reg_df) refers to memcpya.o(.text) for __aeabi_memcpy4 + ap_demo.o(i.ap_get_reg_df) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) for hal_dsi_tx_ctrl_set_ccm + ap_demo.o(i.ap_get_reg_df) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_reset_cb) refers to hal_system.o(i.hal_system_set_pvd) for hal_system_set_pvd + ap_demo.o(i.ap_reset_cb) refers to hal_system.o(i.hal_system_set_vcc) for hal_system_set_vcc + ap_demo.o(i.ap_set_backlight) refers to ap_demo.o(i.__ARM_common_switch8) for __ARM_common_switch8 + ap_demo.o(i.ap_set_backlight) refers to idiv.o(.text) for __aeabi_idivmod + ap_demo.o(i.ap_set_backlight) refers to uidiv.o(.text) for __aeabi_uidivmod + ap_demo.o(i.ap_set_backlight) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.ap_set_backlight) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_set_display_off) refers to ap_demo.o(i.Gpio_swire_output) for Gpio_swire_output + ap_demo.o(i.ap_set_display_off) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.ap_set_display_off) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_set_display_on) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_set_enter_sleep_mode) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.ap_set_enter_sleep_mode) refers to hal_timer.o(i.hal_timer_init) for hal_timer_init + ap_demo.o(i.ap_set_enter_sleep_mode) refers to hal_timer.o(i.hal_timer_start) for hal_timer_start + ap_demo.o(i.ap_set_enter_sleep_mode) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_set_enter_sleep_mode) refers to ap_demo.o(i.disable_mipi_timer_cb) for disable_mipi_timer_cb + ap_demo.o(i.ap_set_exit_sleep_mode) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_set_tp_calibration_04) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_update_frame_rate) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_tear_mode_ex) for hal_dsi_rx_ctrl_set_tear_mode_ex + ap_demo.o(i.ap_update_frame_rate) refers to ap_demo.o(.data) for .data + ap_demo.o(i.blue_change_ccm) refers to memcpya.o(.text) for __aeabi_memcpy4 + ap_demo.o(i.blue_change_ccm) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) for hal_dsi_tx_ctrl_set_ccm + ap_demo.o(i.disable_mipi_timer_cb) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + ap_demo.o(i.disable_mipi_timer_cb) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) for hal_dsi_tx_ctrl_stop + ap_demo.o(i.disable_mipi_timer_cb) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) for hal_dsi_tx_ctrl_deinit + ap_demo.o(i.disable_mipi_timer_cb) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) for hal_dsi_rx_ctrl_stop + ap_demo.o(i.disable_mipi_timer_cb) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) for hal_dsi_rx_ctrl_deinit + ap_demo.o(i.disable_mipi_timer_cb) refers to hal_swire.o(i.hal_swire_open) for hal_swire_open + ap_demo.o(i.disable_mipi_timer_cb) refers to hal_timer.o(i.hal_timer_stop) for hal_timer_stop + ap_demo.o(i.disable_mipi_timer_cb) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + ap_demo.o(i.disable_mipi_timer_cb) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_panel_reset_pin) for hal_dsi_tx_ctrl_panel_reset_pin + ap_demo.o(i.disable_mipi_timer_cb) refers to hal_system.o(i.hal_system_set_vcc) for hal_system_set_vcc + ap_demo.o(i.disable_mipi_timer_cb) refers to ap_demo.o(.data) for .data + ap_demo.o(i.disable_mipi_timer_cb) refers to app_tp_for_custom_s8.o(.data) for tp_sleep_in + ap_demo.o(i.init_mipi_tx) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) for hal_dsi_tx_ctrl_create_handle + ap_demo.o(i.init_mipi_tx) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) for hal_dsi_tx_ctrl_init + ap_demo.o(i.init_mipi_tx) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) for hal_dsi_tx_ctrl_set_overwrite_rgb + ap_demo.o(i.init_mipi_tx) refers to ap_demo.o(.data) for .data + ap_demo.o(i.init_panel) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_panel_reset_pin) for hal_dsi_tx_ctrl_panel_reset_pin + ap_demo.o(i.init_panel) refers to tau_delay.o(i.delayMs) for delayMs + ap_demo.o(i.init_panel) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) for hal_dsi_tx_ctrl_enter_init_panel_mode + ap_demo.o(i.init_panel) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) for hal_dsi_tx_ctrl_write_array_cmd + ap_demo.o(i.init_panel) refers to tau_delay.o(i.delayUs) for delayUs + ap_demo.o(i.init_panel) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + ap_demo.o(i.init_panel) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode) for hal_dsi_rx_ctrl_set_hw_tear_mode + ap_demo.o(i.init_panel) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.init_panel) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) for hal_dsi_tx_ctrl_exit_init_panel_mode + ap_demo.o(i.init_panel) refers to ap_demo.o(.data) for .data + ap_demo.o(i.open_mipi_rx) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) for hal_dsi_rx_ctrl_create_handle + ap_demo.o(i.open_mipi_rx) refers to memcpya.o(.text) for __aeabi_memcpy4 + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_pre_init_pps) for hal_dsi_rx_ctrl_pre_init_pps + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) for hal_dsi_rx_ctrl_init + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) for hal_dsi_rx_ctrl_set_cus_sync_line + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) for hal_dsi_rx_ctrl_hight_performan_mode + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) for hal_dsi_rx_ctrl_start + ap_demo.o(i.open_mipi_rx) refers to ap_demo.o(.data) for .data + ap_demo.o(i.open_mipi_rx) refers to ap_demo.o(.constdata) for .constdata + ap_demo.o(i.open_mipi_rx) refers to ap_demo.o(i.ap_dcs_read) for ap_dcs_read + ap_demo.o(i.open_mipi_rx) refers to ap_demo.o(i.pps_update_handle) for pps_update_handle + ap_demo.o(i.pps_update_handle) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) for hal_dsi_rx_ctrl_set_sw_tear_mode + ap_demo.o(i.pps_update_handle) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) for hal_dsi_rx_ctrl_toggle_resolution + ap_demo.o(i.pps_update_handle) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode) for hal_dsi_rx_ctrl_set_hw_tear_mode + ap_demo.o(i.pps_update_handle) refers to ap_demo.o(.data) for .data + ap_demo.o(i.soft_timer3_cb) refers to hal_timer.o(i.hal_timer_start) for hal_timer_start + ap_demo.o(i.soft_timer3_cb) refers to app_tp_for_custom_s8.o(.data) for tp_sleep_count + ap_demo.o(i.soft_timer3_cb) refers to ap_demo.o(.data) for .data + ap_demo.o(i.tp_heartbeat_exec) refers to hal_gpio.o(i.hal_gpio_get_input_data) for hal_gpio_get_input_data + ap_demo.o(i.tp_heartbeat_exec) refers to app_tp_st_touch.o(i.ap_tp_st_touch_software_reset) for ap_tp_st_touch_software_reset + ap_demo.o(i.tp_heartbeat_exec) refers to app_tp_transfer.o(.data) for s_screen_init_complate + ap_demo.o(i.tp_heartbeat_exec) refers to ap_demo.o(.data) for .data + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_display_on) for ap_set_display_on + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_display_off) for ap_set_display_off + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_get_reg_df) for ap_get_reg_df + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_get_reg_ca) for ap_get_reg_ca + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_backlight) for ap_set_backlight + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_update_frame_rate) for ap_update_frame_rate + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_enter_sleep_mode) for ap_set_enter_sleep_mode + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_exit_sleep_mode) for ap_set_exit_sleep_mode + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_tp_calibration_04) for ap_set_tp_calibration_04 + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_transfer.o(i.app_tp_m_read) for app_tp_m_read + app_tp_transfer.o(i.S20_Start_init) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_transfer.o(i.S20_Start_init) refers to tau_delay.o(i.delayMs) for delayMs + app_tp_transfer.o(i.S20_Start_init) refers to hal_gpio.o(i.hal_gpio_get_input_data) for hal_gpio_get_input_data + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_transfer.o(i.app_tp_m_write) for app_tp_m_write + app_tp_transfer.o(i.S20_Start_init) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + app_tp_transfer.o(i.S20_Start_init) refers to hal_gpio.o(i.hal_gpio_ctrl_eint) for hal_gpio_ctrl_eint + app_tp_transfer.o(i.S20_Start_init) refers to hal_gpio.o(i.hal_gpio_init_eint) for hal_gpio_init_eint + app_tp_transfer.o(i.S20_Start_init) refers to hal_gpio.o(i.hal_gpio_reg_eint_cb) for hal_gpio_reg_eint_cb + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_for_custom_s8.o(.data) for screen_reg_int_data + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_transfer.o(.bss) for .bss + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_for_custom_s8.o(.data) for g_screen_input_int_pad + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_transfer.o(i.app_tp_screen_int_callback) for app_tp_screen_int_callback + app_tp_transfer.o(i.S20_Start_init) refers to ap_demo.o(.data) for phone_start_flag + app_tp_transfer.o(i.app_tp_I2C_init) refers to hal_i2c_slave.o(i.hal_i2c_s_init) for hal_i2c_s_init + app_tp_transfer.o(i.app_tp_I2C_init) refers to hal_i2c_slave.o(i.hal_i2c_s_set_transfer) for hal_i2c_s_set_transfer + app_tp_transfer.o(i.app_tp_I2C_init) refers to hal_i2c_slave.o(i.hal_i2c_s_nonblocking_read) for hal_i2c_s_nonblocking_read + app_tp_transfer.o(i.app_tp_I2C_init) refers to app_tp_transfer.o(i.app_tp_i2cs_callback) for app_tp_i2cs_callback + app_tp_transfer.o(i.app_tp_I2C_init) refers to app_tp_transfer.o(.bss) for .bss + app_tp_transfer.o(i.app_tp_i2cs_callback) refers to app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) for app_tp_phone_analysis_data + app_tp_transfer.o(i.app_tp_i2cs_callback) refers to app_tp_transfer.o(i.app_tp_s_read) for app_tp_s_read + app_tp_transfer.o(i.app_tp_i2cs_callback) refers to app_tp_transfer.o(i.app_tp_s_write) for app_tp_s_write + app_tp_transfer.o(i.app_tp_i2cs_callback) refers to app_tp_transfer.o(.bss) for .bss + app_tp_transfer.o(i.app_tp_init) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + app_tp_transfer.o(i.app_tp_init) refers to app_tp_transfer.o(i.app_tp_screen_init) for app_tp_screen_init + app_tp_transfer.o(i.app_tp_init) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + app_tp_transfer.o(i.app_tp_init) refers to hal_gpio.o(i.hal_gpio_init_input) for hal_gpio_init_input + app_tp_transfer.o(i.app_tp_init) refers to hal_i2c_master.o(i.hal_i2c_m_dma_init) for hal_i2c_m_dma_init + app_tp_transfer.o(i.app_tp_init) refers to app_tp_for_custom_s8.o(.data) for g_phone_output_int_pad + app_tp_transfer.o(i.app_tp_init) refers to app_tp_for_custom_s8.o(.data) for g_screen_input_int_pad + app_tp_transfer.o(i.app_tp_m_read) refers to hal_i2c_master.o(i.hal_i2c_m_dma_read) for hal_i2c_m_dma_read + app_tp_transfer.o(i.app_tp_m_transfer_complate) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_transfer.o(i.app_tp_m_write) refers to hal_i2c_master.o(i.hal_i2c_m_dma_write) for hal_i2c_m_dma_write + app_tp_transfer.o(i.app_tp_phone_clear_reset_on) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.app_tp_phone_reset_on) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.app_tp_s_read) refers to hal_i2c_slave.o(i.hal_i2c_s_nonblocking_read) for hal_i2c_s_nonblocking_read + app_tp_transfer.o(i.app_tp_s_transfer_complate) refers to hal_i2c_slave.o(i.hal_i2c_s_write_complate) for hal_i2c_s_write_complate + app_tp_transfer.o(i.app_tp_s_transfer_complate) refers to hal_i2c_slave.o(i.hal_i2c_s_read_complate) for hal_i2c_s_read_complate + app_tp_transfer.o(i.app_tp_s_write) refers to hal_i2c_slave.o(i.hal_i2c_s_dma_write) for hal_i2c_s_dma_write + app_tp_transfer.o(i.app_tp_screen_init) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + app_tp_transfer.o(i.app_tp_screen_init) refers to tau_delay.o(i.delayUs) for delayUs + app_tp_transfer.o(i.app_tp_screen_init) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + app_tp_transfer.o(i.app_tp_screen_init) refers to app_tp_for_custom_s8.o(.data) for g_screen_input_rst_pad + app_tp_transfer.o(i.app_tp_screen_int_callback) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to hal_spi_master.o(i.hal_spi_m_clear_rxfifo) for hal_spi_m_clear_rxfifo + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to app_tp_transfer.o(i.S20_Start_init) for S20_Start_init + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to app_tp_for_custom_s8.o(.constdata) for screen_reg_start_data_size + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to ap_demo.o(.data) for phone_start_flag + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to hal_spi_master.o(i.hal_spi_m_clear_rxfifo) for hal_spi_m_clear_rxfifo + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_transfer.o(i.app_tp_m_read) for app_tp_m_read + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to tau_delay.o(i.delayUs) for delayUs + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_transfer.o(i.app_tp_transfer_screen_const) for app_tp_transfer_screen_const + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to tau_delay.o(i.delayMs) for delayMs + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to hal_gpio.o(i.hal_gpio_get_input_data) for hal_gpio_get_input_data + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_record_event) for ap_tp_st_touch_scan_point_record_event + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_st_touch.o(i.ap_tp_st_touch_error_handler_FF) for ap_tp_st_touch_error_handler_FF + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_st_touch.o(i.ap_tp_st_touch_error_handler_F3) for ap_tp_st_touch_error_handler_F3 + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) for app_tp_screen_analysis_int + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_for_custom_s8.o(.data) for screen_reg_int_data + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_transfer.o(.bss) for .bss + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_for_custom_s8.o(.data) for g_screen_input_int_pad + app_tp_transfer.o(i.app_tp_transfer_screen_start) refers to app_tp_transfer.o(i.app_tp_transfer_screen_const) for app_tp_transfer_screen_const + app_tp_transfer.o(i.app_tp_transfer_screen_start) refers to app_tp_transfer.o(.data) for .data + app_tp_st_touch.o(i.CRC16_2) refers to app_tp_st_touch.o(.constdata) for .constdata + app_tp_st_touch.o(i.ap_get_tp_calibration_status_01) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) for hal_dsi_rx_ctrl_send_ack_cmd + app_tp_st_touch.o(i.ap_get_tp_calibration_status_01) refers to app_tp_st_touch.o(.data) for .data + app_tp_st_touch.o(i.ap_set_tp_calibration_04) refers to memseta.o(.text) for __aeabi_memclr4 + app_tp_st_touch.o(i.ap_set_tp_calibration_04) refers to printfa.o(i.__0printf) for __2printf + app_tp_st_touch.o(i.ap_set_tp_calibration_04) refers to app_tp_st_touch.o(i.CRC16_2) for CRC16_2 + app_tp_st_touch.o(i.ap_set_tp_calibration_04) refers to app_tp_st_touch.o(.data) for .data + app_tp_st_touch.o(i.ap_tp_st_touch_calibration) refers to app_tp_transfer.o(i.app_tp_m_write) for app_tp_m_write + app_tp_st_touch.o(i.ap_tp_st_touch_calibration) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_st_touch.o(i.ap_tp_st_touch_calibration) refers to tau_delay.o(i.delayMs) for delayMs + app_tp_st_touch.o(i.ap_tp_st_touch_calibration) refers to app_tp_st_touch.o(.data) for .data + app_tp_st_touch.o(i.ap_tp_st_touch_error_handler_F3) refers to app_tp_st_touch.o(i.ap_tp_st_touch_software_reset) for ap_tp_st_touch_software_reset + app_tp_st_touch.o(i.ap_tp_st_touch_error_handler_FF) refers to app_tp_st_touch.o(i.ap_tp_st_touch_software_reset) for ap_tp_st_touch_software_reset + app_tp_st_touch.o(i.ap_tp_st_touch_get_calibration_success_mark) refers to memseta.o(.text) for __aeabi_memclr4 + app_tp_st_touch.o(i.ap_tp_st_touch_get_calibration_success_mark) refers to app_tp_transfer.o(i.app_tp_m_read) for app_tp_m_read + app_tp_st_touch.o(i.ap_tp_st_touch_get_calibration_success_mark) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_st_touch.o(i.ap_tp_st_touch_get_calibration_success_mark) refers to tau_delay.o(i.delayMs) for delayMs + app_tp_st_touch.o(i.ap_tp_st_touch_get_calibration_success_mark) refers to app_tp_transfer.o(i.app_tp_m_write) for app_tp_m_write + app_tp_st_touch.o(i.ap_tp_st_touch_get_calibration_success_mark) refers to app_tp_st_touch.o(.data) for .data + app_tp_st_touch.o(i.ap_tp_st_touch_hardware_reset) refers to app_tp_st_touch.o(i.ap_tp_st_touch_simulate_finger_release_event) for ap_tp_st_touch_simulate_finger_release_event + app_tp_st_touch.o(i.ap_tp_st_touch_hardware_reset) refers to app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_init) for ap_tp_st_touch_scan_point_init + app_tp_st_touch.o(i.ap_tp_st_touch_hardware_reset) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + app_tp_st_touch.o(i.ap_tp_st_touch_hardware_reset) refers to tau_delay.o(i.delayMs) for delayMs + app_tp_st_touch.o(i.ap_tp_st_touch_hardware_reset) refers to app_tp_transfer.o(i.app_tp_m_write) for app_tp_m_write + app_tp_st_touch.o(i.ap_tp_st_touch_hardware_reset) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_st_touch.o(i.ap_tp_st_touch_hardware_reset) refers to app_tp_for_custom_s8.o(.data) for g_screen_input_rst_pad + app_tp_st_touch.o(i.ap_tp_st_touch_hardware_reset) refers to app_tp_st_touch.o(.data) for .data + app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_init) refers to app_tp_st_touch.o(.bss) for .bss + app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_record_event) refers to app_tp_st_touch.o(.bss) for .bss + app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_record_event_exec) refers to app_tp_st_touch.o(i.ap_tp_st_touch_simulate_finger_release_event) for ap_tp_st_touch_simulate_finger_release_event + app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_record_event_exec) refers to app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_init) for ap_tp_st_touch_scan_point_init + app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_record_event_exec) refers to app_tp_st_touch.o(.bss) for .bss + app_tp_st_touch.o(i.ap_tp_st_touch_simulate_finger_release_event) refers to app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) for app_tp_screen_analysis_int + app_tp_st_touch.o(i.ap_tp_st_touch_simulate_finger_release_event) refers to tau_delay.o(i.delayMs) for delayMs + app_tp_st_touch.o(i.ap_tp_st_touch_software_reset) refers to app_tp_st_touch.o(i.ap_tp_st_touch_simulate_finger_release_event) for ap_tp_st_touch_simulate_finger_release_event + app_tp_st_touch.o(i.ap_tp_st_touch_software_reset) refers to app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_init) for ap_tp_st_touch_scan_point_init + app_tp_st_touch.o(i.ap_tp_st_touch_software_reset) refers to app_tp_transfer.o(i.app_tp_m_write) for app_tp_m_write + app_tp_st_touch.o(i.ap_tp_st_touch_software_reset) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_st_touch.o(i.ap_tp_st_touch_software_reset) refers to tau_delay.o(i.delayMs) for delayMs + app_tp_st_touch.o(i.ap_tp_st_touch_software_reset) refers to app_tp_st_touch.o(.data) for .data + app_tp_st_touch.o(i.app_tp_calibration_exec) refers to app_tp_st_touch.o(i.ap_tp_st_touch_calibration) for ap_tp_st_touch_calibration + app_tp_st_touch.o(i.app_tp_calibration_exec) refers to tau_delay.o(i.delayMs) for delayMs + app_tp_st_touch.o(i.app_tp_calibration_exec) refers to app_tp_st_touch.o(i.ap_tp_st_touch_get_calibration_success_mark) for ap_tp_st_touch_get_calibration_success_mark + app_tp_st_touch.o(i.app_tp_calibration_exec) refers to app_tp_st_touch.o(.data) for .data + board.o(i.board_Init) refers to hal_system.o(i.hal_system_init) for hal_system_init + board.o(i.board_Init) refers to hal_system.o(i.hal_system_enable_systick) for hal_system_enable_systick + board.o(i.board_Init) refers to hal_system.o(i.hal_system_init_console) for hal_system_init_console + board.o(i.board_Init) refers to hal_system.o(i.hal_system_set_phy_calibration) for hal_system_set_phy_calibration + startup_armcm0.o(RESET) refers to startup_armcm0.o(STACK) for __initial_sp + startup_armcm0.o(RESET) refers to startup_armcm0.o(.text) for Reset_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.HardFault_Handler) for HardFault_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.SysTick_Handler) for SysTick_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.VIDC_IRQn_Handler) for VIDC_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.LCDC_IRQn_Handler) for LCDC_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.MIPI_RX_IRQn_Handler) for MIPI_RX_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.MIPI_TX_IRQn_Handler) for MIPI_TX_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.MEMC_IRQn_Handler) for MEMC_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.VPRE_IRQn_Handler) for VPRE_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.FLSCTRL_IRQn_Handler) for FLSCTRL_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.DMA_IRQn_Handler) for DMA_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.TIMER0_IRQn_Handler) for TIMER0_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.TIMER1_IRQn_Handler) for TIMER1_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.TIMER2_IRQn_Handler) for TIMER2_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.TIMER3_IRQn_Handler) for TIMER3_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.WDG_IRQn_Handler) for WDG_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.UART_IRQn_Handler) for UART_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.I2C0_IRQn_Handler) for I2C0_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.I2C1_IRQn_Handler) for I2C1_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.SPIS_IRQn_Handler) for SPIS_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.SPIM_IRQn_Handler) for SPIM_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.ADC_IRQn_Handler) for ADC_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.PWMDET_IRQn_Handler) for PWMDET_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.SWIRE_IRQn_Handler) for SWIRE_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.AP_NRESET_IRQn_Handler) for AP_NRESET_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT0_IRQn_Handler) for EXTI_INT0_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT1_IRQn_Handler) for EXTI_INT1_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT2_IRQn_Handler) for EXTI_INT2_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT3_IRQn_Handler) for EXTI_INT3_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT4_IRQn_Handler) for EXTI_INT4_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT5_IRQn_Handler) for EXTI_INT5_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT6_IRQn_Handler) for EXTI_INT6_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT7_IRQn_Handler) for EXTI_INT7_IRQn_Handler + startup_armcm0.o(.text) refers to entry.o(.ARM.Collect$$$$00000000) for __main + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to dadd.o(.text) for __aeabi_dadd + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to drv_vidc.o(i.drv_vidc_set_scld_step) for drv_vidc_set_scld_step + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to drv_vidc.o(i.drv_vidc_set_module_enable) for drv_vidc_set_module_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) for hal_internal_vsync_get_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_dsc_dec.o(i.drv_dsc_dec_disable) for drv_dsc_dec_disable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) for drv_dsi_rx_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_rxbr.o(i.drv_rxbr_enable_irq) for drv_rxbr_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_vidc.o(i.drv_vidc_enable_irq) for drv_vidc_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_memc.o(i.drv_memc_enable_irq) for drv_memc_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) for hal_internal_vsync_get_tx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_config_reset_modules) for drv_crgu_config_reset_modules + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) for hal_internal_vsync_set_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_mode_init) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) refers to dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) for dcs_packet_get_fifo_header + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) refers to dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) for dcs_packet_free_fifo_header + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_pg_cfg) for drv_dsi_rx_set_ddi_pg_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_crgu.o(i.drv_crgu_set_rxbr_src) for drv_crgu_set_rxbr_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_crgu.o(i.drv_crgu_set_rxbr_div) for drv_crgu_set_rxbr_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_pg_cfg) for drv_dsi_rx_set_ipi_pg_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) refers to drv_memc.o(i.drv_memc_gen_a_tear_signal) for drv_memc_gen_a_tear_signal + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_compressen_en) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) for drv_dsi_rx_get_compression_en + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_max_ret_size) for drv_dsi_rx_get_max_ret_size + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) for hal_dsi_rx_ctrl_init_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_vsync_init_rx) for hal_internal_vsync_init_rx + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) for hal_dsi_rx_ctrl_init_dsi_rx + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) for hal_dsi_rx_ctrl_init_rxbr + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to drv_dsc_dec.o(i.drv_dsc_dec_enable) for drv_dsc_dec_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to drv_dsc_dec.o(i.drv_dsc_dec_set_u8_pps) for drv_dsc_dec_set_u8_pps + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to drv_dsc_dec.o(i.drv_dsc_dec_disable) for drv_dsc_dec_disable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) for hal_dsi_rx_ctrl_init_vidc + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) for hal_dsi_rx_ctrl_init_memc + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) for hal_internal_vsync_set_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to drv_chip_info.o(i.drv_chip_rx_init_done) for drv_chip_rx_init_done + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_efuse.o(i.drv_efuse_read) for drv_efuse_read + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_vidc_src) for drv_crgu_set_vidc_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_fb_src) for drv_crgu_set_fb_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_fb_div) for drv_crgu_set_fb_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) for hal_dsi_rx_ctrl_set_rxbr_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ctrl_cfg) for drv_dsi_rx_set_ctrl_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) for drv_dsi_rx_set_ddi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) for hal_dsi_rx_ctrl_set_ipi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) for drv_dsi_rx_set_up_phy + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_lane_swap) for drv_dsi_rx_set_lane_swap + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_inten) for drv_dsi_rx_set_inten + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_resp_cnt) for drv_dsi_rx_set_resp_cnt + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) for drv_dsi_rx_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_data_mode) for drv_memc_set_data_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_ltpo_mode) for drv_memc_set_ltpo_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_tear_waveform) for drv_memc_set_tear_waveform + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tear_mode) for hal_internal_vsync_get_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to ap_demo.o(i.__ARM_common_switch8) for __ARM_common_switch8 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_rate_transfer_sel) for drv_memc_rate_transfer_sel + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_fs_en_conditions) for drv_memc_set_fs_en_conditions + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_lcdc_st_conditions) for drv_memc_set_lcdc_st_conditions + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_sel_vsync) for drv_memc_sel_vsync + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_vidc_sync_cnt) for drv_memc_set_vidc_sync_cnt + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_double_buffer) for drv_memc_set_double_buffer + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_active_height) for drv_memc_set_active_height + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_inten) for drv_memc_set_inten + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_enable_irq) for drv_memc_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_color_format) for drv_rxbr_set_color_format + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) for drv_rxbr_frame_drop_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_ltpo_drop_th) for drv_rxbr_set_ltpo_drop_th + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_usr_cfg) for drv_rxbr_set_usr_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_usr_col) for drv_rxbr_set_usr_col + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_usr_row) for drv_rxbr_set_usr_row + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_hline_rcv_cfg) for drv_rxbr_hline_rcv_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_enable_irq) for drv_rxbr_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) for hal_internal_vsync_set_auto_hw_filter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_src_parameter) for drv_vidc_set_src_parameter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_pentile_swap) for drv_vidc_set_pentile_swap + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_dst_parameter) for drv_vidc_set_dst_parameter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_init_module_enable) for drv_vidc_init_module_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_rotation) for drv_vidc_set_rotation + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to dadd.o(.text) for __aeabi_dadd + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_step) for drv_vidc_set_scld_step + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_param_init.o(i.drv_param_init_get_scld_filter_h) for drv_param_init_get_scld_filter_h + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_param_init.o(i.drv_param_init_get_scld_filter_v) for drv_param_init_get_scld_filter_v + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_hcoef0) for drv_vidc_set_scld_hcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_hcoef1) for drv_vidc_set_scld_hcoef1 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_vcoef0) for drv_vidc_set_scld_vcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_vcoef1) for drv_vidc_set_scld_vcoef1 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_p2r_hinitr) for drv_vidc_set_p2r_hinitr + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_p2r_hinitb) for drv_vidc_set_p2r_hinitb + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_param_init.o(i.drv_param_p2r_filter_init) for drv_param_p2r_filter_init + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_p2r_hcoef0) for drv_vidc_set_p2r_hcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_mirror) for drv_vidc_set_mirror + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_pu_ctrl) for drv_vidc_set_pu_ctrl + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_irqen) for drv_vidc_set_irqen + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_enable_irq) for drv_vidc_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_pre_init_pps) refers to drv_dsc_dec.o(i.drv_dsc_dec_convert_pps_rc_parameter) for drv_dsc_dec_convert_pps_rc_parameter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_pre_init_pps) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_release_handle) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to drv_dsi_rx.o(i.drv_dsi_rx_shut_down) for drv_dsi_rx_shut_down + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) for hal_dsi_rx_ctrl_init + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) for hal_internal_vsync_get_tx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) for hal_dsi_rx_ctrl_start + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) refers to drv_rxbr.o(i.drv_rxbr_set_ack_pkt_header) for drv_rxbr_set_ack_pkt_header + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) refers to hal_dsi_rx_ctrl.o(.conststring) for .conststring + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_auto_hw_filter) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) for hal_internal_vsync_set_auto_hw_filter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_auto_hw_filter) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) for drv_dsi_rx_set_ddi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to drv_vidc.o(i.drv_vidc_set_scld_hcoef0) for drv_vidc_set_scld_hcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to drv_vidc.o(i.drv_vidc_set_scld_hcoef1) for drv_vidc_set_scld_hcoef1 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to drv_vidc.o(i.drv_vidc_set_scld_vcoef0) for drv_vidc_set_scld_vcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to drv_vidc.o(i.drv_vidc_set_scld_vcoef1) for drv_vidc_set_scld_vcoef1 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to drv_param_init.o(i.drv_param_init_set_scld_filter) for drv_param_init_set_scld_filter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) for hal_internal_vsync_set_sync_line + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) refers to drv_rxbr.o(i.drv_rxbr_hline_rcv0_cfg) for drv_rxbr_hline_rcv0_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_dcs_direct_mode) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_dcs_direct_mode) for hal_internal_vsync_set_dcs_direct_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_cmd_filter) refers to drv_rxbr.o(i.drv_rxbr_set_cmd_filter) for drv_rxbr_set_cmd_filter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_cmd_filter) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) for hal_internal_vsync_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) refers to drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) for drv_dsi_rx_calc_ipi_tx_delay + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_cfg) for drv_dsi_rx_set_ipi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pentile_format) refers to drv_vidc.o(i.drv_vidc_update_src_format) for drv_vidc_update_src_format + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pentile_format) refers to drv_vidc.o(i.drv_vidc_set_pentile_swap) for drv_vidc_set_pentile_swap + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pentile_format) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to dflti.o(.text) for __aeabi_i2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to dmul.o(.text) for __aeabi_dmul + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to ddiv.o(.text) for __aeabi_ddiv + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to dfixi.o(.text) for __aeabi_d2iz + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rect_pixel_data) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rect_pixel_data) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rect_pixel_data) refers to dflti.o(.text) for __aeabi_i2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rect_pixel_data) refers to dmul.o(.text) for __aeabi_dmul + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rect_pixel_data) refers to ddiv.o(.text) for __aeabi_ddiv + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rect_pixel_data) refers to dfixi.o(.text) for __aeabi_d2iz + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) for hal_dsi_rx_ctrl_set_rxbr_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) for drv_dsi_rx_set_ddi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) for hal_dsi_rx_ctrl_set_ipi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_rxbr_src) for drv_crgu_set_rxbr_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_rxbr_div) for drv_crgu_set_rxbr_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_dsco_src) for drv_crgu_set_dsco_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_dsco_src_div) for drv_crgu_set_dsco_src_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_dsc_core_div) for drv_crgu_set_dsc_core_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) for hal_internal_vsync_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_te_waveform) refers to drv_memc.o(i.drv_memc_set_tear_waveform) for drv_memc_set_tear_waveform + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_te_waveform) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_tear_mode_ex) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) for hal_internal_vsync_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) refers to drv_dsi_rx.o(i.drv_dsi_rx_power_up) for drv_dsi_rx_power_up + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) for hal_internal_vsync_set_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) refers to drv_dsi_rx.o(i.drv_dsi_rx_shut_down) for drv_dsi_rx_shut_down + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) for hal_internal_vsync_set_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate) refers to hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) for hal_internal_vsync_toggle_input_frame_rate + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) refers to hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) for hal_internal_sync_input_resolution_change + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution_ex) refers to hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) for hal_internal_sync_input_resolution_change_ex + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution_ex) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_register_write_cmd_entry) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_cmd_filter) for hal_dsi_rx_ctrl_set_hw_cmd_filter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_register_write_cmd_entry) refers to hal_internal_vsync.o(i.hal_internal_vsync_register_write_cmd_entry) for hal_internal_vsync_register_write_cmd_entry + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to ffltui.o(.text) for __aeabi_ui2f + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to fscalb.o(.text) for __ARM_scalbnf + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to fdiv.o(.text) for __aeabi_fdiv + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to fmul.o(.text) for __aeabi_fmul + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to idiv.o(.text) for __aeabi_idivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to fflti.o(.text) for __aeabi_i2f + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to ffixi.o(.text) for __aeabi_f2iz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to f2d.o(.text) for __aeabi_f2d + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to ceil.o(i.ceil) for ceil + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to dfixi.o(.text) for __aeabi_d2iz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to fadd.o(.text) for __aeabi_fadd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_video_chunk) for drv_dsi_tx_set_video_chunk + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_video_timing) for drv_dsi_tx_set_video_timing + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) refers to fadd.o(.text) for __aeabi_fadd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to ffltui.o(.text) for __aeabi_ui2f + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to fmul.o(.text) for __aeabi_fmul + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to fdiv.o(.text) for __aeabi_fdiv + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to f2d.o(.text) for __aeabi_f2d + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to ceil.o(i.ceil) for ceil + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to drv_phy_common.o(i.drv_phy_get_rate_para) for drv_phy_get_rate_para + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to idiv.o(.text) for __aeabi_idivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to fadd.o(.text) for __aeabi_fadd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to ffixui.o(.text) for __aeabi_f2uiz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) for hal_internal_sync_get_hight_performan_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to hal_dsi_tx_ctrl.o(.conststring) for .conststring + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) for hal_lcdc_config_upscaler + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic) refers to drv_lcdc.o(i.drv_lcdc_config_src_parameter) for drv_lcdc_config_src_parameter + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic) refers to hal_internal_vsync.o(i.hal_internal_vsync_update_lcdc_addr) for hal_internal_vsync_update_lcdc_addr + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_cmd_mode_rcv_te) refers to hal_internal_vsync.o(i.hal_internal_sync_cmd_mode_rcv_te) for hal_internal_sync_cmd_mode_rcv_te + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_config_reset_modules) for drv_crgu_config_reset_modules + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to drv_param_init.o(i.drv_param_init_set_ccm) for drv_param_init_set_ccm + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to hal_dsi_tx_ctrl.o(.constdata) for .constdata + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to drv_memc.o(i.drv_memc_set_data_mode) for drv_memc_set_data_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) for hal_lcdc_config_upscaler + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) for hal_lcdc_config_remains + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_mode_init) for hal_dsi_tx_ctrl_draw_mode_init + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data) for hal_dsi_tx_ctrl_set_rect_pixel_data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to drv_memc.o(i.drv_memc_set_data_mode) for drv_memc_set_data_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) for hal_lcdc_config_upscaler + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) for hal_lcdc_config_remains + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_mode_init) for hal_dsi_tx_ctrl_draw_mode_init + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) for drv_dsi_tx_command_mode_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_mode) for drv_dsi_tx_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_ulps_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) for drv_dsi_tx_phy_ulps_enter + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) for drv_dsi_tx_command_mode_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_mode) for drv_dsi_tx_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_ulps_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) for drv_dsi_tx_phy_ulps_exit + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) for hal_dsi_tx_ctrl_init_clk + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_vsync_init_tx) for hal_internal_vsync_init_tx + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) for hal_dsi_tx_config_params_for_lane_rate + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) for hal_dsi_tx_count_lane_rate + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) for hal_dsi_tx_init_phy_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) for drv_dsi_tx_phy_test_setup + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) for hal_lcdc_init_clk + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) for hal_lcdc_init_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) for hal_dsi_tx_init_dpi_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) for hal_dsi_tx_init_data_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) for hal_dsi_tx_init_remains + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) for hal_dsi_tx_init_interrupt + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ready) for drv_dsi_tx_phy_status_ready + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to drv_dsi_tx.o(i.drv_dsi_tx_powerup) for drv_dsi_tx_powerup + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_panel_reset_pin) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) for hal_dsi_tx_send_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) for drv_dsi_tx_get_cmd_status + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_get_payload) for drv_dsi_tx_command_get_payload + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to memcpya.o(.text) for __aeabi_memcpy + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_release_handle) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) refers to drv_param_init.o(i.drv_param_init_set_ccm) for drv_param_init_set_ccm + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_cus_pq_filter) refers to drv_lcdc.o(i.drv_lcdc_config_scale_up_coef) for drv_lcdc_config_scale_up_coef + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_cus_pq_filter) refers to drv_param_init.o(i.drv_param_init_set_sclu_filter) for drv_param_init_set_sclu_filter + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_endianness) refers to drv_lcdc.o(i.drv_lcdc_config_endianness) for drv_lcdc_config_endianness + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_escape_clock_div) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) for drv_dsi_tx_set_esc_div + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_lp_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_video_mode_set_lp_cmd) for drv_dsi_tx_video_mode_set_lp_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite) for drv_lcdc_config_overwrite + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite_rgb) for drv_lcdc_config_overwrite_rgb + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp) refers to drv_lcdc.o(i.drv_lcdc_config_partial_display_enable) for drv_lcdc_config_partial_display_enable + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp_area) refers to drv_lcdc.o(i.drv_lcdc_config_partial_display_area) for drv_lcdc_config_partial_display_area + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data) refers to dflti.o(.text) for __aeabi_i2d + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data) refers to dmul.o(.text) for __aeabi_dmul + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data) refers to ddiv.o(.text) for __aeabi_ddiv + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data) refers to dfixi.o(.text) for __aeabi_d2iz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_vpg) for drv_dsi_tx_set_vpg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) for hal_dsi_tx_ctrl_draw_flicker + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) for hal_dsi_tx_ctrl_draw_chessboard + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) for drv_dsi_tx_config_eotp + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) for drv_dsi_tx_phy_clock_lane_req_hs + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_lcdc.o(i.drv_lcdc_enable_shadow_reg) for drv_lcdc_enable_shadow_reg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_lcdc.o(i.drv_lcdc_set_video_hw_mode) for drv_lcdc_set_video_hw_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite) for drv_lcdc_config_overwrite + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_lcdc.o(i.drv_lcdc_start) for drv_lcdc_start + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to drv_lcdc.o(i.drv_lcdc_set_int) for drv_lcdc_set_int + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_int) for drv_dsi_tx_set_int + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to drv_dsi_tx.o(i.drv_dsi_tx_shutdown) for drv_dsi_tx_shutdown + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) for drv_dsi_tx_get_cmd_status + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) for hal_dsi_tx_send_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) for drv_dsi_tx_command_put_payload + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) for drv_dsi_tx_get_cmd_status + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) for hal_dsi_tx_send_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) for drv_dsi_tx_command_put_payload + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_mode) for drv_dsi_tx_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_edpi_cmd_size) for drv_dsi_tx_edpi_cmd_size + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) for hal_dsi_tx_init_video_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_dpi_mode) for drv_dsi_tx_dpi_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_dpi_polarity) for drv_dsi_tx_dpi_polarity + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_dpi_lpcmd_time) for drv_dsi_tx_dpi_lpcmd_time + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_int) for drv_dsi_tx_set_int + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) refers to drv_dsi_tx.o(i.drv_dsi_tx_config_int) for drv_dsi_tx_config_int + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_lane_mode) for drv_dsi_tx_phy_lane_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_time_cfg) for drv_dsi_tx_phy_time_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_response_mode) for drv_dsi_tx_response_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) for drv_dsi_tx_set_esc_div + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_time_out_div) for drv_dsi_tx_set_time_out_div + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_timeout_cfg) for drv_dsi_tx_timeout_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) for drv_dsi_tx_config_eotp + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) for drv_dsi_tx_phy_clock_lane_req_hs + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_auto_lp) for drv_dsi_tx_phy_clock_lane_auto_lp + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_video_mode_cfg) for drv_dsi_tx_video_mode_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_bta_ack) for drv_dsi_tx_set_bta_ack + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_video_mode_set_lp_cmd) for drv_dsi_tx_video_mode_set_lp_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_video_mode_disable_hact_cmd) for drv_dsi_tx_video_mode_disable_hact_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) for hal_dsi_tx_calc_video_chunks + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) for drv_dsi_tx_get_cmd_status + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_header) for drv_dsi_tx_command_header + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) for drv_dsi_tx_phy_status_stopstate + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) refers to drv_param_init.o(i.drv_param_init_get_ccm) for drv_param_init_get_ccm + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) refers to drv_lcdc.o(i.drv_lcdc_config_ccm) for drv_lcdc_config_ccm + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_disp_mode) for drv_lcdc_config_disp_mode + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_edpi_mode) for drv_lcdc_config_edpi_mode + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_endianness) for drv_lcdc_config_endianness + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_thresh) for drv_lcdc_config_thresh + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_dpi_polarity) for drv_lcdc_config_dpi_polarity + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_src_parameter) for drv_lcdc_config_src_parameter + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_rgb_to_pentile) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to dadd.o(.text) for __aeabi_dadd + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp_area) for hal_dsi_tx_ctrl_set_partial_disp_area + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp) for hal_dsi_tx_ctrl_set_partial_disp + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to drv_lcdc.o(i.drv_lcdc_config_scale_up_step) for drv_lcdc_config_scale_up_step + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to drv_param_init.o(i.drv_param_init_get_sclu_filter) for drv_param_init_get_sclu_filter + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to drv_lcdc.o(i.drv_lcdc_config_scale_up_coef) for drv_lcdc_config_scale_up_coef + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) for hal_lcdc_config_upscaler + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) for hal_lcdc_config_ccm + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_rgb_to_pentile) for hal_lcdc_config_rgb_to_pentile + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) for hal_lcdc_config_remains + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) for hal_lcdc_init_interrupt + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to drv_lcdc.o(i.drv_lcdc_set_prefetch) for drv_lcdc_set_prefetch + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to ffltui.o(.text) for __aeabi_ui2f + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_dpi_pre_div) for drv_crgu_set_dpi_pre_div + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_dpi_pre_src) for drv_crgu_set_dpi_pre_src + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_dpi_mux_src) for drv_crgu_set_dpi_mux_src + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to fmul.o(.text) for __aeabi_fmul + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to fdiv.o(.text) for __aeabi_fdiv + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to f2d.o(.text) for __aeabi_f2d + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to ceil.o(i.ceil) for ceil + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_lcdc.o(i.drv_lcdc_config_dpi_timing) for drv_lcdc_config_dpi_timing + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to hal_internal_vsync.o(i.hal_internal_update_dpi_param) for hal_internal_update_dpi_param + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to cfrcmple.o(.text) for __aeabi_cfrcmple + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to ffixi.o(.text) for __aeabi_f2iz + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to idiv.o(.text) for __aeabi_idivmod + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_lcdc_div) for drv_crgu_set_lcdc_div + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_lcdc_src) for drv_crgu_set_lcdc_src + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) for hal_internal_vsync_get_sync_line + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) refers to drv_lcdc.o(i.drv_lcdc_set_int) for drv_lcdc_set_int + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) refers to drv_lcdc.o(i.drv_lcdc_ctrl_flow) for drv_lcdc_ctrl_flow + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) refers to drv_lcdc.o(i.drv_lcdc_config_int) for drv_lcdc_config_int + hal_gpio.o(i.hal_gpio_ctrl_eint) refers to drv_gpio.o(i.drv_gpio_set_int) for drv_gpio_set_int + hal_gpio.o(i.hal_gpio_ctrl_eint) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_get_input_data) refers to drv_gpio.o(i.drv_gpio_get_input_data) for drv_gpio_get_input_data + hal_gpio.o(i.hal_gpio_get_int_type) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_get_pull_state) refers to drv_gpio.o(i.drv_gpio_get_pull_state) for drv_gpio_get_pull_state + hal_gpio.o(i.hal_gpio_get_pull_state) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_init_eint) refers to drv_gpio.o(i.drv_gpio_set_ioe) for drv_gpio_set_ioe + hal_gpio.o(i.hal_gpio_init_eint) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_gpio.o(i.hal_gpio_init_eint) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_gpio_group) for drv_sys_cfg_sel_gpio_group + hal_gpio.o(i.hal_gpio_init_eint) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_int_trig) for drv_sys_cfg_sel_int_trig + hal_gpio.o(i.hal_gpio_init_eint) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_gpio.o(i.hal_gpio_init_eint) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_init_input) refers to drv_gpio.o(i.drv_gpio_set_ioe) for drv_gpio_set_ioe + hal_gpio.o(i.hal_gpio_init_input) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_gpio.o(i.hal_gpio_init_input) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_init_output) refers to hal_gpio.o(i.drv_gpio_set_output_data) for drv_gpio_set_output_data + hal_gpio.o(i.hal_gpio_init_output) refers to drv_gpio.o(i.drv_gpio_set_ioe) for drv_gpio_set_ioe + hal_gpio.o(i.hal_gpio_init_output) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_gpio.o(i.hal_gpio_init_output) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_reg_eint_cb) refers to drv_gpio.o(i.drv_gpio_register_callback) for drv_gpio_register_callback + hal_gpio.o(i.hal_gpio_reg_eint_cb) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_ap_reset_int) refers to drv_gpio.o(i.drv_gpio_register_ap_reset_callback) for drv_gpio_register_ap_reset_callback + hal_gpio.o(i.hal_gpio_set_ap_reset_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) for drv_sys_cfg_sel_ap_rst_trig + hal_gpio.o(i.hal_gpio_set_ap_reset_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_gpio.o(i.hal_gpio_set_ap_reset_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + hal_gpio.o(i.hal_gpio_set_driving_strength) refers to drv_gpio.o(i.drv_gpio_set_driving_strength) for drv_gpio_set_driving_strength + hal_gpio.o(i.hal_gpio_set_driving_strength) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_mode) refers to drv_gpio.o(i.drv_gpio_set_mode3) for drv_gpio_set_mode3 + hal_gpio.o(i.hal_gpio_set_mode) refers to drv_gpio.o(i.drv_gpio_set_mode2) for drv_gpio_set_mode2 + hal_gpio.o(i.hal_gpio_set_mode) refers to drv_gpio.o(i.drv_gpio_set_mode1) for drv_gpio_set_mode1 + hal_gpio.o(i.hal_gpio_set_mode) refers to drv_gpio.o(i.drv_gpio_set_mode0) for drv_gpio_set_mode0 + hal_gpio.o(i.hal_gpio_set_mode) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_output_data) refers to hal_gpio.o(i.drv_gpio_set_output_data) for drv_gpio_set_output_data + hal_gpio.o(i.hal_gpio_set_pull_state) refers to drv_gpio.o(i.drv_gpio_set_pull_state) for drv_gpio_set_pull_state + hal_gpio.o(i.hal_gpio_set_pull_state) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_schmitt_trigger) refers to drv_gpio.o(i.drv_gpio_set_schmitt_trigger) for drv_gpio_set_schmitt_trigger + hal_gpio.o(i.hal_gpio_set_schmitt_trigger) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_slew_rate) refers to drv_gpio.o(i.drv_gpio_set_slew_rate) for drv_gpio_set_slew_rate + hal_gpio.o(i.hal_gpio_set_slew_rate) refers to hal_gpio.o(.constdata) for .constdata + hal_i2c_master.o(i.hal_i2c_m_deinit) refers to drv_i2c_master.o(i.drv_i2c_m_deinit) for drv_i2c_m_deinit + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_master.o(i.drv_i2c_master_init) for drv_i2c_master_init + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_master.o(i.drv_i2c1_set_callback) for drv_i2c1_set_callback + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_master.o(i.drv_i2c_m_enable_intr) for drv_i2c_m_enable_intr + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_dma.o(i.drv_i2c_dma_init) for drv_i2c_dma_init + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_dma.o(i.drv_i2c_enable_rx_dma) for drv_i2c_enable_rx_dma + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_dma.o(i.drv_i2c_enable_tx_dma) for drv_i2c_enable_tx_dma + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to hal_i2c_master.o(i.hal_i2c_master_irq_callback) for hal_i2c_master_irq_callback + hal_i2c_master.o(i.hal_i2c_m_dma_read) refers to drv_i2c_dma.o(i.drv_i2c_master_read_dma) for drv_i2c_master_read_dma + hal_i2c_master.o(i.hal_i2c_m_dma_read) refers to hal_i2c_master.o(.data) for .data + hal_i2c_master.o(i.hal_i2c_m_dma_write) refers to drv_i2c_dma.o(i.drv_i2c_master_write_dma) for drv_i2c_master_write_dma + hal_i2c_master.o(i.hal_i2c_m_dma_write) refers to hal_i2c_master.o(.data) for .data + hal_i2c_master.o(i.hal_i2c_m_set_high_impedance) refers to drv_i2c_master.o(i.drv_i2c_m_enable) for drv_i2c_m_enable + hal_i2c_master.o(i.hal_i2c_m_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_i2c_master.o(i.hal_i2c_m_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + hal_i2c_master.o(i.hal_i2c_m_transfer_complate) refers to hal_i2c_master.o(.data) for .data + hal_i2c_master.o(i.hal_i2c_master_irq_callback) refers to drv_i2c_master.o(i.drv_i2c_m_clear_it_pending_bit) for drv_i2c_m_clear_it_pending_bit + hal_i2c_master.o(i.hal_i2c_master_irq_callback) refers to hal_i2c_master.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_deinit) refers to drv_i2c_slave.o(i.drv_i2c_s_set_intr) for drv_i2c_s_set_intr + hal_i2c_slave.o(i.hal_i2c_s_deinit) refers to drv_i2c_slave.o(i.drv_i2c_s_enable) for drv_i2c_s_enable + hal_i2c_slave.o(i.hal_i2c_s_deinit) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_i2c_slave.o(i.hal_i2c_s_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_i2c_slave.o(i.hal_i2c_s_deinit) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_deinit) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_i2c_slave.o(i.hal_i2c_s_dma_user_callback) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_dma_write) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + hal_i2c_slave.o(i.hal_i2c_s_dma_write) refers to drv_i2c_dma.o(i.drv_i2c_slave_write_dma) for drv_i2c_slave_write_dma + hal_i2c_slave.o(i.hal_i2c_s_dma_write) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_dma_write) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_i2c_slave.o(i.hal_i2c_s_get_tx_byte_num) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_i2c_slave.o(i.hal_i2c_s_init) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_slave.o(i.drv_i2c_slave_init) for drv_i2c_slave_init + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_master.o(i.drv_i2c1_set_callback) for drv_i2c1_set_callback + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_slave.o(i.drv_i2c_s_config_intr) for drv_i2c_s_config_intr + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_slave.o(i.drv_i2c_s_set_intr) for drv_i2c_s_set_intr + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_dma.o(i.drv_i2c_dma_init) for drv_i2c_dma_init + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) for drv_i2c_set_dma_irq_callback + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) for drv_sys_cfg_set_dma_tx_req + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_dma.o(i.drv_i2c_enable_tx_dma) for drv_i2c_enable_tx_dma + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_dma.o(i.drv_dma_enable_channel_interrupts) for drv_dma_enable_channel_interrupts + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_slave.o(i.drv_i2c0_set_callback) for drv_i2c0_set_callback + hal_i2c_slave.o(i.hal_i2c_s_init) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_init) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_i2c_slave.o(i.hal_i2c_s_init) refers to hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) for hal_i2c_slave_irq_callback + hal_i2c_slave.o(i.hal_i2c_s_init) refers to hal_i2c_slave.o(i.hal_i2c_s_dma_user_callback) for hal_i2c_s_dma_user_callback + hal_i2c_slave.o(i.hal_i2c_s_nonblocking_read) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_read_complate) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_read_complate_clear) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_read_data) refers to drv_i2c_slave.o(i.drv_i2c_s_read_data) for drv_i2c_s_read_data + hal_i2c_slave.o(i.hal_i2c_s_read_data) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_read_data) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_i2c_slave.o(i.hal_i2c_s_rxfifo_notempty) refers to drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) for drv_i2c_s_get_fifo_status + hal_i2c_slave.o(i.hal_i2c_s_rxfifo_notempty) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_rxfifo_notempty) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_i2c_slave.o(i.hal_i2c_s_sel) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_set_dma_tx_cycle) refers to drv_dma.o(i.drv_dma_enable_cycle) for drv_dma_enable_cycle + hal_i2c_slave.o(i.hal_i2c_s_set_dma_tx_cycle) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_set_dma_tx_cycle) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_i2c_slave.o(i.hal_i2c_s_set_high_impedance) refers to drv_i2c_slave.o(i.drv_i2c_s_enable) for drv_i2c_s_enable + hal_i2c_slave.o(i.hal_i2c_s_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_i2c_slave.o(i.hal_i2c_s_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + hal_i2c_slave.o(i.hal_i2c_s_set_high_impedance) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_set_high_impedance) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_i2c_slave.o(i.hal_i2c_s_set_transfer) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_write_complate) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_write_data) refers to drv_i2c_slave.o(i.drv_i2c_s_write_data) for drv_i2c_s_write_data + hal_i2c_slave.o(i.hal_i2c_s_write_data) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_write_data) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) for drv_i2c_s_get_fifo_status + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_i2c_slave.o(i.drv_i2c_s_clear_it_pending_bit) for drv_i2c_s_clear_it_pending_bit + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_i2c_slave.o(i.drv_i2c_s_write_data) for drv_i2c_s_write_data + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_spi_master.o(i.hal_spi_m_callback) refers to drv_spi_dma.o(i.drv_spi_abort_dma) for drv_spi_abort_dma + hal_spi_master.o(i.hal_spi_m_callback) refers to hal_spi_master.o(.data) for .data + hal_spi_master.o(i.hal_spi_m_clear_rxfifo) refers to drv_spi_master.o(i.drv_spi_m_read_data) for drv_spi_m_read_data + hal_spi_master.o(i.hal_spi_m_deinit) refers to drv_spi_master.o(i.drv_spi_m_deinit) for drv_spi_m_deinit + hal_spi_master.o(i.hal_spi_m_dma_init) refers to hal_spi_master.o(i.hal_spi_m_gpio_init) for hal_spi_m_gpio_init + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_master.o(i.drv_spi_master_init) for drv_spi_master_init + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_dma.o(i.drv_spi_dma_init) for drv_spi_dma_init + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_dma.o(i.drv_spi_dma_ch6_init) for drv_spi_dma_ch6_init + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) for drv_spi_set_dma_irq_callback + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) for drv_spi_set_dma_ch6_irq_callback + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) for drv_sys_cfg_set_dma_rx_req + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) for drv_sys_cfg_set_dma_tx_req + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_master.o(i.drv_spi_m_enable_rx_dma) for drv_spi_m_enable_rx_dma + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_master.o(i.drv_spi_m_enable_tx_dma) for drv_spi_m_enable_tx_dma + hal_spi_master.o(i.hal_spi_m_dma_init) refers to hal_spi_master.o(i.hal_spi_m_callback) for hal_spi_m_callback + hal_spi_master.o(i.hal_spi_m_dma_read) refers to drv_spi_dma.o(i.drv_spim_dma_read) for drv_spim_dma_read + hal_spi_master.o(i.hal_spi_m_dma_read) refers to hal_spi_master.o(.data) for .data + hal_spi_master.o(i.hal_spi_m_dma_write) refers to drv_spi_dma.o(i.drv_spim_dma_write) for drv_spim_dma_write + hal_spi_master.o(i.hal_spi_m_dma_write) refers to hal_spi_master.o(.data) for .data + hal_spi_master.o(i.hal_spi_m_get_transfer_complate) refers to hal_spi_master.o(.data) for .data + hal_spi_master.o(i.hal_spi_m_gpio_init) refers to drv_spi_master.o(i.drv_spi_m_gpio_init) for drv_spi_m_gpio_init + hal_spi_master.o(i.hal_spi_m_read_rxfifo) refers to drv_spi_master.o(i.drv_spi_m_read_data) for drv_spi_m_read_data + hal_spi_master.o(i.hal_spi_m_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_spi_master.o(i.hal_spi_m_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_init_input) for hal_gpio_init_input + hal_spi_master.o(i.hal_spi_m_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + hal_swire.o(i.hal_swire_deinit) refers to drv_swire.o(i.drv_swire_enable) for drv_swire_enable + hal_swire.o(i.hal_swire_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_swire.o(i.hal_swire_init) refers to drv_crgu.o(i.drv_crgu_set_swire_div) for drv_crgu_set_swire_div + hal_swire.o(i.hal_swire_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_swire.o(i.hal_swire_init) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_swire.o(i.hal_swire_init) refers to drv_swire.o(i.drv_swire_enable) for drv_swire_enable + hal_swire.o(i.hal_swire_open) refers to drv_swire.o(i.drv_swire_set_power_down) for drv_swire_set_power_down + hal_swire.o(i.hal_swire_register_callback) refers to drv_swire.o(i.drv_swire_register_callback) for drv_swire_register_callback + hal_swire.o(i.hal_swire_start) refers to drv_swire.o(i.drv_swire_set_int) for drv_swire_set_int + hal_swire.o(i.hal_swire_start) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_swire.o(i.hal_swire_start) refers to drv_swire.o(i.drv_swire_set_bit_time) for drv_swire_set_bit_time + hal_swire.o(i.hal_swire_start) refers to drv_swire.o(i.drv_swire_set_pulse_count) for drv_swire_set_pulse_count + hal_swire.o(i.hal_swire_start) refers to drv_common.o(.data) for g_system_clock + hal_system.o(i.hal_system_deep_sleep_mode) refers to drv_pwr.o(i.drv_pwr_enter_deep_sleep_mode) for drv_pwr_enter_deep_sleep_mode + hal_system.o(i.hal_system_disable_systick) refers to drv_common.o(i.drv_common_disable_systick) for drv_common_disable_systick + hal_system.o(i.hal_system_enable_systick) refers to drv_common.o(i.drv_common_enable_systick) for drv_common_enable_systick + hal_system.o(i.hal_system_get_tick) refers to drv_common.o(i.drv_common_get_tick) for drv_common_get_tick + hal_system.o(i.hal_system_idle_mode) refers to drv_common.o(i.drv_common_idle_mode) for drv_common_idle_mode + hal_system.o(i.hal_system_init) refers to drv_pwr.o(i.drv_pwr_set_system_clk_src) for drv_pwr_set_system_clk_src + hal_system.o(i.hal_system_init) refers to drv_crgu.o(i.drv_crgu_set_ahb_src) for drv_crgu_set_ahb_src + hal_system.o(i.hal_system_init) refers to drv_crgu.o(i.drv_crgu_set_ahb_pre_div) for drv_crgu_set_ahb_pre_div + hal_system.o(i.hal_system_init) refers to irq_redirect .o(i.handle_init) for handle_init + hal_system.o(i.hal_system_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_all_int) for drv_sys_cfg_clear_all_int + hal_system.o(i.hal_system_init) refers to drv_common.o(i.drv_common_system_init) for drv_common_system_init + hal_system.o(i.hal_system_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_system.o(i.hal_system_init) refers to drv_pwr.o(i.drv_pwr_set_pvd_mode) for drv_pwr_set_pvd_mode + hal_system.o(i.hal_system_init) refers to drv_common.o(.data) for g_system_clock + hal_system.o(i.hal_system_init_console) refers to hal_uart.o(i.hal_uart_init) for hal_uart_init + hal_system.o(i.hal_system_register_systick_cb) refers to drv_common.o(i.drv_common_systick_register_cb) for drv_common_systick_register_cb + hal_system.o(i.hal_system_set_phy_calibration) refers to drv_phy_common.o(i.drv_phy_enable_calibration) for drv_phy_enable_calibration + hal_system.o(i.hal_system_set_pvd) refers to drv_pwr.o(i.drv_pwr_set_pvd_mode) for drv_pwr_set_pvd_mode + hal_system.o(i.hal_system_set_vcc) refers to drv_pwr.o(i.drv_pwr_set_cp_mode) for drv_pwr_set_cp_mode + hal_system.o(i.hal_system_share_flash_mode) refers to drv_fls.o(i.drv_fls_gpio_connect) for drv_fls_gpio_connect + hal_system.o(i.hal_system_share_flash_mode) refers to drv_fls.o(i.drv_fls_gpio_disconnect) for drv_fls_gpio_disconnect + hal_system.o(i.hal_system_sleep_mode) refers to drv_crgu.o(i.drv_crgu_config_clocks) for drv_crgu_config_clocks + hal_timer.o(i.hal_timer_deinit) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + hal_timer.o(i.hal_timer_deinit) refers to drv_timer.o(i.drv_timer_set_repeat) for drv_timer_set_repeat + hal_timer.o(i.hal_timer_deinit) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_timer.o(i.hal_timer_deinit) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_timer.o(i.hal_timer_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_timer.o(i.hal_timer_get_status) refers to drv_timer.o(i.drv_timer_get_status) for drv_timer_get_status + hal_timer.o(i.hal_timer_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_timer.o(i.hal_timer_init) refers to drv_timer.o(i.drv_timer_set_prescaler) for drv_timer_set_prescaler + hal_timer.o(i.hal_timer_set_repeat) refers to drv_timer.o(i.drv_timer_set_repeat) for drv_timer_set_repeat + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_register_callback) for drv_timer_register_callback + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_get_prescaler) for drv_timer_get_prescaler + hal_timer.o(i.hal_timer_start) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_set_compare_val) for drv_timer_set_compare_val + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_timer.o(i.hal_timer_start) refers to drv_common.o(.data) for g_system_clock + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_register_callback) for drv_timer_register_callback + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_get_prescaler) for drv_timer_get_prescaler + hal_timer.o(i.hal_timer_start_ex) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_set_compare_val) for drv_timer_set_compare_val + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_timer.o(i.hal_timer_start_ex) refers to drv_common.o(.data) for g_system_clock + hal_timer.o(i.hal_timer_stop) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_timer.o(i.hal_timer_stop) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + hal_timer.o(i.hal_timer_stop) refers to drv_timer.o(i.drv_timer_register_callback) for drv_timer_register_callback + hal_timer.o(i.hal_timer_stop) refers to drv_timer.o(i.drv_timer_set_compare_val) for drv_timer_set_compare_val + tau_delay.o(i.delayMs) refers to tau_delay.o(i.delayUs) for delayUs + app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) refers to app_tp_for_custom_s8.o(.data) for .data + app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) refers to app_tp_for_custom_s8.o(.constdata) for .constdata + app_tp_for_custom_s8.o(i.app_tp_screen_analysis_const) refers to app_tp_transfer.o(i.app_tp_screen_init) for app_tp_screen_init + app_tp_for_custom_s8.o(i.app_tp_screen_analysis_const) refers to app_tp_for_custom_s8.o(.data) for .data + app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) refers to app_tp_enc.o(i.EncryptCheck) for EncryptCheck + app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) refers to uidiv.o(.text) for __aeabi_uidivmod + app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) refers to app_tp_for_custom_s8.o(.data) for .data + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_1 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_2 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_3 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_4 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_5 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_6 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_7 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for phone_reg_point_data + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for phone_reg_point_back + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for phone_reg_coord_data + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for phone_reg_coord_back + hal_uart.o(i.hal_uart_deinit) refers to drv_dma.o(i.drv_dma_deinit) for drv_dma_deinit + hal_uart.o(i.hal_uart_deinit) refers to drv_uart.o(i.UART_Deinit) for UART_Deinit + hal_uart.o(i.hal_uart_dmacallback) refers to hal_uart.o(.bss) for .bss + hal_uart.o(i.hal_uart_init) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_uart.o(i.hal_uart_init) refers to memseta.o(.text) for __aeabi_memclr4 + hal_uart.o(i.hal_uart_init) refers to drv_uart.o(i.UART_init) for UART_init + hal_uart.o(i.hal_uart_init) refers to drv_common.o(.data) for g_system_clock + hal_uart.o(i.hal_uart_init) refers to hal_uart.o(.bss) for .bss + hal_uart.o(i.hal_uart_receive_blocking) refers to drv_uart.o(i.UART_ReadBlocking) for UART_ReadBlocking + hal_uart.o(i.hal_uart_receive_dma) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + hal_uart.o(i.hal_uart_receive_dma) refers to drv_uart_dma.o(i.UART_TransferCreateHandleDMA) for UART_TransferCreateHandleDMA + hal_uart.o(i.hal_uart_receive_dma) refers to drv_uart_dma.o(i.UART_TransferReceiveDMA) for UART_TransferReceiveDMA + hal_uart.o(i.hal_uart_receive_dma) refers to hal_uart.o(.bss) for .bss + hal_uart.o(i.hal_uart_receive_dma) refers to hal_uart.o(i.hal_uart_dmacallback) for hal_uart_dmacallback + hal_uart.o(i.hal_uart_transmit_blocking) refers to drv_uart.o(i.UART_WriteBlocking) for UART_WriteBlocking + hal_uart.o(i.hal_uart_transmit_dma) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + hal_uart.o(i.hal_uart_transmit_dma) refers to drv_uart_dma.o(i.UART_TransferCreateHandleDMA) for UART_TransferCreateHandleDMA + hal_uart.o(i.hal_uart_transmit_dma) refers to drv_uart_dma.o(i.UART_TransferSendDMA) for UART_TransferSendDMA + hal_uart.o(i.hal_uart_transmit_dma) refers to hal_uart.o(.bss) for .bss + hal_uart.o(i.hal_uart_transmit_dma) refers to hal_uart.o(i.hal_uart_dmacallback) for hal_uart_dmacallback + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_param_init.o(i.drv_param_init_get_ccm) for drv_param_init_get_ccm + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_lcdc.o(i.drv_lcdc_config_ccm) for drv_lcdc_config_ccm + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to ffltui.o(.text) for __aeabi_ui2f + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to fdiv.o(.text) for __aeabi_fdiv + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to f2d.o(.text) for __aeabi_f2d + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) for hal_internal_sync_get_hight_performan_mode + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to dfltui.o(.text) for __aeabi_ui2d + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to ddiv.o(.text) for __aeabi_ddiv + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to sqrt.o(i.sqrt) for sqrt + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to dmul.o(.text) for __aeabi_dmul + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to cdcmple.o(.text) for __aeabi_cdcmple + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.check_pkt_buf_rev) refers to hal_internal_vsync.o(i.drv_rxbr_get_status0) for drv_rxbr_get_status0 + hal_internal_vsync.o(i.check_pkt_buf_rev) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.check_pkt_buf_rev) refers to drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) for drv_rxbr_clear_pkt_buffer + hal_internal_vsync.o(i.check_pkt_buf_rev) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.dcs_sw_filter) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.dcs_sw_filter) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_data_mode) for drv_memc_set_data_mode + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_tear_waveform) for drv_memc_set_tear_waveform + hal_internal_vsync.o(i.hal_internal_init_memc) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tear_mode) for hal_internal_vsync_get_tear_mode + hal_internal_vsync.o(i.hal_internal_init_memc) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_ltpo_mode) for drv_memc_set_ltpo_mode + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_double_buffer) for drv_memc_set_double_buffer + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_active_height) for drv_memc_set_active_height + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_inten) for drv_memc_set_inten + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_enable_irq) for drv_memc_enable_irq + hal_internal_vsync.o(i.hal_internal_init_memc) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_cmd_mode_rcv_te) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_sync_cmd_mode_rcv_te) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite) for drv_lcdc_config_overwrite + hal_internal_vsync.o(i.hal_internal_sync_cmd_mode_rcv_te) refers to drv_lcdc.o(i.drv_lcdc_start) for drv_lcdc_start + hal_internal_vsync.o(i.hal_internal_sync_cmd_mode_rcv_te) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.hal_internal_sync_cmd_mode_rcv_te) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(i.calc_framebuffer_setting) for calc_framebuffer_setting + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_vidc.o(i.drv_vidc_reset) for drv_vidc_reset + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) for hal_dsi_rx_ctrl_init + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) for hal_dsi_tx_ctrl_init + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) for hal_dsi_rx_ctrl_start + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) for hal_dsi_rx_ctrl_gen_a_tear_signal + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to tau_delay.o(i.delayUs) for delayUs + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_dsi_tx.o(i.drv_dsi_tx_shutdown) for drv_dsi_tx_shutdown + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_crgu.o(i.drv_crgu_config_reset_modules) for drv_crgu_config_reset_modules + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(i.hal_internal_init_memc) for hal_internal_init_memc + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) for hal_dsi_tx_ctrl_start + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to hal_internal_vsync.o(i.calc_framebuffer_setting) for calc_framebuffer_setting + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to drv_vidc.o(i.drv_vidc_reset) for drv_vidc_reset + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) for hal_dsi_rx_ctrl_init + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) for hal_dsi_rx_ctrl_start + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to drv_lcdc.o(i.drv_lcdc_enable_shadow_reg) for drv_lcdc_enable_shadow_reg + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to tau_delay.o(i.delayMs) for delayMs + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) for hal_dsi_rx_ctrl_gen_a_tear_signal + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to tau_delay.o(i.delayUs) for delayUs + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) for hal_vsync_reset_lcdc_scaler + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to hal_internal_vsync.o(i.vsync_set_te_mode) for vsync_set_te_mode + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.hal_internal_update_dpi_param) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) refers to ffltui.o(.text) for __aeabi_ui2f + hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) refers to fdiv.o(.text) for __aeabi_fdiv + hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) refers to fmul.o(.text) for __aeabi_fmul + hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) refers to f2d.o(.text) for __aeabi_f2d + hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) refers to dadd.o(.text) for __aeabi_dadd + hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) refers to ceil.o(i.ceil) for ceil + hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_deinit) refers to memseta.o(.text) for __aeabi_memclr4 + hal_internal_vsync.o(i.hal_internal_vsync_deinit) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_deinit) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_get_tear_mode) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to drv_chip_info.o(i.drv_chip_rx_info_check) for drv_chip_rx_info_check + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) for check_mipi_rx_tx_video_info + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.calc_framebuffer_setting) for calc_framebuffer_setting + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to drv_rxbr.o(i.drv_rxbr_register_irq0_callback) for drv_rxbr_register_irq0_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to drv_rxbr.o(i.drv_rxbr_register_irq1_callback) for drv_rxbr_register_irq1_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to drv_vidc.o(i.drv_vidc_register_callback) for drv_vidc_register_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to dcs_packet_fifo.o(i.dcs_packet_fifo_init) for dcs_packet_fifo_init + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.soft_gen_te) for soft_gen_te + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.soft_gen_te_double_buffer) for soft_gen_te_double_buffer + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.rxbr_irq0_callback) for rxbr_irq0_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.rxbr_irq1_callback) for rxbr_irq1_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.vidc_callback) for vidc_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) for check_mipi_rx_tx_video_info + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to hal_internal_vsync.o(i.calc_framebuffer_setting) for calc_framebuffer_setting + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_register_write_cmd_entry) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) refers to drv_rxbr.o(i.drv_rxbr_set_cmd_filter) for drv_rxbr_set_cmd_filter + hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_dcs_direct_mode) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) for hal_internal_vsync_set_auto_hw_filter + hal_internal_vsync.o(i.hal_internal_vsync_set_dcs_direct_mode) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) refers to hal_internal_vsync.o(i.hal_internal_vsync_deinit) for hal_internal_vsync_deinit + hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to hal_internal_vsync.o(i.vsync_set_te_mode) for vsync_set_te_mode + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to hal_internal_vsync.o(i.hal_internal_vsync_deinit) for hal_internal_vsync_deinit + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite) for drv_lcdc_config_overwrite + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to hal_internal_vsync.o(i.vsync_set_te_mode) for vsync_set_te_mode + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to ap_demo.o(i.__ARM_common_switch8) for __ARM_common_switch8 + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_memc.o(i.drv_memc_rate_transfer_sel) for drv_memc_rate_transfer_sel + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_memc.o(i.drv_memc_sel_vsync) for drv_memc_sel_vsync + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) for drv_rxbr_frame_drop_cfg + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_rxbr.o(i.drv_rxbr_hline_rcv0_cfg) for drv_rxbr_hline_rcv0_cfg + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to tau_delay.o(i.delayMs) for delayMs + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to hal_internal_vsync.o(i.drv_rxbr_get_status0) for drv_rxbr_get_status0 + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to ffltui.o(.text) for __aeabi_ui2f + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to fdiv.o(.text) for __aeabi_fdiv + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_memc.o(i.drv_memc_set_fs_en_conditions) for drv_memc_set_fs_en_conditions + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_memc.o(i.drv_memc_set_lcdc_st_conditions) for drv_memc_set_lcdc_st_conditions + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_memc.o(i.drv_memc_set_vidc_sync_cnt) for drv_memc_set_vidc_sync_cnt + hal_internal_vsync.o(i.hal_internal_vsync_update_lcdc_addr) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to dfltui.o(.text) for __aeabi_ui2d + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to dadd.o(.text) for __aeabi_dadd + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp_area) for hal_dsi_tx_ctrl_set_partial_disp_area + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp) for hal_dsi_tx_ctrl_set_partial_disp + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to drv_param_init.o(i.drv_param_init_get_sclu_filter) for drv_param_init_get_sclu_filter + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to drv_lcdc.o(i.drv_lcdc_config_scale_up_coef) for drv_lcdc_config_scale_up_coef + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to drv_crgu.o(i.drv_crgu_config_reset_modules) for drv_crgu_config_reset_modules + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) for hal_dsi_tx_ctrl_init + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to hal_internal_vsync.o(i.hal_internal_init_memc) for hal_internal_init_memc + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) for hal_dsi_tx_ctrl_start + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to hal_internal_vsync.o(i.dcs_sw_filter) for dcs_sw_filter + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) for dcs_packet_fifo_alloc + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) for hal_dsi_rx_ctrl_dsc_async_handler + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to hal_internal_vsync.o(i.check_pkt_buf_rev) for check_pkt_buf_rev + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) for drv_dsi_tx_command_put_payload + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rx_partial_update) refers to drv_rxbr.o(i.drv_rxbr_get_col_addr) for drv_rxbr_get_col_addr + hal_internal_vsync.o(i.rx_partial_update) refers to drv_rxbr.o(i.drv_rxbr_get_page_addr) for drv_rxbr_get_page_addr + hal_internal_vsync.o(i.rx_partial_update) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.rx_partial_update) refers to drv_dsc_dec.o(i.drv_dsc_dec_get_nslc) for drv_dsc_dec_get_nslc + hal_internal_vsync.o(i.rx_partial_update) refers to drv_crgu.o(i.drv_crgu_set_dsco_src) for drv_crgu_set_dsco_src + hal_internal_vsync.o(i.rx_partial_update) refers to drv_crgu.o(i.drv_crgu_set_dsco_src_div) for drv_crgu_set_dsco_src_div + hal_internal_vsync.o(i.rx_partial_update) refers to drv_crgu.o(i.drv_crgu_set_dsc_core_div) for drv_crgu_set_dsc_core_div + hal_internal_vsync.o(i.rx_partial_update) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.rx_partial_update) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rx_receive_packet) refers to hal_internal_vsync.o(i.rx_get_dcs_packet_data) for rx_get_dcs_packet_data + hal_internal_vsync.o(i.rx_receive_packet) refers to hal_internal_vsync.o(i.rx_receive_pps) for rx_receive_pps + hal_internal_vsync.o(i.rx_receive_packet) refers to drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) for drv_rxbr_clear_pkt_buffer + hal_internal_vsync.o(i.rx_receive_packet) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.rx_receive_packet) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rx_receive_pps) refers to memseta.o(.text) for __aeabi_memclr4 + hal_internal_vsync.o(i.rx_receive_pps) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.rx_receive_pps) refers to drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) for drv_rxbr_clear_pkt_buffer + hal_internal_vsync.o(i.rx_receive_pps) refers to hal_internal_vsync.o(i.check_pkt_buf_rev) for check_pkt_buf_rev + hal_internal_vsync.o(i.rx_receive_pps) refers to drv_dsc_dec.o(i.drv_dsc_dec_convert_pps_rc_parameter) for drv_dsc_dec_convert_pps_rc_parameter + hal_internal_vsync.o(i.rx_receive_pps) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.rx_receive_pps) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) for drv_dsi_rx_get_compression_en + hal_internal_vsync.o(i.rx_receive_pps) refers to drv_dsc_dec.o(i.drv_dsc_dec_enable) for drv_dsc_dec_enable + hal_internal_vsync.o(i.rx_receive_pps) refers to drv_dsc_dec.o(i.drv_dsc_dec_set_u8_pps) for drv_dsc_dec_set_u8_pps + hal_internal_vsync.o(i.rx_receive_pps) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.rx_receive_pps) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to hal_internal_vsync.o(i.drv_rxbr_get_status0) for drv_rxbr_get_status0 + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to hal_internal_vsync.o(i.rx_receive_packet) for rx_receive_packet + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to hal_internal_vsync.o(i.drv_rxbr_get_int_source) for drv_rxbr_get_int_source + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to hal_internal_vsync.o(i.rx_partial_update) for rx_partial_update + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(i.drv_rxbr_get_int_source) for drv_rxbr_get_int_source + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) for hal_internal_video_mode_auto_sync + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(i.vpre_err_reset) for vpre_err_reset + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to drv_memc.o(i.drv_memc_set_double_buffer_reverse) for drv_memc_set_double_buffer_reverse + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) for drv_rxbr_clear_pkt_buffer + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.soft_gen_te) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.soft_gen_te) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.soft_gen_te_double_buffer) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.soft_gen_te_double_buffer) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.vidc_callback) refers to drv_vidc.o(i.drv_vidc_get_irq_status) for drv_vidc_get_irq_status + hal_internal_vsync.o(i.vidc_callback) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite) for drv_lcdc_config_overwrite + hal_internal_vsync.o(i.vidc_callback) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_internal_vsync.o(i.vidc_callback) refers to drv_vidc.o(i.drv_vidc_clear_irq) for drv_vidc_clear_irq + hal_internal_vsync.o(i.vidc_callback) refers to drv_vidc.o(i.drv_vidc_set_irqen) for drv_vidc_set_irqen + hal_internal_vsync.o(i.vidc_callback) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.vidc_callback) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.vidc_callback) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.vpre_err_reset) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_internal_vsync.o(i.vpre_err_reset) refers to drv_vidc.o(i.drv_vidc_reset) for drv_vidc_reset + hal_internal_vsync.o(i.vpre_err_reset) refers to drv_dsc_dec.o(i.drv_dsc_dec_set_u8_pps) for drv_dsc_dec_set_u8_pps + hal_internal_vsync.o(i.vpre_err_reset) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.vsync_set_te_mode) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_internal_vsync.o(i.vsync_set_te_mode) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_internal_vsync.o(i.vsync_set_te_mode) refers to drv_lcdc.o(i.drv_lcdc_ctrl_flow) for drv_lcdc_ctrl_flow + hal_internal_vsync.o(i.vsync_set_te_mode) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.vsync_set_te_mode) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.vsync_set_te_mode) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.vsync_set_te_mode) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(.data) refers to hal_internal_vsync.o(.bss) for sg_te_info + drv_common.o(i.app_HardFault_Handler) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_common.o(i.app_SysTick_Handler) refers to drv_common.o(.data) for .data + drv_common.o(i.drv_common_enable_systick) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_common.o(i.drv_common_enable_systick) refers to drv_common.o(.data) for .data + drv_common.o(i.drv_common_get_tick) refers to drv_common.o(.data) for .data + drv_common.o(i.drv_common_system_init) refers to drv_chip_info.o(i.drv_chip_info_init) for drv_chip_info_init + drv_common.o(i.drv_common_systick_register_cb) refers to drv_common.o(.data) for .data + drv_dma.o(i.app_dma_irq_handler) refers to drv_dma.o(i.drv_dma_irq_handler) for drv_dma_irq_handler + drv_dma.o(i.drv_dma_abort_transfer) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + drv_dma.o(i.drv_dma_abort_transfer) refers to drv_dma.o(i.drv_dma_disenable_channel_interrupts) for drv_dma_disenable_channel_interrupts + drv_dma.o(i.drv_dma_ahb_init) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + drv_dma.o(i.drv_dma_ahb_init) refers to drv_dma.o(i.drv_dma_disenable_channel_interrupts) for drv_dma_disenable_channel_interrupts + drv_dma.o(i.drv_dma_ahb_init) refers to drv_dma.o(i.drv_dma_clear_flag) for drv_dma_clear_flag + drv_dma.o(i.drv_dma_ahb_init) refers to drv_dma.o(i.drv_dma_set_ccr) for drv_dma_set_ccr + drv_dma.o(i.drv_dma_ahb_init) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_dma.o(i.drv_dma_clear_flag) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dma.o(i.drv_dma_create_handle) refers to drv_dma.o(.bss) for .bss + drv_dma.o(i.drv_dma_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_dma.o(i.drv_dma_disenable_channel_interrupts) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dma.o(i.drv_dma_enable_channel_interrupts) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_dma.o(i.drv_dma_enable_cycle) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + drv_dma.o(i.drv_dma_get_remaining_bytes) refers to drv_dma.o(i.drv_dma_channel_is_active) for drv_dma_channel_is_active + drv_dma.o(i.drv_dma_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_dma.o(i.drv_dma_init) refers to drv_dma.o(i.drv_dma_ahb_init) for drv_dma_ahb_init + drv_dma.o(i.drv_dma_irq_handler) refers to drv_dma.o(i.drv_dma_get_channel_flag) for drv_dma_get_channel_flag + drv_dma.o(i.drv_dma_irq_handler) refers to drv_dma.o(i.drv_dma_clear_flag) for drv_dma_clear_flag + drv_dma.o(i.drv_dma_irq_handler) refers to drv_dma.o(.bss) for .bss + drv_dma.o(i.drv_dma_m2m_init) refers to memseta.o(.text) for __aeabi_memclr4 + drv_dma.o(i.drv_dma_m2m_init) refers to drv_dma.o(i.drv_dma_init) for drv_dma_init + drv_dma.o(i.drv_dma_reset) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + drv_dma.o(i.drv_dma_set_burst) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + drv_dma.o(i.drv_dma_set_transfer) refers to drv_dma.o(i.drv_dma_set_burst) for drv_dma_set_burst + drv_dma.o(i.drv_dma_start_transfer) refers to drv_dma.o(i.drv_dma_enable_channel_interrupts) for drv_dma_enable_channel_interrupts + drv_dma.o(i.drv_dma_start_transfer) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_fls.o(i.drv_fls_gpio_connect) refers to drv_fls.o(i.drv_fls_gpio_disconnect) for drv_fls_gpio_disconnect + drv_fls.o(i.drv_fls_gpio_disconnect) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_fls.o(i.fls_EnableClk) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_fls.o(i.fls_busy_pending) refers to norflash.o(i.norflash_get_status) for norflash_get_status + drv_fls.o(i.fls_de_init) refers to drv_fls_dma.o(i.fls_dma_disable) for fls_dma_disable + drv_fls.o(i.fls_de_init) refers to drv_dma.o(i.drv_dma_clear_flag) for drv_dma_clear_flag + drv_fls.o(i.fls_de_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_fls.o(i.fls_disable_it) refers to drv_fls.o(i.__NVIC_DisableIRQ) for __NVIC_DisableIRQ + drv_fls.o(i.fls_disable_it) refers to drv_fls.o(i.fls_set_mc_irq_mask) for fls_set_mc_irq_mask + drv_fls.o(i.fls_enable_it) refers to drv_fls.o(i.__NVIC_DisableIRQ) for __NVIC_DisableIRQ + drv_fls.o(i.fls_enable_it) refers to drv_fls.o(i.fls_set_mc_irq_mask) for fls_set_mc_irq_mask + drv_fls.o(i.fls_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_fls.o(i.fls_init) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + drv_fls.o(i.fls_init) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_init) refers to drv_fls.o(i.fls_spi_init) for fls_spi_init + drv_fls.o(i.fls_init) refers to drv_fls.o(i.fls_ctrl_cfg_init) for fls_ctrl_cfg_init + drv_fls.o(i.fls_init) refers to drv_fls.o(i.fls_set_tuning) for fls_set_tuning + drv_fls.o(i.fls_init) refers to drv_fls_dma.o(i.fls_dma_disable) for fls_dma_disable + drv_fls.o(i.fls_read_byte_data) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_read_byte_data) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls.o(i.fls_read_byte_data) refers to drv_fls.o(i.fls_set_read) for fls_set_read + drv_fls.o(i.fls_read_byte_data) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls.o(i.fls_read_cmd) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_read_cmd) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls.o(i.fls_read_cmd) refers to drv_fls.o(i.fls_set_read) for fls_set_read + drv_fls.o(i.fls_read_cmd) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls.o(i.fls_read_cmd_it) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_read_cmd_it) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls.o(i.fls_read_cmd_it) refers to drv_fls.o(i.fls_set_read) for fls_set_read + drv_fls.o(i.fls_read_cmd_it) refers to drv_fls.o(i.fls_enable_it) for fls_enable_it + drv_fls.o(i.fls_read_cmd_it) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls.o(i.fls_set_mc_irq_mask) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_fls.o(i.fls_set_mc_irq_mask) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_fls.o(i.fls_write_byte_data) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_write_byte_data) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls.o(i.fls_write_byte_data) refers to drv_fls.o(i.fls_set_write) for fls_set_write + drv_fls.o(i.fls_write_byte_data) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls.o(i.fls_write_cmd) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_write_cmd) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls.o(i.fls_write_cmd) refers to drv_fls.o(i.fls_set_write) for fls_set_write + drv_fls.o(i.fls_write_cmd) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) for drv_ap_rst_trig_edge_detect + drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) refers to drv_gpio.o(.data) for .data + drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.drv_gpio_get_pull_state) refers to ap_demo.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_gpio.o(i.drv_gpio_register_ap_reset_callback) refers to drv_gpio.o(.data) for .data + drv_gpio.o(i.drv_gpio_register_callback) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.drv_gpio_set_driving_strength) refers to ap_demo.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_gpio.o(i.drv_gpio_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.drv_gpio_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_gpio.o(i.drv_gpio_set_pull_state) refers to ap_demo.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_gpio.o(i.drv_gpio_set_schmitt_trigger) refers to ap_demo.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_gpio.o(i.drv_gpio_set_slew_rate) refers to ap_demo.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_i2c_dma.o(i.drv_i2c_dma_callback) refers to drv_i2c_dma.o(.data) for .data + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_i2c_master.o(i.drv_i2c_m_enable) for drv_i2c_m_enable + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) for drv_sys_cfg_set_dma_rx_req + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_dma.o(i.drv_dma_set_transfer) for drv_dma_set_transfer + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_i2c_dma.o(i.drv_i2c_master_write_read_cmd) for drv_i2c_master_write_read_cmd + drv_i2c_dma.o(i.drv_i2c_master_write_dma) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) for drv_sys_cfg_set_dma_tx_req + drv_i2c_dma.o(i.drv_i2c_master_write_dma) refers to drv_dma.o(i.drv_dma_set_transfer) for drv_dma_set_transfer + drv_i2c_dma.o(i.drv_i2c_master_write_dma) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_i2c_dma.o(i.drv_i2c_master_write_dma) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) refers to drv_dma.o(i.drv_dma_set_callback) for drv_dma_set_callback + drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) refers to drv_i2c_dma.o(.data) for .data + drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) refers to drv_i2c_dma.o(.bss) for .bss + drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) refers to drv_i2c_dma.o(i.drv_i2c_dma_callback) for drv_i2c_dma_callback + drv_i2c_dma.o(i.drv_i2c_slave_write_dma) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_i2c_master.o(i.app_I2C1_IRQn_Handler) refers to drv_i2c_master.o(.data) for .data + drv_i2c_master.o(i.drv_i2c1_set_callback) refers to drv_i2c_master.o(.data) for .data + drv_i2c_master.o(i.drv_i2c_m_clear_it_pending_bit) refers to ap_demo.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_i2c_master.o(i.drv_i2c_m_clear_it_pending_bit) refers to drv_i2c_master.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_i2c_master.o(i.drv_i2c_m_deinit) refers to drv_i2c_master.o(i.drv_i2c_m_disable_intr) for drv_i2c_m_disable_intr + drv_i2c_master.o(i.drv_i2c_m_deinit) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + drv_i2c_master.o(i.drv_i2c_m_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_i2c_master.o(i.drv_i2c_m_enable_intr) refers to drv_i2c_master.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_i2c_master.o(i.drv_i2c_m_read_data) refers to drv_i2c_master.o(i.drv_i2c_m_get_fifo_status) for drv_i2c_m_get_fifo_status + drv_i2c_master.o(i.drv_i2c_m_set_sys_mask) refers to drv_i2c_master.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_i2c_master.o(i.drv_i2c_m_write_data) refers to drv_i2c_master.o(i.drv_i2c_m_get_fifo_status) for drv_i2c_m_get_fifo_status + drv_i2c_master.o(i.drv_i2c_master_init) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_i2c_master.o(i.drv_i2c_master_init) refers to drv_common.o(.data) for g_system_clock + drv_i2c_slave.o(i.app_I2C0_IRQn_Handler) refers to drv_i2c_slave.o(.data) for .data + drv_i2c_slave.o(i.drv_i2c0_set_callback) refers to drv_i2c_slave.o(.data) for .data + drv_i2c_slave.o(i.drv_i2c_s_clear_it_pending_bit) refers to ap_demo.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_i2c_slave.o(i.drv_i2c_s_read_data) refers to drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) for drv_i2c_s_get_fifo_status + drv_i2c_slave.o(i.drv_i2c_s_set_intr) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_i2c_slave.o(i.drv_i2c_s_set_intr) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_i2c_slave.o(i.drv_i2c_s_write_data) refers to drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) for drv_i2c_s_get_fifo_status + drv_i2c_slave.o(i.drv_i2c_slave_init) refers to drv_i2c_slave.o(i.drv_i2c_s_enable) for drv_i2c_s_enable + drv_param_init.o(i.drv_param_init_get_ccm) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_get_scld_filter_h) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_get_scld_filter_v) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_get_sclu_filter) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_set_ccm) refers to memcpya.o(.text) for __aeabi_memcpy4 + drv_param_init.o(i.drv_param_init_set_ccm) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_set_scld_filter) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_set_sclu_filter) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_p2r_filter_init) refers to drv_param_init.o(.constdata) for .constdata + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_dma.o(i.drv_dma_disenable_channel_interrupts) for drv_dma_disenable_channel_interrupts + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_master.o(i.drv_spi_m_enable_tx_dma) for drv_spi_m_enable_tx_dma + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_master.o(i.drv_spi_m_enable_rx_dma) for drv_spi_m_enable_rx_dma + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_slave.o(i.drv_spi_s_enable_tx_dma) for drv_spi_s_enable_tx_dma + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_slave.o(i.drv_spi_s_enable_rx_dma) for drv_spi_s_enable_rx_dma + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_dma.o(.bss) for .bss + drv_spi_dma.o(i.drv_spi_dma_callback) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_dma_ch6_init) refers to drv_spi_dma.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_spi_dma.o(i.drv_spi_dma_ch6_init) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_dma_init) refers to drv_spi_dma.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_spi_dma.o(i.drv_spi_dma_init) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) refers to drv_dma.o(i.drv_dma_set_callback) for drv_dma_set_callback + drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) refers to drv_spi_dma.o(.bss) for .bss + drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) refers to drv_spi_dma.o(i.drv_spi_dma_callback) for drv_spi_dma_callback + drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) refers to drv_dma.o(i.drv_dma_set_callback) for drv_dma_set_callback + drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) refers to drv_spi_dma.o(.bss) for .bss + drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) refers to drv_spi_dma.o(i.drv_spi_dma_callback) for drv_spi_dma_callback + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_spi_master.o(i.drv_spi_m_enable_rx_dma) for drv_spi_m_enable_rx_dma + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_spi_master.o(i.drv_spi_m_enable_tx_dma) for drv_spi_m_enable_tx_dma + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_dma.o(i.drv_dma_enable_channel_interrupts) for drv_dma_enable_channel_interrupts + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spim_dma_write) refers to drv_spi_master.o(i.drv_spi_m_enable_tx_dma) for drv_spi_m_enable_tx_dma + drv_spi_dma.o(i.drv_spim_dma_write) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_spi_dma.o(i.drv_spim_dma_write) refers to drv_dma.o(i.drv_dma_enable_channel_interrupts) for drv_dma_enable_channel_interrupts + drv_spi_dma.o(i.drv_spim_dma_write) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_spi_dma.o(i.drv_spim_dma_write) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spis_dma_write) refers to drv_spi_slave.o(i.drv_spi_s_enable_tx_dma) for drv_spi_s_enable_tx_dma + drv_spi_dma.o(i.drv_spis_dma_write) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_spi_dma.o(i.drv_spis_dma_write) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_spi_dma.o(i.drv_spis_dma_write) refers to drv_spi_dma.o(.bss) for .bss + drv_spi_master.o(i.app_SPIM_IRQn_Handler) refers to drv_spi_master.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_spi_master.o(i.app_SPIM_IRQn_Handler) refers to drv_spi_master.o(.data) for .data + drv_spi_master.o(i.drv_spi_m_deinit) refers to drv_spi_master.o(i.drv_spi_m_switch_sclk) for drv_spi_m_switch_sclk + drv_spi_master.o(i.drv_spi_m_disable_int) refers to drv_spi_master.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_spi_master.o(i.drv_spi_m_set_intr_callback) refers to drv_spi_master.o(.data) for .data + drv_spi_master.o(i.drv_spi_master_init) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_spi_master.o(i.drv_spi_master_init) refers to drv_common.o(.data) for g_system_clock + drv_swire.o(i.app_SWIRE_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_swire.o(i.app_SWIRE_IRQn_Handler) refers to drv_swire.o(i.drv_swire_set_int) for drv_swire_set_int + drv_swire.o(i.app_SWIRE_IRQn_Handler) refers to drv_swire.o(.data) for .data + drv_swire.o(i.drv_swire_register_callback) refers to drv_swire.o(.data) for .data + drv_swire.o(i.drv_swire_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_swire.o(i.drv_swire_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_lvl_trig) for drv_sys_cfg_sel_ap_rst_lvl_trig + drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) refers to drv_sys_cfg.o(.data) for .data + drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_lvl_trig) for drv_sys_cfg_sel_ap_rst_lvl_trig + drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) refers to drv_sys_cfg.o(.data) for .data + drv_timer.o(i.app_TIMER0_IRQn_Handler) refers to drv_timer.o(i.drv_timer_handle_interrupt) for drv_timer_handle_interrupt + drv_timer.o(i.app_TIMER1_IRQn_Handler) refers to drv_timer.o(i.drv_timer_handle_interrupt) for drv_timer_handle_interrupt + drv_timer.o(i.app_TIMER2_IRQn_Handler) refers to drv_timer.o(i.drv_timer_handle_interrupt) for drv_timer_handle_interrupt + drv_timer.o(i.app_TIMER3_IRQn_Handler) refers to drv_timer.o(i.drv_timer_handle_interrupt) for drv_timer_handle_interrupt + drv_timer.o(i.drv_timer_clear_status_flags) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_clear_status_flags) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_timer.o(i.drv_timer_enable) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_get_instance) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_get_prescaler) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_get_status) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(i.drv_timer_clear_status_flags) for drv_timer_clear_status_flags + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(i.drv_timer_set_compare_val) for drv_timer_set_compare_val + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_register_callback) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_set_compare_val) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_timer.o(i.drv_timer_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_timer.o(i.drv_timer_set_prescaler) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_set_prescaler) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_set_repeat) refers to drv_timer.o(.data) for .data + dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) refers to dcs_packet_fifo.o(.bss) for .bss + dcs_packet_fifo.o(i.dcs_packet_fifo_init) refers to dcs_packet_fifo.o(.bss) for .bss + dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) refers to dcs_packet_fifo.o(.bss) for .bss + dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) refers to dcs_packet_fifo.o(.bss) for .bss + dcs_packet_fifo.o(i.dcs_packet_get_fifo_size) refers to dcs_packet_fifo.o(.bss) for .bss + drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to ffltui.o(.text) for __aeabi_ui2f + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to fdiv.o(.text) for __aeabi_fdiv + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to fmul.o(.text) for __aeabi_fmul + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) for drv_dsi_rx_get_color_bpp + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_color_pcc) for drv_dsi_rx_get_color_pcc + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to fadd.o(.text) for __aeabi_fadd + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to cfrcmple.o(.text) for __aeabi_cfrcmple + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to f2d.o(.text) for __aeabi_f2d + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to dadd.o(.text) for __aeabi_dadd + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to dfixui.o(.text) for __aeabi_d2uiz + drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) refers to ap_demo.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_dsi_rx.o(i.drv_dsi_rx_get_phy_stopstate) refers to ap_demo.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_dsi_rx.o(i.drv_dsi_rx_phy_resistor_calibration) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_dsi_rx.o(i.drv_dsi_rx_phy_resistor_calibration) refers to drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) for drv_rx_phy_test_write_1_byte + drv_dsi_rx.o(i.drv_dsi_rx_phy_resistor_calibration) refers to drv_dsi_rx.o(i.drv_rx_phy_test_read) for drv_rx_phy_test_read + drv_dsi_rx.o(i.drv_dsi_rx_phy_resistor_calibration) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_rx.o(i.drv_dsi_rx_set_lane_swap) refers to drv_chip_info.o(i.drv_chip_info_get_info) for drv_chip_info_get_info + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_phy_common.o(i.drv_phy_get_rate_para) for drv_phy_get_rate_para + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_phy_common.o(i.drv_phy_get_calibration) for drv_phy_get_calibration + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_dsi_rx.o(i.drv_rx_phy_test_clear) for drv_rx_phy_test_clear + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) for drv_rx_phy_test_write_1_byte + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_dsi_rx.o(i.drv_rx_phy_test_write_2_byte) for drv_rx_phy_test_write_2_byte + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_chip_info.o(i.drv_chip_info_get_info) for drv_chip_info_get_info + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_dsi_rx.o(i.drv_rx_phy_test_lock) for drv_rx_phy_test_lock + drv_dsi_rx.o(i.drv_rx_phy_test_clear) refers to drv_phy_common.o(i.drv_phy_test_clear) for drv_phy_test_clear + drv_dsi_rx.o(i.drv_rx_phy_test_lock) refers to drv_phy_common.o(i.drv_phy_test_lock) for drv_phy_test_lock + drv_dsi_rx.o(i.drv_rx_phy_test_read) refers to drv_phy_common.o(i.drv_phy_test_read) for drv_phy_test_read + drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) refers to drv_phy_common.o(i.drv_phy_test_write_1_byte) for drv_phy_test_write_1_byte + drv_dsi_rx.o(i.drv_rx_phy_test_write_2_byte) refers to drv_phy_common.o(i.drv_phy_test_write_2_byte) for drv_phy_test_write_2_byte + drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dsi_tx.o(i.drv_dsi_tx_phy_resistor_calibration) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_dsi_tx.o(i.drv_dsi_tx_phy_resistor_calibration) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) for drv_tx_phy_test_write_1_byte + drv_dsi_tx.o(i.drv_dsi_tx_phy_resistor_calibration) refers to drv_dsi_tx.o(i.drv_tx_phy_test_read) for drv_tx_phy_test_read + drv_dsi_tx.o(i.drv_dsi_tx_phy_resistor_calibration) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) refers to ap_demo.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ulpsactivenot) refers to ap_demo.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_phy_common.o(i.drv_phy_get_rate_para) for drv_phy_get_rate_para + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_phy_common.o(i.drv_phy_get_pll_para) for drv_phy_get_pll_para + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_phy_common.o(i.drv_phy_get_calibration) for drv_phy_get_calibration + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_enter) for drv_tx_phy_test_enter + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_crgu.o(i.drv_crgu_set_mipi_ref_src) for drv_crgu_set_mipi_ref_src + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_crgu.o(i.drv_crgu_set_mipi_cfg_src) for drv_crgu_set_mipi_cfg_src + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_clear) for drv_tx_phy_test_clear + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) for drv_tx_phy_test_write_1_byte + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_2_byte) for drv_tx_phy_test_write_2_byte + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_code) for drv_tx_phy_test_write_code + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_exit) for drv_tx_phy_test_exit + drv_dsi_tx.o(i.drv_dsi_tx_phy_trigger) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) for drv_dsi_tx_phy_status_stopstate + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) for drv_dsi_tx_phy_status_stopstate + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_pll_lock) for drv_dsi_tx_phy_status_pll_lock + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ulpsactivenot) for drv_dsi_tx_phy_status_ulpsactivenot + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ulpsactivenot) for drv_dsi_tx_phy_status_ulpsactivenot + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) for drv_tx_phy_test_write_1_byte + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_pll_lock) for drv_dsi_tx_phy_status_pll_lock + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to drv_dsi_tx.o(i.drv_dsi_tx_version) for drv_dsi_tx_version + drv_dsi_tx.o(i.drv_dsi_tx_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dsi_tx.o(i.drv_dsi_tx_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_dsi_tx.o(i.drv_tx_phy_test_clear) refers to drv_phy_common.o(i.drv_phy_test_clear) for drv_phy_test_clear + drv_dsi_tx.o(i.drv_tx_phy_test_read) refers to drv_phy_common.o(i.drv_phy_test_read) for drv_phy_test_read + drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) refers to drv_phy_common.o(i.drv_phy_test_write_1_byte) for drv_phy_test_write_1_byte + drv_dsi_tx.o(i.drv_tx_phy_test_write_2_byte) refers to drv_phy_common.o(i.drv_phy_test_write_2_byte) for drv_phy_test_write_2_byte + drv_dsi_tx.o(i.drv_tx_phy_test_write_code) refers to drv_phy_common.o(i.drv_phy_test_write_code) for drv_phy_test_write_code + drv_lcdc.o(i.drv_lcdc_config_src_parameter) refers to drv_lcdc.o(i.drv_lcdc_config_input_size) for drv_lcdc_config_input_size + drv_lcdc.o(i.drv_lcdc_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_lcdc.o(i.drv_lcdc_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_memc.o(i.app_MEMC_IRQn_Handler) refers to drv_memc.o(i.drv_memc_get_status) for drv_memc_get_status + drv_memc.o(i.app_MEMC_IRQn_Handler) refers to drv_memc.o(i.drv_memc_clear_status) for drv_memc_clear_status + drv_memc.o(i.app_MEMC_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_memc.o(i.drv_memc_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_memc.o(i.drv_memc_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_rxbr.o(i.app_ADC_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_rxbr.o(i.app_ADC_IRQn_Handler) refers to drv_rxbr.o(.data) for .data + drv_rxbr.o(i.app_VPRE_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_rxbr.o(i.app_VPRE_IRQn_Handler) refers to drv_rxbr.o(.data) for .data + drv_rxbr.o(i.drv_rxbr_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_rxbr.o(i.drv_rxbr_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_rxbr.o(i.drv_rxbr_enable_irq) refers to drv_rxbr.o(i.__NVIC_EnableIRQ) for __NVIC_EnableIRQ + drv_rxbr.o(i.drv_rxbr_enable_irq) refers to drv_rxbr.o(i.__NVIC_DisableIRQ) for __NVIC_DisableIRQ + drv_rxbr.o(i.drv_rxbr_register_irq0_callback) refers to drv_rxbr.o(.data) for .data + drv_rxbr.o(i.drv_rxbr_register_irq1_callback) refers to drv_rxbr.o(.data) for .data + drv_rxbr.o(i.drv_rxbr_set_cmd_filter) refers to ap_demo.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_rxbr.o(i.drv_rxbr_soft_reset) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + drv_vidc.o(i.app_VIDC_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_vidc.o(i.app_VIDC_IRQn_Handler) refers to drv_vidc.o(.data) for .data + drv_vidc.o(i.drv_vidc_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_vidc.o(i.drv_vidc_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_vidc.o(i.drv_vidc_register_callback) refers to drv_vidc.o(.data) for .data + irq_redirect .o(i.ADC_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.AP_NRESET_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.DMA_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT0_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT1_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT2_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT3_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT4_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT5_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT6_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT7_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.FLSCTRL_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.HardFault_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.I2C0_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.I2C1_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.LCDC_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.MEMC_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.MIPI_RX_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.MIPI_TX_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.PWMDET_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.SPIM_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.SPIS_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.SWIRE_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.SysTick_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.TIMER0_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.TIMER1_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.TIMER2_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.TIMER3_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.UART_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.VIDC_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.VPRE_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.WDG_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.handle_init) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.handle_init) refers to drv_common.o(i.app_SysTick_Handler) for app_SysTick_Handler + irq_redirect .o(i.handle_init) refers to hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) for app_LCDC_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) for app_MIPI_RX_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) for app_MIPI_TX_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_dma.o(i.app_dma_irq_handler) for app_dma_irq_handler + irq_redirect .o(i.handle_init) refers to norflash.o(i.app_fls_ctrl_Handler) for app_fls_ctrl_Handler + irq_redirect .o(i.handle_init) refers to drv_i2c_slave.o(i.app_I2C0_IRQn_Handler) for app_I2C0_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_i2c_master.o(i.app_I2C1_IRQn_Handler) for app_I2C1_IRQn_Handler + irq_redirect .o(i.handle_init) refers to hal_spi_slave.o(i.app_SPIS_IRQn_Handler) for app_SPIS_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_spi_master.o(i.app_SPIM_IRQn_Handler) for app_SPIM_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_rxbr.o(i.app_VPRE_IRQn_Handler) for app_VPRE_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_rxbr.o(i.app_ADC_IRQn_Handler) for app_ADC_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_vidc.o(i.app_VIDC_IRQn_Handler) for app_VIDC_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_memc.o(i.app_MEMC_IRQn_Handler) for app_MEMC_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_timer.o(i.app_TIMER0_IRQn_Handler) for app_TIMER0_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_timer.o(i.app_TIMER1_IRQn_Handler) for app_TIMER1_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_timer.o(i.app_TIMER2_IRQn_Handler) for app_TIMER2_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_timer.o(i.app_TIMER3_IRQn_Handler) for app_TIMER3_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_wdg.o(i.app_WDG_IRQn_Handler) for app_WDG_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_uart.o(i.app_UART_IRQn_Handler) for app_UART_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_pwm.o(i.app_PWMDET_IRQn_Handler) for app_PWMDET_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_swire.o(i.app_SWIRE_IRQn_Handler) for app_SWIRE_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) for app_AP_NRESET_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) for app_EXTI_INT0_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) for app_EXTI_INT1_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) for app_EXTI_INT2_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) for app_EXTI_INT3_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) for app_EXTI_INT4_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) for app_EXTI_INT5_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) for app_EXTI_INT6_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) for app_EXTI_INT7_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_common.o(i.app_HardFault_Handler) for app_HardFault_Handler + drv_efuse.o(i.drv_efuse_enter_inactive) refers to drv_efuse.o(i.drv_efuse_int_enable) for drv_efuse_int_enable + drv_efuse.o(i.drv_efuse_read) refers to drv_efuse.o(i.drv_efuse_read_req) for drv_efuse_read_req + drv_efuse.o(i.drv_efuse_write) refers to drv_efuse.o(i.drv_efuse_write_req) for drv_efuse_write_req + drv_phy_common.o(i.drv_phy_enable_calibration) refers to drv_phy_common.o(.data) for .data + drv_phy_common.o(i.drv_phy_get_calibration) refers to drv_chip_info.o(i.drv_chip_info_get_info) for drv_chip_info_get_info + drv_phy_common.o(i.drv_phy_get_calibration) refers to drv_efuse.o(i.drv_efuse_read) for drv_efuse_read + drv_phy_common.o(i.drv_phy_get_calibration) refers to drv_phy_common.o(.data) for .data + drv_phy_common.o(i.drv_phy_get_pll_para) refers to drv_phy_common.o(.constdata) for .constdata + drv_phy_common.o(i.drv_phy_get_rate_para) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_phy_common.o(i.drv_phy_get_rate_para) refers to drv_phy_common.o(.constdata) for .constdata + drv_phy_common.o(i.drv_phy_test_write_1_byte) refers to drv_phy_common.o(i.drv_phy_test_write_code) for drv_phy_test_write_code + drv_phy_common.o(i.drv_phy_test_write_1_byte) refers to drv_phy_common.o(i.drv_phy_test_write_data) for drv_phy_test_write_data + drv_phy_common.o(i.drv_phy_test_write_2_byte) refers to drv_phy_common.o(i.drv_phy_test_write_code) for drv_phy_test_write_code + drv_phy_common.o(i.drv_phy_test_write_2_byte) refers to drv_phy_common.o(i.drv_phy_test_write_data) for drv_phy_test_write_data + drv_chip_info.o(i.drv_chip_info_get_info) refers to drv_chip_info.o(.data) for .data + drv_chip_info.o(i.drv_chip_info_init) refers to drv_efuse.o(i.drv_efuse_enter_inactive) for drv_efuse_enter_inactive + drv_chip_info.o(i.drv_chip_info_init) refers to drv_efuse.o(i.drv_efuse_read) for drv_efuse_read + drv_chip_info.o(i.drv_chip_info_init) refers to drv_chip_info.o(.data) for .data + drv_chip_info.o(i.drv_chip_rx_info_check) refers to printfa.o(i.__0printf) for __2printf + drv_chip_info.o(i.drv_chip_rx_info_check) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_chip_info.o(i.drv_chip_rx_info_check) refers to drv_chip_info.o(.data) for .data + drv_dsc_dec.o(i.drv_dsc_dec_enable) refers to drv_efuse.o(i.drv_efuse_enter_inactive) for drv_efuse_enter_inactive + drv_dsc_dec.o(i.drv_dsc_dec_enable) refers to drv_efuse.o(i.drv_efuse_read) for drv_efuse_read + drv_dsc_dec.o(i.drv_dsc_dec_enable) refers to printfa.o(i.__0printf) for __2printf + tau_log.o(i.LOG_printf) refers to printfa.o(i.__0vsprintf) for vsprintf + tau_log.o(i.LOG_printf) refers to printfa.o(i.__0printf) for __2printf + tau_log.o(i.LOG_printf) refers to tau_log.o(.bss) for .bss + tau_log.o(i.fgetc) refers to hal_uart.o(i.hal_uart_receive_blocking) for hal_uart_receive_blocking + tau_log.o(i.fputc) refers to hal_uart.o(i.hal_uart_transmit_blocking) for hal_uart_transmit_blocking + app_tp_enc.o(i.EncryptCheck) refers to app_tp_enc.o(.data) for .data + hal_spi_slave.o(i.app_SPIS_IRQn_Handler) refers to ap_demo.o(i.__ARM_common_switch8) for __ARM_common_switch8 + hal_spi_slave.o(i.app_SPIS_IRQn_Handler) refers to hal_spi_slave.o(i.__NVIC_SetPriority) for __NVIC_SetPriority + hal_spi_slave.o(i.app_SPIS_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_spi_slave.o(i.app_SPIS_IRQn_Handler) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_s_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_spi_slave.o(i.hal_spi_s_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_init_input) for hal_gpio_init_input + hal_spi_slave.o(i.hal_spi_s_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + hal_spi_slave.o(i.hal_spi_slave_auto_transfer_abort) refers to drv_spi_dma.o(i.drv_spi_abort_dma) for drv_spi_abort_dma + hal_spi_slave.o(i.hal_spi_slave_auto_transfer_start) refers to drv_dma.o(i.drv_dma_enable_cycle) for drv_dma_enable_cycle + hal_spi_slave.o(i.hal_spi_slave_auto_transfer_start) refers to drv_spi_dma.o(i.drv_spis_dma_write) for drv_spis_dma_write + hal_spi_slave.o(i.hal_spi_slave_auto_transfer_start) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_deinit) refers to drv_spi_slave.o(i.drv_spi_s_deinit) for drv_spi_s_deinit + hal_spi_slave.o(i.hal_spi_slave_enable) refers to drv_spi_slave.o(i.drv_spi_s_enable_int) for drv_spi_s_enable_int + hal_spi_slave.o(i.hal_spi_slave_enable) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_spi_slave.o(i.hal_spi_slave_enable) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_gpio_init) refers to drv_spi_slave.o(i.drv_spi_s_gpio_init) for drv_spi_s_gpio_init + hal_spi_slave.o(i.hal_spi_slave_init) refers to hal_spi_slave.o(i.hal_spi_slave_gpio_init) for hal_spi_slave_gpio_init + hal_spi_slave.o(i.hal_spi_slave_init) refers to drv_spi_slave.o(i.drv_spi_slave_init) for drv_spi_slave_init + hal_spi_slave.o(i.hal_spi_slave_init) refers to drv_spi_dma.o(i.drv_spi_dma_init) for drv_spi_dma_init + hal_spi_slave.o(i.hal_spi_slave_init) refers to drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) for drv_spi_set_dma_irq_callback + hal_spi_slave.o(i.hal_spi_slave_init) refers to drv_spi_slave.o(i.drv_spi_s_enable_tx_dma) for drv_spi_s_enable_tx_dma + hal_spi_slave.o(i.hal_spi_slave_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) for drv_sys_cfg_set_dma_tx_req + hal_spi_slave.o(i.hal_spi_slave_init) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_read_data) refers to drv_spi_slave.o(i.drv_spi_s_read_data) for drv_spi_s_read_data + hal_spi_slave.o(i.hal_spi_slave_register_callback) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_reset_tx) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_set_auto_rx_buffer) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_set_auto_tx_buffer) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_write_data) refers to drv_spi_slave.o(i.drv_spi_s_write_data) for drv_spi_s_write_data + norflash.o(i.app_fls_ctrl_Handler) refers to drv_fls.o(i.fls_clr_interrupt_flag) for fls_clr_interrupt_flag + norflash.o(i.app_fls_ctrl_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + norflash.o(i.app_fls_ctrl_Handler) refers to norflash.o(.data) for .data + norflash.o(i.norflash_best_cfg_init) refers to drv_fls.o(i.fls_spi_init) for fls_spi_init + norflash.o(i.norflash_best_cfg_init) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_check_id) refers to norflash.o(i.norflash_read_id) for norflash_read_id + norflash.o(i.norflash_check_id) refers to tau_delay.o(i.delayUs) for delayUs + norflash.o(i.norflash_check_id) refers to norflash.o(.data) for .data + norflash.o(i.norflash_dma_callback) refers to norflash.o(.data) for .data + norflash.o(i.norflash_dma_read) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + norflash.o(i.norflash_dma_read) refers to drv_fls_dma.o(i.fls_transfer_create_handle_dma) for fls_transfer_create_handle_dma + norflash.o(i.norflash_dma_read) refers to drv_fls_dma.o(i.fls_dma_read_prepare) for fls_dma_read_prepare + norflash.o(i.norflash_dma_read) refers to drv_fls_dma.o(i.fls_transfer_dma) for fls_transfer_dma + norflash.o(i.norflash_dma_read) refers to drv_fls_dma.o(i.fls_dma_disable) for fls_dma_disable + norflash.o(i.norflash_dma_read) refers to norflash.o(.data) for .data + norflash.o(i.norflash_dma_read) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_dma_read) refers to norflash.o(i.norflash_dma_callback) for norflash_dma_callback + norflash.o(i.norflash_dma_write) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + norflash.o(i.norflash_dma_write) refers to drv_fls_dma.o(i.fls_transfer_create_handle_dma) for fls_transfer_create_handle_dma + norflash.o(i.norflash_dma_write) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_dma_write) refers to norflash.o(i.norflash_switch_fls_spi) for norflash_switch_fls_spi + norflash.o(i.norflash_dma_write) refers to drv_fls_dma.o(i.fls_dma_write_prepare) for fls_dma_write_prepare + norflash.o(i.norflash_dma_write) refers to drv_fls_dma.o(i.fls_transfer_dma) for fls_transfer_dma + norflash.o(i.norflash_dma_write) refers to drv_fls_dma.o(i.fls_dma_disable) for fls_dma_disable + norflash.o(i.norflash_dma_write) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_dma_write) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_dma_write) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_dma_write) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_dma_write) refers to norflash.o(i.norflash_dma_callback) for norflash_dma_callback + norflash.o(i.norflash_dma_write) refers to norflash.o(.data) for .data + norflash.o(i.norflash_dual_read) refers to drv_fls.o(i.fls_ddat_enable) for fls_ddat_enable + norflash.o(i.norflash_dual_read) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_dual_read) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_dual_write) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_dual_write) refers to norflash.o(i.norflash_switch_fls_spi) for norflash_switch_fls_spi + norflash.o(i.norflash_dual_write) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_dual_write) refers to drv_fls.o(i.fls_ddat_enable) for fls_ddat_enable + norflash.o(i.norflash_dual_write) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_dual_write) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_en4b) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_en4b) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + norflash.o(i.norflash_en4b) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_en4b) refers to norflash.o(i.norflash_read_config_reg) for norflash_read_config_reg + norflash.o(i.norflash_en4b) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_en_quad) refers to norflash.o(i.norflash_en_quad_check) for norflash_en_quad_check + norflash.o(i.norflash_en_quad) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_en_quad) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_en_quad) refers to drv_fls.o(i.fls_busy_pending) for fls_busy_pending + norflash.o(i.norflash_en_quad) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_en_quad_check) refers to norflash.o(i.norflash_get_dual_hstatus) for norflash_get_dual_hstatus + norflash.o(i.norflash_en_quad_check) refers to norflash.o(i.norflash_get_hstatus) for norflash_get_hstatus + norflash.o(i.norflash_en_quad_check) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_en_quad_check) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_erase_block) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_erase_block) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_erase_block) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_erase_block) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_erase_chip) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_erase_chip) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + norflash.o(i.norflash_erase_chip) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_erase_sector) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_erase_sector) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_erase_sector) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_erase_sector) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_ex4b) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_ex4b) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + norflash.o(i.norflash_ex4b) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_ex4b) refers to norflash.o(i.norflash_read_config_reg) for norflash_read_config_reg + norflash.o(i.norflash_ex4b) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_exit_quad) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_exit_quad) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_exit_quad) refers to norflash.o(i.norflash_en_quad_check) for norflash_en_quad_check + norflash.o(i.norflash_exit_quad) refers to drv_fls.o(i.fls_busy_pending) for fls_busy_pending + norflash.o(i.norflash_exit_quad) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_get_dual_hstatus) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_get_dual_hstatus) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_get_dual_hstatus) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_get_hstatus) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_get_hstatus) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_get_hstatus) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_get_status) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_get_status) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_get_status) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_init) refers to drv_fls.o(i.fls_get_default_spi_config) for fls_get_default_spi_config + norflash.o(i.norflash_init) refers to drv_fls.o(i.fls_get_default_fls_config) for fls_get_default_fls_config + norflash.o(i.norflash_init) refers to drv_fls.o(i.fls_get_default_tuning) for fls_get_default_tuning + norflash.o(i.norflash_init) refers to drv_fls.o(i.fls_init) for fls_init + norflash.o(i.norflash_init) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_init) refers to drv_fls.o(.data) for g_fls_tuning + norflash.o(i.norflash_quad_read) refers to drv_fls.o(i.fls_qdat_enable) for fls_qdat_enable + norflash.o(i.norflash_quad_read) refers to drv_fls.o(i.fls_qadr_enable) for fls_qadr_enable + norflash.o(i.norflash_quad_read) refers to drv_fls.o(i.fls_qcmd_enable) for fls_qcmd_enable + norflash.o(i.norflash_quad_read) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_quad_read) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_quad_write) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_quad_write) refers to norflash.o(i.norflash_switch_fls_spi) for norflash_switch_fls_spi + norflash.o(i.norflash_quad_write) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_quad_write) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_quad_write) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_quad_write) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_read) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_read_config_reg) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_read_id) refers to drv_fls.o(i.fls_read_cmd) for fls_read_cmd + norflash.o(i.norflash_read_uid) refers to memseta.o(.text) for __aeabi_memclr4 + norflash.o(i.norflash_read_uid) refers to drv_fls.o(i.fls_read_cmd) for fls_read_cmd + norflash.o(i.norflash_read_uid) refers to memcpya.o(.text) for __aeabi_memcpy + norflash.o(i.norflash_set_best_cfg) refers to memseta.o(.text) for __aeabi_memclr4 + norflash.o(i.norflash_set_best_read_cfg) refers to norflash.o(i.norflash_en_quad) for norflash_en_quad + norflash.o(i.norflash_set_best_read_cfg) refers to norflash.o(.data) for .data + norflash.o(i.norflash_set_best_read_cfg) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_set_best_write_cfg) refers to norflash.o(i.norflash_en_quad) for norflash_en_quad + norflash.o(i.norflash_set_best_write_cfg) refers to norflash.o(.data) for .data + norflash.o(i.norflash_set_best_write_cfg) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_switch_fls_spi) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_switch_fls_spi) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_switch_fls_spi) refers to drv_fls.o(i.fls_ddat_enable) for fls_ddat_enable + norflash.o(i.norflash_switch_fls_spi) refers to drv_fls.o(i.fls_qdat_enable) for fls_qdat_enable + norflash.o(i.norflash_switch_fls_spi) refers to drv_fls.o(i.fls_qadr_enable) for fls_qadr_enable + norflash.o(i.norflash_write) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_write) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_write) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_write) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_write_disable) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + norflash.o(i.norflash_write_disable) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_write_disable) refers to norflash.o(.data) for .data + norflash.o(i.norflash_write_disable) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_write_enable) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + norflash.o(i.norflash_write_enable) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_write_enable) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_write_enable) refers to norflash.o(.data) for .data + norflash.o(i.norflash_write_endian_scr) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_write_endian_scr) refers to norflash.o(i.norflash_big_end_enable) for norflash_big_end_enable + norflash.o(i.norflash_write_endian_scr) refers to drv_fls.o(i.fls_en_scr) for fls_en_scr + norflash.o(i.norflash_write_endian_scr) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_write_endian_scr) refers to norflash.o(i.norflash_big_end_clear) for norflash_big_end_clear + norflash.o(i.norflash_write_endian_scr) refers to drv_fls.o(i.fls_scr_clear) for fls_scr_clear + norflash.o(i.norflash_write_endian_scr) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_write_endian_scr) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + drv_fls_dma.o(i.fls_abort_dma) refers to drv_dma.o(i.drv_dma_abort_transfer) for drv_dma_abort_transfer + drv_fls_dma.o(i.fls_abort_dma) refers to drv_fls_dma.o(i.fls_dma_disable) for fls_dma_disable + drv_fls_dma.o(i.fls_dma_read_prepare) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls_dma.o(i.fls_dma_read_prepare) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls_dma.o(i.fls_dma_read_prepare) refers to drv_fls.o(i.fls_set_read) for fls_set_read + drv_fls_dma.o(i.fls_dma_read_prepare) refers to drv_fls_dma.o(i.fls_dma_enable) for fls_dma_enable + drv_fls_dma.o(i.fls_dma_read_prepare) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls_dma.o(i.fls_dma_write_prepare) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls_dma.o(i.fls_dma_write_prepare) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls_dma.o(i.fls_dma_write_prepare) refers to drv_fls.o(i.fls_set_write) for fls_set_write + drv_fls_dma.o(i.fls_dma_write_prepare) refers to drv_fls_dma.o(i.fls_dma_enable) for fls_dma_enable + drv_fls_dma.o(i.fls_dma_write_prepare) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls_dma.o(i.fls_read_dmacallback) refers to drv_dma.o(i.drv_dma_abort_transfer) for drv_dma_abort_transfer + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to memseta.o(.text) for __aeabi_memclr4 + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to drv_dma.o(i.drv_dma_init) for drv_dma_init + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to drv_dma.o(i.drv_dma_set_callback) for drv_dma_set_callback + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to drv_fls_dma.o(.data) for .data + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to drv_fls_dma.o(i.fls_read_dmacallback) for fls_read_dmacallback + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to drv_fls_dma.o(i.fls_write_dmacallback) for fls_write_dmacallback + drv_fls_dma.o(i.fls_transfer_dma) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_fls_dma.o(i.fls_transfer_dma) refers to drv_dma.o(i.drv_dma_start_transfer) for drv_dma_start_transfer + drv_fls_dma.o(i.fls_transfer_get_receive_count_dma) refers to drv_dma.o(i.drv_dma_get_remaining_bytes) for drv_dma_get_remaining_bytes + drv_fls_dma.o(i.fls_write_dmacallback) refers to drv_dma.o(i.drv_dma_abort_transfer) for drv_dma_abort_transfer + drv_pwm.o(i.app_PWMDET_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_pwm.o(i.app_PWMDET_IRQn_Handler) refers to drv_pwm.o(.data) for .data + drv_pwm.o(i.drv_pwm_in_register_callback) refers to drv_pwm.o(.data) for .data + drv_pwm.o(i.drv_pwm_in_set_sys_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_pwm.o(i.drv_pwm_in_set_sys_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_spi_slave.o(i.drv_spi_s_deinit) refers to drv_spi_slave.o(i.drv_spi_s_switch_sclk) for drv_spi_s_switch_sclk + drv_uart.o(i.UART0_IRQ_Handle) refers to drv_uart.o(i.UART_TransferHandleIRQ) for UART_TransferHandleIRQ + drv_uart.o(i.UART0_IRQ_Handle) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_uart.o(i.UART0_IRQ_Handle) refers to drv_uart.o(.data) for .data + drv_uart.o(i.UART_AbortReceive) refers to drv_uart.o(i.UART_Disable_IT) for UART_Disable_IT + drv_uart.o(i.UART_AbortReceive) refers to drv_uart.o(i.UART_ResetRxFIFO) for UART_ResetRxFIFO + drv_uart.o(i.UART_AbortSend) refers to drv_uart.o(i.UART_Disable_IT) for UART_Disable_IT + drv_uart.o(i.UART_AbortSend) refers to drv_uart.o(i.UART_ResetTxFIFO) for UART_ResetTxFIFO + drv_uart.o(i.UART_Deinit) refers to drv_uart.o(i.UART_SwitchSCLK) for UART_SwitchSCLK + drv_uart.o(i.UART_Disable_IT) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_Disable_IT) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_uart.o(i.UART_Disable_IT) refers to drv_uart.o(.constdata) for .constdata + drv_uart.o(i.UART_EnableDma) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) for drv_sys_cfg_set_dma_rx_req + drv_uart.o(i.UART_EnableDma) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) for drv_sys_cfg_set_dma_tx_req + drv_uart.o(i.UART_Enable_IT) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_Enable_IT) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_uart.o(i.UART_GetDefaultConfig) refers to memseta.o(.text) for __aeabi_memclr4 + drv_uart.o(i.UART_GetDefaultConfig) refers to drv_common.o(.data) for g_system_clock + drv_uart.o(i.UART_GetFIFO_Ctrl) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_GetFIFO_Ctrl) refers to drv_uart.o(.data) for .data + drv_uart.o(i.UART_ResetRxFIFO) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_ResetRxFIFO) refers to drv_uart.o(.data) for .data + drv_uart.o(i.UART_ResetTxFIFO) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_ResetTxFIFO) refers to drv_uart.o(.data) for .data + drv_uart.o(i.UART_SetBaudRate) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_uart.o(i.UART_SwitchSCLK) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_uart.o(i.UART_TransferCreateHandle) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_TransferCreateHandle) refers to memseta.o(.text) for __aeabi_memclr4 + drv_uart.o(i.UART_TransferCreateHandle) refers to drv_uart.o(i.UART_Enable_IT) for UART_Enable_IT + drv_uart.o(i.UART_TransferCreateHandle) refers to drv_uart.o(.data) for .data + drv_uart.o(i.UART_TransferHandleIRQ) refers to drv_uart.o(i.UART_ResetRxFIFO) for UART_ResetRxFIFO + drv_uart.o(i.UART_init) refers to drv_uart.o(i.UART_DisableDma) for UART_DisableDma + drv_uart.o(i.UART_init) refers to drv_uart.o(i.UART_SwitchSCLK) for UART_SwitchSCLK + drv_uart.o(i.UART_init) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_init) refers to drv_uart.o(i.UART_SetBaudRate) for UART_SetBaudRate + drv_uart.o(i.UART_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_uart.o(i.UART_init) refers to drv_uart.o(.data) for .data + drv_uart.o(i.app_UART_IRQn_Handler) refers to drv_uart.o(i.UART0_IRQ_Handle) for UART0_IRQ_Handle + drv_uart_dma.o(i.UART_DMAInit) refers to memseta.o(.text) for __aeabi_memclr4 + drv_uart_dma.o(i.UART_DMAInit) refers to drv_dma.o(i.drv_dma_init) for drv_dma_init + drv_uart_dma.o(i.UART_TransferAbortReceiveDMA) refers to drv_dma.o(i.drv_dma_abort_transfer) for drv_dma_abort_transfer + drv_uart_dma.o(i.UART_TransferAbortSendDMA) refers to drv_dma.o(i.drv_dma_abort_transfer) for drv_dma_abort_transfer + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to memseta.o(.text) for __aeabi_memclr4 + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart.o(i.UART_EnableDma) for UART_EnableDma + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart_dma.o(i.UART_DMAInit) for UART_DMAInit + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_dma.o(i.drv_dma_set_callback) for drv_dma_set_callback + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart_dma.o(.data) for .data + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart_dma.o(i.UART_TransferReceiveDMACallback) for UART_TransferReceiveDMACallback + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart_dma.o(i.UART_TransferSendDMACallback) for UART_TransferSendDMACallback + drv_uart_dma.o(i.UART_TransferGetReceiveCountDMA) refers to drv_dma.o(i.drv_dma_get_remaining_bytes) for drv_dma_get_remaining_bytes + drv_uart_dma.o(i.UART_TransferReceiveDMA) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_uart_dma.o(i.UART_TransferReceiveDMA) refers to drv_uart.o(i.UART_EnableDma) for UART_EnableDma + drv_uart_dma.o(i.UART_TransferReceiveDMA) refers to drv_dma.o(i.drv_dma_start_transfer) for drv_dma_start_transfer + drv_uart_dma.o(i.UART_TransferSendDMA) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_uart_dma.o(i.UART_TransferSendDMA) refers to drv_uart.o(i.UART_EnableDma) for UART_EnableDma + drv_uart_dma.o(i.UART_TransferSendDMA) refers to drv_dma.o(i.drv_dma_start_transfer) for drv_dma_start_transfer + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_wdg.o(i.drv_wdg_set_int) for drv_wdg_set_int + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_wdg.o(i.drv_wdg_clear_counter) for drv_wdg_clear_counter + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_wdg.o(i.drv_wdg_read_edge_flag) for drv_wdg_read_edge_flag + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_wdg.o(i.drv_wdg_clear_edge_flag) for drv_wdg_clear_edge_flag + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_wdg.o(.data) for .data + drv_wdg.o(i.drv_wdg_register_callback) refers to drv_wdg.o(.data) for .data + drv_wdg.o(i.drv_wdg_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_wdg.o(i.drv_wdg_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_wdg.o(i.drv_wdg_set_repeat) refers to drv_wdg.o(.data) for .data + ceil.o(i.__softfp_ceil) refers (Special) to iusefp.o(.text) for __I$use$fp + ceil.o(i.__softfp_ceil) refers to ceil.o(i.ceil) for ceil + ceil.o(i.ceil) refers (Special) to iusefp.o(.text) for __I$use$fp + ceil.o(i.ceil) refers to dadd.o(.text) for __aeabi_dadd + ceil.o(i.ceil) refers to cdrcmple.o(.text) for __aeabi_cdrcmple + sqrt.o(i.__softfp_sqrt) refers (Special) to iusefp.o(.text) for __I$use$fp + sqrt.o(i.__softfp_sqrt) refers to dsqrt.o(.text) for _dsqrt + sqrt.o(i.__softfp_sqrt) refers to errno.o(i.__set_errno) for __set_errno + sqrt.o(i.sqrt) refers (Special) to iusefp.o(.text) for __I$use$fp + sqrt.o(i.sqrt) refers to dsqrt.o(.text) for _dsqrt + sqrt.o(i.sqrt) refers to errno.o(i.__set_errno) for __set_errno + sqrt_x.o(i.____softfp_sqrt$lsc) refers (Special) to iusefp.o(.text) for __I$use$fp + sqrt_x.o(i.____softfp_sqrt$lsc) refers to cdcmple.o(.text) for __aeabi_cdcmple + sqrt_x.o(i.____softfp_sqrt$lsc) refers to errno.o(i.__set_errno) for __set_errno + sqrt_x.o(i.____softfp_sqrt$lsc) refers to dsqrt.o(.text) for _dsqrt + sqrt_x.o(i.__sqrt$lsc) refers (Special) to iusefp.o(.text) for __I$use$fp + sqrt_x.o(i.__sqrt$lsc) refers to cdcmple.o(.text) for __aeabi_cdcmple + sqrt_x.o(i.__sqrt$lsc) refers to errno.o(i.__set_errno) for __set_errno + sqrt_x.o(i.__sqrt$lsc) refers to dsqrt.o(.text) for _dsqrt + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry10a.o(.ARM.Collect$$$$0000000D) for __rt_final_cpp + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry11a.o(.ARM.Collect$$$$0000000F) for __rt_final_exit + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry7b.o(.ARM.Collect$$$$00000008) for _main_clock + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry8b.o(.ARM.Collect$$$$0000000A) for _main_cpp_init + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry9a.o(.ARM.Collect$$$$0000000B) for _main_init + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry5.o(.ARM.Collect$$$$00000004) for _main_scatterload + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry2.o(.ARM.Collect$$$$00000001) for _main_stk + idiv.o(.text) refers to uidiv.o(.text) for __aeabi_uidivmod + printfb.o(i.__0fprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0fprintf$bare) refers to tau_log.o(i.fputc) for fputc + printfb.o(i.__0printf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0printf$bare) refers to tau_log.o(i.fputc) for fputc + printfb.o(i.__0printf$bare) refers to stdout.o(.data) for __stdout + printfb.o(i.__0snprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0snprintf$bare) refers to printfb.o(i._snputc) for _snputc + printfb.o(i.__0sprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0sprintf$bare) refers to printfb.o(i._sputc) for _sputc + printfb.o(i.__0vfprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vfprintf$bare) refers to tau_log.o(i.fputc) for fputc + printfb.o(i.__0vprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vprintf$bare) refers to tau_log.o(i.fputc) for fputc + printfb.o(i.__0vprintf$bare) refers to stdout.o(.data) for __stdout + printfb.o(i.__0vsnprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vsnprintf$bare) refers to printfb.o(i._snputc) for _snputc + printfb.o(i.__0vsprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vsprintf$bare) refers to printfb.o(i._sputc) for _sputc + printf0.o(i.__0fprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0fprintf$0) refers to tau_log.o(i.fputc) for fputc + printf0.o(i.__0printf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0printf$0) refers to tau_log.o(i.fputc) for fputc + printf0.o(i.__0printf$0) refers to stdout.o(.data) for __stdout + printf0.o(i.__0snprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0snprintf$0) refers to printf0.o(i._snputc) for _snputc + printf0.o(i.__0sprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0sprintf$0) refers to printf0.o(i._sputc) for _sputc + printf0.o(i.__0vfprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vfprintf$0) refers to tau_log.o(i.fputc) for fputc + printf0.o(i.__0vprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vprintf$0) refers to tau_log.o(i.fputc) for fputc + printf0.o(i.__0vprintf$0) refers to stdout.o(.data) for __stdout + printf0.o(i.__0vsnprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vsnprintf$0) refers to printf0.o(i._snputc) for _snputc + printf0.o(i.__0vsprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vsprintf$0) refers to printf0.o(i._sputc) for _sputc + printf1.o(i.__0fprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0fprintf$1) refers to tau_log.o(i.fputc) for fputc + printf1.o(i.__0printf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0printf$1) refers to tau_log.o(i.fputc) for fputc + printf1.o(i.__0printf$1) refers to stdout.o(.data) for __stdout + printf1.o(i.__0snprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0snprintf$1) refers to printf1.o(i._snputc) for _snputc + printf1.o(i.__0sprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0sprintf$1) refers to printf1.o(i._sputc) for _sputc + printf1.o(i.__0vfprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vfprintf$1) refers to tau_log.o(i.fputc) for fputc + printf1.o(i.__0vprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vprintf$1) refers to tau_log.o(i.fputc) for fputc + printf1.o(i.__0vprintf$1) refers to stdout.o(.data) for __stdout + printf1.o(i.__0vsnprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vsnprintf$1) refers to printf1.o(i._snputc) for _snputc + printf1.o(i.__0vsprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vsprintf$1) refers to printf1.o(i._sputc) for _sputc + printf1.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printf2.o(i.__0fprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0fprintf$2) refers to tau_log.o(i.fputc) for fputc + printf2.o(i.__0printf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0printf$2) refers to tau_log.o(i.fputc) for fputc + printf2.o(i.__0printf$2) refers to stdout.o(.data) for __stdout + printf2.o(i.__0snprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0snprintf$2) refers to printf2.o(i._snputc) for _snputc + printf2.o(i.__0sprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0sprintf$2) refers to printf2.o(i._sputc) for _sputc + printf2.o(i.__0vfprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vfprintf$2) refers to tau_log.o(i.fputc) for fputc + printf2.o(i.__0vprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vprintf$2) refers to tau_log.o(i.fputc) for fputc + printf2.o(i.__0vprintf$2) refers to stdout.o(.data) for __stdout + printf2.o(i.__0vsnprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vsnprintf$2) refers to printf2.o(i._snputc) for _snputc + printf2.o(i.__0vsprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vsprintf$2) refers to printf2.o(i._sputc) for _sputc + printf3.o(i.__0fprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0fprintf$3) refers to tau_log.o(i.fputc) for fputc + printf3.o(i.__0printf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0printf$3) refers to tau_log.o(i.fputc) for fputc + printf3.o(i.__0printf$3) refers to stdout.o(.data) for __stdout + printf3.o(i.__0snprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0snprintf$3) refers to printf3.o(i._snputc) for _snputc + printf3.o(i.__0sprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0sprintf$3) refers to printf3.o(i._sputc) for _sputc + printf3.o(i.__0vfprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vfprintf$3) refers to tau_log.o(i.fputc) for fputc + printf3.o(i.__0vprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vprintf$3) refers to tau_log.o(i.fputc) for fputc + printf3.o(i.__0vprintf$3) refers to stdout.o(.data) for __stdout + printf3.o(i.__0vsnprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vsnprintf$3) refers to printf3.o(i._snputc) for _snputc + printf3.o(i.__0vsprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vsprintf$3) refers to printf3.o(i._sputc) for _sputc + printf3.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printf4.o(i.__0fprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0fprintf$4) refers to tau_log.o(i.fputc) for fputc + printf4.o(i.__0printf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0printf$4) refers to tau_log.o(i.fputc) for fputc + printf4.o(i.__0printf$4) refers to stdout.o(.data) for __stdout + printf4.o(i.__0snprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0snprintf$4) refers to printf4.o(i._snputc) for _snputc + printf4.o(i.__0sprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0sprintf$4) refers to printf4.o(i._sputc) for _sputc + printf4.o(i.__0vfprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vfprintf$4) refers to tau_log.o(i.fputc) for fputc + printf4.o(i.__0vprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vprintf$4) refers to tau_log.o(i.fputc) for fputc + printf4.o(i.__0vprintf$4) refers to stdout.o(.data) for __stdout + printf4.o(i.__0vsnprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vsnprintf$4) refers to printf4.o(i._snputc) for _snputc + printf4.o(i.__0vsprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vsprintf$4) refers to printf4.o(i._sputc) for _sputc + printf4.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printf5.o(i.__0fprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0fprintf$5) refers to tau_log.o(i.fputc) for fputc + printf5.o(i.__0printf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0printf$5) refers to tau_log.o(i.fputc) for fputc + printf5.o(i.__0printf$5) refers to stdout.o(.data) for __stdout + printf5.o(i.__0snprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0snprintf$5) refers to printf5.o(i._snputc) for _snputc + printf5.o(i.__0sprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0sprintf$5) refers to printf5.o(i._sputc) for _sputc + printf5.o(i.__0vfprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vfprintf$5) refers to tau_log.o(i.fputc) for fputc + printf5.o(i.__0vprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vprintf$5) refers to tau_log.o(i.fputc) for fputc + printf5.o(i.__0vprintf$5) refers to stdout.o(.data) for __stdout + printf5.o(i.__0vsnprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vsnprintf$5) refers to printf5.o(i._snputc) for _snputc + printf5.o(i.__0vsprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vsprintf$5) refers to printf5.o(i._sputc) for _sputc + printf5.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printf6.o(i.__0fprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0fprintf$6) refers to tau_log.o(i.fputc) for fputc + printf6.o(i.__0printf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0printf$6) refers to tau_log.o(i.fputc) for fputc + printf6.o(i.__0printf$6) refers to stdout.o(.data) for __stdout + printf6.o(i.__0snprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0snprintf$6) refers to printf6.o(i._snputc) for _snputc + printf6.o(i.__0sprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0sprintf$6) refers to printf6.o(i._sputc) for _sputc + printf6.o(i.__0vfprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vfprintf$6) refers to tau_log.o(i.fputc) for fputc + printf6.o(i.__0vprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vprintf$6) refers to tau_log.o(i.fputc) for fputc + printf6.o(i.__0vprintf$6) refers to stdout.o(.data) for __stdout + printf6.o(i.__0vsnprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vsnprintf$6) refers to printf6.o(i._snputc) for _snputc + printf6.o(i.__0vsprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vsprintf$6) refers to printf6.o(i._sputc) for _sputc + printf6.o(i._printf_core) refers to printf6.o(i._printf_pre_padding) for _printf_pre_padding + printf6.o(i._printf_core) refers to printf6.o(i._printf_post_padding) for _printf_post_padding + printf6.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printf7.o(i.__0fprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0fprintf$7) refers to tau_log.o(i.fputc) for fputc + printf7.o(i.__0printf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0printf$7) refers to tau_log.o(i.fputc) for fputc + printf7.o(i.__0printf$7) refers to stdout.o(.data) for __stdout + printf7.o(i.__0snprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0snprintf$7) refers to printf7.o(i._snputc) for _snputc + printf7.o(i.__0sprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0sprintf$7) refers to printf7.o(i._sputc) for _sputc + printf7.o(i.__0vfprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vfprintf$7) refers to tau_log.o(i.fputc) for fputc + printf7.o(i.__0vprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vprintf$7) refers to tau_log.o(i.fputc) for fputc + printf7.o(i.__0vprintf$7) refers to stdout.o(.data) for __stdout + printf7.o(i.__0vsnprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vsnprintf$7) refers to printf7.o(i._snputc) for _snputc + printf7.o(i.__0vsprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vsprintf$7) refers to printf7.o(i._sputc) for _sputc + printf7.o(i._printf_core) refers to printf7.o(i._printf_pre_padding) for _printf_pre_padding + printf7.o(i._printf_core) refers to printf7.o(i._printf_post_padding) for _printf_post_padding + printf7.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printf8.o(i.__0fprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0fprintf$8) refers to tau_log.o(i.fputc) for fputc + printf8.o(i.__0printf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0printf$8) refers to tau_log.o(i.fputc) for fputc + printf8.o(i.__0printf$8) refers to stdout.o(.data) for __stdout + printf8.o(i.__0snprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0snprintf$8) refers to printf8.o(i._snputc) for _snputc + printf8.o(i.__0sprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0sprintf$8) refers to printf8.o(i._sputc) for _sputc + printf8.o(i.__0vfprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vfprintf$8) refers to tau_log.o(i.fputc) for fputc + printf8.o(i.__0vprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vprintf$8) refers to tau_log.o(i.fputc) for fputc + printf8.o(i.__0vprintf$8) refers to stdout.o(.data) for __stdout + printf8.o(i.__0vsnprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vsnprintf$8) refers to printf8.o(i._snputc) for _snputc + printf8.o(i.__0vsprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vsprintf$8) refers to printf8.o(i._sputc) for _sputc + printf8.o(i._printf_core) refers to printf8.o(i._printf_pre_padding) for _printf_pre_padding + printf8.o(i._printf_core) refers to printf8.o(i._printf_post_padding) for _printf_post_padding + printf8.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printfa.o(i.__0fprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0fprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0fprintf) refers to tau_log.o(i.fputc) for fputc + printfa.o(i.__0printf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0printf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0printf) refers to tau_log.o(i.fputc) for fputc + printfa.o(i.__0printf) refers to stdout.o(.data) for __stdout + printfa.o(i.__0snprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0snprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0snprintf) refers to printfa.o(i._snputc) for _snputc + printfa.o(i.__0sprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0sprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0sprintf) refers to printfa.o(i._sputc) for _sputc + printfa.o(i.__0vfprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vfprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vfprintf) refers to tau_log.o(i.fputc) for fputc + printfa.o(i.__0vprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vprintf) refers to tau_log.o(i.fputc) for fputc + printfa.o(i.__0vprintf) refers to stdout.o(.data) for __stdout + printfa.o(i.__0vsnprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vsnprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vsnprintf) refers to printfa.o(i._snputc) for _snputc + printfa.o(i.__0vsprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vsprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vsprintf) refers to printfa.o(i._sputc) for _sputc + printfa.o(i._fp_digits) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._fp_digits) refers to dmul.o(.text) for __aeabi_dmul + printfa.o(i._fp_digits) refers to ddiv.o(.text) for __aeabi_ddiv + printfa.o(i._fp_digits) refers to cdrcmple.o(.text) for __aeabi_cdrcmple + printfa.o(i._fp_digits) refers to dadd.o(.text) for __aeabi_dadd + printfa.o(i._fp_digits) refers to dfixul.o(.text) for __aeabi_d2ulz + printfa.o(i._fp_digits) refers to uldiv.o(.text) for __aeabi_uldivmod + printfa.o(i._printf_core) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._printf_core) refers to printfa.o(i._printf_pre_padding) for _printf_pre_padding + printfa.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printfa.o(i._printf_core) refers to printfa.o(i._printf_post_padding) for _printf_post_padding + printfa.o(i._printf_core) refers to printfa.o(i._fp_digits) for _fp_digits + printfa.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printfa.o(i._printf_post_padding) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._printf_pre_padding) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._snputc) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._sputc) refers (Special) to iusefp.o(.text) for __I$use$fp + fadd.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + fadd.o(.text) refers to fepilogue.o(.text) for _float_epilogue + fmul.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + fdiv.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + fdiv.o(.text) refers to fepilogue.o(.text) for _float_round + fscalb.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dadd.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dadd.o(.text) refers to llshl.o(.text) for __aeabi_llsl + dadd.o(.text) refers to llsshr.o(.text) for __aeabi_lasr + dadd.o(.text) refers to depilogue.o(.text) for _double_epilogue + dmul.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dmul.o(.text) refers to depilogue.o(.text) for _double_epilogue + ddiv.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + ddiv.o(.text) refers to depilogue.o(.text) for _double_round + fflti.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + fflti.o(.text) refers to fepilogue.o(.text) for _float_epilogue + ffltui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + ffltui.o(.text) refers to fepilogue.o(.text) for _float_epilogue + dflti.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dflti.o(.text) refers to depilogue.o(.text) for _double_epilogue + dfltui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dfltui.o(.text) refers to depilogue.o(.text) for _double_epilogue + ffixi.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + ffixui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dfixi.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dfixi.o(.text) refers to llushr.o(.text) for __aeabi_llsr + dfixui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dfixui.o(.text) refers to llushr.o(.text) for __aeabi_llsr + f2d.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + cdcmple.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + cfrcmple.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + entry2.o(.ARM.Collect$$$$00000001) refers to entry2.o(.ARM.Collect$$$$00002712) for __lit__00000000 + entry2.o(.ARM.Collect$$$$00002712) refers to startup_armcm0.o(STACK) for __initial_sp + entry2.o(__vectab_stack_and_reset_area) refers to startup_armcm0.o(STACK) for __initial_sp + entry2.o(__vectab_stack_and_reset_area) refers to entry.o(.ARM.Collect$$$$00000000) for __main + entry5.o(.ARM.Collect$$$$00000004) refers to init.o(.text) for __scatterload + entry9a.o(.ARM.Collect$$$$0000000B) refers to main.o(i.main) for main + entry9b.o(.ARM.Collect$$$$0000000C) refers to main.o(i.main) for main + uldiv.o(.text) refers to llushr.o(.text) for __aeabi_llsr + uldiv.o(.text) refers to llshl.o(.text) for __aeabi_llsl + errno.o(i.__aeabi_errno_addr) refers to errno.o(.data) for .data + errno.o(i.__read_errno) refers to errno.o(.data) for .data + errno.o(i.__set_errno) refers to errno.o(.data) for .data + depilogue.o(.text) refers to depilogue.o(i.__ARM_clz) for __ARM_clz + depilogue.o(.text) refers to llshl.o(.text) for __aeabi_llsl + depilogue.o(.text) refers to llushr.o(.text) for __aeabi_llsr + dsqrt.o(.text) refers to llushr.o(.text) for __aeabi_llsr + dsqrt.o(.text) refers to depilogue.o(.text) for _double_round + dfixul.o(.text) refers to llushr.o(.text) for __aeabi_llsr + dfixul.o(.text) refers to llshl.o(.text) for __aeabi_llsl + init.o(.text) refers to entry5.o(.ARM.Collect$$$$00000004) for __main_after_scatterload + + +============================================================================== + +Removing Unused input sections from the image. + + Removing main.o(.rev16_text), (4 bytes). + Removing main.o(.revsh_text), (4 bytes). + Removing ap_demo.o(.rev16_text), (4 bytes). + Removing ap_demo.o(.revsh_text), (4 bytes). + Removing ap_demo.o(.data), (1 bytes). + Removing ap_demo.o(.data), (4 bytes). + Removing app_tp_transfer.o(.rev16_text), (4 bytes). + Removing app_tp_transfer.o(.revsh_text), (4 bytes). + Removing app_tp_transfer.o(i.app_tp_m_transfer_complate), (8 bytes). + Removing app_tp_transfer.o(i.app_tp_phone_reset_on), (12 bytes). + Removing app_tp_transfer.o(i.app_tp_s_transfer_complate), (26 bytes). + Removing app_tp_transfer.o(.data), (3 bytes). + Removing app_tp_transfer.o(.data), (3 bytes). + Removing app_tp_transfer.o(.data), (5 bytes). + Removing app_tp_transfer.o(.data), (6 bytes). + Removing app_tp_transfer.o(.data), (2 bytes). + Removing app_tp_transfer.o(.data), (3 bytes). + Removing app_tp_transfer.o(.data), (1 bytes). + Removing app_tp_transfer.o(.data), (2 bytes). + Removing app_tp_transfer.o(.data), (2 bytes). + Removing app_tp_st_touch.o(.rev16_text), (4 bytes). + Removing app_tp_st_touch.o(.revsh_text), (4 bytes). + Removing app_tp_st_touch.o(i.CRC16_2), (64 bytes). + Removing app_tp_st_touch.o(i.ap_set_tp_calibration_04), (152 bytes). + Removing app_tp_st_touch.o(i.ap_tp_st_touch_hardware_reset), (136 bytes). + Removing app_tp_st_touch.o(.constdata), (32 bytes). + Removing board.o(.rev16_text), (4 bytes). + Removing board.o(.revsh_text), (4 bytes). + Removing startup_armcm0.o(HEAP), (3072 bytes). + Removing hal_dsi_rx_ctrl.o(.rev16_text), (4 bytes). + Removing hal_dsi_rx_ctrl.o(.revsh_text), (4 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_ack_long_cmd), (88 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_ack_short_cmd), (28 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video), (228 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_mode_init), (48 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern), (216 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_compressen_en), (16 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_release_handle), (40 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart), (80 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_auto_hw_filter), (28 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk), (44 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter), (108 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_dcs_direct_mode), (8 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_cmd_filter), (40 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pentile_format), (56 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data), (148 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rect_pixel_data), (268 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk), (68 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_te_waveform), (52 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate), (10 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution_ex), (32 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_register_write_cmd_entry), (110 bytes). + Removing hal_dsi_tx_ctrl.o(.rev16_text), (4 bytes). + Removing hal_dsi_tx_ctrl.o(.revsh_text), (4 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic), (148 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_cmd_mode_rcv_te), (10 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard), (280 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker), (172 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_mode_init), (30 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_ulps_mode), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_ulps_mode), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd), (140 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_release_handle), (28 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_cus_pq_filter), (28 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_endianness), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_escape_clock_div), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_lp_cmd), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data), (272 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg), (80 bytes). + Removing hal_gpio.o(.rev16_text), (4 bytes). + Removing hal_gpio.o(.revsh_text), (4 bytes). + Removing hal_gpio.o(i.hal_gpio_get_int_type), (20 bytes). + Removing hal_gpio.o(i.hal_gpio_get_pull_state), (32 bytes). + Removing hal_gpio.o(i.hal_gpio_set_driving_strength), (32 bytes). + Removing hal_gpio.o(i.hal_gpio_set_output_data_ex), (36 bytes). + Removing hal_gpio.o(i.hal_gpio_set_schmitt_trigger), (32 bytes). + Removing hal_gpio.o(i.hal_gpio_set_slew_rate), (32 bytes). + Removing hal_i2c_master.o(.rev16_text), (4 bytes). + Removing hal_i2c_master.o(.revsh_text), (4 bytes). + Removing hal_i2c_master.o(i.hal_i2c_m_deinit), (8 bytes). + Removing hal_i2c_master.o(i.hal_i2c_m_set_high_impedance), (46 bytes). + Removing hal_i2c_slave.o(.rev16_text), (4 bytes). + Removing hal_i2c_slave.o(.revsh_text), (4 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_deinit), (88 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_get_tx_byte_num), (12 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_read_complate), (12 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_read_complate_clear), (12 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_read_data), (32 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_rxfifo_notempty), (40 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_sel), (12 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_set_dma_tx_cycle), (36 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_set_high_impedance), (88 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_write_complate), (12 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_write_data), (32 bytes). + Removing hal_spi_master.o(.rev16_text), (4 bytes). + Removing hal_spi_master.o(.revsh_text), (4 bytes). + Removing hal_spi_master.o(i.hal_spi_m_callback), (24 bytes). + Removing hal_spi_master.o(i.hal_spi_m_deinit), (10 bytes). + Removing hal_spi_master.o(i.hal_spi_m_dma_init), (104 bytes). + Removing hal_spi_master.o(i.hal_spi_m_dma_read), (36 bytes). + Removing hal_spi_master.o(i.hal_spi_m_dma_write), (40 bytes). + Removing hal_spi_master.o(i.hal_spi_m_get_transfer_complate), (36 bytes). + Removing hal_spi_master.o(i.hal_spi_m_gpio_init), (8 bytes). + Removing hal_spi_master.o(i.hal_spi_m_read_rxfifo), (28 bytes). + Removing hal_spi_master.o(i.hal_spi_m_set_high_impedance), (100 bytes). + Removing hal_spi_master.o(.data), (1 bytes). + Removing hal_swire.o(.rev16_text), (4 bytes). + Removing hal_swire.o(.revsh_text), (4 bytes). + Removing hal_swire.o(i.hal_swire_deinit), (18 bytes). + Removing hal_swire.o(i.hal_swire_init), (32 bytes). + Removing hal_swire.o(i.hal_swire_register_callback), (10 bytes). + Removing hal_swire.o(i.hal_swire_start), (108 bytes). + Removing hal_system.o(.rev16_text), (4 bytes). + Removing hal_system.o(.revsh_text), (4 bytes). + Removing hal_system.o(i.hal_system_clear_debug_state), (10 bytes). + Removing hal_system.o(i.hal_system_deep_sleep_mode), (8 bytes). + Removing hal_system.o(i.hal_system_disable_systick), (8 bytes). + Removing hal_system.o(i.hal_system_get_debug_state), (8 bytes). + Removing hal_system.o(i.hal_system_get_tick), (8 bytes). + Removing hal_system.o(i.hal_system_idle_mode), (8 bytes). + Removing hal_system.o(i.hal_system_register_systick_cb), (8 bytes). + Removing hal_system.o(i.hal_system_reset_chip), (32 bytes). + Removing hal_system.o(i.hal_system_share_flash_mode), (20 bytes). + Removing hal_system.o(i.hal_system_sleep_mode), (48 bytes). + Removing hal_timer.o(.rev16_text), (4 bytes). + Removing hal_timer.o(.revsh_text), (4 bytes). + Removing hal_timer.o(i.hal_timer_deinit), (46 bytes). + Removing hal_timer.o(i.hal_timer_get_status), (8 bytes). + Removing hal_timer.o(i.hal_timer_set_repeat), (8 bytes). + Removing hal_timer.o(i.hal_timer_start_ex), (72 bytes). + Removing tau_delay.o(.rev16_text), (4 bytes). + Removing tau_delay.o(.revsh_text), (4 bytes). + Removing app_tp_for_custom_s8.o(.rev16_text), (4 bytes). + Removing app_tp_for_custom_s8.o(.revsh_text), (4 bytes). + Removing app_tp_for_custom_s8.o(i.app_tp_screen_analysis_const), (56 bytes). + Removing app_tp_for_custom_s8.o(.bss), (200 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (37 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (1 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (3 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (3 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (1 bytes). + Removing app_tp_for_custom_s8.o(.data), (11 bytes). + Removing app_tp_for_custom_s8.o(.data), (10 bytes). + Removing app_tp_for_custom_s8.o(.data), (1 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (1 bytes). + Removing app_tp_for_custom_s8.o(.data), (1 bytes). + Removing app_tp_for_custom_s8.o(.data), (64 bytes). + Removing app_tp_for_custom_s8.o(.data), (3 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (1 bytes). + Removing app_tp_for_custom_s8.o(.data), (32 bytes). + Removing app_tp_for_custom_s8.o(.data), (1 bytes). + Removing hal_uart.o(.rev16_text), (4 bytes). + Removing hal_uart.o(.revsh_text), (4 bytes). + Removing hal_uart.o(i.hal_uart_deinit), (28 bytes). + Removing hal_uart.o(i.hal_uart_dmacallback), (36 bytes). + Removing hal_uart.o(i.hal_uart_receive_blocking), (16 bytes). + Removing hal_uart.o(i.hal_uart_receive_dma), (76 bytes). + Removing hal_uart.o(i.hal_uart_transmit_dma), (76 bytes). + Removing hal_internal_vsync.o(.rev16_text), (4 bytes). + Removing hal_internal_vsync.o(.revsh_text), (4 bytes). + Removing hal_internal_vsync.o(i.hal_internal_sync_cmd_mode_rcv_te), (168 bytes). + Removing hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex), (468 bytes). + Removing hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual), (528 bytes). + Removing hal_internal_vsync.o(i.hal_internal_vsync_register_write_cmd_entry), (12 bytes). + Removing hal_internal_vsync.o(i.hal_internal_vsync_set_dcs_direct_mode), (48 bytes). + Removing hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate), (680 bytes). + Removing hal_internal_vsync.o(i.hal_internal_vsync_update_lcdc_addr), (48 bytes). + Removing hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler), (476 bytes). + Removing drv_common.o(.rev16_text), (4 bytes). + Removing drv_common.o(.revsh_text), (4 bytes). + Removing drv_common.o(i.drv_common_disable_systick), (20 bytes). + Removing drv_common.o(i.drv_common_get_tick), (12 bytes). + Removing drv_common.o(i.drv_common_idle_mode), (40 bytes). + Removing drv_common.o(i.drv_common_systick_register_cb), (12 bytes). + Removing drv_crgu.o(.rev16_text), (4 bytes). + Removing drv_crgu.o(.revsh_text), (4 bytes). + Removing drv_crgu.o(i.drv_crgu_clear_all_reset_flags), (12 bytes). + Removing drv_crgu.o(i.drv_crgu_clear_reset_flag), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_config_clocks), (16 bytes). + Removing drv_crgu.o(i.drv_crgu_config_clocks_div), (16 bytes). + Removing drv_crgu.o(i.drv_crgu_config_clocks_src), (16 bytes). + Removing drv_crgu.o(i.drv_crgu_get_ana_clk_status), (24 bytes). + Removing drv_crgu.o(i.drv_crgu_get_clocks), (12 bytes). + Removing drv_crgu.o(i.drv_crgu_get_fpga_id), (12 bytes). + Removing drv_crgu.o(i.drv_crgu_get_mipi_ref_src), (16 bytes). + Removing drv_crgu.o(i.drv_crgu_get_reset_flag), (24 bytes). + Removing drv_crgu.o(i.drv_crgu_get_system_clk), (28 bytes). + Removing drv_crgu.o(i.drv_crgu_reset_chip), (12 bytes). + Removing drv_crgu.o(i.drv_crgu_set_200m_scan_src), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_300m_scan_src), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_abp0_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_adc_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_adc_src), (24 bytes). + Removing drv_crgu.o(i.drv_crgu_set_apb1_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_apb2_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_fls_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_fls_src), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_monitor_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_monitor_src), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_swire_div), (20 bytes). + Removing drv_dma.o(.rev16_text), (4 bytes). + Removing drv_dma.o(.revsh_text), (4 bytes). + Removing drv_dma.o(i.drv_dma_abort_transfer), (32 bytes). + Removing drv_dma.o(i.drv_dma_ahb_init), (74 bytes). + Removing drv_dma.o(i.drv_dma_channel_is_active), (20 bytes). + Removing drv_dma.o(i.drv_dma_deinit), (32 bytes). + Removing drv_dma.o(i.drv_dma_disenable_channel_interrupts), (24 bytes). + Removing drv_dma.o(i.drv_dma_enable_cycle), (44 bytes). + Removing drv_dma.o(i.drv_dma_get_remaining_bytes), (32 bytes). + Removing drv_dma.o(i.drv_dma_init), (24 bytes). + Removing drv_dma.o(i.drv_dma_m2m_init), (72 bytes). + Removing drv_dma.o(i.drv_dma_reset), (10 bytes). + Removing drv_dma.o(i.drv_dma_set_ccr), (114 bytes). + Removing drv_dma.o(i.drv_dma_start_transfer), (32 bytes). + Removing drv_fls.o(.rev16_text), (4 bytes). + Removing drv_fls.o(.revsh_text), (4 bytes). + Removing drv_fls.o(i.__NVIC_DisableIRQ), (32 bytes). + Removing drv_fls.o(i.drv_fls_gpio_connect), (28 bytes). + Removing drv_fls.o(i.drv_fls_gpio_disconnect), (32 bytes). + Removing drv_fls.o(i.fls_EnableClk), (12 bytes). + Removing drv_fls.o(i.fls_busy_pending), (12 bytes). + Removing drv_fls.o(i.fls_clear_irq_status), (6 bytes). + Removing drv_fls.o(i.fls_ctrl_cfg_init), (72 bytes). + Removing drv_fls.o(i.fls_ddat_enable), (24 bytes). + Removing drv_fls.o(i.fls_de_init), (52 bytes). + Removing drv_fls.o(i.fls_descr), (10 bytes). + Removing drv_fls.o(i.fls_disable_it), (36 bytes). + Removing drv_fls.o(i.fls_en_scr), (10 bytes). + Removing drv_fls.o(i.fls_enable_it), (48 bytes). + Removing drv_fls.o(i.fls_get_crcout), (4 bytes). + Removing drv_fls.o(i.fls_get_default_fls_config), (20 bytes). + Removing drv_fls.o(i.fls_get_default_spi_config), (44 bytes). + Removing drv_fls.o(i.fls_get_default_tuning), (12 bytes). + Removing drv_fls.o(i.fls_get_tuning), (18 bytes). + Removing drv_fls.o(i.fls_init), (62 bytes). + Removing drv_fls.o(i.fls_qadr_enable), (22 bytes). + Removing drv_fls.o(i.fls_qcmd_enable), (22 bytes). + Removing drv_fls.o(i.fls_qdat_enable), (22 bytes). + Removing drv_fls.o(i.fls_read_byte_data), (130 bytes). + Removing drv_fls.o(i.fls_read_cmd), (104 bytes). + Removing drv_fls.o(i.fls_read_cmd_it), (110 bytes). + Removing drv_fls.o(i.fls_reset_crc), (18 bytes). + Removing drv_fls.o(i.fls_scr_clear), (10 bytes). + Removing drv_fls.o(i.fls_set_addr_dummy), (32 bytes). + Removing drv_fls.o(i.fls_set_addr_len), (32 bytes). + Removing drv_fls.o(i.fls_set_mc_irq_mask), (26 bytes). + Removing drv_fls.o(i.fls_set_read), (10 bytes). + Removing drv_fls.o(i.fls_set_tuning), (24 bytes). + Removing drv_fls.o(i.fls_set_write), (10 bytes). + Removing drv_fls.o(i.fls_single_mode), (16 bytes). + Removing drv_fls.o(i.fls_spi_init), (180 bytes). + Removing drv_fls.o(i.fls_spi_start), (10 bytes). + Removing drv_fls.o(i.fls_swrst), (18 bytes). + Removing drv_fls.o(i.fls_write_byte_data), (164 bytes). + Removing drv_fls.o(i.fls_write_cmd), (58 bytes). + Removing drv_fls.o(.data), (4 bytes). + Removing drv_gpio.o(.rev16_text), (4 bytes). + Removing drv_gpio.o(.revsh_text), (4 bytes). + Removing drv_gpio.o(i.drv_gpio_get_pull_state), (224 bytes). + Removing drv_gpio.o(i.drv_gpio_set_driving_strength), (312 bytes). + Removing drv_gpio.o(i.drv_gpio_set_schmitt_trigger), (168 bytes). + Removing drv_gpio.o(i.drv_gpio_set_slew_rate), (168 bytes). + Removing drv_i2c_dma.o(.rev16_text), (4 bytes). + Removing drv_i2c_dma.o(.revsh_text), (4 bytes). + Removing drv_i2c_master.o(.rev16_text), (4 bytes). + Removing drv_i2c_master.o(.revsh_text), (4 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_bus_init), (36 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_deinit), (44 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_disable_intr), (16 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_get_fifo_status), (28 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_read_data), (32 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_set_fifo_threshold), (24 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_set_sys_mask), (48 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_write_data), (32 bytes). + Removing drv_i2c_slave.o(.rev16_text), (4 bytes). + Removing drv_i2c_slave.o(.revsh_text), (4 bytes). + Removing drv_i2c_slave.o(i.drv_i2c_s_read_data), (30 bytes). + Removing drv_i2c_slave.o(i.drv_i2c_s_set_fifo_threshold), (16 bytes). + Removing drv_param_init.o(.rev16_text), (4 bytes). + Removing drv_param_init.o(.revsh_text), (4 bytes). + Removing drv_param_init.o(i.drv_param_init_set_scld_filter), (100 bytes). + Removing drv_param_init.o(i.drv_param_init_set_sclu_filter), (28 bytes). + Removing drv_pwr.o(.rev16_text), (4 bytes). + Removing drv_pwr.o(.revsh_text), (4 bytes). + Removing drv_pwr.o(i.drv_pwr_enter_deep_sleep_mode), (44 bytes). + Removing drv_pwr.o(i.drv_pwr_set_frame_buff_pd), (28 bytes). + Removing drv_spi_dma.o(.rev16_text), (4 bytes). + Removing drv_spi_dma.o(.revsh_text), (4 bytes). + Removing drv_spi_dma.o(i.__NVIC_ClearPendingIRQ), (24 bytes). + Removing drv_spi_dma.o(i.drv_spi_abort_dma), (108 bytes). + Removing drv_spi_dma.o(i.drv_spi_dma_callback), (60 bytes). + Removing drv_spi_dma.o(i.drv_spi_dma_ch6_init), (208 bytes). + Removing drv_spi_dma.o(i.drv_spi_dma_init), (220 bytes). + Removing drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback), (48 bytes). + Removing drv_spi_dma.o(i.drv_spi_set_dma_irq_callback), (88 bytes). + Removing drv_spi_dma.o(i.drv_spim_dma_read), (96 bytes). + Removing drv_spi_dma.o(i.drv_spim_dma_write), (60 bytes). + Removing drv_spi_dma.o(i.drv_spis_dma_write), (72 bytes). + Removing drv_spi_dma.o(.bss), (480 bytes). + Removing drv_spi_dma.o(.data), (16 bytes). + Removing drv_spi_master.o(.rev16_text), (4 bytes). + Removing drv_spi_master.o(.revsh_text), (4 bytes). + Removing drv_spi_master.o(i.drv_spi_m_deinit), (40 bytes). + Removing drv_spi_master.o(i.drv_spi_m_disable_int), (68 bytes). + Removing drv_spi_master.o(i.drv_spi_m_enable_int), (72 bytes). + Removing drv_spi_master.o(i.drv_spi_m_enable_rx_dma), (32 bytes). + Removing drv_spi_master.o(i.drv_spi_m_enable_tx_dma), (28 bytes). + Removing drv_spi_master.o(i.drv_spi_m_get_dma_address), (8 bytes). + Removing drv_spi_master.o(i.drv_spi_m_gpio_init), (32 bytes). + Removing drv_spi_master.o(i.drv_spi_m_set_intr_callback), (12 bytes). + Removing drv_spi_master.o(i.drv_spi_m_switch_sclk), (28 bytes). + Removing drv_spi_master.o(i.drv_spi_m_write_data), (44 bytes). + Removing drv_spi_master.o(i.drv_spi_master_init), (164 bytes). + Removing drv_swire.o(.rev16_text), (4 bytes). + Removing drv_swire.o(.revsh_text), (4 bytes). + Removing drv_swire.o(i.drv_swire_enable), (28 bytes). + Removing drv_swire.o(i.drv_swire_register_callback), (12 bytes). + Removing drv_swire.o(i.drv_swire_set_bit_time), (24 bytes). + Removing drv_swire.o(i.drv_swire_set_pulse_count), (12 bytes). + Removing drv_sys_cfg.o(.rev16_text), (4 bytes). + Removing drv_sys_cfg.o(.revsh_text), (4 bytes). + Removing drv_sys_cfg.o(i.drv_sys_cfg_dma_req_mask), (32 bytes). + Removing drv_sys_cfg.o(i.drv_sys_cfg_read_version0_id), (12 bytes). + Removing drv_sys_cfg.o(i.drv_sys_cfg_set_ap_reset), (28 bytes). + Removing drv_timer.o(.rev16_text), (4 bytes). + Removing drv_timer.o(.revsh_text), (4 bytes). + Removing drv_timer.o(i.drv_timer_get_status), (38 bytes). + Removing drv_timer.o(i.drv_timer_set_repeat), (16 bytes). + Removing dcs_packet_fifo.o(i.dcs_packet_get_fifo_size), (16 bytes). + Removing drv_dsi_rx.o(.rev16_text), (4 bytes). + Removing drv_dsi_rx.o(.revsh_text), (4 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_get_phy_stopstate), (66 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_get_version), (4 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_phy_resistor_calibration), (236 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_pg_cfg), (32 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_pg_cfg), (48 bytes). + Removing drv_dsi_rx.o(i.drv_rx_phy_test_read), (12 bytes). + Removing drv_dsi_tx.o(.rev16_text), (4 bytes). + Removing drv_dsi_tx.o(.revsh_text), (4 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_command_get_payload), (4 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_force_interrupt), (8 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_get_phy_status), (6 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_forcepll), (12 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_resistor_calibration), (232 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_start), (18 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_status_pll_lock), (10 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ulpsactivenot), (62 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_trigger), (92 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter), (344 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit), (276 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_sdf_3d), (28 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_set_bta), (22 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_set_vpg), (70 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_version), (4 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_vid_shadow), (16 bytes). + Removing drv_dsi_tx.o(i.drv_tx_phy_test_read), (10 bytes). + Removing drv_lcdc.o(.rev16_text), (4 bytes). + Removing drv_lcdc.o(.revsh_text), (4 bytes). + Removing drv_lcdc.o(i.drv_lcdc_config_rgb_to_pentile), (6 bytes). + Removing drv_lcdc.o(i.drv_lcdc_enable), (42 bytes). + Removing drv_lcdc.o(i.drv_lcdc_update_shadow_reg), (12 bytes). + Removing drv_memc.o(.rev16_text), (4 bytes). + Removing drv_memc.o(.revsh_text), (4 bytes). + Removing drv_memc.o(i.drv_memc_set_db_frm_time), (14 bytes). + Removing drv_memc.o(i.drv_memc_set_db_int_frame), (28 bytes). + Removing drv_memc.o(i.drv_memc_set_fb_remaining_line_trigger), (12 bytes). + Removing drv_memc.o(i.drv_memc_set_read_trigger_line), (16 bytes). + Removing drv_memc.o(i.drv_memc_set_te_ind), (16 bytes). + Removing drv_memc.o(i.drv_memc_set_tear_hwclr), (16 bytes). + Removing drv_memc.o(i.drv_memc_set_vidc_fb_arb), (14 bytes). + Removing drv_memc.o(i.drv_memc_set_write_trigger_line), (16 bytes). + Removing drv_rxbr.o(.rev16_text), (4 bytes). + Removing drv_rxbr.o(.revsh_text), (4 bytes). + Removing drv_rxbr.o(i.drv_rxbr_dsc_flush), (16 bytes). + Removing drv_rxbr.o(i.drv_rxbr_get_cur_hline_rcv_cnt), (8 bytes). + Removing drv_rxbr.o(i.drv_rxbr_get_ipi_vsync_interval), (8 bytes). + Removing drv_rxbr.o(i.drv_rxbr_get_pix_fmt), (8 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_col_addr), (4 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_compress), (24 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_page_addr), (4 bytes). + Removing drv_rxbr.o(i.drv_rxbr_soft_reset), (98 bytes). + Removing drv_vidc.o(.rev16_text), (4 bytes). + Removing drv_vidc.o(.revsh_text), (4 bytes). + Removing drv_vidc.o(i.drv_vidc_clear_status0), (14 bytes). + Removing drv_vidc.o(i.drv_vidc_debug_cap_pixel), (24 bytes). + Removing drv_vidc.o(i.drv_vidc_debug_signal_frame), (30 bytes). + Removing drv_vidc.o(i.drv_vidc_get_int_source), (38 bytes). + Removing drv_vidc.o(i.drv_vidc_get_status0), (20 bytes). + Removing drv_vidc.o(i.drv_vidc_get_status1), (20 bytes). + Removing drv_vidc.o(i.drv_vidc_get_status2), (6 bytes). + Removing drv_vidc.o(i.drv_vidc_set_dsc_thresh), (4 bytes). + Removing drv_vidc.o(i.drv_vidc_set_frmst_latency), (12 bytes). + Removing drv_vidc.o(i.drv_vidc_set_inff_thresh), (4 bytes). + Removing drv_vidc.o(i.drv_vidc_set_irq_line), (20 bytes). + Removing drv_vidc.o(i.drv_vidc_set_module_enable), (20 bytes). + Removing drv_vidc.o(i.drv_vidc_set_outff_thresh), (4 bytes). + Removing drv_vidc.o(i.drv_vidc_update_src_format), (14 bytes). + Removing irq_redirect .o(.rev16_text), (4 bytes). + Removing irq_redirect .o(.revsh_text), (4 bytes). + Removing drv_efuse.o(.rev16_text), (4 bytes). + Removing drv_efuse.o(.revsh_text), (4 bytes). + Removing drv_efuse.o(i.drv_efuse_crc_cal), (128 bytes). + Removing drv_efuse.o(i.drv_efuse_get_default_config), (26 bytes). + Removing drv_efuse.o(i.drv_efuse_int_disable), (12 bytes). + Removing drv_efuse.o(i.drv_efuse_write), (46 bytes). + Removing drv_efuse.o(i.drv_efuse_write_req), (22 bytes). + Removing drv_phy_common.o(.rev16_text), (4 bytes). + Removing drv_phy_common.o(.revsh_text), (4 bytes). + Removing drv_phy_common.o(i.drv_phy_test_read), (8 bytes). + Removing drv_chip_info.o(.rev16_text), (4 bytes). + Removing drv_chip_info.o(.revsh_text), (4 bytes). + Removing drv_dsc_dec.o(.rev16_text), (4 bytes). + Removing drv_dsc_dec.o(.revsh_text), (4 bytes). + Removing drv_dsc_dec.o(i.drv_dsc_dec_set_u32_pps), (120 bytes). + Removing tau_log.o(.rev16_text), (4 bytes). + Removing tau_log.o(.revsh_text), (4 bytes). + Removing tau_log.o(i.fgetc), (22 bytes). + Removing app_tp_enc.o(.rev16_text), (4 bytes). + Removing app_tp_enc.o(.revsh_text), (4 bytes). + Removing hal_spi_slave.o(.rev16_text), (4 bytes). + Removing hal_spi_slave.o(.revsh_text), (4 bytes). + Removing hal_spi_slave.o(i.hal_spi_s_set_high_impedance), (100 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_auto_transfer_abort), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_auto_transfer_start), (56 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_busy), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_deinit), (10 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_disable), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_enable), (96 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_flush_fifo), (20 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_get_rxfifo_notempty), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_gpio_init), (8 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_init), (76 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_read_data), (10 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_register_callback), (12 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_reset_tx), (68 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_set_auto_rx_buffer), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_set_auto_tx_buffer), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_write_data), (14 bytes). + Removing norflash.o(.rev16_text), (4 bytes). + Removing norflash.o(.revsh_text), (4 bytes). + Removing norflash.o(i.norflash_best_cfg_init), (44 bytes). + Removing norflash.o(i.norflash_big_end_clear), (14 bytes). + Removing norflash.o(i.norflash_big_end_enable), (20 bytes). + Removing norflash.o(i.norflash_check_crc32), (14 bytes). + Removing norflash.o(i.norflash_check_id), (72 bytes). + Removing norflash.o(i.norflash_dma_callback), (24 bytes). + Removing norflash.o(i.norflash_dma_read), (156 bytes). + Removing norflash.o(i.norflash_dma_write), (252 bytes). + Removing norflash.o(i.norflash_dual_read), (60 bytes). + Removing norflash.o(i.norflash_dual_write), (112 bytes). + Removing norflash.o(i.norflash_en4b), (40 bytes). + Removing norflash.o(i.norflash_en_quad), (116 bytes). + Removing norflash.o(i.norflash_en_quad_check), (64 bytes). + Removing norflash.o(i.norflash_erase_block), (44 bytes). + Removing norflash.o(i.norflash_erase_chip), (28 bytes). + Removing norflash.o(i.norflash_erase_sector), (44 bytes). + Removing norflash.o(i.norflash_ex4b), (40 bytes). + Removing norflash.o(i.norflash_exit_quad), (76 bytes). + Removing norflash.o(i.norflash_get_dual_hstatus), (52 bytes). + Removing norflash.o(i.norflash_get_hstatus), (52 bytes). + Removing norflash.o(i.norflash_get_status), (52 bytes). + Removing norflash.o(i.norflash_init), (48 bytes). + Removing norflash.o(i.norflash_quad_read), (76 bytes). + Removing norflash.o(i.norflash_quad_write), (108 bytes). + Removing norflash.o(i.norflash_read), (28 bytes). + Removing norflash.o(i.norflash_read_config_reg), (36 bytes). + Removing norflash.o(i.norflash_read_id), (20 bytes). + Removing norflash.o(i.norflash_read_uid), (52 bytes). + Removing norflash.o(i.norflash_reset), (2 bytes). + Removing norflash.o(i.norflash_reset_crc32), (32 bytes). + Removing norflash.o(i.norflash_set_best_cfg), (50 bytes). + Removing norflash.o(i.norflash_set_best_read_cfg), (84 bytes). + Removing norflash.o(i.norflash_set_best_write_cfg), (84 bytes). + Removing norflash.o(i.norflash_switch_fls_spi), (112 bytes). + Removing norflash.o(i.norflash_write), (96 bytes). + Removing norflash.o(i.norflash_write_disable), (64 bytes). + Removing norflash.o(i.norflash_write_enable), (56 bytes). + Removing norflash.o(i.norflash_write_endian_scr), (132 bytes). + Removing norflash.o(.bss), (412 bytes). + Removing norflash.o(.bss), (32 bytes). + Removing norflash.o(.data), (2 bytes). + Removing drv_fls_dma.o(.rev16_text), (4 bytes). + Removing drv_fls_dma.o(.revsh_text), (4 bytes). + Removing drv_fls_dma.o(i.fls_abort_dma), (42 bytes). + Removing drv_fls_dma.o(i.fls_dma_disable), (10 bytes). + Removing drv_fls_dma.o(i.fls_dma_enable), (10 bytes). + Removing drv_fls_dma.o(i.fls_dma_read_prepare), (86 bytes). + Removing drv_fls_dma.o(i.fls_dma_write_prepare), (82 bytes). + Removing drv_fls_dma.o(i.fls_read_dmacallback), (32 bytes). + Removing drv_fls_dma.o(i.fls_transfer_create_handle_dma), (208 bytes). + Removing drv_fls_dma.o(i.fls_transfer_dma), (112 bytes). + Removing drv_fls_dma.o(i.fls_transfer_get_receive_count_dma), (44 bytes). + Removing drv_fls_dma.o(i.fls_write_dmacallback), (32 bytes). + Removing drv_fls_dma.o(.data), (8 bytes). + Removing drv_pwm.o(.rev16_text), (4 bytes). + Removing drv_pwm.o(.revsh_text), (4 bytes). + Removing drv_pwm.o(i.drv_pwm_in_clear_pwm_int_all), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_in_enable), (32 bytes). + Removing drv_pwm.o(i.drv_pwm_in_get_counter_period), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_in_get_current_count), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_in_get_high_period), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_in_get_low_period), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_in_register_callback), (24 bytes). + Removing drv_pwm.o(i.drv_pwm_in_set_pwm_int), (32 bytes). + Removing drv_pwm.o(i.drv_pwm_in_set_sys_int), (64 bytes). + Removing drv_pwm.o(i.drv_pwm_out_enable), (32 bytes). + Removing drv_pwm.o(i.drv_pwm_out_get_sync_flag), (16 bytes). + Removing drv_pwm.o(i.drv_pwm_out_pause), (28 bytes). + Removing drv_pwm.o(i.drv_pwm_out_set_control), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_out_set_period), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_out_set_sync_mode), (32 bytes). + Removing drv_pwm.o(i.drv_pwm_out_set_threshold), (12 bytes). + Removing drv_spi_slave.o(.rev16_text), (4 bytes). + Removing drv_spi_slave.o(.revsh_text), (4 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_deinit), (40 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_disable_int), (68 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_enable_int), (72 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_enable_rx_dma), (32 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_enable_tx_dma), (28 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_get_dma_address), (8 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_gpio_init), (24 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_read_data), (32 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_switch_sclk), (28 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_write_data), (44 bytes). + Removing drv_spi_slave.o(i.drv_spi_slave_init), (76 bytes). + Removing drv_uart.o(.rev16_text), (4 bytes). + Removing drv_uart.o(.revsh_text), (4 bytes). + Removing drv_uart.o(i.UART_AbortReceive), (30 bytes). + Removing drv_uart.o(i.UART_AbortSend), (30 bytes). + Removing drv_uart.o(i.UART_Deinit), (28 bytes). + Removing drv_uart.o(i.UART_Disable_IT), (68 bytes). + Removing drv_uart.o(i.UART_EnableDma), (32 bytes). + Removing drv_uart.o(i.UART_Enable_IT), (44 bytes). + Removing drv_uart.o(i.UART_GetDefaultConfig), (72 bytes). + Removing drv_uart.o(i.UART_GetFIFO_Ctrl), (20 bytes). + Removing drv_uart.o(i.UART_GetReceiveCount), (22 bytes). + Removing drv_uart.o(i.UART_GetReceiveStatus), (20 bytes). + Removing drv_uart.o(i.UART_GetRxRingBufferLength), (28 bytes). + Removing drv_uart.o(i.UART_GetSendCount), (22 bytes). + Removing drv_uart.o(i.UART_GetSendStatus), (20 bytes). + Removing drv_uart.o(i.UART_ReadBlocking), (32 bytes). + Removing drv_uart.o(i.UART_ReceiveNonBlocking), (50 bytes). + Removing drv_uart.o(i.UART_ResetTxFIFO), (36 bytes). + Removing drv_uart.o(i.UART_SendNonBlocking), (38 bytes). + Removing drv_uart.o(i.UART_TransferCreateHandle), (96 bytes). + Removing drv_uart.o(i.UART_TransferStartRingBuffer), (30 bytes). + Removing drv_uart.o(.constdata), (1 bytes). + Removing drv_uart_dma.o(.rev16_text), (4 bytes). + Removing drv_uart_dma.o(.revsh_text), (4 bytes). + Removing drv_uart_dma.o(i.UART_DMAInit), (76 bytes). + Removing drv_uart_dma.o(i.UART_TransferAbortReceiveDMA), (16 bytes). + Removing drv_uart_dma.o(i.UART_TransferAbortSendDMA), (16 bytes). + Removing drv_uart_dma.o(i.UART_TransferCreateHandleDMA), (176 bytes). + Removing drv_uart_dma.o(i.UART_TransferGetReceiveCountDMA), (44 bytes). + Removing drv_uart_dma.o(i.UART_TransferReceiveDMA), (68 bytes). + Removing drv_uart_dma.o(i.UART_TransferReceiveDMACallback), (34 bytes). + Removing drv_uart_dma.o(i.UART_TransferSendDMA), (68 bytes). + Removing drv_uart_dma.o(i.UART_TransferSendDMACallback), (34 bytes). + Removing drv_uart_dma.o(.data), (8 bytes). + Removing drv_wdg.o(.rev16_text), (4 bytes). + Removing drv_wdg.o(.revsh_text), (4 bytes). + Removing drv_wdg.o(i.drv_wdg_enable), (32 bytes). + Removing drv_wdg.o(i.drv_wdg_load_match), (12 bytes). + Removing drv_wdg.o(i.drv_wdg_register_callback), (12 bytes). + Removing drv_wdg.o(i.drv_wdg_sel_mode), (28 bytes). + Removing drv_wdg.o(i.drv_wdg_set_repeat), (12 bytes). + Removing dflti.o(.text), (40 bytes). + +586 unused section(s) (total 26778 bytes) removed from the image. + +============================================================================== + +Image Symbol Table + + Local Symbols + + Symbol Name Value Ov Type Size Object(Section) + + ../clib/../cmprslib/zerorunl2.c 0x00000000 Number 0 __dczerorl2.o ABSOLUTE + ../clib/microlib/division.c 0x00000000 Number 0 idiv.o ABSOLUTE + ../clib/microlib/division.c 0x00000000 Number 0 uidiv.o ABSOLUTE + ../clib/microlib/division.c 0x00000000 Number 0 uldiv.o ABSOLUTE + ../clib/microlib/errno.c 0x00000000 Number 0 errno.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry10b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry11a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry2.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry7b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry9b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry11b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry10a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry9a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry8b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry8a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry7a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry5.o ABSOLUTE + ../clib/microlib/longlong.c 0x00000000 Number 0 llshl.o ABSOLUTE + ../clib/microlib/longlong.c 0x00000000 Number 0 llushr.o ABSOLUTE + ../clib/microlib/longlong.c 0x00000000 Number 0 llsshr.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf7.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf8.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printfa.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf4.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf3.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf1.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf2.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf0.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printfb.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf5.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf6.o ABSOLUTE + ../clib/microlib/printf/stubs.s 0x00000000 Number 0 stubs.o ABSOLUTE + ../clib/microlib/stdio/streams.c 0x00000000 Number 0 stdout.o ABSOLUTE + ../clib/microlib/string/memcpy.c 0x00000000 Number 0 memcpyb.o ABSOLUTE + ../clib/microlib/string/memcpy.c 0x00000000 Number 0 memcpya.o ABSOLUTE + ../clib/microlib/string/memset.c 0x00000000 Number 0 memseta.o ABSOLUTE + ../clib/microlib/stubs.s 0x00000000 Number 0 iusefp.o ABSOLUTE + ../fplib/microlib/f2d.c 0x00000000 Number 0 f2d.o ABSOLUTE + ../fplib/microlib/fpadd.c 0x00000000 Number 0 fadd.o ABSOLUTE + ../fplib/microlib/fpadd.c 0x00000000 Number 0 dadd.o ABSOLUTE + ../fplib/microlib/fpdiv.c 0x00000000 Number 0 fdiv.o ABSOLUTE + ../fplib/microlib/fpdiv.c 0x00000000 Number 0 ddiv.o ABSOLUTE + ../fplib/microlib/fpepilogue.c 0x00000000 Number 0 depilogue.o ABSOLUTE + ../fplib/microlib/fpepilogue.c 0x00000000 Number 0 fepilogue.o ABSOLUTE + ../fplib/microlib/fpfix.c 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..\..\..\src\common\tau_delay.c 0x00000000 Number 0 tau_delay.o ABSOLUTE + ..\..\..\src\common\tau_log.c 0x00000000 Number 0 tau_log.o ABSOLUTE + ..\..\..\src\driver\robin\src\drv_chip_info.c 0x00000000 Number 0 drv_chip_info.o ABSOLUTE + ..\..\..\src\driver\robin\src\drv_dsc_dec.c 0x00000000 Number 0 drv_dsc_dec.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_dsi_rx.c 0x00000000 Number 0 drv_dsi_rx.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_dsi_tx.c 0x00000000 Number 0 drv_dsi_tx.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_efuse.c 0x00000000 Number 0 drv_efuse.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_lcdc.c 0x00000000 Number 0 drv_lcdc.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_memc.c 0x00000000 Number 0 drv_memc.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_phy_common.c 0x00000000 Number 0 drv_phy_common.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_rxbr.c 0x00000000 Number 0 drv_rxbr.o ABSOLUTE + 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.ARM.Collect$$$$0000000A 0x000100c8 Section 0 entry8b.o(.ARM.Collect$$$$0000000A) + .ARM.Collect$$$$0000000B 0x000100c8 Section 8 entry9a.o(.ARM.Collect$$$$0000000B) + .ARM.Collect$$$$0000000D 0x000100d0 Section 0 entry10a.o(.ARM.Collect$$$$0000000D) + .ARM.Collect$$$$0000000F 0x000100d0 Section 0 entry11a.o(.ARM.Collect$$$$0000000F) + .ARM.Collect$$$$00002712 0x000100d0 Section 4 entry2.o(.ARM.Collect$$$$00002712) + __lit__00000000 0x000100d0 Data 4 entry2.o(.ARM.Collect$$$$00002712) + .text 0x000100d4 Section 120 startup_armcm0.o(.text) + .text 0x0001014c Section 0 uidiv.o(.text) + .text 0x00010178 Section 0 idiv.o(.text) + .text 0x000101a0 Section 0 memcpya.o(.text) + .text 0x000101c4 Section 0 memseta.o(.text) + .text 0x000101e8 Section 0 fadd.o(.text) + .text 0x0001029a Section 0 fmul.o(.text) + .text 0x00010314 Section 0 fdiv.o(.text) + .text 0x00010390 Section 0 fscalb.o(.text) + .text 0x000103a8 Section 0 dadd.o(.text) + .text 0x0001050c Section 0 dmul.o(.text) + .text 0x000105dc Section 0 ddiv.o(.text) + .text 0x000106cc Section 0 fflti.o(.text) + .text 0x000106e2 Section 0 ffltui.o(.text) + .text 0x000106f0 Section 0 dfltui.o(.text) + .text 0x0001070c Section 0 ffixi.o(.text) + .text 0x0001073e Section 0 ffixui.o(.text) + .text 0x00010768 Section 0 dfixi.o(.text) + .text 0x000107b0 Section 0 dfixui.o(.text) + .text 0x000107ec Section 0 f2d.o(.text) + .text 0x00010814 Section 40 cdcmple.o(.text) + .text 0x0001083c Section 20 cfrcmple.o(.text) + .text 0x00010850 Section 0 uldiv.o(.text) + .text 0x000108b0 Section 0 llshl.o(.text) + .text 0x000108d0 Section 0 llushr.o(.text) + .text 0x000108f2 Section 0 llsshr.o(.text) + .text 0x00010918 Section 0 fepilogue.o(.text) + .text 0x00010918 Section 0 iusefp.o(.text) + .text 0x0001099a Section 0 depilogue.o(.text) + .text 0x00010a58 Section 0 dsqrt.o(.text) + .text 0x00010afc Section 0 dfixul.o(.text) + .text 0x00010b3c Section 40 cdrcmple.o(.text) + .text 0x00010b64 Section 36 init.o(.text) + .text 0x00010b88 Section 0 __dczerorl2.o(.text) + i.ADC_IRQn_Handler 0x00010be0 Section 0 irq_redirect .o(i.ADC_IRQn_Handler) + i.AP_NRESET_IRQn_Handler 0x00010bf8 Section 0 irq_redirect .o(i.AP_NRESET_IRQn_Handler) + i.DMA_IRQn_Handler 0x00010c10 Section 0 irq_redirect .o(i.DMA_IRQn_Handler) + i.EXTI_INT0_IRQn_Handler 0x00010c24 Section 0 irq_redirect .o(i.EXTI_INT0_IRQn_Handler) + i.EXTI_INT1_IRQn_Handler 0x00010c40 Section 0 irq_redirect .o(i.EXTI_INT1_IRQn_Handler) + i.EXTI_INT2_IRQn_Handler 0x00010c5c Section 0 irq_redirect .o(i.EXTI_INT2_IRQn_Handler) + i.EXTI_INT3_IRQn_Handler 0x00010c78 Section 0 irq_redirect .o(i.EXTI_INT3_IRQn_Handler) + i.EXTI_INT4_IRQn_Handler 0x00010c94 Section 0 irq_redirect .o(i.EXTI_INT4_IRQn_Handler) + i.EXTI_INT5_IRQn_Handler 0x00010cb0 Section 0 irq_redirect .o(i.EXTI_INT5_IRQn_Handler) + i.EXTI_INT6_IRQn_Handler 0x00010ccc Section 0 irq_redirect .o(i.EXTI_INT6_IRQn_Handler) + i.EXTI_INT7_IRQn_Handler 0x00010ce8 Section 0 irq_redirect .o(i.EXTI_INT7_IRQn_Handler) + i.EncryptCheck 0x00010d04 Section 0 app_tp_enc.o(i.EncryptCheck) + i.FLSCTRL_IRQn_Handler 0x00010d68 Section 0 irq_redirect .o(i.FLSCTRL_IRQn_Handler) + i.Gpio_swire_output 0x00010d7c Section 0 ap_demo.o(i.Gpio_swire_output) + i.HardFault_Handler 0x00010df0 Section 0 irq_redirect .o(i.HardFault_Handler) + i.I2C0_IRQn_Handler 0x00010e04 Section 0 irq_redirect .o(i.I2C0_IRQn_Handler) + i.I2C1_IRQn_Handler 0x00010e1c Section 0 irq_redirect .o(i.I2C1_IRQn_Handler) + i.LCDC_IRQn_Handler 0x00010e34 Section 0 irq_redirect .o(i.LCDC_IRQn_Handler) + i.LOG_printf 0x00010e4c Section 0 tau_log.o(i.LOG_printf) + i.MEMC_IRQn_Handler 0x00010e74 Section 0 irq_redirect .o(i.MEMC_IRQn_Handler) + i.MIPI_RX_IRQn_Handler 0x00010e8c Section 0 irq_redirect .o(i.MIPI_RX_IRQn_Handler) + i.MIPI_TX_IRQn_Handler 0x00010ea4 Section 0 irq_redirect .o(i.MIPI_TX_IRQn_Handler) + i.PWMDET_IRQn_Handler 0x00010ebc Section 0 irq_redirect .o(i.PWMDET_IRQn_Handler) + i.SPIM_IRQn_Handler 0x00010ed8 Section 0 irq_redirect .o(i.SPIM_IRQn_Handler) + i.SPIS_IRQn_Handler 0x00010ef4 Section 0 irq_redirect .o(i.SPIS_IRQn_Handler) + i.SWIRE_IRQn_Handler 0x00010f10 Section 0 irq_redirect .o(i.SWIRE_IRQn_Handler) + i.SysTick_Handler 0x00010f2c Section 0 irq_redirect .o(i.SysTick_Handler) + i.TIMER0_IRQn_Handler 0x00010f44 Section 0 irq_redirect .o(i.TIMER0_IRQn_Handler) + i.TIMER1_IRQn_Handler 0x00010f5c Section 0 irq_redirect .o(i.TIMER1_IRQn_Handler) + i.TIMER2_IRQn_Handler 0x00010f74 Section 0 irq_redirect .o(i.TIMER2_IRQn_Handler) + i.TIMER3_IRQn_Handler 0x00010f8c Section 0 irq_redirect .o(i.TIMER3_IRQn_Handler) + i.UART0_IRQ_Handle 0x00010fa4 Section 0 drv_uart.o(i.UART0_IRQ_Handle) + i.UART_DisableDma 0x00010fc0 Section 0 drv_uart.o(i.UART_DisableDma) + i.UART_GetInstance 0x00010fc2 Section 0 drv_uart.o(i.UART_GetInstance) + i.UART_IRQn_Handler 0x00010fc8 Section 0 irq_redirect .o(i.UART_IRQn_Handler) + i.UART_SwitchSCLK 0x00010fe0 Section 0 drv_uart.o(i.UART_SwitchSCLK) + i.__scatterload_null 0x00010ffa Section 2 handlers.o(i.__scatterload_null) + i.drv_dsi_rx_set_inten 0x00010ffc Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_inten) + .ARM.__at_0x11000 0x00011000 Section 20 drv_common.o(.ARM.__at_0x11000) + i.drv_dsi_tx_command_put_payload 0x00011014 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) + .ARM.__at_0x11018 0x00011018 Section 4 drv_common.o(.ARM.__at_0x11018) + i.S20_Start_init 0x0001101c Section 0 app_tp_transfer.o(i.S20_Start_init) + i.UART_ResetRxFIFO 0x00011160 Section 0 drv_uart.o(i.UART_ResetRxFIFO) + i.UART_SetBaudRate 0x00011184 Section 0 drv_uart.o(i.UART_SetBaudRate) + i.UART_TransferHandleIRQ 0x000111cc Section 0 drv_uart.o(i.UART_TransferHandleIRQ) + i.UART_WriteBlocking 0x00011300 Section 0 drv_uart.o(i.UART_WriteBlocking) + i.UART_init 0x0001131c Section 0 drv_uart.o(i.UART_init) + i.VIDC_IRQn_Handler 0x000113d8 Section 0 irq_redirect .o(i.VIDC_IRQn_Handler) + i.VPRE_IRQn_Handler 0x000113f0 Section 0 irq_redirect .o(i.VPRE_IRQn_Handler) + i.WDG_IRQn_Handler 0x00011408 Section 0 irq_redirect .o(i.WDG_IRQn_Handler) + i.__0printf 0x00011420 Section 0 printfa.o(i.__0printf) + i.__0vsprintf 0x00011440 Section 0 printfa.o(i.__0vsprintf) + i.__ARM_clz 0x00011464 Section 0 depilogue.o(i.__ARM_clz) + i.__ARM_common_switch8 0x00011492 Section 0 ap_demo.o(i.__ARM_common_switch8) + i.__NVIC_ClearPendingIRQ 0x000114ac Section 0 drv_i2c_master.o(i.__NVIC_ClearPendingIRQ) + __NVIC_ClearPendingIRQ 0x000114ad Thumb Code 18 drv_i2c_master.o(i.__NVIC_ClearPendingIRQ) + i.__NVIC_ClearPendingIRQ 0x000114c4 Section 0 drv_spi_master.o(i.__NVIC_ClearPendingIRQ) + __NVIC_ClearPendingIRQ 0x000114c5 Thumb Code 18 drv_spi_master.o(i.__NVIC_ClearPendingIRQ) + i.__NVIC_DisableIRQ 0x000114dc Section 0 drv_rxbr.o(i.__NVIC_DisableIRQ) + __NVIC_DisableIRQ 0x000114dd Thumb Code 26 drv_rxbr.o(i.__NVIC_DisableIRQ) + i.__NVIC_EnableIRQ 0x000114fc Section 0 drv_rxbr.o(i.__NVIC_EnableIRQ) + __NVIC_EnableIRQ 0x000114fd Thumb Code 18 drv_rxbr.o(i.__NVIC_EnableIRQ) + i.__NVIC_SetPriority 0x00011514 Section 0 hal_spi_slave.o(i.__NVIC_SetPriority) + __NVIC_SetPriority 0x00011515 Thumb Code 60 hal_spi_slave.o(i.__NVIC_SetPriority) + i.__scatterload_copy 0x00011558 Section 14 handlers.o(i.__scatterload_copy) + i.__scatterload_zeroinit 0x00011566 Section 14 handlers.o(i.__scatterload_zeroinit) + i.__set_errno 0x00011574 Section 0 errno.o(i.__set_errno) + i._fp_digits 0x00011580 Section 0 printfa.o(i._fp_digits) + _fp_digits 0x00011581 Thumb Code 344 printfa.o(i._fp_digits) + i._printf_core 0x000116f4 Section 0 printfa.o(i._printf_core) + _printf_core 0x000116f5 Thumb Code 1754 printfa.o(i._printf_core) + i._printf_post_padding 0x00011de0 Section 0 printfa.o(i._printf_post_padding) + _printf_post_padding 0x00011de1 Thumb Code 32 printfa.o(i._printf_post_padding) + i._printf_pre_padding 0x00011e00 Section 0 printfa.o(i._printf_pre_padding) + _printf_pre_padding 0x00011e01 Thumb Code 44 printfa.o(i._printf_pre_padding) + i._sputc 0x00011e2c Section 0 printfa.o(i._sputc) + _sputc 0x00011e2d Thumb Code 10 printfa.o(i._sputc) + i.ap_dcs_read 0x00011e38 Section 0 ap_demo.o(i.ap_dcs_read) + ap_dcs_read 0x00011e39 Thumb Code 4188 ap_demo.o(i.ap_dcs_read) + i.ap_demo 0x00012e94 Section 0 ap_demo.o(i.ap_demo) + i.ap_get_reg_ca 0x00012fcc Section 0 ap_demo.o(i.ap_get_reg_ca) + ap_get_reg_ca 0x00012fcd Thumb Code 36 ap_demo.o(i.ap_get_reg_ca) + i.ap_get_reg_df 0x00012ff4 Section 0 ap_demo.o(i.ap_get_reg_df) + ap_get_reg_df 0x00012ff5 Thumb Code 170 ap_demo.o(i.ap_get_reg_df) + i.ap_get_tp_calibration_status_01 0x000130a4 Section 0 app_tp_st_touch.o(i.ap_get_tp_calibration_status_01) + i.ap_reset_cb 0x000130c4 Section 0 ap_demo.o(i.ap_reset_cb) + ap_reset_cb 0x000130c5 Thumb Code 30 ap_demo.o(i.ap_reset_cb) + i.ap_set_backlight 0x000130ec Section 0 ap_demo.o(i.ap_set_backlight) + ap_set_backlight 0x000130ed Thumb Code 672 ap_demo.o(i.ap_set_backlight) + i.ap_set_display_off 0x000133ac Section 0 ap_demo.o(i.ap_set_display_off) + ap_set_display_off 0x000133ad Thumb Code 32 ap_demo.o(i.ap_set_display_off) + i.ap_set_display_on 0x000133d0 Section 0 ap_demo.o(i.ap_set_display_on) + ap_set_display_on 0x000133d1 Thumb Code 8 ap_demo.o(i.ap_set_display_on) + i.ap_set_enter_sleep_mode 0x000133dc Section 0 ap_demo.o(i.ap_set_enter_sleep_mode) + ap_set_enter_sleep_mode 0x000133dd Thumb Code 46 ap_demo.o(i.ap_set_enter_sleep_mode) + i.ap_set_exit_sleep_mode 0x00013414 Section 0 ap_demo.o(i.ap_set_exit_sleep_mode) + ap_set_exit_sleep_mode 0x00013415 Thumb Code 8 ap_demo.o(i.ap_set_exit_sleep_mode) + i.ap_set_tp_calibration_04 0x00013420 Section 0 ap_demo.o(i.ap_set_tp_calibration_04) + ap_set_tp_calibration_04 0x00013421 Thumb Code 22 ap_demo.o(i.ap_set_tp_calibration_04) + i.ap_tp_st_touch_calibration 0x0001343c Section 0 app_tp_st_touch.o(i.ap_tp_st_touch_calibration) + i.ap_tp_st_touch_error_handler_F3 0x000134ec Section 0 app_tp_st_touch.o(i.ap_tp_st_touch_error_handler_F3) + i.ap_tp_st_touch_error_handler_FF 0x00013506 Section 0 app_tp_st_touch.o(i.ap_tp_st_touch_error_handler_FF) + i.ap_tp_st_touch_get_calibration_success_mark 0x00013528 Section 0 app_tp_st_touch.o(i.ap_tp_st_touch_get_calibration_success_mark) + i.ap_tp_st_touch_scan_point_init 0x000135d0 Section 0 app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_init) + i.ap_tp_st_touch_scan_point_record_event 0x000135ec Section 0 app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_record_event) + i.ap_tp_st_touch_scan_point_record_event_exec 0x00013680 Section 0 app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_record_event_exec) + i.ap_tp_st_touch_simulate_finger_release_event 0x000136b4 Section 0 app_tp_st_touch.o(i.ap_tp_st_touch_simulate_finger_release_event) + i.ap_tp_st_touch_software_reset 0x000136e8 Section 0 app_tp_st_touch.o(i.ap_tp_st_touch_software_reset) + i.ap_update_frame_rate 0x00013758 Section 0 ap_demo.o(i.ap_update_frame_rate) + ap_update_frame_rate 0x00013759 Thumb Code 40 ap_demo.o(i.ap_update_frame_rate) + i.app_ADC_IRQn_Handler 0x00013784 Section 0 drv_rxbr.o(i.app_ADC_IRQn_Handler) + i.app_AP_NRESET_IRQn_Handler 0x000137a0 Section 0 drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) + i.app_EXTI_INT0_IRQn_Handler 0x000137c4 Section 0 drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) + i.app_EXTI_INT1_IRQn_Handler 0x000137e0 Section 0 drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) + i.app_EXTI_INT2_IRQn_Handler 0x000137fc Section 0 drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) + i.app_EXTI_INT3_IRQn_Handler 0x00013818 Section 0 drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) + i.app_EXTI_INT4_IRQn_Handler 0x00013834 Section 0 drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) + i.app_EXTI_INT5_IRQn_Handler 0x00013850 Section 0 drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) + i.app_EXTI_INT6_IRQn_Handler 0x0001386c Section 0 drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) + i.app_EXTI_INT7_IRQn_Handler 0x00013888 Section 0 drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) + i.app_HardFault_Handler 0x000138a4 Section 0 drv_common.o(i.app_HardFault_Handler) + i.app_I2C0_IRQn_Handler 0x000138ec Section 0 drv_i2c_slave.o(i.app_I2C0_IRQn_Handler) + i.app_I2C1_IRQn_Handler 0x00013904 Section 0 drv_i2c_master.o(i.app_I2C1_IRQn_Handler) + i.app_LCDC_IRQn_Handler 0x00013914 Section 0 hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) + i.app_MEMC_IRQn_Handler 0x00013ab8 Section 0 drv_memc.o(i.app_MEMC_IRQn_Handler) + i.app_MIPI_RX_IRQn_Handler 0x00013b40 Section 0 drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) + i.app_MIPI_TX_IRQn_Handler 0x00013dd8 Section 0 drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) + i.app_PWMDET_IRQn_Handler 0x00013e78 Section 0 drv_pwm.o(i.app_PWMDET_IRQn_Handler) + i.app_SPIM_IRQn_Handler 0x00013ec0 Section 0 drv_spi_master.o(i.app_SPIM_IRQn_Handler) + i.app_SPIS_IRQn_Handler 0x00013ef0 Section 0 hal_spi_slave.o(i.app_SPIS_IRQn_Handler) + i.app_SWIRE_IRQn_Handler 0x000140f0 Section 0 drv_swire.o(i.app_SWIRE_IRQn_Handler) + i.app_SysTick_Handler 0x00014110 Section 0 drv_common.o(i.app_SysTick_Handler) + i.app_TIMER0_IRQn_Handler 0x00014128 Section 0 drv_timer.o(i.app_TIMER0_IRQn_Handler) + i.app_TIMER1_IRQn_Handler 0x00014132 Section 0 drv_timer.o(i.app_TIMER1_IRQn_Handler) + i.app_TIMER2_IRQn_Handler 0x0001413c Section 0 drv_timer.o(i.app_TIMER2_IRQn_Handler) + i.app_TIMER3_IRQn_Handler 0x00014146 Section 0 drv_timer.o(i.app_TIMER3_IRQn_Handler) + i.app_UART_IRQn_Handler 0x00014150 Section 0 drv_uart.o(i.app_UART_IRQn_Handler) + i.app_VIDC_IRQn_Handler 0x00014158 Section 0 drv_vidc.o(i.app_VIDC_IRQn_Handler) + i.app_VPRE_IRQn_Handler 0x00014174 Section 0 drv_rxbr.o(i.app_VPRE_IRQn_Handler) + i.app_WDG_IRQn_Handler 0x00014190 Section 0 drv_wdg.o(i.app_WDG_IRQn_Handler) + i.app_dma_irq_handler 0x000141c8 Section 0 drv_dma.o(i.app_dma_irq_handler) + i.app_fls_ctrl_Handler 0x000141d8 Section 0 norflash.o(i.app_fls_ctrl_Handler) + i.app_tp_I2C_init 0x00014208 Section 0 app_tp_transfer.o(i.app_tp_I2C_init) + i.app_tp_calibration_exec 0x0001422c Section 0 app_tp_st_touch.o(i.app_tp_calibration_exec) + i.app_tp_i2cs_callback 0x00014264 Section 0 app_tp_transfer.o(i.app_tp_i2cs_callback) + app_tp_i2cs_callback 0x00014265 Thumb Code 42 app_tp_transfer.o(i.app_tp_i2cs_callback) + i.app_tp_init 0x00014294 Section 0 app_tp_transfer.o(i.app_tp_init) + i.app_tp_m_read 0x000142d8 Section 0 app_tp_transfer.o(i.app_tp_m_read) + i.app_tp_m_write 0x000142f8 Section 0 app_tp_transfer.o(i.app_tp_m_write) + i.app_tp_phone_analysis_data 0x00014300 Section 0 app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) + i.app_tp_phone_clear_reset_on 0x0001471c Section 0 app_tp_transfer.o(i.app_tp_phone_clear_reset_on) + i.app_tp_s_read 0x00014728 Section 0 app_tp_transfer.o(i.app_tp_s_read) + i.app_tp_s_write 0x00014730 Section 0 app_tp_transfer.o(i.app_tp_s_write) + i.app_tp_screen_analysis_int 0x00014738 Section 0 app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) + i.app_tp_screen_init 0x00014a14 Section 0 app_tp_transfer.o(i.app_tp_screen_init) + i.app_tp_screen_int_callback 0x00014a44 Section 0 app_tp_transfer.o(i.app_tp_screen_int_callback) + app_tp_screen_int_callback 0x00014a45 Thumb Code 8 app_tp_transfer.o(i.app_tp_screen_int_callback) + i.app_tp_transfer_screen_const 0x00014a50 Section 0 app_tp_transfer.o(i.app_tp_transfer_screen_const) + app_tp_transfer_screen_const 0x00014a51 Thumb Code 50 app_tp_transfer.o(i.app_tp_transfer_screen_const) + i.app_tp_transfer_screen_int 0x00014a90 Section 0 app_tp_transfer.o(i.app_tp_transfer_screen_int) + i.app_tp_transfer_screen_start 0x00014bf0 Section 0 app_tp_transfer.o(i.app_tp_transfer_screen_start) + i.blue_change_ccm 0x00014c08 Section 0 ap_demo.o(i.blue_change_ccm) + i.board_Init 0x00014c40 Section 0 board.o(i.board_Init) + i.calc_framebuffer_setting 0x00014c64 Section 0 hal_internal_vsync.o(i.calc_framebuffer_setting) + i.ceil 0x00015154 Section 0 ceil.o(i.ceil) + i.check_mipi_rx_tx_video_info 0x0001521c Section 0 hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) + check_mipi_rx_tx_video_info 0x0001521d Thumb Code 44 hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) + i.check_pkt_buf_rev 0x00015248 Section 0 hal_internal_vsync.o(i.check_pkt_buf_rev) + check_pkt_buf_rev 0x00015249 Thumb Code 92 hal_internal_vsync.o(i.check_pkt_buf_rev) + i.dcs_packet_fifo_alloc 0x000152d8 Section 0 dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) + i.dcs_packet_fifo_init 0x00015330 Section 0 dcs_packet_fifo.o(i.dcs_packet_fifo_init) + i.dcs_packet_free_fifo_header 0x00015348 Section 0 dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) + i.dcs_packet_get_fifo_header 0x0001538c Section 0 dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) + i.dcs_sw_filter 0x000153b0 Section 0 hal_internal_vsync.o(i.dcs_sw_filter) + dcs_sw_filter 0x000153b1 Thumb Code 36 hal_internal_vsync.o(i.dcs_sw_filter) + i.delayMs 0x000153dc Section 0 tau_delay.o(i.delayMs) + i.delayUs 0x000153f4 Section 0 tau_delay.o(i.delayUs) + i.disable_mipi_timer_cb 0x00015418 Section 0 ap_demo.o(i.disable_mipi_timer_cb) + disable_mipi_timer_cb 0x00015419 Thumb Code 78 ap_demo.o(i.disable_mipi_timer_cb) + i.drv_ap_rst_trig_edge_detect 0x00015470 Section 0 drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) + i.drv_chip_info_get_info 0x000154a8 Section 0 drv_chip_info.o(i.drv_chip_info_get_info) + i.drv_chip_info_init 0x000154b4 Section 0 drv_chip_info.o(i.drv_chip_info_init) + i.drv_chip_rx_info_check 0x000154f4 Section 0 drv_chip_info.o(i.drv_chip_rx_info_check) + i.drv_chip_rx_init_done 0x000155a4 Section 0 drv_chip_info.o(i.drv_chip_rx_init_done) + i.drv_common_enable_systick 0x000155b8 Section 0 drv_common.o(i.drv_common_enable_systick) + i.drv_common_system_init 0x00015610 Section 0 drv_common.o(i.drv_common_system_init) + i.drv_crgu_config_reset_modules 0x00015618 Section 0 drv_crgu.o(i.drv_crgu_config_reset_modules) + i.drv_crgu_set_ahb_pre_div 0x00015628 Section 0 drv_crgu.o(i.drv_crgu_set_ahb_pre_div) + i.drv_crgu_set_ahb_src 0x0001563c Section 0 drv_crgu.o(i.drv_crgu_set_ahb_src) + i.drv_crgu_set_clock 0x00015650 Section 0 drv_crgu.o(i.drv_crgu_set_clock) + i.drv_crgu_set_dpi_mux_src 0x00015670 Section 0 drv_crgu.o(i.drv_crgu_set_dpi_mux_src) + i.drv_crgu_set_dpi_pre_div 0x00015684 Section 0 drv_crgu.o(i.drv_crgu_set_dpi_pre_div) + i.drv_crgu_set_dpi_pre_src 0x0001569c Section 0 drv_crgu.o(i.drv_crgu_set_dpi_pre_src) + i.drv_crgu_set_dsc_core_div 0x000156b0 Section 0 drv_crgu.o(i.drv_crgu_set_dsc_core_div) + i.drv_crgu_set_dsco_src 0x000156c4 Section 0 drv_crgu.o(i.drv_crgu_set_dsco_src) + i.drv_crgu_set_dsco_src_div 0x000156d8 Section 0 drv_crgu.o(i.drv_crgu_set_dsco_src_div) + i.drv_crgu_set_fb_div 0x000156ec Section 0 drv_crgu.o(i.drv_crgu_set_fb_div) + i.drv_crgu_set_fb_src 0x00015700 Section 0 drv_crgu.o(i.drv_crgu_set_fb_src) + i.drv_crgu_set_lcdc_div 0x00015714 Section 0 drv_crgu.o(i.drv_crgu_set_lcdc_div) + i.drv_crgu_set_lcdc_src 0x00015728 Section 0 drv_crgu.o(i.drv_crgu_set_lcdc_src) + i.drv_crgu_set_mipi_cfg_src 0x0001573c Section 0 drv_crgu.o(i.drv_crgu_set_mipi_cfg_src) + i.drv_crgu_set_mipi_ref_src 0x00015750 Section 0 drv_crgu.o(i.drv_crgu_set_mipi_ref_src) + i.drv_crgu_set_reset 0x00015768 Section 0 drv_crgu.o(i.drv_crgu_set_reset) + i.drv_crgu_set_rxbr_div 0x00015780 Section 0 drv_crgu.o(i.drv_crgu_set_rxbr_div) + i.drv_crgu_set_rxbr_src 0x00015794 Section 0 drv_crgu.o(i.drv_crgu_set_rxbr_src) + i.drv_crgu_set_vidc_src 0x000157a8 Section 0 drv_crgu.o(i.drv_crgu_set_vidc_src) + i.drv_dma_clear_flag 0x000157bc Section 0 drv_dma.o(i.drv_dma_clear_flag) + i.drv_dma_create_handle 0x000157d4 Section 0 drv_dma.o(i.drv_dma_create_handle) + i.drv_dma_disenable_channel 0x000157f0 Section 0 drv_dma.o(i.drv_dma_disenable_channel) + i.drv_dma_enable_channel 0x00015800 Section 0 drv_dma.o(i.drv_dma_enable_channel) + i.drv_dma_enable_channel_interrupts 0x00015810 Section 0 drv_dma.o(i.drv_dma_enable_channel_interrupts) + i.drv_dma_get_channel_flag 0x00015834 Section 0 drv_dma.o(i.drv_dma_get_channel_flag) + i.drv_dma_irq_handler 0x00015840 Section 0 drv_dma.o(i.drv_dma_irq_handler) + i.drv_dma_prepar_transfer 0x000158d0 Section 0 drv_dma.o(i.drv_dma_prepar_transfer) + i.drv_dma_set_burst 0x000158e2 Section 0 drv_dma.o(i.drv_dma_set_burst) + i.drv_dma_set_callback 0x000158fc Section 0 drv_dma.o(i.drv_dma_set_callback) + i.drv_dma_set_transfer 0x00015904 Section 0 drv_dma.o(i.drv_dma_set_transfer) + i.drv_dsc_dec_convert_pps_rc_parameter 0x00015948 Section 0 drv_dsc_dec.o(i.drv_dsc_dec_convert_pps_rc_parameter) + i.drv_dsc_dec_disable 0x0001597e Section 0 drv_dsc_dec.o(i.drv_dsc_dec_disable) + i.drv_dsc_dec_enable 0x0001598c Section 0 drv_dsc_dec.o(i.drv_dsc_dec_enable) + i.drv_dsc_dec_get_nslc 0x00015a00 Section 0 drv_dsc_dec.o(i.drv_dsc_dec_get_nslc) + i.drv_dsc_dec_set_u8_pps 0x00015a0a Section 0 drv_dsc_dec.o(i.drv_dsc_dec_set_u8_pps) + i.drv_dsi_rx_calc_ipi_tx_delay 0x00015a34 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) + i.drv_dsi_rx_enable_irq 0x00015b38 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) + i.drv_dsi_rx_get_color_bpp 0x00015b78 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) + drv_dsi_rx_get_color_bpp 0x00015b79 Thumb Code 62 drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) + i.drv_dsi_rx_get_color_pcc 0x00015bc8 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_color_pcc) + drv_dsi_rx_get_color_pcc 0x00015bc9 Thumb Code 24 drv_dsi_rx.o(i.drv_dsi_rx_get_color_pcc) + i.drv_dsi_rx_get_compression_en 0x00015be4 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) + i.drv_dsi_rx_get_max_ret_size 0x00015bec Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_max_ret_size) + i.drv_dsi_rx_power_up 0x00015bf2 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_power_up) + i.drv_dsi_rx_set_ctrl_cfg 0x00015c00 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_ctrl_cfg) + i.drv_dsi_rx_set_ddi_cfg 0x00015c20 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) + i.drv_dsi_rx_set_ipi_cfg 0x00015c30 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_cfg) + i.drv_dsi_rx_set_lane_swap 0x00015c40 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_lane_swap) + i.drv_dsi_rx_set_resp_cnt 0x00015c86 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_resp_cnt) + i.drv_dsi_rx_set_up_phy 0x00015cac Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) + i.drv_dsi_rx_shut_down 0x00015db0 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_shut_down) + i.drv_dsi_tx_command_header 0x00015dbe Section 0 drv_dsi_tx.o(i.drv_dsi_tx_command_header) + i.drv_dsi_tx_command_mode_cfg 0x00015dd2 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) + i.drv_dsi_tx_config_eotp 0x00015e3e Section 0 drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) + i.drv_dsi_tx_config_int 0x00015e56 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_config_int) + i.drv_dsi_tx_dpi_lpcmd_time 0x00015e5e Section 0 drv_dsi_tx.o(i.drv_dsi_tx_dpi_lpcmd_time) + i.drv_dsi_tx_dpi_mode 0x00015e66 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_dpi_mode) + i.drv_dsi_tx_dpi_polarity 0x00015e70 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_dpi_polarity) + i.drv_dsi_tx_edpi_cmd_size 0x00015e94 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_edpi_cmd_size) + i.drv_dsi_tx_get_cmd_status 0x00015e98 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) + i.drv_dsi_tx_mode 0x00015e9c Section 0 drv_dsi_tx.o(i.drv_dsi_tx_mode) + i.drv_dsi_tx_phy_clock_lane_auto_lp 0x00015ea0 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_auto_lp) + i.drv_dsi_tx_phy_clock_lane_req_hs 0x00015eb8 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) + i.drv_dsi_tx_phy_lane_mode 0x00015ed2 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_lane_mode) + i.drv_dsi_tx_phy_status_ready 0x00015ede Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ready) + i.drv_dsi_tx_phy_status_stopstate 0x00015f42 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) + i.drv_dsi_tx_phy_test_setup 0x00015f80 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) + i.drv_dsi_tx_phy_time_cfg 0x000160b4 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_time_cfg) + i.drv_dsi_tx_powerup 0x000160d2 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_powerup) + i.drv_dsi_tx_response_mode 0x000160da Section 0 drv_dsi_tx.o(i.drv_dsi_tx_response_mode) + i.drv_dsi_tx_set_bta_ack 0x000160f6 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_bta_ack) + i.drv_dsi_tx_set_esc_div 0x0001610e Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) + i.drv_dsi_tx_set_int 0x0001611c Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_int) + i.drv_dsi_tx_set_time_out_div 0x0001615c Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_time_out_div) + i.drv_dsi_tx_set_video_chunk 0x0001616c Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_video_chunk) + i.drv_dsi_tx_set_video_timing 0x00016174 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_video_timing) + i.drv_dsi_tx_shutdown 0x00016196 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_shutdown) + i.drv_dsi_tx_timeout_cfg 0x0001619e Section 0 drv_dsi_tx.o(i.drv_dsi_tx_timeout_cfg) + i.drv_dsi_tx_video_mode_cfg 0x000161c4 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_cfg) + i.drv_dsi_tx_video_mode_disable_hact_cmd 0x0001626e Section 0 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_disable_hact_cmd) + i.drv_dsi_tx_video_mode_set_lp_cmd 0x00016284 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_set_lp_cmd) + i.drv_efuse_enter_inactive 0x0001629c Section 0 drv_efuse.o(i.drv_efuse_enter_inactive) + i.drv_efuse_int_enable 0x000162ca Section 0 drv_efuse.o(i.drv_efuse_int_enable) + i.drv_efuse_read 0x000162d6 Section 0 drv_efuse.o(i.drv_efuse_read) + i.drv_efuse_read_req 0x00016308 Section 0 drv_efuse.o(i.drv_efuse_read_req) + i.drv_gpio_get_input_data 0x00016320 Section 0 drv_gpio.o(i.drv_gpio_get_input_data) + i.drv_gpio_register_ap_reset_callback 0x00016338 Section 0 drv_gpio.o(i.drv_gpio_register_ap_reset_callback) + i.drv_gpio_register_callback 0x00016344 Section 0 drv_gpio.o(i.drv_gpio_register_callback) + i.drv_gpio_set_int 0x00016358 Section 0 drv_gpio.o(i.drv_gpio_set_int) + i.drv_gpio_set_ioe 0x000163a8 Section 0 drv_gpio.o(i.drv_gpio_set_ioe) + i.drv_gpio_set_mode0 0x000163c8 Section 0 drv_gpio.o(i.drv_gpio_set_mode0) + i.drv_gpio_set_mode1 0x000163d8 Section 0 drv_gpio.o(i.drv_gpio_set_mode1) + i.drv_gpio_set_mode2 0x000163e8 Section 0 drv_gpio.o(i.drv_gpio_set_mode2) + i.drv_gpio_set_mode3 0x000163f8 Section 0 drv_gpio.o(i.drv_gpio_set_mode3) + i.drv_gpio_set_output_data 0x00016408 Section 0 hal_gpio.o(i.drv_gpio_set_output_data) + drv_gpio_set_output_data 0x00016409 Thumb Code 26 hal_gpio.o(i.drv_gpio_set_output_data) + i.drv_gpio_set_pull_state 0x00016428 Section 0 drv_gpio.o(i.drv_gpio_set_pull_state) + i.drv_i2c0_set_callback 0x00016558 Section 0 drv_i2c_slave.o(i.drv_i2c0_set_callback) + i.drv_i2c1_set_callback 0x00016564 Section 0 drv_i2c_master.o(i.drv_i2c1_set_callback) + i.drv_i2c_dma_callback 0x00016570 Section 0 drv_i2c_dma.o(i.drv_i2c_dma_callback) + drv_i2c_dma_callback 0x00016571 Thumb Code 40 drv_i2c_dma.o(i.drv_i2c_dma_callback) + i.drv_i2c_dma_init 0x000165a4 Section 0 drv_i2c_dma.o(i.drv_i2c_dma_init) + i.drv_i2c_enable_rx_dma 0x00016650 Section 0 drv_i2c_dma.o(i.drv_i2c_enable_rx_dma) + i.drv_i2c_enable_tx_dma 0x0001666a Section 0 drv_i2c_dma.o(i.drv_i2c_enable_tx_dma) + i.drv_i2c_m_clear_it_pending_bit 0x00016684 Section 0 drv_i2c_master.o(i.drv_i2c_m_clear_it_pending_bit) + i.drv_i2c_m_enable 0x000166e4 Section 0 drv_i2c_master.o(i.drv_i2c_m_enable) + i.drv_i2c_m_enable_intr 0x000166f4 Section 0 drv_i2c_master.o(i.drv_i2c_m_enable_intr) + i.drv_i2c_master_init 0x0001672c Section 0 drv_i2c_master.o(i.drv_i2c_master_init) + i.drv_i2c_master_read_dma 0x000167b8 Section 0 drv_i2c_dma.o(i.drv_i2c_master_read_dma) + i.drv_i2c_master_write_dma 0x00016814 Section 0 drv_i2c_dma.o(i.drv_i2c_master_write_dma) + i.drv_i2c_master_write_read_cmd 0x00016850 Section 0 drv_i2c_dma.o(i.drv_i2c_master_write_read_cmd) + drv_i2c_master_write_read_cmd 0x00016851 Thumb Code 62 drv_i2c_dma.o(i.drv_i2c_master_write_read_cmd) + i.drv_i2c_s_clear_it_pending_bit 0x0001688e Section 0 drv_i2c_slave.o(i.drv_i2c_s_clear_it_pending_bit) + i.drv_i2c_s_config_intr 0x000168d0 Section 0 drv_i2c_slave.o(i.drv_i2c_s_config_intr) + i.drv_i2c_s_enable 0x000168d4 Section 0 drv_i2c_slave.o(i.drv_i2c_s_enable) + i.drv_i2c_s_get_fifo_status 0x000168dc Section 0 drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) + i.drv_i2c_s_set_intr 0x000168f0 Section 0 drv_i2c_slave.o(i.drv_i2c_s_set_intr) + i.drv_i2c_s_write_data 0x00016940 Section 0 drv_i2c_slave.o(i.drv_i2c_s_write_data) + i.drv_i2c_set_dma_irq_callback 0x0001695c Section 0 drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) + i.drv_i2c_slave_init 0x000169b4 Section 0 drv_i2c_slave.o(i.drv_i2c_slave_init) + i.drv_i2c_slave_write_dma 0x000169e8 Section 0 drv_i2c_dma.o(i.drv_i2c_slave_write_dma) + i.drv_lcdc_config_bypass 0x00016a00 Section 0 drv_lcdc.o(i.drv_lcdc_config_bypass) + i.drv_lcdc_config_ccm 0x00016a18 Section 0 drv_lcdc.o(i.drv_lcdc_config_ccm) + i.drv_lcdc_config_disp_mode 0x00016a48 Section 0 drv_lcdc.o(i.drv_lcdc_config_disp_mode) + i.drv_lcdc_config_dpi_polarity 0x00016a5e Section 0 drv_lcdc.o(i.drv_lcdc_config_dpi_polarity) + i.drv_lcdc_config_dpi_timing 0x00016a82 Section 0 drv_lcdc.o(i.drv_lcdc_config_dpi_timing) + i.drv_lcdc_config_edpi_mode 0x00016aa8 Section 0 drv_lcdc.o(i.drv_lcdc_config_edpi_mode) + i.drv_lcdc_config_endianness 0x00016abe Section 0 drv_lcdc.o(i.drv_lcdc_config_endianness) + i.drv_lcdc_config_input_size 0x00016ad4 Section 0 drv_lcdc.o(i.drv_lcdc_config_input_size) + i.drv_lcdc_config_int 0x00016ae0 Section 0 drv_lcdc.o(i.drv_lcdc_config_int) + i.drv_lcdc_config_int_single 0x00016afe Section 0 drv_lcdc.o(i.drv_lcdc_config_int_single) + i.drv_lcdc_config_overwrite 0x00016b20 Section 0 drv_lcdc.o(i.drv_lcdc_config_overwrite) + i.drv_lcdc_config_overwrite_rgb 0x00016b42 Section 0 drv_lcdc.o(i.drv_lcdc_config_overwrite_rgb) + i.drv_lcdc_config_partial_display_area 0x00016b4e Section 0 drv_lcdc.o(i.drv_lcdc_config_partial_display_area) + i.drv_lcdc_config_partial_display_enable 0x00016b68 Section 0 drv_lcdc.o(i.drv_lcdc_config_partial_display_enable) + i.drv_lcdc_config_scale_up_coef 0x00016b8a Section 0 drv_lcdc.o(i.drv_lcdc_config_scale_up_coef) + i.drv_lcdc_config_scale_up_step 0x00016ba4 Section 0 drv_lcdc.o(i.drv_lcdc_config_scale_up_step) + i.drv_lcdc_config_src_parameter 0x00016bb0 Section 0 drv_lcdc.o(i.drv_lcdc_config_src_parameter) + i.drv_lcdc_config_thresh 0x00016bfc Section 0 drv_lcdc.o(i.drv_lcdc_config_thresh) + i.drv_lcdc_ctrl_flow 0x00016c02 Section 0 drv_lcdc.o(i.drv_lcdc_ctrl_flow) + i.drv_lcdc_enable_shadow_reg 0x00016c14 Section 0 drv_lcdc.o(i.drv_lcdc_enable_shadow_reg) + i.drv_lcdc_set_int 0x00016c34 Section 0 drv_lcdc.o(i.drv_lcdc_set_int) + i.drv_lcdc_set_prefetch 0x00016c74 Section 0 drv_lcdc.o(i.drv_lcdc_set_prefetch) + i.drv_lcdc_set_video_hw_mode 0x00016c8c Section 0 drv_lcdc.o(i.drv_lcdc_set_video_hw_mode) + i.drv_lcdc_start 0x00016ca0 Section 0 drv_lcdc.o(i.drv_lcdc_start) + i.drv_memc_clear_status 0x00016cc0 Section 0 drv_memc.o(i.drv_memc_clear_status) + i.drv_memc_enable_irq 0x00016ccc Section 0 drv_memc.o(i.drv_memc_enable_irq) + i.drv_memc_gen_a_tear_signal 0x00016d0c Section 0 drv_memc.o(i.drv_memc_gen_a_tear_signal) + i.drv_memc_get_status 0x00016d18 Section 0 drv_memc.o(i.drv_memc_get_status) + i.drv_memc_rate_transfer_sel 0x00016d2a Section 0 drv_memc.o(i.drv_memc_rate_transfer_sel) + i.drv_memc_sel_vsync 0x00016d3a Section 0 drv_memc.o(i.drv_memc_sel_vsync) + i.drv_memc_set_active_height 0x00016d48 Section 0 drv_memc.o(i.drv_memc_set_active_height) + i.drv_memc_set_data_mode 0x00016d5c Section 0 drv_memc.o(i.drv_memc_set_data_mode) + i.drv_memc_set_double_buffer 0x00016d68 Section 0 drv_memc.o(i.drv_memc_set_double_buffer) + i.drv_memc_set_double_buffer_reverse 0x00016d78 Section 0 drv_memc.o(i.drv_memc_set_double_buffer_reverse) + i.drv_memc_set_fs_en_conditions 0x00016d8a Section 0 drv_memc.o(i.drv_memc_set_fs_en_conditions) + i.drv_memc_set_inten 0x00016d9a Section 0 drv_memc.o(i.drv_memc_set_inten) + i.drv_memc_set_lcdc_st_conditions 0x00016db0 Section 0 drv_memc.o(i.drv_memc_set_lcdc_st_conditions) + i.drv_memc_set_ltpo_mode 0x00016dc8 Section 0 drv_memc.o(i.drv_memc_set_ltpo_mode) + i.drv_memc_set_tear_mode 0x00016de2 Section 0 drv_memc.o(i.drv_memc_set_tear_mode) + i.drv_memc_set_tear_waveform 0x00016df0 Section 0 drv_memc.o(i.drv_memc_set_tear_waveform) + i.drv_memc_set_vidc_sync_cnt 0x00016e18 Section 0 drv_memc.o(i.drv_memc_set_vidc_sync_cnt) + i.drv_param_init_get_ccm 0x00016e28 Section 0 drv_param_init.o(i.drv_param_init_get_ccm) + i.drv_param_init_get_scld_filter_h 0x00016e30 Section 0 drv_param_init.o(i.drv_param_init_get_scld_filter_h) + i.drv_param_init_get_scld_filter_v 0x00016e44 Section 0 drv_param_init.o(i.drv_param_init_get_scld_filter_v) + i.drv_param_init_get_sclu_filter 0x00016e58 Section 0 drv_param_init.o(i.drv_param_init_get_sclu_filter) + i.drv_param_init_set_ccm 0x00016e60 Section 0 drv_param_init.o(i.drv_param_init_set_ccm) + i.drv_param_p2r_filter_init 0x00016e74 Section 0 drv_param_init.o(i.drv_param_p2r_filter_init) + i.drv_phy_enable_calibration 0x00016e98 Section 0 drv_phy_common.o(i.drv_phy_enable_calibration) + i.drv_phy_get_calibration 0x00016ea8 Section 0 drv_phy_common.o(i.drv_phy_get_calibration) + i.drv_phy_get_pll_para 0x00016ee4 Section 0 drv_phy_common.o(i.drv_phy_get_pll_para) + i.drv_phy_get_rate_para 0x00016f44 Section 0 drv_phy_common.o(i.drv_phy_get_rate_para) + i.drv_phy_test_clear 0x00016f98 Section 0 drv_phy_common.o(i.drv_phy_test_clear) + i.drv_phy_test_lock 0x00016fa8 Section 0 drv_phy_common.o(i.drv_phy_test_lock) + i.drv_phy_test_write_1_byte 0x00016fc0 Section 0 drv_phy_common.o(i.drv_phy_test_write_1_byte) + i.drv_phy_test_write_2_byte 0x00016fe0 Section 0 drv_phy_common.o(i.drv_phy_test_write_2_byte) + i.drv_phy_test_write_code 0x00017006 Section 0 drv_phy_common.o(i.drv_phy_test_write_code) + i.drv_phy_test_write_data 0x00017024 Section 0 drv_phy_common.o(i.drv_phy_test_write_data) + drv_phy_test_write_data 0x00017025 Thumb Code 32 drv_phy_common.o(i.drv_phy_test_write_data) + i.drv_pwr_set_cp_mode 0x00017044 Section 0 drv_pwr.o(i.drv_pwr_set_cp_mode) + i.drv_pwr_set_pvd_mode 0x00017064 Section 0 drv_pwr.o(i.drv_pwr_set_pvd_mode) + i.drv_pwr_set_system_clk_src 0x0001707c Section 0 drv_pwr.o(i.drv_pwr_set_system_clk_src) + i.drv_rx_phy_test_clear 0x000170b4 Section 0 drv_dsi_rx.o(i.drv_rx_phy_test_clear) + drv_rx_phy_test_clear 0x000170b5 Thumb Code 12 drv_dsi_rx.o(i.drv_rx_phy_test_clear) + i.drv_rx_phy_test_lock 0x000170c0 Section 0 drv_dsi_rx.o(i.drv_rx_phy_test_lock) + drv_rx_phy_test_lock 0x000170c1 Thumb Code 16 drv_dsi_rx.o(i.drv_rx_phy_test_lock) + i.drv_rx_phy_test_write_1_byte 0x000170d0 Section 0 drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) + drv_rx_phy_test_write_1_byte 0x000170d1 Thumb Code 20 drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) + i.drv_rx_phy_test_write_2_byte 0x000170e4 Section 0 drv_dsi_rx.o(i.drv_rx_phy_test_write_2_byte) + drv_rx_phy_test_write_2_byte 0x000170e5 Thumb Code 22 drv_dsi_rx.o(i.drv_rx_phy_test_write_2_byte) + i.drv_rxbr_clear_pkt_buffer 0x000170fa Section 0 drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) + i.drv_rxbr_clear_status0 0x00017104 Section 0 drv_rxbr.o(i.drv_rxbr_clear_status0) + i.drv_rxbr_enable_irq 0x00017108 Section 0 drv_rxbr.o(i.drv_rxbr_enable_irq) + i.drv_rxbr_frame_drop_cfg 0x00017164 Section 0 drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) + i.drv_rxbr_get_clk 0x00017178 Section 0 drv_rxbr.o(i.drv_rxbr_get_clk) + i.drv_rxbr_get_col_addr 0x000171dc Section 0 drv_rxbr.o(i.drv_rxbr_get_col_addr) + i.drv_rxbr_get_int_source 0x000171e0 Section 0 hal_internal_vsync.o(i.drv_rxbr_get_int_source) + drv_rxbr_get_int_source 0x000171e1 Thumb Code 18 hal_internal_vsync.o(i.drv_rxbr_get_int_source) + i.drv_rxbr_get_page_addr 0x000171f2 Section 0 drv_rxbr.o(i.drv_rxbr_get_page_addr) + i.drv_rxbr_get_status0 0x000171f6 Section 0 hal_internal_vsync.o(i.drv_rxbr_get_status0) + drv_rxbr_get_status0 0x000171f7 Thumb Code 18 hal_internal_vsync.o(i.drv_rxbr_get_status0) + i.drv_rxbr_hline_rcv0_cfg 0x00017208 Section 0 drv_rxbr.o(i.drv_rxbr_hline_rcv0_cfg) + i.drv_rxbr_hline_rcv_cfg 0x00017214 Section 0 drv_rxbr.o(i.drv_rxbr_hline_rcv_cfg) + i.drv_rxbr_register_irq0_callback 0x0001721c Section 0 drv_rxbr.o(i.drv_rxbr_register_irq0_callback) + i.drv_rxbr_register_irq1_callback 0x00017228 Section 0 drv_rxbr.o(i.drv_rxbr_register_irq1_callback) + i.drv_rxbr_set_ack_pkt_header 0x00017234 Section 0 drv_rxbr.o(i.drv_rxbr_set_ack_pkt_header) + i.drv_rxbr_set_cmd_filter 0x00017248 Section 0 drv_rxbr.o(i.drv_rxbr_set_cmd_filter) + i.drv_rxbr_set_color_format 0x00017314 Section 0 drv_rxbr.o(i.drv_rxbr_set_color_format) + i.drv_rxbr_set_inten 0x00017328 Section 0 drv_rxbr.o(i.drv_rxbr_set_inten) + i.drv_rxbr_set_ltpo_drop_th 0x0001733c Section 0 drv_rxbr.o(i.drv_rxbr_set_ltpo_drop_th) + i.drv_rxbr_set_usr_cfg 0x0001734c Section 0 drv_rxbr.o(i.drv_rxbr_set_usr_cfg) + i.drv_rxbr_set_usr_col 0x00017372 Section 0 drv_rxbr.o(i.drv_rxbr_set_usr_col) + i.drv_rxbr_set_usr_row 0x0001737a Section 0 drv_rxbr.o(i.drv_rxbr_set_usr_row) + i.drv_spi_m_read_data 0x00017384 Section 0 drv_spi_master.o(i.drv_spi_m_read_data) + i.drv_swire_set_int 0x000173a4 Section 0 drv_swire.o(i.drv_swire_set_int) + i.drv_swire_set_power_down 0x000173f8 Section 0 drv_swire.o(i.drv_swire_set_power_down) + i.drv_sys_cfg_clear_all_int 0x00017414 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_clear_all_int) + i.drv_sys_cfg_clear_pending 0x00017420 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) + i.drv_sys_cfg_sel_ap_rst_lvl_trig 0x00017448 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_lvl_trig) + i.drv_sys_cfg_sel_ap_rst_trig 0x00017460 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) + i.drv_sys_cfg_sel_gpio_group 0x0001747c Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_gpio_group) + i.drv_sys_cfg_sel_int_trig 0x000174a0 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_int_trig) + i.drv_sys_cfg_set_dma_rx_req 0x000174c4 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) + i.drv_sys_cfg_set_dma_tx_req 0x000174d4 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) + i.drv_sys_cfg_set_int 0x000174e4 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_set_int) + i.drv_timer_clear_status_flags 0x00017508 Section 0 drv_timer.o(i.drv_timer_clear_status_flags) + drv_timer_clear_status_flags 0x00017509 Thumb Code 26 drv_timer.o(i.drv_timer_clear_status_flags) + i.drv_timer_enable 0x00017522 Section 0 drv_timer.o(i.drv_timer_enable) + i.drv_timer_get_instance 0x00017544 Section 0 drv_timer.o(i.drv_timer_get_instance) + i.drv_timer_get_prescaler 0x00017554 Section 0 drv_timer.o(i.drv_timer_get_prescaler) + i.drv_timer_handle_interrupt 0x00017564 Section 0 drv_timer.o(i.drv_timer_handle_interrupt) + drv_timer_handle_interrupt 0x00017565 Thumb Code 62 drv_timer.o(i.drv_timer_handle_interrupt) + i.drv_timer_register_callback 0x000175a8 Section 0 drv_timer.o(i.drv_timer_register_callback) + i.drv_timer_set_compare_val 0x000175bc Section 0 drv_timer.o(i.drv_timer_set_compare_val) + i.drv_timer_set_int 0x000175cc Section 0 drv_timer.o(i.drv_timer_set_int) + i.drv_timer_set_prescaler 0x00017620 Section 0 drv_timer.o(i.drv_timer_set_prescaler) + i.drv_tx_phy_test_clear 0x00017648 Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_clear) + drv_tx_phy_test_clear 0x00017649 Thumb Code 10 drv_dsi_tx.o(i.drv_tx_phy_test_clear) + i.drv_tx_phy_test_enter 0x00017652 Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_enter) + i.drv_tx_phy_test_exit 0x0001766e Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_exit) + i.drv_tx_phy_test_write_1_byte 0x0001768a Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) + drv_tx_phy_test_write_1_byte 0x0001768b Thumb Code 18 drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) + i.drv_tx_phy_test_write_2_byte 0x0001769c Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_write_2_byte) + drv_tx_phy_test_write_2_byte 0x0001769d Thumb Code 20 drv_dsi_tx.o(i.drv_tx_phy_test_write_2_byte) + i.drv_tx_phy_test_write_code 0x000176b0 Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_write_code) + drv_tx_phy_test_write_code 0x000176b1 Thumb Code 16 drv_dsi_tx.o(i.drv_tx_phy_test_write_code) + i.drv_vidc_clear_irq 0x000176c0 Section 0 drv_vidc.o(i.drv_vidc_clear_irq) + i.drv_vidc_enable 0x000176c8 Section 0 drv_vidc.o(i.drv_vidc_enable) + i.drv_vidc_enable_irq 0x000176e0 Section 0 drv_vidc.o(i.drv_vidc_enable_irq) + i.drv_vidc_get_irq_status 0x00017720 Section 0 drv_vidc.o(i.drv_vidc_get_irq_status) + i.drv_vidc_init_module_enable 0x00017734 Section 0 drv_vidc.o(i.drv_vidc_init_module_enable) + i.drv_vidc_register_callback 0x0001775c Section 0 drv_vidc.o(i.drv_vidc_register_callback) + i.drv_vidc_reset 0x00017768 Section 0 drv_vidc.o(i.drv_vidc_reset) + i.drv_vidc_set_dst_parameter 0x0001776e Section 0 drv_vidc.o(i.drv_vidc_set_dst_parameter) + i.drv_vidc_set_irqen 0x000177aa Section 0 drv_vidc.o(i.drv_vidc_set_irqen) + i.drv_vidc_set_mirror 0x000177be Section 0 drv_vidc.o(i.drv_vidc_set_mirror) + i.drv_vidc_set_p2r_hcoef0 0x000177ce Section 0 drv_vidc.o(i.drv_vidc_set_p2r_hcoef0) + i.drv_vidc_set_p2r_hinitb 0x000177d6 Section 0 drv_vidc.o(i.drv_vidc_set_p2r_hinitb) + i.drv_vidc_set_p2r_hinitr 0x000177fc Section 0 drv_vidc.o(i.drv_vidc_set_p2r_hinitr) + i.drv_vidc_set_pentile_swap 0x00017824 Section 0 drv_vidc.o(i.drv_vidc_set_pentile_swap) + i.drv_vidc_set_pu_ctrl 0x0001783c Section 0 drv_vidc.o(i.drv_vidc_set_pu_ctrl) + i.drv_vidc_set_rotation 0x00017846 Section 0 drv_vidc.o(i.drv_vidc_set_rotation) + i.drv_vidc_set_scld_hcoef0 0x00017856 Section 0 drv_vidc.o(i.drv_vidc_set_scld_hcoef0) + i.drv_vidc_set_scld_hcoef1 0x00017860 Section 0 drv_vidc.o(i.drv_vidc_set_scld_hcoef1) + i.drv_vidc_set_scld_step 0x0001786a Section 0 drv_vidc.o(i.drv_vidc_set_scld_step) + i.drv_vidc_set_scld_vcoef0 0x0001787c Section 0 drv_vidc.o(i.drv_vidc_set_scld_vcoef0) + i.drv_vidc_set_scld_vcoef1 0x00017886 Section 0 drv_vidc.o(i.drv_vidc_set_scld_vcoef1) + i.drv_vidc_set_src_parameter 0x00017890 Section 0 drv_vidc.o(i.drv_vidc_set_src_parameter) + i.drv_wdg_clear_counter 0x000178a8 Section 0 drv_wdg.o(i.drv_wdg_clear_counter) + i.drv_wdg_clear_edge_flag 0x000178b8 Section 0 drv_wdg.o(i.drv_wdg_clear_edge_flag) + drv_wdg_clear_edge_flag 0x000178b9 Thumb Code 12 drv_wdg.o(i.drv_wdg_clear_edge_flag) + i.drv_wdg_read_edge_flag 0x000178c8 Section 0 drv_wdg.o(i.drv_wdg_read_edge_flag) + drv_wdg_read_edge_flag 0x000178c9 Thumb Code 10 drv_wdg.o(i.drv_wdg_read_edge_flag) + i.drv_wdg_set_int 0x000178d8 Section 0 drv_wdg.o(i.drv_wdg_set_int) + i.fls_clr_interrupt_flag 0x00017918 Section 0 drv_fls.o(i.fls_clr_interrupt_flag) + i.fputc 0x00017922 Section 0 tau_log.o(i.fputc) + i.hal_dsi_rx_ctrl_create_handle 0x00017938 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) + i.hal_dsi_rx_ctrl_deinit 0x0001796c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) + i.hal_dsi_rx_ctrl_dsc_async_handler 0x00017a08 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) + i.hal_dsi_rx_ctrl_gen_a_tear_signal 0x00017a8c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) + i.hal_dsi_rx_ctrl_get_max_ret_size 0x00017ab4 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) + i.hal_dsi_rx_ctrl_hight_performan_mode 0x00017adc Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) + i.hal_dsi_rx_ctrl_init 0x00017b40 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) + i.hal_dsi_rx_ctrl_init_clk 0x00017bd8 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) + hal_dsi_rx_ctrl_init_clk 0x00017bd9 Thumb Code 332 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) + i.hal_dsi_rx_ctrl_init_dsi_rx 0x00017d7c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) + hal_dsi_rx_ctrl_init_dsi_rx 0x00017d7d Thumb Code 184 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) + i.hal_dsi_rx_ctrl_init_memc 0x00017e54 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) + hal_dsi_rx_ctrl_init_memc 0x00017e55 Thumb Code 334 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) + i.hal_dsi_rx_ctrl_init_rxbr 0x00017fac Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) + hal_dsi_rx_ctrl_init_rxbr 0x00017fad Thumb Code 312 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) + i.hal_dsi_rx_ctrl_init_vidc 0x000180f4 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) + hal_dsi_rx_ctrl_init_vidc 0x000180f5 Thumb Code 544 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) + i.hal_dsi_rx_ctrl_pre_init_pps 0x00018320 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_pre_init_pps) + i.hal_dsi_rx_ctrl_send_ack_cmd 0x0001835c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) + i.hal_dsi_rx_ctrl_set_cus_sync_line 0x0001844c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) + i.hal_dsi_rx_ctrl_set_hw_tear_mode 0x00018480 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode) + i.hal_dsi_rx_ctrl_set_ipi_cfg 0x000184b4 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) + hal_dsi_rx_ctrl_set_ipi_cfg 0x000184b5 Thumb Code 50 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) + i.hal_dsi_rx_ctrl_set_rxbr_clk 0x000184ec Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) + hal_dsi_rx_ctrl_set_rxbr_clk 0x000184ed Thumb Code 114 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) + i.hal_dsi_rx_ctrl_set_sw_tear_mode 0x00018560 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) + i.hal_dsi_rx_ctrl_set_tear_mode_ex 0x00018594 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_tear_mode_ex) + i.hal_dsi_rx_ctrl_start 0x000185a4 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) + i.hal_dsi_rx_ctrl_stop 0x000185e0 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) + i.hal_dsi_rx_ctrl_toggle_resolution 0x0001861c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) + i.hal_dsi_tx_calc_video_chunks 0x0001863c Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) + hal_dsi_tx_calc_video_chunks 0x0001863d Thumb Code 384 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) + i.hal_dsi_tx_config_params_for_lane_rate 0x000187cc Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) + hal_dsi_tx_config_params_for_lane_rate 0x000187cd Thumb Code 42 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) + i.hal_dsi_tx_count_lane_rate 0x00018800 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) + hal_dsi_tx_count_lane_rate 0x00018801 Thumb Code 1022 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) + i.hal_dsi_tx_ctrl_create_handle 0x00018c50 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) + i.hal_dsi_tx_ctrl_deinit 0x00018c7c Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) + i.hal_dsi_tx_ctrl_enter_init_panel_mode 0x00018d00 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) + i.hal_dsi_tx_ctrl_exit_init_panel_mode 0x00018d4c Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) + i.hal_dsi_tx_ctrl_init 0x00018d74 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) + i.hal_dsi_tx_ctrl_init_clk 0x00018e18 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) + hal_dsi_tx_ctrl_init_clk 0x00018e19 Thumb Code 36 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) + i.hal_dsi_tx_ctrl_panel_reset_pin 0x00018e3c Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_panel_reset_pin) + i.hal_dsi_tx_ctrl_set_ccm 0x00018e48 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) + i.hal_dsi_tx_ctrl_set_overwrite_rgb 0x00018e68 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) + i.hal_dsi_tx_ctrl_set_partial_disp 0x00018e7c Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp) + i.hal_dsi_tx_ctrl_set_partial_disp_area 0x00018e8c Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp_area) + i.hal_dsi_tx_ctrl_start 0x00018eb0 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) + i.hal_dsi_tx_ctrl_stop 0x00018f4c Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) + i.hal_dsi_tx_ctrl_write_array_cmd 0x00018f90 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) + i.hal_dsi_tx_ctrl_write_cmd 0x00019068 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) + i.hal_dsi_tx_init_data_mode 0x00019118 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) + hal_dsi_tx_init_data_mode 0x00019119 Thumb Code 58 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) + i.hal_dsi_tx_init_dpi_cfg 0x0001915c Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) + hal_dsi_tx_init_dpi_cfg 0x0001915d Thumb Code 42 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) + i.hal_dsi_tx_init_interrupt 0x0001918c Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) + hal_dsi_tx_init_interrupt 0x0001918d Thumb Code 28 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) + i.hal_dsi_tx_init_phy_cfg 0x000191ac Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) + hal_dsi_tx_init_phy_cfg 0x000191ad Thumb Code 28 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) + i.hal_dsi_tx_init_remains 0x000191cc Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) + hal_dsi_tx_init_remains 0x000191cd Thumb Code 142 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) + i.hal_dsi_tx_init_video_mode 0x00019260 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) + hal_dsi_tx_init_video_mode 0x00019261 Thumb Code 82 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) + i.hal_dsi_tx_send_cmd 0x000192b8 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) + hal_dsi_tx_send_cmd 0x000192b9 Thumb Code 60 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) + i.hal_gpio_ctrl_eint 0x000192fc Section 0 hal_gpio.o(i.hal_gpio_ctrl_eint) + i.hal_gpio_get_input_data 0x00019314 Section 0 hal_gpio.o(i.hal_gpio_get_input_data) + i.hal_gpio_init_eint 0x00019328 Section 0 hal_gpio.o(i.hal_gpio_init_eint) + i.hal_gpio_init_input 0x00019368 Section 0 hal_gpio.o(i.hal_gpio_init_input) + i.hal_gpio_init_output 0x00019388 Section 0 hal_gpio.o(i.hal_gpio_init_output) + i.hal_gpio_reg_eint_cb 0x000193b0 Section 0 hal_gpio.o(i.hal_gpio_reg_eint_cb) + i.hal_gpio_set_ap_reset_int 0x000193c8 Section 0 hal_gpio.o(i.hal_gpio_set_ap_reset_int) + i.hal_gpio_set_mode 0x00019418 Section 0 hal_gpio.o(i.hal_gpio_set_mode) + i.hal_gpio_set_output_data 0x00019478 Section 0 hal_gpio.o(i.hal_gpio_set_output_data) + i.hal_gpio_set_pull_state 0x00019480 Section 0 hal_gpio.o(i.hal_gpio_set_pull_state) + i.hal_i2c_m_dma_init 0x000194a0 Section 0 hal_i2c_master.o(i.hal_i2c_m_dma_init) + i.hal_i2c_m_dma_read 0x0001950c Section 0 hal_i2c_master.o(i.hal_i2c_m_dma_read) + i.hal_i2c_m_dma_write 0x0001952c Section 0 hal_i2c_master.o(i.hal_i2c_m_dma_write) + i.hal_i2c_m_transfer_complate 0x00019548 Section 0 hal_i2c_master.o(i.hal_i2c_m_transfer_complate) + i.hal_i2c_master_irq_callback 0x00019554 Section 0 hal_i2c_master.o(i.hal_i2c_master_irq_callback) + hal_i2c_master_irq_callback 0x00019555 Thumb Code 24 hal_i2c_master.o(i.hal_i2c_master_irq_callback) + i.hal_i2c_s_dma_user_callback 0x00019574 Section 0 hal_i2c_slave.o(i.hal_i2c_s_dma_user_callback) + hal_i2c_s_dma_user_callback 0x00019575 Thumb Code 12 hal_i2c_slave.o(i.hal_i2c_s_dma_user_callback) + i.hal_i2c_s_dma_write 0x00019584 Section 0 hal_i2c_slave.o(i.hal_i2c_s_dma_write) + i.hal_i2c_s_init 0x000195d0 Section 0 hal_i2c_slave.o(i.hal_i2c_s_init) + i.hal_i2c_s_nonblocking_read 0x00019698 Section 0 hal_i2c_slave.o(i.hal_i2c_s_nonblocking_read) + i.hal_i2c_s_set_transfer 0x000196ac Section 0 hal_i2c_slave.o(i.hal_i2c_s_set_transfer) + i.hal_i2c_slave_irq_callback 0x000196b8 Section 0 hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) + hal_i2c_slave_irq_callback 0x000196b9 Thumb Code 356 hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) + i.hal_internal_init_memc 0x0001982c Section 0 hal_internal_vsync.o(i.hal_internal_init_memc) + i.hal_internal_sync_get_fb_setting 0x00019928 Section 0 hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) + i.hal_internal_sync_get_hight_performan_mode 0x00019938 Section 0 hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) + i.hal_internal_sync_input_resolution_change 0x00019948 Section 0 hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) + i.hal_internal_update_dpi_param 0x00019b74 Section 0 hal_internal_vsync.o(i.hal_internal_update_dpi_param) + i.hal_internal_video_mode_auto_sync 0x00019b84 Section 0 hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) + i.hal_internal_vsync_deinit 0x00019cb0 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_deinit) + i.hal_internal_vsync_get_rx_state 0x00019cd8 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) + i.hal_internal_vsync_get_sync_line 0x00019ce4 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) + i.hal_internal_vsync_get_tear_mode 0x00019cfc Section 0 hal_internal_vsync.o(i.hal_internal_vsync_get_tear_mode) + i.hal_internal_vsync_get_tx_state 0x00019d08 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) + i.hal_internal_vsync_init_rx 0x00019d14 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_init_rx) + i.hal_internal_vsync_init_tx 0x00019e2c Section 0 hal_internal_vsync.o(i.hal_internal_vsync_init_tx) + i.hal_internal_vsync_set_auto_hw_filter 0x00019edc Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) + i.hal_internal_vsync_set_rx_state 0x00019ff8 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) + i.hal_internal_vsync_set_sync_line 0x0001a00c Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) + i.hal_internal_vsync_set_tear_mode 0x0001a030 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) + i.hal_internal_vsync_set_tx_state 0x0001a080 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) + i.hal_lcdc_config_ccm 0x0001a100 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) + hal_lcdc_config_ccm 0x0001a101 Thumb Code 30 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) + i.hal_lcdc_config_remains 0x0001a124 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) + hal_lcdc_config_remains 0x0001a125 Thumb Code 84 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) + i.hal_lcdc_config_rgb_to_pentile 0x0001a17c Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_rgb_to_pentile) + hal_lcdc_config_rgb_to_pentile 0x0001a17d Thumb Code 14 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_rgb_to_pentile) + i.hal_lcdc_config_upscaler 0x0001a190 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) + hal_lcdc_config_upscaler 0x0001a191 Thumb Code 348 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) + i.hal_lcdc_init_cfg 0x0001a2f4 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) + hal_lcdc_init_cfg 0x0001a2f5 Thumb Code 78 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) + i.hal_lcdc_init_clk 0x0001a348 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) + hal_lcdc_init_clk 0x0001a349 Thumb Code 422 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) + i.hal_lcdc_init_interrupt 0x0001a4f8 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) + hal_lcdc_init_interrupt 0x0001a4f9 Thumb Code 58 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) + i.hal_spi_m_clear_rxfifo 0x0001a538 Section 0 hal_spi_master.o(i.hal_spi_m_clear_rxfifo) + i.hal_swire_open 0x0001a546 Section 0 hal_swire.o(i.hal_swire_open) + i.hal_system_enable_systick 0x0001a55c Section 0 hal_system.o(i.hal_system_enable_systick) + i.hal_system_init 0x0001a564 Section 0 hal_system.o(i.hal_system_init) + i.hal_system_init_console 0x0001a5ec Section 0 hal_system.o(i.hal_system_init_console) + i.hal_system_set_phy_calibration 0x0001a608 Section 0 hal_system.o(i.hal_system_set_phy_calibration) + i.hal_system_set_pvd 0x0001a610 Section 0 hal_system.o(i.hal_system_set_pvd) + i.hal_system_set_vcc 0x0001a618 Section 0 hal_system.o(i.hal_system_set_vcc) + i.hal_timer_init 0x0001a620 Section 0 hal_timer.o(i.hal_timer_init) + i.hal_timer_start 0x0001a63c Section 0 hal_timer.o(i.hal_timer_start) + i.hal_timer_stop 0x0001a684 Section 0 hal_timer.o(i.hal_timer_stop) + i.hal_uart_init 0x0001a6ac Section 0 hal_uart.o(i.hal_uart_init) + i.hal_uart_transmit_blocking 0x0001a738 Section 0 hal_uart.o(i.hal_uart_transmit_blocking) + i.handle_init 0x0001a748 Section 0 irq_redirect .o(i.handle_init) + i.init_mipi_tx 0x0001a858 Section 0 ap_demo.o(i.init_mipi_tx) + init_mipi_tx 0x0001a859 Thumb Code 96 ap_demo.o(i.init_mipi_tx) + i.init_panel 0x0001a8bc Section 0 ap_demo.o(i.init_panel) + init_panel 0x0001a8bd Thumb Code 126 ap_demo.o(i.init_panel) + i.main 0x0001a944 Section 0 main.o(i.main) + i.open_mipi_rx 0x0001a950 Section 0 ap_demo.o(i.open_mipi_rx) + open_mipi_rx 0x0001a951 Thumb Code 138 ap_demo.o(i.open_mipi_rx) + i.pps_update_handle 0x0001a9f0 Section 0 ap_demo.o(i.pps_update_handle) + pps_update_handle 0x0001a9f1 Thumb Code 80 ap_demo.o(i.pps_update_handle) + i.rx_get_dcs_packet_data 0x0001aa44 Section 0 hal_internal_vsync.o(i.rx_get_dcs_packet_data) + rx_get_dcs_packet_data 0x0001aa45 Thumb Code 654 hal_internal_vsync.o(i.rx_get_dcs_packet_data) + i.rx_partial_update 0x0001ae38 Section 0 hal_internal_vsync.o(i.rx_partial_update) + rx_partial_update 0x0001ae39 Thumb Code 358 hal_internal_vsync.o(i.rx_partial_update) + i.rx_receive_packet 0x0001afb0 Section 0 hal_internal_vsync.o(i.rx_receive_packet) + rx_receive_packet 0x0001afb1 Thumb Code 128 hal_internal_vsync.o(i.rx_receive_packet) + i.rx_receive_pps 0x0001b03c Section 0 hal_internal_vsync.o(i.rx_receive_pps) + rx_receive_pps 0x0001b03d Thumb Code 268 hal_internal_vsync.o(i.rx_receive_pps) + i.rxbr_irq0_callback 0x0001b1bc Section 0 hal_internal_vsync.o(i.rxbr_irq0_callback) + rxbr_irq0_callback 0x0001b1bd Thumb Code 158 hal_internal_vsync.o(i.rxbr_irq0_callback) + i.rxbr_irq1_callback 0x0001b260 Section 0 hal_internal_vsync.o(i.rxbr_irq1_callback) + rxbr_irq1_callback 0x0001b261 Thumb Code 324 hal_internal_vsync.o(i.rxbr_irq1_callback) + i.soft_gen_te 0x0001b43c Section 0 hal_internal_vsync.o(i.soft_gen_te) + soft_gen_te 0x0001b43d Thumb Code 166 hal_internal_vsync.o(i.soft_gen_te) + i.soft_gen_te_double_buffer 0x0001b500 Section 0 hal_internal_vsync.o(i.soft_gen_te_double_buffer) + soft_gen_te_double_buffer 0x0001b501 Thumb Code 166 hal_internal_vsync.o(i.soft_gen_te_double_buffer) + i.soft_timer3_cb 0x0001b5c0 Section 0 ap_demo.o(i.soft_timer3_cb) + soft_timer3_cb 0x0001b5c1 Thumb Code 36 ap_demo.o(i.soft_timer3_cb) + i.sqrt 0x0001b5f0 Section 0 sqrt.o(i.sqrt) + i.tp_heartbeat_exec 0x0001b638 Section 0 ap_demo.o(i.tp_heartbeat_exec) + i.vidc_callback 0x0001b678 Section 0 hal_internal_vsync.o(i.vidc_callback) + vidc_callback 0x0001b679 Thumb Code 232 hal_internal_vsync.o(i.vidc_callback) + i.vpre_err_reset 0x0001b780 Section 0 hal_internal_vsync.o(i.vpre_err_reset) + vpre_err_reset 0x0001b781 Thumb Code 184 hal_internal_vsync.o(i.vpre_err_reset) + i.vsync_set_te_mode 0x0001b850 Section 0 hal_internal_vsync.o(i.vsync_set_te_mode) + vsync_set_te_mode 0x0001b851 Thumb Code 300 hal_internal_vsync.o(i.vsync_set_te_mode) + .constdata 0x0001ba1c Section 248 ap_demo.o(.constdata) + g_cus_rx_dcs_execute_table 0x0001ba1c Data 120 ap_demo.o(.constdata) + .constdata 0x0001bb14 Section 36 hal_dsi_tx_ctrl.o(.constdata) + .constdata 0x0001bb38 Section 210 hal_gpio.o(.constdata) + s_gpio_map 0x0001bb38 Data 120 hal_gpio.o(.constdata) + s_gpio_perf 0x0001bbb0 Data 90 hal_gpio.o(.constdata) + .constdata 0x0001bc0c Section 32 hal_i2c_slave.o(.constdata) + sg_i2c_s_config 0x0001bc0c Data 32 hal_i2c_slave.o(.constdata) + .constdata 0x0001bc2c Section 8528 app_tp_for_custom_s8.o(.constdata) + .constdata 0x0001dd7c Section 1 app_tp_for_custom_s8.o(.constdata) + .constdata 0x0001dd80 Section 8 drv_param_init.o(.constdata) + .constdata 0x0001dd88 Section 390 drv_phy_common.o(.constdata) + phy_para_mapping_h 0x0001dd88 Data 184 drv_phy_common.o(.constdata) + phy_para_mapping_l 0x0001de40 Data 128 drv_phy_common.o(.constdata) + phy_data_high_map 0x0001dec0 Data 48 drv_phy_common.o(.constdata) + phy_data_lp_map 0x0001def0 Data 30 drv_phy_common.o(.constdata) + .conststring 0x0001df10 Section 72 hal_dsi_rx_ctrl.o(.conststring) + .conststring 0x0001df58 Section 67 hal_dsi_tx_ctrl.o(.conststring) + .conststring 0x0001df9c Section 308 hal_internal_vsync.o(.conststring) + .ARM.__AT_0x00070100 0x00070100 Section 192 irq_redirect .o(.ARM.__AT_0x00070100) + .data 0x000701d0 Section 7526 ap_demo.o(.data) + start_display_on 0x000701d0 Data 1 ap_demo.o(.data) + g_need_enter_sleep_mode 0x000701d1 Data 1 ap_demo.o(.data) + g_mipi_path_off 0x000701d2 Data 1 ap_demo.o(.data) + phone_off_flag 0x000701d3 Data 1 ap_demo.o(.data) + g_exit_sleep_mode 0x000701d4 Data 1 ap_demo.o(.data) + panel_display_done 0x000701d5 Data 1 ap_demo.o(.data) + phone_power_on 0x000701d6 Data 1 ap_demo.o(.data) + g_calibration_flag 0x000701db Data 1 ap_demo.o(.data) + bl_adj_flag 0x000701df Data 1 ap_demo.o(.data) + b3_read_flag 0x000701e1 Data 1 ap_demo.o(.data) + c8_read_flag 0x000701e2 Data 1 ap_demo.o(.data) + c9_read_flag 0x000701e3 Data 1 ap_demo.o(.data) + c9_read_flag2 0x000701e4 Data 1 ap_demo.o(.data) + c9_read_flag3 0x000701e5 Data 1 ap_demo.o(.data) + flag_5a 0x000701e6 Data 1 ap_demo.o(.data) + frame_rate 0x000701e7 Data 1 ap_demo.o(.data) + g_rx_ctrl_handle 0x000701f8 Data 4 ap_demo.o(.data) + g_tx_ctrl_handle 0x000701fc Data 4 ap_demo.o(.data) + value_reg_df 0x00070208 Data 4 ap_demo.o(.data) + .data 0x00071f36 Section 23 app_tp_transfer.o(.data) + s_spim_write 0x00071f36 Data 1 app_tp_transfer.o(.data) + s_screen_int_flag 0x00071f37 Data 1 app_tp_transfer.o(.data) + s_phone_reset_flag 0x00071f38 Data 1 app_tp_transfer.o(.data) + s_screen_int_transfer_status 0x00071f39 Data 1 app_tp_transfer.o(.data) + s_screen_const_transfer_count 0x00071f3b Data 1 app_tp_transfer.o(.data) + screen_int_transfer_count 0x00071f3c Data 1 app_tp_transfer.o(.data) + screen_int_transfer_buffer_ready 0x00071f3d Data 1 app_tp_transfer.o(.data) + .data 0x00071f4d Section 40 app_tp_st_touch.o(.data) + s_calibration_flag 0x00071f4d Data 1 app_tp_st_touch.o(.data) + s_calibration_correct_flag 0x00071f4e Data 1 app_tp_st_touch.o(.data) + .data 0x00071f78 Section 8 hal_dsi_rx_ctrl.o(.data) + g_hw_auto_filter 0x00071f78 Data 1 hal_dsi_rx_ctrl.o(.data) + g_esc_clk 0x00071f7c Data 4 hal_dsi_rx_ctrl.o(.data) + .data 0x00071f80 Section 3 hal_dsi_tx_ctrl.o(.data) + g_tx_vcom_en 0x00071f80 Data 1 hal_dsi_tx_ctrl.o(.data) + g_tx_vpg_en 0x00071f81 Data 1 hal_dsi_tx_ctrl.o(.data) + g_tx_mode 0x00071f82 Data 1 hal_dsi_tx_ctrl.o(.data) + .data 0x00071f83 Section 1 hal_i2c_master.o(.data) + s_i2c_m_transfer_end 0x00071f83 Data 1 hal_i2c_master.o(.data) + .data 0x00071f84 Section 32 hal_i2c_slave.o(.data) + s_txbuffer_complate 0x00071f84 Data 1 hal_i2c_slave.o(.data) + s_i2c_s_dma_end 0x00071f85 Data 1 hal_i2c_slave.o(.data) + s_i2c_s_receive_cnt 0x00071f86 Data 1 hal_i2c_slave.o(.data) + sg_i2c_s_index 0x00071f87 Data 1 hal_i2c_slave.o(.data) + s_hal_slave_rxbuffer 0x00071f88 Data 4 hal_i2c_slave.o(.data) + s_hal_slave_rxbuffer_size 0x00071f8c Data 4 hal_i2c_slave.o(.data) + hal_i2c_s_callback 0x00071f90 Data 4 hal_i2c_slave.o(.data) + sg_tx_byte_num 0x00071f94 Data 4 hal_i2c_slave.o(.data) + s_receive_count 0x00071f98 Data 4 hal_i2c_slave.o(.data) + s_tx_buffer_t 0x00071f9c Data 4 hal_i2c_slave.o(.data) + tx_sum 0x00071fa0 Data 4 hal_i2c_slave.o(.data) + .data 0x00071fa4 Section 228 app_tp_for_custom_s8.o(.data) + app_tp_count 0x00071fae Data 1 app_tp_for_custom_s8.o(.data) + phone_85_flag 0x00071faf Data 1 app_tp_for_custom_s8.o(.data) + phone_F6_flag 0x00071fb0 Data 1 app_tp_for_custom_s8.o(.data) + phone_E4_flag 0x00071fb1 Data 1 app_tp_for_custom_s8.o(.data) + phone_72_flag 0x00071fb2 Data 1 app_tp_for_custom_s8.o(.data) + phone_75_flag 0x00071fb3 Data 1 app_tp_for_custom_s8.o(.data) + phone_92_flag 0x00071fb4 Data 1 app_tp_for_custom_s8.o(.data) + phone_74_flag 0x00071fb5 Data 1 app_tp_for_custom_s8.o(.data) + u16CoordY 0x00071fb8 Data 2 app_tp_for_custom_s8.o(.data) + u16CoordX 0x00071fba Data 2 app_tp_for_custom_s8.o(.data) + u16CoordY_back 0x00071fbc Data 2 app_tp_for_custom_s8.o(.data) + u16CoordX_back 0x00071fbe Data 2 app_tp_for_custom_s8.o(.data) + .data 0x00072088 Section 1 app_tp_for_custom_s8.o(.data) + .data 0x00072089 Section 1 app_tp_for_custom_s8.o(.data) + .data 0x0007208a Section 1 app_tp_for_custom_s8.o(.data) + .data 0x0007208b Section 3 app_tp_for_custom_s8.o(.data) + .data 0x0007208e Section 5 app_tp_for_custom_s8.o(.data) + .data 0x00072094 Section 48 app_tp_for_custom_s8.o(.data) + .data 0x000720c4 Section 24 hal_internal_vsync.o(.data) + sg_cmd_mode_tx_start 0x000720c4 Data 1 hal_internal_vsync.o(.data) + sg_cur_te_info 0x000720c8 Data 4 hal_internal_vsync.o(.data) + g_cus_rx_write_cmd_handle 0x000720d0 Data 12 hal_internal_vsync.o(.data) + .data 0x000720dc Section 12 drv_common.o(.data) + s_my_tick 0x000720dc Data 4 drv_common.o(.data) + .data 0x000720e8 Section 4 drv_gpio.o(.data) + g_ap_reset_cb 0x000720e8 Data 4 drv_gpio.o(.data) + .data 0x000720ec Section 8 drv_i2c_dma.o(.data) + i2c0_dma_callback 0x000720ec Data 4 drv_i2c_dma.o(.data) + i2c1_dma_callback 0x000720f0 Data 4 drv_i2c_dma.o(.data) + .data 0x000720f4 Section 4 drv_i2c_master.o(.data) + i2c1_intr_callback 0x000720f4 Data 4 drv_i2c_master.o(.data) + .data 0x000720f8 Section 4 drv_i2c_slave.o(.data) + i2c0_intr_callback 0x000720f8 Data 4 drv_i2c_slave.o(.data) + .data 0x000720fc Section 1188 drv_param_init.o(.data) + .data 0x000725a0 Section 4 drv_spi_master.o(.data) + SPIM_intr_callback 0x000725a0 Data 4 drv_spi_master.o(.data) + .data 0x000725a4 Section 8 drv_swire.o(.data) + s_swire_cb 0x000725a4 Data 8 drv_swire.o(.data) + .data 0x000725ac Section 1 drv_sys_cfg.o(.data) + sg_ap_rstn_trigger_type 0x000725ac Data 1 drv_sys_cfg.o(.data) + .data 0x000725b0 Section 80 drv_timer.o(.data) + sg_timer_info 0x000725b0 Data 80 drv_timer.o(.data) + .data 0x00072600 Section 8 drv_rxbr.o(.data) + .data 0x00072608 Section 4 drv_vidc.o(.data) + .data 0x0007260c Section 1 drv_phy_common.o(.data) + g_phy_calibration 0x0007260c Data 1 drv_phy_common.o(.data) + .data 0x00072610 Section 12 drv_chip_info.o(.data) + sg_chip_info 0x00072610 Data 4 drv_chip_info.o(.data) + sg_chip_function 0x00072614 Data 4 drv_chip_info.o(.data) + sg_chip_encrypt 0x00072618 Data 4 drv_chip_info.o(.data) + .data 0x0007261c Section 6 app_tp_enc.o(.data) + init_flag 0x0007261c Data 1 app_tp_enc.o(.data) + g_u8EncryptFlag 0x0007261d Data 1 app_tp_enc.o(.data) + g_u8EncryptData 0x0007261e Data 1 app_tp_enc.o(.data) + g_u16EncryptCnt 0x00072620 Data 2 app_tp_enc.o(.data) + .data 0x00072624 Section 18 norflash.o(.data) + tmprg 0x0007262c Data 4 norflash.o(.data) + .data 0x00072638 Section 12 drv_pwm.o(.data) + s_pwm_type 0x00072638 Data 1 drv_pwm.o(.data) + s_pwm_cb 0x0007263c Data 8 drv_pwm.o(.data) + .data 0x00072644 Section 8 drv_uart.o(.data) + s_UartFcrReg 0x00072644 Data 4 drv_uart.o(.data) + uart_userData 0x00072648 Data 4 drv_uart.o(.data) + .data 0x0007264c Section 12 drv_wdg.o(.data) + sg_wdg_repeat 0x0007264c Data 1 drv_wdg.o(.data) + sg_wdg_cb 0x00072650 Data 8 drv_wdg.o(.data) + .data 0x00072658 Section 4 stdout.o(.data) + .data 0x0007265c Section 4 errno.o(.data) + _errno 0x0007265c Data 4 errno.o(.data) + .bss 0x00072660 Section 400 app_tp_transfer.o(.bss) + s_screen_read_buffer 0x00072660 Data 200 app_tp_transfer.o(.bss) + s_phone_read_buffer 0x00072728 Data 200 app_tp_transfer.o(.bss) + .bss 0x000727f0 Section 12 app_tp_st_touch.o(.bss) + .bss 0x000727fc Section 196 hal_dsi_rx_ctrl.o(.bss) + g_rx_ctrl_handle 0x000727fc Data 196 hal_dsi_rx_ctrl.o(.bss) + .bss 0x000728c0 Section 76 hal_dsi_tx_ctrl.o(.bss) + g_tx_ctrl_handle 0x000728c0 Data 76 hal_dsi_tx_ctrl.o(.bss) + .bss 0x0007290c Section 208 hal_uart.o(.bss) + .bss 0x000729dc Section 2436 hal_internal_vsync.o(.bss) + g_imm_buffer 0x00073240 Data 255 hal_internal_vsync.o(.bss) + sg_te_info 0x00073340 Data 12 hal_internal_vsync.o(.bss) + g_imm_packet 0x0007334c Data 20 hal_internal_vsync.o(.bss) + .bss 0x00073360 Section 28 drv_dma.o(.bss) + s_dma_handle 0x00073360 Data 28 drv_dma.o(.bss) + .bss 0x0007337c Section 64 drv_gpio.o(.bss) + s_gpio_cb 0x0007337c Data 64 drv_gpio.o(.bss) + .bss 0x000733bc Section 320 drv_i2c_dma.o(.bss) + i2c0_dma_slave_handle 0x000733bc Data 160 drv_i2c_dma.o(.bss) + i2c1_dma_master_handle 0x0007345c Data 160 drv_i2c_dma.o(.bss) + .bss 0x000734fc Section 4144 dcs_packet_fifo.o(.bss) + .bss 0x0007452c Section 256 tau_log.o(.bss) + .bss 0x0007462c Section 32 hal_spi_slave.o(.bss) + STACK 0x00074650 Section 4096 startup_armcm0.o(STACK) + + Global Symbols + + Symbol Name Value Ov Type Size Object(Section) + + BuildAttributes$$THM_ISAv3M$S$PE$A:L22$X:L11$S22$IEEE1$IW$USESV6$~STKCKD$USESV7$~SHL$OTIME$ROPI$IEEEJ$EBA8$MICROLIB$REQ8$PRES8$EABIv2 0x00000000 Number 0 anon$$obj.o ABSOLUTE + __ARM_use_no_argv 0x00000000 Number 0 main.o ABSOLUTE + _printf_a 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_c 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_charcount 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_d 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_e 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_f 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_flags 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_fp_dec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_fp_hex 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_g 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_i 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_int_dec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_l 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_lc 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_ll 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_lld 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_lli 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_llo 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_llu 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_llx 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_longlong_dec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_longlong_hex 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_longlong_oct 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_ls 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_mbtowc 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_n 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_o 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_p 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_percent 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_pre_padding 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_return_value 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_s 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_sizespec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_str 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_truncate_signed 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_truncate_unsigned 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_u 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_wc 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_wctomb 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_widthprec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_x 0x00000000 Number 0 stubs.o ABSOLUTE + __cpp_initialize__aeabi_ - Undefined Weak Reference + __cxa_finalize - Undefined Weak Reference + _clock_init - Undefined Weak Reference + _microlib_exit - Undefined Weak Reference + __Vectors_Size 0x000000c0 Number 0 startup_armcm0.o ABSOLUTE + __Vectors 0x00010000 Data 4 startup_armcm0.o(RESET) + __Vectors_End 0x000100c0 Data 0 startup_armcm0.o(RESET) + __main 0x000100c1 Thumb Code 0 entry.o(.ARM.Collect$$$$00000000) + _main_stk 0x000100c1 Thumb Code 0 entry2.o(.ARM.Collect$$$$00000001) + _main_scatterload 0x000100c5 Thumb Code 0 entry5.o(.ARM.Collect$$$$00000004) + __main_after_scatterload 0x000100c9 Thumb Code 0 entry5.o(.ARM.Collect$$$$00000004) + _main_clock 0x000100c9 Thumb Code 0 entry7b.o(.ARM.Collect$$$$00000008) + _main_cpp_init 0x000100c9 Thumb Code 0 entry8b.o(.ARM.Collect$$$$0000000A) + _main_init 0x000100c9 Thumb Code 0 entry9a.o(.ARM.Collect$$$$0000000B) + __rt_final_cpp 0x000100d1 Thumb Code 0 entry10a.o(.ARM.Collect$$$$0000000D) + __rt_final_exit 0x000100d1 Thumb Code 0 entry11a.o(.ARM.Collect$$$$0000000F) + Reset_Handler 0x000100d5 Thumb Code 28 startup_armcm0.o(.text) + NMI_Handler 0x000100f1 Thumb Code 2 startup_armcm0.o(.text) + SVC_Handler 0x000100f5 Thumb Code 2 startup_armcm0.o(.text) + PendSV_Handler 0x000100f7 Thumb Code 2 startup_armcm0.o(.text) + OTP_IRQn_Handler 0x00010123 Thumb Code 2 startup_armcm0.o(.text) + PVD_IRQn_Handler 0x00010127 Thumb Code 2 startup_armcm0.o(.text) + __aeabi_uidiv 0x0001014d Thumb Code 0 uidiv.o(.text) + __aeabi_uidivmod 0x0001014d Thumb Code 44 uidiv.o(.text) + __aeabi_idiv 0x00010179 Thumb Code 0 idiv.o(.text) + __aeabi_idivmod 0x00010179 Thumb Code 40 idiv.o(.text) + __aeabi_memcpy 0x000101a1 Thumb Code 36 memcpya.o(.text) + __aeabi_memcpy4 0x000101a1 Thumb Code 0 memcpya.o(.text) + __aeabi_memcpy8 0x000101a1 Thumb Code 0 memcpya.o(.text) + __aeabi_memset 0x000101c5 Thumb Code 14 memseta.o(.text) + __aeabi_memset4 0x000101c5 Thumb Code 0 memseta.o(.text) + __aeabi_memset8 0x000101c5 Thumb Code 0 memseta.o(.text) + __aeabi_memclr 0x000101d3 Thumb Code 4 memseta.o(.text) + __aeabi_memclr4 0x000101d3 Thumb Code 0 memseta.o(.text) + __aeabi_memclr8 0x000101d3 Thumb Code 0 memseta.o(.text) + _memset$wrapper 0x000101d7 Thumb Code 18 memseta.o(.text) + __aeabi_fadd 0x000101e9 Thumb Code 162 fadd.o(.text) + __aeabi_fsub 0x0001028b Thumb Code 8 fadd.o(.text) + __aeabi_frsub 0x00010293 Thumb Code 8 fadd.o(.text) + __aeabi_fmul 0x0001029b Thumb Code 122 fmul.o(.text) + __aeabi_fdiv 0x00010315 Thumb Code 124 fdiv.o(.text) + __ARM_scalbnf 0x00010391 Thumb Code 24 fscalb.o(.text) + scalbnf 0x00010391 Thumb Code 0 fscalb.o(.text) + __aeabi_dadd 0x000103a9 Thumb Code 328 dadd.o(.text) + __aeabi_dsub 0x000104f1 Thumb Code 12 dadd.o(.text) + __aeabi_drsub 0x000104fd Thumb Code 12 dadd.o(.text) + __aeabi_dmul 0x0001050d Thumb Code 202 dmul.o(.text) + __aeabi_ddiv 0x000105dd Thumb Code 234 ddiv.o(.text) + __aeabi_i2f 0x000106cd Thumb Code 22 fflti.o(.text) + __aeabi_ui2f 0x000106e3 Thumb Code 14 ffltui.o(.text) + __aeabi_ui2d 0x000106f1 Thumb Code 24 dfltui.o(.text) + __aeabi_f2iz 0x0001070d Thumb Code 50 ffixi.o(.text) + __aeabi_f2uiz 0x0001073f Thumb Code 40 ffixui.o(.text) + __aeabi_d2iz 0x00010769 Thumb Code 62 dfixi.o(.text) + __aeabi_d2uiz 0x000107b1 Thumb Code 50 dfixui.o(.text) + __aeabi_f2d 0x000107ed Thumb Code 40 f2d.o(.text) + __aeabi_cdcmpeq 0x00010815 Thumb Code 0 cdcmple.o(.text) + __aeabi_cdcmple 0x00010815 Thumb Code 38 cdcmple.o(.text) + __aeabi_cfrcmple 0x0001083d Thumb Code 20 cfrcmple.o(.text) + __aeabi_uldivmod 0x00010851 Thumb Code 96 uldiv.o(.text) + __aeabi_llsl 0x000108b1 Thumb Code 32 llshl.o(.text) + _ll_shift_l 0x000108b1 Thumb Code 0 llshl.o(.text) + __aeabi_llsr 0x000108d1 Thumb Code 34 llushr.o(.text) + _ll_ushift_r 0x000108d1 Thumb Code 0 llushr.o(.text) + __aeabi_lasr 0x000108f3 Thumb Code 38 llsshr.o(.text) + _ll_sshift_r 0x000108f3 Thumb Code 0 llsshr.o(.text) + __I$use$fp 0x00010919 Thumb Code 0 iusefp.o(.text) + _float_round 0x00010919 Thumb Code 16 fepilogue.o(.text) + _float_epilogue 0x00010929 Thumb Code 114 fepilogue.o(.text) + _double_round 0x0001099b Thumb Code 26 depilogue.o(.text) + _double_epilogue 0x000109b5 Thumb Code 164 depilogue.o(.text) + _dsqrt 0x00010a59 Thumb Code 162 dsqrt.o(.text) + __aeabi_d2ulz 0x00010afd Thumb Code 54 dfixul.o(.text) + __aeabi_cdrcmple 0x00010b3d Thumb Code 38 cdrcmple.o(.text) + __scatterload 0x00010b65 Thumb Code 28 init.o(.text) + __scatterload_rt2 0x00010b65 Thumb Code 0 init.o(.text) + __decompress 0x00010b89 Thumb Code 0 __dczerorl2.o(.text) + __decompress1 0x00010b89 Thumb Code 86 __dczerorl2.o(.text) + ADC_IRQn_Handler 0x00010be1 Thumb Code 18 irq_redirect .o(i.ADC_IRQn_Handler) + AP_NRESET_IRQn_Handler 0x00010bf9 Thumb Code 18 irq_redirect .o(i.AP_NRESET_IRQn_Handler) + DMA_IRQn_Handler 0x00010c11 Thumb Code 14 irq_redirect .o(i.DMA_IRQn_Handler) + EXTI_INT0_IRQn_Handler 0x00010c25 Thumb Code 22 irq_redirect .o(i.EXTI_INT0_IRQn_Handler) + EXTI_INT1_IRQn_Handler 0x00010c41 Thumb Code 22 irq_redirect .o(i.EXTI_INT1_IRQn_Handler) + EXTI_INT2_IRQn_Handler 0x00010c5d Thumb Code 22 irq_redirect .o(i.EXTI_INT2_IRQn_Handler) + EXTI_INT3_IRQn_Handler 0x00010c79 Thumb Code 22 irq_redirect .o(i.EXTI_INT3_IRQn_Handler) + EXTI_INT4_IRQn_Handler 0x00010c95 Thumb Code 22 irq_redirect .o(i.EXTI_INT4_IRQn_Handler) + EXTI_INT5_IRQn_Handler 0x00010cb1 Thumb Code 22 irq_redirect .o(i.EXTI_INT5_IRQn_Handler) + EXTI_INT6_IRQn_Handler 0x00010ccd Thumb Code 22 irq_redirect .o(i.EXTI_INT6_IRQn_Handler) + EXTI_INT7_IRQn_Handler 0x00010ce9 Thumb Code 22 irq_redirect .o(i.EXTI_INT7_IRQn_Handler) + EncryptCheck 0x00010d05 Thumb Code 90 app_tp_enc.o(i.EncryptCheck) + FLSCTRL_IRQn_Handler 0x00010d69 Thumb Code 14 irq_redirect .o(i.FLSCTRL_IRQn_Handler) + Gpio_swire_output 0x00010d7d Thumb Code 110 ap_demo.o(i.Gpio_swire_output) + HardFault_Handler 0x00010df1 Thumb Code 14 irq_redirect .o(i.HardFault_Handler) + I2C0_IRQn_Handler 0x00010e05 Thumb Code 18 irq_redirect .o(i.I2C0_IRQn_Handler) + I2C1_IRQn_Handler 0x00010e1d Thumb Code 18 irq_redirect .o(i.I2C1_IRQn_Handler) + LCDC_IRQn_Handler 0x00010e35 Thumb Code 18 irq_redirect .o(i.LCDC_IRQn_Handler) + LOG_printf 0x00010e4d Thumb Code 30 tau_log.o(i.LOG_printf) + MEMC_IRQn_Handler 0x00010e75 Thumb Code 18 irq_redirect .o(i.MEMC_IRQn_Handler) + MIPI_RX_IRQn_Handler 0x00010e8d Thumb Code 18 irq_redirect .o(i.MIPI_RX_IRQn_Handler) + MIPI_TX_IRQn_Handler 0x00010ea5 Thumb Code 18 irq_redirect .o(i.MIPI_TX_IRQn_Handler) + PWMDET_IRQn_Handler 0x00010ebd Thumb Code 22 irq_redirect .o(i.PWMDET_IRQn_Handler) + SPIM_IRQn_Handler 0x00010ed9 Thumb Code 22 irq_redirect .o(i.SPIM_IRQn_Handler) + SPIS_IRQn_Handler 0x00010ef5 Thumb Code 22 irq_redirect .o(i.SPIS_IRQn_Handler) + SWIRE_IRQn_Handler 0x00010f11 Thumb Code 22 irq_redirect .o(i.SWIRE_IRQn_Handler) + SysTick_Handler 0x00010f2d Thumb Code 18 irq_redirect .o(i.SysTick_Handler) + TIMER0_IRQn_Handler 0x00010f45 Thumb Code 18 irq_redirect .o(i.TIMER0_IRQn_Handler) + TIMER1_IRQn_Handler 0x00010f5d Thumb Code 18 irq_redirect .o(i.TIMER1_IRQn_Handler) + TIMER2_IRQn_Handler 0x00010f75 Thumb Code 18 irq_redirect .o(i.TIMER2_IRQn_Handler) + TIMER3_IRQn_Handler 0x00010f8d Thumb Code 18 irq_redirect .o(i.TIMER3_IRQn_Handler) + UART0_IRQ_Handle 0x00010fa5 Thumb Code 20 drv_uart.o(i.UART0_IRQ_Handle) + UART_DisableDma 0x00010fc1 Thumb Code 2 drv_uart.o(i.UART_DisableDma) + UART_GetInstance 0x00010fc3 Thumb Code 4 drv_uart.o(i.UART_GetInstance) + UART_IRQn_Handler 0x00010fc9 Thumb Code 18 irq_redirect .o(i.UART_IRQn_Handler) + UART_SwitchSCLK 0x00010fe1 Thumb Code 26 drv_uart.o(i.UART_SwitchSCLK) + __scatterload_null 0x00010ffb Thumb Code 2 handlers.o(i.__scatterload_null) + drv_dsi_rx_set_inten 0x00010ffd Thumb Code 4 drv_dsi_rx.o(i.drv_dsi_rx_set_inten) + s_RAM_CK 0x00011000 Data 20 drv_common.o(.ARM.__at_0x11000) + drv_dsi_tx_command_put_payload 0x00011015 Thumb Code 4 drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) + s_debug_state 0x00011018 Data 4 drv_common.o(.ARM.__at_0x11018) + S20_Start_init 0x0001101d Thumb Code 300 app_tp_transfer.o(i.S20_Start_init) + UART_ResetRxFIFO 0x00011161 Thumb Code 32 drv_uart.o(i.UART_ResetRxFIFO) + UART_SetBaudRate 0x00011185 Thumb Code 72 drv_uart.o(i.UART_SetBaudRate) + UART_TransferHandleIRQ 0x000111cd Thumb Code 308 drv_uart.o(i.UART_TransferHandleIRQ) + UART_WriteBlocking 0x00011301 Thumb Code 26 drv_uart.o(i.UART_WriteBlocking) + UART_init 0x0001131d Thumb Code 182 drv_uart.o(i.UART_init) + VIDC_IRQn_Handler 0x000113d9 Thumb Code 18 irq_redirect .o(i.VIDC_IRQn_Handler) + VPRE_IRQn_Handler 0x000113f1 Thumb Code 18 irq_redirect .o(i.VPRE_IRQn_Handler) + WDG_IRQn_Handler 0x00011409 Thumb Code 18 irq_redirect .o(i.WDG_IRQn_Handler) + __0printf 0x00011421 Thumb Code 24 printfa.o(i.__0printf) + __1printf 0x00011421 Thumb Code 0 printfa.o(i.__0printf) + __2printf 0x00011421 Thumb Code 0 printfa.o(i.__0printf) + __c89printf 0x00011421 Thumb Code 0 printfa.o(i.__0printf) + printf 0x00011421 Thumb Code 0 printfa.o(i.__0printf) + __0vsprintf 0x00011441 Thumb Code 30 printfa.o(i.__0vsprintf) + __1vsprintf 0x00011441 Thumb Code 0 printfa.o(i.__0vsprintf) + __2vsprintf 0x00011441 Thumb Code 0 printfa.o(i.__0vsprintf) + __c89vsprintf 0x00011441 Thumb Code 0 printfa.o(i.__0vsprintf) + vsprintf 0x00011441 Thumb Code 0 printfa.o(i.__0vsprintf) + __ARM_clz 0x00011465 Thumb Code 46 depilogue.o(i.__ARM_clz) + __ARM_common_switch8 0x00011493 Thumb Code 26 ap_demo.o(i.__ARM_common_switch8) + __scatterload_copy 0x00011559 Thumb Code 14 handlers.o(i.__scatterload_copy) + __scatterload_zeroinit 0x00011567 Thumb Code 14 handlers.o(i.__scatterload_zeroinit) + __set_errno 0x00011575 Thumb Code 6 errno.o(i.__set_errno) + ap_demo 0x00012e95 Thumb Code 292 ap_demo.o(i.ap_demo) + ap_get_tp_calibration_status_01 0x000130a5 Thumb Code 28 app_tp_st_touch.o(i.ap_get_tp_calibration_status_01) + ap_tp_st_touch_calibration 0x0001343d Thumb Code 170 app_tp_st_touch.o(i.ap_tp_st_touch_calibration) + ap_tp_st_touch_error_handler_F3 0x000134ed Thumb Code 26 app_tp_st_touch.o(i.ap_tp_st_touch_error_handler_F3) + ap_tp_st_touch_error_handler_FF 0x00013507 Thumb Code 32 app_tp_st_touch.o(i.ap_tp_st_touch_error_handler_FF) + ap_tp_st_touch_get_calibration_success_mark 0x00013529 Thumb Code 150 app_tp_st_touch.o(i.ap_tp_st_touch_get_calibration_success_mark) + ap_tp_st_touch_scan_point_init 0x000135d1 Thumb Code 24 app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_init) + ap_tp_st_touch_scan_point_record_event 0x000135ed Thumb Code 142 app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_record_event) + ap_tp_st_touch_scan_point_record_event_exec 0x00013681 Thumb Code 44 app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_record_event_exec) + ap_tp_st_touch_simulate_finger_release_event 0x000136b5 Thumb Code 44 app_tp_st_touch.o(i.ap_tp_st_touch_simulate_finger_release_event) + ap_tp_st_touch_software_reset 0x000136e9 Thumb Code 106 app_tp_st_touch.o(i.ap_tp_st_touch_software_reset) + app_ADC_IRQn_Handler 0x00013785 Thumb Code 22 drv_rxbr.o(i.app_ADC_IRQn_Handler) + app_AP_NRESET_IRQn_Handler 0x000137a1 Thumb Code 32 drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) + app_EXTI_INT0_IRQn_Handler 0x000137c5 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) + app_EXTI_INT1_IRQn_Handler 0x000137e1 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) + app_EXTI_INT2_IRQn_Handler 0x000137fd Thumb Code 22 drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) + app_EXTI_INT3_IRQn_Handler 0x00013819 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) + app_EXTI_INT4_IRQn_Handler 0x00013835 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) + app_EXTI_INT5_IRQn_Handler 0x00013851 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) + app_EXTI_INT6_IRQn_Handler 0x0001386d Thumb Code 22 drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) + app_EXTI_INT7_IRQn_Handler 0x00013889 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) + app_HardFault_Handler 0x000138a5 Thumb Code 12 drv_common.o(i.app_HardFault_Handler) + app_I2C0_IRQn_Handler 0x000138ed Thumb Code 14 drv_i2c_slave.o(i.app_I2C0_IRQn_Handler) + app_I2C1_IRQn_Handler 0x00013905 Thumb Code 8 drv_i2c_master.o(i.app_I2C1_IRQn_Handler) + app_LCDC_IRQn_Handler 0x00013915 Thumb Code 208 hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) + app_MEMC_IRQn_Handler 0x00013ab9 Thumb Code 132 drv_memc.o(i.app_MEMC_IRQn_Handler) + app_MIPI_RX_IRQn_Handler 0x00013b41 Thumb Code 232 drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) + app_MIPI_TX_IRQn_Handler 0x00013dd9 Thumb Code 56 drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) + app_PWMDET_IRQn_Handler 0x00013e79 Thumb Code 62 drv_pwm.o(i.app_PWMDET_IRQn_Handler) + app_SPIM_IRQn_Handler 0x00013ec1 Thumb Code 34 drv_spi_master.o(i.app_SPIM_IRQn_Handler) + app_SPIS_IRQn_Handler 0x00013ef1 Thumb Code 500 hal_spi_slave.o(i.app_SPIS_IRQn_Handler) + app_SWIRE_IRQn_Handler 0x000140f1 Thumb Code 28 drv_swire.o(i.app_SWIRE_IRQn_Handler) + app_SysTick_Handler 0x00014111 Thumb Code 20 drv_common.o(i.app_SysTick_Handler) + app_TIMER0_IRQn_Handler 0x00014129 Thumb Code 10 drv_timer.o(i.app_TIMER0_IRQn_Handler) + app_TIMER1_IRQn_Handler 0x00014133 Thumb Code 10 drv_timer.o(i.app_TIMER1_IRQn_Handler) + app_TIMER2_IRQn_Handler 0x0001413d Thumb Code 10 drv_timer.o(i.app_TIMER2_IRQn_Handler) + app_TIMER3_IRQn_Handler 0x00014147 Thumb Code 10 drv_timer.o(i.app_TIMER3_IRQn_Handler) + app_UART_IRQn_Handler 0x00014151 Thumb Code 8 drv_uart.o(i.app_UART_IRQn_Handler) + app_VIDC_IRQn_Handler 0x00014159 Thumb Code 22 drv_vidc.o(i.app_VIDC_IRQn_Handler) + app_VPRE_IRQn_Handler 0x00014175 Thumb Code 22 drv_rxbr.o(i.app_VPRE_IRQn_Handler) + app_WDG_IRQn_Handler 0x00014191 Thumb Code 52 drv_wdg.o(i.app_WDG_IRQn_Handler) + app_dma_irq_handler 0x000141c9 Thumb Code 10 drv_dma.o(i.app_dma_irq_handler) + app_fls_ctrl_Handler 0x000141d9 Thumb Code 38 norflash.o(i.app_fls_ctrl_Handler) + app_tp_I2C_init 0x00014209 Thumb Code 26 app_tp_transfer.o(i.app_tp_I2C_init) + app_tp_calibration_exec 0x0001422d Thumb Code 50 app_tp_st_touch.o(i.app_tp_calibration_exec) + app_tp_init 0x00014295 Thumb Code 56 app_tp_transfer.o(i.app_tp_init) + app_tp_m_read 0x000142d9 Thumb Code 32 app_tp_transfer.o(i.app_tp_m_read) + app_tp_m_write 0x000142f9 Thumb Code 8 app_tp_transfer.o(i.app_tp_m_write) + app_tp_phone_analysis_data 0x00014301 Thumb Code 992 app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) + app_tp_phone_clear_reset_on 0x0001471d Thumb Code 8 app_tp_transfer.o(i.app_tp_phone_clear_reset_on) + app_tp_s_read 0x00014729 Thumb Code 8 app_tp_transfer.o(i.app_tp_s_read) + app_tp_s_write 0x00014731 Thumb Code 8 app_tp_transfer.o(i.app_tp_s_write) + app_tp_screen_analysis_int 0x00014739 Thumb Code 718 app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) + app_tp_screen_init 0x00014a15 Thumb Code 42 app_tp_transfer.o(i.app_tp_screen_init) + app_tp_transfer_screen_int 0x00014a91 Thumb Code 336 app_tp_transfer.o(i.app_tp_transfer_screen_int) + app_tp_transfer_screen_start 0x00014bf1 Thumb Code 18 app_tp_transfer.o(i.app_tp_transfer_screen_start) + blue_change_ccm 0x00014c09 Thumb Code 54 ap_demo.o(i.blue_change_ccm) + board_Init 0x00014c41 Thumb Code 30 board.o(i.board_Init) + calc_framebuffer_setting 0x00014c65 Thumb Code 1258 hal_internal_vsync.o(i.calc_framebuffer_setting) + ceil 0x00015155 Thumb Code 180 ceil.o(i.ceil) + dcs_packet_fifo_alloc 0x000152d9 Thumb Code 80 dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) + dcs_packet_fifo_init 0x00015331 Thumb Code 18 dcs_packet_fifo.o(i.dcs_packet_fifo_init) + dcs_packet_free_fifo_header 0x00015349 Thumb Code 60 dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) + dcs_packet_get_fifo_header 0x0001538d Thumb Code 26 dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) + delayMs 0x000153dd Thumb Code 24 tau_delay.o(i.delayMs) + delayUs 0x000153f5 Thumb Code 34 tau_delay.o(i.delayUs) + drv_ap_rst_trig_edge_detect 0x00015471 Thumb Code 46 drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) + drv_chip_info_get_info 0x000154a9 Thumb Code 6 drv_chip_info.o(i.drv_chip_info_get_info) + drv_chip_info_init 0x000154b5 Thumb Code 56 drv_chip_info.o(i.drv_chip_info_init) + drv_chip_rx_info_check 0x000154f5 Thumb Code 98 drv_chip_info.o(i.drv_chip_rx_info_check) + drv_chip_rx_init_done 0x000155a5 Thumb Code 16 drv_chip_info.o(i.drv_chip_rx_init_done) + drv_common_enable_systick 0x000155b9 Thumb Code 70 drv_common.o(i.drv_common_enable_systick) + drv_common_system_init 0x00015611 Thumb Code 8 drv_common.o(i.drv_common_system_init) + drv_crgu_config_reset_modules 0x00015619 Thumb Code 10 drv_crgu.o(i.drv_crgu_config_reset_modules) + drv_crgu_set_ahb_pre_div 0x00015629 Thumb Code 14 drv_crgu.o(i.drv_crgu_set_ahb_pre_div) + drv_crgu_set_ahb_src 0x0001563d Thumb Code 16 drv_crgu.o(i.drv_crgu_set_ahb_src) + drv_crgu_set_clock 0x00015651 Thumb Code 26 drv_crgu.o(i.drv_crgu_set_clock) + drv_crgu_set_dpi_mux_src 0x00015671 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dpi_mux_src) + drv_crgu_set_dpi_pre_div 0x00015685 Thumb Code 18 drv_crgu.o(i.drv_crgu_set_dpi_pre_div) + drv_crgu_set_dpi_pre_src 0x0001569d Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dpi_pre_src) + drv_crgu_set_dsc_core_div 0x000156b1 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dsc_core_div) + drv_crgu_set_dsco_src 0x000156c5 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dsco_src) + drv_crgu_set_dsco_src_div 0x000156d9 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dsco_src_div) + drv_crgu_set_fb_div 0x000156ed Thumb Code 16 drv_crgu.o(i.drv_crgu_set_fb_div) + drv_crgu_set_fb_src 0x00015701 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_fb_src) + drv_crgu_set_lcdc_div 0x00015715 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_lcdc_div) + drv_crgu_set_lcdc_src 0x00015729 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_lcdc_src) + drv_crgu_set_mipi_cfg_src 0x0001573d Thumb Code 16 drv_crgu.o(i.drv_crgu_set_mipi_cfg_src) + drv_crgu_set_mipi_ref_src 0x00015751 Thumb Code 18 drv_crgu.o(i.drv_crgu_set_mipi_ref_src) + drv_crgu_set_reset 0x00015769 Thumb Code 20 drv_crgu.o(i.drv_crgu_set_reset) + drv_crgu_set_rxbr_div 0x00015781 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_rxbr_div) + drv_crgu_set_rxbr_src 0x00015795 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_rxbr_src) + drv_crgu_set_vidc_src 0x000157a9 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_vidc_src) + drv_dma_clear_flag 0x000157bd Thumb Code 24 drv_dma.o(i.drv_dma_clear_flag) + drv_dma_create_handle 0x000157d5 Thumb Code 22 drv_dma.o(i.drv_dma_create_handle) + drv_dma_disenable_channel 0x000157f1 Thumb Code 16 drv_dma.o(i.drv_dma_disenable_channel) + drv_dma_enable_channel 0x00015801 Thumb Code 16 drv_dma.o(i.drv_dma_enable_channel) + drv_dma_enable_channel_interrupts 0x00015811 Thumb Code 32 drv_dma.o(i.drv_dma_enable_channel_interrupts) + drv_dma_get_channel_flag 0x00015835 Thumb Code 12 drv_dma.o(i.drv_dma_get_channel_flag) + drv_dma_irq_handler 0x00015841 Thumb Code 138 drv_dma.o(i.drv_dma_irq_handler) + drv_dma_prepar_transfer 0x000158d1 Thumb Code 18 drv_dma.o(i.drv_dma_prepar_transfer) + drv_dma_set_burst 0x000158e3 Thumb Code 26 drv_dma.o(i.drv_dma_set_burst) + drv_dma_set_callback 0x000158fd Thumb Code 6 drv_dma.o(i.drv_dma_set_callback) + drv_dma_set_transfer 0x00015905 Thumb Code 62 drv_dma.o(i.drv_dma_set_transfer) + drv_dsc_dec_convert_pps_rc_parameter 0x00015949 Thumb Code 54 drv_dsc_dec.o(i.drv_dsc_dec_convert_pps_rc_parameter) + drv_dsc_dec_disable 0x0001597f Thumb Code 12 drv_dsc_dec.o(i.drv_dsc_dec_disable) + drv_dsc_dec_enable 0x0001598d Thumb Code 88 drv_dsc_dec.o(i.drv_dsc_dec_enable) + drv_dsc_dec_get_nslc 0x00015a01 Thumb Code 10 drv_dsc_dec.o(i.drv_dsc_dec_get_nslc) + drv_dsc_dec_set_u8_pps 0x00015a0b Thumb Code 40 drv_dsc_dec.o(i.drv_dsc_dec_set_u8_pps) + drv_dsi_rx_calc_ipi_tx_delay 0x00015a35 Thumb Code 244 drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) + drv_dsi_rx_enable_irq 0x00015b39 Thumb Code 58 drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) + drv_dsi_rx_get_compression_en 0x00015be5 Thumb Code 8 drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) + drv_dsi_rx_get_max_ret_size 0x00015bed Thumb Code 6 drv_dsi_rx.o(i.drv_dsi_rx_get_max_ret_size) + drv_dsi_rx_power_up 0x00015bf3 Thumb Code 14 drv_dsi_rx.o(i.drv_dsi_rx_power_up) + drv_dsi_rx_set_ctrl_cfg 0x00015c01 Thumb Code 32 drv_dsi_rx.o(i.drv_dsi_rx_set_ctrl_cfg) + drv_dsi_rx_set_ddi_cfg 0x00015c21 Thumb Code 16 drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) + drv_dsi_rx_set_ipi_cfg 0x00015c31 Thumb Code 16 drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_cfg) + drv_dsi_rx_set_lane_swap 0x00015c41 Thumb Code 70 drv_dsi_rx.o(i.drv_dsi_rx_set_lane_swap) + drv_dsi_rx_set_resp_cnt 0x00015c87 Thumb Code 38 drv_dsi_rx.o(i.drv_dsi_rx_set_resp_cnt) + drv_dsi_rx_set_up_phy 0x00015cad Thumb Code 256 drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) + drv_dsi_rx_shut_down 0x00015db1 Thumb Code 14 drv_dsi_rx.o(i.drv_dsi_rx_shut_down) + drv_dsi_tx_command_header 0x00015dbf Thumb Code 20 drv_dsi_tx.o(i.drv_dsi_tx_command_header) + drv_dsi_tx_command_mode_cfg 0x00015dd3 Thumb Code 108 drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) + drv_dsi_tx_config_eotp 0x00015e3f Thumb Code 24 drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) + drv_dsi_tx_config_int 0x00015e57 Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_config_int) + drv_dsi_tx_dpi_lpcmd_time 0x00015e5f Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_dpi_lpcmd_time) + drv_dsi_tx_dpi_mode 0x00015e67 Thumb Code 10 drv_dsi_tx.o(i.drv_dsi_tx_dpi_mode) + drv_dsi_tx_dpi_polarity 0x00015e71 Thumb Code 36 drv_dsi_tx.o(i.drv_dsi_tx_dpi_polarity) + drv_dsi_tx_edpi_cmd_size 0x00015e95 Thumb Code 4 drv_dsi_tx.o(i.drv_dsi_tx_edpi_cmd_size) + drv_dsi_tx_get_cmd_status 0x00015e99 Thumb Code 4 drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) + drv_dsi_tx_mode 0x00015e9d Thumb Code 4 drv_dsi_tx.o(i.drv_dsi_tx_mode) + drv_dsi_tx_phy_clock_lane_auto_lp 0x00015ea1 Thumb Code 24 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_auto_lp) + drv_dsi_tx_phy_clock_lane_req_hs 0x00015eb9 Thumb Code 26 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) + drv_dsi_tx_phy_lane_mode 0x00015ed3 Thumb Code 12 drv_dsi_tx.o(i.drv_dsi_tx_phy_lane_mode) + drv_dsi_tx_phy_status_ready 0x00015edf Thumb Code 100 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ready) + drv_dsi_tx_phy_status_stopstate 0x00015f43 Thumb Code 62 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) + drv_dsi_tx_phy_test_setup 0x00015f81 Thumb Code 308 drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) + drv_dsi_tx_phy_time_cfg 0x000160b5 Thumb Code 30 drv_dsi_tx.o(i.drv_dsi_tx_phy_time_cfg) + drv_dsi_tx_powerup 0x000160d3 Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_powerup) + drv_dsi_tx_response_mode 0x000160db Thumb Code 28 drv_dsi_tx.o(i.drv_dsi_tx_response_mode) + drv_dsi_tx_set_bta_ack 0x000160f7 Thumb Code 24 drv_dsi_tx.o(i.drv_dsi_tx_set_bta_ack) + drv_dsi_tx_set_esc_div 0x0001610f Thumb Code 12 drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) + drv_dsi_tx_set_int 0x0001611d Thumb Code 58 drv_dsi_tx.o(i.drv_dsi_tx_set_int) + drv_dsi_tx_set_time_out_div 0x0001615d Thumb Code 16 drv_dsi_tx.o(i.drv_dsi_tx_set_time_out_div) + drv_dsi_tx_set_video_chunk 0x0001616d Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_set_video_chunk) + drv_dsi_tx_set_video_timing 0x00016175 Thumb Code 34 drv_dsi_tx.o(i.drv_dsi_tx_set_video_timing) + drv_dsi_tx_shutdown 0x00016197 Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_shutdown) + drv_dsi_tx_timeout_cfg 0x0001619f Thumb Code 38 drv_dsi_tx.o(i.drv_dsi_tx_timeout_cfg) + drv_dsi_tx_video_mode_cfg 0x000161c5 Thumb Code 170 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_cfg) + drv_dsi_tx_video_mode_disable_hact_cmd 0x0001626f Thumb Code 22 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_disable_hact_cmd) + drv_dsi_tx_video_mode_set_lp_cmd 0x00016285 Thumb Code 24 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_set_lp_cmd) + drv_efuse_enter_inactive 0x0001629d Thumb Code 46 drv_efuse.o(i.drv_efuse_enter_inactive) + drv_efuse_int_enable 0x000162cb Thumb Code 12 drv_efuse.o(i.drv_efuse_int_enable) + drv_efuse_read 0x000162d7 Thumb Code 50 drv_efuse.o(i.drv_efuse_read) + drv_efuse_read_req 0x00016309 Thumb Code 24 drv_efuse.o(i.drv_efuse_read_req) + drv_gpio_get_input_data 0x00016321 Thumb Code 20 drv_gpio.o(i.drv_gpio_get_input_data) + drv_gpio_register_ap_reset_callback 0x00016339 Thumb Code 6 drv_gpio.o(i.drv_gpio_register_ap_reset_callback) + drv_gpio_register_callback 0x00016345 Thumb Code 14 drv_gpio.o(i.drv_gpio_register_callback) + drv_gpio_set_int 0x00016359 Thumb Code 74 drv_gpio.o(i.drv_gpio_set_int) + drv_gpio_set_ioe 0x000163a9 Thumb Code 26 drv_gpio.o(i.drv_gpio_set_ioe) + drv_gpio_set_mode0 0x000163c9 Thumb Code 12 drv_gpio.o(i.drv_gpio_set_mode0) + drv_gpio_set_mode1 0x000163d9 Thumb Code 12 drv_gpio.o(i.drv_gpio_set_mode1) + drv_gpio_set_mode2 0x000163e9 Thumb Code 12 drv_gpio.o(i.drv_gpio_set_mode2) + drv_gpio_set_mode3 0x000163f9 Thumb Code 12 drv_gpio.o(i.drv_gpio_set_mode3) + drv_gpio_set_pull_state 0x00016429 Thumb Code 298 drv_gpio.o(i.drv_gpio_set_pull_state) + drv_i2c0_set_callback 0x00016559 Thumb Code 6 drv_i2c_slave.o(i.drv_i2c0_set_callback) + drv_i2c1_set_callback 0x00016565 Thumb Code 6 drv_i2c_master.o(i.drv_i2c1_set_callback) + drv_i2c_dma_init 0x000165a5 Thumb Code 146 drv_i2c_dma.o(i.drv_i2c_dma_init) + drv_i2c_enable_rx_dma 0x00016651 Thumb Code 26 drv_i2c_dma.o(i.drv_i2c_enable_rx_dma) + drv_i2c_enable_tx_dma 0x0001666b Thumb Code 24 drv_i2c_dma.o(i.drv_i2c_enable_tx_dma) + drv_i2c_m_clear_it_pending_bit 0x00016685 Thumb Code 86 drv_i2c_master.o(i.drv_i2c_m_clear_it_pending_bit) + drv_i2c_m_enable 0x000166e5 Thumb Code 10 drv_i2c_master.o(i.drv_i2c_m_enable) + drv_i2c_m_enable_intr 0x000166f5 Thumb Code 42 drv_i2c_master.o(i.drv_i2c_m_enable_intr) + drv_i2c_master_init 0x0001672d Thumb Code 118 drv_i2c_master.o(i.drv_i2c_master_init) + drv_i2c_master_read_dma 0x000167b9 Thumb Code 82 drv_i2c_dma.o(i.drv_i2c_master_read_dma) + drv_i2c_master_write_dma 0x00016815 Thumb Code 50 drv_i2c_dma.o(i.drv_i2c_master_write_dma) + drv_i2c_s_clear_it_pending_bit 0x0001688f Thumb Code 66 drv_i2c_slave.o(i.drv_i2c_s_clear_it_pending_bit) + drv_i2c_s_config_intr 0x000168d1 Thumb Code 4 drv_i2c_slave.o(i.drv_i2c_s_config_intr) + drv_i2c_s_enable 0x000168d5 Thumb Code 8 drv_i2c_slave.o(i.drv_i2c_s_enable) + drv_i2c_s_get_fifo_status 0x000168dd Thumb Code 20 drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) + drv_i2c_s_set_intr 0x000168f1 Thumb Code 74 drv_i2c_slave.o(i.drv_i2c_s_set_intr) + drv_i2c_s_write_data 0x00016941 Thumb Code 28 drv_i2c_slave.o(i.drv_i2c_s_write_data) + drv_i2c_set_dma_irq_callback 0x0001695d Thumb Code 68 drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) + drv_i2c_slave_init 0x000169b5 Thumb Code 50 drv_i2c_slave.o(i.drv_i2c_slave_init) + drv_i2c_slave_write_dma 0x000169e9 Thumb Code 20 drv_i2c_dma.o(i.drv_i2c_slave_write_dma) + drv_lcdc_config_bypass 0x00016a01 Thumb Code 24 drv_lcdc.o(i.drv_lcdc_config_bypass) + drv_lcdc_config_ccm 0x00016a19 Thumb Code 48 drv_lcdc.o(i.drv_lcdc_config_ccm) + drv_lcdc_config_disp_mode 0x00016a49 Thumb Code 22 drv_lcdc.o(i.drv_lcdc_config_disp_mode) + drv_lcdc_config_dpi_polarity 0x00016a5f Thumb Code 36 drv_lcdc.o(i.drv_lcdc_config_dpi_polarity) + drv_lcdc_config_dpi_timing 0x00016a83 Thumb Code 38 drv_lcdc.o(i.drv_lcdc_config_dpi_timing) + drv_lcdc_config_edpi_mode 0x00016aa9 Thumb Code 22 drv_lcdc.o(i.drv_lcdc_config_edpi_mode) + drv_lcdc_config_endianness 0x00016abf Thumb Code 22 drv_lcdc.o(i.drv_lcdc_config_endianness) + drv_lcdc_config_input_size 0x00016ad5 Thumb Code 12 drv_lcdc.o(i.drv_lcdc_config_input_size) + drv_lcdc_config_int 0x00016ae1 Thumb Code 30 drv_lcdc.o(i.drv_lcdc_config_int) + drv_lcdc_config_int_single 0x00016aff Thumb Code 34 drv_lcdc.o(i.drv_lcdc_config_int_single) + drv_lcdc_config_overwrite 0x00016b21 Thumb Code 34 drv_lcdc.o(i.drv_lcdc_config_overwrite) + drv_lcdc_config_overwrite_rgb 0x00016b43 Thumb Code 12 drv_lcdc.o(i.drv_lcdc_config_overwrite_rgb) + drv_lcdc_config_partial_display_area 0x00016b4f Thumb Code 26 drv_lcdc.o(i.drv_lcdc_config_partial_display_area) + drv_lcdc_config_partial_display_enable 0x00016b69 Thumb Code 34 drv_lcdc.o(i.drv_lcdc_config_partial_display_enable) + drv_lcdc_config_scale_up_coef 0x00016b8b Thumb Code 26 drv_lcdc.o(i.drv_lcdc_config_scale_up_coef) + drv_lcdc_config_scale_up_step 0x00016ba5 Thumb Code 12 drv_lcdc.o(i.drv_lcdc_config_scale_up_step) + drv_lcdc_config_src_parameter 0x00016bb1 Thumb Code 76 drv_lcdc.o(i.drv_lcdc_config_src_parameter) + drv_lcdc_config_thresh 0x00016bfd Thumb Code 6 drv_lcdc.o(i.drv_lcdc_config_thresh) + drv_lcdc_ctrl_flow 0x00016c03 Thumb Code 18 drv_lcdc.o(i.drv_lcdc_ctrl_flow) + drv_lcdc_enable_shadow_reg 0x00016c15 Thumb Code 32 drv_lcdc.o(i.drv_lcdc_enable_shadow_reg) + drv_lcdc_set_int 0x00016c35 Thumb Code 58 drv_lcdc.o(i.drv_lcdc_set_int) + drv_lcdc_set_prefetch 0x00016c75 Thumb Code 24 drv_lcdc.o(i.drv_lcdc_set_prefetch) + drv_lcdc_set_video_hw_mode 0x00016c8d Thumb Code 20 drv_lcdc.o(i.drv_lcdc_set_video_hw_mode) + drv_lcdc_start 0x00016ca1 Thumb Code 32 drv_lcdc.o(i.drv_lcdc_start) + drv_memc_clear_status 0x00016cc1 Thumb Code 12 drv_memc.o(i.drv_memc_clear_status) + drv_memc_enable_irq 0x00016ccd Thumb Code 58 drv_memc.o(i.drv_memc_enable_irq) + drv_memc_gen_a_tear_signal 0x00016d0d Thumb Code 12 drv_memc.o(i.drv_memc_gen_a_tear_signal) + drv_memc_get_status 0x00016d19 Thumb Code 18 drv_memc.o(i.drv_memc_get_status) + drv_memc_rate_transfer_sel 0x00016d2b Thumb Code 16 drv_memc.o(i.drv_memc_rate_transfer_sel) + drv_memc_sel_vsync 0x00016d3b Thumb Code 14 drv_memc.o(i.drv_memc_sel_vsync) + drv_memc_set_active_height 0x00016d49 Thumb Code 14 drv_memc.o(i.drv_memc_set_active_height) + drv_memc_set_data_mode 0x00016d5d Thumb Code 12 drv_memc.o(i.drv_memc_set_data_mode) + drv_memc_set_double_buffer 0x00016d69 Thumb Code 16 drv_memc.o(i.drv_memc_set_double_buffer) + drv_memc_set_double_buffer_reverse 0x00016d79 Thumb Code 18 drv_memc.o(i.drv_memc_set_double_buffer_reverse) + drv_memc_set_fs_en_conditions 0x00016d8b Thumb Code 16 drv_memc.o(i.drv_memc_set_fs_en_conditions) + drv_memc_set_inten 0x00016d9b Thumb Code 20 drv_memc.o(i.drv_memc_set_inten) + drv_memc_set_lcdc_st_conditions 0x00016db1 Thumb Code 18 drv_memc.o(i.drv_memc_set_lcdc_st_conditions) + drv_memc_set_ltpo_mode 0x00016dc9 Thumb Code 26 drv_memc.o(i.drv_memc_set_ltpo_mode) + drv_memc_set_tear_mode 0x00016de3 Thumb Code 14 drv_memc.o(i.drv_memc_set_tear_mode) + drv_memc_set_tear_waveform 0x00016df1 Thumb Code 34 drv_memc.o(i.drv_memc_set_tear_waveform) + drv_memc_set_vidc_sync_cnt 0x00016e19 Thumb Code 14 drv_memc.o(i.drv_memc_set_vidc_sync_cnt) + drv_param_init_get_ccm 0x00016e29 Thumb Code 4 drv_param_init.o(i.drv_param_init_get_ccm) + drv_param_init_get_scld_filter_h 0x00016e31 Thumb Code 12 drv_param_init.o(i.drv_param_init_get_scld_filter_h) + drv_param_init_get_scld_filter_v 0x00016e45 Thumb Code 12 drv_param_init.o(i.drv_param_init_get_scld_filter_v) + drv_param_init_get_sclu_filter 0x00016e59 Thumb Code 4 drv_param_init.o(i.drv_param_init_get_sclu_filter) + drv_param_init_set_ccm 0x00016e61 Thumb Code 14 drv_param_init.o(i.drv_param_init_set_ccm) + drv_param_p2r_filter_init 0x00016e75 Thumb Code 30 drv_param_init.o(i.drv_param_p2r_filter_init) + drv_phy_enable_calibration 0x00016e99 Thumb Code 12 drv_phy_common.o(i.drv_phy_enable_calibration) + drv_phy_get_calibration 0x00016ea9 Thumb Code 50 drv_phy_common.o(i.drv_phy_get_calibration) + drv_phy_get_pll_para 0x00016ee5 Thumb Code 88 drv_phy_common.o(i.drv_phy_get_pll_para) + drv_phy_get_rate_para 0x00016f45 Thumb Code 76 drv_phy_common.o(i.drv_phy_get_rate_para) + drv_phy_test_clear 0x00016f99 Thumb Code 16 drv_phy_common.o(i.drv_phy_test_clear) + drv_phy_test_lock 0x00016fa9 Thumb Code 24 drv_phy_common.o(i.drv_phy_test_lock) + drv_phy_test_write_1_byte 0x00016fc1 Thumb Code 32 drv_phy_common.o(i.drv_phy_test_write_1_byte) + drv_phy_test_write_2_byte 0x00016fe1 Thumb Code 38 drv_phy_common.o(i.drv_phy_test_write_2_byte) + drv_phy_test_write_code 0x00017007 Thumb Code 30 drv_phy_common.o(i.drv_phy_test_write_code) + drv_pwr_set_cp_mode 0x00017045 Thumb Code 26 drv_pwr.o(i.drv_pwr_set_cp_mode) + drv_pwr_set_pvd_mode 0x00017065 Thumb Code 18 drv_pwr.o(i.drv_pwr_set_pvd_mode) + drv_pwr_set_system_clk_src 0x0001707d Thumb Code 44 drv_pwr.o(i.drv_pwr_set_system_clk_src) + drv_rxbr_clear_pkt_buffer 0x000170fb Thumb Code 10 drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) + drv_rxbr_clear_status0 0x00017105 Thumb Code 4 drv_rxbr.o(i.drv_rxbr_clear_status0) + drv_rxbr_enable_irq 0x00017109 Thumb Code 90 drv_rxbr.o(i.drv_rxbr_enable_irq) + drv_rxbr_frame_drop_cfg 0x00017165 Thumb Code 16 drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) + drv_rxbr_get_clk 0x00017179 Thumb Code 66 drv_rxbr.o(i.drv_rxbr_get_clk) + drv_rxbr_get_col_addr 0x000171dd Thumb Code 4 drv_rxbr.o(i.drv_rxbr_get_col_addr) + drv_rxbr_get_page_addr 0x000171f3 Thumb Code 4 drv_rxbr.o(i.drv_rxbr_get_page_addr) + drv_rxbr_hline_rcv0_cfg 0x00017209 Thumb Code 12 drv_rxbr.o(i.drv_rxbr_hline_rcv0_cfg) + drv_rxbr_hline_rcv_cfg 0x00017215 Thumb Code 8 drv_rxbr.o(i.drv_rxbr_hline_rcv_cfg) + drv_rxbr_register_irq0_callback 0x0001721d Thumb Code 6 drv_rxbr.o(i.drv_rxbr_register_irq0_callback) + drv_rxbr_register_irq1_callback 0x00017229 Thumb Code 6 drv_rxbr.o(i.drv_rxbr_register_irq1_callback) + drv_rxbr_set_ack_pkt_header 0x00017235 Thumb Code 20 drv_rxbr.o(i.drv_rxbr_set_ack_pkt_header) + drv_rxbr_set_cmd_filter 0x00017249 Thumb Code 204 drv_rxbr.o(i.drv_rxbr_set_cmd_filter) + drv_rxbr_set_color_format 0x00017315 Thumb Code 20 drv_rxbr.o(i.drv_rxbr_set_color_format) + drv_rxbr_set_inten 0x00017329 Thumb Code 20 drv_rxbr.o(i.drv_rxbr_set_inten) + drv_rxbr_set_ltpo_drop_th 0x0001733d Thumb Code 16 drv_rxbr.o(i.drv_rxbr_set_ltpo_drop_th) + drv_rxbr_set_usr_cfg 0x0001734d Thumb Code 38 drv_rxbr.o(i.drv_rxbr_set_usr_cfg) + drv_rxbr_set_usr_col 0x00017373 Thumb Code 8 drv_rxbr.o(i.drv_rxbr_set_usr_col) + drv_rxbr_set_usr_row 0x0001737b Thumb Code 8 drv_rxbr.o(i.drv_rxbr_set_usr_row) + drv_spi_m_read_data 0x00017385 Thumb Code 28 drv_spi_master.o(i.drv_spi_m_read_data) + drv_swire_set_int 0x000173a5 Thumb Code 76 drv_swire.o(i.drv_swire_set_int) + drv_swire_set_power_down 0x000173f9 Thumb Code 24 drv_swire.o(i.drv_swire_set_power_down) + drv_sys_cfg_clear_all_int 0x00017415 Thumb Code 8 drv_sys_cfg.o(i.drv_sys_cfg_clear_all_int) + drv_sys_cfg_clear_pending 0x00017421 Thumb Code 32 drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) + drv_sys_cfg_sel_ap_rst_lvl_trig 0x00017449 Thumb Code 18 drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_lvl_trig) + drv_sys_cfg_sel_ap_rst_trig 0x00017461 Thumb Code 22 drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) + drv_sys_cfg_sel_gpio_group 0x0001747d Thumb Code 30 drv_sys_cfg.o(i.drv_sys_cfg_sel_gpio_group) + drv_sys_cfg_sel_int_trig 0x000174a1 Thumb Code 30 drv_sys_cfg.o(i.drv_sys_cfg_sel_int_trig) + drv_sys_cfg_set_dma_rx_req 0x000174c5 Thumb Code 10 drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) + drv_sys_cfg_set_dma_tx_req 0x000174d5 Thumb Code 10 drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) + drv_sys_cfg_set_int 0x000174e5 Thumb Code 30 drv_sys_cfg.o(i.drv_sys_cfg_set_int) + drv_timer_enable 0x00017523 Thumb Code 32 drv_timer.o(i.drv_timer_enable) + drv_timer_get_instance 0x00017545 Thumb Code 10 drv_timer.o(i.drv_timer_get_instance) + drv_timer_get_prescaler 0x00017555 Thumb Code 12 drv_timer.o(i.drv_timer_get_prescaler) + drv_timer_register_callback 0x000175a9 Thumb Code 14 drv_timer.o(i.drv_timer_register_callback) + drv_timer_set_compare_val 0x000175bd Thumb Code 16 drv_timer.o(i.drv_timer_set_compare_val) + drv_timer_set_int 0x000175cd Thumb Code 80 drv_timer.o(i.drv_timer_set_int) + drv_timer_set_prescaler 0x00017621 Thumb Code 36 drv_timer.o(i.drv_timer_set_prescaler) + drv_tx_phy_test_enter 0x00017653 Thumb Code 28 drv_dsi_tx.o(i.drv_tx_phy_test_enter) + drv_tx_phy_test_exit 0x0001766f Thumb Code 28 drv_dsi_tx.o(i.drv_tx_phy_test_exit) + drv_vidc_clear_irq 0x000176c1 Thumb Code 8 drv_vidc.o(i.drv_vidc_clear_irq) + drv_vidc_enable 0x000176c9 Thumb Code 24 drv_vidc.o(i.drv_vidc_enable) + drv_vidc_enable_irq 0x000176e1 Thumb Code 58 drv_vidc.o(i.drv_vidc_enable_irq) + drv_vidc_get_irq_status 0x00017721 Thumb Code 18 drv_vidc.o(i.drv_vidc_get_irq_status) + drv_vidc_init_module_enable 0x00017735 Thumb Code 36 drv_vidc.o(i.drv_vidc_init_module_enable) + drv_vidc_register_callback 0x0001775d Thumb Code 6 drv_vidc.o(i.drv_vidc_register_callback) + drv_vidc_reset 0x00017769 Thumb Code 6 drv_vidc.o(i.drv_vidc_reset) + drv_vidc_set_dst_parameter 0x0001776f Thumb Code 60 drv_vidc.o(i.drv_vidc_set_dst_parameter) + drv_vidc_set_irqen 0x000177ab Thumb Code 20 drv_vidc.o(i.drv_vidc_set_irqen) + drv_vidc_set_mirror 0x000177bf Thumb Code 16 drv_vidc.o(i.drv_vidc_set_mirror) + drv_vidc_set_p2r_hcoef0 0x000177cf Thumb Code 8 drv_vidc.o(i.drv_vidc_set_p2r_hcoef0) + drv_vidc_set_p2r_hinitb 0x000177d7 Thumb Code 38 drv_vidc.o(i.drv_vidc_set_p2r_hinitb) + drv_vidc_set_p2r_hinitr 0x000177fd Thumb Code 38 drv_vidc.o(i.drv_vidc_set_p2r_hinitr) + drv_vidc_set_pentile_swap 0x00017825 Thumb Code 18 drv_vidc.o(i.drv_vidc_set_pentile_swap) + drv_vidc_set_pu_ctrl 0x0001783d Thumb Code 10 drv_vidc.o(i.drv_vidc_set_pu_ctrl) + drv_vidc_set_rotation 0x00017847 Thumb Code 16 drv_vidc.o(i.drv_vidc_set_rotation) + drv_vidc_set_scld_hcoef0 0x00017857 Thumb Code 10 drv_vidc.o(i.drv_vidc_set_scld_hcoef0) + drv_vidc_set_scld_hcoef1 0x00017861 Thumb Code 10 drv_vidc.o(i.drv_vidc_set_scld_hcoef1) + drv_vidc_set_scld_step 0x0001786b Thumb Code 18 drv_vidc.o(i.drv_vidc_set_scld_step) + drv_vidc_set_scld_vcoef0 0x0001787d Thumb Code 10 drv_vidc.o(i.drv_vidc_set_scld_vcoef0) + drv_vidc_set_scld_vcoef1 0x00017887 Thumb Code 10 drv_vidc.o(i.drv_vidc_set_scld_vcoef1) + drv_vidc_set_src_parameter 0x00017891 Thumb Code 22 drv_vidc.o(i.drv_vidc_set_src_parameter) + drv_wdg_clear_counter 0x000178a9 Thumb Code 12 drv_wdg.o(i.drv_wdg_clear_counter) + drv_wdg_set_int 0x000178d9 Thumb Code 60 drv_wdg.o(i.drv_wdg_set_int) + fls_clr_interrupt_flag 0x00017919 Thumb Code 10 drv_fls.o(i.fls_clr_interrupt_flag) + fputc 0x00017923 Thumb Code 20 tau_log.o(i.fputc) + hal_dsi_rx_ctrl_create_handle 0x00017939 Thumb Code 48 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) + hal_dsi_rx_ctrl_deinit 0x0001796d Thumb Code 148 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) + hal_dsi_rx_ctrl_dsc_async_handler 0x00017a09 Thumb Code 120 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) + hal_dsi_rx_ctrl_gen_a_tear_signal 0x00017a8d Thumb Code 32 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) + hal_dsi_rx_ctrl_get_max_ret_size 0x00017ab5 Thumb Code 30 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) + hal_dsi_rx_ctrl_hight_performan_mode 0x00017add Thumb Code 16 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) + hal_dsi_rx_ctrl_init 0x00017b41 Thumb Code 144 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) + hal_dsi_rx_ctrl_pre_init_pps 0x00018321 Thumb Code 56 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_pre_init_pps) + hal_dsi_rx_ctrl_send_ack_cmd 0x0001835d Thumb Code 212 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) + hal_dsi_rx_ctrl_set_cus_sync_line 0x0001844d Thumb Code 44 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) + hal_dsi_rx_ctrl_set_hw_tear_mode 0x00018481 Thumb Code 42 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode) + hal_dsi_rx_ctrl_set_sw_tear_mode 0x00018561 Thumb Code 42 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) + hal_dsi_rx_ctrl_set_tear_mode_ex 0x00018595 Thumb Code 14 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_tear_mode_ex) + hal_dsi_rx_ctrl_start 0x000185a5 Thumb Code 46 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) + hal_dsi_rx_ctrl_stop 0x000185e1 Thumb Code 46 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) + hal_dsi_rx_ctrl_toggle_resolution 0x0001861d Thumb Code 28 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) + hal_dsi_tx_ctrl_create_handle 0x00018c51 Thumb Code 34 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) + hal_dsi_tx_ctrl_deinit 0x00018c7d Thumb Code 118 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) + hal_dsi_tx_ctrl_enter_init_panel_mode 0x00018d01 Thumb Code 68 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) + hal_dsi_tx_ctrl_exit_init_panel_mode 0x00018d4d Thumb Code 32 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) + hal_dsi_tx_ctrl_init 0x00018d75 Thumb Code 154 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) + hal_dsi_tx_ctrl_panel_reset_pin 0x00018e3d Thumb Code 12 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_panel_reset_pin) + hal_dsi_tx_ctrl_set_ccm 0x00018e49 Thumb Code 28 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) + hal_dsi_tx_ctrl_set_overwrite_rgb 0x00018e69 Thumb Code 16 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) + hal_dsi_tx_ctrl_set_partial_disp 0x00018e7d Thumb Code 12 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp) + hal_dsi_tx_ctrl_set_partial_disp_area 0x00018e8d Thumb Code 30 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp_area) + hal_dsi_tx_ctrl_start 0x00018eb1 Thumb Code 140 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) + hal_dsi_tx_ctrl_stop 0x00018f4d Thumb Code 56 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) + hal_dsi_tx_ctrl_write_array_cmd 0x00018f91 Thumb Code 210 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) + hal_dsi_tx_ctrl_write_cmd 0x00019069 Thumb Code 172 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) + hal_gpio_ctrl_eint 0x000192fd Thumb Code 18 hal_gpio.o(i.hal_gpio_ctrl_eint) + hal_gpio_get_input_data 0x00019315 Thumb Code 18 hal_gpio.o(i.hal_gpio_get_input_data) + hal_gpio_init_eint 0x00019329 Thumb Code 58 hal_gpio.o(i.hal_gpio_init_eint) + hal_gpio_init_input 0x00019369 Thumb Code 28 hal_gpio.o(i.hal_gpio_init_input) + hal_gpio_init_output 0x00019389 Thumb Code 34 hal_gpio.o(i.hal_gpio_init_output) + hal_gpio_reg_eint_cb 0x000193b1 Thumb Code 20 hal_gpio.o(i.hal_gpio_reg_eint_cb) + hal_gpio_set_ap_reset_int 0x000193c9 Thumb Code 76 hal_gpio.o(i.hal_gpio_set_ap_reset_int) + hal_gpio_set_mode 0x00019419 Thumb Code 90 hal_gpio.o(i.hal_gpio_set_mode) + hal_gpio_set_output_data 0x00019479 Thumb Code 8 hal_gpio.o(i.hal_gpio_set_output_data) + hal_gpio_set_pull_state 0x00019481 Thumb Code 26 hal_gpio.o(i.hal_gpio_set_pull_state) + hal_i2c_m_dma_init 0x000194a1 Thumb Code 92 hal_i2c_master.o(i.hal_i2c_m_dma_init) + hal_i2c_m_dma_read 0x0001950d Thumb Code 26 hal_i2c_master.o(i.hal_i2c_m_dma_read) + hal_i2c_m_dma_write 0x0001952d Thumb Code 24 hal_i2c_master.o(i.hal_i2c_m_dma_write) + hal_i2c_m_transfer_complate 0x00019549 Thumb Code 6 hal_i2c_master.o(i.hal_i2c_m_transfer_complate) + hal_i2c_s_dma_write 0x00019585 Thumb Code 62 hal_i2c_slave.o(i.hal_i2c_s_dma_write) + hal_i2c_s_init 0x000195d1 Thumb Code 176 hal_i2c_slave.o(i.hal_i2c_s_init) + hal_i2c_s_nonblocking_read 0x00019699 Thumb Code 14 hal_i2c_slave.o(i.hal_i2c_s_nonblocking_read) + hal_i2c_s_set_transfer 0x000196ad Thumb Code 6 hal_i2c_slave.o(i.hal_i2c_s_set_transfer) + hal_internal_init_memc 0x0001982d Thumb Code 170 hal_internal_vsync.o(i.hal_internal_init_memc) + hal_internal_sync_get_fb_setting 0x00019929 Thumb Code 12 hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) + hal_internal_sync_get_hight_performan_mode 0x00019939 Thumb Code 10 hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) + hal_internal_sync_input_resolution_change 0x00019949 Thumb Code 438 hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) + hal_internal_update_dpi_param 0x00019b75 Thumb Code 10 hal_internal_vsync.o(i.hal_internal_update_dpi_param) + hal_internal_video_mode_auto_sync 0x00019b85 Thumb Code 270 hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) + hal_internal_vsync_deinit 0x00019cb1 Thumb Code 30 hal_internal_vsync.o(i.hal_internal_vsync_deinit) + hal_internal_vsync_get_rx_state 0x00019cd9 Thumb Code 6 hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) + hal_internal_vsync_get_sync_line 0x00019ce5 Thumb Code 18 hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) + hal_internal_vsync_get_tear_mode 0x00019cfd Thumb Code 6 hal_internal_vsync.o(i.hal_internal_vsync_get_tear_mode) + hal_internal_vsync_get_tx_state 0x00019d09 Thumb Code 6 hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) + hal_internal_vsync_init_rx 0x00019d15 Thumb Code 236 hal_internal_vsync.o(i.hal_internal_vsync_init_rx) + hal_internal_vsync_init_tx 0x00019e2d Thumb Code 172 hal_internal_vsync.o(i.hal_internal_vsync_init_tx) + hal_internal_vsync_set_auto_hw_filter 0x00019edd Thumb Code 222 hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) + hal_internal_vsync_set_rx_state 0x00019ff9 Thumb Code 16 hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) + hal_internal_vsync_set_sync_line 0x0001a00d Thumb Code 30 hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) + hal_internal_vsync_set_tear_mode 0x0001a031 Thumb Code 72 hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) + hal_internal_vsync_set_tx_state 0x0001a081 Thumb Code 118 hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) + hal_spi_m_clear_rxfifo 0x0001a539 Thumb Code 14 hal_spi_master.o(i.hal_spi_m_clear_rxfifo) + hal_swire_open 0x0001a547 Thumb Code 22 hal_swire.o(i.hal_swire_open) + hal_system_enable_systick 0x0001a55d Thumb Code 8 hal_system.o(i.hal_system_enable_systick) + hal_system_init 0x0001a565 Thumb Code 104 hal_system.o(i.hal_system_init) + hal_system_init_console 0x0001a5ed Thumb Code 28 hal_system.o(i.hal_system_init_console) + hal_system_set_phy_calibration 0x0001a609 Thumb Code 8 hal_system.o(i.hal_system_set_phy_calibration) + hal_system_set_pvd 0x0001a611 Thumb Code 8 hal_system.o(i.hal_system_set_pvd) + hal_system_set_vcc 0x0001a619 Thumb Code 8 hal_system.o(i.hal_system_set_vcc) + hal_timer_init 0x0001a621 Thumb Code 26 hal_timer.o(i.hal_timer_init) + hal_timer_start 0x0001a63d Thumb Code 66 hal_timer.o(i.hal_timer_start) + hal_timer_stop 0x0001a685 Thumb Code 40 hal_timer.o(i.hal_timer_stop) + hal_uart_init 0x0001a6ad Thumb Code 126 hal_uart.o(i.hal_uart_init) + hal_uart_transmit_blocking 0x0001a739 Thumb Code 12 hal_uart.o(i.hal_uart_transmit_blocking) + handle_init 0x0001a749 Thumb Code 140 irq_redirect .o(i.handle_init) + main 0x0001a945 Thumb Code 10 main.o(i.main) + sqrt 0x0001b5f1 Thumb Code 66 sqrt.o(i.sqrt) + tp_heartbeat_exec 0x0001b639 Thumb Code 50 ap_demo.o(i.tp_heartbeat_exec) + phone_data_21 0x0001bc2c Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_55 0x0001bc2d Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_85_1 0x0001bc2e Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_92_1 0x0001bc2f Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_F5_1 0x0001bc30 Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_F5_2 0x0001bc31 Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_F5_3 0x0001bc32 Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_F5_4 0x0001bc33 Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_30 0x0001bc34 Data 2 app_tp_for_custom_s8.o(.constdata) + phone_data_52 0x0001bc36 Data 3 app_tp_for_custom_s8.o(.constdata) + phone_data_92_3 0x0001bc39 Data 3 app_tp_for_custom_s8.o(.constdata) + phone_data_A3 0x0001bc3c Data 4 app_tp_for_custom_s8.o(.constdata) + phone_data_A4 0x0001bc40 Data 4 app_tp_for_custom_s8.o(.constdata) + phone_data_A5 0x0001bc44 Data 4 app_tp_for_custom_s8.o(.constdata) + phone_data_AF 0x0001bc48 Data 4 app_tp_for_custom_s8.o(.constdata) + phone_data_F1 0x0001bc4c Data 4 app_tp_for_custom_s8.o(.constdata) + phone_data_22 0x0001bc50 Data 5 app_tp_for_custom_s8.o(.constdata) + phone_data_92_2 0x0001bc55 Data 6 app_tp_for_custom_s8.o(.constdata) + phone_data_F6_1 0x0001bc5b Data 6 app_tp_for_custom_s8.o(.constdata) + phone_data_F6_2 0x0001bc61 Data 6 app_tp_for_custom_s8.o(.constdata) + phone_data_F6_3 0x0001bc67 Data 6 app_tp_for_custom_s8.o(.constdata) + phone_data_F6_4 0x0001bc6d Data 6 app_tp_for_custom_s8.o(.constdata) + phone_data_60_1 0x0001bc73 Data 16 app_tp_for_custom_s8.o(.constdata) + phone_data_23 0x0001bc83 Data 11 app_tp_for_custom_s8.o(.constdata) + phone_data_85_2 0x0001bc8e Data 28 app_tp_for_custom_s8.o(.constdata) + phone_data_90 0x0001bcaa Data 10 app_tp_for_custom_s8.o(.constdata) + phone_data_72_0 0x0001bcb4 Data 1292 app_tp_for_custom_s8.o(.constdata) + phone_data_72_5 0x0001c1c0 Data 1292 app_tp_for_custom_s8.o(.constdata) + phone_data_72_13 0x0001c6cc Data 1292 app_tp_for_custom_s8.o(.constdata) + phone_data_75_01 0x0001cbd8 Data 654 app_tp_for_custom_s8.o(.constdata) + phone_data_75_02 0x0001ce66 Data 654 app_tp_for_custom_s8.o(.constdata) + phone_data_75_03 0x0001d0f4 Data 654 app_tp_for_custom_s8.o(.constdata) + phone_data_75_06 0x0001d382 Data 654 app_tp_for_custom_s8.o(.constdata) + phone_data_75_07 0x0001d610 Data 654 app_tp_for_custom_s8.o(.constdata) + phone_data_75_05 0x0001d89e Data 654 app_tp_for_custom_s8.o(.constdata) + phone_data_75_00 0x0001db2c Data 288 app_tp_for_custom_s8.o(.constdata) + phone_data_75_FF 0x0001dc4c Data 288 app_tp_for_custom_s8.o(.constdata) + sleep_on 0x0001dd6c Data 16 app_tp_for_custom_s8.o(.constdata) + screen_reg_start_data_size 0x0001dd7c Data 1 app_tp_for_custom_s8.o(.constdata) + Region$$Table$$Base 0x0001e0d0 Number 0 anon$$obj.o(Region$$Table) + Region$$Table$$Limit 0x0001e100 Number 0 anon$$obj.o(Region$$Table) + g_fun_handle 0x00070100 Data 192 irq_redirect .o(.ARM.__AT_0x00070100) + phone_86_flag 0x000701d7 Data 1 ap_demo.o(.data) + phone_A6_flag 0x000701d8 Data 1 ap_demo.o(.data) + phone_start_flag 0x000701d9 Data 1 ap_demo.o(.data) + phone_DisplayOFF_flag 0x000701da Data 1 ap_demo.o(.data) + ap_tear_flag 0x000701dc Data 1 ap_demo.o(.data) + g_enter_display_off 0x000701dd Data 1 ap_demo.o(.data) + g_enter_display_ON 0x000701de Data 1 ap_demo.o(.data) + panel_mode 0x000701e0 Data 1 ap_demo.o(.data) + phone_DisplayOFF_count 0x000701e8 Data 2 ap_demo.o(.data) + value_reg_b1 0x000701ea Data 2 ap_demo.o(.data) + value_reg_b1_bak 0x000701ec Data 2 ap_demo.o(.data) + value_reg51 0x000701ee Data 2 ap_demo.o(.data) + value_reg51_bak 0x000701f0 Data 2 ap_demo.o(.data) + panel_r 0x000701f2 Data 2 ap_demo.o(.data) + panel_g 0x000701f4 Data 2 ap_demo.o(.data) + panel_b 0x000701f6 Data 2 ap_demo.o(.data) + s_heartbeat 0x00070200 Data 4 ap_demo.o(.data) + value_reg_ca 0x00070204 Data 4 ap_demo.o(.data) + panel_init_code 0x0007020c Data 7466 ap_demo.o(.data) + s_screen_init_complate 0x00071f3a Data 1 app_tp_transfer.o(.data) + MI10_PRO_screen_init_data1 0x00071f3e Data 3 app_tp_transfer.o(.data) + MI10_PRO_screen_init_data3 0x00071f41 Data 3 app_tp_transfer.o(.data) + MI10_PRO_screen_init_data4 0x00071f44 Data 3 app_tp_transfer.o(.data) + MI10_PRO_screen_init_data2 0x00071f47 Data 6 app_tp_transfer.o(.data) + st_touch_init_sensor_off 0x00071f4f Data 3 app_tp_st_touch.o(.data) + st_touch_init_sensor_on 0x00071f52 Data 3 app_tp_st_touch.o(.data) + st_touch_tp_tuning_reset 0x00071f55 Data 3 app_tp_st_touch.o(.data) + st_touch_tp_tuning_FpnlInit 0x00071f58 Data 3 app_tp_st_touch.o(.data) + st_touch_tp_tuning_PnlInit 0x00071f5b Data 3 app_tp_st_touch.o(.data) + st_touch_tp_tuning_SvCfg 0x00071f5e Data 3 app_tp_st_touch.o(.data) + st_touch_tp_tuning_SvCx 0x00071f61 Data 3 app_tp_st_touch.o(.data) + st_touch_tp_tuning_SvPnl 0x00071f64 Data 3 app_tp_st_touch.o(.data) + st_touch_tp_tuning_clearfifo 0x00071f67 Data 3 app_tp_st_touch.o(.data) + st_touch_tp_tuning_clkreset 0x00071f6a Data 3 app_tp_st_touch.o(.data) + st_touch_tp_tuning_TuneM 0x00071f6d Data 4 app_tp_st_touch.o(.data) + st_touch_tp_tuning_TuneS 0x00071f71 Data 4 app_tp_st_touch.o(.data) + phone_data_E4 0x00071fa4 Data 1 app_tp_for_custom_s8.o(.data) + tp_flag 0x00071fa5 Data 1 app_tp_for_custom_s8.o(.data) + g_phone_output_int_pad 0x00071fa6 Data 1 app_tp_for_custom_s8.o(.data) + tp_sleep_in 0x00071fa7 Data 1 app_tp_for_custom_s8.o(.data) + tp_sleep_count 0x00071fa8 Data 1 app_tp_for_custom_s8.o(.data) + sleep_double_EN 0x00071fa9 Data 1 app_tp_for_custom_s8.o(.data) + Flag_EA_EN 0x00071faa Data 1 app_tp_for_custom_s8.o(.data) + Flag_touch_count 0x00071fab Data 1 app_tp_for_custom_s8.o(.data) + touchnum_bak 0x00071fac Data 1 app_tp_for_custom_s8.o(.data) + Flag_blacklight_EN 0x00071fad Data 1 app_tp_for_custom_s8.o(.data) + phone_data_B1 0x00071fb6 Data 2 app_tp_for_custom_s8.o(.data) + phone_reg_coord_back 0x00071fc0 Data 200 app_tp_for_custom_s8.o(.data) + g_screen_input_rst_pad 0x00072088 Data 1 app_tp_for_custom_s8.o(.data) + g_screen_input_int_pad 0x00072089 Data 1 app_tp_for_custom_s8.o(.data) + screen_data_write_1 0x0007208a Data 1 app_tp_for_custom_s8.o(.data) + screen_data_write_2 0x0007208b Data 3 app_tp_for_custom_s8.o(.data) + screen_data_write_3 0x0007208e Data 5 app_tp_for_custom_s8.o(.data) + screen_reg_int_data 0x00072094 Data 48 app_tp_for_custom_s8.o(.data) + g_sof_gen_te_func 0x000720cc Data 4 hal_internal_vsync.o(.data) + g_systick_cb_func 0x000720e0 Data 4 drv_common.o(.data) + g_system_clock 0x000720e4 Data 4 drv_common.o(.data) + g_scld_fhd_filter_h 0x000720fc Data 256 drv_param_init.o(.data) + g_scld_fhd_filter_v 0x000721fc Data 256 drv_param_init.o(.data) + g_scld_hd_filter_h 0x000722fc Data 256 drv_param_init.o(.data) + g_scld_hd_filter_v 0x000723fc Data 256 drv_param_init.o(.data) + g_sclu_lanczos_filter 0x000724fc Data 128 drv_param_init.o(.data) + g_ccm_setting 0x0007257c Data 36 drv_param_init.o(.data) + g_int_rxbr_irq0_cb_func 0x00072600 Data 4 drv_rxbr.o(.data) + g_int_rxbr_irq1_cb_func 0x00072604 Data 4 drv_rxbr.o(.data) + g_int_vidc_cb_func 0x00072608 Data 4 drv_vidc.o(.data) + g_fls_w_cmd 0x00072624 Data 1 norflash.o(.data) + g_fls_r_cmd 0x00072625 Data 1 norflash.o(.data) + g_fls_write_en_status 0x00072626 Data 1 norflash.o(.data) + isFlsTransferEnd 0x00072627 Data 1 norflash.o(.data) + isFlsFifoReq 0x00072628 Data 1 norflash.o(.data) + isNandWriteCompleted 0x00072629 Data 1 norflash.o(.data) + isNandReadCompleted 0x0007262a Data 1 norflash.o(.data) + g_fls_error_info 0x00072630 Data 6 norflash.o(.data) + __stdout 0x00072658 Data 4 stdout.o(.data) + tp_scan_data 0x000727f0 Data 12 app_tp_st_touch.o(.bss) + hal_dmahandle 0x0007290c Data 160 hal_uart.o(.bss) + hal_uarthandle_dma 0x000729ac Data 32 hal_uart.o(.bss) + hal_uart_handle_global 0x000729cc Data 16 hal_uart.o(.bss) + g_vsync_hande 0x000729dc Data 100 hal_internal_vsync.o(.bss) + g_dcs_execute_table 0x00072a40 Data 2048 hal_internal_vsync.o(.bss) + g_packet_fifo 0x000734fc Data 4144 dcs_packet_fifo.o(.bss) + string 0x0007452c Data 256 tau_log.o(.bss) + g_spis_ctrl_handle 0x0007462c Data 32 hal_spi_slave.o(.bss) + __stack_limit 0x00074650 Data 0 startup_armcm0.o(STACK) + __initial_sp 0x00075650 Data 0 startup_armcm0.o(STACK) + + + +============================================================================== + +Memory Map of the image + + Image Entry point : 0x000100c1 + + Load Region LR_IROM2 (Base: 0x00010000, Size: 0x00010590, Max: 0x00010000, ABSOLUTE, COMPRESSED[0x0000f550]) + + Execution Region ER_IROM2 (Exec base: 0x00010000, Load base: 0x00010000, Size: 0x0000e100, Max: 0x00010000, ABSOLUTE) + + Exec Addr Load Addr Size Type Attr Idx E Section Name Object + + 0x00010000 0x00010000 0x000000c0 Data RO 538 RESET startup_armcm0.o + 0x000100c0 0x000100c0 0x00000000 Code RO 2779 * .ARM.Collect$$$$00000000 mc_p.l(entry.o) + 0x000100c0 0x000100c0 0x00000004 Code RO 3089 .ARM.Collect$$$$00000001 mc_p.l(entry2.o) + 0x000100c4 0x000100c4 0x00000004 Code RO 3092 .ARM.Collect$$$$00000004 mc_p.l(entry5.o) + 0x000100c8 0x000100c8 0x00000000 Code RO 3094 .ARM.Collect$$$$00000008 mc_p.l(entry7b.o) + 0x000100c8 0x000100c8 0x00000000 Code RO 3096 .ARM.Collect$$$$0000000A mc_p.l(entry8b.o) + 0x000100c8 0x000100c8 0x00000008 Code RO 3097 .ARM.Collect$$$$0000000B mc_p.l(entry9a.o) + 0x000100d0 0x000100d0 0x00000000 Code RO 3099 .ARM.Collect$$$$0000000D mc_p.l(entry10a.o) + 0x000100d0 0x000100d0 0x00000000 Code RO 3101 .ARM.Collect$$$$0000000F mc_p.l(entry11a.o) + 0x000100d0 0x000100d0 0x00000004 Code RO 3090 .ARM.Collect$$$$00002712 mc_p.l(entry2.o) + 0x000100d4 0x000100d4 0x00000078 Code RO 539 .text startup_armcm0.o + 0x0001014c 0x0001014c 0x0000002c Code RO 2782 .text mc_p.l(uidiv.o) + 0x00010178 0x00010178 0x00000028 Code RO 2784 .text mc_p.l(idiv.o) + 0x000101a0 0x000101a0 0x00000024 Code RO 2786 .text mc_p.l(memcpya.o) + 0x000101c4 0x000101c4 0x00000024 Code RO 2788 .text mc_p.l(memseta.o) + 0x000101e8 0x000101e8 0x000000b2 Code RO 3053 .text mf_p.l(fadd.o) + 0x0001029a 0x0001029a 0x0000007a Code RO 3055 .text mf_p.l(fmul.o) + 0x00010314 0x00010314 0x0000007c Code RO 3057 .text mf_p.l(fdiv.o) + 0x00010390 0x00010390 0x00000018 Code RO 3059 .text mf_p.l(fscalb.o) + 0x000103a8 0x000103a8 0x00000164 Code RO 3061 .text mf_p.l(dadd.o) + 0x0001050c 0x0001050c 0x000000d0 Code RO 3063 .text mf_p.l(dmul.o) + 0x000105dc 0x000105dc 0x000000f0 Code RO 3065 .text mf_p.l(ddiv.o) + 0x000106cc 0x000106cc 0x00000016 Code RO 3067 .text mf_p.l(fflti.o) + 0x000106e2 0x000106e2 0x0000000e Code RO 3069 .text mf_p.l(ffltui.o) + 0x000106f0 0x000106f0 0x0000001c Code RO 3073 .text mf_p.l(dfltui.o) + 0x0001070c 0x0001070c 0x00000032 Code RO 3075 .text mf_p.l(ffixi.o) + 0x0001073e 0x0001073e 0x00000028 Code RO 3077 .text mf_p.l(ffixui.o) + 0x00010766 0x00010766 0x00000002 PAD + 0x00010768 0x00010768 0x00000048 Code RO 3079 .text mf_p.l(dfixi.o) + 0x000107b0 0x000107b0 0x0000003c Code RO 3081 .text mf_p.l(dfixui.o) + 0x000107ec 0x000107ec 0x00000028 Code RO 3083 .text mf_p.l(f2d.o) + 0x00010814 0x00010814 0x00000028 Code RO 3085 .text mf_p.l(cdcmple.o) + 0x0001083c 0x0001083c 0x00000014 Code RO 3087 .text mf_p.l(cfrcmple.o) + 0x00010850 0x00010850 0x00000060 Code RO 3104 .text mc_p.l(uldiv.o) + 0x000108b0 0x000108b0 0x00000020 Code RO 3106 .text mc_p.l(llshl.o) + 0x000108d0 0x000108d0 0x00000022 Code RO 3108 .text mc_p.l(llushr.o) + 0x000108f2 0x000108f2 0x00000026 Code RO 3110 .text mc_p.l(llsshr.o) + 0x00010918 0x00010918 0x00000000 Code RO 3119 .text mc_p.l(iusefp.o) + 0x00010918 0x00010918 0x00000082 Code RO 3120 .text mf_p.l(fepilogue.o) + 0x0001099a 0x0001099a 0x000000be Code RO 3122 .text mf_p.l(depilogue.o) + 0x00010a58 0x00010a58 0x000000a2 Code RO 3126 .text mf_p.l(dsqrt.o) + 0x00010afa 0x00010afa 0x00000002 PAD + 0x00010afc 0x00010afc 0x00000040 Code RO 3128 .text mf_p.l(dfixul.o) + 0x00010b3c 0x00010b3c 0x00000028 Code RO 3130 .text mf_p.l(cdrcmple.o) + 0x00010b64 0x00010b64 0x00000024 Code RO 3132 .text mc_p.l(init.o) + 0x00010b88 0x00010b88 0x00000056 Code RO 3142 .text mc_p.l(__dczerorl2.o) + 0x00010bde 0x00010bde 0x00000002 PAD + 0x00010be0 0x00010be0 0x00000018 Code RO 2200 i.ADC_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010bf8 0x00010bf8 0x00000018 Code RO 2201 i.AP_NRESET_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010c10 0x00010c10 0x00000014 Code RO 2202 i.DMA_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010c24 0x00010c24 0x0000001c Code RO 2203 i.EXTI_INT0_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010c40 0x00010c40 0x0000001c Code RO 2204 i.EXTI_INT1_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010c5c 0x00010c5c 0x0000001c Code RO 2205 i.EXTI_INT2_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010c78 0x00010c78 0x0000001c Code RO 2206 i.EXTI_INT3_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010c94 0x00010c94 0x0000001c Code RO 2207 i.EXTI_INT4_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010cb0 0x00010cb0 0x0000001c Code RO 2208 i.EXTI_INT5_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010ccc 0x00010ccc 0x0000001c Code RO 2209 i.EXTI_INT6_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010ce8 0x00010ce8 0x0000001c Code RO 2210 i.EXTI_INT7_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010d04 0x00010d04 0x00000064 Code RO 2361 i.EncryptCheck tp_EncryptCheck.lib(app_tp_enc.o) + 0x00010d68 0x00010d68 0x00000014 Code RO 2211 i.FLSCTRL_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010d7c 0x00010d7c 0x00000074 Code RO 102 i.Gpio_swire_output ap_demo.o + 0x00010df0 0x00010df0 0x00000014 Code RO 2212 i.HardFault_Handler CVWL568.lib(irq_redirect .o) + 0x00010e04 0x00010e04 0x00000018 Code RO 2213 i.I2C0_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010e1c 0x00010e1c 0x00000018 Code RO 2214 i.I2C1_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010e34 0x00010e34 0x00000018 Code RO 2215 i.LCDC_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010e4c 0x00010e4c 0x00000028 Code RO 2350 i.LOG_printf CVWL568.lib(tau_log.o) + 0x00010e74 0x00010e74 0x00000018 Code RO 2216 i.MEMC_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010e8c 0x00010e8c 0x00000018 Code RO 2217 i.MIPI_RX_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010ea4 0x00010ea4 0x00000018 Code RO 2218 i.MIPI_TX_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010ebc 0x00010ebc 0x0000001c Code RO 2219 i.PWMDET_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010ed8 0x00010ed8 0x0000001c Code RO 2220 i.SPIM_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010ef4 0x00010ef4 0x0000001c Code RO 2221 i.SPIS_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010f10 0x00010f10 0x0000001c Code RO 2222 i.SWIRE_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010f2c 0x00010f2c 0x00000018 Code RO 2223 i.SysTick_Handler CVWL568.lib(irq_redirect .o) + 0x00010f44 0x00010f44 0x00000018 Code RO 2224 i.TIMER0_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010f5c 0x00010f5c 0x00000018 Code RO 2225 i.TIMER1_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010f74 0x00010f74 0x00000018 Code RO 2226 i.TIMER2_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010f8c 0x00010f8c 0x00000018 Code RO 2227 i.TIMER3_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010fa4 0x00010fa4 0x0000001c Code RO 2657 i.UART0_IRQ_Handle CVWL568.lib(drv_uart.o) + 0x00010fc0 0x00010fc0 0x00000002 Code RO 2661 i.UART_DisableDma CVWL568.lib(drv_uart.o) + 0x00010fc2 0x00010fc2 0x00000004 Code RO 2667 i.UART_GetInstance CVWL568.lib(drv_uart.o) + 0x00010fc6 0x00010fc6 0x00000002 PAD + 0x00010fc8 0x00010fc8 0x00000018 Code RO 2228 i.UART_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010fe0 0x00010fe0 0x0000001a Code RO 2679 i.UART_SwitchSCLK CVWL568.lib(drv_uart.o) + 0x00010ffa 0x00010ffa 0x00000002 Code RO 3137 i.__scatterload_null mc_p.l(handlers.o) + 0x00010ffc 0x00010ffc 0x00000004 Code RO 1784 i.drv_dsi_rx_set_inten CVWL568.lib(drv_dsi_rx.o) + 0x00011000 0x00011000 0x00000014 Data RO 1196 .ARM.__at_0x11000 CVWL568.lib(drv_common.o) + 0x00011014 0x00011014 0x00000004 Code RO 1830 i.drv_dsi_tx_command_put_payload CVWL568.lib(drv_dsi_tx.o) + 0x00011018 0x00011018 0x00000004 Data RO 1197 .ARM.__at_0x11018 CVWL568.lib(drv_common.o) + 0x0001101c 0x0001101c 0x00000144 Code RO 274 i.S20_Start_init app_tp_transfer.o + 0x00011160 0x00011160 0x00000024 Code RO 2675 i.UART_ResetRxFIFO CVWL568.lib(drv_uart.o) + 0x00011184 0x00011184 0x00000048 Code RO 2678 i.UART_SetBaudRate CVWL568.lib(drv_uart.o) + 0x000111cc 0x000111cc 0x00000134 Code RO 2681 i.UART_TransferHandleIRQ CVWL568.lib(drv_uart.o) + 0x00011300 0x00011300 0x0000001a Code RO 2683 i.UART_WriteBlocking CVWL568.lib(drv_uart.o) + 0x0001131a 0x0001131a 0x00000002 PAD + 0x0001131c 0x0001131c 0x000000bc Code RO 2684 i.UART_init CVWL568.lib(drv_uart.o) + 0x000113d8 0x000113d8 0x00000018 Code RO 2229 i.VIDC_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x000113f0 0x000113f0 0x00000018 Code RO 2230 i.VPRE_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00011408 0x00011408 0x00000018 Code RO 2231 i.WDG_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00011420 0x00011420 0x00000020 Code RO 3025 i.__0printf mc_p.l(printfa.o) + 0x00011440 0x00011440 0x00000024 Code RO 3031 i.__0vsprintf mc_p.l(printfa.o) + 0x00011464 0x00011464 0x0000002e Code RO 3124 i.__ARM_clz mf_p.l(depilogue.o) + 0x00011492 0x00011492 0x0000001a Code RO 226 i.__ARM_common_switch8 ap_demo.o + 0x000114ac 0x000114ac 0x00000018 Code RO 1517 i.__NVIC_ClearPendingIRQ CVWL568.lib(drv_i2c_master.o) + 0x000114c4 0x000114c4 0x00000018 Code RO 1641 i.__NVIC_ClearPendingIRQ CVWL568.lib(drv_spi_master.o) + 0x000114dc 0x000114dc 0x00000020 Code RO 2054 i.__NVIC_DisableIRQ CVWL568.lib(drv_rxbr.o) + 0x000114fc 0x000114fc 0x00000018 Code RO 2055 i.__NVIC_EnableIRQ CVWL568.lib(drv_rxbr.o) + 0x00011514 0x00011514 0x00000044 Code RO 2438 i.__NVIC_SetPriority CVWL568.lib(hal_spi_slave.o) + 0x00011558 0x00011558 0x0000000e Code RO 3136 i.__scatterload_copy mc_p.l(handlers.o) + 0x00011566 0x00011566 0x0000000e Code RO 3138 i.__scatterload_zeroinit mc_p.l(handlers.o) + 0x00011574 0x00011574 0x0000000c Code RO 3114 i.__set_errno mc_p.l(errno.o) + 0x00011580 0x00011580 0x00000174 Code RO 3032 i._fp_digits mc_p.l(printfa.o) + 0x000116f4 0x000116f4 0x000006ec Code RO 3033 i._printf_core mc_p.l(printfa.o) + 0x00011de0 0x00011de0 0x00000020 Code RO 3034 i._printf_post_padding mc_p.l(printfa.o) + 0x00011e00 0x00011e00 0x0000002c Code RO 3035 i._printf_pre_padding mc_p.l(printfa.o) + 0x00011e2c 0x00011e2c 0x0000000a Code RO 3037 i._sputc mc_p.l(printfa.o) + 0x00011e36 0x00011e36 0x00000002 PAD + 0x00011e38 0x00011e38 0x0000105c Code RO 103 i.ap_dcs_read ap_demo.o + 0x00012e94 0x00012e94 0x00000138 Code RO 104 i.ap_demo ap_demo.o + 0x00012fcc 0x00012fcc 0x00000028 Code RO 105 i.ap_get_reg_ca ap_demo.o + 0x00012ff4 0x00012ff4 0x000000b0 Code RO 106 i.ap_get_reg_df ap_demo.o + 0x000130a4 0x000130a4 0x00000020 Code RO 416 i.ap_get_tp_calibration_status_01 app_tp_st_touch.o + 0x000130c4 0x000130c4 0x00000028 Code RO 107 i.ap_reset_cb ap_demo.o + 0x000130ec 0x000130ec 0x000002c0 Code RO 108 i.ap_set_backlight ap_demo.o + 0x000133ac 0x000133ac 0x00000024 Code RO 109 i.ap_set_display_off ap_demo.o + 0x000133d0 0x000133d0 0x0000000c Code RO 110 i.ap_set_display_on ap_demo.o + 0x000133dc 0x000133dc 0x00000038 Code RO 111 i.ap_set_enter_sleep_mode ap_demo.o + 0x00013414 0x00013414 0x0000000c Code RO 112 i.ap_set_exit_sleep_mode ap_demo.o + 0x00013420 0x00013420 0x0000001c Code RO 113 i.ap_set_tp_calibration_04 ap_demo.o + 0x0001343c 0x0001343c 0x000000b0 Code RO 418 i.ap_tp_st_touch_calibration app_tp_st_touch.o + 0x000134ec 0x000134ec 0x0000001a Code RO 419 i.ap_tp_st_touch_error_handler_F3 app_tp_st_touch.o + 0x00013506 0x00013506 0x00000020 Code RO 420 i.ap_tp_st_touch_error_handler_FF app_tp_st_touch.o + 0x00013526 0x00013526 0x00000002 PAD + 0x00013528 0x00013528 0x000000a8 Code RO 421 i.ap_tp_st_touch_get_calibration_success_mark app_tp_st_touch.o + 0x000135d0 0x000135d0 0x0000001c Code RO 423 i.ap_tp_st_touch_scan_point_init app_tp_st_touch.o + 0x000135ec 0x000135ec 0x00000094 Code RO 424 i.ap_tp_st_touch_scan_point_record_event app_tp_st_touch.o + 0x00013680 0x00013680 0x00000034 Code RO 425 i.ap_tp_st_touch_scan_point_record_event_exec app_tp_st_touch.o + 0x000136b4 0x000136b4 0x00000034 Code RO 426 i.ap_tp_st_touch_simulate_finger_release_event app_tp_st_touch.o + 0x000136e8 0x000136e8 0x00000070 Code RO 427 i.ap_tp_st_touch_software_reset app_tp_st_touch.o + 0x00013758 0x00013758 0x0000002c Code RO 114 i.ap_update_frame_rate ap_demo.o + 0x00013784 0x00013784 0x0000001c Code RO 2056 i.app_ADC_IRQn_Handler CVWL568.lib(drv_rxbr.o) + 0x000137a0 0x000137a0 0x00000024 Code RO 1441 i.app_AP_NRESET_IRQn_Handler CVWL568.lib(drv_gpio.o) + 0x000137c4 0x000137c4 0x0000001c Code RO 1442 i.app_EXTI_INT0_IRQn_Handler CVWL568.lib(drv_gpio.o) + 0x000137e0 0x000137e0 0x0000001c Code RO 1443 i.app_EXTI_INT1_IRQn_Handler CVWL568.lib(drv_gpio.o) + 0x000137fc 0x000137fc 0x0000001c Code RO 1444 i.app_EXTI_INT2_IRQn_Handler CVWL568.lib(drv_gpio.o) + 0x00013818 0x00013818 0x0000001c Code RO 1445 i.app_EXTI_INT3_IRQn_Handler CVWL568.lib(drv_gpio.o) + 0x00013834 0x00013834 0x0000001c Code RO 1446 i.app_EXTI_INT4_IRQn_Handler CVWL568.lib(drv_gpio.o) + 0x00013850 0x00013850 0x0000001c Code RO 1447 i.app_EXTI_INT5_IRQn_Handler CVWL568.lib(drv_gpio.o) + 0x0001386c 0x0001386c 0x0000001c Code RO 1448 i.app_EXTI_INT6_IRQn_Handler CVWL568.lib(drv_gpio.o) + 0x00013888 0x00013888 0x0000001c Code RO 1449 i.app_EXTI_INT7_IRQn_Handler CVWL568.lib(drv_gpio.o) + 0x000138a4 0x000138a4 0x00000048 Code RO 1188 i.app_HardFault_Handler CVWL568.lib(drv_common.o) + 0x000138ec 0x000138ec 0x00000018 Code RO 1552 i.app_I2C0_IRQn_Handler CVWL568.lib(drv_i2c_slave.o) + 0x00013904 0x00013904 0x00000010 Code RO 1518 i.app_I2C1_IRQn_Handler CVWL568.lib(drv_i2c_master.o) + 0x00013914 0x00013914 0x000001a4 Code RO 1093 i.app_LCDC_IRQn_Handler CVWL568.lib(hal_internal_vsync.o) + 0x00013ab8 0x00013ab8 0x00000088 Code RO 1998 i.app_MEMC_IRQn_Handler CVWL568.lib(drv_memc.o) + 0x00013b40 0x00013b40 0x00000298 Code RO 1770 i.app_MIPI_RX_IRQn_Handler CVWL568.lib(drv_dsi_rx.o) + 0x00013dd8 0x00013dd8 0x000000a0 Code RO 1826 i.app_MIPI_TX_IRQn_Handler CVWL568.lib(drv_dsi_tx.o) + 0x00013e78 0x00013e78 0x00000048 Code RO 2592 i.app_PWMDET_IRQn_Handler CVWL568.lib(drv_pwm.o) + 0x00013ec0 0x00013ec0 0x00000030 Code RO 1642 i.app_SPIM_IRQn_Handler CVWL568.lib(drv_spi_master.o) + 0x00013ef0 0x00013ef0 0x00000200 Code RO 2439 i.app_SPIS_IRQn_Handler CVWL568.lib(hal_spi_slave.o) + 0x000140f0 0x000140f0 0x00000020 Code RO 1674 i.app_SWIRE_IRQn_Handler CVWL568.lib(drv_swire.o) + 0x00014110 0x00014110 0x00000018 Code RO 1189 i.app_SysTick_Handler CVWL568.lib(drv_common.o) + 0x00014128 0x00014128 0x0000000a Code RO 1724 i.app_TIMER0_IRQn_Handler CVWL568.lib(drv_timer.o) + 0x00014132 0x00014132 0x0000000a Code RO 1725 i.app_TIMER1_IRQn_Handler CVWL568.lib(drv_timer.o) + 0x0001413c 0x0001413c 0x0000000a Code RO 1726 i.app_TIMER2_IRQn_Handler CVWL568.lib(drv_timer.o) + 0x00014146 0x00014146 0x0000000a Code RO 1727 i.app_TIMER3_IRQn_Handler CVWL568.lib(drv_timer.o) + 0x00014150 0x00014150 0x00000008 Code RO 2685 i.app_UART_IRQn_Handler CVWL568.lib(drv_uart.o) + 0x00014158 0x00014158 0x0000001c Code RO 2121 i.app_VIDC_IRQn_Handler CVWL568.lib(drv_vidc.o) + 0x00014174 0x00014174 0x0000001c Code RO 2057 i.app_VPRE_IRQn_Handler CVWL568.lib(drv_rxbr.o) + 0x00014190 0x00014190 0x00000038 Code RO 2744 i.app_WDG_IRQn_Handler CVWL568.lib(drv_wdg.o) + 0x000141c8 0x000141c8 0x00000010 Code RO 1303 i.app_dma_irq_handler CVWL568.lib(drv_dma.o) + 0x000141d8 0x000141d8 0x00000030 Code RO 2481 i.app_fls_ctrl_Handler CVWL568.lib(norflash.o) + 0x00014208 0x00014208 0x00000024 Code RO 275 i.app_tp_I2C_init app_tp_transfer.o + 0x0001422c 0x0001422c 0x00000038 Code RO 428 i.app_tp_calibration_exec app_tp_st_touch.o + 0x00014264 0x00014264 0x00000030 Code RO 276 i.app_tp_i2cs_callback app_tp_transfer.o + 0x00014294 0x00014294 0x00000044 Code RO 277 i.app_tp_init app_tp_transfer.o + 0x000142d8 0x000142d8 0x00000020 Code RO 278 i.app_tp_m_read app_tp_transfer.o + 0x000142f8 0x000142f8 0x00000008 Code RO 280 i.app_tp_m_write app_tp_transfer.o + 0x00014300 0x00014300 0x0000041c Code RO 943 i.app_tp_phone_analysis_data WL568_20U_HX667_TP.lib(app_tp_for_custom_s8.o) + 0x0001471c 0x0001471c 0x0000000c Code RO 281 i.app_tp_phone_clear_reset_on app_tp_transfer.o + 0x00014728 0x00014728 0x00000008 Code RO 283 i.app_tp_s_read app_tp_transfer.o + 0x00014730 0x00014730 0x00000008 Code RO 285 i.app_tp_s_write app_tp_transfer.o + 0x00014738 0x00014738 0x000002dc Code RO 945 i.app_tp_screen_analysis_int WL568_20U_HX667_TP.lib(app_tp_for_custom_s8.o) + 0x00014a14 0x00014a14 0x00000030 Code RO 286 i.app_tp_screen_init app_tp_transfer.o + 0x00014a44 0x00014a44 0x0000000c Code RO 287 i.app_tp_screen_int_callback app_tp_transfer.o + 0x00014a50 0x00014a50 0x00000040 Code RO 288 i.app_tp_transfer_screen_const app_tp_transfer.o + 0x00014a90 0x00014a90 0x00000160 Code RO 289 i.app_tp_transfer_screen_int app_tp_transfer.o + 0x00014bf0 0x00014bf0 0x00000018 Code RO 290 i.app_tp_transfer_screen_start app_tp_transfer.o + 0x00014c08 0x00014c08 0x00000036 Code RO 115 i.blue_change_ccm ap_demo.o + 0x00014c3e 0x00014c3e 0x00000002 PAD + 0x00014c40 0x00014c40 0x00000024 Code RO 518 i.board_Init board.o + 0x00014c64 0x00014c64 0x000004f0 Code RO 1094 i.calc_framebuffer_setting CVWL568.lib(hal_internal_vsync.o) + 0x00015154 0x00015154 0x000000c8 Code RO 2768 i.ceil m_ps.l(ceil.o) + 0x0001521c 0x0001521c 0x0000002c Code RO 1095 i.check_mipi_rx_tx_video_info CVWL568.lib(hal_internal_vsync.o) + 0x00015248 0x00015248 0x00000090 Code RO 1096 i.check_pkt_buf_rev CVWL568.lib(hal_internal_vsync.o) + 0x000152d8 0x000152d8 0x00000058 Code RO 1757 i.dcs_packet_fifo_alloc CVWL568.lib(dcs_packet_fifo.o) + 0x00015330 0x00015330 0x00000018 Code RO 1758 i.dcs_packet_fifo_init CVWL568.lib(dcs_packet_fifo.o) + 0x00015348 0x00015348 0x00000044 Code RO 1759 i.dcs_packet_free_fifo_header CVWL568.lib(dcs_packet_fifo.o) + 0x0001538c 0x0001538c 0x00000024 Code RO 1760 i.dcs_packet_get_fifo_header CVWL568.lib(dcs_packet_fifo.o) + 0x000153b0 0x000153b0 0x0000002c Code RO 1097 i.dcs_sw_filter CVWL568.lib(hal_internal_vsync.o) + 0x000153dc 0x000153dc 0x00000018 Code RO 935 i.delayMs CVWL568.lib(tau_delay.o) + 0x000153f4 0x000153f4 0x00000022 Code RO 936 i.delayUs CVWL568.lib(tau_delay.o) + 0x00015416 0x00015416 0x00000002 PAD + 0x00015418 0x00015418 0x00000058 Code RO 116 i.disable_mipi_timer_cb ap_demo.o + 0x00015470 0x00015470 0x00000038 Code RO 1693 i.drv_ap_rst_trig_edge_detect CVWL568.lib(drv_sys_cfg.o) + 0x000154a8 0x000154a8 0x0000000c Code RO 2321 i.drv_chip_info_get_info CVWL568.lib(drv_chip_info.o) + 0x000154b4 0x000154b4 0x00000040 Code RO 2322 i.drv_chip_info_init CVWL568.lib(drv_chip_info.o) + 0x000154f4 0x000154f4 0x000000b0 Code RO 2323 i.drv_chip_rx_info_check CVWL568.lib(drv_chip_info.o) + 0x000155a4 0x000155a4 0x00000014 Code RO 2324 i.drv_chip_rx_init_done CVWL568.lib(drv_chip_info.o) + 0x000155b8 0x000155b8 0x00000058 Code RO 1191 i.drv_common_enable_systick CVWL568.lib(drv_common.o) + 0x00015610 0x00015610 0x00000008 Code RO 1194 i.drv_common_system_init CVWL568.lib(drv_common.o) + 0x00015618 0x00015618 0x00000010 Code RO 1216 i.drv_crgu_config_reset_modules CVWL568.lib(drv_crgu.o) + 0x00015628 0x00015628 0x00000014 Code RO 1229 i.drv_crgu_set_ahb_pre_div CVWL568.lib(drv_crgu.o) + 0x0001563c 0x0001563c 0x00000014 Code RO 1230 i.drv_crgu_set_ahb_src CVWL568.lib(drv_crgu.o) + 0x00015650 0x00015650 0x00000020 Code RO 1233 i.drv_crgu_set_clock CVWL568.lib(drv_crgu.o) + 0x00015670 0x00015670 0x00000014 Code RO 1234 i.drv_crgu_set_dpi_mux_src CVWL568.lib(drv_crgu.o) + 0x00015684 0x00015684 0x00000018 Code RO 1235 i.drv_crgu_set_dpi_pre_div CVWL568.lib(drv_crgu.o) + 0x0001569c 0x0001569c 0x00000014 Code RO 1236 i.drv_crgu_set_dpi_pre_src CVWL568.lib(drv_crgu.o) + 0x000156b0 0x000156b0 0x00000014 Code RO 1237 i.drv_crgu_set_dsc_core_div CVWL568.lib(drv_crgu.o) + 0x000156c4 0x000156c4 0x00000014 Code RO 1238 i.drv_crgu_set_dsco_src CVWL568.lib(drv_crgu.o) + 0x000156d8 0x000156d8 0x00000014 Code RO 1239 i.drv_crgu_set_dsco_src_div CVWL568.lib(drv_crgu.o) + 0x000156ec 0x000156ec 0x00000014 Code RO 1240 i.drv_crgu_set_fb_div CVWL568.lib(drv_crgu.o) + 0x00015700 0x00015700 0x00000014 Code RO 1241 i.drv_crgu_set_fb_src CVWL568.lib(drv_crgu.o) + 0x00015714 0x00015714 0x00000014 Code RO 1244 i.drv_crgu_set_lcdc_div CVWL568.lib(drv_crgu.o) + 0x00015728 0x00015728 0x00000014 Code RO 1245 i.drv_crgu_set_lcdc_src CVWL568.lib(drv_crgu.o) + 0x0001573c 0x0001573c 0x00000014 Code RO 1246 i.drv_crgu_set_mipi_cfg_src CVWL568.lib(drv_crgu.o) + 0x00015750 0x00015750 0x00000018 Code RO 1247 i.drv_crgu_set_mipi_ref_src CVWL568.lib(drv_crgu.o) + 0x00015768 0x00015768 0x00000018 Code RO 1250 i.drv_crgu_set_reset CVWL568.lib(drv_crgu.o) + 0x00015780 0x00015780 0x00000014 Code RO 1251 i.drv_crgu_set_rxbr_div CVWL568.lib(drv_crgu.o) + 0x00015794 0x00015794 0x00000014 Code RO 1252 i.drv_crgu_set_rxbr_src CVWL568.lib(drv_crgu.o) + 0x000157a8 0x000157a8 0x00000014 Code RO 1254 i.drv_crgu_set_vidc_src CVWL568.lib(drv_crgu.o) + 0x000157bc 0x000157bc 0x00000018 Code RO 1307 i.drv_dma_clear_flag CVWL568.lib(drv_dma.o) + 0x000157d4 0x000157d4 0x0000001c Code RO 1308 i.drv_dma_create_handle CVWL568.lib(drv_dma.o) + 0x000157f0 0x000157f0 0x00000010 Code RO 1310 i.drv_dma_disenable_channel CVWL568.lib(drv_dma.o) + 0x00015800 0x00015800 0x00000010 Code RO 1312 i.drv_dma_enable_channel CVWL568.lib(drv_dma.o) + 0x00015810 0x00015810 0x00000024 Code RO 1313 i.drv_dma_enable_channel_interrupts CVWL568.lib(drv_dma.o) + 0x00015834 0x00015834 0x0000000c Code RO 1315 i.drv_dma_get_channel_flag CVWL568.lib(drv_dma.o) + 0x00015840 0x00015840 0x00000090 Code RO 1318 i.drv_dma_irq_handler CVWL568.lib(drv_dma.o) + 0x000158d0 0x000158d0 0x00000012 Code RO 1320 i.drv_dma_prepar_transfer CVWL568.lib(drv_dma.o) + 0x000158e2 0x000158e2 0x0000001a Code RO 1322 i.drv_dma_set_burst CVWL568.lib(drv_dma.o) + 0x000158fc 0x000158fc 0x00000006 Code RO 1323 i.drv_dma_set_callback CVWL568.lib(drv_dma.o) + 0x00015902 0x00015902 0x00000002 PAD + 0x00015904 0x00015904 0x00000044 Code RO 1325 i.drv_dma_set_transfer CVWL568.lib(drv_dma.o) + 0x00015948 0x00015948 0x00000036 Code RO 2334 i.drv_dsc_dec_convert_pps_rc_parameter CVWL568.lib(drv_dsc_dec.o) + 0x0001597e 0x0001597e 0x0000000c Code RO 2335 i.drv_dsc_dec_disable CVWL568.lib(drv_dsc_dec.o) + 0x0001598a 0x0001598a 0x00000002 PAD + 0x0001598c 0x0001598c 0x00000074 Code RO 2336 i.drv_dsc_dec_enable CVWL568.lib(drv_dsc_dec.o) + 0x00015a00 0x00015a00 0x0000000a Code RO 2337 i.drv_dsc_dec_get_nslc CVWL568.lib(drv_dsc_dec.o) + 0x00015a0a 0x00015a0a 0x00000028 Code RO 2339 i.drv_dsc_dec_set_u8_pps CVWL568.lib(drv_dsc_dec.o) + 0x00015a32 0x00015a32 0x00000002 PAD + 0x00015a34 0x00015a34 0x00000104 Code RO 1771 i.drv_dsi_rx_calc_ipi_tx_delay CVWL568.lib(drv_dsi_rx.o) + 0x00015b38 0x00015b38 0x00000040 Code RO 1772 i.drv_dsi_rx_enable_irq CVWL568.lib(drv_dsi_rx.o) + 0x00015b78 0x00015b78 0x00000050 Code RO 1773 i.drv_dsi_rx_get_color_bpp CVWL568.lib(drv_dsi_rx.o) + 0x00015bc8 0x00015bc8 0x0000001c Code RO 1774 i.drv_dsi_rx_get_color_pcc CVWL568.lib(drv_dsi_rx.o) + 0x00015be4 0x00015be4 0x00000008 Code RO 1775 i.drv_dsi_rx_get_compression_en CVWL568.lib(drv_dsi_rx.o) + 0x00015bec 0x00015bec 0x00000006 Code RO 1776 i.drv_dsi_rx_get_max_ret_size CVWL568.lib(drv_dsi_rx.o) + 0x00015bf2 0x00015bf2 0x0000000e Code RO 1780 i.drv_dsi_rx_power_up CVWL568.lib(drv_dsi_rx.o) + 0x00015c00 0x00015c00 0x00000020 Code RO 1781 i.drv_dsi_rx_set_ctrl_cfg CVWL568.lib(drv_dsi_rx.o) + 0x00015c20 0x00015c20 0x00000010 Code RO 1782 i.drv_dsi_rx_set_ddi_cfg CVWL568.lib(drv_dsi_rx.o) + 0x00015c30 0x00015c30 0x00000010 Code RO 1785 i.drv_dsi_rx_set_ipi_cfg CVWL568.lib(drv_dsi_rx.o) + 0x00015c40 0x00015c40 0x00000046 Code RO 1787 i.drv_dsi_rx_set_lane_swap CVWL568.lib(drv_dsi_rx.o) + 0x00015c86 0x00015c86 0x00000026 Code RO 1788 i.drv_dsi_rx_set_resp_cnt CVWL568.lib(drv_dsi_rx.o) + 0x00015cac 0x00015cac 0x00000104 Code RO 1789 i.drv_dsi_rx_set_up_phy CVWL568.lib(drv_dsi_rx.o) + 0x00015db0 0x00015db0 0x0000000e Code RO 1790 i.drv_dsi_rx_shut_down CVWL568.lib(drv_dsi_rx.o) + 0x00015dbe 0x00015dbe 0x00000014 Code RO 1828 i.drv_dsi_tx_command_header CVWL568.lib(drv_dsi_tx.o) + 0x00015dd2 0x00015dd2 0x0000006c Code RO 1829 i.drv_dsi_tx_command_mode_cfg CVWL568.lib(drv_dsi_tx.o) + 0x00015e3e 0x00015e3e 0x00000018 Code RO 1831 i.drv_dsi_tx_config_eotp CVWL568.lib(drv_dsi_tx.o) + 0x00015e56 0x00015e56 0x00000008 Code RO 1832 i.drv_dsi_tx_config_int CVWL568.lib(drv_dsi_tx.o) + 0x00015e5e 0x00015e5e 0x00000008 Code RO 1833 i.drv_dsi_tx_dpi_lpcmd_time CVWL568.lib(drv_dsi_tx.o) + 0x00015e66 0x00015e66 0x0000000a Code RO 1834 i.drv_dsi_tx_dpi_mode CVWL568.lib(drv_dsi_tx.o) + 0x00015e70 0x00015e70 0x00000024 Code RO 1835 i.drv_dsi_tx_dpi_polarity CVWL568.lib(drv_dsi_tx.o) + 0x00015e94 0x00015e94 0x00000004 Code RO 1836 i.drv_dsi_tx_edpi_cmd_size CVWL568.lib(drv_dsi_tx.o) + 0x00015e98 0x00015e98 0x00000004 Code RO 1838 i.drv_dsi_tx_get_cmd_status CVWL568.lib(drv_dsi_tx.o) + 0x00015e9c 0x00015e9c 0x00000004 Code RO 1840 i.drv_dsi_tx_mode CVWL568.lib(drv_dsi_tx.o) + 0x00015ea0 0x00015ea0 0x00000018 Code RO 1841 i.drv_dsi_tx_phy_clock_lane_auto_lp CVWL568.lib(drv_dsi_tx.o) + 0x00015eb8 0x00015eb8 0x0000001a Code RO 1842 i.drv_dsi_tx_phy_clock_lane_req_hs CVWL568.lib(drv_dsi_tx.o) + 0x00015ed2 0x00015ed2 0x0000000c Code RO 1844 i.drv_dsi_tx_phy_lane_mode CVWL568.lib(drv_dsi_tx.o) + 0x00015ede 0x00015ede 0x00000064 Code RO 1848 i.drv_dsi_tx_phy_status_ready CVWL568.lib(drv_dsi_tx.o) + 0x00015f42 0x00015f42 0x0000003e Code RO 1849 i.drv_dsi_tx_phy_status_stopstate CVWL568.lib(drv_dsi_tx.o) + 0x00015f80 0x00015f80 0x00000134 Code RO 1851 i.drv_dsi_tx_phy_test_setup CVWL568.lib(drv_dsi_tx.o) + 0x000160b4 0x000160b4 0x0000001e Code RO 1852 i.drv_dsi_tx_phy_time_cfg CVWL568.lib(drv_dsi_tx.o) + 0x000160d2 0x000160d2 0x00000008 Code RO 1856 i.drv_dsi_tx_powerup CVWL568.lib(drv_dsi_tx.o) + 0x000160da 0x000160da 0x0000001c Code RO 1857 i.drv_dsi_tx_response_mode CVWL568.lib(drv_dsi_tx.o) + 0x000160f6 0x000160f6 0x00000018 Code RO 1860 i.drv_dsi_tx_set_bta_ack CVWL568.lib(drv_dsi_tx.o) + 0x0001610e 0x0001610e 0x0000000c Code RO 1861 i.drv_dsi_tx_set_esc_div CVWL568.lib(drv_dsi_tx.o) + 0x0001611a 0x0001611a 0x00000002 PAD + 0x0001611c 0x0001611c 0x00000040 Code RO 1862 i.drv_dsi_tx_set_int CVWL568.lib(drv_dsi_tx.o) + 0x0001615c 0x0001615c 0x00000010 Code RO 1863 i.drv_dsi_tx_set_time_out_div CVWL568.lib(drv_dsi_tx.o) + 0x0001616c 0x0001616c 0x00000008 Code RO 1864 i.drv_dsi_tx_set_video_chunk CVWL568.lib(drv_dsi_tx.o) + 0x00016174 0x00016174 0x00000022 Code RO 1865 i.drv_dsi_tx_set_video_timing CVWL568.lib(drv_dsi_tx.o) + 0x00016196 0x00016196 0x00000008 Code RO 1867 i.drv_dsi_tx_shutdown CVWL568.lib(drv_dsi_tx.o) + 0x0001619e 0x0001619e 0x00000026 Code RO 1868 i.drv_dsi_tx_timeout_cfg CVWL568.lib(drv_dsi_tx.o) + 0x000161c4 0x000161c4 0x000000aa Code RO 1871 i.drv_dsi_tx_video_mode_cfg CVWL568.lib(drv_dsi_tx.o) + 0x0001626e 0x0001626e 0x00000016 Code RO 1872 i.drv_dsi_tx_video_mode_disable_hact_cmd CVWL568.lib(drv_dsi_tx.o) + 0x00016284 0x00016284 0x00000018 Code RO 1873 i.drv_dsi_tx_video_mode_set_lp_cmd CVWL568.lib(drv_dsi_tx.o) + 0x0001629c 0x0001629c 0x0000002e Code RO 2272 i.drv_efuse_enter_inactive CVWL568.lib(drv_efuse.o) + 0x000162ca 0x000162ca 0x0000000c Code RO 2275 i.drv_efuse_int_enable CVWL568.lib(drv_efuse.o) + 0x000162d6 0x000162d6 0x00000032 Code RO 2276 i.drv_efuse_read CVWL568.lib(drv_efuse.o) + 0x00016308 0x00016308 0x00000018 Code RO 2277 i.drv_efuse_read_req CVWL568.lib(drv_efuse.o) + 0x00016320 0x00016320 0x00000018 Code RO 1450 i.drv_gpio_get_input_data CVWL568.lib(drv_gpio.o) + 0x00016338 0x00016338 0x0000000c Code RO 1452 i.drv_gpio_register_ap_reset_callback CVWL568.lib(drv_gpio.o) + 0x00016344 0x00016344 0x00000014 Code RO 1453 i.drv_gpio_register_callback CVWL568.lib(drv_gpio.o) + 0x00016358 0x00016358 0x00000050 Code RO 1455 i.drv_gpio_set_int CVWL568.lib(drv_gpio.o) + 0x000163a8 0x000163a8 0x00000020 Code RO 1456 i.drv_gpio_set_ioe CVWL568.lib(drv_gpio.o) + 0x000163c8 0x000163c8 0x00000010 Code RO 1457 i.drv_gpio_set_mode0 CVWL568.lib(drv_gpio.o) + 0x000163d8 0x000163d8 0x00000010 Code RO 1458 i.drv_gpio_set_mode1 CVWL568.lib(drv_gpio.o) + 0x000163e8 0x000163e8 0x00000010 Code RO 1459 i.drv_gpio_set_mode2 CVWL568.lib(drv_gpio.o) + 0x000163f8 0x000163f8 0x00000010 Code RO 1460 i.drv_gpio_set_mode3 CVWL568.lib(drv_gpio.o) + 0x00016408 0x00016408 0x00000020 Code RO 744 i.drv_gpio_set_output_data CVWL568.lib(hal_gpio.o) + 0x00016428 0x00016428 0x00000130 Code RO 1461 i.drv_gpio_set_pull_state CVWL568.lib(drv_gpio.o) + 0x00016558 0x00016558 0x0000000c Code RO 1553 i.drv_i2c0_set_callback CVWL568.lib(drv_i2c_slave.o) + 0x00016564 0x00016564 0x0000000c Code RO 1519 i.drv_i2c1_set_callback CVWL568.lib(drv_i2c_master.o) + 0x00016570 0x00016570 0x00000034 Code RO 1493 i.drv_i2c_dma_callback CVWL568.lib(drv_i2c_dma.o) + 0x000165a4 0x000165a4 0x000000ac Code RO 1494 i.drv_i2c_dma_init CVWL568.lib(drv_i2c_dma.o) + 0x00016650 0x00016650 0x0000001a Code RO 1495 i.drv_i2c_enable_rx_dma CVWL568.lib(drv_i2c_dma.o) + 0x0001666a 0x0001666a 0x00000018 Code RO 1496 i.drv_i2c_enable_tx_dma CVWL568.lib(drv_i2c_dma.o) + 0x00016682 0x00016682 0x00000002 PAD + 0x00016684 0x00016684 0x00000060 Code RO 1521 i.drv_i2c_m_clear_it_pending_bit CVWL568.lib(drv_i2c_master.o) + 0x000166e4 0x000166e4 0x00000010 Code RO 1524 i.drv_i2c_m_enable CVWL568.lib(drv_i2c_master.o) + 0x000166f4 0x000166f4 0x00000038 Code RO 1525 i.drv_i2c_m_enable_intr CVWL568.lib(drv_i2c_master.o) + 0x0001672c 0x0001672c 0x0000008c Code RO 1531 i.drv_i2c_master_init CVWL568.lib(drv_i2c_master.o) + 0x000167b8 0x000167b8 0x0000005c Code RO 1497 i.drv_i2c_master_read_dma CVWL568.lib(drv_i2c_dma.o) + 0x00016814 0x00016814 0x0000003c Code RO 1498 i.drv_i2c_master_write_dma CVWL568.lib(drv_i2c_dma.o) + 0x00016850 0x00016850 0x0000003e Code RO 1499 i.drv_i2c_master_write_read_cmd CVWL568.lib(drv_i2c_dma.o) + 0x0001688e 0x0001688e 0x00000042 Code RO 1554 i.drv_i2c_s_clear_it_pending_bit CVWL568.lib(drv_i2c_slave.o) + 0x000168d0 0x000168d0 0x00000004 Code RO 1555 i.drv_i2c_s_config_intr CVWL568.lib(drv_i2c_slave.o) + 0x000168d4 0x000168d4 0x00000008 Code RO 1556 i.drv_i2c_s_enable CVWL568.lib(drv_i2c_slave.o) + 0x000168dc 0x000168dc 0x00000014 Code RO 1557 i.drv_i2c_s_get_fifo_status CVWL568.lib(drv_i2c_slave.o) + 0x000168f0 0x000168f0 0x00000050 Code RO 1560 i.drv_i2c_s_set_intr CVWL568.lib(drv_i2c_slave.o) + 0x00016940 0x00016940 0x0000001c Code RO 1561 i.drv_i2c_s_write_data CVWL568.lib(drv_i2c_slave.o) + 0x0001695c 0x0001695c 0x00000058 Code RO 1500 i.drv_i2c_set_dma_irq_callback CVWL568.lib(drv_i2c_dma.o) + 0x000169b4 0x000169b4 0x00000032 Code RO 1562 i.drv_i2c_slave_init CVWL568.lib(drv_i2c_slave.o) + 0x000169e6 0x000169e6 0x00000002 PAD + 0x000169e8 0x000169e8 0x00000018 Code RO 1501 i.drv_i2c_slave_write_dma CVWL568.lib(drv_i2c_dma.o) + 0x00016a00 0x00016a00 0x00000018 Code RO 1940 i.drv_lcdc_config_bypass CVWL568.lib(drv_lcdc.o) + 0x00016a18 0x00016a18 0x00000030 Code RO 1941 i.drv_lcdc_config_ccm CVWL568.lib(drv_lcdc.o) + 0x00016a48 0x00016a48 0x00000016 Code RO 1942 i.drv_lcdc_config_disp_mode CVWL568.lib(drv_lcdc.o) + 0x00016a5e 0x00016a5e 0x00000024 Code RO 1943 i.drv_lcdc_config_dpi_polarity CVWL568.lib(drv_lcdc.o) + 0x00016a82 0x00016a82 0x00000026 Code RO 1944 i.drv_lcdc_config_dpi_timing CVWL568.lib(drv_lcdc.o) + 0x00016aa8 0x00016aa8 0x00000016 Code RO 1945 i.drv_lcdc_config_edpi_mode CVWL568.lib(drv_lcdc.o) + 0x00016abe 0x00016abe 0x00000016 Code RO 1946 i.drv_lcdc_config_endianness CVWL568.lib(drv_lcdc.o) + 0x00016ad4 0x00016ad4 0x0000000c Code RO 1947 i.drv_lcdc_config_input_size CVWL568.lib(drv_lcdc.o) + 0x00016ae0 0x00016ae0 0x0000001e Code RO 1948 i.drv_lcdc_config_int CVWL568.lib(drv_lcdc.o) + 0x00016afe 0x00016afe 0x00000022 Code RO 1949 i.drv_lcdc_config_int_single CVWL568.lib(drv_lcdc.o) + 0x00016b20 0x00016b20 0x00000022 Code RO 1950 i.drv_lcdc_config_overwrite CVWL568.lib(drv_lcdc.o) + 0x00016b42 0x00016b42 0x0000000c Code RO 1951 i.drv_lcdc_config_overwrite_rgb CVWL568.lib(drv_lcdc.o) + 0x00016b4e 0x00016b4e 0x0000001a Code RO 1952 i.drv_lcdc_config_partial_display_area CVWL568.lib(drv_lcdc.o) + 0x00016b68 0x00016b68 0x00000022 Code RO 1953 i.drv_lcdc_config_partial_display_enable CVWL568.lib(drv_lcdc.o) + 0x00016b8a 0x00016b8a 0x0000001a Code RO 1955 i.drv_lcdc_config_scale_up_coef CVWL568.lib(drv_lcdc.o) + 0x00016ba4 0x00016ba4 0x0000000c Code RO 1956 i.drv_lcdc_config_scale_up_step CVWL568.lib(drv_lcdc.o) + 0x00016bb0 0x00016bb0 0x0000004c Code RO 1957 i.drv_lcdc_config_src_parameter CVWL568.lib(drv_lcdc.o) + 0x00016bfc 0x00016bfc 0x00000006 Code RO 1958 i.drv_lcdc_config_thresh CVWL568.lib(drv_lcdc.o) + 0x00016c02 0x00016c02 0x00000012 Code RO 1959 i.drv_lcdc_ctrl_flow CVWL568.lib(drv_lcdc.o) + 0x00016c14 0x00016c14 0x00000020 Code RO 1961 i.drv_lcdc_enable_shadow_reg CVWL568.lib(drv_lcdc.o) + 0x00016c34 0x00016c34 0x00000040 Code RO 1962 i.drv_lcdc_set_int CVWL568.lib(drv_lcdc.o) + 0x00016c74 0x00016c74 0x00000018 Code RO 1963 i.drv_lcdc_set_prefetch CVWL568.lib(drv_lcdc.o) + 0x00016c8c 0x00016c8c 0x00000014 Code RO 1964 i.drv_lcdc_set_video_hw_mode CVWL568.lib(drv_lcdc.o) + 0x00016ca0 0x00016ca0 0x00000020 Code RO 1965 i.drv_lcdc_start CVWL568.lib(drv_lcdc.o) + 0x00016cc0 0x00016cc0 0x0000000c Code RO 1999 i.drv_memc_clear_status CVWL568.lib(drv_memc.o) + 0x00016ccc 0x00016ccc 0x00000040 Code RO 2000 i.drv_memc_enable_irq CVWL568.lib(drv_memc.o) + 0x00016d0c 0x00016d0c 0x0000000c Code RO 2001 i.drv_memc_gen_a_tear_signal CVWL568.lib(drv_memc.o) + 0x00016d18 0x00016d18 0x00000012 Code RO 2002 i.drv_memc_get_status CVWL568.lib(drv_memc.o) + 0x00016d2a 0x00016d2a 0x00000010 Code RO 2003 i.drv_memc_rate_transfer_sel CVWL568.lib(drv_memc.o) + 0x00016d3a 0x00016d3a 0x0000000e Code RO 2004 i.drv_memc_sel_vsync CVWL568.lib(drv_memc.o) + 0x00016d48 0x00016d48 0x00000014 Code RO 2005 i.drv_memc_set_active_height CVWL568.lib(drv_memc.o) + 0x00016d5c 0x00016d5c 0x0000000c Code RO 2006 i.drv_memc_set_data_mode CVWL568.lib(drv_memc.o) + 0x00016d68 0x00016d68 0x00000010 Code RO 2009 i.drv_memc_set_double_buffer CVWL568.lib(drv_memc.o) + 0x00016d78 0x00016d78 0x00000012 Code RO 2010 i.drv_memc_set_double_buffer_reverse CVWL568.lib(drv_memc.o) + 0x00016d8a 0x00016d8a 0x00000010 Code RO 2012 i.drv_memc_set_fs_en_conditions CVWL568.lib(drv_memc.o) + 0x00016d9a 0x00016d9a 0x00000014 Code RO 2013 i.drv_memc_set_inten CVWL568.lib(drv_memc.o) + 0x00016dae 0x00016dae 0x00000002 PAD + 0x00016db0 0x00016db0 0x00000018 Code RO 2014 i.drv_memc_set_lcdc_st_conditions CVWL568.lib(drv_memc.o) + 0x00016dc8 0x00016dc8 0x0000001a Code RO 2015 i.drv_memc_set_ltpo_mode CVWL568.lib(drv_memc.o) + 0x00016de2 0x00016de2 0x0000000e Code RO 2019 i.drv_memc_set_tear_mode CVWL568.lib(drv_memc.o) + 0x00016df0 0x00016df0 0x00000028 Code RO 2020 i.drv_memc_set_tear_waveform CVWL568.lib(drv_memc.o) + 0x00016e18 0x00016e18 0x0000000e Code RO 2022 i.drv_memc_set_vidc_sync_cnt CVWL568.lib(drv_memc.o) + 0x00016e26 0x00016e26 0x00000002 PAD + 0x00016e28 0x00016e28 0x00000008 Code RO 1579 i.drv_param_init_get_ccm CVWL568.lib(drv_param_init.o) + 0x00016e30 0x00016e30 0x00000014 Code RO 1580 i.drv_param_init_get_scld_filter_h CVWL568.lib(drv_param_init.o) + 0x00016e44 0x00016e44 0x00000014 Code RO 1581 i.drv_param_init_get_scld_filter_v CVWL568.lib(drv_param_init.o) + 0x00016e58 0x00016e58 0x00000008 Code RO 1582 i.drv_param_init_get_sclu_filter CVWL568.lib(drv_param_init.o) + 0x00016e60 0x00016e60 0x00000014 Code RO 1583 i.drv_param_init_set_ccm CVWL568.lib(drv_param_init.o) + 0x00016e74 0x00016e74 0x00000024 Code RO 1586 i.drv_param_p2r_filter_init CVWL568.lib(drv_param_init.o) + 0x00016e98 0x00016e98 0x00000010 Code RO 2293 i.drv_phy_enable_calibration CVWL568.lib(drv_phy_common.o) + 0x00016ea8 0x00016ea8 0x0000003c Code RO 2294 i.drv_phy_get_calibration CVWL568.lib(drv_phy_common.o) + 0x00016ee4 0x00016ee4 0x00000060 Code RO 2295 i.drv_phy_get_pll_para CVWL568.lib(drv_phy_common.o) + 0x00016f44 0x00016f44 0x00000054 Code RO 2296 i.drv_phy_get_rate_para CVWL568.lib(drv_phy_common.o) + 0x00016f98 0x00016f98 0x00000010 Code RO 2297 i.drv_phy_test_clear CVWL568.lib(drv_phy_common.o) + 0x00016fa8 0x00016fa8 0x00000018 Code RO 2298 i.drv_phy_test_lock CVWL568.lib(drv_phy_common.o) + 0x00016fc0 0x00016fc0 0x00000020 Code RO 2300 i.drv_phy_test_write_1_byte CVWL568.lib(drv_phy_common.o) + 0x00016fe0 0x00016fe0 0x00000026 Code RO 2301 i.drv_phy_test_write_2_byte CVWL568.lib(drv_phy_common.o) + 0x00017006 0x00017006 0x0000001e Code RO 2302 i.drv_phy_test_write_code CVWL568.lib(drv_phy_common.o) + 0x00017024 0x00017024 0x00000020 Code RO 2303 i.drv_phy_test_write_data CVWL568.lib(drv_phy_common.o) + 0x00017044 0x00017044 0x00000020 Code RO 1602 i.drv_pwr_set_cp_mode CVWL568.lib(drv_pwr.o) + 0x00017064 0x00017064 0x00000018 Code RO 1604 i.drv_pwr_set_pvd_mode CVWL568.lib(drv_pwr.o) + 0x0001707c 0x0001707c 0x00000038 Code RO 1605 i.drv_pwr_set_system_clk_src CVWL568.lib(drv_pwr.o) + 0x000170b4 0x000170b4 0x0000000c Code RO 1791 i.drv_rx_phy_test_clear CVWL568.lib(drv_dsi_rx.o) + 0x000170c0 0x000170c0 0x00000010 Code RO 1792 i.drv_rx_phy_test_lock CVWL568.lib(drv_dsi_rx.o) + 0x000170d0 0x000170d0 0x00000014 Code RO 1794 i.drv_rx_phy_test_write_1_byte CVWL568.lib(drv_dsi_rx.o) + 0x000170e4 0x000170e4 0x00000016 Code RO 1795 i.drv_rx_phy_test_write_2_byte CVWL568.lib(drv_dsi_rx.o) + 0x000170fa 0x000170fa 0x0000000a Code RO 2058 i.drv_rxbr_clear_pkt_buffer CVWL568.lib(drv_rxbr.o) + 0x00017104 0x00017104 0x00000004 Code RO 2059 i.drv_rxbr_clear_status0 CVWL568.lib(drv_rxbr.o) + 0x00017108 0x00017108 0x0000005a Code RO 2061 i.drv_rxbr_enable_irq CVWL568.lib(drv_rxbr.o) + 0x00017162 0x00017162 0x00000002 PAD + 0x00017164 0x00017164 0x00000014 Code RO 2062 i.drv_rxbr_frame_drop_cfg CVWL568.lib(drv_rxbr.o) + 0x00017178 0x00017178 0x00000064 Code RO 2063 i.drv_rxbr_get_clk CVWL568.lib(drv_rxbr.o) + 0x000171dc 0x000171dc 0x00000004 Code RO 2064 i.drv_rxbr_get_col_addr CVWL568.lib(drv_rxbr.o) + 0x000171e0 0x000171e0 0x00000012 Code RO 1098 i.drv_rxbr_get_int_source CVWL568.lib(hal_internal_vsync.o) + 0x000171f2 0x000171f2 0x00000004 Code RO 2067 i.drv_rxbr_get_page_addr CVWL568.lib(drv_rxbr.o) + 0x000171f6 0x000171f6 0x00000012 Code RO 1099 i.drv_rxbr_get_status0 CVWL568.lib(hal_internal_vsync.o) + 0x00017208 0x00017208 0x0000000c Code RO 2069 i.drv_rxbr_hline_rcv0_cfg CVWL568.lib(drv_rxbr.o) + 0x00017214 0x00017214 0x00000008 Code RO 2070 i.drv_rxbr_hline_rcv_cfg CVWL568.lib(drv_rxbr.o) + 0x0001721c 0x0001721c 0x0000000c Code RO 2071 i.drv_rxbr_register_irq0_callback CVWL568.lib(drv_rxbr.o) + 0x00017228 0x00017228 0x0000000c Code RO 2072 i.drv_rxbr_register_irq1_callback CVWL568.lib(drv_rxbr.o) + 0x00017234 0x00017234 0x00000014 Code RO 2073 i.drv_rxbr_set_ack_pkt_header CVWL568.lib(drv_rxbr.o) + 0x00017248 0x00017248 0x000000cc Code RO 2074 i.drv_rxbr_set_cmd_filter CVWL568.lib(drv_rxbr.o) + 0x00017314 0x00017314 0x00000014 Code RO 2076 i.drv_rxbr_set_color_format CVWL568.lib(drv_rxbr.o) + 0x00017328 0x00017328 0x00000014 Code RO 2078 i.drv_rxbr_set_inten CVWL568.lib(drv_rxbr.o) + 0x0001733c 0x0001733c 0x00000010 Code RO 2079 i.drv_rxbr_set_ltpo_drop_th CVWL568.lib(drv_rxbr.o) + 0x0001734c 0x0001734c 0x00000026 Code RO 2081 i.drv_rxbr_set_usr_cfg CVWL568.lib(drv_rxbr.o) + 0x00017372 0x00017372 0x00000008 Code RO 2082 i.drv_rxbr_set_usr_col CVWL568.lib(drv_rxbr.o) + 0x0001737a 0x0001737a 0x00000008 Code RO 2083 i.drv_rxbr_set_usr_row CVWL568.lib(drv_rxbr.o) + 0x00017382 0x00017382 0x00000002 PAD + 0x00017384 0x00017384 0x00000020 Code RO 1650 i.drv_spi_m_read_data CVWL568.lib(drv_spi_master.o) + 0x000173a4 0x000173a4 0x00000054 Code RO 1678 i.drv_swire_set_int CVWL568.lib(drv_swire.o) + 0x000173f8 0x000173f8 0x0000001c Code RO 1679 i.drv_swire_set_power_down CVWL568.lib(drv_swire.o) + 0x00017414 0x00017414 0x0000000c Code RO 1694 i.drv_sys_cfg_clear_all_int CVWL568.lib(drv_sys_cfg.o) + 0x00017420 0x00017420 0x00000028 Code RO 1695 i.drv_sys_cfg_clear_pending CVWL568.lib(drv_sys_cfg.o) + 0x00017448 0x00017448 0x00000018 Code RO 1698 i.drv_sys_cfg_sel_ap_rst_lvl_trig CVWL568.lib(drv_sys_cfg.o) + 0x00017460 0x00017460 0x0000001c Code RO 1699 i.drv_sys_cfg_sel_ap_rst_trig CVWL568.lib(drv_sys_cfg.o) + 0x0001747c 0x0001747c 0x00000024 Code RO 1700 i.drv_sys_cfg_sel_gpio_group CVWL568.lib(drv_sys_cfg.o) + 0x000174a0 0x000174a0 0x00000024 Code RO 1701 i.drv_sys_cfg_sel_int_trig CVWL568.lib(drv_sys_cfg.o) + 0x000174c4 0x000174c4 0x00000010 Code RO 1703 i.drv_sys_cfg_set_dma_rx_req CVWL568.lib(drv_sys_cfg.o) + 0x000174d4 0x000174d4 0x00000010 Code RO 1704 i.drv_sys_cfg_set_dma_tx_req CVWL568.lib(drv_sys_cfg.o) + 0x000174e4 0x000174e4 0x00000024 Code RO 1705 i.drv_sys_cfg_set_int CVWL568.lib(drv_sys_cfg.o) + 0x00017508 0x00017508 0x0000001a Code RO 1728 i.drv_timer_clear_status_flags CVWL568.lib(drv_timer.o) + 0x00017522 0x00017522 0x00000020 Code RO 1729 i.drv_timer_enable CVWL568.lib(drv_timer.o) + 0x00017542 0x00017542 0x00000002 PAD + 0x00017544 0x00017544 0x00000010 Code RO 1730 i.drv_timer_get_instance CVWL568.lib(drv_timer.o) + 0x00017554 0x00017554 0x00000010 Code RO 1731 i.drv_timer_get_prescaler CVWL568.lib(drv_timer.o) + 0x00017564 0x00017564 0x00000044 Code RO 1733 i.drv_timer_handle_interrupt CVWL568.lib(drv_timer.o) + 0x000175a8 0x000175a8 0x00000014 Code RO 1734 i.drv_timer_register_callback CVWL568.lib(drv_timer.o) + 0x000175bc 0x000175bc 0x00000010 Code RO 1735 i.drv_timer_set_compare_val CVWL568.lib(drv_timer.o) + 0x000175cc 0x000175cc 0x00000054 Code RO 1736 i.drv_timer_set_int CVWL568.lib(drv_timer.o) + 0x00017620 0x00017620 0x00000028 Code RO 1737 i.drv_timer_set_prescaler CVWL568.lib(drv_timer.o) + 0x00017648 0x00017648 0x0000000a Code RO 1874 i.drv_tx_phy_test_clear CVWL568.lib(drv_dsi_tx.o) + 0x00017652 0x00017652 0x0000001c Code RO 1875 i.drv_tx_phy_test_enter CVWL568.lib(drv_dsi_tx.o) + 0x0001766e 0x0001766e 0x0000001c Code RO 1876 i.drv_tx_phy_test_exit CVWL568.lib(drv_dsi_tx.o) + 0x0001768a 0x0001768a 0x00000012 Code RO 1878 i.drv_tx_phy_test_write_1_byte CVWL568.lib(drv_dsi_tx.o) + 0x0001769c 0x0001769c 0x00000014 Code RO 1879 i.drv_tx_phy_test_write_2_byte CVWL568.lib(drv_dsi_tx.o) + 0x000176b0 0x000176b0 0x00000010 Code RO 1880 i.drv_tx_phy_test_write_code CVWL568.lib(drv_dsi_tx.o) + 0x000176c0 0x000176c0 0x00000008 Code RO 2122 i.drv_vidc_clear_irq CVWL568.lib(drv_vidc.o) + 0x000176c8 0x000176c8 0x00000018 Code RO 2126 i.drv_vidc_enable CVWL568.lib(drv_vidc.o) + 0x000176e0 0x000176e0 0x00000040 Code RO 2127 i.drv_vidc_enable_irq CVWL568.lib(drv_vidc.o) + 0x00017720 0x00017720 0x00000012 Code RO 2129 i.drv_vidc_get_irq_status CVWL568.lib(drv_vidc.o) + 0x00017732 0x00017732 0x00000002 PAD + 0x00017734 0x00017734 0x00000028 Code RO 2133 i.drv_vidc_init_module_enable CVWL568.lib(drv_vidc.o) + 0x0001775c 0x0001775c 0x0000000c Code RO 2134 i.drv_vidc_register_callback CVWL568.lib(drv_vidc.o) + 0x00017768 0x00017768 0x00000006 Code RO 2135 i.drv_vidc_reset CVWL568.lib(drv_vidc.o) + 0x0001776e 0x0001776e 0x0000003c Code RO 2137 i.drv_vidc_set_dst_parameter CVWL568.lib(drv_vidc.o) + 0x000177aa 0x000177aa 0x00000014 Code RO 2141 i.drv_vidc_set_irqen CVWL568.lib(drv_vidc.o) + 0x000177be 0x000177be 0x00000010 Code RO 2142 i.drv_vidc_set_mirror CVWL568.lib(drv_vidc.o) + 0x000177ce 0x000177ce 0x00000008 Code RO 2145 i.drv_vidc_set_p2r_hcoef0 CVWL568.lib(drv_vidc.o) + 0x000177d6 0x000177d6 0x00000026 Code RO 2146 i.drv_vidc_set_p2r_hinitb CVWL568.lib(drv_vidc.o) + 0x000177fc 0x000177fc 0x00000026 Code RO 2147 i.drv_vidc_set_p2r_hinitr CVWL568.lib(drv_vidc.o) + 0x00017822 0x00017822 0x00000002 PAD + 0x00017824 0x00017824 0x00000018 Code RO 2148 i.drv_vidc_set_pentile_swap CVWL568.lib(drv_vidc.o) + 0x0001783c 0x0001783c 0x0000000a Code RO 2149 i.drv_vidc_set_pu_ctrl CVWL568.lib(drv_vidc.o) + 0x00017846 0x00017846 0x00000010 Code RO 2150 i.drv_vidc_set_rotation CVWL568.lib(drv_vidc.o) + 0x00017856 0x00017856 0x0000000a Code RO 2151 i.drv_vidc_set_scld_hcoef0 CVWL568.lib(drv_vidc.o) + 0x00017860 0x00017860 0x0000000a Code RO 2152 i.drv_vidc_set_scld_hcoef1 CVWL568.lib(drv_vidc.o) + 0x0001786a 0x0001786a 0x00000012 Code RO 2153 i.drv_vidc_set_scld_step CVWL568.lib(drv_vidc.o) + 0x0001787c 0x0001787c 0x0000000a Code RO 2154 i.drv_vidc_set_scld_vcoef0 CVWL568.lib(drv_vidc.o) + 0x00017886 0x00017886 0x0000000a Code RO 2155 i.drv_vidc_set_scld_vcoef1 CVWL568.lib(drv_vidc.o) + 0x00017890 0x00017890 0x00000016 Code RO 2156 i.drv_vidc_set_src_parameter CVWL568.lib(drv_vidc.o) + 0x000178a6 0x000178a6 0x00000002 PAD + 0x000178a8 0x000178a8 0x00000010 Code RO 2745 i.drv_wdg_clear_counter CVWL568.lib(drv_wdg.o) + 0x000178b8 0x000178b8 0x00000010 Code RO 2746 i.drv_wdg_clear_edge_flag CVWL568.lib(drv_wdg.o) + 0x000178c8 0x000178c8 0x00000010 Code RO 2749 i.drv_wdg_read_edge_flag CVWL568.lib(drv_wdg.o) + 0x000178d8 0x000178d8 0x00000040 Code RO 2752 i.drv_wdg_set_int CVWL568.lib(drv_wdg.o) + 0x00017918 0x00017918 0x0000000a Code RO 1362 i.fls_clr_interrupt_flag CVWL568.lib(drv_fls.o) + 0x00017922 0x00017922 0x00000014 Code RO 2352 i.fputc CVWL568.lib(tau_log.o) + 0x00017936 0x00017936 0x00000002 PAD + 0x00017938 0x00017938 0x00000034 Code RO 547 i.hal_dsi_rx_ctrl_create_handle CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x0001796c 0x0001796c 0x0000009c Code RO 549 i.hal_dsi_rx_ctrl_deinit CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00017a08 0x00017a08 0x00000084 Code RO 551 i.hal_dsi_rx_ctrl_dsc_async_handler CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00017a8c 0x00017a8c 0x00000028 Code RO 553 i.hal_dsi_rx_ctrl_gen_a_tear_signal CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00017ab4 0x00017ab4 0x00000028 Code RO 555 i.hal_dsi_rx_ctrl_get_max_ret_size CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00017adc 0x00017adc 0x00000064 Code RO 556 i.hal_dsi_rx_ctrl_hight_performan_mode CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00017b40 0x00017b40 0x00000098 Code RO 557 i.hal_dsi_rx_ctrl_init CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00017bd8 0x00017bd8 0x000001a4 Code RO 558 i.hal_dsi_rx_ctrl_init_clk CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00017d7c 0x00017d7c 0x000000d8 Code RO 559 i.hal_dsi_rx_ctrl_init_dsi_rx CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00017e54 0x00017e54 0x00000158 Code RO 560 i.hal_dsi_rx_ctrl_init_memc CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00017fac 0x00017fac 0x00000148 Code RO 561 i.hal_dsi_rx_ctrl_init_rxbr CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x000180f4 0x000180f4 0x0000022c Code RO 562 i.hal_dsi_rx_ctrl_init_vidc CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00018320 0x00018320 0x0000003c Code RO 563 i.hal_dsi_rx_ctrl_pre_init_pps CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x0001835c 0x0001835c 0x000000f0 Code RO 566 i.hal_dsi_rx_ctrl_send_ack_cmd CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x0001844c 0x0001844c 0x00000034 Code RO 570 i.hal_dsi_rx_ctrl_set_cus_sync_line CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00018480 0x00018480 0x00000034 Code RO 573 i.hal_dsi_rx_ctrl_set_hw_tear_mode CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x000184b4 0x000184b4 0x00000038 Code RO 574 i.hal_dsi_rx_ctrl_set_ipi_cfg CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x000184ec 0x000184ec 0x00000072 Code RO 579 i.hal_dsi_rx_ctrl_set_rxbr_clk CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x0001855e 0x0001855e 0x00000002 PAD + 0x00018560 0x00018560 0x00000034 Code RO 580 i.hal_dsi_rx_ctrl_set_sw_tear_mode CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00018594 0x00018594 0x0000000e Code RO 582 i.hal_dsi_rx_ctrl_set_tear_mode_ex CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x000185a2 0x000185a2 0x00000002 PAD + 0x000185a4 0x000185a4 0x0000003c Code RO 583 i.hal_dsi_rx_ctrl_start CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x000185e0 0x000185e0 0x0000003c Code RO 584 i.hal_dsi_rx_ctrl_stop CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x0001861c 0x0001861c 0x00000020 Code RO 586 i.hal_dsi_rx_ctrl_toggle_resolution CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x0001863c 0x0001863c 0x00000190 Code RO 640 i.hal_dsi_tx_calc_video_chunks CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x000187cc 0x000187cc 0x00000034 Code RO 641 i.hal_dsi_tx_config_params_for_lane_rate CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018800 0x00018800 0x00000450 Code RO 642 i.hal_dsi_tx_count_lane_rate CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018c50 0x00018c50 0x0000002c Code RO 645 i.hal_dsi_tx_ctrl_create_handle CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018c7c 0x00018c7c 0x00000084 Code RO 646 i.hal_dsi_tx_ctrl_deinit CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018d00 0x00018d00 0x0000004c Code RO 650 i.hal_dsi_tx_ctrl_enter_init_panel_mode CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018d4c 0x00018d4c 0x00000028 Code RO 652 i.hal_dsi_tx_ctrl_exit_init_panel_mode CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018d74 0x00018d74 0x000000a4 Code RO 654 i.hal_dsi_tx_ctrl_init CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018e18 0x00018e18 0x00000024 Code RO 655 i.hal_dsi_tx_ctrl_init_clk CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018e3c 0x00018e3c 0x0000000c Code RO 656 i.hal_dsi_tx_ctrl_panel_reset_pin CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018e48 0x00018e48 0x00000020 Code RO 659 i.hal_dsi_tx_ctrl_set_ccm CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018e68 0x00018e68 0x00000014 Code RO 665 i.hal_dsi_tx_ctrl_set_overwrite_rgb CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018e7c 0x00018e7c 0x00000010 Code RO 666 i.hal_dsi_tx_ctrl_set_partial_disp CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018e8c 0x00018e8c 0x00000024 Code RO 667 i.hal_dsi_tx_ctrl_set_partial_disp_area CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018eb0 0x00018eb0 0x0000009c Code RO 670 i.hal_dsi_tx_ctrl_start CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018f4c 0x00018f4c 0x00000044 Code RO 671 i.hal_dsi_tx_ctrl_stop CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018f90 0x00018f90 0x000000d8 Code RO 672 i.hal_dsi_tx_ctrl_write_array_cmd CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00019068 0x00019068 0x000000b0 Code RO 673 i.hal_dsi_tx_ctrl_write_cmd CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00019118 0x00019118 0x00000044 Code RO 674 i.hal_dsi_tx_init_data_mode CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x0001915c 0x0001915c 0x00000030 Code RO 675 i.hal_dsi_tx_init_dpi_cfg CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x0001918c 0x0001918c 0x00000020 Code RO 676 i.hal_dsi_tx_init_interrupt CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x000191ac 0x000191ac 0x00000020 Code RO 677 i.hal_dsi_tx_init_phy_cfg CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x000191cc 0x000191cc 0x00000094 Code RO 678 i.hal_dsi_tx_init_remains CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00019260 0x00019260 0x00000058 Code RO 679 i.hal_dsi_tx_init_video_mode CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x000192b8 0x000192b8 0x00000044 Code RO 680 i.hal_dsi_tx_send_cmd CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x000192fc 0x000192fc 0x00000018 Code RO 745 i.hal_gpio_ctrl_eint CVWL568.lib(hal_gpio.o) + 0x00019314 0x00019314 0x00000012 Code RO 746 i.hal_gpio_get_input_data CVWL568.lib(hal_gpio.o) + 0x00019326 0x00019326 0x00000002 PAD + 0x00019328 0x00019328 0x00000040 Code RO 749 i.hal_gpio_init_eint CVWL568.lib(hal_gpio.o) + 0x00019368 0x00019368 0x00000020 Code RO 750 i.hal_gpio_init_input CVWL568.lib(hal_gpio.o) + 0x00019388 0x00019388 0x00000028 Code RO 751 i.hal_gpio_init_output CVWL568.lib(hal_gpio.o) + 0x000193b0 0x000193b0 0x00000018 Code RO 752 i.hal_gpio_reg_eint_cb CVWL568.lib(hal_gpio.o) + 0x000193c8 0x000193c8 0x00000050 Code RO 753 i.hal_gpio_set_ap_reset_int CVWL568.lib(hal_gpio.o) + 0x00019418 0x00019418 0x00000060 Code RO 755 i.hal_gpio_set_mode CVWL568.lib(hal_gpio.o) + 0x00019478 0x00019478 0x00000008 Code RO 756 i.hal_gpio_set_output_data CVWL568.lib(hal_gpio.o) + 0x00019480 0x00019480 0x00000020 Code RO 758 i.hal_gpio_set_pull_state CVWL568.lib(hal_gpio.o) + 0x000194a0 0x000194a0 0x0000006c Code RO 784 i.hal_i2c_m_dma_init CVWL568.lib(hal_i2c_master.o) + 0x0001950c 0x0001950c 0x00000020 Code RO 785 i.hal_i2c_m_dma_read CVWL568.lib(hal_i2c_master.o) + 0x0001952c 0x0001952c 0x0000001c Code RO 786 i.hal_i2c_m_dma_write CVWL568.lib(hal_i2c_master.o) + 0x00019548 0x00019548 0x0000000c Code RO 788 i.hal_i2c_m_transfer_complate CVWL568.lib(hal_i2c_master.o) + 0x00019554 0x00019554 0x00000020 Code RO 789 i.hal_i2c_master_irq_callback CVWL568.lib(hal_i2c_master.o) + 0x00019574 0x00019574 0x00000010 Code RO 803 i.hal_i2c_s_dma_user_callback CVWL568.lib(hal_i2c_slave.o) + 0x00019584 0x00019584 0x0000004c Code RO 804 i.hal_i2c_s_dma_write CVWL568.lib(hal_i2c_slave.o) + 0x000195d0 0x000195d0 0x000000c8 Code RO 806 i.hal_i2c_s_init CVWL568.lib(hal_i2c_slave.o) + 0x00019698 0x00019698 0x00000014 Code RO 807 i.hal_i2c_s_nonblocking_read CVWL568.lib(hal_i2c_slave.o) + 0x000196ac 0x000196ac 0x0000000c Code RO 815 i.hal_i2c_s_set_transfer CVWL568.lib(hal_i2c_slave.o) + 0x000196b8 0x000196b8 0x00000174 Code RO 818 i.hal_i2c_slave_irq_callback CVWL568.lib(hal_i2c_slave.o) + 0x0001982c 0x0001982c 0x000000fc Code RO 1100 i.hal_internal_init_memc CVWL568.lib(hal_internal_vsync.o) + 0x00019928 0x00019928 0x00000010 Code RO 1102 i.hal_internal_sync_get_fb_setting CVWL568.lib(hal_internal_vsync.o) + 0x00019938 0x00019938 0x00000010 Code RO 1103 i.hal_internal_sync_get_hight_performan_mode CVWL568.lib(hal_internal_vsync.o) + 0x00019948 0x00019948 0x0000022c Code RO 1104 i.hal_internal_sync_input_resolution_change CVWL568.lib(hal_internal_vsync.o) + 0x00019b74 0x00019b74 0x00000010 Code RO 1107 i.hal_internal_update_dpi_param CVWL568.lib(hal_internal_vsync.o) + 0x00019b84 0x00019b84 0x0000012c Code RO 1108 i.hal_internal_video_mode_auto_sync CVWL568.lib(hal_internal_vsync.o) + 0x00019cb0 0x00019cb0 0x00000028 Code RO 1109 i.hal_internal_vsync_deinit CVWL568.lib(hal_internal_vsync.o) + 0x00019cd8 0x00019cd8 0x0000000c Code RO 1110 i.hal_internal_vsync_get_rx_state CVWL568.lib(hal_internal_vsync.o) + 0x00019ce4 0x00019ce4 0x00000018 Code RO 1111 i.hal_internal_vsync_get_sync_line CVWL568.lib(hal_internal_vsync.o) + 0x00019cfc 0x00019cfc 0x0000000c Code RO 1112 i.hal_internal_vsync_get_tear_mode CVWL568.lib(hal_internal_vsync.o) + 0x00019d08 0x00019d08 0x0000000c Code RO 1113 i.hal_internal_vsync_get_tx_state CVWL568.lib(hal_internal_vsync.o) + 0x00019d14 0x00019d14 0x00000118 Code RO 1114 i.hal_internal_vsync_init_rx CVWL568.lib(hal_internal_vsync.o) + 0x00019e2c 0x00019e2c 0x000000b0 Code RO 1115 i.hal_internal_vsync_init_tx CVWL568.lib(hal_internal_vsync.o) + 0x00019edc 0x00019edc 0x0000011c Code RO 1117 i.hal_internal_vsync_set_auto_hw_filter CVWL568.lib(hal_internal_vsync.o) + 0x00019ff8 0x00019ff8 0x00000014 Code RO 1119 i.hal_internal_vsync_set_rx_state CVWL568.lib(hal_internal_vsync.o) + 0x0001a00c 0x0001a00c 0x00000024 Code RO 1120 i.hal_internal_vsync_set_sync_line CVWL568.lib(hal_internal_vsync.o) + 0x0001a030 0x0001a030 0x00000050 Code RO 1121 i.hal_internal_vsync_set_tear_mode CVWL568.lib(hal_internal_vsync.o) + 0x0001a080 0x0001a080 0x00000080 Code RO 1122 i.hal_internal_vsync_set_tx_state CVWL568.lib(hal_internal_vsync.o) + 0x0001a100 0x0001a100 0x00000024 Code RO 681 i.hal_lcdc_config_ccm CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x0001a124 0x0001a124 0x00000058 Code RO 682 i.hal_lcdc_config_remains CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x0001a17c 0x0001a17c 0x00000014 Code RO 683 i.hal_lcdc_config_rgb_to_pentile CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x0001a190 0x0001a190 0x00000164 Code RO 684 i.hal_lcdc_config_upscaler CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x0001a2f4 0x0001a2f4 0x00000054 Code RO 685 i.hal_lcdc_init_cfg CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x0001a348 0x0001a348 0x000001b0 Code RO 686 i.hal_lcdc_init_clk CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x0001a4f8 0x0001a4f8 0x00000040 Code RO 687 i.hal_lcdc_init_interrupt CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x0001a538 0x0001a538 0x0000000e Code RO 843 i.hal_spi_m_clear_rxfifo CVWL568.lib(hal_spi_master.o) + 0x0001a546 0x0001a546 0x00000016 Code RO 869 i.hal_swire_open CVWL568.lib(hal_swire.o) + 0x0001a55c 0x0001a55c 0x00000008 Code RO 884 i.hal_system_enable_systick CVWL568.lib(hal_system.o) + 0x0001a564 0x0001a564 0x00000088 Code RO 888 i.hal_system_init CVWL568.lib(hal_system.o) + 0x0001a5ec 0x0001a5ec 0x0000001c Code RO 889 i.hal_system_init_console CVWL568.lib(hal_system.o) + 0x0001a608 0x0001a608 0x00000008 Code RO 892 i.hal_system_set_phy_calibration CVWL568.lib(hal_system.o) + 0x0001a610 0x0001a610 0x00000008 Code RO 893 i.hal_system_set_pvd CVWL568.lib(hal_system.o) + 0x0001a618 0x0001a618 0x00000008 Code RO 894 i.hal_system_set_vcc CVWL568.lib(hal_system.o) + 0x0001a620 0x0001a620 0x0000001a Code RO 919 i.hal_timer_init CVWL568.lib(hal_timer.o) + 0x0001a63a 0x0001a63a 0x00000002 PAD + 0x0001a63c 0x0001a63c 0x00000048 Code RO 921 i.hal_timer_start CVWL568.lib(hal_timer.o) + 0x0001a684 0x0001a684 0x00000028 Code RO 923 i.hal_timer_stop CVWL568.lib(hal_timer.o) + 0x0001a6ac 0x0001a6ac 0x0000008c Code RO 1076 i.hal_uart_init CVWL568.lib(hal_uart.o) + 0x0001a738 0x0001a738 0x00000010 Code RO 1079 i.hal_uart_transmit_blocking CVWL568.lib(hal_uart.o) + 0x0001a748 0x0001a748 0x00000110 Code RO 2232 i.handle_init CVWL568.lib(irq_redirect .o) + 0x0001a858 0x0001a858 0x00000064 Code RO 117 i.init_mipi_tx ap_demo.o + 0x0001a8bc 0x0001a8bc 0x00000088 Code RO 118 i.init_panel ap_demo.o + 0x0001a944 0x0001a944 0x0000000a Code RO 3 i.main main.o + 0x0001a94e 0x0001a94e 0x00000002 PAD + 0x0001a950 0x0001a950 0x000000a0 Code RO 119 i.open_mipi_rx ap_demo.o + 0x0001a9f0 0x0001a9f0 0x00000054 Code RO 120 i.pps_update_handle ap_demo.o + 0x0001aa44 0x0001aa44 0x000003f4 Code RO 1126 i.rx_get_dcs_packet_data CVWL568.lib(hal_internal_vsync.o) + 0x0001ae38 0x0001ae38 0x00000178 Code RO 1127 i.rx_partial_update CVWL568.lib(hal_internal_vsync.o) + 0x0001afb0 0x0001afb0 0x0000008c Code RO 1128 i.rx_receive_packet CVWL568.lib(hal_internal_vsync.o) + 0x0001b03c 0x0001b03c 0x00000180 Code RO 1129 i.rx_receive_pps CVWL568.lib(hal_internal_vsync.o) + 0x0001b1bc 0x0001b1bc 0x000000a4 Code RO 1130 i.rxbr_irq0_callback CVWL568.lib(hal_internal_vsync.o) + 0x0001b260 0x0001b260 0x000001dc Code RO 1131 i.rxbr_irq1_callback CVWL568.lib(hal_internal_vsync.o) + 0x0001b43c 0x0001b43c 0x000000c4 Code RO 1132 i.soft_gen_te CVWL568.lib(hal_internal_vsync.o) + 0x0001b500 0x0001b500 0x000000c0 Code RO 1133 i.soft_gen_te_double_buffer CVWL568.lib(hal_internal_vsync.o) + 0x0001b5c0 0x0001b5c0 0x00000030 Code RO 121 i.soft_timer3_cb ap_demo.o + 0x0001b5f0 0x0001b5f0 0x00000048 Code RO 2772 i.sqrt m_ps.l(sqrt.o) + 0x0001b638 0x0001b638 0x00000040 Code RO 122 i.tp_heartbeat_exec ap_demo.o + 0x0001b678 0x0001b678 0x00000108 Code RO 1134 i.vidc_callback CVWL568.lib(hal_internal_vsync.o) + 0x0001b780 0x0001b780 0x000000d0 Code RO 1135 i.vpre_err_reset CVWL568.lib(hal_internal_vsync.o) + 0x0001b850 0x0001b850 0x000001cc Code RO 1136 i.vsync_set_te_mode CVWL568.lib(hal_internal_vsync.o) + 0x0001ba1c 0x0001ba1c 0x000000f8 Data RO 123 .constdata ap_demo.o + 0x0001bb14 0x0001bb14 0x00000024 Data RO 689 .constdata CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x0001bb38 0x0001bb38 0x000000d2 Data RO 761 .constdata CVWL568.lib(hal_gpio.o) + 0x0001bc0a 0x0001bc0a 0x00000002 PAD + 0x0001bc0c 0x0001bc0c 0x00000020 Data RO 819 .constdata CVWL568.lib(hal_i2c_slave.o) + 0x0001bc2c 0x0001bc2c 0x00002150 Data RO 947 .constdata WL568_20U_HX667_TP.lib(app_tp_for_custom_s8.o) + 0x0001dd7c 0x0001dd7c 0x00000001 Data RO 960 .constdata WL568_20U_HX667_TP.lib(app_tp_for_custom_s8.o) + 0x0001dd7d 0x0001dd7d 0x00000003 PAD + 0x0001dd80 0x0001dd80 0x00000008 Data RO 1587 .constdata CVWL568.lib(drv_param_init.o) + 0x0001dd88 0x0001dd88 0x00000186 Data RO 2304 .constdata CVWL568.lib(drv_phy_common.o) + 0x0001df0e 0x0001df0e 0x00000002 PAD + 0x0001df10 0x0001df10 0x00000048 Data RO 590 .conststring CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x0001df58 0x0001df58 0x00000043 Data RO 690 .conststring CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x0001df9b 0x0001df9b 0x00000001 PAD + 0x0001df9c 0x0001df9c 0x00000134 Data RO 1138 .conststring CVWL568.lib(hal_internal_vsync.o) + 0x0001e0d0 0x0001e0d0 0x00000030 Data RO 3134 Region$$Table anon$$obj.o + + + Execution Region RW_RAM1 (Exec base: 0x00070000, Load base: 0x0001e100, Size: 0x00000000, Max: 0x000000f0, ABSOLUTE) + + **** No section assigned to this execution region **** + + + Execution Region RW_RAM2 (Exec base: 0x00070100, Load base: 0x0001e100, Size: 0x000000c0, Max: 0x000000d0, ABSOLUTE) + + Exec Addr Load Addr Size Type Attr Idx E Section Name Object + + 0x00070100 - 0x000000c0 Zero RW 2233 .ARM.__AT_0x00070100 CVWL568.lib(irq_redirect .o) + + + Execution Region RW_RAM3 (Exec base: 0x000701d0, Load base: 0x0001e100, Size: 0x00005480, Max: 0x00007e30, ABSOLUTE, COMPRESSED[0x00001450]) + + Exec Addr Load Addr Size Type Attr Idx E Section Name Object + + 0x000701d0 COMPRESSED 0x00001d66 Data RW 124 .data ap_demo.o + 0x00071f36 COMPRESSED 0x00000017 Data RW 292 .data app_tp_transfer.o + 0x00071f4d COMPRESSED 0x00000028 Data RW 431 .data app_tp_st_touch.o + 0x00071f75 COMPRESSED 0x00000003 PAD + 0x00071f78 COMPRESSED 0x00000008 Data RW 591 .data CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00071f80 COMPRESSED 0x00000003 Data RW 691 .data CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00071f83 COMPRESSED 0x00000001 Data RW 790 .data CVWL568.lib(hal_i2c_master.o) + 0x00071f84 COMPRESSED 0x00000020 Data RW 820 .data CVWL568.lib(hal_i2c_slave.o) + 0x00071fa4 COMPRESSED 0x000000e4 Data RW 961 .data WL568_20U_HX667_TP.lib(app_tp_for_custom_s8.o) + 0x00072088 COMPRESSED 0x00000001 Data RW 964 .data WL568_20U_HX667_TP.lib(app_tp_for_custom_s8.o) + 0x00072089 COMPRESSED 0x00000001 Data RW 965 .data WL568_20U_HX667_TP.lib(app_tp_for_custom_s8.o) + 0x0007208a COMPRESSED 0x00000001 Data RW 970 .data WL568_20U_HX667_TP.lib(app_tp_for_custom_s8.o) + 0x0007208b COMPRESSED 0x00000003 Data RW 971 .data WL568_20U_HX667_TP.lib(app_tp_for_custom_s8.o) + 0x0007208e COMPRESSED 0x00000005 Data RW 972 .data WL568_20U_HX667_TP.lib(app_tp_for_custom_s8.o) + 0x00072093 COMPRESSED 0x00000001 PAD + 0x00072094 COMPRESSED 0x00000030 Data RW 982 .data WL568_20U_HX667_TP.lib(app_tp_for_custom_s8.o) + 0x000720c4 COMPRESSED 0x00000018 Data RW 1139 .data CVWL568.lib(hal_internal_vsync.o) + 0x000720dc COMPRESSED 0x0000000c Data RW 1198 .data CVWL568.lib(drv_common.o) + 0x000720e8 COMPRESSED 0x00000004 Data RW 1465 .data CVWL568.lib(drv_gpio.o) + 0x000720ec COMPRESSED 0x00000008 Data RW 1503 .data CVWL568.lib(drv_i2c_dma.o) + 0x000720f4 COMPRESSED 0x00000004 Data RW 1532 .data CVWL568.lib(drv_i2c_master.o) + 0x000720f8 COMPRESSED 0x00000004 Data RW 1563 .data CVWL568.lib(drv_i2c_slave.o) + 0x000720fc COMPRESSED 0x000004a4 Data RW 1588 .data CVWL568.lib(drv_param_init.o) + 0x000725a0 COMPRESSED 0x00000004 Data RW 1655 .data CVWL568.lib(drv_spi_master.o) + 0x000725a4 COMPRESSED 0x00000008 Data RW 1681 .data CVWL568.lib(drv_swire.o) + 0x000725ac COMPRESSED 0x00000001 Data RW 1706 .data CVWL568.lib(drv_sys_cfg.o) + 0x000725ad COMPRESSED 0x00000003 PAD + 0x000725b0 COMPRESSED 0x00000050 Data RW 1739 .data CVWL568.lib(drv_timer.o) + 0x00072600 COMPRESSED 0x00000008 Data RW 2085 .data CVWL568.lib(drv_rxbr.o) + 0x00072608 COMPRESSED 0x00000004 Data RW 2158 .data CVWL568.lib(drv_vidc.o) + 0x0007260c COMPRESSED 0x00000001 Data RW 2305 .data CVWL568.lib(drv_phy_common.o) + 0x0007260d COMPRESSED 0x00000003 PAD + 0x00072610 COMPRESSED 0x0000000c Data RW 2325 .data CVWL568.lib(drv_chip_info.o) + 0x0007261c COMPRESSED 0x00000006 Data RW 2362 .data tp_EncryptCheck.lib(app_tp_enc.o) + 0x00072622 COMPRESSED 0x00000002 PAD + 0x00072624 COMPRESSED 0x00000012 Data RW 2522 .data CVWL568.lib(norflash.o) + 0x00072636 COMPRESSED 0x00000002 PAD + 0x00072638 COMPRESSED 0x0000000c Data RW 2609 .data CVWL568.lib(drv_pwm.o) + 0x00072644 COMPRESSED 0x00000008 Data RW 2687 .data CVWL568.lib(drv_uart.o) + 0x0007264c COMPRESSED 0x0000000c Data RW 2754 .data CVWL568.lib(drv_wdg.o) + 0x00072658 COMPRESSED 0x00000004 Data RW 3103 .data mc_p.l(stdout.o) + 0x0007265c COMPRESSED 0x00000004 Data RW 3115 .data mc_p.l(errno.o) + 0x00072660 - 0x00000190 Zero RW 291 .bss app_tp_transfer.o + 0x000727f0 - 0x0000000c Zero RW 429 .bss app_tp_st_touch.o + 0x000727fc - 0x000000c4 Zero RW 589 .bss CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x000728c0 - 0x0000004c Zero RW 688 .bss CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x0007290c - 0x000000d0 Zero RW 1081 .bss CVWL568.lib(hal_uart.o) + 0x000729dc - 0x00000984 Zero RW 1137 .bss CVWL568.lib(hal_internal_vsync.o) + 0x00073360 - 0x0000001c Zero RW 1327 .bss CVWL568.lib(drv_dma.o) + 0x0007337c - 0x00000040 Zero RW 1464 .bss CVWL568.lib(drv_gpio.o) + 0x000733bc - 0x00000140 Zero RW 1502 .bss CVWL568.lib(drv_i2c_dma.o) + 0x000734fc - 0x00001030 Zero RW 1762 .bss CVWL568.lib(dcs_packet_fifo.o) + 0x0007452c - 0x00000100 Zero RW 2353 .bss CVWL568.lib(tau_log.o) + 0x0007462c - 0x00000020 Zero RW 2457 .bss CVWL568.lib(hal_spi_slave.o) + 0x0007464c COMPRESSED 0x00000004 PAD + 0x00074650 - 0x00001000 Zero RW 536 STACK startup_armcm0.o + + +============================================================================== + +Image component sizes + + + Code (inc. data) RO Data RW Data ZI Data Debug Object Name + + 6524 214 248 7526 0 39557 ap_demo.o + 882 66 0 40 12 10552 app_tp_st_touch.o + 1044 102 0 23 400 14196 app_tp_transfer.o + 36 6 0 0 0 553 board.o + 10 0 0 0 0 5703 main.o + 120 18 192 0 4096 2116 startup_armcm0.o + + ---------------------------------------------------------------------- + 8622 406 488 7592 4508 72677 Object Totals + 0 0 48 0 0 0 (incl. Generated) + 6 0 0 3 0 0 (incl. Padding) + + ---------------------------------------------------------------------- + + Code (inc. data) RO Data RW Data ZI Data Debug Library Member Name + + 216 32 0 0 4144 252 dcs_packet_fifo.o + 272 96 0 12 0 256 drv_chip_info.o + 192 82 24 12 0 264 drv_common.o + 420 90 0 0 0 1200 drv_crgu.o + 410 28 0 0 28 796 drv_dma.o + 232 28 0 0 0 340 drv_dsc_dec.o + 1644 494 0 0 0 1336 drv_dsi_rx.o + 1528 118 0 0 0 2428 drv_dsi_tx.o + 132 0 0 0 0 256 drv_efuse.o + 10 0 0 0 0 60 drv_fls.o + 796 112 0 4 64 1236 drv_gpio.o + 600 82 0 8 320 624 drv_i2c_dma.o + 360 86 0 4 0 456 drv_i2c_master.o + 292 36 0 4 0 580 drv_i2c_slave.o + 704 6 0 0 0 1504 drv_lcdc.o + 492 28 0 0 0 1112 drv_memc.o + 112 36 8 1188 0 376 drv_param_init.o + 428 30 390 1 0 664 drv_phy_common.o + 72 10 0 12 0 76 drv_pwm.o + 112 24 0 0 0 180 drv_pwr.o + 722 84 0 8 0 1456 drv_rxbr.o + 104 24 0 4 0 188 drv_spi_master.o + 144 16 0 8 0 200 drv_swire.o + 300 64 0 1 0 628 drv_sys_cfg.o + 358 30 0 80 0 872 drv_timer.o + 698 18 0 8 0 680 drv_uart.o + 510 28 0 4 0 1452 drv_vidc.o + 168 22 0 12 0 316 drv_wdg.o + 3328 398 72 8 196 1668 hal_dsi_rx_ctrl.o + 4344 304 103 3 76 2408 hal_dsi_tx_ctrl.o + 450 48 210 0 0 752 hal_gpio.o + 212 40 0 1 0 340 hal_i2c_master.o + 696 70 32 32 0 408 hal_i2c_slave.o + 8084 1704 308 24 2436 2616 hal_internal_vsync.o + 14 0 0 0 0 68 hal_spi_master.o + 580 32 0 0 32 136 hal_spi_slave.o + 22 0 0 0 0 68 hal_swire.o + 196 32 0 0 0 408 hal_system.o + 138 6 0 0 0 208 hal_timer.o + 156 18 0 0 208 144 hal_uart.o + 1076 324 0 0 192 1980 irq_redirect .o + 48 10 0 18 0 68 norflash.o + 58 0 0 0 0 128 tau_delay.o + 60 10 0 0 256 156 tau_log.o + 1784 74 8529 287 0 18027 app_tp_for_custom_s8.o + 200 20 0 0 0 76 ceil.o + 72 6 0 0 0 76 sqrt.o + 86 0 0 0 0 0 __dczerorl2.o + 0 0 0 0 0 0 entry.o + 0 0 0 0 0 0 entry10a.o + 0 0 0 0 0 0 entry11a.o + 8 4 0 0 0 0 entry2.o + 4 0 0 0 0 0 entry5.o + 0 0 0 0 0 0 entry7b.o + 0 0 0 0 0 0 entry8b.o + 8 4 0 0 0 0 entry9a.o + 12 6 0 4 0 60 errno.o + 30 0 0 0 0 0 handlers.o + 40 0 0 0 0 72 idiv.o + 36 8 0 0 0 68 init.o + 0 0 0 0 0 0 iusefp.o + 32 0 0 0 0 68 llshl.o + 38 0 0 0 0 68 llsshr.o + 34 0 0 0 0 68 llushr.o + 36 0 0 0 0 60 memcpya.o + 36 0 0 0 0 100 memseta.o + 2298 104 0 0 0 544 printfa.o + 0 0 0 4 0 0 stdout.o + 44 0 0 0 0 72 uidiv.o + 96 0 0 0 0 84 uldiv.o + 40 2 0 0 0 68 cdcmple.o + 40 2 0 0 0 68 cdrcmple.o + 20 0 0 0 0 68 cfrcmple.o + 356 4 0 0 0 140 dadd.o + 240 6 0 0 0 84 ddiv.o + 236 0 0 0 0 216 depilogue.o + 72 10 0 0 0 72 dfixi.o + 60 10 0 0 0 68 dfixui.o + 64 10 0 0 0 68 dfixul.o + 28 4 0 0 0 68 dfltui.o + 208 6 0 0 0 88 dmul.o + 162 0 0 0 0 80 dsqrt.o + 40 0 0 0 0 60 f2d.o + 178 0 0 0 0 108 fadd.o + 124 0 0 0 0 72 fdiv.o + 130 0 0 0 0 144 fepilogue.o + 50 0 0 0 0 60 ffixi.o + 40 0 0 0 0 60 ffixui.o + 22 0 0 0 0 68 fflti.o + 14 0 0 0 0 68 ffltui.o + 122 0 0 0 0 72 fmul.o + 24 0 0 0 0 60 fscalb.o + 100 10 0 6 0 4107 app_tp_enc.o + + ---------------------------------------------------------------------- + 38806 4990 9684 1768 7956 56754 Library Totals + 52 0 8 11 4 0 (incl. Padding) + + ---------------------------------------------------------------------- + + Code (inc. data) RO Data RW Data ZI Data Debug Library Name + + 31490 4700 1147 1456 7952 31344 CVWL568.lib + 1784 74 8529 287 0 18027 WL568_20U_HX667_TP.lib + 272 26 0 0 0 152 m_ps.l + 2838 126 0 8 0 1264 mc_p.l + 2270 54 0 0 0 1860 mf_p.l + 100 10 0 6 0 4107 tp_EncryptCheck.lib + + ---------------------------------------------------------------------- + 38806 4990 9684 1768 7956 56754 Library Totals + + ---------------------------------------------------------------------- + +============================================================================== + + + Code (inc. data) RO Data RW Data ZI Data Debug + + 47428 5396 10172 9360 12464 104947 Grand Totals + 47428 5396 10172 5200 12464 104947 ELF Image Totals (compressed) + 47428 5396 10172 5200 0 0 ROM Totals + +============================================================================== + + Total RO Size (Code + RO Data) 57600 ( 56.25kB) + Total RW Size (RW Data + ZI Data) 21824 ( 21.31kB) + Total ROM Size (Code + RO Data + RW Data) 62800 ( 61.33kB) + +============================================================================== + diff --git a/project/ISP_568/Listings/WL568_S20U_CSOT667_V100_20230713.map b/project/ISP_568/Listings/WL568_S20U_CSOT667_V100_20230713.map new file mode 100644 index 0000000..7f8a35b --- /dev/null +++ b/project/ISP_568/Listings/WL568_S20U_CSOT667_V100_20230713.map @@ -0,0 +1,5401 @@ +Component: ARM Compiler 5.06 update 6 (build 750) Tool: armlink [4d35ed] + +============================================================================== + +Section Cross References + + main.o(i.main) refers to board.o(i.board_Init) for board_Init + main.o(i.main) refers to ap_demo.o(i.ap_demo) for ap_demo + ap_demo.o(i.Gpio_swire_output) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + ap_demo.o(i.Gpio_swire_output) refers to tau_delay.o(i.delayUs) for delayUs + ap_demo.o(i.Gpio_swire_output) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + ap_demo.o(i.ap_dcs_read) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) for hal_dsi_rx_ctrl_get_max_ret_size + ap_demo.o(i.ap_dcs_read) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) for hal_dsi_rx_ctrl_send_ack_cmd + ap_demo.o(i.ap_dcs_read) refers to app_tp_st_touch.o(i.ap_get_tp_calibration_status_01) for ap_get_tp_calibration_status_01 + ap_demo.o(i.ap_dcs_read) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_demo) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + ap_demo.o(i.ap_demo) refers to app_tp_transfer.o(i.app_tp_I2C_init) for app_tp_I2C_init + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.open_mipi_rx) for open_mipi_rx + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.init_mipi_tx) for init_mipi_tx + ap_demo.o(i.ap_demo) refers to app_tp_transfer.o(i.app_tp_init) for app_tp_init + ap_demo.o(i.ap_demo) refers to hal_timer.o(i.hal_timer_init) for hal_timer_init + ap_demo.o(i.ap_demo) refers to hal_timer.o(i.hal_timer_start) for hal_timer_start + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.init_panel) for init_panel + ap_demo.o(i.ap_demo) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) for hal_dsi_tx_ctrl_start + ap_demo.o(i.ap_demo) refers to tau_delay.o(i.delayMs) for delayMs + ap_demo.o(i.ap_demo) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.Gpio_swire_output) for Gpio_swire_output + ap_demo.o(i.ap_demo) refers to hal_gpio.o(i.hal_gpio_set_ap_reset_int) for hal_gpio_set_ap_reset_int + ap_demo.o(i.ap_demo) refers to app_tp_transfer.o(i.app_tp_phone_clear_reset_on) for app_tp_phone_clear_reset_on + ap_demo.o(i.ap_demo) refers to app_tp_transfer.o(i.app_tp_transfer_screen_start) for app_tp_transfer_screen_start + ap_demo.o(i.ap_demo) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) for hal_dsi_rx_ctrl_dsc_async_handler + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.tp_heartbeat_exec) for tp_heartbeat_exec + ap_demo.o(i.ap_demo) refers to app_tp_st_touch.o(i.app_tp_calibration_exec) for app_tp_calibration_exec + ap_demo.o(i.ap_demo) refers to app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_record_event_exec) for ap_tp_st_touch_scan_point_record_event_exec + ap_demo.o(i.ap_demo) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + ap_demo.o(i.ap_demo) refers to app_tp_transfer.o(i.app_tp_transfer_screen_int) for app_tp_transfer_screen_int + ap_demo.o(i.ap_demo) refers to app_tp_transfer.o(i.S20_Start_init) for S20_Start_init + ap_demo.o(i.ap_demo) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_demo) refers to app_tp_for_custom_s8.o(.data) for tp_sleep_count + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.soft_timer3_cb) for soft_timer3_cb + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.ap_reset_cb) for ap_reset_cb + ap_demo.o(i.ap_get_reg_ca) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_get_reg_df) refers to ap_demo.o(i.blue_change_ccm) for blue_change_ccm + ap_demo.o(i.ap_get_reg_df) refers to memcpya.o(.text) for __aeabi_memcpy4 + ap_demo.o(i.ap_get_reg_df) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) for hal_dsi_tx_ctrl_set_ccm + ap_demo.o(i.ap_get_reg_df) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_reset_cb) refers to hal_system.o(i.hal_system_set_pvd) for hal_system_set_pvd + ap_demo.o(i.ap_reset_cb) refers to hal_system.o(i.hal_system_set_vcc) for hal_system_set_vcc + ap_demo.o(i.ap_set_backlight) refers to ap_demo.o(i.__ARM_common_switch8) for __ARM_common_switch8 + ap_demo.o(i.ap_set_backlight) refers to idiv.o(.text) for __aeabi_idivmod + ap_demo.o(i.ap_set_backlight) refers to uidiv.o(.text) for __aeabi_uidivmod + ap_demo.o(i.ap_set_backlight) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.ap_set_backlight) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_set_display_off) refers to ap_demo.o(i.Gpio_swire_output) for Gpio_swire_output + ap_demo.o(i.ap_set_display_off) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.ap_set_display_off) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_set_display_on) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_set_enter_sleep_mode) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.ap_set_enter_sleep_mode) refers to hal_timer.o(i.hal_timer_init) for hal_timer_init + ap_demo.o(i.ap_set_enter_sleep_mode) refers to hal_timer.o(i.hal_timer_start) for hal_timer_start + ap_demo.o(i.ap_set_enter_sleep_mode) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_set_enter_sleep_mode) refers to ap_demo.o(i.disable_mipi_timer_cb) for disable_mipi_timer_cb + ap_demo.o(i.ap_set_exit_sleep_mode) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_update_frame_rate) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_tear_mode_ex) for hal_dsi_rx_ctrl_set_tear_mode_ex + ap_demo.o(i.ap_update_frame_rate) refers to ap_demo.o(.data) for .data + ap_demo.o(i.blue_change_ccm) refers to memcpya.o(.text) for __aeabi_memcpy4 + ap_demo.o(i.blue_change_ccm) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) for hal_dsi_tx_ctrl_set_ccm + ap_demo.o(i.disable_mipi_timer_cb) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + ap_demo.o(i.disable_mipi_timer_cb) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) for hal_dsi_tx_ctrl_stop + ap_demo.o(i.disable_mipi_timer_cb) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) for hal_dsi_tx_ctrl_deinit + ap_demo.o(i.disable_mipi_timer_cb) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) for hal_dsi_rx_ctrl_stop + ap_demo.o(i.disable_mipi_timer_cb) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) for hal_dsi_rx_ctrl_deinit + ap_demo.o(i.disable_mipi_timer_cb) refers to hal_swire.o(i.hal_swire_open) for hal_swire_open + ap_demo.o(i.disable_mipi_timer_cb) refers to hal_timer.o(i.hal_timer_stop) for hal_timer_stop + ap_demo.o(i.disable_mipi_timer_cb) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + ap_demo.o(i.disable_mipi_timer_cb) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_panel_reset_pin) for hal_dsi_tx_ctrl_panel_reset_pin + ap_demo.o(i.disable_mipi_timer_cb) refers to hal_system.o(i.hal_system_set_vcc) for hal_system_set_vcc + ap_demo.o(i.disable_mipi_timer_cb) refers to ap_demo.o(.data) for .data + ap_demo.o(i.disable_mipi_timer_cb) refers to app_tp_for_custom_s8.o(.data) for tp_sleep_in + ap_demo.o(i.init_mipi_tx) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) for hal_dsi_tx_ctrl_create_handle + ap_demo.o(i.init_mipi_tx) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) for hal_dsi_tx_ctrl_init + ap_demo.o(i.init_mipi_tx) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) for hal_dsi_tx_ctrl_set_overwrite_rgb + ap_demo.o(i.init_mipi_tx) refers to ap_demo.o(.data) for .data + ap_demo.o(i.init_panel) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_panel_reset_pin) for hal_dsi_tx_ctrl_panel_reset_pin + ap_demo.o(i.init_panel) refers to tau_delay.o(i.delayMs) for delayMs + ap_demo.o(i.init_panel) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) for hal_dsi_tx_ctrl_enter_init_panel_mode + ap_demo.o(i.init_panel) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) for hal_dsi_tx_ctrl_write_array_cmd + ap_demo.o(i.init_panel) refers to tau_delay.o(i.delayUs) for delayUs + ap_demo.o(i.init_panel) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + ap_demo.o(i.init_panel) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode) for hal_dsi_rx_ctrl_set_hw_tear_mode + ap_demo.o(i.init_panel) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.init_panel) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) for hal_dsi_tx_ctrl_exit_init_panel_mode + ap_demo.o(i.init_panel) refers to ap_demo.o(.data) for .data + ap_demo.o(i.open_mipi_rx) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) for hal_dsi_rx_ctrl_create_handle + ap_demo.o(i.open_mipi_rx) refers to memcpya.o(.text) for __aeabi_memcpy4 + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_pre_init_pps) for hal_dsi_rx_ctrl_pre_init_pps + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) for hal_dsi_rx_ctrl_init + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) for hal_dsi_rx_ctrl_set_cus_sync_line + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) for hal_dsi_rx_ctrl_hight_performan_mode + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) for hal_dsi_rx_ctrl_start + ap_demo.o(i.open_mipi_rx) refers to ap_demo.o(.data) for .data + ap_demo.o(i.open_mipi_rx) refers to ap_demo.o(.constdata) for .constdata + ap_demo.o(i.open_mipi_rx) refers to ap_demo.o(i.ap_dcs_read) for ap_dcs_read + ap_demo.o(i.open_mipi_rx) refers to ap_demo.o(i.pps_update_handle) for pps_update_handle + ap_demo.o(i.pps_update_handle) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) for hal_dsi_rx_ctrl_set_sw_tear_mode + ap_demo.o(i.pps_update_handle) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) for hal_dsi_rx_ctrl_toggle_resolution + ap_demo.o(i.pps_update_handle) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode) for hal_dsi_rx_ctrl_set_hw_tear_mode + ap_demo.o(i.pps_update_handle) refers to ap_demo.o(.data) for .data + ap_demo.o(i.soft_timer3_cb) refers to hal_timer.o(i.hal_timer_start) for hal_timer_start + ap_demo.o(i.soft_timer3_cb) refers to app_tp_for_custom_s8.o(.data) for tp_sleep_count + ap_demo.o(i.soft_timer3_cb) refers to ap_demo.o(.data) for .data + ap_demo.o(i.tp_heartbeat_exec) refers to hal_gpio.o(i.hal_gpio_get_input_data) for hal_gpio_get_input_data + ap_demo.o(i.tp_heartbeat_exec) refers to app_tp_st_touch.o(i.ap_tp_st_touch_hardware_reset) for ap_tp_st_touch_hardware_reset + ap_demo.o(i.tp_heartbeat_exec) refers to app_tp_transfer.o(.data) for s_screen_init_complate + ap_demo.o(i.tp_heartbeat_exec) refers to ap_demo.o(.data) for .data + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_display_on) for ap_set_display_on + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_display_off) for ap_set_display_off + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_get_reg_df) for ap_get_reg_df + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_get_reg_ca) for ap_get_reg_ca + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_backlight) for ap_set_backlight + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_update_frame_rate) for ap_update_frame_rate + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_enter_sleep_mode) for ap_set_enter_sleep_mode + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_exit_sleep_mode) for ap_set_exit_sleep_mode + ap_demo.o(.constdata) refers to app_tp_st_touch.o(i.ap_set_tp_calibration_04) for ap_set_tp_calibration_04 + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_transfer.o(i.app_tp_m_read) for app_tp_m_read + app_tp_transfer.o(i.S20_Start_init) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_transfer.o(i.S20_Start_init) refers to tau_delay.o(i.delayMs) for delayMs + app_tp_transfer.o(i.S20_Start_init) refers to hal_gpio.o(i.hal_gpio_get_input_data) for hal_gpio_get_input_data + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_transfer.o(i.app_tp_m_write) for app_tp_m_write + app_tp_transfer.o(i.S20_Start_init) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + app_tp_transfer.o(i.S20_Start_init) refers to hal_gpio.o(i.hal_gpio_ctrl_eint) for hal_gpio_ctrl_eint + app_tp_transfer.o(i.S20_Start_init) refers to hal_gpio.o(i.hal_gpio_init_eint) for hal_gpio_init_eint + app_tp_transfer.o(i.S20_Start_init) refers to hal_gpio.o(i.hal_gpio_reg_eint_cb) for hal_gpio_reg_eint_cb + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_for_custom_s8.o(.data) for screen_reg_int_data + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_transfer.o(.bss) for .bss + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_for_custom_s8.o(.data) for g_screen_input_int_pad + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_transfer.o(i.app_tp_screen_int_callback) for app_tp_screen_int_callback + app_tp_transfer.o(i.S20_Start_init) refers to ap_demo.o(.data) for phone_start_flag + app_tp_transfer.o(i.app_tp_I2C_init) refers to hal_i2c_slave.o(i.hal_i2c_s_init) for hal_i2c_s_init + app_tp_transfer.o(i.app_tp_I2C_init) refers to hal_i2c_slave.o(i.hal_i2c_s_set_transfer) for hal_i2c_s_set_transfer + app_tp_transfer.o(i.app_tp_I2C_init) refers to hal_i2c_slave.o(i.hal_i2c_s_nonblocking_read) for hal_i2c_s_nonblocking_read + app_tp_transfer.o(i.app_tp_I2C_init) refers to app_tp_transfer.o(i.app_tp_i2cs_callback) for app_tp_i2cs_callback + app_tp_transfer.o(i.app_tp_I2C_init) refers to app_tp_transfer.o(.bss) for .bss + app_tp_transfer.o(i.app_tp_i2cs_callback) refers to app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) for app_tp_phone_analysis_data + app_tp_transfer.o(i.app_tp_i2cs_callback) refers to app_tp_transfer.o(i.app_tp_s_read) for app_tp_s_read + app_tp_transfer.o(i.app_tp_i2cs_callback) refers to app_tp_transfer.o(i.app_tp_s_write) for app_tp_s_write + app_tp_transfer.o(i.app_tp_i2cs_callback) refers to app_tp_transfer.o(.bss) for .bss + app_tp_transfer.o(i.app_tp_init) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + app_tp_transfer.o(i.app_tp_init) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + app_tp_transfer.o(i.app_tp_init) refers to hal_gpio.o(i.hal_gpio_init_input) for hal_gpio_init_input + app_tp_transfer.o(i.app_tp_init) refers to hal_i2c_master.o(i.hal_i2c_m_dma_init) for hal_i2c_m_dma_init + app_tp_transfer.o(i.app_tp_init) refers to app_tp_for_custom_s8.o(.data) for g_phone_output_int_pad + app_tp_transfer.o(i.app_tp_init) refers to app_tp_for_custom_s8.o(.data) for g_screen_input_int_pad + app_tp_transfer.o(i.app_tp_m_read) refers to hal_i2c_master.o(i.hal_i2c_m_dma_read) for hal_i2c_m_dma_read + app_tp_transfer.o(i.app_tp_m_transfer_complate) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_transfer.o(i.app_tp_m_write) refers to hal_i2c_master.o(i.hal_i2c_m_dma_write) for hal_i2c_m_dma_write + app_tp_transfer.o(i.app_tp_phone_clear_reset_on) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.app_tp_phone_reset_on) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.app_tp_s_read) refers to hal_i2c_slave.o(i.hal_i2c_s_nonblocking_read) for hal_i2c_s_nonblocking_read + app_tp_transfer.o(i.app_tp_s_transfer_complate) refers to hal_i2c_slave.o(i.hal_i2c_s_write_complate) for hal_i2c_s_write_complate + app_tp_transfer.o(i.app_tp_s_transfer_complate) refers to hal_i2c_slave.o(i.hal_i2c_s_read_complate) for hal_i2c_s_read_complate + app_tp_transfer.o(i.app_tp_s_write) refers to hal_i2c_slave.o(i.hal_i2c_s_dma_write) for hal_i2c_s_dma_write + app_tp_transfer.o(i.app_tp_screen_init) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + app_tp_transfer.o(i.app_tp_screen_init) refers to tau_delay.o(i.delayUs) for delayUs + app_tp_transfer.o(i.app_tp_screen_init) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + app_tp_transfer.o(i.app_tp_screen_init) refers to app_tp_for_custom_s8.o(.data) for g_screen_input_rst_pad + app_tp_transfer.o(i.app_tp_screen_int_callback) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to hal_spi_master.o(i.hal_spi_m_clear_rxfifo) for hal_spi_m_clear_rxfifo + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to app_tp_transfer.o(i.S20_Start_init) for S20_Start_init + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to app_tp_for_custom_s8.o(.constdata) for screen_reg_start_data_size + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to ap_demo.o(.data) for phone_start_flag + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to hal_spi_master.o(i.hal_spi_m_clear_rxfifo) for hal_spi_m_clear_rxfifo + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_transfer.o(i.app_tp_m_read) for app_tp_m_read + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to tau_delay.o(i.delayUs) for delayUs + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_transfer.o(i.app_tp_transfer_screen_const) for app_tp_transfer_screen_const + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to tau_delay.o(i.delayMs) for delayMs + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to hal_gpio.o(i.hal_gpio_get_input_data) for hal_gpio_get_input_data + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_record_event) for ap_tp_st_touch_scan_point_record_event + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_st_touch.o(i.ap_tp_st_touch_error_handler_FF) for ap_tp_st_touch_error_handler_FF + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_st_touch.o(i.ap_tp_st_touch_error_handler_F3) for ap_tp_st_touch_error_handler_F3 + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) for app_tp_screen_analysis_int + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_for_custom_s8.o(.data) for screen_reg_int_data + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_transfer.o(.bss) for .bss + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_for_custom_s8.o(.data) for g_screen_input_int_pad + app_tp_transfer.o(i.app_tp_transfer_screen_start) refers to app_tp_transfer.o(i.app_tp_transfer_screen_const) for app_tp_transfer_screen_const + app_tp_transfer.o(i.app_tp_transfer_screen_start) refers to app_tp_transfer.o(.data) for .data + app_tp_st_touch.o(i.CRC16_2) refers to app_tp_st_touch.o(.constdata) for .constdata + app_tp_st_touch.o(i.ap_get_tp_calibration_status_01) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) for hal_dsi_rx_ctrl_send_ack_cmd + app_tp_st_touch.o(i.ap_get_tp_calibration_status_01) refers to app_tp_st_touch.o(.data) for .data + app_tp_st_touch.o(i.ap_set_tp_calibration_04) refers to memseta.o(.text) for __aeabi_memclr4 + app_tp_st_touch.o(i.ap_set_tp_calibration_04) refers to printfa.o(i.__0printf) for __2printf + app_tp_st_touch.o(i.ap_set_tp_calibration_04) refers to app_tp_st_touch.o(i.CRC16_2) for CRC16_2 + app_tp_st_touch.o(i.ap_set_tp_calibration_04) refers to app_tp_st_touch.o(.data) for .data + app_tp_st_touch.o(i.ap_tp_st_touch_calibration) refers to app_tp_transfer.o(i.app_tp_m_write) for app_tp_m_write + app_tp_st_touch.o(i.ap_tp_st_touch_calibration) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_st_touch.o(i.ap_tp_st_touch_calibration) refers to tau_delay.o(i.delayMs) for delayMs + app_tp_st_touch.o(i.ap_tp_st_touch_calibration) refers to app_tp_st_touch.o(.data) for .data + app_tp_st_touch.o(i.ap_tp_st_touch_error_handler_F3) refers to app_tp_st_touch.o(i.ap_tp_st_touch_hardware_reset) for ap_tp_st_touch_hardware_reset + app_tp_st_touch.o(i.ap_tp_st_touch_error_handler_FF) refers to app_tp_st_touch.o(i.ap_tp_st_touch_hardware_reset) for ap_tp_st_touch_hardware_reset + app_tp_st_touch.o(i.ap_tp_st_touch_get_calibration_success_mark) refers to memseta.o(.text) for __aeabi_memclr4 + app_tp_st_touch.o(i.ap_tp_st_touch_get_calibration_success_mark) refers to app_tp_transfer.o(i.app_tp_m_read) for app_tp_m_read + app_tp_st_touch.o(i.ap_tp_st_touch_get_calibration_success_mark) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_st_touch.o(i.ap_tp_st_touch_get_calibration_success_mark) refers to tau_delay.o(i.delayMs) for delayMs + app_tp_st_touch.o(i.ap_tp_st_touch_get_calibration_success_mark) refers to app_tp_transfer.o(i.app_tp_m_write) for app_tp_m_write + app_tp_st_touch.o(i.ap_tp_st_touch_get_calibration_success_mark) refers to app_tp_st_touch.o(.data) for .data + app_tp_st_touch.o(i.ap_tp_st_touch_hardware_reset) refers to app_tp_st_touch.o(i.ap_tp_st_touch_simulate_finger_release_event) for ap_tp_st_touch_simulate_finger_release_event + app_tp_st_touch.o(i.ap_tp_st_touch_hardware_reset) refers to app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_init) for ap_tp_st_touch_scan_point_init + app_tp_st_touch.o(i.ap_tp_st_touch_hardware_reset) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + app_tp_st_touch.o(i.ap_tp_st_touch_hardware_reset) refers to tau_delay.o(i.delayMs) for delayMs + app_tp_st_touch.o(i.ap_tp_st_touch_hardware_reset) refers to app_tp_transfer.o(i.app_tp_m_write) for app_tp_m_write + app_tp_st_touch.o(i.ap_tp_st_touch_hardware_reset) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_st_touch.o(i.ap_tp_st_touch_hardware_reset) refers to app_tp_for_custom_s8.o(.data) for g_screen_input_rst_pad + app_tp_st_touch.o(i.ap_tp_st_touch_hardware_reset) refers to app_tp_st_touch.o(.data) for .data + app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_init) refers to app_tp_st_touch.o(.bss) for .bss + app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_record_event) refers to app_tp_st_touch.o(.bss) for .bss + app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_record_event_exec) refers to app_tp_st_touch.o(i.ap_tp_st_touch_simulate_finger_release_event) for ap_tp_st_touch_simulate_finger_release_event + app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_record_event_exec) refers to app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_init) for ap_tp_st_touch_scan_point_init + app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_record_event_exec) refers to app_tp_st_touch.o(.bss) for .bss + app_tp_st_touch.o(i.ap_tp_st_touch_simulate_finger_release_event) refers to app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) for app_tp_screen_analysis_int + app_tp_st_touch.o(i.ap_tp_st_touch_simulate_finger_release_event) refers to tau_delay.o(i.delayMs) for delayMs + app_tp_st_touch.o(i.ap_tp_st_touch_software_reset) refers to app_tp_st_touch.o(i.ap_tp_st_touch_simulate_finger_release_event) for ap_tp_st_touch_simulate_finger_release_event + app_tp_st_touch.o(i.ap_tp_st_touch_software_reset) refers to app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_init) for ap_tp_st_touch_scan_point_init + app_tp_st_touch.o(i.ap_tp_st_touch_software_reset) refers to app_tp_transfer.o(i.app_tp_m_write) for app_tp_m_write + app_tp_st_touch.o(i.ap_tp_st_touch_software_reset) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_st_touch.o(i.ap_tp_st_touch_software_reset) refers to tau_delay.o(i.delayMs) for delayMs + app_tp_st_touch.o(i.ap_tp_st_touch_software_reset) refers to app_tp_st_touch.o(.data) for .data + app_tp_st_touch.o(i.app_tp_calibration_exec) refers to app_tp_st_touch.o(i.ap_tp_st_touch_calibration) for ap_tp_st_touch_calibration + app_tp_st_touch.o(i.app_tp_calibration_exec) refers to tau_delay.o(i.delayMs) for delayMs + app_tp_st_touch.o(i.app_tp_calibration_exec) refers to app_tp_st_touch.o(i.ap_tp_st_touch_get_calibration_success_mark) for ap_tp_st_touch_get_calibration_success_mark + app_tp_st_touch.o(i.app_tp_calibration_exec) refers to app_tp_st_touch.o(.data) for .data + board.o(i.board_Init) refers to hal_system.o(i.hal_system_init) for hal_system_init + board.o(i.board_Init) refers to hal_system.o(i.hal_system_enable_systick) for hal_system_enable_systick + board.o(i.board_Init) refers to hal_system.o(i.hal_system_init_console) for hal_system_init_console + board.o(i.board_Init) refers to hal_system.o(i.hal_system_set_phy_calibration) for hal_system_set_phy_calibration + startup_armcm0.o(RESET) refers to startup_armcm0.o(STACK) for __initial_sp + startup_armcm0.o(RESET) refers to startup_armcm0.o(.text) for Reset_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.HardFault_Handler) for HardFault_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.SysTick_Handler) for SysTick_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.VIDC_IRQn_Handler) for VIDC_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.LCDC_IRQn_Handler) for LCDC_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.MIPI_RX_IRQn_Handler) for MIPI_RX_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.MIPI_TX_IRQn_Handler) for MIPI_TX_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.MEMC_IRQn_Handler) for MEMC_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.VPRE_IRQn_Handler) for VPRE_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.FLSCTRL_IRQn_Handler) for FLSCTRL_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.DMA_IRQn_Handler) for DMA_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.TIMER0_IRQn_Handler) for TIMER0_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.TIMER1_IRQn_Handler) for TIMER1_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.TIMER2_IRQn_Handler) for TIMER2_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.TIMER3_IRQn_Handler) for TIMER3_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.WDG_IRQn_Handler) for WDG_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.UART_IRQn_Handler) for UART_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.I2C0_IRQn_Handler) for I2C0_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.I2C1_IRQn_Handler) for I2C1_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.SPIS_IRQn_Handler) for SPIS_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.SPIM_IRQn_Handler) for SPIM_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.ADC_IRQn_Handler) for ADC_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.PWMDET_IRQn_Handler) for PWMDET_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.SWIRE_IRQn_Handler) for SWIRE_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.AP_NRESET_IRQn_Handler) for AP_NRESET_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT0_IRQn_Handler) for EXTI_INT0_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT1_IRQn_Handler) for EXTI_INT1_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT2_IRQn_Handler) for EXTI_INT2_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT3_IRQn_Handler) for EXTI_INT3_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT4_IRQn_Handler) for EXTI_INT4_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT5_IRQn_Handler) for EXTI_INT5_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT6_IRQn_Handler) for EXTI_INT6_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT7_IRQn_Handler) for EXTI_INT7_IRQn_Handler + startup_armcm0.o(.text) refers to entry.o(.ARM.Collect$$$$00000000) for __main + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to dadd.o(.text) for __aeabi_dadd + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to drv_vidc.o(i.drv_vidc_set_scld_step) for drv_vidc_set_scld_step + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to drv_vidc.o(i.drv_vidc_set_module_enable) for drv_vidc_set_module_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) for hal_internal_vsync_get_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_dsc_dec.o(i.drv_dsc_dec_disable) for drv_dsc_dec_disable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) for drv_dsi_rx_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_rxbr.o(i.drv_rxbr_enable_irq) for drv_rxbr_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_vidc.o(i.drv_vidc_enable_irq) for drv_vidc_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_memc.o(i.drv_memc_enable_irq) for drv_memc_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) for hal_internal_vsync_get_tx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_config_reset_modules) for drv_crgu_config_reset_modules + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) for hal_internal_vsync_set_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_mode_init) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) refers to dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) for dcs_packet_get_fifo_header + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) refers to dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) for dcs_packet_free_fifo_header + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_pg_cfg) for drv_dsi_rx_set_ddi_pg_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_crgu.o(i.drv_crgu_set_rxbr_src) for drv_crgu_set_rxbr_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_crgu.o(i.drv_crgu_set_rxbr_div) for drv_crgu_set_rxbr_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_pg_cfg) for drv_dsi_rx_set_ipi_pg_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) refers to drv_memc.o(i.drv_memc_gen_a_tear_signal) for drv_memc_gen_a_tear_signal + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_compressen_en) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) for drv_dsi_rx_get_compression_en + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_max_ret_size) for drv_dsi_rx_get_max_ret_size + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) for hal_dsi_rx_ctrl_init_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_vsync_init_rx) for hal_internal_vsync_init_rx + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) for hal_dsi_rx_ctrl_init_dsi_rx + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) for hal_dsi_rx_ctrl_init_rxbr + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to drv_dsc_dec.o(i.drv_dsc_dec_enable) for drv_dsc_dec_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to drv_dsc_dec.o(i.drv_dsc_dec_set_u8_pps) for drv_dsc_dec_set_u8_pps + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to drv_dsc_dec.o(i.drv_dsc_dec_disable) for drv_dsc_dec_disable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) for hal_dsi_rx_ctrl_init_vidc + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) for hal_dsi_rx_ctrl_init_memc + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) for hal_internal_vsync_set_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to drv_chip_info.o(i.drv_chip_rx_init_done) for drv_chip_rx_init_done + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_efuse.o(i.drv_efuse_read) for drv_efuse_read + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_vidc_src) for drv_crgu_set_vidc_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_fb_src) for drv_crgu_set_fb_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_fb_div) for drv_crgu_set_fb_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) for hal_dsi_rx_ctrl_set_rxbr_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ctrl_cfg) for drv_dsi_rx_set_ctrl_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) for drv_dsi_rx_set_ddi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) for hal_dsi_rx_ctrl_set_ipi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) for drv_dsi_rx_set_up_phy + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_lane_swap) for drv_dsi_rx_set_lane_swap + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_inten) for drv_dsi_rx_set_inten + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_resp_cnt) for drv_dsi_rx_set_resp_cnt + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) for drv_dsi_rx_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_data_mode) for drv_memc_set_data_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_ltpo_mode) for drv_memc_set_ltpo_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_tear_waveform) for drv_memc_set_tear_waveform + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tear_mode) for hal_internal_vsync_get_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to ap_demo.o(i.__ARM_common_switch8) for __ARM_common_switch8 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_rate_transfer_sel) for drv_memc_rate_transfer_sel + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_fs_en_conditions) for drv_memc_set_fs_en_conditions + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_lcdc_st_conditions) for drv_memc_set_lcdc_st_conditions + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_sel_vsync) for drv_memc_sel_vsync + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_vidc_sync_cnt) for drv_memc_set_vidc_sync_cnt + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_double_buffer) for drv_memc_set_double_buffer + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_active_height) for drv_memc_set_active_height + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_inten) for drv_memc_set_inten + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_enable_irq) for drv_memc_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_color_format) for drv_rxbr_set_color_format + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) for drv_rxbr_frame_drop_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_ltpo_drop_th) for drv_rxbr_set_ltpo_drop_th + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_usr_cfg) for drv_rxbr_set_usr_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_usr_col) for drv_rxbr_set_usr_col + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_usr_row) for drv_rxbr_set_usr_row + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_hline_rcv_cfg) for drv_rxbr_hline_rcv_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_enable_irq) for drv_rxbr_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) for hal_internal_vsync_set_auto_hw_filter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_src_parameter) for drv_vidc_set_src_parameter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_pentile_swap) for drv_vidc_set_pentile_swap + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_dst_parameter) for drv_vidc_set_dst_parameter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_init_module_enable) for drv_vidc_init_module_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_rotation) for drv_vidc_set_rotation + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to dadd.o(.text) for __aeabi_dadd + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_step) for drv_vidc_set_scld_step + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_param_init.o(i.drv_param_init_get_scld_filter_h) for drv_param_init_get_scld_filter_h + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_param_init.o(i.drv_param_init_get_scld_filter_v) for drv_param_init_get_scld_filter_v + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_hcoef0) for drv_vidc_set_scld_hcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_hcoef1) for drv_vidc_set_scld_hcoef1 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_vcoef0) for drv_vidc_set_scld_vcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_vcoef1) for drv_vidc_set_scld_vcoef1 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_p2r_hinitr) for drv_vidc_set_p2r_hinitr + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_p2r_hinitb) for drv_vidc_set_p2r_hinitb + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_param_init.o(i.drv_param_p2r_filter_init) for drv_param_p2r_filter_init + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_p2r_hcoef0) for drv_vidc_set_p2r_hcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_mirror) for drv_vidc_set_mirror + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_pu_ctrl) for drv_vidc_set_pu_ctrl + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_irqen) for drv_vidc_set_irqen + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_enable_irq) for drv_vidc_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_pre_init_pps) refers to drv_dsc_dec.o(i.drv_dsc_dec_convert_pps_rc_parameter) for drv_dsc_dec_convert_pps_rc_parameter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_pre_init_pps) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_release_handle) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to drv_dsi_rx.o(i.drv_dsi_rx_shut_down) for drv_dsi_rx_shut_down + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) for hal_dsi_rx_ctrl_init + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) for hal_internal_vsync_get_tx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) for hal_dsi_rx_ctrl_start + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) refers to drv_rxbr.o(i.drv_rxbr_set_ack_pkt_header) for drv_rxbr_set_ack_pkt_header + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) refers to hal_dsi_rx_ctrl.o(.conststring) for .conststring + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_auto_hw_filter) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) for hal_internal_vsync_set_auto_hw_filter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_auto_hw_filter) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) for drv_dsi_rx_set_ddi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to drv_vidc.o(i.drv_vidc_set_scld_hcoef0) for drv_vidc_set_scld_hcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to drv_vidc.o(i.drv_vidc_set_scld_hcoef1) for drv_vidc_set_scld_hcoef1 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to drv_vidc.o(i.drv_vidc_set_scld_vcoef0) for drv_vidc_set_scld_vcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to drv_vidc.o(i.drv_vidc_set_scld_vcoef1) for drv_vidc_set_scld_vcoef1 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to drv_param_init.o(i.drv_param_init_set_scld_filter) for drv_param_init_set_scld_filter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) for hal_internal_vsync_set_sync_line + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) refers to drv_rxbr.o(i.drv_rxbr_hline_rcv0_cfg) for drv_rxbr_hline_rcv0_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_dcs_direct_mode) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_dcs_direct_mode) for hal_internal_vsync_set_dcs_direct_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_cmd_filter) refers to drv_rxbr.o(i.drv_rxbr_set_cmd_filter) for drv_rxbr_set_cmd_filter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_cmd_filter) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) for hal_internal_vsync_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) refers to drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) for drv_dsi_rx_calc_ipi_tx_delay + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_cfg) for drv_dsi_rx_set_ipi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pentile_format) refers to drv_vidc.o(i.drv_vidc_update_src_format) for drv_vidc_update_src_format + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pentile_format) refers to drv_vidc.o(i.drv_vidc_set_pentile_swap) for drv_vidc_set_pentile_swap + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pentile_format) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to dflti.o(.text) for __aeabi_i2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to dmul.o(.text) for __aeabi_dmul + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to ddiv.o(.text) for __aeabi_ddiv + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to dfixi.o(.text) for __aeabi_d2iz + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rect_pixel_data) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rect_pixel_data) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rect_pixel_data) refers to dflti.o(.text) for __aeabi_i2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rect_pixel_data) refers to dmul.o(.text) for __aeabi_dmul + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rect_pixel_data) refers to ddiv.o(.text) for __aeabi_ddiv + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rect_pixel_data) refers to dfixi.o(.text) for __aeabi_d2iz + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) for hal_dsi_rx_ctrl_set_rxbr_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) for drv_dsi_rx_set_ddi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) for hal_dsi_rx_ctrl_set_ipi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_rxbr_src) for drv_crgu_set_rxbr_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_rxbr_div) for drv_crgu_set_rxbr_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_dsco_src) for drv_crgu_set_dsco_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_dsco_src_div) for drv_crgu_set_dsco_src_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_dsc_core_div) for drv_crgu_set_dsc_core_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) for hal_internal_vsync_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_te_waveform) refers to drv_memc.o(i.drv_memc_set_tear_waveform) for drv_memc_set_tear_waveform + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_te_waveform) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_tear_mode_ex) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) for hal_internal_vsync_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) refers to drv_dsi_rx.o(i.drv_dsi_rx_power_up) for drv_dsi_rx_power_up + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) for hal_internal_vsync_set_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) refers to drv_dsi_rx.o(i.drv_dsi_rx_shut_down) for drv_dsi_rx_shut_down + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) for hal_internal_vsync_set_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate) refers to hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) for hal_internal_vsync_toggle_input_frame_rate + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) refers to hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) for hal_internal_sync_input_resolution_change + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution_ex) refers to hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) for hal_internal_sync_input_resolution_change_ex + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution_ex) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_register_write_cmd_entry) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_cmd_filter) for hal_dsi_rx_ctrl_set_hw_cmd_filter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_register_write_cmd_entry) refers to hal_internal_vsync.o(i.hal_internal_vsync_register_write_cmd_entry) for hal_internal_vsync_register_write_cmd_entry + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to ffltui.o(.text) for __aeabi_ui2f + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to fscalb.o(.text) for __ARM_scalbnf + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to fdiv.o(.text) for __aeabi_fdiv + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to fmul.o(.text) for __aeabi_fmul + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to idiv.o(.text) for __aeabi_idivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to fflti.o(.text) for __aeabi_i2f + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to ffixi.o(.text) for __aeabi_f2iz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to f2d.o(.text) for __aeabi_f2d + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to ceil.o(i.ceil) for ceil + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to dfixi.o(.text) for __aeabi_d2iz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to fadd.o(.text) for __aeabi_fadd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_video_chunk) for drv_dsi_tx_set_video_chunk + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_video_timing) for drv_dsi_tx_set_video_timing + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) refers to fadd.o(.text) for __aeabi_fadd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to ffltui.o(.text) for __aeabi_ui2f + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to fmul.o(.text) for __aeabi_fmul + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to fdiv.o(.text) for __aeabi_fdiv + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to f2d.o(.text) for __aeabi_f2d + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to ceil.o(i.ceil) for ceil + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to drv_phy_common.o(i.drv_phy_get_rate_para) for drv_phy_get_rate_para + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to idiv.o(.text) for __aeabi_idivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to fadd.o(.text) for __aeabi_fadd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to ffixui.o(.text) for __aeabi_f2uiz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) for hal_internal_sync_get_hight_performan_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to hal_dsi_tx_ctrl.o(.conststring) for .conststring + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) for hal_lcdc_config_upscaler + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic) refers to drv_lcdc.o(i.drv_lcdc_config_src_parameter) for drv_lcdc_config_src_parameter + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic) refers to hal_internal_vsync.o(i.hal_internal_vsync_update_lcdc_addr) for hal_internal_vsync_update_lcdc_addr + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_cmd_mode_rcv_te) refers to hal_internal_vsync.o(i.hal_internal_sync_cmd_mode_rcv_te) for hal_internal_sync_cmd_mode_rcv_te + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_config_reset_modules) for drv_crgu_config_reset_modules + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to drv_param_init.o(i.drv_param_init_set_ccm) for drv_param_init_set_ccm + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to hal_dsi_tx_ctrl.o(.constdata) for .constdata + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to drv_memc.o(i.drv_memc_set_data_mode) for drv_memc_set_data_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) for hal_lcdc_config_upscaler + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) for hal_lcdc_config_remains + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_mode_init) for hal_dsi_tx_ctrl_draw_mode_init + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data) for hal_dsi_tx_ctrl_set_rect_pixel_data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to drv_memc.o(i.drv_memc_set_data_mode) for drv_memc_set_data_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) for hal_lcdc_config_upscaler + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) for hal_lcdc_config_remains + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_mode_init) for hal_dsi_tx_ctrl_draw_mode_init + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) for drv_dsi_tx_command_mode_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_mode) for drv_dsi_tx_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_ulps_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) for drv_dsi_tx_phy_ulps_enter + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) for drv_dsi_tx_command_mode_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_mode) for drv_dsi_tx_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_ulps_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) for drv_dsi_tx_phy_ulps_exit + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) for hal_dsi_tx_ctrl_init_clk + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_vsync_init_tx) for hal_internal_vsync_init_tx + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) for hal_dsi_tx_config_params_for_lane_rate + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) for hal_dsi_tx_count_lane_rate + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) for hal_dsi_tx_init_phy_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) for drv_dsi_tx_phy_test_setup + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) for hal_lcdc_init_clk + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) for hal_lcdc_init_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) for hal_dsi_tx_init_dpi_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) for hal_dsi_tx_init_data_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) for hal_dsi_tx_init_remains + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) for hal_dsi_tx_init_interrupt + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ready) for drv_dsi_tx_phy_status_ready + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to drv_dsi_tx.o(i.drv_dsi_tx_powerup) for drv_dsi_tx_powerup + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_panel_reset_pin) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) for hal_dsi_tx_send_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) for drv_dsi_tx_get_cmd_status + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_get_payload) for drv_dsi_tx_command_get_payload + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to memcpya.o(.text) for __aeabi_memcpy + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_release_handle) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) refers to drv_param_init.o(i.drv_param_init_set_ccm) for drv_param_init_set_ccm + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_cus_pq_filter) refers to drv_lcdc.o(i.drv_lcdc_config_scale_up_coef) for drv_lcdc_config_scale_up_coef + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_cus_pq_filter) refers to drv_param_init.o(i.drv_param_init_set_sclu_filter) for drv_param_init_set_sclu_filter + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_endianness) refers to drv_lcdc.o(i.drv_lcdc_config_endianness) for drv_lcdc_config_endianness + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_escape_clock_div) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) for drv_dsi_tx_set_esc_div + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_lp_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_video_mode_set_lp_cmd) for drv_dsi_tx_video_mode_set_lp_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite) for drv_lcdc_config_overwrite + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite_rgb) for drv_lcdc_config_overwrite_rgb + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp) refers to drv_lcdc.o(i.drv_lcdc_config_partial_display_enable) for drv_lcdc_config_partial_display_enable + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp_area) refers to drv_lcdc.o(i.drv_lcdc_config_partial_display_area) for drv_lcdc_config_partial_display_area + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data) refers to dflti.o(.text) for __aeabi_i2d + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data) refers to dmul.o(.text) for __aeabi_dmul + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data) refers to ddiv.o(.text) for __aeabi_ddiv + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data) refers to dfixi.o(.text) for __aeabi_d2iz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_vpg) for drv_dsi_tx_set_vpg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) for hal_dsi_tx_ctrl_draw_flicker + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) for hal_dsi_tx_ctrl_draw_chessboard + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) for drv_dsi_tx_config_eotp + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) for drv_dsi_tx_phy_clock_lane_req_hs + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_lcdc.o(i.drv_lcdc_enable_shadow_reg) for drv_lcdc_enable_shadow_reg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_lcdc.o(i.drv_lcdc_set_video_hw_mode) for drv_lcdc_set_video_hw_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite) for drv_lcdc_config_overwrite + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_lcdc.o(i.drv_lcdc_start) for drv_lcdc_start + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to drv_lcdc.o(i.drv_lcdc_set_int) for drv_lcdc_set_int + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_int) for drv_dsi_tx_set_int + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to drv_dsi_tx.o(i.drv_dsi_tx_shutdown) for drv_dsi_tx_shutdown + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) for drv_dsi_tx_get_cmd_status + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) for hal_dsi_tx_send_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) for drv_dsi_tx_command_put_payload + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) for drv_dsi_tx_get_cmd_status + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) for hal_dsi_tx_send_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) for drv_dsi_tx_command_put_payload + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_mode) for drv_dsi_tx_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_edpi_cmd_size) for drv_dsi_tx_edpi_cmd_size + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) for hal_dsi_tx_init_video_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_dpi_mode) for drv_dsi_tx_dpi_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_dpi_polarity) for drv_dsi_tx_dpi_polarity + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_dpi_lpcmd_time) for drv_dsi_tx_dpi_lpcmd_time + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_int) for drv_dsi_tx_set_int + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) refers to drv_dsi_tx.o(i.drv_dsi_tx_config_int) for drv_dsi_tx_config_int + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_lane_mode) for drv_dsi_tx_phy_lane_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_time_cfg) for drv_dsi_tx_phy_time_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_response_mode) for drv_dsi_tx_response_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) for drv_dsi_tx_set_esc_div + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_time_out_div) for drv_dsi_tx_set_time_out_div + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_timeout_cfg) for drv_dsi_tx_timeout_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) for drv_dsi_tx_config_eotp + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) for drv_dsi_tx_phy_clock_lane_req_hs + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_auto_lp) for drv_dsi_tx_phy_clock_lane_auto_lp + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_video_mode_cfg) for drv_dsi_tx_video_mode_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_bta_ack) for drv_dsi_tx_set_bta_ack + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_video_mode_set_lp_cmd) for drv_dsi_tx_video_mode_set_lp_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_video_mode_disable_hact_cmd) for drv_dsi_tx_video_mode_disable_hact_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) for hal_dsi_tx_calc_video_chunks + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) for drv_dsi_tx_get_cmd_status + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_header) for drv_dsi_tx_command_header + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) for drv_dsi_tx_phy_status_stopstate + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) refers to drv_param_init.o(i.drv_param_init_get_ccm) for drv_param_init_get_ccm + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) refers to drv_lcdc.o(i.drv_lcdc_config_ccm) for drv_lcdc_config_ccm + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_disp_mode) for drv_lcdc_config_disp_mode + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_edpi_mode) for drv_lcdc_config_edpi_mode + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_endianness) for drv_lcdc_config_endianness + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_thresh) for drv_lcdc_config_thresh + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_dpi_polarity) for drv_lcdc_config_dpi_polarity + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_src_parameter) for drv_lcdc_config_src_parameter + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_rgb_to_pentile) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to dadd.o(.text) for __aeabi_dadd + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp_area) for hal_dsi_tx_ctrl_set_partial_disp_area + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp) for hal_dsi_tx_ctrl_set_partial_disp + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to drv_lcdc.o(i.drv_lcdc_config_scale_up_step) for drv_lcdc_config_scale_up_step + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to drv_param_init.o(i.drv_param_init_get_sclu_filter) for drv_param_init_get_sclu_filter + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to drv_lcdc.o(i.drv_lcdc_config_scale_up_coef) for drv_lcdc_config_scale_up_coef + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) for hal_lcdc_config_upscaler + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) for hal_lcdc_config_ccm + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_rgb_to_pentile) for hal_lcdc_config_rgb_to_pentile + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) for hal_lcdc_config_remains + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) for hal_lcdc_init_interrupt + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to drv_lcdc.o(i.drv_lcdc_set_prefetch) for drv_lcdc_set_prefetch + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to ffltui.o(.text) for __aeabi_ui2f + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_dpi_pre_div) for drv_crgu_set_dpi_pre_div + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_dpi_pre_src) for drv_crgu_set_dpi_pre_src + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_dpi_mux_src) for drv_crgu_set_dpi_mux_src + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to fmul.o(.text) for __aeabi_fmul + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to fdiv.o(.text) for __aeabi_fdiv + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to f2d.o(.text) for __aeabi_f2d + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to ceil.o(i.ceil) for ceil + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_lcdc.o(i.drv_lcdc_config_dpi_timing) for drv_lcdc_config_dpi_timing + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to hal_internal_vsync.o(i.hal_internal_update_dpi_param) for hal_internal_update_dpi_param + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to cfrcmple.o(.text) for __aeabi_cfrcmple + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to ffixi.o(.text) for __aeabi_f2iz + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to idiv.o(.text) for __aeabi_idivmod + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_lcdc_div) for drv_crgu_set_lcdc_div + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_lcdc_src) for drv_crgu_set_lcdc_src + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) for hal_internal_vsync_get_sync_line + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) refers to drv_lcdc.o(i.drv_lcdc_set_int) for drv_lcdc_set_int + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) refers to drv_lcdc.o(i.drv_lcdc_ctrl_flow) for drv_lcdc_ctrl_flow + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) refers to drv_lcdc.o(i.drv_lcdc_config_int) for drv_lcdc_config_int + hal_gpio.o(i.hal_gpio_ctrl_eint) refers to drv_gpio.o(i.drv_gpio_set_int) for drv_gpio_set_int + hal_gpio.o(i.hal_gpio_ctrl_eint) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_get_input_data) refers to drv_gpio.o(i.drv_gpio_get_input_data) for drv_gpio_get_input_data + hal_gpio.o(i.hal_gpio_get_int_type) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_get_pull_state) refers to drv_gpio.o(i.drv_gpio_get_pull_state) for drv_gpio_get_pull_state + hal_gpio.o(i.hal_gpio_get_pull_state) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_init_eint) refers to drv_gpio.o(i.drv_gpio_set_ioe) for drv_gpio_set_ioe + hal_gpio.o(i.hal_gpio_init_eint) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_gpio.o(i.hal_gpio_init_eint) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_gpio_group) for drv_sys_cfg_sel_gpio_group + hal_gpio.o(i.hal_gpio_init_eint) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_int_trig) for drv_sys_cfg_sel_int_trig + hal_gpio.o(i.hal_gpio_init_eint) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_gpio.o(i.hal_gpio_init_eint) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_init_input) refers to drv_gpio.o(i.drv_gpio_set_ioe) for drv_gpio_set_ioe + hal_gpio.o(i.hal_gpio_init_input) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_gpio.o(i.hal_gpio_init_input) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_init_output) refers to hal_gpio.o(i.drv_gpio_set_output_data) for drv_gpio_set_output_data + hal_gpio.o(i.hal_gpio_init_output) refers to drv_gpio.o(i.drv_gpio_set_ioe) for drv_gpio_set_ioe + hal_gpio.o(i.hal_gpio_init_output) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_gpio.o(i.hal_gpio_init_output) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_reg_eint_cb) refers to drv_gpio.o(i.drv_gpio_register_callback) for drv_gpio_register_callback + hal_gpio.o(i.hal_gpio_reg_eint_cb) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_ap_reset_int) refers to drv_gpio.o(i.drv_gpio_register_ap_reset_callback) for drv_gpio_register_ap_reset_callback + hal_gpio.o(i.hal_gpio_set_ap_reset_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) for drv_sys_cfg_sel_ap_rst_trig + hal_gpio.o(i.hal_gpio_set_ap_reset_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_gpio.o(i.hal_gpio_set_ap_reset_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + hal_gpio.o(i.hal_gpio_set_driving_strength) refers to drv_gpio.o(i.drv_gpio_set_driving_strength) for drv_gpio_set_driving_strength + hal_gpio.o(i.hal_gpio_set_driving_strength) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_mode) refers to drv_gpio.o(i.drv_gpio_set_mode3) for drv_gpio_set_mode3 + hal_gpio.o(i.hal_gpio_set_mode) refers to drv_gpio.o(i.drv_gpio_set_mode2) for drv_gpio_set_mode2 + hal_gpio.o(i.hal_gpio_set_mode) refers to drv_gpio.o(i.drv_gpio_set_mode1) for drv_gpio_set_mode1 + hal_gpio.o(i.hal_gpio_set_mode) refers to drv_gpio.o(i.drv_gpio_set_mode0) for drv_gpio_set_mode0 + hal_gpio.o(i.hal_gpio_set_mode) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_output_data) refers to hal_gpio.o(i.drv_gpio_set_output_data) for drv_gpio_set_output_data + hal_gpio.o(i.hal_gpio_set_pull_state) refers to drv_gpio.o(i.drv_gpio_set_pull_state) for drv_gpio_set_pull_state + hal_gpio.o(i.hal_gpio_set_pull_state) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_schmitt_trigger) refers to drv_gpio.o(i.drv_gpio_set_schmitt_trigger) for drv_gpio_set_schmitt_trigger + hal_gpio.o(i.hal_gpio_set_schmitt_trigger) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_slew_rate) refers to drv_gpio.o(i.drv_gpio_set_slew_rate) for drv_gpio_set_slew_rate + hal_gpio.o(i.hal_gpio_set_slew_rate) refers to hal_gpio.o(.constdata) for .constdata + hal_i2c_master.o(i.hal_i2c_m_deinit) refers to drv_i2c_master.o(i.drv_i2c_m_deinit) for drv_i2c_m_deinit + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_master.o(i.drv_i2c_master_init) for drv_i2c_master_init + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_master.o(i.drv_i2c1_set_callback) for drv_i2c1_set_callback + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_master.o(i.drv_i2c_m_enable_intr) for drv_i2c_m_enable_intr + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_dma.o(i.drv_i2c_dma_init) for drv_i2c_dma_init + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_dma.o(i.drv_i2c_enable_rx_dma) for drv_i2c_enable_rx_dma + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_dma.o(i.drv_i2c_enable_tx_dma) for drv_i2c_enable_tx_dma + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to hal_i2c_master.o(i.hal_i2c_master_irq_callback) for hal_i2c_master_irq_callback + hal_i2c_master.o(i.hal_i2c_m_dma_read) refers to drv_i2c_dma.o(i.drv_i2c_master_read_dma) for drv_i2c_master_read_dma + hal_i2c_master.o(i.hal_i2c_m_dma_read) refers to hal_i2c_master.o(.data) for .data + hal_i2c_master.o(i.hal_i2c_m_dma_write) refers to drv_i2c_dma.o(i.drv_i2c_master_write_dma) for drv_i2c_master_write_dma + hal_i2c_master.o(i.hal_i2c_m_dma_write) refers to hal_i2c_master.o(.data) for .data + hal_i2c_master.o(i.hal_i2c_m_set_high_impedance) refers to drv_i2c_master.o(i.drv_i2c_m_enable) for drv_i2c_m_enable + hal_i2c_master.o(i.hal_i2c_m_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_i2c_master.o(i.hal_i2c_m_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + hal_i2c_master.o(i.hal_i2c_m_transfer_complate) refers to hal_i2c_master.o(.data) for .data + hal_i2c_master.o(i.hal_i2c_master_irq_callback) refers to drv_i2c_master.o(i.drv_i2c_m_clear_it_pending_bit) for drv_i2c_m_clear_it_pending_bit + hal_i2c_master.o(i.hal_i2c_master_irq_callback) refers to hal_i2c_master.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_deinit) refers to drv_i2c_slave.o(i.drv_i2c_s_set_intr) for drv_i2c_s_set_intr + hal_i2c_slave.o(i.hal_i2c_s_deinit) refers to drv_i2c_slave.o(i.drv_i2c_s_enable) for drv_i2c_s_enable + hal_i2c_slave.o(i.hal_i2c_s_deinit) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_i2c_slave.o(i.hal_i2c_s_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_i2c_slave.o(i.hal_i2c_s_deinit) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_deinit) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_i2c_slave.o(i.hal_i2c_s_dma_user_callback) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_dma_write) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + hal_i2c_slave.o(i.hal_i2c_s_dma_write) refers to drv_i2c_dma.o(i.drv_i2c_slave_write_dma) for drv_i2c_slave_write_dma + hal_i2c_slave.o(i.hal_i2c_s_dma_write) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_dma_write) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_i2c_slave.o(i.hal_i2c_s_get_tx_byte_num) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_i2c_slave.o(i.hal_i2c_s_init) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_slave.o(i.drv_i2c_slave_init) for drv_i2c_slave_init + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_master.o(i.drv_i2c1_set_callback) for drv_i2c1_set_callback + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_slave.o(i.drv_i2c_s_config_intr) for drv_i2c_s_config_intr + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_slave.o(i.drv_i2c_s_set_intr) for drv_i2c_s_set_intr + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_dma.o(i.drv_i2c_dma_init) for drv_i2c_dma_init + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) for drv_i2c_set_dma_irq_callback + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) for drv_sys_cfg_set_dma_tx_req + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_dma.o(i.drv_i2c_enable_tx_dma) for drv_i2c_enable_tx_dma + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_dma.o(i.drv_dma_enable_channel_interrupts) for drv_dma_enable_channel_interrupts + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_slave.o(i.drv_i2c0_set_callback) for drv_i2c0_set_callback + hal_i2c_slave.o(i.hal_i2c_s_init) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_init) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_i2c_slave.o(i.hal_i2c_s_init) refers to hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) for hal_i2c_slave_irq_callback + hal_i2c_slave.o(i.hal_i2c_s_init) refers to hal_i2c_slave.o(i.hal_i2c_s_dma_user_callback) for hal_i2c_s_dma_user_callback + hal_i2c_slave.o(i.hal_i2c_s_nonblocking_read) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_read_complate) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_read_complate_clear) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_read_data) refers to drv_i2c_slave.o(i.drv_i2c_s_read_data) for drv_i2c_s_read_data + hal_i2c_slave.o(i.hal_i2c_s_read_data) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_read_data) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_i2c_slave.o(i.hal_i2c_s_rxfifo_notempty) refers to drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) for drv_i2c_s_get_fifo_status + hal_i2c_slave.o(i.hal_i2c_s_rxfifo_notempty) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_rxfifo_notempty) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_i2c_slave.o(i.hal_i2c_s_sel) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_set_dma_tx_cycle) refers to drv_dma.o(i.drv_dma_enable_cycle) for drv_dma_enable_cycle + hal_i2c_slave.o(i.hal_i2c_s_set_dma_tx_cycle) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_set_dma_tx_cycle) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_i2c_slave.o(i.hal_i2c_s_set_high_impedance) refers to drv_i2c_slave.o(i.drv_i2c_s_enable) for drv_i2c_s_enable + hal_i2c_slave.o(i.hal_i2c_s_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_i2c_slave.o(i.hal_i2c_s_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + hal_i2c_slave.o(i.hal_i2c_s_set_high_impedance) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_set_high_impedance) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_i2c_slave.o(i.hal_i2c_s_set_transfer) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_write_complate) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_write_data) refers to drv_i2c_slave.o(i.drv_i2c_s_write_data) for drv_i2c_s_write_data + hal_i2c_slave.o(i.hal_i2c_s_write_data) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_write_data) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) for drv_i2c_s_get_fifo_status + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_i2c_slave.o(i.drv_i2c_s_clear_it_pending_bit) for drv_i2c_s_clear_it_pending_bit + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_i2c_slave.o(i.drv_i2c_s_write_data) for drv_i2c_s_write_data + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_spi_master.o(i.hal_spi_m_callback) refers to drv_spi_dma.o(i.drv_spi_abort_dma) for drv_spi_abort_dma + hal_spi_master.o(i.hal_spi_m_callback) refers to hal_spi_master.o(.data) for .data + hal_spi_master.o(i.hal_spi_m_clear_rxfifo) refers to drv_spi_master.o(i.drv_spi_m_read_data) for drv_spi_m_read_data + hal_spi_master.o(i.hal_spi_m_deinit) refers to drv_spi_master.o(i.drv_spi_m_deinit) for drv_spi_m_deinit + hal_spi_master.o(i.hal_spi_m_dma_init) refers to hal_spi_master.o(i.hal_spi_m_gpio_init) for hal_spi_m_gpio_init + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_master.o(i.drv_spi_master_init) for drv_spi_master_init + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_dma.o(i.drv_spi_dma_init) for drv_spi_dma_init + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_dma.o(i.drv_spi_dma_ch6_init) for drv_spi_dma_ch6_init + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) for drv_spi_set_dma_irq_callback + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) for drv_spi_set_dma_ch6_irq_callback + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) for drv_sys_cfg_set_dma_rx_req + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) for drv_sys_cfg_set_dma_tx_req + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_master.o(i.drv_spi_m_enable_rx_dma) for drv_spi_m_enable_rx_dma + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_master.o(i.drv_spi_m_enable_tx_dma) for drv_spi_m_enable_tx_dma + hal_spi_master.o(i.hal_spi_m_dma_init) refers to hal_spi_master.o(i.hal_spi_m_callback) for hal_spi_m_callback + hal_spi_master.o(i.hal_spi_m_dma_read) refers to drv_spi_dma.o(i.drv_spim_dma_read) for drv_spim_dma_read + hal_spi_master.o(i.hal_spi_m_dma_read) refers to hal_spi_master.o(.data) for .data + hal_spi_master.o(i.hal_spi_m_dma_write) refers to drv_spi_dma.o(i.drv_spim_dma_write) for drv_spim_dma_write + hal_spi_master.o(i.hal_spi_m_dma_write) refers to hal_spi_master.o(.data) for .data + hal_spi_master.o(i.hal_spi_m_get_transfer_complate) refers to hal_spi_master.o(.data) for .data + hal_spi_master.o(i.hal_spi_m_gpio_init) refers to drv_spi_master.o(i.drv_spi_m_gpio_init) for drv_spi_m_gpio_init + hal_spi_master.o(i.hal_spi_m_read_rxfifo) refers to drv_spi_master.o(i.drv_spi_m_read_data) for drv_spi_m_read_data + hal_spi_master.o(i.hal_spi_m_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_spi_master.o(i.hal_spi_m_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_init_input) for hal_gpio_init_input + hal_spi_master.o(i.hal_spi_m_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + hal_swire.o(i.hal_swire_deinit) refers to drv_swire.o(i.drv_swire_enable) for drv_swire_enable + hal_swire.o(i.hal_swire_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_swire.o(i.hal_swire_init) refers to drv_crgu.o(i.drv_crgu_set_swire_div) for drv_crgu_set_swire_div + hal_swire.o(i.hal_swire_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_swire.o(i.hal_swire_init) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_swire.o(i.hal_swire_init) refers to drv_swire.o(i.drv_swire_enable) for drv_swire_enable + hal_swire.o(i.hal_swire_open) refers to drv_swire.o(i.drv_swire_set_power_down) for drv_swire_set_power_down + hal_swire.o(i.hal_swire_register_callback) refers to drv_swire.o(i.drv_swire_register_callback) for drv_swire_register_callback + hal_swire.o(i.hal_swire_start) refers to drv_swire.o(i.drv_swire_set_int) for drv_swire_set_int + hal_swire.o(i.hal_swire_start) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_swire.o(i.hal_swire_start) refers to drv_swire.o(i.drv_swire_set_bit_time) for drv_swire_set_bit_time + hal_swire.o(i.hal_swire_start) refers to drv_swire.o(i.drv_swire_set_pulse_count) for drv_swire_set_pulse_count + hal_swire.o(i.hal_swire_start) refers to drv_common.o(.data) for g_system_clock + hal_system.o(i.hal_system_deep_sleep_mode) refers to drv_pwr.o(i.drv_pwr_enter_deep_sleep_mode) for drv_pwr_enter_deep_sleep_mode + hal_system.o(i.hal_system_disable_systick) refers to drv_common.o(i.drv_common_disable_systick) for drv_common_disable_systick + hal_system.o(i.hal_system_enable_systick) refers to drv_common.o(i.drv_common_enable_systick) for drv_common_enable_systick + hal_system.o(i.hal_system_get_tick) refers to drv_common.o(i.drv_common_get_tick) for drv_common_get_tick + hal_system.o(i.hal_system_idle_mode) refers to drv_common.o(i.drv_common_idle_mode) for drv_common_idle_mode + hal_system.o(i.hal_system_init) refers to drv_pwr.o(i.drv_pwr_set_system_clk_src) for drv_pwr_set_system_clk_src + hal_system.o(i.hal_system_init) refers to drv_crgu.o(i.drv_crgu_set_ahb_src) for drv_crgu_set_ahb_src + hal_system.o(i.hal_system_init) refers to drv_crgu.o(i.drv_crgu_set_ahb_pre_div) for drv_crgu_set_ahb_pre_div + hal_system.o(i.hal_system_init) refers to irq_redirect .o(i.handle_init) for handle_init + hal_system.o(i.hal_system_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_all_int) for drv_sys_cfg_clear_all_int + hal_system.o(i.hal_system_init) refers to drv_common.o(i.drv_common_system_init) for drv_common_system_init + hal_system.o(i.hal_system_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_system.o(i.hal_system_init) refers to drv_pwr.o(i.drv_pwr_set_pvd_mode) for drv_pwr_set_pvd_mode + hal_system.o(i.hal_system_init) refers to drv_common.o(.data) for g_system_clock + hal_system.o(i.hal_system_init_console) refers to hal_uart.o(i.hal_uart_init) for hal_uart_init + hal_system.o(i.hal_system_register_systick_cb) refers to drv_common.o(i.drv_common_systick_register_cb) for drv_common_systick_register_cb + hal_system.o(i.hal_system_set_phy_calibration) refers to drv_phy_common.o(i.drv_phy_enable_calibration) for drv_phy_enable_calibration + hal_system.o(i.hal_system_set_pvd) refers to drv_pwr.o(i.drv_pwr_set_pvd_mode) for drv_pwr_set_pvd_mode + hal_system.o(i.hal_system_set_vcc) refers to drv_pwr.o(i.drv_pwr_set_cp_mode) for drv_pwr_set_cp_mode + hal_system.o(i.hal_system_share_flash_mode) refers to drv_fls.o(i.drv_fls_gpio_connect) for drv_fls_gpio_connect + hal_system.o(i.hal_system_share_flash_mode) refers to drv_fls.o(i.drv_fls_gpio_disconnect) for drv_fls_gpio_disconnect + hal_system.o(i.hal_system_sleep_mode) refers to drv_crgu.o(i.drv_crgu_config_clocks) for drv_crgu_config_clocks + hal_timer.o(i.hal_timer_deinit) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + hal_timer.o(i.hal_timer_deinit) refers to drv_timer.o(i.drv_timer_set_repeat) for drv_timer_set_repeat + hal_timer.o(i.hal_timer_deinit) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_timer.o(i.hal_timer_deinit) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_timer.o(i.hal_timer_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_timer.o(i.hal_timer_get_status) refers to drv_timer.o(i.drv_timer_get_status) for drv_timer_get_status + hal_timer.o(i.hal_timer_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_timer.o(i.hal_timer_init) refers to drv_timer.o(i.drv_timer_set_prescaler) for drv_timer_set_prescaler + hal_timer.o(i.hal_timer_set_repeat) refers to drv_timer.o(i.drv_timer_set_repeat) for drv_timer_set_repeat + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_register_callback) for drv_timer_register_callback + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_get_prescaler) for drv_timer_get_prescaler + hal_timer.o(i.hal_timer_start) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_set_compare_val) for drv_timer_set_compare_val + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_timer.o(i.hal_timer_start) refers to drv_common.o(.data) for g_system_clock + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_register_callback) for drv_timer_register_callback + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_get_prescaler) for drv_timer_get_prescaler + hal_timer.o(i.hal_timer_start_ex) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_set_compare_val) for drv_timer_set_compare_val + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_timer.o(i.hal_timer_start_ex) refers to drv_common.o(.data) for g_system_clock + hal_timer.o(i.hal_timer_stop) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_timer.o(i.hal_timer_stop) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + hal_timer.o(i.hal_timer_stop) refers to drv_timer.o(i.drv_timer_register_callback) for drv_timer_register_callback + hal_timer.o(i.hal_timer_stop) refers to drv_timer.o(i.drv_timer_set_compare_val) for drv_timer_set_compare_val + tau_delay.o(i.delayMs) refers to tau_delay.o(i.delayUs) for delayUs + app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) refers to app_tp_for_custom_s8.o(.data) for .data + app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) refers to app_tp_for_custom_s8.o(.constdata) for .constdata + app_tp_for_custom_s8.o(i.app_tp_screen_analysis_const) refers to app_tp_transfer.o(i.app_tp_screen_init) for app_tp_screen_init + app_tp_for_custom_s8.o(i.app_tp_screen_analysis_const) refers to app_tp_for_custom_s8.o(.data) for .data + app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) refers to app_tp_enc.o(i.EncryptCheck) for EncryptCheck + app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) refers to uidiv.o(.text) for __aeabi_uidivmod + app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) refers to app_tp_for_custom_s8.o(.data) for .data + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_1 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_2 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_3 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_4 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_5 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_6 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_7 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for phone_reg_point_data + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for phone_reg_point_back + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for phone_reg_coord_data + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for phone_reg_coord_back + hal_uart.o(i.hal_uart_deinit) refers to drv_dma.o(i.drv_dma_deinit) for drv_dma_deinit + hal_uart.o(i.hal_uart_deinit) refers to drv_uart.o(i.UART_Deinit) for UART_Deinit + hal_uart.o(i.hal_uart_dmacallback) refers to hal_uart.o(.bss) for .bss + hal_uart.o(i.hal_uart_init) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_uart.o(i.hal_uart_init) refers to memseta.o(.text) for __aeabi_memclr4 + hal_uart.o(i.hal_uart_init) refers to drv_uart.o(i.UART_init) for UART_init + hal_uart.o(i.hal_uart_init) refers to drv_common.o(.data) for g_system_clock + hal_uart.o(i.hal_uart_init) refers to hal_uart.o(.bss) for .bss + hal_uart.o(i.hal_uart_receive_blocking) refers to drv_uart.o(i.UART_ReadBlocking) for UART_ReadBlocking + hal_uart.o(i.hal_uart_receive_dma) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + hal_uart.o(i.hal_uart_receive_dma) refers to drv_uart_dma.o(i.UART_TransferCreateHandleDMA) for UART_TransferCreateHandleDMA + hal_uart.o(i.hal_uart_receive_dma) refers to drv_uart_dma.o(i.UART_TransferReceiveDMA) for UART_TransferReceiveDMA + hal_uart.o(i.hal_uart_receive_dma) refers to hal_uart.o(.bss) for .bss + hal_uart.o(i.hal_uart_receive_dma) refers to hal_uart.o(i.hal_uart_dmacallback) for hal_uart_dmacallback + hal_uart.o(i.hal_uart_transmit_blocking) refers to drv_uart.o(i.UART_WriteBlocking) for UART_WriteBlocking + hal_uart.o(i.hal_uart_transmit_dma) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + hal_uart.o(i.hal_uart_transmit_dma) refers to drv_uart_dma.o(i.UART_TransferCreateHandleDMA) for UART_TransferCreateHandleDMA + hal_uart.o(i.hal_uart_transmit_dma) refers to drv_uart_dma.o(i.UART_TransferSendDMA) for UART_TransferSendDMA + hal_uart.o(i.hal_uart_transmit_dma) refers to hal_uart.o(.bss) for .bss + hal_uart.o(i.hal_uart_transmit_dma) refers to hal_uart.o(i.hal_uart_dmacallback) for hal_uart_dmacallback + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_param_init.o(i.drv_param_init_get_ccm) for drv_param_init_get_ccm + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_lcdc.o(i.drv_lcdc_config_ccm) for drv_lcdc_config_ccm + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to ffltui.o(.text) for __aeabi_ui2f + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to fdiv.o(.text) for __aeabi_fdiv + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to f2d.o(.text) for __aeabi_f2d + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) for hal_internal_sync_get_hight_performan_mode + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to dfltui.o(.text) for __aeabi_ui2d + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to ddiv.o(.text) for __aeabi_ddiv + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to sqrt.o(i.sqrt) for sqrt + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to dmul.o(.text) for __aeabi_dmul + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to cdcmple.o(.text) for __aeabi_cdcmple + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.check_pkt_buf_rev) refers to hal_internal_vsync.o(i.drv_rxbr_get_status0) for drv_rxbr_get_status0 + hal_internal_vsync.o(i.check_pkt_buf_rev) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.check_pkt_buf_rev) refers to drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) for drv_rxbr_clear_pkt_buffer + hal_internal_vsync.o(i.check_pkt_buf_rev) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.dcs_sw_filter) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.dcs_sw_filter) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_data_mode) for drv_memc_set_data_mode + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_tear_waveform) for drv_memc_set_tear_waveform + hal_internal_vsync.o(i.hal_internal_init_memc) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tear_mode) for hal_internal_vsync_get_tear_mode + hal_internal_vsync.o(i.hal_internal_init_memc) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_ltpo_mode) for drv_memc_set_ltpo_mode + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_double_buffer) for drv_memc_set_double_buffer + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_active_height) for drv_memc_set_active_height + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_inten) for drv_memc_set_inten + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_enable_irq) for drv_memc_enable_irq + hal_internal_vsync.o(i.hal_internal_init_memc) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_cmd_mode_rcv_te) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_sync_cmd_mode_rcv_te) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite) for drv_lcdc_config_overwrite + hal_internal_vsync.o(i.hal_internal_sync_cmd_mode_rcv_te) refers to drv_lcdc.o(i.drv_lcdc_start) for drv_lcdc_start + hal_internal_vsync.o(i.hal_internal_sync_cmd_mode_rcv_te) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.hal_internal_sync_cmd_mode_rcv_te) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(i.calc_framebuffer_setting) for calc_framebuffer_setting + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_vidc.o(i.drv_vidc_reset) for drv_vidc_reset + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) for hal_dsi_rx_ctrl_init + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) for hal_dsi_tx_ctrl_init + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) for hal_dsi_rx_ctrl_start + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) for hal_dsi_rx_ctrl_gen_a_tear_signal + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to tau_delay.o(i.delayUs) for delayUs + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_dsi_tx.o(i.drv_dsi_tx_shutdown) for drv_dsi_tx_shutdown + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_crgu.o(i.drv_crgu_config_reset_modules) for drv_crgu_config_reset_modules + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(i.hal_internal_init_memc) for hal_internal_init_memc + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) for hal_dsi_tx_ctrl_start + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to hal_internal_vsync.o(i.calc_framebuffer_setting) for calc_framebuffer_setting + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to drv_vidc.o(i.drv_vidc_reset) for drv_vidc_reset + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) for hal_dsi_rx_ctrl_init + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) for hal_dsi_rx_ctrl_start + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to drv_lcdc.o(i.drv_lcdc_enable_shadow_reg) for drv_lcdc_enable_shadow_reg + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to tau_delay.o(i.delayMs) for delayMs + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) for hal_dsi_rx_ctrl_gen_a_tear_signal + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to tau_delay.o(i.delayUs) for delayUs + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) for hal_vsync_reset_lcdc_scaler + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to hal_internal_vsync.o(i.vsync_set_te_mode) for vsync_set_te_mode + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.hal_internal_update_dpi_param) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) refers to ffltui.o(.text) for __aeabi_ui2f + hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) refers to fdiv.o(.text) for __aeabi_fdiv + hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) refers to fmul.o(.text) for __aeabi_fmul + hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) refers to f2d.o(.text) for __aeabi_f2d + hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) refers to dadd.o(.text) for __aeabi_dadd + hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) refers to ceil.o(i.ceil) for ceil + hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_deinit) refers to memseta.o(.text) for __aeabi_memclr4 + hal_internal_vsync.o(i.hal_internal_vsync_deinit) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_deinit) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_get_tear_mode) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to drv_chip_info.o(i.drv_chip_rx_info_check) for drv_chip_rx_info_check + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) for check_mipi_rx_tx_video_info + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.calc_framebuffer_setting) for calc_framebuffer_setting + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to drv_rxbr.o(i.drv_rxbr_register_irq0_callback) for drv_rxbr_register_irq0_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to drv_rxbr.o(i.drv_rxbr_register_irq1_callback) for drv_rxbr_register_irq1_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to drv_vidc.o(i.drv_vidc_register_callback) for drv_vidc_register_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to dcs_packet_fifo.o(i.dcs_packet_fifo_init) for dcs_packet_fifo_init + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.soft_gen_te) for soft_gen_te + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.soft_gen_te_double_buffer) for soft_gen_te_double_buffer + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.rxbr_irq0_callback) for rxbr_irq0_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.rxbr_irq1_callback) for rxbr_irq1_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.vidc_callback) for vidc_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) for check_mipi_rx_tx_video_info + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to hal_internal_vsync.o(i.calc_framebuffer_setting) for calc_framebuffer_setting + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_register_write_cmd_entry) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) refers to drv_rxbr.o(i.drv_rxbr_set_cmd_filter) for drv_rxbr_set_cmd_filter + hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_dcs_direct_mode) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) for hal_internal_vsync_set_auto_hw_filter + hal_internal_vsync.o(i.hal_internal_vsync_set_dcs_direct_mode) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) refers to hal_internal_vsync.o(i.hal_internal_vsync_deinit) for hal_internal_vsync_deinit + hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to hal_internal_vsync.o(i.vsync_set_te_mode) for vsync_set_te_mode + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to hal_internal_vsync.o(i.hal_internal_vsync_deinit) for hal_internal_vsync_deinit + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite) for drv_lcdc_config_overwrite + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to hal_internal_vsync.o(i.vsync_set_te_mode) for vsync_set_te_mode + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to ap_demo.o(i.__ARM_common_switch8) for __ARM_common_switch8 + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_memc.o(i.drv_memc_rate_transfer_sel) for drv_memc_rate_transfer_sel + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_memc.o(i.drv_memc_sel_vsync) for drv_memc_sel_vsync + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) for drv_rxbr_frame_drop_cfg + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_rxbr.o(i.drv_rxbr_hline_rcv0_cfg) for drv_rxbr_hline_rcv0_cfg + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to tau_delay.o(i.delayMs) for delayMs + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to hal_internal_vsync.o(i.drv_rxbr_get_status0) for drv_rxbr_get_status0 + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to ffltui.o(.text) for __aeabi_ui2f + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to fdiv.o(.text) for __aeabi_fdiv + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_memc.o(i.drv_memc_set_fs_en_conditions) for drv_memc_set_fs_en_conditions + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_memc.o(i.drv_memc_set_lcdc_st_conditions) for drv_memc_set_lcdc_st_conditions + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_memc.o(i.drv_memc_set_vidc_sync_cnt) for drv_memc_set_vidc_sync_cnt + hal_internal_vsync.o(i.hal_internal_vsync_update_lcdc_addr) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to dfltui.o(.text) for __aeabi_ui2d + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to dadd.o(.text) for __aeabi_dadd + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp_area) for hal_dsi_tx_ctrl_set_partial_disp_area + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp) for hal_dsi_tx_ctrl_set_partial_disp + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to drv_param_init.o(i.drv_param_init_get_sclu_filter) for drv_param_init_get_sclu_filter + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to drv_lcdc.o(i.drv_lcdc_config_scale_up_coef) for drv_lcdc_config_scale_up_coef + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to drv_crgu.o(i.drv_crgu_config_reset_modules) for drv_crgu_config_reset_modules + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) for hal_dsi_tx_ctrl_init + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to hal_internal_vsync.o(i.hal_internal_init_memc) for hal_internal_init_memc + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) for hal_dsi_tx_ctrl_start + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to hal_internal_vsync.o(i.dcs_sw_filter) for dcs_sw_filter + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) for dcs_packet_fifo_alloc + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) for hal_dsi_rx_ctrl_dsc_async_handler + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to hal_internal_vsync.o(i.check_pkt_buf_rev) for check_pkt_buf_rev + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) for drv_dsi_tx_command_put_payload + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rx_partial_update) refers to drv_rxbr.o(i.drv_rxbr_get_col_addr) for drv_rxbr_get_col_addr + hal_internal_vsync.o(i.rx_partial_update) refers to drv_rxbr.o(i.drv_rxbr_get_page_addr) for drv_rxbr_get_page_addr + hal_internal_vsync.o(i.rx_partial_update) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.rx_partial_update) refers to drv_dsc_dec.o(i.drv_dsc_dec_get_nslc) for drv_dsc_dec_get_nslc + hal_internal_vsync.o(i.rx_partial_update) refers to drv_crgu.o(i.drv_crgu_set_dsco_src) for drv_crgu_set_dsco_src + hal_internal_vsync.o(i.rx_partial_update) refers to drv_crgu.o(i.drv_crgu_set_dsco_src_div) for drv_crgu_set_dsco_src_div + hal_internal_vsync.o(i.rx_partial_update) refers to drv_crgu.o(i.drv_crgu_set_dsc_core_div) for drv_crgu_set_dsc_core_div + hal_internal_vsync.o(i.rx_partial_update) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.rx_partial_update) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rx_receive_packet) refers to hal_internal_vsync.o(i.rx_get_dcs_packet_data) for rx_get_dcs_packet_data + hal_internal_vsync.o(i.rx_receive_packet) refers to hal_internal_vsync.o(i.rx_receive_pps) for rx_receive_pps + hal_internal_vsync.o(i.rx_receive_packet) refers to drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) for drv_rxbr_clear_pkt_buffer + hal_internal_vsync.o(i.rx_receive_packet) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.rx_receive_packet) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rx_receive_pps) refers to memseta.o(.text) for __aeabi_memclr4 + hal_internal_vsync.o(i.rx_receive_pps) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.rx_receive_pps) refers to drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) for drv_rxbr_clear_pkt_buffer + hal_internal_vsync.o(i.rx_receive_pps) refers to hal_internal_vsync.o(i.check_pkt_buf_rev) for check_pkt_buf_rev + hal_internal_vsync.o(i.rx_receive_pps) refers to drv_dsc_dec.o(i.drv_dsc_dec_convert_pps_rc_parameter) for drv_dsc_dec_convert_pps_rc_parameter + hal_internal_vsync.o(i.rx_receive_pps) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.rx_receive_pps) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) for drv_dsi_rx_get_compression_en + hal_internal_vsync.o(i.rx_receive_pps) refers to drv_dsc_dec.o(i.drv_dsc_dec_enable) for drv_dsc_dec_enable + hal_internal_vsync.o(i.rx_receive_pps) refers to drv_dsc_dec.o(i.drv_dsc_dec_set_u8_pps) for drv_dsc_dec_set_u8_pps + hal_internal_vsync.o(i.rx_receive_pps) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.rx_receive_pps) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to hal_internal_vsync.o(i.drv_rxbr_get_status0) for drv_rxbr_get_status0 + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to hal_internal_vsync.o(i.rx_receive_packet) for rx_receive_packet + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to hal_internal_vsync.o(i.drv_rxbr_get_int_source) for drv_rxbr_get_int_source + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to hal_internal_vsync.o(i.rx_partial_update) for rx_partial_update + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(i.drv_rxbr_get_int_source) for drv_rxbr_get_int_source + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) for hal_internal_video_mode_auto_sync + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(i.vpre_err_reset) for vpre_err_reset + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to drv_memc.o(i.drv_memc_set_double_buffer_reverse) for drv_memc_set_double_buffer_reverse + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) for drv_rxbr_clear_pkt_buffer + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.soft_gen_te) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.soft_gen_te) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.soft_gen_te_double_buffer) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.soft_gen_te_double_buffer) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.vidc_callback) refers to drv_vidc.o(i.drv_vidc_get_irq_status) for drv_vidc_get_irq_status + hal_internal_vsync.o(i.vidc_callback) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite) for drv_lcdc_config_overwrite + hal_internal_vsync.o(i.vidc_callback) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_internal_vsync.o(i.vidc_callback) refers to drv_vidc.o(i.drv_vidc_clear_irq) for drv_vidc_clear_irq + hal_internal_vsync.o(i.vidc_callback) refers to drv_vidc.o(i.drv_vidc_set_irqen) for drv_vidc_set_irqen + hal_internal_vsync.o(i.vidc_callback) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.vidc_callback) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.vidc_callback) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.vpre_err_reset) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_internal_vsync.o(i.vpre_err_reset) refers to drv_vidc.o(i.drv_vidc_reset) for drv_vidc_reset + hal_internal_vsync.o(i.vpre_err_reset) refers to drv_dsc_dec.o(i.drv_dsc_dec_set_u8_pps) for drv_dsc_dec_set_u8_pps + hal_internal_vsync.o(i.vpre_err_reset) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.vsync_set_te_mode) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_internal_vsync.o(i.vsync_set_te_mode) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_internal_vsync.o(i.vsync_set_te_mode) refers to drv_lcdc.o(i.drv_lcdc_ctrl_flow) for drv_lcdc_ctrl_flow + hal_internal_vsync.o(i.vsync_set_te_mode) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.vsync_set_te_mode) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.vsync_set_te_mode) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.vsync_set_te_mode) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(.data) refers to hal_internal_vsync.o(.bss) for sg_te_info + drv_common.o(i.app_HardFault_Handler) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_common.o(i.app_SysTick_Handler) refers to drv_common.o(.data) for .data + drv_common.o(i.drv_common_enable_systick) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_common.o(i.drv_common_enable_systick) refers to drv_common.o(.data) for .data + drv_common.o(i.drv_common_get_tick) refers to drv_common.o(.data) for .data + drv_common.o(i.drv_common_system_init) refers to drv_chip_info.o(i.drv_chip_info_init) for drv_chip_info_init + drv_common.o(i.drv_common_systick_register_cb) refers to drv_common.o(.data) for .data + drv_dma.o(i.app_dma_irq_handler) refers to drv_dma.o(i.drv_dma_irq_handler) for drv_dma_irq_handler + drv_dma.o(i.drv_dma_abort_transfer) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + drv_dma.o(i.drv_dma_abort_transfer) refers to drv_dma.o(i.drv_dma_disenable_channel_interrupts) for drv_dma_disenable_channel_interrupts + drv_dma.o(i.drv_dma_ahb_init) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + drv_dma.o(i.drv_dma_ahb_init) refers to drv_dma.o(i.drv_dma_disenable_channel_interrupts) for drv_dma_disenable_channel_interrupts + drv_dma.o(i.drv_dma_ahb_init) refers to drv_dma.o(i.drv_dma_clear_flag) for drv_dma_clear_flag + drv_dma.o(i.drv_dma_ahb_init) refers to drv_dma.o(i.drv_dma_set_ccr) for drv_dma_set_ccr + drv_dma.o(i.drv_dma_ahb_init) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_dma.o(i.drv_dma_clear_flag) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dma.o(i.drv_dma_create_handle) refers to drv_dma.o(.bss) for .bss + drv_dma.o(i.drv_dma_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_dma.o(i.drv_dma_disenable_channel_interrupts) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dma.o(i.drv_dma_enable_channel_interrupts) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_dma.o(i.drv_dma_enable_cycle) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + drv_dma.o(i.drv_dma_get_remaining_bytes) refers to drv_dma.o(i.drv_dma_channel_is_active) for drv_dma_channel_is_active + drv_dma.o(i.drv_dma_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_dma.o(i.drv_dma_init) refers to drv_dma.o(i.drv_dma_ahb_init) for drv_dma_ahb_init + drv_dma.o(i.drv_dma_irq_handler) refers to drv_dma.o(i.drv_dma_get_channel_flag) for drv_dma_get_channel_flag + drv_dma.o(i.drv_dma_irq_handler) refers to drv_dma.o(i.drv_dma_clear_flag) for drv_dma_clear_flag + drv_dma.o(i.drv_dma_irq_handler) refers to drv_dma.o(.bss) for .bss + drv_dma.o(i.drv_dma_m2m_init) refers to memseta.o(.text) for __aeabi_memclr4 + drv_dma.o(i.drv_dma_m2m_init) refers to drv_dma.o(i.drv_dma_init) for drv_dma_init + drv_dma.o(i.drv_dma_reset) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + drv_dma.o(i.drv_dma_set_burst) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + drv_dma.o(i.drv_dma_set_transfer) refers to drv_dma.o(i.drv_dma_set_burst) for drv_dma_set_burst + drv_dma.o(i.drv_dma_start_transfer) refers to drv_dma.o(i.drv_dma_enable_channel_interrupts) for drv_dma_enable_channel_interrupts + drv_dma.o(i.drv_dma_start_transfer) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_fls.o(i.drv_fls_gpio_connect) refers to drv_fls.o(i.drv_fls_gpio_disconnect) for drv_fls_gpio_disconnect + drv_fls.o(i.drv_fls_gpio_disconnect) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_fls.o(i.fls_EnableClk) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_fls.o(i.fls_busy_pending) refers to norflash.o(i.norflash_get_status) for norflash_get_status + drv_fls.o(i.fls_de_init) refers to drv_fls_dma.o(i.fls_dma_disable) for fls_dma_disable + drv_fls.o(i.fls_de_init) refers to drv_dma.o(i.drv_dma_clear_flag) for drv_dma_clear_flag + drv_fls.o(i.fls_de_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_fls.o(i.fls_disable_it) refers to drv_fls.o(i.__NVIC_DisableIRQ) for __NVIC_DisableIRQ + drv_fls.o(i.fls_disable_it) refers to drv_fls.o(i.fls_set_mc_irq_mask) for fls_set_mc_irq_mask + drv_fls.o(i.fls_enable_it) refers to drv_fls.o(i.__NVIC_DisableIRQ) for __NVIC_DisableIRQ + drv_fls.o(i.fls_enable_it) refers to drv_fls.o(i.fls_set_mc_irq_mask) for fls_set_mc_irq_mask + drv_fls.o(i.fls_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_fls.o(i.fls_init) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + drv_fls.o(i.fls_init) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_init) refers to drv_fls.o(i.fls_spi_init) for fls_spi_init + drv_fls.o(i.fls_init) refers to drv_fls.o(i.fls_ctrl_cfg_init) for fls_ctrl_cfg_init + drv_fls.o(i.fls_init) refers to drv_fls.o(i.fls_set_tuning) for fls_set_tuning + drv_fls.o(i.fls_init) refers to drv_fls_dma.o(i.fls_dma_disable) for fls_dma_disable + drv_fls.o(i.fls_read_byte_data) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_read_byte_data) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls.o(i.fls_read_byte_data) refers to drv_fls.o(i.fls_set_read) for fls_set_read + drv_fls.o(i.fls_read_byte_data) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls.o(i.fls_read_cmd) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_read_cmd) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls.o(i.fls_read_cmd) refers to drv_fls.o(i.fls_set_read) for fls_set_read + drv_fls.o(i.fls_read_cmd) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls.o(i.fls_read_cmd_it) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_read_cmd_it) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls.o(i.fls_read_cmd_it) refers to drv_fls.o(i.fls_set_read) for fls_set_read + drv_fls.o(i.fls_read_cmd_it) refers to drv_fls.o(i.fls_enable_it) for fls_enable_it + drv_fls.o(i.fls_read_cmd_it) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls.o(i.fls_set_mc_irq_mask) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_fls.o(i.fls_set_mc_irq_mask) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_fls.o(i.fls_write_byte_data) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_write_byte_data) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls.o(i.fls_write_byte_data) refers to drv_fls.o(i.fls_set_write) for fls_set_write + drv_fls.o(i.fls_write_byte_data) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls.o(i.fls_write_cmd) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_write_cmd) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls.o(i.fls_write_cmd) refers to drv_fls.o(i.fls_set_write) for fls_set_write + drv_fls.o(i.fls_write_cmd) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) for drv_ap_rst_trig_edge_detect + drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) refers to drv_gpio.o(.data) for .data + drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.drv_gpio_get_pull_state) refers to ap_demo.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_gpio.o(i.drv_gpio_register_ap_reset_callback) refers to drv_gpio.o(.data) for .data + drv_gpio.o(i.drv_gpio_register_callback) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.drv_gpio_set_driving_strength) refers to ap_demo.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_gpio.o(i.drv_gpio_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.drv_gpio_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_gpio.o(i.drv_gpio_set_pull_state) refers to ap_demo.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_gpio.o(i.drv_gpio_set_schmitt_trigger) refers to ap_demo.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_gpio.o(i.drv_gpio_set_slew_rate) refers to ap_demo.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_i2c_dma.o(i.drv_i2c_dma_callback) refers to drv_i2c_dma.o(.data) for .data + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_i2c_master.o(i.drv_i2c_m_enable) for drv_i2c_m_enable + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) for drv_sys_cfg_set_dma_rx_req + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_dma.o(i.drv_dma_set_transfer) for drv_dma_set_transfer + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_i2c_dma.o(i.drv_i2c_master_write_read_cmd) for drv_i2c_master_write_read_cmd + drv_i2c_dma.o(i.drv_i2c_master_write_dma) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) for drv_sys_cfg_set_dma_tx_req + drv_i2c_dma.o(i.drv_i2c_master_write_dma) refers to drv_dma.o(i.drv_dma_set_transfer) for drv_dma_set_transfer + drv_i2c_dma.o(i.drv_i2c_master_write_dma) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_i2c_dma.o(i.drv_i2c_master_write_dma) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) refers to drv_dma.o(i.drv_dma_set_callback) for drv_dma_set_callback + drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) refers to drv_i2c_dma.o(.data) for .data + drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) refers to drv_i2c_dma.o(.bss) for .bss + drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) refers to drv_i2c_dma.o(i.drv_i2c_dma_callback) for drv_i2c_dma_callback + drv_i2c_dma.o(i.drv_i2c_slave_write_dma) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_i2c_master.o(i.app_I2C1_IRQn_Handler) refers to drv_i2c_master.o(.data) for .data + drv_i2c_master.o(i.drv_i2c1_set_callback) refers to drv_i2c_master.o(.data) for .data + drv_i2c_master.o(i.drv_i2c_m_clear_it_pending_bit) refers to ap_demo.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_i2c_master.o(i.drv_i2c_m_clear_it_pending_bit) refers to drv_i2c_master.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_i2c_master.o(i.drv_i2c_m_deinit) refers to drv_i2c_master.o(i.drv_i2c_m_disable_intr) for drv_i2c_m_disable_intr + drv_i2c_master.o(i.drv_i2c_m_deinit) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + drv_i2c_master.o(i.drv_i2c_m_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_i2c_master.o(i.drv_i2c_m_enable_intr) refers to drv_i2c_master.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_i2c_master.o(i.drv_i2c_m_read_data) refers to drv_i2c_master.o(i.drv_i2c_m_get_fifo_status) for drv_i2c_m_get_fifo_status + drv_i2c_master.o(i.drv_i2c_m_set_sys_mask) refers to drv_i2c_master.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_i2c_master.o(i.drv_i2c_m_write_data) refers to drv_i2c_master.o(i.drv_i2c_m_get_fifo_status) for drv_i2c_m_get_fifo_status + drv_i2c_master.o(i.drv_i2c_master_init) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_i2c_master.o(i.drv_i2c_master_init) refers to drv_common.o(.data) for g_system_clock + drv_i2c_slave.o(i.app_I2C0_IRQn_Handler) refers to drv_i2c_slave.o(.data) for .data + drv_i2c_slave.o(i.drv_i2c0_set_callback) refers to drv_i2c_slave.o(.data) for .data + drv_i2c_slave.o(i.drv_i2c_s_clear_it_pending_bit) refers to ap_demo.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_i2c_slave.o(i.drv_i2c_s_read_data) refers to drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) for drv_i2c_s_get_fifo_status + drv_i2c_slave.o(i.drv_i2c_s_set_intr) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_i2c_slave.o(i.drv_i2c_s_set_intr) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_i2c_slave.o(i.drv_i2c_s_write_data) refers to drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) for drv_i2c_s_get_fifo_status + drv_i2c_slave.o(i.drv_i2c_slave_init) refers to drv_i2c_slave.o(i.drv_i2c_s_enable) for drv_i2c_s_enable + drv_param_init.o(i.drv_param_init_get_ccm) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_get_scld_filter_h) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_get_scld_filter_v) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_get_sclu_filter) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_set_ccm) refers to memcpya.o(.text) for __aeabi_memcpy4 + drv_param_init.o(i.drv_param_init_set_ccm) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_set_scld_filter) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_set_sclu_filter) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_p2r_filter_init) refers to drv_param_init.o(.constdata) for .constdata + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_dma.o(i.drv_dma_disenable_channel_interrupts) for drv_dma_disenable_channel_interrupts + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_master.o(i.drv_spi_m_enable_tx_dma) for drv_spi_m_enable_tx_dma + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_master.o(i.drv_spi_m_enable_rx_dma) for drv_spi_m_enable_rx_dma + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_slave.o(i.drv_spi_s_enable_tx_dma) for drv_spi_s_enable_tx_dma + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_slave.o(i.drv_spi_s_enable_rx_dma) for drv_spi_s_enable_rx_dma + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_dma.o(.bss) for .bss + drv_spi_dma.o(i.drv_spi_dma_callback) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_dma_ch6_init) refers to drv_spi_dma.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_spi_dma.o(i.drv_spi_dma_ch6_init) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_dma_init) refers to drv_spi_dma.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_spi_dma.o(i.drv_spi_dma_init) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) refers to drv_dma.o(i.drv_dma_set_callback) for drv_dma_set_callback + drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) refers to drv_spi_dma.o(.bss) for .bss + drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) refers to drv_spi_dma.o(i.drv_spi_dma_callback) for drv_spi_dma_callback + drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) refers to drv_dma.o(i.drv_dma_set_callback) for drv_dma_set_callback + drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) refers to drv_spi_dma.o(.bss) for .bss + drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) refers to drv_spi_dma.o(i.drv_spi_dma_callback) for drv_spi_dma_callback + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_spi_master.o(i.drv_spi_m_enable_rx_dma) for drv_spi_m_enable_rx_dma + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_spi_master.o(i.drv_spi_m_enable_tx_dma) for drv_spi_m_enable_tx_dma + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_dma.o(i.drv_dma_enable_channel_interrupts) for drv_dma_enable_channel_interrupts + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spim_dma_write) refers to drv_spi_master.o(i.drv_spi_m_enable_tx_dma) for drv_spi_m_enable_tx_dma + drv_spi_dma.o(i.drv_spim_dma_write) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_spi_dma.o(i.drv_spim_dma_write) refers to drv_dma.o(i.drv_dma_enable_channel_interrupts) for drv_dma_enable_channel_interrupts + drv_spi_dma.o(i.drv_spim_dma_write) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_spi_dma.o(i.drv_spim_dma_write) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spis_dma_write) refers to drv_spi_slave.o(i.drv_spi_s_enable_tx_dma) for drv_spi_s_enable_tx_dma + drv_spi_dma.o(i.drv_spis_dma_write) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_spi_dma.o(i.drv_spis_dma_write) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_spi_dma.o(i.drv_spis_dma_write) refers to drv_spi_dma.o(.bss) for .bss + drv_spi_master.o(i.app_SPIM_IRQn_Handler) refers to drv_spi_master.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_spi_master.o(i.app_SPIM_IRQn_Handler) refers to drv_spi_master.o(.data) for .data + drv_spi_master.o(i.drv_spi_m_deinit) refers to drv_spi_master.o(i.drv_spi_m_switch_sclk) for drv_spi_m_switch_sclk + drv_spi_master.o(i.drv_spi_m_disable_int) refers to drv_spi_master.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_spi_master.o(i.drv_spi_m_set_intr_callback) refers to drv_spi_master.o(.data) for .data + drv_spi_master.o(i.drv_spi_master_init) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_spi_master.o(i.drv_spi_master_init) refers to drv_common.o(.data) for g_system_clock + drv_swire.o(i.app_SWIRE_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_swire.o(i.app_SWIRE_IRQn_Handler) refers to drv_swire.o(i.drv_swire_set_int) for drv_swire_set_int + drv_swire.o(i.app_SWIRE_IRQn_Handler) refers to drv_swire.o(.data) for .data + drv_swire.o(i.drv_swire_register_callback) refers to drv_swire.o(.data) for .data + drv_swire.o(i.drv_swire_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_swire.o(i.drv_swire_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_lvl_trig) for drv_sys_cfg_sel_ap_rst_lvl_trig + drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) refers to drv_sys_cfg.o(.data) for .data + drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_lvl_trig) for drv_sys_cfg_sel_ap_rst_lvl_trig + drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) refers to drv_sys_cfg.o(.data) for .data + drv_timer.o(i.app_TIMER0_IRQn_Handler) refers to drv_timer.o(i.drv_timer_handle_interrupt) for drv_timer_handle_interrupt + drv_timer.o(i.app_TIMER1_IRQn_Handler) refers to drv_timer.o(i.drv_timer_handle_interrupt) for drv_timer_handle_interrupt + drv_timer.o(i.app_TIMER2_IRQn_Handler) refers to drv_timer.o(i.drv_timer_handle_interrupt) for drv_timer_handle_interrupt + drv_timer.o(i.app_TIMER3_IRQn_Handler) refers to drv_timer.o(i.drv_timer_handle_interrupt) for drv_timer_handle_interrupt + drv_timer.o(i.drv_timer_clear_status_flags) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_clear_status_flags) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_timer.o(i.drv_timer_enable) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_get_instance) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_get_prescaler) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_get_status) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(i.drv_timer_clear_status_flags) for drv_timer_clear_status_flags + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(i.drv_timer_set_compare_val) for drv_timer_set_compare_val + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_register_callback) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_set_compare_val) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_timer.o(i.drv_timer_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_timer.o(i.drv_timer_set_prescaler) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_set_prescaler) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_set_repeat) refers to drv_timer.o(.data) for .data + dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) refers to dcs_packet_fifo.o(.bss) for .bss + dcs_packet_fifo.o(i.dcs_packet_fifo_init) refers to dcs_packet_fifo.o(.bss) for .bss + dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) refers to dcs_packet_fifo.o(.bss) for .bss + dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) refers to dcs_packet_fifo.o(.bss) for .bss + dcs_packet_fifo.o(i.dcs_packet_get_fifo_size) refers to dcs_packet_fifo.o(.bss) for .bss + drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to ffltui.o(.text) for __aeabi_ui2f + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to fdiv.o(.text) for __aeabi_fdiv + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to fmul.o(.text) for __aeabi_fmul + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) for drv_dsi_rx_get_color_bpp + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_color_pcc) for drv_dsi_rx_get_color_pcc + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to fadd.o(.text) for __aeabi_fadd + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to cfrcmple.o(.text) for __aeabi_cfrcmple + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to f2d.o(.text) for __aeabi_f2d + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to dadd.o(.text) for __aeabi_dadd + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to dfixui.o(.text) for __aeabi_d2uiz + drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) refers to ap_demo.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_dsi_rx.o(i.drv_dsi_rx_get_phy_stopstate) refers to ap_demo.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_dsi_rx.o(i.drv_dsi_rx_phy_resistor_calibration) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_dsi_rx.o(i.drv_dsi_rx_phy_resistor_calibration) refers to drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) for drv_rx_phy_test_write_1_byte + drv_dsi_rx.o(i.drv_dsi_rx_phy_resistor_calibration) refers to drv_dsi_rx.o(i.drv_rx_phy_test_read) for drv_rx_phy_test_read + drv_dsi_rx.o(i.drv_dsi_rx_phy_resistor_calibration) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_rx.o(i.drv_dsi_rx_set_lane_swap) refers to drv_chip_info.o(i.drv_chip_info_get_info) for drv_chip_info_get_info + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_phy_common.o(i.drv_phy_get_rate_para) for drv_phy_get_rate_para + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_phy_common.o(i.drv_phy_get_calibration) for drv_phy_get_calibration + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_dsi_rx.o(i.drv_rx_phy_test_clear) for drv_rx_phy_test_clear + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) for drv_rx_phy_test_write_1_byte + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_dsi_rx.o(i.drv_rx_phy_test_write_2_byte) for drv_rx_phy_test_write_2_byte + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_chip_info.o(i.drv_chip_info_get_info) for drv_chip_info_get_info + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_dsi_rx.o(i.drv_rx_phy_test_lock) for drv_rx_phy_test_lock + drv_dsi_rx.o(i.drv_rx_phy_test_clear) refers to drv_phy_common.o(i.drv_phy_test_clear) for drv_phy_test_clear + drv_dsi_rx.o(i.drv_rx_phy_test_lock) refers to drv_phy_common.o(i.drv_phy_test_lock) for drv_phy_test_lock + drv_dsi_rx.o(i.drv_rx_phy_test_read) refers to drv_phy_common.o(i.drv_phy_test_read) for drv_phy_test_read + drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) refers to drv_phy_common.o(i.drv_phy_test_write_1_byte) for drv_phy_test_write_1_byte + drv_dsi_rx.o(i.drv_rx_phy_test_write_2_byte) refers to drv_phy_common.o(i.drv_phy_test_write_2_byte) for drv_phy_test_write_2_byte + drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dsi_tx.o(i.drv_dsi_tx_phy_resistor_calibration) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_dsi_tx.o(i.drv_dsi_tx_phy_resistor_calibration) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) for drv_tx_phy_test_write_1_byte + drv_dsi_tx.o(i.drv_dsi_tx_phy_resistor_calibration) refers to drv_dsi_tx.o(i.drv_tx_phy_test_read) for drv_tx_phy_test_read + drv_dsi_tx.o(i.drv_dsi_tx_phy_resistor_calibration) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) refers to ap_demo.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ulpsactivenot) refers to ap_demo.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_phy_common.o(i.drv_phy_get_rate_para) for drv_phy_get_rate_para + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_phy_common.o(i.drv_phy_get_pll_para) for drv_phy_get_pll_para + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_phy_common.o(i.drv_phy_get_calibration) for drv_phy_get_calibration + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_enter) for drv_tx_phy_test_enter + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_crgu.o(i.drv_crgu_set_mipi_ref_src) for drv_crgu_set_mipi_ref_src + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_crgu.o(i.drv_crgu_set_mipi_cfg_src) for drv_crgu_set_mipi_cfg_src + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_clear) for drv_tx_phy_test_clear + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) for drv_tx_phy_test_write_1_byte + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_2_byte) for drv_tx_phy_test_write_2_byte + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_code) for drv_tx_phy_test_write_code + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_exit) for drv_tx_phy_test_exit + drv_dsi_tx.o(i.drv_dsi_tx_phy_trigger) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) for drv_dsi_tx_phy_status_stopstate + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) for drv_dsi_tx_phy_status_stopstate + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_pll_lock) for drv_dsi_tx_phy_status_pll_lock + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ulpsactivenot) for drv_dsi_tx_phy_status_ulpsactivenot + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ulpsactivenot) for drv_dsi_tx_phy_status_ulpsactivenot + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) for drv_tx_phy_test_write_1_byte + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_pll_lock) for drv_dsi_tx_phy_status_pll_lock + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to drv_dsi_tx.o(i.drv_dsi_tx_version) for drv_dsi_tx_version + drv_dsi_tx.o(i.drv_dsi_tx_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dsi_tx.o(i.drv_dsi_tx_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_dsi_tx.o(i.drv_tx_phy_test_clear) refers to drv_phy_common.o(i.drv_phy_test_clear) for drv_phy_test_clear + drv_dsi_tx.o(i.drv_tx_phy_test_read) refers to drv_phy_common.o(i.drv_phy_test_read) for drv_phy_test_read + drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) refers to drv_phy_common.o(i.drv_phy_test_write_1_byte) for drv_phy_test_write_1_byte + drv_dsi_tx.o(i.drv_tx_phy_test_write_2_byte) refers to drv_phy_common.o(i.drv_phy_test_write_2_byte) for drv_phy_test_write_2_byte + drv_dsi_tx.o(i.drv_tx_phy_test_write_code) refers to drv_phy_common.o(i.drv_phy_test_write_code) for drv_phy_test_write_code + drv_lcdc.o(i.drv_lcdc_config_src_parameter) refers to drv_lcdc.o(i.drv_lcdc_config_input_size) for drv_lcdc_config_input_size + drv_lcdc.o(i.drv_lcdc_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_lcdc.o(i.drv_lcdc_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_memc.o(i.app_MEMC_IRQn_Handler) refers to drv_memc.o(i.drv_memc_get_status) for drv_memc_get_status + drv_memc.o(i.app_MEMC_IRQn_Handler) refers to drv_memc.o(i.drv_memc_clear_status) for drv_memc_clear_status + drv_memc.o(i.app_MEMC_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_memc.o(i.drv_memc_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_memc.o(i.drv_memc_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_rxbr.o(i.app_ADC_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_rxbr.o(i.app_ADC_IRQn_Handler) refers to drv_rxbr.o(.data) for .data + drv_rxbr.o(i.app_VPRE_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_rxbr.o(i.app_VPRE_IRQn_Handler) refers to drv_rxbr.o(.data) for .data + drv_rxbr.o(i.drv_rxbr_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_rxbr.o(i.drv_rxbr_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_rxbr.o(i.drv_rxbr_enable_irq) refers to drv_rxbr.o(i.__NVIC_EnableIRQ) for __NVIC_EnableIRQ + drv_rxbr.o(i.drv_rxbr_enable_irq) refers to drv_rxbr.o(i.__NVIC_DisableIRQ) for __NVIC_DisableIRQ + drv_rxbr.o(i.drv_rxbr_register_irq0_callback) refers to drv_rxbr.o(.data) for .data + drv_rxbr.o(i.drv_rxbr_register_irq1_callback) refers to drv_rxbr.o(.data) for .data + drv_rxbr.o(i.drv_rxbr_set_cmd_filter) refers to ap_demo.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_rxbr.o(i.drv_rxbr_soft_reset) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + drv_vidc.o(i.app_VIDC_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_vidc.o(i.app_VIDC_IRQn_Handler) refers to drv_vidc.o(.data) for .data + drv_vidc.o(i.drv_vidc_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_vidc.o(i.drv_vidc_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_vidc.o(i.drv_vidc_register_callback) refers to drv_vidc.o(.data) for .data + irq_redirect .o(i.ADC_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.AP_NRESET_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.DMA_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT0_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT1_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT2_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT3_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT4_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT5_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT6_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT7_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.FLSCTRL_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.HardFault_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.I2C0_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.I2C1_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.LCDC_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.MEMC_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.MIPI_RX_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.MIPI_TX_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.PWMDET_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.SPIM_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.SPIS_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.SWIRE_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.SysTick_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.TIMER0_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.TIMER1_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.TIMER2_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.TIMER3_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.UART_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.VIDC_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.VPRE_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.WDG_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.handle_init) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.handle_init) refers to drv_common.o(i.app_SysTick_Handler) for app_SysTick_Handler + irq_redirect .o(i.handle_init) refers to hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) for app_LCDC_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) for app_MIPI_RX_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) for app_MIPI_TX_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_dma.o(i.app_dma_irq_handler) for app_dma_irq_handler + irq_redirect .o(i.handle_init) refers to norflash.o(i.app_fls_ctrl_Handler) for app_fls_ctrl_Handler + irq_redirect .o(i.handle_init) refers to drv_i2c_slave.o(i.app_I2C0_IRQn_Handler) for app_I2C0_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_i2c_master.o(i.app_I2C1_IRQn_Handler) for app_I2C1_IRQn_Handler + irq_redirect .o(i.handle_init) refers to hal_spi_slave.o(i.app_SPIS_IRQn_Handler) for app_SPIS_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_spi_master.o(i.app_SPIM_IRQn_Handler) for app_SPIM_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_rxbr.o(i.app_VPRE_IRQn_Handler) for app_VPRE_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_rxbr.o(i.app_ADC_IRQn_Handler) for app_ADC_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_vidc.o(i.app_VIDC_IRQn_Handler) for app_VIDC_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_memc.o(i.app_MEMC_IRQn_Handler) for app_MEMC_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_timer.o(i.app_TIMER0_IRQn_Handler) for app_TIMER0_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_timer.o(i.app_TIMER1_IRQn_Handler) for app_TIMER1_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_timer.o(i.app_TIMER2_IRQn_Handler) for app_TIMER2_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_timer.o(i.app_TIMER3_IRQn_Handler) for app_TIMER3_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_wdg.o(i.app_WDG_IRQn_Handler) for app_WDG_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_uart.o(i.app_UART_IRQn_Handler) for app_UART_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_pwm.o(i.app_PWMDET_IRQn_Handler) for app_PWMDET_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_swire.o(i.app_SWIRE_IRQn_Handler) for app_SWIRE_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) for app_AP_NRESET_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) for app_EXTI_INT0_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) for app_EXTI_INT1_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) for app_EXTI_INT2_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) for app_EXTI_INT3_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) for app_EXTI_INT4_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) for app_EXTI_INT5_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) for app_EXTI_INT6_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) for app_EXTI_INT7_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_common.o(i.app_HardFault_Handler) for app_HardFault_Handler + drv_efuse.o(i.drv_efuse_enter_inactive) refers to drv_efuse.o(i.drv_efuse_int_enable) for drv_efuse_int_enable + drv_efuse.o(i.drv_efuse_read) refers to drv_efuse.o(i.drv_efuse_read_req) for drv_efuse_read_req + drv_efuse.o(i.drv_efuse_write) refers to drv_efuse.o(i.drv_efuse_write_req) for drv_efuse_write_req + drv_phy_common.o(i.drv_phy_enable_calibration) refers to drv_phy_common.o(.data) for .data + drv_phy_common.o(i.drv_phy_get_calibration) refers to drv_chip_info.o(i.drv_chip_info_get_info) for drv_chip_info_get_info + drv_phy_common.o(i.drv_phy_get_calibration) refers to drv_efuse.o(i.drv_efuse_read) for drv_efuse_read + drv_phy_common.o(i.drv_phy_get_calibration) refers to drv_phy_common.o(.data) for .data + drv_phy_common.o(i.drv_phy_get_pll_para) refers to drv_phy_common.o(.constdata) for .constdata + drv_phy_common.o(i.drv_phy_get_rate_para) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_phy_common.o(i.drv_phy_get_rate_para) refers to drv_phy_common.o(.constdata) for .constdata + drv_phy_common.o(i.drv_phy_test_write_1_byte) refers to drv_phy_common.o(i.drv_phy_test_write_code) for drv_phy_test_write_code + drv_phy_common.o(i.drv_phy_test_write_1_byte) refers to drv_phy_common.o(i.drv_phy_test_write_data) for drv_phy_test_write_data + drv_phy_common.o(i.drv_phy_test_write_2_byte) refers to drv_phy_common.o(i.drv_phy_test_write_code) for drv_phy_test_write_code + drv_phy_common.o(i.drv_phy_test_write_2_byte) refers to drv_phy_common.o(i.drv_phy_test_write_data) for drv_phy_test_write_data + drv_chip_info.o(i.drv_chip_info_get_info) refers to drv_chip_info.o(.data) for .data + drv_chip_info.o(i.drv_chip_info_init) refers to drv_efuse.o(i.drv_efuse_enter_inactive) for drv_efuse_enter_inactive + drv_chip_info.o(i.drv_chip_info_init) refers to drv_efuse.o(i.drv_efuse_read) for drv_efuse_read + drv_chip_info.o(i.drv_chip_info_init) refers to drv_chip_info.o(.data) for .data + drv_chip_info.o(i.drv_chip_rx_info_check) refers to printfa.o(i.__0printf) for __2printf + drv_chip_info.o(i.drv_chip_rx_info_check) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_chip_info.o(i.drv_chip_rx_info_check) refers to drv_chip_info.o(.data) for .data + drv_dsc_dec.o(i.drv_dsc_dec_enable) refers to drv_efuse.o(i.drv_efuse_enter_inactive) for drv_efuse_enter_inactive + drv_dsc_dec.o(i.drv_dsc_dec_enable) refers to drv_efuse.o(i.drv_efuse_read) for drv_efuse_read + drv_dsc_dec.o(i.drv_dsc_dec_enable) refers to printfa.o(i.__0printf) for __2printf + tau_log.o(i.LOG_printf) refers to printfa.o(i.__0vsprintf) for vsprintf + tau_log.o(i.LOG_printf) refers to printfa.o(i.__0printf) for __2printf + tau_log.o(i.LOG_printf) refers to tau_log.o(.bss) for .bss + tau_log.o(i.fgetc) refers to hal_uart.o(i.hal_uart_receive_blocking) for hal_uart_receive_blocking + tau_log.o(i.fputc) refers to hal_uart.o(i.hal_uart_transmit_blocking) for hal_uart_transmit_blocking + app_tp_enc.o(i.EncryptCheck) refers to app_tp_enc.o(.data) for .data + hal_spi_slave.o(i.app_SPIS_IRQn_Handler) refers to ap_demo.o(i.__ARM_common_switch8) for __ARM_common_switch8 + hal_spi_slave.o(i.app_SPIS_IRQn_Handler) refers to hal_spi_slave.o(i.__NVIC_SetPriority) for __NVIC_SetPriority + hal_spi_slave.o(i.app_SPIS_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_spi_slave.o(i.app_SPIS_IRQn_Handler) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_s_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_spi_slave.o(i.hal_spi_s_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_init_input) for hal_gpio_init_input + hal_spi_slave.o(i.hal_spi_s_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + hal_spi_slave.o(i.hal_spi_slave_auto_transfer_abort) refers to drv_spi_dma.o(i.drv_spi_abort_dma) for drv_spi_abort_dma + hal_spi_slave.o(i.hal_spi_slave_auto_transfer_start) refers to drv_dma.o(i.drv_dma_enable_cycle) for drv_dma_enable_cycle + hal_spi_slave.o(i.hal_spi_slave_auto_transfer_start) refers to drv_spi_dma.o(i.drv_spis_dma_write) for drv_spis_dma_write + hal_spi_slave.o(i.hal_spi_slave_auto_transfer_start) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_deinit) refers to drv_spi_slave.o(i.drv_spi_s_deinit) for drv_spi_s_deinit + hal_spi_slave.o(i.hal_spi_slave_enable) refers to drv_spi_slave.o(i.drv_spi_s_enable_int) for drv_spi_s_enable_int + hal_spi_slave.o(i.hal_spi_slave_enable) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_spi_slave.o(i.hal_spi_slave_enable) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_gpio_init) refers to drv_spi_slave.o(i.drv_spi_s_gpio_init) for drv_spi_s_gpio_init + hal_spi_slave.o(i.hal_spi_slave_init) refers to hal_spi_slave.o(i.hal_spi_slave_gpio_init) for hal_spi_slave_gpio_init + hal_spi_slave.o(i.hal_spi_slave_init) refers to drv_spi_slave.o(i.drv_spi_slave_init) for drv_spi_slave_init + hal_spi_slave.o(i.hal_spi_slave_init) refers to drv_spi_dma.o(i.drv_spi_dma_init) for drv_spi_dma_init + hal_spi_slave.o(i.hal_spi_slave_init) refers to drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) for drv_spi_set_dma_irq_callback + hal_spi_slave.o(i.hal_spi_slave_init) refers to drv_spi_slave.o(i.drv_spi_s_enable_tx_dma) for drv_spi_s_enable_tx_dma + hal_spi_slave.o(i.hal_spi_slave_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) for drv_sys_cfg_set_dma_tx_req + hal_spi_slave.o(i.hal_spi_slave_init) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_read_data) refers to drv_spi_slave.o(i.drv_spi_s_read_data) for drv_spi_s_read_data + hal_spi_slave.o(i.hal_spi_slave_register_callback) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_reset_tx) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_set_auto_rx_buffer) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_set_auto_tx_buffer) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_write_data) refers to drv_spi_slave.o(i.drv_spi_s_write_data) for drv_spi_s_write_data + norflash.o(i.app_fls_ctrl_Handler) refers to drv_fls.o(i.fls_clr_interrupt_flag) for fls_clr_interrupt_flag + norflash.o(i.app_fls_ctrl_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + norflash.o(i.app_fls_ctrl_Handler) refers to norflash.o(.data) for .data + norflash.o(i.norflash_best_cfg_init) refers to drv_fls.o(i.fls_spi_init) for fls_spi_init + norflash.o(i.norflash_best_cfg_init) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_check_id) refers to norflash.o(i.norflash_read_id) for norflash_read_id + norflash.o(i.norflash_check_id) refers to tau_delay.o(i.delayUs) for delayUs + norflash.o(i.norflash_check_id) refers to norflash.o(.data) for .data + norflash.o(i.norflash_dma_callback) refers to norflash.o(.data) for .data + norflash.o(i.norflash_dma_read) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + norflash.o(i.norflash_dma_read) refers to drv_fls_dma.o(i.fls_transfer_create_handle_dma) for fls_transfer_create_handle_dma + norflash.o(i.norflash_dma_read) refers to drv_fls_dma.o(i.fls_dma_read_prepare) for fls_dma_read_prepare + norflash.o(i.norflash_dma_read) refers to drv_fls_dma.o(i.fls_transfer_dma) for fls_transfer_dma + norflash.o(i.norflash_dma_read) refers to drv_fls_dma.o(i.fls_dma_disable) for fls_dma_disable + norflash.o(i.norflash_dma_read) refers to norflash.o(.data) for .data + norflash.o(i.norflash_dma_read) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_dma_read) refers to norflash.o(i.norflash_dma_callback) for norflash_dma_callback + norflash.o(i.norflash_dma_write) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + norflash.o(i.norflash_dma_write) refers to drv_fls_dma.o(i.fls_transfer_create_handle_dma) for fls_transfer_create_handle_dma + norflash.o(i.norflash_dma_write) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_dma_write) refers to norflash.o(i.norflash_switch_fls_spi) for norflash_switch_fls_spi + norflash.o(i.norflash_dma_write) refers to drv_fls_dma.o(i.fls_dma_write_prepare) for fls_dma_write_prepare + norflash.o(i.norflash_dma_write) refers to drv_fls_dma.o(i.fls_transfer_dma) for fls_transfer_dma + norflash.o(i.norflash_dma_write) refers to drv_fls_dma.o(i.fls_dma_disable) for fls_dma_disable + norflash.o(i.norflash_dma_write) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_dma_write) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_dma_write) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_dma_write) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_dma_write) refers to norflash.o(i.norflash_dma_callback) for norflash_dma_callback + norflash.o(i.norflash_dma_write) refers to norflash.o(.data) for .data + norflash.o(i.norflash_dual_read) refers to drv_fls.o(i.fls_ddat_enable) for fls_ddat_enable + norflash.o(i.norflash_dual_read) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_dual_read) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_dual_write) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_dual_write) refers to norflash.o(i.norflash_switch_fls_spi) for norflash_switch_fls_spi + norflash.o(i.norflash_dual_write) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_dual_write) refers to drv_fls.o(i.fls_ddat_enable) for fls_ddat_enable + norflash.o(i.norflash_dual_write) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_dual_write) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_en4b) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_en4b) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + norflash.o(i.norflash_en4b) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_en4b) refers to norflash.o(i.norflash_read_config_reg) for norflash_read_config_reg + norflash.o(i.norflash_en4b) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_en_quad) refers to norflash.o(i.norflash_en_quad_check) for norflash_en_quad_check + norflash.o(i.norflash_en_quad) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_en_quad) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_en_quad) refers to drv_fls.o(i.fls_busy_pending) for fls_busy_pending + norflash.o(i.norflash_en_quad) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_en_quad_check) refers to norflash.o(i.norflash_get_dual_hstatus) for norflash_get_dual_hstatus + norflash.o(i.norflash_en_quad_check) refers to norflash.o(i.norflash_get_hstatus) for norflash_get_hstatus + norflash.o(i.norflash_en_quad_check) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_en_quad_check) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_erase_block) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_erase_block) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_erase_block) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_erase_block) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_erase_chip) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_erase_chip) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + norflash.o(i.norflash_erase_chip) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_erase_sector) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_erase_sector) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_erase_sector) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_erase_sector) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_ex4b) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_ex4b) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + norflash.o(i.norflash_ex4b) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_ex4b) refers to norflash.o(i.norflash_read_config_reg) for norflash_read_config_reg + norflash.o(i.norflash_ex4b) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_exit_quad) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_exit_quad) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_exit_quad) refers to norflash.o(i.norflash_en_quad_check) for norflash_en_quad_check + norflash.o(i.norflash_exit_quad) refers to drv_fls.o(i.fls_busy_pending) for fls_busy_pending + norflash.o(i.norflash_exit_quad) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_get_dual_hstatus) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_get_dual_hstatus) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_get_dual_hstatus) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_get_hstatus) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_get_hstatus) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_get_hstatus) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_get_status) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_get_status) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_get_status) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_init) refers to drv_fls.o(i.fls_get_default_spi_config) for fls_get_default_spi_config + norflash.o(i.norflash_init) refers to drv_fls.o(i.fls_get_default_fls_config) for fls_get_default_fls_config + norflash.o(i.norflash_init) refers to drv_fls.o(i.fls_get_default_tuning) for fls_get_default_tuning + norflash.o(i.norflash_init) refers to drv_fls.o(i.fls_init) for fls_init + norflash.o(i.norflash_init) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_init) refers to drv_fls.o(.data) for g_fls_tuning + norflash.o(i.norflash_quad_read) refers to drv_fls.o(i.fls_qdat_enable) for fls_qdat_enable + norflash.o(i.norflash_quad_read) refers to drv_fls.o(i.fls_qadr_enable) for fls_qadr_enable + norflash.o(i.norflash_quad_read) refers to drv_fls.o(i.fls_qcmd_enable) for fls_qcmd_enable + norflash.o(i.norflash_quad_read) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_quad_read) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_quad_write) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_quad_write) refers to norflash.o(i.norflash_switch_fls_spi) for norflash_switch_fls_spi + norflash.o(i.norflash_quad_write) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_quad_write) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_quad_write) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_quad_write) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_read) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_read_config_reg) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_read_id) refers to drv_fls.o(i.fls_read_cmd) for fls_read_cmd + norflash.o(i.norflash_read_uid) refers to memseta.o(.text) for __aeabi_memclr4 + norflash.o(i.norflash_read_uid) refers to drv_fls.o(i.fls_read_cmd) for fls_read_cmd + norflash.o(i.norflash_read_uid) refers to memcpya.o(.text) for __aeabi_memcpy + norflash.o(i.norflash_set_best_cfg) refers to memseta.o(.text) for __aeabi_memclr4 + norflash.o(i.norflash_set_best_read_cfg) refers to norflash.o(i.norflash_en_quad) for norflash_en_quad + norflash.o(i.norflash_set_best_read_cfg) refers to norflash.o(.data) for .data + norflash.o(i.norflash_set_best_read_cfg) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_set_best_write_cfg) refers to norflash.o(i.norflash_en_quad) for norflash_en_quad + norflash.o(i.norflash_set_best_write_cfg) refers to norflash.o(.data) for .data + norflash.o(i.norflash_set_best_write_cfg) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_switch_fls_spi) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_switch_fls_spi) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_switch_fls_spi) refers to drv_fls.o(i.fls_ddat_enable) for fls_ddat_enable + norflash.o(i.norflash_switch_fls_spi) refers to drv_fls.o(i.fls_qdat_enable) for fls_qdat_enable + norflash.o(i.norflash_switch_fls_spi) refers to drv_fls.o(i.fls_qadr_enable) for fls_qadr_enable + norflash.o(i.norflash_write) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_write) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_write) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_write) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_write_disable) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + norflash.o(i.norflash_write_disable) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_write_disable) refers to norflash.o(.data) for .data + norflash.o(i.norflash_write_disable) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_write_enable) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + norflash.o(i.norflash_write_enable) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_write_enable) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_write_enable) refers to norflash.o(.data) for .data + norflash.o(i.norflash_write_endian_scr) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_write_endian_scr) refers to norflash.o(i.norflash_big_end_enable) for norflash_big_end_enable + norflash.o(i.norflash_write_endian_scr) refers to drv_fls.o(i.fls_en_scr) for fls_en_scr + norflash.o(i.norflash_write_endian_scr) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_write_endian_scr) refers to norflash.o(i.norflash_big_end_clear) for norflash_big_end_clear + norflash.o(i.norflash_write_endian_scr) refers to drv_fls.o(i.fls_scr_clear) for fls_scr_clear + norflash.o(i.norflash_write_endian_scr) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_write_endian_scr) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + drv_fls_dma.o(i.fls_abort_dma) refers to drv_dma.o(i.drv_dma_abort_transfer) for drv_dma_abort_transfer + drv_fls_dma.o(i.fls_abort_dma) refers to drv_fls_dma.o(i.fls_dma_disable) for fls_dma_disable + drv_fls_dma.o(i.fls_dma_read_prepare) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls_dma.o(i.fls_dma_read_prepare) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls_dma.o(i.fls_dma_read_prepare) refers to drv_fls.o(i.fls_set_read) for fls_set_read + drv_fls_dma.o(i.fls_dma_read_prepare) refers to drv_fls_dma.o(i.fls_dma_enable) for fls_dma_enable + drv_fls_dma.o(i.fls_dma_read_prepare) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls_dma.o(i.fls_dma_write_prepare) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls_dma.o(i.fls_dma_write_prepare) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls_dma.o(i.fls_dma_write_prepare) refers to drv_fls.o(i.fls_set_write) for fls_set_write + drv_fls_dma.o(i.fls_dma_write_prepare) refers to drv_fls_dma.o(i.fls_dma_enable) for fls_dma_enable + drv_fls_dma.o(i.fls_dma_write_prepare) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls_dma.o(i.fls_read_dmacallback) refers to drv_dma.o(i.drv_dma_abort_transfer) for drv_dma_abort_transfer + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to memseta.o(.text) for __aeabi_memclr4 + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to drv_dma.o(i.drv_dma_init) for drv_dma_init + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to drv_dma.o(i.drv_dma_set_callback) for drv_dma_set_callback + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to drv_fls_dma.o(.data) for .data + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to drv_fls_dma.o(i.fls_read_dmacallback) for fls_read_dmacallback + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to drv_fls_dma.o(i.fls_write_dmacallback) for fls_write_dmacallback + drv_fls_dma.o(i.fls_transfer_dma) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_fls_dma.o(i.fls_transfer_dma) refers to drv_dma.o(i.drv_dma_start_transfer) for drv_dma_start_transfer + drv_fls_dma.o(i.fls_transfer_get_receive_count_dma) refers to drv_dma.o(i.drv_dma_get_remaining_bytes) for drv_dma_get_remaining_bytes + drv_fls_dma.o(i.fls_write_dmacallback) refers to drv_dma.o(i.drv_dma_abort_transfer) for drv_dma_abort_transfer + drv_pwm.o(i.app_PWMDET_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_pwm.o(i.app_PWMDET_IRQn_Handler) refers to drv_pwm.o(.data) for .data + drv_pwm.o(i.drv_pwm_in_register_callback) refers to drv_pwm.o(.data) for .data + drv_pwm.o(i.drv_pwm_in_set_sys_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_pwm.o(i.drv_pwm_in_set_sys_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_spi_slave.o(i.drv_spi_s_deinit) refers to drv_spi_slave.o(i.drv_spi_s_switch_sclk) for drv_spi_s_switch_sclk + drv_uart.o(i.UART0_IRQ_Handle) refers to drv_uart.o(i.UART_TransferHandleIRQ) for UART_TransferHandleIRQ + drv_uart.o(i.UART0_IRQ_Handle) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_uart.o(i.UART0_IRQ_Handle) refers to drv_uart.o(.data) for .data + drv_uart.o(i.UART_AbortReceive) refers to drv_uart.o(i.UART_Disable_IT) for UART_Disable_IT + drv_uart.o(i.UART_AbortReceive) refers to drv_uart.o(i.UART_ResetRxFIFO) for UART_ResetRxFIFO + drv_uart.o(i.UART_AbortSend) refers to drv_uart.o(i.UART_Disable_IT) for UART_Disable_IT + drv_uart.o(i.UART_AbortSend) refers to drv_uart.o(i.UART_ResetTxFIFO) for UART_ResetTxFIFO + drv_uart.o(i.UART_Deinit) refers to drv_uart.o(i.UART_SwitchSCLK) for UART_SwitchSCLK + drv_uart.o(i.UART_Disable_IT) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_Disable_IT) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_uart.o(i.UART_Disable_IT) refers to drv_uart.o(.constdata) for .constdata + drv_uart.o(i.UART_EnableDma) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) for drv_sys_cfg_set_dma_rx_req + drv_uart.o(i.UART_EnableDma) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) for drv_sys_cfg_set_dma_tx_req + drv_uart.o(i.UART_Enable_IT) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_Enable_IT) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_uart.o(i.UART_GetDefaultConfig) refers to memseta.o(.text) for __aeabi_memclr4 + drv_uart.o(i.UART_GetDefaultConfig) refers to drv_common.o(.data) for g_system_clock + drv_uart.o(i.UART_GetFIFO_Ctrl) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_GetFIFO_Ctrl) refers to drv_uart.o(.data) for .data + drv_uart.o(i.UART_ResetRxFIFO) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_ResetRxFIFO) refers to drv_uart.o(.data) for .data + drv_uart.o(i.UART_ResetTxFIFO) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_ResetTxFIFO) refers to drv_uart.o(.data) for .data + drv_uart.o(i.UART_SetBaudRate) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_uart.o(i.UART_SwitchSCLK) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_uart.o(i.UART_TransferCreateHandle) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_TransferCreateHandle) refers to memseta.o(.text) for __aeabi_memclr4 + drv_uart.o(i.UART_TransferCreateHandle) refers to drv_uart.o(i.UART_Enable_IT) for UART_Enable_IT + drv_uart.o(i.UART_TransferCreateHandle) refers to drv_uart.o(.data) for .data + drv_uart.o(i.UART_TransferHandleIRQ) refers to drv_uart.o(i.UART_ResetRxFIFO) for UART_ResetRxFIFO + drv_uart.o(i.UART_init) refers to drv_uart.o(i.UART_DisableDma) for UART_DisableDma + drv_uart.o(i.UART_init) refers to drv_uart.o(i.UART_SwitchSCLK) for UART_SwitchSCLK + drv_uart.o(i.UART_init) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_init) refers to drv_uart.o(i.UART_SetBaudRate) for UART_SetBaudRate + drv_uart.o(i.UART_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_uart.o(i.UART_init) refers to drv_uart.o(.data) for .data + drv_uart.o(i.app_UART_IRQn_Handler) refers to drv_uart.o(i.UART0_IRQ_Handle) for UART0_IRQ_Handle + drv_uart_dma.o(i.UART_DMAInit) refers to memseta.o(.text) for __aeabi_memclr4 + drv_uart_dma.o(i.UART_DMAInit) refers to drv_dma.o(i.drv_dma_init) for drv_dma_init + drv_uart_dma.o(i.UART_TransferAbortReceiveDMA) refers to drv_dma.o(i.drv_dma_abort_transfer) for drv_dma_abort_transfer + drv_uart_dma.o(i.UART_TransferAbortSendDMA) refers to drv_dma.o(i.drv_dma_abort_transfer) for drv_dma_abort_transfer + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to memseta.o(.text) for __aeabi_memclr4 + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart.o(i.UART_EnableDma) for UART_EnableDma + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart_dma.o(i.UART_DMAInit) for UART_DMAInit + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_dma.o(i.drv_dma_set_callback) for drv_dma_set_callback + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart_dma.o(.data) for .data + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart_dma.o(i.UART_TransferReceiveDMACallback) for UART_TransferReceiveDMACallback + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart_dma.o(i.UART_TransferSendDMACallback) for UART_TransferSendDMACallback + drv_uart_dma.o(i.UART_TransferGetReceiveCountDMA) refers to drv_dma.o(i.drv_dma_get_remaining_bytes) for drv_dma_get_remaining_bytes + drv_uart_dma.o(i.UART_TransferReceiveDMA) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_uart_dma.o(i.UART_TransferReceiveDMA) refers to drv_uart.o(i.UART_EnableDma) for UART_EnableDma + drv_uart_dma.o(i.UART_TransferReceiveDMA) refers to drv_dma.o(i.drv_dma_start_transfer) for drv_dma_start_transfer + drv_uart_dma.o(i.UART_TransferSendDMA) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_uart_dma.o(i.UART_TransferSendDMA) refers to drv_uart.o(i.UART_EnableDma) for UART_EnableDma + drv_uart_dma.o(i.UART_TransferSendDMA) refers to drv_dma.o(i.drv_dma_start_transfer) for drv_dma_start_transfer + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_wdg.o(i.drv_wdg_set_int) for drv_wdg_set_int + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_wdg.o(i.drv_wdg_clear_counter) for drv_wdg_clear_counter + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_wdg.o(i.drv_wdg_read_edge_flag) for drv_wdg_read_edge_flag + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_wdg.o(i.drv_wdg_clear_edge_flag) for drv_wdg_clear_edge_flag + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_wdg.o(.data) for .data + drv_wdg.o(i.drv_wdg_register_callback) refers to drv_wdg.o(.data) for .data + drv_wdg.o(i.drv_wdg_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_wdg.o(i.drv_wdg_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_wdg.o(i.drv_wdg_set_repeat) refers to drv_wdg.o(.data) for .data + ceil.o(i.__softfp_ceil) refers (Special) to iusefp.o(.text) for __I$use$fp + ceil.o(i.__softfp_ceil) refers to ceil.o(i.ceil) for ceil + ceil.o(i.ceil) refers (Special) to iusefp.o(.text) for __I$use$fp + ceil.o(i.ceil) refers to dadd.o(.text) for __aeabi_dadd + ceil.o(i.ceil) refers to cdrcmple.o(.text) for __aeabi_cdrcmple + sqrt.o(i.__softfp_sqrt) refers (Special) to iusefp.o(.text) for __I$use$fp + sqrt.o(i.__softfp_sqrt) refers to dsqrt.o(.text) for _dsqrt + sqrt.o(i.__softfp_sqrt) refers to errno.o(i.__set_errno) for __set_errno + sqrt.o(i.sqrt) refers (Special) to iusefp.o(.text) for __I$use$fp + sqrt.o(i.sqrt) refers to dsqrt.o(.text) for _dsqrt + sqrt.o(i.sqrt) refers to errno.o(i.__set_errno) for __set_errno + sqrt_x.o(i.____softfp_sqrt$lsc) refers (Special) to iusefp.o(.text) for __I$use$fp + sqrt_x.o(i.____softfp_sqrt$lsc) refers to cdcmple.o(.text) for __aeabi_cdcmple + sqrt_x.o(i.____softfp_sqrt$lsc) refers to errno.o(i.__set_errno) for __set_errno + sqrt_x.o(i.____softfp_sqrt$lsc) refers to dsqrt.o(.text) for _dsqrt + sqrt_x.o(i.__sqrt$lsc) refers (Special) to iusefp.o(.text) for __I$use$fp + sqrt_x.o(i.__sqrt$lsc) refers to cdcmple.o(.text) for __aeabi_cdcmple + sqrt_x.o(i.__sqrt$lsc) refers to errno.o(i.__set_errno) for __set_errno + sqrt_x.o(i.__sqrt$lsc) refers to dsqrt.o(.text) for _dsqrt + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry10a.o(.ARM.Collect$$$$0000000D) for __rt_final_cpp + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry11a.o(.ARM.Collect$$$$0000000F) for __rt_final_exit + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry7b.o(.ARM.Collect$$$$00000008) for _main_clock + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry8b.o(.ARM.Collect$$$$0000000A) for _main_cpp_init + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry9a.o(.ARM.Collect$$$$0000000B) for _main_init + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry5.o(.ARM.Collect$$$$00000004) for _main_scatterload + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry2.o(.ARM.Collect$$$$00000001) for _main_stk + idiv.o(.text) refers to uidiv.o(.text) for __aeabi_uidivmod + printfb.o(i.__0fprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0fprintf$bare) refers to tau_log.o(i.fputc) for fputc + printfb.o(i.__0printf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0printf$bare) refers to tau_log.o(i.fputc) for fputc + printfb.o(i.__0printf$bare) refers to stdout.o(.data) for __stdout + printfb.o(i.__0snprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0snprintf$bare) refers to printfb.o(i._snputc) for _snputc + printfb.o(i.__0sprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0sprintf$bare) refers to printfb.o(i._sputc) for _sputc + printfb.o(i.__0vfprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vfprintf$bare) refers to tau_log.o(i.fputc) for fputc + printfb.o(i.__0vprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vprintf$bare) refers to tau_log.o(i.fputc) for fputc + printfb.o(i.__0vprintf$bare) refers to stdout.o(.data) for __stdout + printfb.o(i.__0vsnprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vsnprintf$bare) refers to printfb.o(i._snputc) for _snputc + printfb.o(i.__0vsprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vsprintf$bare) refers to printfb.o(i._sputc) for _sputc + printf0.o(i.__0fprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0fprintf$0) refers to tau_log.o(i.fputc) for fputc + printf0.o(i.__0printf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0printf$0) refers to tau_log.o(i.fputc) for fputc + printf0.o(i.__0printf$0) refers to stdout.o(.data) for __stdout + printf0.o(i.__0snprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0snprintf$0) refers to printf0.o(i._snputc) for _snputc + printf0.o(i.__0sprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0sprintf$0) refers to printf0.o(i._sputc) for _sputc + printf0.o(i.__0vfprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vfprintf$0) refers to tau_log.o(i.fputc) for fputc + printf0.o(i.__0vprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vprintf$0) refers to tau_log.o(i.fputc) for fputc + printf0.o(i.__0vprintf$0) refers to stdout.o(.data) for __stdout + printf0.o(i.__0vsnprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vsnprintf$0) refers to printf0.o(i._snputc) for _snputc + printf0.o(i.__0vsprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vsprintf$0) refers to printf0.o(i._sputc) for _sputc + printf1.o(i.__0fprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0fprintf$1) refers to tau_log.o(i.fputc) for fputc + printf1.o(i.__0printf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0printf$1) refers to tau_log.o(i.fputc) for fputc + printf1.o(i.__0printf$1) refers to stdout.o(.data) for __stdout + printf1.o(i.__0snprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0snprintf$1) refers to printf1.o(i._snputc) for _snputc + printf1.o(i.__0sprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0sprintf$1) refers to printf1.o(i._sputc) for _sputc + printf1.o(i.__0vfprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vfprintf$1) refers to tau_log.o(i.fputc) for fputc + printf1.o(i.__0vprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vprintf$1) refers to tau_log.o(i.fputc) for fputc + printf1.o(i.__0vprintf$1) refers to stdout.o(.data) for __stdout + printf1.o(i.__0vsnprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vsnprintf$1) refers to printf1.o(i._snputc) for _snputc + printf1.o(i.__0vsprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vsprintf$1) refers to printf1.o(i._sputc) for _sputc + printf1.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printf2.o(i.__0fprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0fprintf$2) refers to tau_log.o(i.fputc) for fputc + printf2.o(i.__0printf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0printf$2) refers to tau_log.o(i.fputc) for fputc + printf2.o(i.__0printf$2) refers to stdout.o(.data) for __stdout + printf2.o(i.__0snprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0snprintf$2) refers to printf2.o(i._snputc) for _snputc + printf2.o(i.__0sprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0sprintf$2) refers to printf2.o(i._sputc) for _sputc + printf2.o(i.__0vfprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vfprintf$2) refers to tau_log.o(i.fputc) for fputc + printf2.o(i.__0vprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vprintf$2) refers to tau_log.o(i.fputc) for fputc + printf2.o(i.__0vprintf$2) refers to stdout.o(.data) for __stdout + printf2.o(i.__0vsnprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vsnprintf$2) refers to printf2.o(i._snputc) for _snputc + printf2.o(i.__0vsprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vsprintf$2) refers to printf2.o(i._sputc) for _sputc + printf3.o(i.__0fprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0fprintf$3) refers to tau_log.o(i.fputc) for fputc + printf3.o(i.__0printf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0printf$3) refers to tau_log.o(i.fputc) for fputc + printf3.o(i.__0printf$3) refers to stdout.o(.data) for __stdout + printf3.o(i.__0snprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0snprintf$3) refers to printf3.o(i._snputc) for _snputc + printf3.o(i.__0sprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0sprintf$3) refers to printf3.o(i._sputc) for _sputc + printf3.o(i.__0vfprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vfprintf$3) refers to tau_log.o(i.fputc) for fputc + printf3.o(i.__0vprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vprintf$3) refers to tau_log.o(i.fputc) for fputc + printf3.o(i.__0vprintf$3) refers to stdout.o(.data) for __stdout + printf3.o(i.__0vsnprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vsnprintf$3) refers to printf3.o(i._snputc) for _snputc + printf3.o(i.__0vsprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vsprintf$3) refers to printf3.o(i._sputc) for _sputc + printf3.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printf4.o(i.__0fprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0fprintf$4) refers to tau_log.o(i.fputc) for fputc + printf4.o(i.__0printf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0printf$4) refers to tau_log.o(i.fputc) for fputc + printf4.o(i.__0printf$4) refers to stdout.o(.data) for __stdout + printf4.o(i.__0snprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0snprintf$4) refers to printf4.o(i._snputc) for _snputc + printf4.o(i.__0sprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0sprintf$4) refers to printf4.o(i._sputc) for _sputc + printf4.o(i.__0vfprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vfprintf$4) refers to tau_log.o(i.fputc) for fputc + printf4.o(i.__0vprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vprintf$4) refers to tau_log.o(i.fputc) for fputc + printf4.o(i.__0vprintf$4) refers to stdout.o(.data) for __stdout + printf4.o(i.__0vsnprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vsnprintf$4) refers to printf4.o(i._snputc) for _snputc + printf4.o(i.__0vsprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vsprintf$4) refers to printf4.o(i._sputc) for _sputc + printf4.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printf5.o(i.__0fprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0fprintf$5) refers to tau_log.o(i.fputc) for fputc + printf5.o(i.__0printf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0printf$5) refers to tau_log.o(i.fputc) for fputc + printf5.o(i.__0printf$5) refers to stdout.o(.data) for __stdout + printf5.o(i.__0snprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0snprintf$5) refers to printf5.o(i._snputc) for _snputc + printf5.o(i.__0sprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0sprintf$5) refers to printf5.o(i._sputc) for _sputc + printf5.o(i.__0vfprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vfprintf$5) refers to tau_log.o(i.fputc) for fputc + printf5.o(i.__0vprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vprintf$5) refers to tau_log.o(i.fputc) for fputc + printf5.o(i.__0vprintf$5) refers to stdout.o(.data) for __stdout + printf5.o(i.__0vsnprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vsnprintf$5) refers to printf5.o(i._snputc) for _snputc + printf5.o(i.__0vsprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vsprintf$5) refers to printf5.o(i._sputc) for _sputc + printf5.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printf6.o(i.__0fprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0fprintf$6) refers to tau_log.o(i.fputc) for fputc + printf6.o(i.__0printf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0printf$6) refers to tau_log.o(i.fputc) for fputc + printf6.o(i.__0printf$6) refers to stdout.o(.data) for __stdout + printf6.o(i.__0snprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0snprintf$6) refers to printf6.o(i._snputc) for _snputc + printf6.o(i.__0sprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0sprintf$6) refers to printf6.o(i._sputc) for _sputc + printf6.o(i.__0vfprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vfprintf$6) refers to tau_log.o(i.fputc) for fputc + printf6.o(i.__0vprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vprintf$6) refers to tau_log.o(i.fputc) for fputc + printf6.o(i.__0vprintf$6) refers to stdout.o(.data) for __stdout + printf6.o(i.__0vsnprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vsnprintf$6) refers to printf6.o(i._snputc) for _snputc + printf6.o(i.__0vsprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vsprintf$6) refers to printf6.o(i._sputc) for _sputc + printf6.o(i._printf_core) refers to printf6.o(i._printf_pre_padding) for _printf_pre_padding + printf6.o(i._printf_core) refers to printf6.o(i._printf_post_padding) for _printf_post_padding + printf6.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printf7.o(i.__0fprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0fprintf$7) refers to tau_log.o(i.fputc) for fputc + printf7.o(i.__0printf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0printf$7) refers to tau_log.o(i.fputc) for fputc + printf7.o(i.__0printf$7) refers to stdout.o(.data) for __stdout + printf7.o(i.__0snprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0snprintf$7) refers to printf7.o(i._snputc) for _snputc + printf7.o(i.__0sprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0sprintf$7) refers to printf7.o(i._sputc) for _sputc + printf7.o(i.__0vfprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vfprintf$7) refers to tau_log.o(i.fputc) for fputc + printf7.o(i.__0vprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vprintf$7) refers to tau_log.o(i.fputc) for fputc + printf7.o(i.__0vprintf$7) refers to stdout.o(.data) for __stdout + printf7.o(i.__0vsnprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vsnprintf$7) refers to printf7.o(i._snputc) for _snputc + printf7.o(i.__0vsprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vsprintf$7) refers to printf7.o(i._sputc) for _sputc + printf7.o(i._printf_core) refers to printf7.o(i._printf_pre_padding) for _printf_pre_padding + printf7.o(i._printf_core) refers to printf7.o(i._printf_post_padding) for _printf_post_padding + printf7.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printf8.o(i.__0fprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0fprintf$8) refers to tau_log.o(i.fputc) for fputc + printf8.o(i.__0printf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0printf$8) refers to tau_log.o(i.fputc) for fputc + printf8.o(i.__0printf$8) refers to stdout.o(.data) for __stdout + printf8.o(i.__0snprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0snprintf$8) refers to printf8.o(i._snputc) for _snputc + printf8.o(i.__0sprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0sprintf$8) refers to printf8.o(i._sputc) for _sputc + printf8.o(i.__0vfprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vfprintf$8) refers to tau_log.o(i.fputc) for fputc + printf8.o(i.__0vprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vprintf$8) refers to tau_log.o(i.fputc) for fputc + printf8.o(i.__0vprintf$8) refers to stdout.o(.data) for __stdout + printf8.o(i.__0vsnprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vsnprintf$8) refers to printf8.o(i._snputc) for _snputc + printf8.o(i.__0vsprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vsprintf$8) refers to printf8.o(i._sputc) for _sputc + printf8.o(i._printf_core) refers to printf8.o(i._printf_pre_padding) for _printf_pre_padding + printf8.o(i._printf_core) refers to printf8.o(i._printf_post_padding) for _printf_post_padding + printf8.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printfa.o(i.__0fprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0fprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0fprintf) refers to tau_log.o(i.fputc) for fputc + printfa.o(i.__0printf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0printf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0printf) refers to tau_log.o(i.fputc) for fputc + printfa.o(i.__0printf) refers to stdout.o(.data) for __stdout + printfa.o(i.__0snprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0snprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0snprintf) refers to printfa.o(i._snputc) for _snputc + printfa.o(i.__0sprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0sprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0sprintf) refers to printfa.o(i._sputc) for _sputc + printfa.o(i.__0vfprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vfprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vfprintf) refers to tau_log.o(i.fputc) for fputc + printfa.o(i.__0vprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vprintf) refers to tau_log.o(i.fputc) for fputc + printfa.o(i.__0vprintf) refers to stdout.o(.data) for __stdout + printfa.o(i.__0vsnprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vsnprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vsnprintf) refers to printfa.o(i._snputc) for _snputc + printfa.o(i.__0vsprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vsprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vsprintf) refers to printfa.o(i._sputc) for _sputc + printfa.o(i._fp_digits) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._fp_digits) refers to dmul.o(.text) for __aeabi_dmul + printfa.o(i._fp_digits) refers to ddiv.o(.text) for __aeabi_ddiv + printfa.o(i._fp_digits) refers to cdrcmple.o(.text) for __aeabi_cdrcmple + printfa.o(i._fp_digits) refers to dadd.o(.text) for __aeabi_dadd + printfa.o(i._fp_digits) refers to dfixul.o(.text) for __aeabi_d2ulz + printfa.o(i._fp_digits) refers to uldiv.o(.text) for __aeabi_uldivmod + printfa.o(i._printf_core) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._printf_core) refers to printfa.o(i._printf_pre_padding) for _printf_pre_padding + printfa.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printfa.o(i._printf_core) refers to printfa.o(i._printf_post_padding) for _printf_post_padding + printfa.o(i._printf_core) refers to printfa.o(i._fp_digits) for _fp_digits + printfa.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printfa.o(i._printf_post_padding) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._printf_pre_padding) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._snputc) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._sputc) refers (Special) to iusefp.o(.text) for __I$use$fp + fadd.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + fadd.o(.text) refers to fepilogue.o(.text) for _float_epilogue + fmul.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + fdiv.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + fdiv.o(.text) refers to fepilogue.o(.text) for _float_round + fscalb.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dadd.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dadd.o(.text) refers to llshl.o(.text) for __aeabi_llsl + dadd.o(.text) refers to llsshr.o(.text) for __aeabi_lasr + dadd.o(.text) refers to depilogue.o(.text) for _double_epilogue + dmul.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dmul.o(.text) refers to depilogue.o(.text) for _double_epilogue + ddiv.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + ddiv.o(.text) refers to depilogue.o(.text) for _double_round + fflti.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + fflti.o(.text) refers to fepilogue.o(.text) for _float_epilogue + ffltui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + ffltui.o(.text) refers to fepilogue.o(.text) for _float_epilogue + dflti.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dflti.o(.text) refers to depilogue.o(.text) for _double_epilogue + dfltui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dfltui.o(.text) refers to depilogue.o(.text) for _double_epilogue + ffixi.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + ffixui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dfixi.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dfixi.o(.text) refers to llushr.o(.text) for __aeabi_llsr + dfixui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dfixui.o(.text) refers to llushr.o(.text) for __aeabi_llsr + f2d.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + cdcmple.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + cfrcmple.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + entry2.o(.ARM.Collect$$$$00000001) refers to entry2.o(.ARM.Collect$$$$00002712) for __lit__00000000 + entry2.o(.ARM.Collect$$$$00002712) refers to startup_armcm0.o(STACK) for __initial_sp + entry2.o(__vectab_stack_and_reset_area) refers to startup_armcm0.o(STACK) for __initial_sp + entry2.o(__vectab_stack_and_reset_area) refers to entry.o(.ARM.Collect$$$$00000000) for __main + entry5.o(.ARM.Collect$$$$00000004) refers to init.o(.text) for __scatterload + entry9a.o(.ARM.Collect$$$$0000000B) refers to main.o(i.main) for main + entry9b.o(.ARM.Collect$$$$0000000C) refers to main.o(i.main) for main + uldiv.o(.text) refers to llushr.o(.text) for __aeabi_llsr + uldiv.o(.text) refers to llshl.o(.text) for __aeabi_llsl + errno.o(i.__aeabi_errno_addr) refers to errno.o(.data) for .data + errno.o(i.__read_errno) refers to errno.o(.data) for .data + errno.o(i.__set_errno) refers to errno.o(.data) for .data + depilogue.o(.text) refers to depilogue.o(i.__ARM_clz) for __ARM_clz + depilogue.o(.text) refers to llshl.o(.text) for __aeabi_llsl + depilogue.o(.text) refers to llushr.o(.text) for __aeabi_llsr + dsqrt.o(.text) refers to llushr.o(.text) for __aeabi_llsr + dsqrt.o(.text) refers to depilogue.o(.text) for _double_round + dfixul.o(.text) refers to llushr.o(.text) for __aeabi_llsr + dfixul.o(.text) refers to llshl.o(.text) for __aeabi_llsl + init.o(.text) refers to entry5.o(.ARM.Collect$$$$00000004) for __main_after_scatterload + + +============================================================================== + +Removing Unused input sections from the image. + + Removing main.o(.rev16_text), (4 bytes). + Removing main.o(.revsh_text), (4 bytes). + Removing ap_demo.o(.rev16_text), (4 bytes). + Removing ap_demo.o(.revsh_text), (4 bytes). + Removing ap_demo.o(.data), (1 bytes). + Removing ap_demo.o(.data), (4 bytes). + Removing app_tp_transfer.o(.rev16_text), (4 bytes). + Removing app_tp_transfer.o(.revsh_text), (4 bytes). + Removing app_tp_transfer.o(i.app_tp_m_transfer_complate), (8 bytes). + Removing app_tp_transfer.o(i.app_tp_phone_reset_on), (12 bytes). + Removing app_tp_transfer.o(i.app_tp_s_transfer_complate), (26 bytes). + Removing app_tp_transfer.o(i.app_tp_screen_init), (48 bytes). + Removing app_tp_transfer.o(.data), (3 bytes). + Removing app_tp_transfer.o(.data), (3 bytes). + Removing app_tp_transfer.o(.data), (5 bytes). + Removing app_tp_transfer.o(.data), (6 bytes). + Removing app_tp_transfer.o(.data), (2 bytes). + Removing app_tp_transfer.o(.data), (3 bytes). + Removing app_tp_transfer.o(.data), (1 bytes). + Removing app_tp_transfer.o(.data), (2 bytes). + Removing app_tp_transfer.o(.data), (2 bytes). + Removing app_tp_st_touch.o(.rev16_text), (4 bytes). + Removing app_tp_st_touch.o(.revsh_text), (4 bytes). + Removing app_tp_st_touch.o(i.ap_tp_st_touch_software_reset), (112 bytes). + Removing board.o(.rev16_text), (4 bytes). + Removing board.o(.revsh_text), (4 bytes). + Removing startup_armcm0.o(HEAP), (3072 bytes). + Removing hal_dsi_rx_ctrl.o(.rev16_text), (4 bytes). + Removing hal_dsi_rx_ctrl.o(.revsh_text), (4 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_ack_long_cmd), (88 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_ack_short_cmd), (28 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video), (228 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_mode_init), (48 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern), (216 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_compressen_en), (16 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_release_handle), (40 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart), (80 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_auto_hw_filter), (28 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk), (44 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter), (108 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_dcs_direct_mode), (8 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_cmd_filter), (40 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pentile_format), (56 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data), (148 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rect_pixel_data), (268 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk), (68 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_te_waveform), (52 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate), (10 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution_ex), (32 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_register_write_cmd_entry), (110 bytes). + Removing hal_dsi_tx_ctrl.o(.rev16_text), (4 bytes). + Removing hal_dsi_tx_ctrl.o(.revsh_text), (4 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic), (148 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_cmd_mode_rcv_te), (10 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard), (280 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker), (172 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_mode_init), (30 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_ulps_mode), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_ulps_mode), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd), (140 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_release_handle), (28 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_cus_pq_filter), (28 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_endianness), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_escape_clock_div), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_lp_cmd), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data), (272 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg), (80 bytes). + Removing hal_gpio.o(.rev16_text), (4 bytes). + Removing hal_gpio.o(.revsh_text), (4 bytes). + Removing hal_gpio.o(i.hal_gpio_get_int_type), (20 bytes). + Removing hal_gpio.o(i.hal_gpio_get_pull_state), (32 bytes). + Removing hal_gpio.o(i.hal_gpio_set_driving_strength), (32 bytes). + Removing hal_gpio.o(i.hal_gpio_set_output_data_ex), (36 bytes). + Removing hal_gpio.o(i.hal_gpio_set_schmitt_trigger), (32 bytes). + Removing hal_gpio.o(i.hal_gpio_set_slew_rate), (32 bytes). + Removing hal_i2c_master.o(.rev16_text), (4 bytes). + Removing hal_i2c_master.o(.revsh_text), (4 bytes). + Removing hal_i2c_master.o(i.hal_i2c_m_deinit), (8 bytes). + Removing hal_i2c_master.o(i.hal_i2c_m_set_high_impedance), (46 bytes). + Removing hal_i2c_slave.o(.rev16_text), (4 bytes). + Removing hal_i2c_slave.o(.revsh_text), (4 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_deinit), (88 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_get_tx_byte_num), (12 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_read_complate), (12 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_read_complate_clear), (12 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_read_data), (32 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_rxfifo_notempty), (40 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_sel), (12 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_set_dma_tx_cycle), (36 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_set_high_impedance), (88 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_write_complate), (12 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_write_data), (32 bytes). + Removing hal_spi_master.o(.rev16_text), (4 bytes). + Removing hal_spi_master.o(.revsh_text), (4 bytes). + Removing hal_spi_master.o(i.hal_spi_m_callback), (24 bytes). + Removing hal_spi_master.o(i.hal_spi_m_deinit), (10 bytes). + Removing hal_spi_master.o(i.hal_spi_m_dma_init), (104 bytes). + Removing hal_spi_master.o(i.hal_spi_m_dma_read), (36 bytes). + Removing hal_spi_master.o(i.hal_spi_m_dma_write), (40 bytes). + Removing hal_spi_master.o(i.hal_spi_m_get_transfer_complate), (36 bytes). + Removing hal_spi_master.o(i.hal_spi_m_gpio_init), (8 bytes). + Removing hal_spi_master.o(i.hal_spi_m_read_rxfifo), (28 bytes). + Removing hal_spi_master.o(i.hal_spi_m_set_high_impedance), (100 bytes). + Removing hal_spi_master.o(.data), (1 bytes). + Removing hal_swire.o(.rev16_text), (4 bytes). + Removing hal_swire.o(.revsh_text), (4 bytes). + Removing hal_swire.o(i.hal_swire_deinit), (18 bytes). + Removing hal_swire.o(i.hal_swire_init), (32 bytes). + Removing hal_swire.o(i.hal_swire_register_callback), (10 bytes). + Removing hal_swire.o(i.hal_swire_start), (108 bytes). + Removing hal_system.o(.rev16_text), (4 bytes). + Removing hal_system.o(.revsh_text), (4 bytes). + Removing hal_system.o(i.hal_system_clear_debug_state), (10 bytes). + Removing hal_system.o(i.hal_system_deep_sleep_mode), (8 bytes). + Removing hal_system.o(i.hal_system_disable_systick), (8 bytes). + Removing hal_system.o(i.hal_system_get_debug_state), (8 bytes). + Removing hal_system.o(i.hal_system_get_tick), (8 bytes). + Removing hal_system.o(i.hal_system_idle_mode), (8 bytes). + Removing hal_system.o(i.hal_system_register_systick_cb), (8 bytes). + Removing hal_system.o(i.hal_system_reset_chip), (32 bytes). + Removing hal_system.o(i.hal_system_share_flash_mode), (20 bytes). + Removing hal_system.o(i.hal_system_sleep_mode), (48 bytes). + Removing hal_timer.o(.rev16_text), (4 bytes). + Removing hal_timer.o(.revsh_text), (4 bytes). + Removing hal_timer.o(i.hal_timer_deinit), (46 bytes). + Removing hal_timer.o(i.hal_timer_get_status), (8 bytes). + Removing hal_timer.o(i.hal_timer_set_repeat), (8 bytes). + Removing hal_timer.o(i.hal_timer_start_ex), (72 bytes). + Removing tau_delay.o(.rev16_text), (4 bytes). + Removing tau_delay.o(.revsh_text), (4 bytes). + Removing app_tp_for_custom_s8.o(.rev16_text), (4 bytes). + Removing app_tp_for_custom_s8.o(.revsh_text), (4 bytes). + Removing app_tp_for_custom_s8.o(i.app_tp_screen_analysis_const), (56 bytes). + Removing app_tp_for_custom_s8.o(.bss), (200 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (37 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (1 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (3 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (3 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (1 bytes). + Removing app_tp_for_custom_s8.o(.data), (11 bytes). + Removing app_tp_for_custom_s8.o(.data), (10 bytes). + Removing app_tp_for_custom_s8.o(.data), (1 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (1 bytes). + Removing app_tp_for_custom_s8.o(.data), (1 bytes). + Removing app_tp_for_custom_s8.o(.data), (64 bytes). + Removing app_tp_for_custom_s8.o(.data), (3 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (1 bytes). + Removing app_tp_for_custom_s8.o(.data), (32 bytes). + Removing app_tp_for_custom_s8.o(.data), (1 bytes). + Removing hal_uart.o(.rev16_text), (4 bytes). + Removing hal_uart.o(.revsh_text), (4 bytes). + Removing hal_uart.o(i.hal_uart_deinit), (28 bytes). + Removing hal_uart.o(i.hal_uart_dmacallback), (36 bytes). + Removing hal_uart.o(i.hal_uart_receive_blocking), (16 bytes). + Removing hal_uart.o(i.hal_uart_receive_dma), (76 bytes). + Removing hal_uart.o(i.hal_uart_transmit_dma), (76 bytes). + Removing hal_internal_vsync.o(.rev16_text), (4 bytes). + Removing hal_internal_vsync.o(.revsh_text), (4 bytes). + Removing hal_internal_vsync.o(i.hal_internal_sync_cmd_mode_rcv_te), (168 bytes). + Removing hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex), (468 bytes). + Removing hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual), (528 bytes). + Removing hal_internal_vsync.o(i.hal_internal_vsync_register_write_cmd_entry), (12 bytes). + Removing hal_internal_vsync.o(i.hal_internal_vsync_set_dcs_direct_mode), (48 bytes). + Removing hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate), (680 bytes). + Removing hal_internal_vsync.o(i.hal_internal_vsync_update_lcdc_addr), (48 bytes). + Removing hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler), (476 bytes). + Removing drv_common.o(.rev16_text), (4 bytes). + Removing drv_common.o(.revsh_text), (4 bytes). + Removing drv_common.o(i.drv_common_disable_systick), (20 bytes). + Removing drv_common.o(i.drv_common_get_tick), (12 bytes). + Removing drv_common.o(i.drv_common_idle_mode), (40 bytes). + Removing drv_common.o(i.drv_common_systick_register_cb), (12 bytes). + Removing drv_crgu.o(.rev16_text), (4 bytes). + Removing drv_crgu.o(.revsh_text), (4 bytes). + Removing drv_crgu.o(i.drv_crgu_clear_all_reset_flags), (12 bytes). + Removing drv_crgu.o(i.drv_crgu_clear_reset_flag), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_config_clocks), (16 bytes). + Removing drv_crgu.o(i.drv_crgu_config_clocks_div), (16 bytes). + Removing drv_crgu.o(i.drv_crgu_config_clocks_src), (16 bytes). + Removing drv_crgu.o(i.drv_crgu_get_ana_clk_status), (24 bytes). + Removing drv_crgu.o(i.drv_crgu_get_clocks), (12 bytes). + Removing drv_crgu.o(i.drv_crgu_get_fpga_id), (12 bytes). + Removing drv_crgu.o(i.drv_crgu_get_mipi_ref_src), (16 bytes). + Removing drv_crgu.o(i.drv_crgu_get_reset_flag), (24 bytes). + Removing drv_crgu.o(i.drv_crgu_get_system_clk), (28 bytes). + Removing drv_crgu.o(i.drv_crgu_reset_chip), (12 bytes). + Removing drv_crgu.o(i.drv_crgu_set_200m_scan_src), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_300m_scan_src), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_abp0_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_adc_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_adc_src), (24 bytes). + Removing drv_crgu.o(i.drv_crgu_set_apb1_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_apb2_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_fls_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_fls_src), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_monitor_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_monitor_src), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_swire_div), (20 bytes). + Removing drv_dma.o(.rev16_text), (4 bytes). + Removing drv_dma.o(.revsh_text), (4 bytes). + Removing drv_dma.o(i.drv_dma_abort_transfer), (32 bytes). + Removing drv_dma.o(i.drv_dma_ahb_init), (74 bytes). + Removing drv_dma.o(i.drv_dma_channel_is_active), (20 bytes). + Removing drv_dma.o(i.drv_dma_deinit), (32 bytes). + Removing drv_dma.o(i.drv_dma_disenable_channel_interrupts), (24 bytes). + Removing drv_dma.o(i.drv_dma_enable_cycle), (44 bytes). + Removing drv_dma.o(i.drv_dma_get_remaining_bytes), (32 bytes). + Removing drv_dma.o(i.drv_dma_init), (24 bytes). + Removing drv_dma.o(i.drv_dma_m2m_init), (72 bytes). + Removing drv_dma.o(i.drv_dma_reset), (10 bytes). + Removing drv_dma.o(i.drv_dma_set_ccr), (114 bytes). + Removing drv_dma.o(i.drv_dma_start_transfer), (32 bytes). + Removing drv_fls.o(.rev16_text), (4 bytes). + Removing drv_fls.o(.revsh_text), (4 bytes). + Removing drv_fls.o(i.__NVIC_DisableIRQ), (32 bytes). + Removing drv_fls.o(i.drv_fls_gpio_connect), (28 bytes). + Removing drv_fls.o(i.drv_fls_gpio_disconnect), (32 bytes). + Removing drv_fls.o(i.fls_EnableClk), (12 bytes). + Removing drv_fls.o(i.fls_busy_pending), (12 bytes). + Removing drv_fls.o(i.fls_clear_irq_status), (6 bytes). + Removing drv_fls.o(i.fls_ctrl_cfg_init), (72 bytes). + Removing drv_fls.o(i.fls_ddat_enable), (24 bytes). + Removing drv_fls.o(i.fls_de_init), (52 bytes). + Removing drv_fls.o(i.fls_descr), (10 bytes). + Removing drv_fls.o(i.fls_disable_it), (36 bytes). + Removing drv_fls.o(i.fls_en_scr), (10 bytes). + Removing drv_fls.o(i.fls_enable_it), (48 bytes). + Removing drv_fls.o(i.fls_get_crcout), (4 bytes). + Removing drv_fls.o(i.fls_get_default_fls_config), (20 bytes). + Removing drv_fls.o(i.fls_get_default_spi_config), (44 bytes). + Removing drv_fls.o(i.fls_get_default_tuning), (12 bytes). + Removing drv_fls.o(i.fls_get_tuning), (18 bytes). + Removing drv_fls.o(i.fls_init), (62 bytes). + Removing drv_fls.o(i.fls_qadr_enable), (22 bytes). + Removing drv_fls.o(i.fls_qcmd_enable), (22 bytes). + Removing drv_fls.o(i.fls_qdat_enable), (22 bytes). + Removing drv_fls.o(i.fls_read_byte_data), (130 bytes). + Removing drv_fls.o(i.fls_read_cmd), (104 bytes). + Removing drv_fls.o(i.fls_read_cmd_it), (110 bytes). + Removing drv_fls.o(i.fls_reset_crc), (18 bytes). + Removing drv_fls.o(i.fls_scr_clear), (10 bytes). + Removing drv_fls.o(i.fls_set_addr_dummy), (32 bytes). + Removing drv_fls.o(i.fls_set_addr_len), (32 bytes). + Removing drv_fls.o(i.fls_set_mc_irq_mask), (26 bytes). + Removing drv_fls.o(i.fls_set_read), (10 bytes). + Removing drv_fls.o(i.fls_set_tuning), (24 bytes). + Removing drv_fls.o(i.fls_set_write), (10 bytes). + Removing drv_fls.o(i.fls_single_mode), (16 bytes). + Removing drv_fls.o(i.fls_spi_init), (180 bytes). + Removing drv_fls.o(i.fls_spi_start), (10 bytes). + Removing drv_fls.o(i.fls_swrst), (18 bytes). + Removing drv_fls.o(i.fls_write_byte_data), (164 bytes). + Removing drv_fls.o(i.fls_write_cmd), (58 bytes). + Removing drv_fls.o(.data), (4 bytes). + Removing drv_gpio.o(.rev16_text), (4 bytes). + Removing drv_gpio.o(.revsh_text), (4 bytes). + Removing drv_gpio.o(i.drv_gpio_get_pull_state), (224 bytes). + Removing drv_gpio.o(i.drv_gpio_set_driving_strength), (312 bytes). + Removing drv_gpio.o(i.drv_gpio_set_schmitt_trigger), (168 bytes). + Removing drv_gpio.o(i.drv_gpio_set_slew_rate), (168 bytes). + Removing drv_i2c_dma.o(.rev16_text), (4 bytes). + Removing drv_i2c_dma.o(.revsh_text), (4 bytes). + Removing drv_i2c_master.o(.rev16_text), (4 bytes). + Removing drv_i2c_master.o(.revsh_text), (4 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_bus_init), (36 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_deinit), (44 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_disable_intr), (16 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_get_fifo_status), (28 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_read_data), (32 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_set_fifo_threshold), (24 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_set_sys_mask), (48 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_write_data), (32 bytes). + Removing drv_i2c_slave.o(.rev16_text), (4 bytes). + Removing drv_i2c_slave.o(.revsh_text), (4 bytes). + Removing drv_i2c_slave.o(i.drv_i2c_s_read_data), (30 bytes). + Removing drv_i2c_slave.o(i.drv_i2c_s_set_fifo_threshold), (16 bytes). + Removing drv_param_init.o(.rev16_text), (4 bytes). + Removing drv_param_init.o(.revsh_text), (4 bytes). + Removing drv_param_init.o(i.drv_param_init_set_scld_filter), (100 bytes). + Removing drv_param_init.o(i.drv_param_init_set_sclu_filter), (28 bytes). + Removing drv_pwr.o(.rev16_text), (4 bytes). + Removing drv_pwr.o(.revsh_text), (4 bytes). + Removing drv_pwr.o(i.drv_pwr_enter_deep_sleep_mode), (44 bytes). + Removing drv_pwr.o(i.drv_pwr_set_frame_buff_pd), (28 bytes). + Removing drv_spi_dma.o(.rev16_text), (4 bytes). + Removing drv_spi_dma.o(.revsh_text), (4 bytes). + Removing drv_spi_dma.o(i.__NVIC_ClearPendingIRQ), (24 bytes). + Removing drv_spi_dma.o(i.drv_spi_abort_dma), (108 bytes). + Removing drv_spi_dma.o(i.drv_spi_dma_callback), (60 bytes). + Removing drv_spi_dma.o(i.drv_spi_dma_ch6_init), (208 bytes). + Removing drv_spi_dma.o(i.drv_spi_dma_init), (220 bytes). + Removing drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback), (48 bytes). + Removing drv_spi_dma.o(i.drv_spi_set_dma_irq_callback), (88 bytes). + Removing drv_spi_dma.o(i.drv_spim_dma_read), (96 bytes). + Removing drv_spi_dma.o(i.drv_spim_dma_write), (60 bytes). + Removing drv_spi_dma.o(i.drv_spis_dma_write), (72 bytes). + Removing drv_spi_dma.o(.bss), (480 bytes). + Removing drv_spi_dma.o(.data), (16 bytes). + Removing drv_spi_master.o(.rev16_text), (4 bytes). + Removing drv_spi_master.o(.revsh_text), (4 bytes). + Removing drv_spi_master.o(i.drv_spi_m_deinit), (40 bytes). + Removing drv_spi_master.o(i.drv_spi_m_disable_int), (68 bytes). + Removing drv_spi_master.o(i.drv_spi_m_enable_int), (72 bytes). + Removing drv_spi_master.o(i.drv_spi_m_enable_rx_dma), (32 bytes). + Removing drv_spi_master.o(i.drv_spi_m_enable_tx_dma), (28 bytes). + Removing drv_spi_master.o(i.drv_spi_m_get_dma_address), (8 bytes). + Removing drv_spi_master.o(i.drv_spi_m_gpio_init), (32 bytes). + Removing drv_spi_master.o(i.drv_spi_m_set_intr_callback), (12 bytes). + Removing drv_spi_master.o(i.drv_spi_m_switch_sclk), (28 bytes). + Removing drv_spi_master.o(i.drv_spi_m_write_data), (44 bytes). + Removing drv_spi_master.o(i.drv_spi_master_init), (164 bytes). + Removing drv_swire.o(.rev16_text), (4 bytes). + Removing drv_swire.o(.revsh_text), (4 bytes). + Removing drv_swire.o(i.drv_swire_enable), (28 bytes). + Removing drv_swire.o(i.drv_swire_register_callback), (12 bytes). + Removing drv_swire.o(i.drv_swire_set_bit_time), (24 bytes). + Removing drv_swire.o(i.drv_swire_set_pulse_count), (12 bytes). + Removing drv_sys_cfg.o(.rev16_text), (4 bytes). + Removing drv_sys_cfg.o(.revsh_text), (4 bytes). + Removing drv_sys_cfg.o(i.drv_sys_cfg_dma_req_mask), (32 bytes). + Removing drv_sys_cfg.o(i.drv_sys_cfg_read_version0_id), (12 bytes). + Removing drv_sys_cfg.o(i.drv_sys_cfg_set_ap_reset), (28 bytes). + Removing drv_timer.o(.rev16_text), (4 bytes). + Removing drv_timer.o(.revsh_text), (4 bytes). + Removing drv_timer.o(i.drv_timer_get_status), (38 bytes). + Removing drv_timer.o(i.drv_timer_set_repeat), (16 bytes). + Removing dcs_packet_fifo.o(i.dcs_packet_get_fifo_size), (16 bytes). + Removing drv_dsi_rx.o(.rev16_text), (4 bytes). + Removing drv_dsi_rx.o(.revsh_text), (4 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_get_phy_stopstate), (66 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_get_version), (4 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_phy_resistor_calibration), (236 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_pg_cfg), (32 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_pg_cfg), (48 bytes). + Removing drv_dsi_rx.o(i.drv_rx_phy_test_read), (12 bytes). + Removing drv_dsi_tx.o(.rev16_text), (4 bytes). + Removing drv_dsi_tx.o(.revsh_text), (4 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_command_get_payload), (4 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_force_interrupt), (8 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_get_phy_status), (6 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_forcepll), (12 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_resistor_calibration), (232 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_start), (18 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_status_pll_lock), (10 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ulpsactivenot), (62 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_trigger), (92 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter), (344 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit), (276 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_sdf_3d), (28 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_set_bta), (22 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_set_vpg), (70 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_version), (4 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_vid_shadow), (16 bytes). + Removing drv_dsi_tx.o(i.drv_tx_phy_test_read), (10 bytes). + Removing drv_lcdc.o(.rev16_text), (4 bytes). + Removing drv_lcdc.o(.revsh_text), (4 bytes). + Removing drv_lcdc.o(i.drv_lcdc_config_rgb_to_pentile), (6 bytes). + Removing drv_lcdc.o(i.drv_lcdc_enable), (42 bytes). + Removing drv_lcdc.o(i.drv_lcdc_update_shadow_reg), (12 bytes). + Removing drv_memc.o(.rev16_text), (4 bytes). + Removing drv_memc.o(.revsh_text), (4 bytes). + Removing drv_memc.o(i.drv_memc_set_db_frm_time), (14 bytes). + Removing drv_memc.o(i.drv_memc_set_db_int_frame), (28 bytes). + Removing drv_memc.o(i.drv_memc_set_fb_remaining_line_trigger), (12 bytes). + Removing drv_memc.o(i.drv_memc_set_read_trigger_line), (16 bytes). + Removing drv_memc.o(i.drv_memc_set_te_ind), (16 bytes). + Removing drv_memc.o(i.drv_memc_set_tear_hwclr), (16 bytes). + Removing drv_memc.o(i.drv_memc_set_vidc_fb_arb), (14 bytes). + Removing drv_memc.o(i.drv_memc_set_write_trigger_line), (16 bytes). + Removing drv_rxbr.o(.rev16_text), (4 bytes). + Removing drv_rxbr.o(.revsh_text), (4 bytes). + Removing drv_rxbr.o(i.drv_rxbr_dsc_flush), (16 bytes). + Removing drv_rxbr.o(i.drv_rxbr_get_cur_hline_rcv_cnt), (8 bytes). + Removing drv_rxbr.o(i.drv_rxbr_get_ipi_vsync_interval), (8 bytes). + Removing drv_rxbr.o(i.drv_rxbr_get_pix_fmt), (8 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_col_addr), (4 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_compress), (24 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_page_addr), (4 bytes). + Removing drv_rxbr.o(i.drv_rxbr_soft_reset), (98 bytes). + Removing drv_vidc.o(.rev16_text), (4 bytes). + Removing drv_vidc.o(.revsh_text), (4 bytes). + Removing drv_vidc.o(i.drv_vidc_clear_status0), (14 bytes). + Removing drv_vidc.o(i.drv_vidc_debug_cap_pixel), (24 bytes). + Removing drv_vidc.o(i.drv_vidc_debug_signal_frame), (30 bytes). + Removing drv_vidc.o(i.drv_vidc_get_int_source), (38 bytes). + Removing drv_vidc.o(i.drv_vidc_get_status0), (20 bytes). + Removing drv_vidc.o(i.drv_vidc_get_status1), (20 bytes). + Removing drv_vidc.o(i.drv_vidc_get_status2), (6 bytes). + Removing drv_vidc.o(i.drv_vidc_set_dsc_thresh), (4 bytes). + Removing drv_vidc.o(i.drv_vidc_set_frmst_latency), (12 bytes). + Removing drv_vidc.o(i.drv_vidc_set_inff_thresh), (4 bytes). + Removing drv_vidc.o(i.drv_vidc_set_irq_line), (20 bytes). + Removing drv_vidc.o(i.drv_vidc_set_module_enable), (20 bytes). + Removing drv_vidc.o(i.drv_vidc_set_outff_thresh), (4 bytes). + Removing drv_vidc.o(i.drv_vidc_update_src_format), (14 bytes). + Removing irq_redirect .o(.rev16_text), (4 bytes). + Removing irq_redirect .o(.revsh_text), (4 bytes). + Removing drv_efuse.o(.rev16_text), (4 bytes). + Removing drv_efuse.o(.revsh_text), (4 bytes). + Removing drv_efuse.o(i.drv_efuse_crc_cal), (128 bytes). + Removing drv_efuse.o(i.drv_efuse_get_default_config), (26 bytes). + Removing drv_efuse.o(i.drv_efuse_int_disable), (12 bytes). + Removing drv_efuse.o(i.drv_efuse_write), (46 bytes). + Removing drv_efuse.o(i.drv_efuse_write_req), (22 bytes). + Removing drv_phy_common.o(.rev16_text), (4 bytes). + Removing drv_phy_common.o(.revsh_text), (4 bytes). + Removing drv_phy_common.o(i.drv_phy_test_read), (8 bytes). + Removing drv_chip_info.o(.rev16_text), (4 bytes). + Removing drv_chip_info.o(.revsh_text), (4 bytes). + Removing drv_dsc_dec.o(.rev16_text), (4 bytes). + Removing drv_dsc_dec.o(.revsh_text), (4 bytes). + Removing drv_dsc_dec.o(i.drv_dsc_dec_set_u32_pps), (120 bytes). + Removing tau_log.o(.rev16_text), (4 bytes). + Removing tau_log.o(.revsh_text), (4 bytes). + Removing tau_log.o(i.fgetc), (22 bytes). + Removing app_tp_enc.o(.rev16_text), (4 bytes). + Removing app_tp_enc.o(.revsh_text), (4 bytes). + Removing hal_spi_slave.o(.rev16_text), (4 bytes). + Removing hal_spi_slave.o(.revsh_text), (4 bytes). + Removing hal_spi_slave.o(i.hal_spi_s_set_high_impedance), (100 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_auto_transfer_abort), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_auto_transfer_start), (56 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_busy), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_deinit), (10 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_disable), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_enable), (96 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_flush_fifo), (20 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_get_rxfifo_notempty), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_gpio_init), (8 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_init), (76 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_read_data), (10 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_register_callback), (12 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_reset_tx), (68 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_set_auto_rx_buffer), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_set_auto_tx_buffer), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_write_data), (14 bytes). + Removing norflash.o(.rev16_text), (4 bytes). + Removing norflash.o(.revsh_text), (4 bytes). + Removing norflash.o(i.norflash_best_cfg_init), (44 bytes). + Removing norflash.o(i.norflash_big_end_clear), (14 bytes). + Removing norflash.o(i.norflash_big_end_enable), (20 bytes). + Removing norflash.o(i.norflash_check_crc32), (14 bytes). + Removing norflash.o(i.norflash_check_id), (72 bytes). + Removing norflash.o(i.norflash_dma_callback), (24 bytes). + Removing norflash.o(i.norflash_dma_read), (156 bytes). + Removing norflash.o(i.norflash_dma_write), (252 bytes). + Removing norflash.o(i.norflash_dual_read), (60 bytes). + Removing norflash.o(i.norflash_dual_write), (112 bytes). + Removing norflash.o(i.norflash_en4b), (40 bytes). + Removing norflash.o(i.norflash_en_quad), (116 bytes). + Removing norflash.o(i.norflash_en_quad_check), (64 bytes). + Removing norflash.o(i.norflash_erase_block), (44 bytes). + Removing norflash.o(i.norflash_erase_chip), (28 bytes). + Removing norflash.o(i.norflash_erase_sector), (44 bytes). + Removing norflash.o(i.norflash_ex4b), (40 bytes). + Removing norflash.o(i.norflash_exit_quad), (76 bytes). + Removing norflash.o(i.norflash_get_dual_hstatus), (52 bytes). + Removing norflash.o(i.norflash_get_hstatus), (52 bytes). + Removing norflash.o(i.norflash_get_status), (52 bytes). + Removing norflash.o(i.norflash_init), (48 bytes). + Removing norflash.o(i.norflash_quad_read), (76 bytes). + Removing norflash.o(i.norflash_quad_write), (108 bytes). + Removing norflash.o(i.norflash_read), (28 bytes). + Removing norflash.o(i.norflash_read_config_reg), (36 bytes). + Removing norflash.o(i.norflash_read_id), (20 bytes). + Removing norflash.o(i.norflash_read_uid), (52 bytes). + Removing norflash.o(i.norflash_reset), (2 bytes). + Removing norflash.o(i.norflash_reset_crc32), (32 bytes). + Removing norflash.o(i.norflash_set_best_cfg), (50 bytes). + Removing norflash.o(i.norflash_set_best_read_cfg), (84 bytes). + Removing norflash.o(i.norflash_set_best_write_cfg), (84 bytes). + Removing norflash.o(i.norflash_switch_fls_spi), (112 bytes). + Removing norflash.o(i.norflash_write), (96 bytes). + Removing norflash.o(i.norflash_write_disable), (64 bytes). + Removing norflash.o(i.norflash_write_enable), (56 bytes). + Removing norflash.o(i.norflash_write_endian_scr), (132 bytes). + Removing norflash.o(.bss), (412 bytes). + Removing norflash.o(.bss), (32 bytes). + Removing norflash.o(.data), (2 bytes). + Removing drv_fls_dma.o(.rev16_text), (4 bytes). + Removing drv_fls_dma.o(.revsh_text), (4 bytes). + Removing drv_fls_dma.o(i.fls_abort_dma), (42 bytes). + Removing drv_fls_dma.o(i.fls_dma_disable), (10 bytes). + Removing drv_fls_dma.o(i.fls_dma_enable), (10 bytes). + Removing drv_fls_dma.o(i.fls_dma_read_prepare), (86 bytes). + Removing drv_fls_dma.o(i.fls_dma_write_prepare), (82 bytes). + Removing drv_fls_dma.o(i.fls_read_dmacallback), (32 bytes). + Removing drv_fls_dma.o(i.fls_transfer_create_handle_dma), (208 bytes). + Removing drv_fls_dma.o(i.fls_transfer_dma), (112 bytes). + Removing drv_fls_dma.o(i.fls_transfer_get_receive_count_dma), (44 bytes). + Removing drv_fls_dma.o(i.fls_write_dmacallback), (32 bytes). + Removing drv_fls_dma.o(.data), (8 bytes). + Removing drv_pwm.o(.rev16_text), (4 bytes). + Removing drv_pwm.o(.revsh_text), (4 bytes). + Removing drv_pwm.o(i.drv_pwm_in_clear_pwm_int_all), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_in_enable), (32 bytes). + Removing drv_pwm.o(i.drv_pwm_in_get_counter_period), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_in_get_current_count), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_in_get_high_period), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_in_get_low_period), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_in_register_callback), (24 bytes). + Removing drv_pwm.o(i.drv_pwm_in_set_pwm_int), (32 bytes). + Removing drv_pwm.o(i.drv_pwm_in_set_sys_int), (64 bytes). + Removing drv_pwm.o(i.drv_pwm_out_enable), (32 bytes). + Removing drv_pwm.o(i.drv_pwm_out_get_sync_flag), (16 bytes). + Removing drv_pwm.o(i.drv_pwm_out_pause), (28 bytes). + Removing drv_pwm.o(i.drv_pwm_out_set_control), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_out_set_period), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_out_set_sync_mode), (32 bytes). + Removing drv_pwm.o(i.drv_pwm_out_set_threshold), (12 bytes). + Removing drv_spi_slave.o(.rev16_text), (4 bytes). + Removing drv_spi_slave.o(.revsh_text), (4 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_deinit), (40 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_disable_int), (68 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_enable_int), (72 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_enable_rx_dma), (32 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_enable_tx_dma), (28 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_get_dma_address), (8 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_gpio_init), (24 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_read_data), (32 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_switch_sclk), (28 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_write_data), (44 bytes). + Removing drv_spi_slave.o(i.drv_spi_slave_init), (76 bytes). + Removing drv_uart.o(.rev16_text), (4 bytes). + Removing drv_uart.o(.revsh_text), (4 bytes). + Removing drv_uart.o(i.UART_AbortReceive), (30 bytes). + Removing drv_uart.o(i.UART_AbortSend), (30 bytes). + Removing drv_uart.o(i.UART_Deinit), (28 bytes). + Removing drv_uart.o(i.UART_Disable_IT), (68 bytes). + Removing drv_uart.o(i.UART_EnableDma), (32 bytes). + Removing drv_uart.o(i.UART_Enable_IT), (44 bytes). + Removing drv_uart.o(i.UART_GetDefaultConfig), (72 bytes). + Removing drv_uart.o(i.UART_GetFIFO_Ctrl), (20 bytes). + Removing drv_uart.o(i.UART_GetReceiveCount), (22 bytes). + Removing drv_uart.o(i.UART_GetReceiveStatus), (20 bytes). + Removing drv_uart.o(i.UART_GetRxRingBufferLength), (28 bytes). + Removing drv_uart.o(i.UART_GetSendCount), (22 bytes). + Removing drv_uart.o(i.UART_GetSendStatus), (20 bytes). + Removing drv_uart.o(i.UART_ReadBlocking), (32 bytes). + Removing drv_uart.o(i.UART_ReceiveNonBlocking), (50 bytes). + Removing drv_uart.o(i.UART_ResetTxFIFO), (36 bytes). + Removing drv_uart.o(i.UART_SendNonBlocking), (38 bytes). + Removing drv_uart.o(i.UART_TransferCreateHandle), (96 bytes). + Removing drv_uart.o(i.UART_TransferStartRingBuffer), (30 bytes). + Removing drv_uart.o(.constdata), (1 bytes). + Removing drv_uart_dma.o(.rev16_text), (4 bytes). + Removing drv_uart_dma.o(.revsh_text), (4 bytes). + Removing drv_uart_dma.o(i.UART_DMAInit), (76 bytes). + Removing drv_uart_dma.o(i.UART_TransferAbortReceiveDMA), (16 bytes). + Removing drv_uart_dma.o(i.UART_TransferAbortSendDMA), (16 bytes). + Removing drv_uart_dma.o(i.UART_TransferCreateHandleDMA), (176 bytes). + Removing drv_uart_dma.o(i.UART_TransferGetReceiveCountDMA), (44 bytes). + Removing drv_uart_dma.o(i.UART_TransferReceiveDMA), (68 bytes). + Removing drv_uart_dma.o(i.UART_TransferReceiveDMACallback), (34 bytes). + Removing drv_uart_dma.o(i.UART_TransferSendDMA), (68 bytes). + Removing drv_uart_dma.o(i.UART_TransferSendDMACallback), (34 bytes). + Removing drv_uart_dma.o(.data), (8 bytes). + Removing drv_wdg.o(.rev16_text), (4 bytes). + Removing drv_wdg.o(.revsh_text), (4 bytes). + Removing drv_wdg.o(i.drv_wdg_enable), (32 bytes). + Removing drv_wdg.o(i.drv_wdg_load_match), (12 bytes). + Removing drv_wdg.o(i.drv_wdg_register_callback), (12 bytes). + Removing drv_wdg.o(i.drv_wdg_sel_mode), (28 bytes). + Removing drv_wdg.o(i.drv_wdg_set_repeat), (12 bytes). + Removing dflti.o(.text), (40 bytes). + +584 unused section(s) (total 26554 bytes) removed from the image. + +============================================================================== + +Image Symbol Table + + Local Symbols + + Symbol Name Value Ov Type Size Object(Section) + + ../clib/../cmprslib/zerorunl2.c 0x00000000 Number 0 __dczerorl2.o ABSOLUTE + ../clib/microlib/division.c 0x00000000 Number 0 idiv.o ABSOLUTE + ../clib/microlib/division.c 0x00000000 Number 0 uidiv.o ABSOLUTE + ../clib/microlib/division.c 0x00000000 Number 0 uldiv.o ABSOLUTE + ../clib/microlib/errno.c 0x00000000 Number 0 errno.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry10b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry11a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry8a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry9a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry7b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry7a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry2.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry5.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry9b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry11b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry10a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry8b.o ABSOLUTE + ../clib/microlib/longlong.c 0x00000000 Number 0 llsshr.o ABSOLUTE + ../clib/microlib/longlong.c 0x00000000 Number 0 llushr.o ABSOLUTE + ../clib/microlib/longlong.c 0x00000000 Number 0 llshl.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printfa.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf4.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf8.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf7.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf1.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf5.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf3.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf2.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf0.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printfb.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf6.o ABSOLUTE + ../clib/microlib/printf/stubs.s 0x00000000 Number 0 stubs.o ABSOLUTE + ../clib/microlib/stdio/streams.c 0x00000000 Number 0 stdout.o ABSOLUTE + ../clib/microlib/string/memcpy.c 0x00000000 Number 0 memcpyb.o ABSOLUTE + ../clib/microlib/string/memcpy.c 0x00000000 Number 0 memcpya.o ABSOLUTE + ../clib/microlib/string/memset.c 0x00000000 Number 0 memseta.o ABSOLUTE + ../clib/microlib/stubs.s 0x00000000 Number 0 iusefp.o ABSOLUTE + ../fplib/microlib/f2d.c 0x00000000 Number 0 f2d.o ABSOLUTE + ../fplib/microlib/fpadd.c 0x00000000 Number 0 fadd.o ABSOLUTE + ../fplib/microlib/fpadd.c 0x00000000 Number 0 dadd.o ABSOLUTE + ../fplib/microlib/fpdiv.c 0x00000000 Number 0 fdiv.o ABSOLUTE + ../fplib/microlib/fpdiv.c 0x00000000 Number 0 ddiv.o ABSOLUTE + ../fplib/microlib/fpepilogue.c 0x00000000 Number 0 depilogue.o ABSOLUTE + ../fplib/microlib/fpepilogue.c 0x00000000 Number 0 fepilogue.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 dfixul.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 ffixui.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 dfixui.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 dfixi.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 ffixi.o ABSOLUTE + ../fplib/microlib/fpflt.c 0x00000000 Number 0 dflti.o ABSOLUTE + ../fplib/microlib/fpflt.c 0x00000000 Number 0 dfltui.o ABSOLUTE + ../fplib/microlib/fpflt.c 0x00000000 Number 0 ffltui.o ABSOLUTE + ../fplib/microlib/fpflt.c 0x00000000 Number 0 fflti.o ABSOLUTE + ../fplib/microlib/fpmul.c 0x00000000 Number 0 fmul.o ABSOLUTE + ../fplib/microlib/fpmul.c 0x00000000 Number 0 dmul.o ABSOLUTE + ../fplib/microlib/fpscalb.c 0x00000000 Number 0 fscalb.o ABSOLUTE + ../fplib/microlib/fpsqrt.c 0x00000000 Number 0 dsqrt.o ABSOLUTE + ../mathlib/ceil.c 0x00000000 Number 0 ceil.o ABSOLUTE + ../mathlib/sqrt.c 0x00000000 Number 0 sqrt.o ABSOLUTE + ../mathlib/sqrt.c 0x00000000 Number 0 sqrt_x.o ABSOLUTE + ..\..\..\src\common\tau_delay.c 0x00000000 Number 0 tau_delay.o ABSOLUTE + ..\..\..\src\common\tau_log.c 0x00000000 Number 0 tau_log.o ABSOLUTE + ..\..\..\src\driver\robin\src\drv_chip_info.c 0x00000000 Number 0 drv_chip_info.o ABSOLUTE + ..\..\..\src\driver\robin\src\drv_dsc_dec.c 0x00000000 Number 0 drv_dsc_dec.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_dsi_rx.c 0x00000000 Number 0 drv_dsi_rx.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_dsi_tx.c 0x00000000 Number 0 drv_dsi_tx.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_efuse.c 0x00000000 Number 0 drv_efuse.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_lcdc.c 0x00000000 Number 0 drv_lcdc.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_memc.c 0x00000000 Number 0 drv_memc.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_phy_common.c 0x00000000 Number 0 drv_phy_common.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_rxbr.c 0x00000000 Number 0 drv_rxbr.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_vidc.c 0x00000000 Number 0 drv_vidc.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\irq_redirect .c 0x00000000 Number 0 irq_redirect .o ABSOLUTE + ..\..\..\src\driver\source\robin\hal\internal\dcs_packet_fifo.c 0x00000000 Number 0 dcs_packet_fifo.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_common.c 0x00000000 Number 0 drv_common.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_crgu.c 0x00000000 Number 0 drv_crgu.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_dma.c 0x00000000 Number 0 drv_dma.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_fls.c 0x00000000 Number 0 drv_fls.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_fls_dma.c 0x00000000 Number 0 drv_fls_dma.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_gpio.c 0x00000000 Number 0 drv_gpio.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_i2c_dma.c 0x00000000 Number 0 drv_i2c_dma.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_i2c_master.c 0x00000000 Number 0 drv_i2c_master.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_i2c_slave.c 0x00000000 Number 0 drv_i2c_slave.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_param_init.c 0x00000000 Number 0 drv_param_init.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_pwm.c 0x00000000 Number 0 drv_pwm.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_pwr.c 0x00000000 Number 0 drv_pwr.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_spi_dma.c 0x00000000 Number 0 drv_spi_dma.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_spi_master.c 0x00000000 Number 0 drv_spi_master.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_spi_slave.c 0x00000000 Number 0 drv_spi_slave.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_swire.c 0x00000000 Number 0 drv_swire.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_sys_cfg.c 0x00000000 Number 0 drv_sys_cfg.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_timer.c 0x00000000 Number 0 drv_timer.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_uart.c 0x00000000 Number 0 drv_uart.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_uart_dma.c 0x00000000 Number 0 drv_uart_dma.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_wdg.c 0x00000000 Number 0 drv_wdg.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_dsi_rx_ctrl.c 0x00000000 Number 0 hal_dsi_rx_ctrl.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_dsi_tx_ctrl.c 0x00000000 Number 0 hal_dsi_tx_ctrl.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_gpio.c 0x00000000 Number 0 hal_gpio.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_i2c_master.c 0x00000000 Number 0 hal_i2c_master.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_i2c_slave.c 0x00000000 Number 0 hal_i2c_slave.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_spi_master.c 0x00000000 Number 0 hal_spi_master.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_spi_slave.c 0x00000000 Number 0 hal_spi_slave.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_swire.c 0x00000000 Number 0 hal_swire.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_system.c 0x00000000 Number 0 hal_system.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_timer.c 0x00000000 Number 0 hal_timer.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_uart.c 0x00000000 Number 0 hal_uart.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\internal\hal_internal_vsync.c 0x00000000 Number 0 hal_internal_vsync.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\internal\norflash.c 0x00000000 Number 0 norflash.o ABSOLUTE + ..\..\src\app\ap_demo\app_tp_enc.c 0x00000000 Number 0 app_tp_enc.o ABSOLUTE + ..\..\src\app\demo\ap_demo.c 0x00000000 Number 0 ap_demo.o ABSOLUTE + ..\..\src\app\demo\app_tp_for_custom_s8.c 0x00000000 Number 0 app_tp_for_custom_s8.o ABSOLUTE + ..\..\src\app\demo\app_tp_st_touch.c 0x00000000 Number 0 app_tp_st_touch.o ABSOLUTE + ..\..\src\app\demo\app_tp_transfer.c 0x00000000 Number 0 app_tp_transfer.o ABSOLUTE + ..\..\src\app\main.c 0x00000000 Number 0 main.o ABSOLUTE + ..\..\src\board\board.c 0x00000000 Number 0 board.o ABSOLUTE + ..\..\src\board\startup\startup_ARMCM0.s 0x00000000 Number 0 startup_armcm0.o ABSOLUTE + ..\\..\\..\\src\\common\\tau_delay.c 0x00000000 Number 0 tau_delay.o ABSOLUTE + ..\\..\\..\\src\\common\\tau_log.c 0x00000000 Number 0 tau_log.o ABSOLUTE + ..\\..\\..\\src\\driver\\robin\\src\\drv_chip_info.c 0x00000000 Number 0 drv_chip_info.o ABSOLUTE + ..\\..\\..\\src\\driver\\robin\\src\\drv_dsc_dec.c 0x00000000 Number 0 drv_dsc_dec.o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\drv\\drv_dsi_rx.c 0x00000000 Number 0 drv_dsi_rx.o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\drv\\drv_dsi_tx.c 0x00000000 Number 0 drv_dsi_tx.o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\drv\\drv_efuse.c 0x00000000 Number 0 drv_efuse.o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\drv\\drv_lcdc.c 0x00000000 Number 0 drv_lcdc.o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\drv\\drv_memc.c 0x00000000 Number 0 drv_memc.o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\drv\\drv_phy_common.c 0x00000000 Number 0 drv_phy_common.o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\drv\\drv_rxbr.c 0x00000000 Number 0 drv_rxbr.o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\drv\\drv_vidc.c 0x00000000 Number 0 drv_vidc.o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\drv\\irq_redirect .c 0x00000000 Number 0 irq_redirect .o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_common.c 0x00000000 Number 0 drv_common.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_crgu.c 0x00000000 Number 0 drv_crgu.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_dma.c 0x00000000 Number 0 drv_dma.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_fls.c 0x00000000 Number 0 drv_fls.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_fls_dma.c 0x00000000 Number 0 drv_fls_dma.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_gpio.c 0x00000000 Number 0 drv_gpio.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_i2c_dma.c 0x00000000 Number 0 drv_i2c_dma.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_i2c_master.c 0x00000000 Number 0 drv_i2c_master.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_i2c_slave.c 0x00000000 Number 0 drv_i2c_slave.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_param_init.c 0x00000000 Number 0 drv_param_init.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_pwm.c 0x00000000 Number 0 drv_pwm.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_pwr.c 0x00000000 Number 0 drv_pwr.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_spi_dma.c 0x00000000 Number 0 drv_spi_dma.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_spi_master.c 0x00000000 Number 0 drv_spi_master.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_spi_slave.c 0x00000000 Number 0 drv_spi_slave.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_swire.c 0x00000000 Number 0 drv_swire.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_sys_cfg.c 0x00000000 Number 0 drv_sys_cfg.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_timer.c 0x00000000 Number 0 drv_timer.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_uart.c 0x00000000 Number 0 drv_uart.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_uart_dma.c 0x00000000 Number 0 drv_uart_dma.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_wdg.c 0x00000000 Number 0 drv_wdg.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_dsi_rx_ctrl.c 0x00000000 Number 0 hal_dsi_rx_ctrl.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_dsi_tx_ctrl.c 0x00000000 Number 0 hal_dsi_tx_ctrl.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_gpio.c 0x00000000 Number 0 hal_gpio.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_i2c_master.c 0x00000000 Number 0 hal_i2c_master.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_i2c_slave.c 0x00000000 Number 0 hal_i2c_slave.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_spi_master.c 0x00000000 Number 0 hal_spi_master.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_spi_slave.c 0x00000000 Number 0 hal_spi_slave.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_swire.c 0x00000000 Number 0 hal_swire.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_system.c 0x00000000 Number 0 hal_system.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_timer.c 0x00000000 Number 0 hal_timer.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_uart.c 0x00000000 Number 0 hal_uart.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\internal\\hal_internal_vsync.c 0x00000000 Number 0 hal_internal_vsync.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\internal\\norflash.c 0x00000000 Number 0 norflash.o ABSOLUTE + ..\\..\\src\\app\\ap_demo\\app_tp_enc.c 0x00000000 Number 0 app_tp_enc.o ABSOLUTE + ..\\..\\src\\app\\demo\\ap_demo.c 0x00000000 Number 0 ap_demo.o ABSOLUTE + ..\\..\\src\\app\\demo\\app_tp_for_custom_s8.c 0x00000000 Number 0 app_tp_for_custom_s8.o ABSOLUTE + ..\\..\\src\\app\\demo\\app_tp_st_touch.c 0x00000000 Number 0 app_tp_st_touch.o ABSOLUTE + ..\\..\\src\\app\\demo\\app_tp_transfer.c 0x00000000 Number 0 app_tp_transfer.o ABSOLUTE + ..\\..\\src\\app\\main.c 0x00000000 Number 0 main.o ABSOLUTE + ..\\..\\src\\board\\board.c 0x00000000 Number 0 board.o ABSOLUTE + cdcmple.s 0x00000000 Number 0 cdcmple.o ABSOLUTE + cdrcmple.s 0x00000000 Number 0 cdrcmple.o ABSOLUTE + cfrcmple.s 0x00000000 Number 0 cfrcmple.o ABSOLUTE + dc.s 0x00000000 Number 0 dc.o ABSOLUTE + handlers.s 0x00000000 Number 0 handlers.o ABSOLUTE + init.s 0x00000000 Number 0 init.o ABSOLUTE + RESET 0x00010000 Section 192 startup_armcm0.o(RESET) + .ARM.Collect$$$$00000000 0x000100c0 Section 0 entry.o(.ARM.Collect$$$$00000000) + .ARM.Collect$$$$00000001 0x000100c0 Section 4 entry2.o(.ARM.Collect$$$$00000001) + .ARM.Collect$$$$00000004 0x000100c4 Section 4 entry5.o(.ARM.Collect$$$$00000004) + .ARM.Collect$$$$00000008 0x000100c8 Section 0 entry7b.o(.ARM.Collect$$$$00000008) + .ARM.Collect$$$$0000000A 0x000100c8 Section 0 entry8b.o(.ARM.Collect$$$$0000000A) + .ARM.Collect$$$$0000000B 0x000100c8 Section 8 entry9a.o(.ARM.Collect$$$$0000000B) + .ARM.Collect$$$$0000000D 0x000100d0 Section 0 entry10a.o(.ARM.Collect$$$$0000000D) + .ARM.Collect$$$$0000000F 0x000100d0 Section 0 entry11a.o(.ARM.Collect$$$$0000000F) + .ARM.Collect$$$$00002712 0x000100d0 Section 4 entry2.o(.ARM.Collect$$$$00002712) + __lit__00000000 0x000100d0 Data 4 entry2.o(.ARM.Collect$$$$00002712) + .text 0x000100d4 Section 120 startup_armcm0.o(.text) + .text 0x0001014c Section 0 uidiv.o(.text) + .text 0x00010178 Section 0 idiv.o(.text) + .text 0x000101a0 Section 0 memcpya.o(.text) + .text 0x000101c4 Section 0 memseta.o(.text) + .text 0x000101e8 Section 0 fadd.o(.text) + .text 0x0001029a Section 0 fmul.o(.text) + .text 0x00010314 Section 0 fdiv.o(.text) + .text 0x00010390 Section 0 fscalb.o(.text) + .text 0x000103a8 Section 0 dadd.o(.text) + .text 0x0001050c Section 0 dmul.o(.text) + .text 0x000105dc Section 0 ddiv.o(.text) + .text 0x000106cc Section 0 fflti.o(.text) + .text 0x000106e2 Section 0 ffltui.o(.text) + .text 0x000106f0 Section 0 dfltui.o(.text) + .text 0x0001070c Section 0 ffixi.o(.text) + .text 0x0001073e Section 0 ffixui.o(.text) + .text 0x00010768 Section 0 dfixi.o(.text) + .text 0x000107b0 Section 0 dfixui.o(.text) + .text 0x000107ec Section 0 f2d.o(.text) + .text 0x00010814 Section 40 cdcmple.o(.text) + .text 0x0001083c Section 20 cfrcmple.o(.text) + .text 0x00010850 Section 0 uldiv.o(.text) + .text 0x000108b0 Section 0 llshl.o(.text) + .text 0x000108d0 Section 0 llushr.o(.text) + .text 0x000108f2 Section 0 llsshr.o(.text) + .text 0x00010918 Section 0 iusefp.o(.text) + .text 0x00010918 Section 0 fepilogue.o(.text) + .text 0x0001099a Section 0 depilogue.o(.text) + .text 0x00010a58 Section 0 dsqrt.o(.text) + .text 0x00010afc Section 0 dfixul.o(.text) + .text 0x00010b3c Section 40 cdrcmple.o(.text) + .text 0x00010b64 Section 36 init.o(.text) + .text 0x00010b88 Section 0 __dczerorl2.o(.text) + i.ADC_IRQn_Handler 0x00010be0 Section 0 irq_redirect .o(i.ADC_IRQn_Handler) + i.AP_NRESET_IRQn_Handler 0x00010bf8 Section 0 irq_redirect .o(i.AP_NRESET_IRQn_Handler) + i.CRC16_2 0x00010c10 Section 0 app_tp_st_touch.o(i.CRC16_2) + i.DMA_IRQn_Handler 0x00010c50 Section 0 irq_redirect .o(i.DMA_IRQn_Handler) + i.EXTI_INT0_IRQn_Handler 0x00010c64 Section 0 irq_redirect .o(i.EXTI_INT0_IRQn_Handler) + i.EXTI_INT1_IRQn_Handler 0x00010c80 Section 0 irq_redirect .o(i.EXTI_INT1_IRQn_Handler) + i.EXTI_INT2_IRQn_Handler 0x00010c9c Section 0 irq_redirect .o(i.EXTI_INT2_IRQn_Handler) + i.EXTI_INT3_IRQn_Handler 0x00010cb8 Section 0 irq_redirect .o(i.EXTI_INT3_IRQn_Handler) + i.EXTI_INT4_IRQn_Handler 0x00010cd4 Section 0 irq_redirect .o(i.EXTI_INT4_IRQn_Handler) + i.EXTI_INT5_IRQn_Handler 0x00010cf0 Section 0 irq_redirect .o(i.EXTI_INT5_IRQn_Handler) + i.EXTI_INT6_IRQn_Handler 0x00010d0c Section 0 irq_redirect .o(i.EXTI_INT6_IRQn_Handler) + i.EXTI_INT7_IRQn_Handler 0x00010d28 Section 0 irq_redirect .o(i.EXTI_INT7_IRQn_Handler) + i.EncryptCheck 0x00010d44 Section 0 app_tp_enc.o(i.EncryptCheck) + i.FLSCTRL_IRQn_Handler 0x00010da8 Section 0 irq_redirect .o(i.FLSCTRL_IRQn_Handler) + i.Gpio_swire_output 0x00010dbc Section 0 ap_demo.o(i.Gpio_swire_output) + i.HardFault_Handler 0x00010e30 Section 0 irq_redirect .o(i.HardFault_Handler) + i.I2C0_IRQn_Handler 0x00010e44 Section 0 irq_redirect .o(i.I2C0_IRQn_Handler) + i.I2C1_IRQn_Handler 0x00010e5c Section 0 irq_redirect .o(i.I2C1_IRQn_Handler) + i.LCDC_IRQn_Handler 0x00010e74 Section 0 irq_redirect .o(i.LCDC_IRQn_Handler) + i.LOG_printf 0x00010e8c Section 0 tau_log.o(i.LOG_printf) + i.MEMC_IRQn_Handler 0x00010eb4 Section 0 irq_redirect .o(i.MEMC_IRQn_Handler) + i.MIPI_RX_IRQn_Handler 0x00010ecc Section 0 irq_redirect .o(i.MIPI_RX_IRQn_Handler) + i.MIPI_TX_IRQn_Handler 0x00010ee4 Section 0 irq_redirect .o(i.MIPI_TX_IRQn_Handler) + i.PWMDET_IRQn_Handler 0x00010efc Section 0 irq_redirect .o(i.PWMDET_IRQn_Handler) + i.SPIM_IRQn_Handler 0x00010f18 Section 0 irq_redirect .o(i.SPIM_IRQn_Handler) + i.SPIS_IRQn_Handler 0x00010f34 Section 0 irq_redirect .o(i.SPIS_IRQn_Handler) + i.SWIRE_IRQn_Handler 0x00010f50 Section 0 irq_redirect .o(i.SWIRE_IRQn_Handler) + i.SysTick_Handler 0x00010f6c Section 0 irq_redirect .o(i.SysTick_Handler) + i.TIMER0_IRQn_Handler 0x00010f84 Section 0 irq_redirect .o(i.TIMER0_IRQn_Handler) + i.TIMER1_IRQn_Handler 0x00010f9c Section 0 irq_redirect .o(i.TIMER1_IRQn_Handler) + i.TIMER2_IRQn_Handler 0x00010fb4 Section 0 irq_redirect .o(i.TIMER2_IRQn_Handler) + i.TIMER3_IRQn_Handler 0x00010fcc Section 0 irq_redirect .o(i.TIMER3_IRQn_Handler) + i.UART0_IRQ_Handle 0x00010fe4 Section 0 drv_uart.o(i.UART0_IRQ_Handle) + .ARM.__at_0x11000 0x00011000 Section 20 drv_common.o(.ARM.__at_0x11000) + i.UART_DisableDma 0x00011014 Section 0 drv_uart.o(i.UART_DisableDma) + i.__scatterload_null 0x00011016 Section 2 handlers.o(i.__scatterload_null) + .ARM.__at_0x11018 0x00011018 Section 4 drv_common.o(.ARM.__at_0x11018) + i.S20_Start_init 0x0001101c Section 0 app_tp_transfer.o(i.S20_Start_init) + i.UART_GetInstance 0x00011160 Section 0 drv_uart.o(i.UART_GetInstance) + i.UART_IRQn_Handler 0x00011164 Section 0 irq_redirect .o(i.UART_IRQn_Handler) + i.UART_ResetRxFIFO 0x0001117c Section 0 drv_uart.o(i.UART_ResetRxFIFO) + i.UART_SetBaudRate 0x000111a0 Section 0 drv_uart.o(i.UART_SetBaudRate) + i.UART_SwitchSCLK 0x000111e8 Section 0 drv_uart.o(i.UART_SwitchSCLK) + i.UART_TransferHandleIRQ 0x00011202 Section 0 drv_uart.o(i.UART_TransferHandleIRQ) + i.UART_WriteBlocking 0x00011336 Section 0 drv_uart.o(i.UART_WriteBlocking) + i.UART_init 0x00011350 Section 0 drv_uart.o(i.UART_init) + i.VIDC_IRQn_Handler 0x0001140c Section 0 irq_redirect .o(i.VIDC_IRQn_Handler) + i.VPRE_IRQn_Handler 0x00011424 Section 0 irq_redirect .o(i.VPRE_IRQn_Handler) + i.WDG_IRQn_Handler 0x0001143c Section 0 irq_redirect .o(i.WDG_IRQn_Handler) + i.__0printf 0x00011454 Section 0 printfa.o(i.__0printf) + i.__0vsprintf 0x00011474 Section 0 printfa.o(i.__0vsprintf) + i.__ARM_clz 0x00011498 Section 0 depilogue.o(i.__ARM_clz) + i.__ARM_common_switch8 0x000114c6 Section 0 ap_demo.o(i.__ARM_common_switch8) + i.__NVIC_ClearPendingIRQ 0x000114e0 Section 0 drv_i2c_master.o(i.__NVIC_ClearPendingIRQ) + __NVIC_ClearPendingIRQ 0x000114e1 Thumb Code 18 drv_i2c_master.o(i.__NVIC_ClearPendingIRQ) + i.__NVIC_ClearPendingIRQ 0x000114f8 Section 0 drv_spi_master.o(i.__NVIC_ClearPendingIRQ) + __NVIC_ClearPendingIRQ 0x000114f9 Thumb Code 18 drv_spi_master.o(i.__NVIC_ClearPendingIRQ) + i.__NVIC_DisableIRQ 0x00011510 Section 0 drv_rxbr.o(i.__NVIC_DisableIRQ) + __NVIC_DisableIRQ 0x00011511 Thumb Code 26 drv_rxbr.o(i.__NVIC_DisableIRQ) + i.__NVIC_EnableIRQ 0x00011530 Section 0 drv_rxbr.o(i.__NVIC_EnableIRQ) + __NVIC_EnableIRQ 0x00011531 Thumb Code 18 drv_rxbr.o(i.__NVIC_EnableIRQ) + i.__NVIC_SetPriority 0x00011548 Section 0 hal_spi_slave.o(i.__NVIC_SetPriority) + __NVIC_SetPriority 0x00011549 Thumb Code 60 hal_spi_slave.o(i.__NVIC_SetPriority) + i.__scatterload_copy 0x0001158c Section 14 handlers.o(i.__scatterload_copy) + i.__scatterload_zeroinit 0x0001159a Section 14 handlers.o(i.__scatterload_zeroinit) + i.__set_errno 0x000115a8 Section 0 errno.o(i.__set_errno) + i._fp_digits 0x000115b4 Section 0 printfa.o(i._fp_digits) + _fp_digits 0x000115b5 Thumb Code 344 printfa.o(i._fp_digits) + i._printf_core 0x00011728 Section 0 printfa.o(i._printf_core) + _printf_core 0x00011729 Thumb Code 1754 printfa.o(i._printf_core) + i._printf_post_padding 0x00011e14 Section 0 printfa.o(i._printf_post_padding) + _printf_post_padding 0x00011e15 Thumb Code 32 printfa.o(i._printf_post_padding) + i._printf_pre_padding 0x00011e34 Section 0 printfa.o(i._printf_pre_padding) + _printf_pre_padding 0x00011e35 Thumb Code 44 printfa.o(i._printf_pre_padding) + i._sputc 0x00011e60 Section 0 printfa.o(i._sputc) + _sputc 0x00011e61 Thumb Code 10 printfa.o(i._sputc) + i.ap_dcs_read 0x00011e6c Section 0 ap_demo.o(i.ap_dcs_read) + ap_dcs_read 0x00011e6d Thumb Code 4188 ap_demo.o(i.ap_dcs_read) + i.ap_demo 0x00012ec8 Section 0 ap_demo.o(i.ap_demo) + i.ap_get_reg_ca 0x00013000 Section 0 ap_demo.o(i.ap_get_reg_ca) + ap_get_reg_ca 0x00013001 Thumb Code 36 ap_demo.o(i.ap_get_reg_ca) + i.ap_get_reg_df 0x00013028 Section 0 ap_demo.o(i.ap_get_reg_df) + ap_get_reg_df 0x00013029 Thumb Code 170 ap_demo.o(i.ap_get_reg_df) + i.ap_get_tp_calibration_status_01 0x000130d8 Section 0 app_tp_st_touch.o(i.ap_get_tp_calibration_status_01) + i.ap_reset_cb 0x000130f8 Section 0 ap_demo.o(i.ap_reset_cb) + ap_reset_cb 0x000130f9 Thumb Code 30 ap_demo.o(i.ap_reset_cb) + i.ap_set_backlight 0x00013120 Section 0 ap_demo.o(i.ap_set_backlight) + ap_set_backlight 0x00013121 Thumb Code 672 ap_demo.o(i.ap_set_backlight) + i.ap_set_display_off 0x000133e0 Section 0 ap_demo.o(i.ap_set_display_off) + ap_set_display_off 0x000133e1 Thumb Code 32 ap_demo.o(i.ap_set_display_off) + i.ap_set_display_on 0x00013404 Section 0 ap_demo.o(i.ap_set_display_on) + ap_set_display_on 0x00013405 Thumb Code 8 ap_demo.o(i.ap_set_display_on) + i.ap_set_enter_sleep_mode 0x00013410 Section 0 ap_demo.o(i.ap_set_enter_sleep_mode) + ap_set_enter_sleep_mode 0x00013411 Thumb Code 46 ap_demo.o(i.ap_set_enter_sleep_mode) + i.ap_set_exit_sleep_mode 0x00013448 Section 0 ap_demo.o(i.ap_set_exit_sleep_mode) + ap_set_exit_sleep_mode 0x00013449 Thumb Code 8 ap_demo.o(i.ap_set_exit_sleep_mode) + i.ap_set_tp_calibration_04 0x00013454 Section 0 app_tp_st_touch.o(i.ap_set_tp_calibration_04) + i.ap_tp_st_touch_calibration 0x000134ec Section 0 app_tp_st_touch.o(i.ap_tp_st_touch_calibration) + i.ap_tp_st_touch_error_handler_F3 0x0001359c Section 0 app_tp_st_touch.o(i.ap_tp_st_touch_error_handler_F3) + i.ap_tp_st_touch_error_handler_FF 0x000135aa Section 0 app_tp_st_touch.o(i.ap_tp_st_touch_error_handler_FF) + i.ap_tp_st_touch_get_calibration_success_mark 0x000135cc Section 0 app_tp_st_touch.o(i.ap_tp_st_touch_get_calibration_success_mark) + i.ap_tp_st_touch_hardware_reset 0x00013674 Section 0 app_tp_st_touch.o(i.ap_tp_st_touch_hardware_reset) + i.ap_tp_st_touch_scan_point_init 0x000136fc Section 0 app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_init) + i.ap_tp_st_touch_scan_point_record_event 0x00013718 Section 0 app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_record_event) + i.ap_tp_st_touch_scan_point_record_event_exec 0x000137ac Section 0 app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_record_event_exec) + i.ap_tp_st_touch_simulate_finger_release_event 0x000137e0 Section 0 app_tp_st_touch.o(i.ap_tp_st_touch_simulate_finger_release_event) + i.ap_update_frame_rate 0x00013814 Section 0 ap_demo.o(i.ap_update_frame_rate) + ap_update_frame_rate 0x00013815 Thumb Code 40 ap_demo.o(i.ap_update_frame_rate) + i.app_ADC_IRQn_Handler 0x00013840 Section 0 drv_rxbr.o(i.app_ADC_IRQn_Handler) + i.app_AP_NRESET_IRQn_Handler 0x0001385c Section 0 drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) + i.app_EXTI_INT0_IRQn_Handler 0x00013880 Section 0 drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) + i.app_EXTI_INT1_IRQn_Handler 0x0001389c Section 0 drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) + i.app_EXTI_INT2_IRQn_Handler 0x000138b8 Section 0 drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) + i.app_EXTI_INT3_IRQn_Handler 0x000138d4 Section 0 drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) + i.app_EXTI_INT4_IRQn_Handler 0x000138f0 Section 0 drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) + i.app_EXTI_INT5_IRQn_Handler 0x0001390c Section 0 drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) + i.app_EXTI_INT6_IRQn_Handler 0x00013928 Section 0 drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) + i.app_EXTI_INT7_IRQn_Handler 0x00013944 Section 0 drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) + i.app_HardFault_Handler 0x00013960 Section 0 drv_common.o(i.app_HardFault_Handler) + i.app_I2C0_IRQn_Handler 0x000139a8 Section 0 drv_i2c_slave.o(i.app_I2C0_IRQn_Handler) + i.app_I2C1_IRQn_Handler 0x000139c0 Section 0 drv_i2c_master.o(i.app_I2C1_IRQn_Handler) + i.app_LCDC_IRQn_Handler 0x000139d0 Section 0 hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) + i.app_MEMC_IRQn_Handler 0x00013b74 Section 0 drv_memc.o(i.app_MEMC_IRQn_Handler) + i.app_MIPI_RX_IRQn_Handler 0x00013bfc Section 0 drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) + i.app_MIPI_TX_IRQn_Handler 0x00013e94 Section 0 drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) + i.app_PWMDET_IRQn_Handler 0x00013f34 Section 0 drv_pwm.o(i.app_PWMDET_IRQn_Handler) + i.app_SPIM_IRQn_Handler 0x00013f7c Section 0 drv_spi_master.o(i.app_SPIM_IRQn_Handler) + i.app_SPIS_IRQn_Handler 0x00013fac Section 0 hal_spi_slave.o(i.app_SPIS_IRQn_Handler) + i.app_SWIRE_IRQn_Handler 0x000141ac Section 0 drv_swire.o(i.app_SWIRE_IRQn_Handler) + i.app_SysTick_Handler 0x000141cc Section 0 drv_common.o(i.app_SysTick_Handler) + i.app_TIMER0_IRQn_Handler 0x000141e4 Section 0 drv_timer.o(i.app_TIMER0_IRQn_Handler) + i.app_TIMER1_IRQn_Handler 0x000141ee Section 0 drv_timer.o(i.app_TIMER1_IRQn_Handler) + i.app_TIMER2_IRQn_Handler 0x000141f8 Section 0 drv_timer.o(i.app_TIMER2_IRQn_Handler) + i.app_TIMER3_IRQn_Handler 0x00014202 Section 0 drv_timer.o(i.app_TIMER3_IRQn_Handler) + i.app_UART_IRQn_Handler 0x0001420c Section 0 drv_uart.o(i.app_UART_IRQn_Handler) + i.app_VIDC_IRQn_Handler 0x00014214 Section 0 drv_vidc.o(i.app_VIDC_IRQn_Handler) + i.app_VPRE_IRQn_Handler 0x00014230 Section 0 drv_rxbr.o(i.app_VPRE_IRQn_Handler) + i.app_WDG_IRQn_Handler 0x0001424c Section 0 drv_wdg.o(i.app_WDG_IRQn_Handler) + i.app_dma_irq_handler 0x00014284 Section 0 drv_dma.o(i.app_dma_irq_handler) + i.app_fls_ctrl_Handler 0x00014294 Section 0 norflash.o(i.app_fls_ctrl_Handler) + i.app_tp_I2C_init 0x000142c4 Section 0 app_tp_transfer.o(i.app_tp_I2C_init) + i.app_tp_calibration_exec 0x000142e8 Section 0 app_tp_st_touch.o(i.app_tp_calibration_exec) + i.app_tp_i2cs_callback 0x00014320 Section 0 app_tp_transfer.o(i.app_tp_i2cs_callback) + app_tp_i2cs_callback 0x00014321 Thumb Code 42 app_tp_transfer.o(i.app_tp_i2cs_callback) + i.app_tp_init 0x00014350 Section 0 app_tp_transfer.o(i.app_tp_init) + i.app_tp_m_read 0x00014390 Section 0 app_tp_transfer.o(i.app_tp_m_read) + i.app_tp_m_write 0x000143b0 Section 0 app_tp_transfer.o(i.app_tp_m_write) + i.app_tp_phone_analysis_data 0x000143b8 Section 0 app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) + i.app_tp_phone_clear_reset_on 0x000147d4 Section 0 app_tp_transfer.o(i.app_tp_phone_clear_reset_on) + i.app_tp_s_read 0x000147e0 Section 0 app_tp_transfer.o(i.app_tp_s_read) + i.app_tp_s_write 0x000147e8 Section 0 app_tp_transfer.o(i.app_tp_s_write) + i.app_tp_screen_analysis_int 0x000147f0 Section 0 app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) + i.app_tp_screen_int_callback 0x00014acc Section 0 app_tp_transfer.o(i.app_tp_screen_int_callback) + app_tp_screen_int_callback 0x00014acd Thumb Code 8 app_tp_transfer.o(i.app_tp_screen_int_callback) + i.app_tp_transfer_screen_const 0x00014ad8 Section 0 app_tp_transfer.o(i.app_tp_transfer_screen_const) + app_tp_transfer_screen_const 0x00014ad9 Thumb Code 50 app_tp_transfer.o(i.app_tp_transfer_screen_const) + i.app_tp_transfer_screen_int 0x00014b18 Section 0 app_tp_transfer.o(i.app_tp_transfer_screen_int) + i.app_tp_transfer_screen_start 0x00014c78 Section 0 app_tp_transfer.o(i.app_tp_transfer_screen_start) + i.blue_change_ccm 0x00014c90 Section 0 ap_demo.o(i.blue_change_ccm) + i.board_Init 0x00014cc8 Section 0 board.o(i.board_Init) + i.calc_framebuffer_setting 0x00014cec Section 0 hal_internal_vsync.o(i.calc_framebuffer_setting) + i.ceil 0x000151dc Section 0 ceil.o(i.ceil) + i.check_mipi_rx_tx_video_info 0x000152a4 Section 0 hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) + check_mipi_rx_tx_video_info 0x000152a5 Thumb Code 44 hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) + i.check_pkt_buf_rev 0x000152d0 Section 0 hal_internal_vsync.o(i.check_pkt_buf_rev) + check_pkt_buf_rev 0x000152d1 Thumb Code 92 hal_internal_vsync.o(i.check_pkt_buf_rev) + i.dcs_packet_fifo_alloc 0x00015360 Section 0 dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) + i.dcs_packet_fifo_init 0x000153b8 Section 0 dcs_packet_fifo.o(i.dcs_packet_fifo_init) + i.dcs_packet_free_fifo_header 0x000153d0 Section 0 dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) + i.dcs_packet_get_fifo_header 0x00015414 Section 0 dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) + i.dcs_sw_filter 0x00015438 Section 0 hal_internal_vsync.o(i.dcs_sw_filter) + dcs_sw_filter 0x00015439 Thumb Code 36 hal_internal_vsync.o(i.dcs_sw_filter) + i.delayMs 0x00015464 Section 0 tau_delay.o(i.delayMs) + i.delayUs 0x0001547c Section 0 tau_delay.o(i.delayUs) + i.disable_mipi_timer_cb 0x000154a0 Section 0 ap_demo.o(i.disable_mipi_timer_cb) + disable_mipi_timer_cb 0x000154a1 Thumb Code 78 ap_demo.o(i.disable_mipi_timer_cb) + i.drv_ap_rst_trig_edge_detect 0x000154f8 Section 0 drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) + i.drv_chip_info_get_info 0x00015530 Section 0 drv_chip_info.o(i.drv_chip_info_get_info) + i.drv_chip_info_init 0x0001553c Section 0 drv_chip_info.o(i.drv_chip_info_init) + i.drv_chip_rx_info_check 0x0001557c Section 0 drv_chip_info.o(i.drv_chip_rx_info_check) + i.drv_chip_rx_init_done 0x0001562c Section 0 drv_chip_info.o(i.drv_chip_rx_init_done) + i.drv_common_enable_systick 0x00015640 Section 0 drv_common.o(i.drv_common_enable_systick) + i.drv_common_system_init 0x00015698 Section 0 drv_common.o(i.drv_common_system_init) + i.drv_crgu_config_reset_modules 0x000156a0 Section 0 drv_crgu.o(i.drv_crgu_config_reset_modules) + i.drv_crgu_set_ahb_pre_div 0x000156b0 Section 0 drv_crgu.o(i.drv_crgu_set_ahb_pre_div) + i.drv_crgu_set_ahb_src 0x000156c4 Section 0 drv_crgu.o(i.drv_crgu_set_ahb_src) + i.drv_crgu_set_clock 0x000156d8 Section 0 drv_crgu.o(i.drv_crgu_set_clock) + i.drv_crgu_set_dpi_mux_src 0x000156f8 Section 0 drv_crgu.o(i.drv_crgu_set_dpi_mux_src) + i.drv_crgu_set_dpi_pre_div 0x0001570c Section 0 drv_crgu.o(i.drv_crgu_set_dpi_pre_div) + i.drv_crgu_set_dpi_pre_src 0x00015724 Section 0 drv_crgu.o(i.drv_crgu_set_dpi_pre_src) + i.drv_crgu_set_dsc_core_div 0x00015738 Section 0 drv_crgu.o(i.drv_crgu_set_dsc_core_div) + i.drv_crgu_set_dsco_src 0x0001574c Section 0 drv_crgu.o(i.drv_crgu_set_dsco_src) + i.drv_crgu_set_dsco_src_div 0x00015760 Section 0 drv_crgu.o(i.drv_crgu_set_dsco_src_div) + i.drv_crgu_set_fb_div 0x00015774 Section 0 drv_crgu.o(i.drv_crgu_set_fb_div) + i.drv_crgu_set_fb_src 0x00015788 Section 0 drv_crgu.o(i.drv_crgu_set_fb_src) + i.drv_crgu_set_lcdc_div 0x0001579c Section 0 drv_crgu.o(i.drv_crgu_set_lcdc_div) + i.drv_crgu_set_lcdc_src 0x000157b0 Section 0 drv_crgu.o(i.drv_crgu_set_lcdc_src) + i.drv_crgu_set_mipi_cfg_src 0x000157c4 Section 0 drv_crgu.o(i.drv_crgu_set_mipi_cfg_src) + i.drv_crgu_set_mipi_ref_src 0x000157d8 Section 0 drv_crgu.o(i.drv_crgu_set_mipi_ref_src) + i.drv_crgu_set_reset 0x000157f0 Section 0 drv_crgu.o(i.drv_crgu_set_reset) + i.drv_crgu_set_rxbr_div 0x00015808 Section 0 drv_crgu.o(i.drv_crgu_set_rxbr_div) + i.drv_crgu_set_rxbr_src 0x0001581c Section 0 drv_crgu.o(i.drv_crgu_set_rxbr_src) + i.drv_crgu_set_vidc_src 0x00015830 Section 0 drv_crgu.o(i.drv_crgu_set_vidc_src) + i.drv_dma_clear_flag 0x00015844 Section 0 drv_dma.o(i.drv_dma_clear_flag) + i.drv_dma_create_handle 0x0001585c Section 0 drv_dma.o(i.drv_dma_create_handle) + i.drv_dma_disenable_channel 0x00015878 Section 0 drv_dma.o(i.drv_dma_disenable_channel) + i.drv_dma_enable_channel 0x00015888 Section 0 drv_dma.o(i.drv_dma_enable_channel) + i.drv_dma_enable_channel_interrupts 0x00015898 Section 0 drv_dma.o(i.drv_dma_enable_channel_interrupts) + i.drv_dma_get_channel_flag 0x000158bc Section 0 drv_dma.o(i.drv_dma_get_channel_flag) + i.drv_dma_irq_handler 0x000158c8 Section 0 drv_dma.o(i.drv_dma_irq_handler) + i.drv_dma_prepar_transfer 0x00015958 Section 0 drv_dma.o(i.drv_dma_prepar_transfer) + i.drv_dma_set_burst 0x0001596a Section 0 drv_dma.o(i.drv_dma_set_burst) + i.drv_dma_set_callback 0x00015984 Section 0 drv_dma.o(i.drv_dma_set_callback) + i.drv_dma_set_transfer 0x0001598c Section 0 drv_dma.o(i.drv_dma_set_transfer) + i.drv_dsc_dec_convert_pps_rc_parameter 0x000159d0 Section 0 drv_dsc_dec.o(i.drv_dsc_dec_convert_pps_rc_parameter) + i.drv_dsc_dec_disable 0x00015a06 Section 0 drv_dsc_dec.o(i.drv_dsc_dec_disable) + i.drv_dsc_dec_enable 0x00015a14 Section 0 drv_dsc_dec.o(i.drv_dsc_dec_enable) + i.drv_dsc_dec_get_nslc 0x00015a88 Section 0 drv_dsc_dec.o(i.drv_dsc_dec_get_nslc) + i.drv_dsc_dec_set_u8_pps 0x00015a92 Section 0 drv_dsc_dec.o(i.drv_dsc_dec_set_u8_pps) + i.drv_dsi_rx_calc_ipi_tx_delay 0x00015abc Section 0 drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) + i.drv_dsi_rx_enable_irq 0x00015bc0 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) + i.drv_dsi_rx_get_color_bpp 0x00015c00 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) + drv_dsi_rx_get_color_bpp 0x00015c01 Thumb Code 62 drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) + i.drv_dsi_rx_get_color_pcc 0x00015c50 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_color_pcc) + drv_dsi_rx_get_color_pcc 0x00015c51 Thumb Code 24 drv_dsi_rx.o(i.drv_dsi_rx_get_color_pcc) + i.drv_dsi_rx_get_compression_en 0x00015c6c Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) + i.drv_dsi_rx_get_max_ret_size 0x00015c74 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_max_ret_size) + i.drv_dsi_rx_power_up 0x00015c7a Section 0 drv_dsi_rx.o(i.drv_dsi_rx_power_up) + i.drv_dsi_rx_set_ctrl_cfg 0x00015c88 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_ctrl_cfg) + i.drv_dsi_rx_set_ddi_cfg 0x00015ca8 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) + i.drv_dsi_rx_set_inten 0x00015cb8 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_inten) + i.drv_dsi_rx_set_ipi_cfg 0x00015cbc Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_cfg) + i.drv_dsi_rx_set_lane_swap 0x00015ccc Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_lane_swap) + i.drv_dsi_rx_set_resp_cnt 0x00015d12 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_resp_cnt) + i.drv_dsi_rx_set_up_phy 0x00015d38 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) + i.drv_dsi_rx_shut_down 0x00015e3c Section 0 drv_dsi_rx.o(i.drv_dsi_rx_shut_down) + i.drv_dsi_tx_command_header 0x00015e4a Section 0 drv_dsi_tx.o(i.drv_dsi_tx_command_header) + i.drv_dsi_tx_command_mode_cfg 0x00015e5e Section 0 drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) + i.drv_dsi_tx_command_put_payload 0x00015eca Section 0 drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) + i.drv_dsi_tx_config_eotp 0x00015ece Section 0 drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) + i.drv_dsi_tx_config_int 0x00015ee6 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_config_int) + i.drv_dsi_tx_dpi_lpcmd_time 0x00015eee Section 0 drv_dsi_tx.o(i.drv_dsi_tx_dpi_lpcmd_time) + i.drv_dsi_tx_dpi_mode 0x00015ef6 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_dpi_mode) + i.drv_dsi_tx_dpi_polarity 0x00015f00 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_dpi_polarity) + i.drv_dsi_tx_edpi_cmd_size 0x00015f24 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_edpi_cmd_size) + i.drv_dsi_tx_get_cmd_status 0x00015f28 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) + i.drv_dsi_tx_mode 0x00015f2c Section 0 drv_dsi_tx.o(i.drv_dsi_tx_mode) + i.drv_dsi_tx_phy_clock_lane_auto_lp 0x00015f30 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_auto_lp) + i.drv_dsi_tx_phy_clock_lane_req_hs 0x00015f48 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) + i.drv_dsi_tx_phy_lane_mode 0x00015f62 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_lane_mode) + i.drv_dsi_tx_phy_status_ready 0x00015f6e Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ready) + i.drv_dsi_tx_phy_status_stopstate 0x00015fd2 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) + i.drv_dsi_tx_phy_test_setup 0x00016010 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) + i.drv_dsi_tx_phy_time_cfg 0x00016144 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_time_cfg) + i.drv_dsi_tx_powerup 0x00016162 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_powerup) + i.drv_dsi_tx_response_mode 0x0001616a Section 0 drv_dsi_tx.o(i.drv_dsi_tx_response_mode) + i.drv_dsi_tx_set_bta_ack 0x00016186 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_bta_ack) + i.drv_dsi_tx_set_esc_div 0x0001619e Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) + i.drv_dsi_tx_set_int 0x000161ac Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_int) + i.drv_dsi_tx_set_time_out_div 0x000161ec Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_time_out_div) + i.drv_dsi_tx_set_video_chunk 0x000161fc Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_video_chunk) + i.drv_dsi_tx_set_video_timing 0x00016204 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_video_timing) + i.drv_dsi_tx_shutdown 0x00016226 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_shutdown) + i.drv_dsi_tx_timeout_cfg 0x0001622e Section 0 drv_dsi_tx.o(i.drv_dsi_tx_timeout_cfg) + i.drv_dsi_tx_video_mode_cfg 0x00016254 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_cfg) + i.drv_dsi_tx_video_mode_disable_hact_cmd 0x000162fe Section 0 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_disable_hact_cmd) + i.drv_dsi_tx_video_mode_set_lp_cmd 0x00016314 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_set_lp_cmd) + i.drv_efuse_enter_inactive 0x0001632c Section 0 drv_efuse.o(i.drv_efuse_enter_inactive) + i.drv_efuse_int_enable 0x0001635a Section 0 drv_efuse.o(i.drv_efuse_int_enable) + i.drv_efuse_read 0x00016366 Section 0 drv_efuse.o(i.drv_efuse_read) + i.drv_efuse_read_req 0x00016398 Section 0 drv_efuse.o(i.drv_efuse_read_req) + i.drv_gpio_get_input_data 0x000163b0 Section 0 drv_gpio.o(i.drv_gpio_get_input_data) + i.drv_gpio_register_ap_reset_callback 0x000163c8 Section 0 drv_gpio.o(i.drv_gpio_register_ap_reset_callback) + i.drv_gpio_register_callback 0x000163d4 Section 0 drv_gpio.o(i.drv_gpio_register_callback) + i.drv_gpio_set_int 0x000163e8 Section 0 drv_gpio.o(i.drv_gpio_set_int) + i.drv_gpio_set_ioe 0x00016438 Section 0 drv_gpio.o(i.drv_gpio_set_ioe) + i.drv_gpio_set_mode0 0x00016458 Section 0 drv_gpio.o(i.drv_gpio_set_mode0) + i.drv_gpio_set_mode1 0x00016468 Section 0 drv_gpio.o(i.drv_gpio_set_mode1) + i.drv_gpio_set_mode2 0x00016478 Section 0 drv_gpio.o(i.drv_gpio_set_mode2) + i.drv_gpio_set_mode3 0x00016488 Section 0 drv_gpio.o(i.drv_gpio_set_mode3) + i.drv_gpio_set_output_data 0x00016498 Section 0 hal_gpio.o(i.drv_gpio_set_output_data) + drv_gpio_set_output_data 0x00016499 Thumb Code 26 hal_gpio.o(i.drv_gpio_set_output_data) + i.drv_gpio_set_pull_state 0x000164b8 Section 0 drv_gpio.o(i.drv_gpio_set_pull_state) + i.drv_i2c0_set_callback 0x000165e8 Section 0 drv_i2c_slave.o(i.drv_i2c0_set_callback) + i.drv_i2c1_set_callback 0x000165f4 Section 0 drv_i2c_master.o(i.drv_i2c1_set_callback) + i.drv_i2c_dma_callback 0x00016600 Section 0 drv_i2c_dma.o(i.drv_i2c_dma_callback) + drv_i2c_dma_callback 0x00016601 Thumb Code 40 drv_i2c_dma.o(i.drv_i2c_dma_callback) + i.drv_i2c_dma_init 0x00016634 Section 0 drv_i2c_dma.o(i.drv_i2c_dma_init) + i.drv_i2c_enable_rx_dma 0x000166e0 Section 0 drv_i2c_dma.o(i.drv_i2c_enable_rx_dma) + i.drv_i2c_enable_tx_dma 0x000166fa Section 0 drv_i2c_dma.o(i.drv_i2c_enable_tx_dma) + i.drv_i2c_m_clear_it_pending_bit 0x00016714 Section 0 drv_i2c_master.o(i.drv_i2c_m_clear_it_pending_bit) + i.drv_i2c_m_enable 0x00016774 Section 0 drv_i2c_master.o(i.drv_i2c_m_enable) + i.drv_i2c_m_enable_intr 0x00016784 Section 0 drv_i2c_master.o(i.drv_i2c_m_enable_intr) + i.drv_i2c_master_init 0x000167bc Section 0 drv_i2c_master.o(i.drv_i2c_master_init) + i.drv_i2c_master_read_dma 0x00016848 Section 0 drv_i2c_dma.o(i.drv_i2c_master_read_dma) + i.drv_i2c_master_write_dma 0x000168a4 Section 0 drv_i2c_dma.o(i.drv_i2c_master_write_dma) + i.drv_i2c_master_write_read_cmd 0x000168e0 Section 0 drv_i2c_dma.o(i.drv_i2c_master_write_read_cmd) + drv_i2c_master_write_read_cmd 0x000168e1 Thumb Code 62 drv_i2c_dma.o(i.drv_i2c_master_write_read_cmd) + i.drv_i2c_s_clear_it_pending_bit 0x0001691e Section 0 drv_i2c_slave.o(i.drv_i2c_s_clear_it_pending_bit) + i.drv_i2c_s_config_intr 0x00016960 Section 0 drv_i2c_slave.o(i.drv_i2c_s_config_intr) + i.drv_i2c_s_enable 0x00016964 Section 0 drv_i2c_slave.o(i.drv_i2c_s_enable) + i.drv_i2c_s_get_fifo_status 0x0001696c Section 0 drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) + i.drv_i2c_s_set_intr 0x00016980 Section 0 drv_i2c_slave.o(i.drv_i2c_s_set_intr) + i.drv_i2c_s_write_data 0x000169d0 Section 0 drv_i2c_slave.o(i.drv_i2c_s_write_data) + i.drv_i2c_set_dma_irq_callback 0x000169ec Section 0 drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) + i.drv_i2c_slave_init 0x00016a44 Section 0 drv_i2c_slave.o(i.drv_i2c_slave_init) + i.drv_i2c_slave_write_dma 0x00016a78 Section 0 drv_i2c_dma.o(i.drv_i2c_slave_write_dma) + i.drv_lcdc_config_bypass 0x00016a90 Section 0 drv_lcdc.o(i.drv_lcdc_config_bypass) + i.drv_lcdc_config_ccm 0x00016aa8 Section 0 drv_lcdc.o(i.drv_lcdc_config_ccm) + i.drv_lcdc_config_disp_mode 0x00016ad8 Section 0 drv_lcdc.o(i.drv_lcdc_config_disp_mode) + i.drv_lcdc_config_dpi_polarity 0x00016aee Section 0 drv_lcdc.o(i.drv_lcdc_config_dpi_polarity) + i.drv_lcdc_config_dpi_timing 0x00016b12 Section 0 drv_lcdc.o(i.drv_lcdc_config_dpi_timing) + i.drv_lcdc_config_edpi_mode 0x00016b38 Section 0 drv_lcdc.o(i.drv_lcdc_config_edpi_mode) + i.drv_lcdc_config_endianness 0x00016b4e Section 0 drv_lcdc.o(i.drv_lcdc_config_endianness) + i.drv_lcdc_config_input_size 0x00016b64 Section 0 drv_lcdc.o(i.drv_lcdc_config_input_size) + i.drv_lcdc_config_int 0x00016b70 Section 0 drv_lcdc.o(i.drv_lcdc_config_int) + i.drv_lcdc_config_int_single 0x00016b8e Section 0 drv_lcdc.o(i.drv_lcdc_config_int_single) + i.drv_lcdc_config_overwrite 0x00016bb0 Section 0 drv_lcdc.o(i.drv_lcdc_config_overwrite) + i.drv_lcdc_config_overwrite_rgb 0x00016bd2 Section 0 drv_lcdc.o(i.drv_lcdc_config_overwrite_rgb) + i.drv_lcdc_config_partial_display_area 0x00016bde Section 0 drv_lcdc.o(i.drv_lcdc_config_partial_display_area) + i.drv_lcdc_config_partial_display_enable 0x00016bf8 Section 0 drv_lcdc.o(i.drv_lcdc_config_partial_display_enable) + i.drv_lcdc_config_scale_up_coef 0x00016c1a Section 0 drv_lcdc.o(i.drv_lcdc_config_scale_up_coef) + i.drv_lcdc_config_scale_up_step 0x00016c34 Section 0 drv_lcdc.o(i.drv_lcdc_config_scale_up_step) + i.drv_lcdc_config_src_parameter 0x00016c40 Section 0 drv_lcdc.o(i.drv_lcdc_config_src_parameter) + i.drv_lcdc_config_thresh 0x00016c8c Section 0 drv_lcdc.o(i.drv_lcdc_config_thresh) + i.drv_lcdc_ctrl_flow 0x00016c92 Section 0 drv_lcdc.o(i.drv_lcdc_ctrl_flow) + i.drv_lcdc_enable_shadow_reg 0x00016ca4 Section 0 drv_lcdc.o(i.drv_lcdc_enable_shadow_reg) + i.drv_lcdc_set_int 0x00016cc4 Section 0 drv_lcdc.o(i.drv_lcdc_set_int) + i.drv_lcdc_set_prefetch 0x00016d04 Section 0 drv_lcdc.o(i.drv_lcdc_set_prefetch) + i.drv_lcdc_set_video_hw_mode 0x00016d1c Section 0 drv_lcdc.o(i.drv_lcdc_set_video_hw_mode) + i.drv_lcdc_start 0x00016d30 Section 0 drv_lcdc.o(i.drv_lcdc_start) + i.drv_memc_clear_status 0x00016d50 Section 0 drv_memc.o(i.drv_memc_clear_status) + i.drv_memc_enable_irq 0x00016d5c Section 0 drv_memc.o(i.drv_memc_enable_irq) + i.drv_memc_gen_a_tear_signal 0x00016d9c Section 0 drv_memc.o(i.drv_memc_gen_a_tear_signal) + i.drv_memc_get_status 0x00016da8 Section 0 drv_memc.o(i.drv_memc_get_status) + i.drv_memc_rate_transfer_sel 0x00016dba Section 0 drv_memc.o(i.drv_memc_rate_transfer_sel) + i.drv_memc_sel_vsync 0x00016dca Section 0 drv_memc.o(i.drv_memc_sel_vsync) + i.drv_memc_set_active_height 0x00016dd8 Section 0 drv_memc.o(i.drv_memc_set_active_height) + i.drv_memc_set_data_mode 0x00016dec Section 0 drv_memc.o(i.drv_memc_set_data_mode) + i.drv_memc_set_double_buffer 0x00016df8 Section 0 drv_memc.o(i.drv_memc_set_double_buffer) + i.drv_memc_set_double_buffer_reverse 0x00016e08 Section 0 drv_memc.o(i.drv_memc_set_double_buffer_reverse) + i.drv_memc_set_fs_en_conditions 0x00016e1a Section 0 drv_memc.o(i.drv_memc_set_fs_en_conditions) + i.drv_memc_set_inten 0x00016e2a Section 0 drv_memc.o(i.drv_memc_set_inten) + i.drv_memc_set_lcdc_st_conditions 0x00016e40 Section 0 drv_memc.o(i.drv_memc_set_lcdc_st_conditions) + i.drv_memc_set_ltpo_mode 0x00016e58 Section 0 drv_memc.o(i.drv_memc_set_ltpo_mode) + i.drv_memc_set_tear_mode 0x00016e72 Section 0 drv_memc.o(i.drv_memc_set_tear_mode) + i.drv_memc_set_tear_waveform 0x00016e80 Section 0 drv_memc.o(i.drv_memc_set_tear_waveform) + i.drv_memc_set_vidc_sync_cnt 0x00016ea8 Section 0 drv_memc.o(i.drv_memc_set_vidc_sync_cnt) + i.drv_param_init_get_ccm 0x00016eb8 Section 0 drv_param_init.o(i.drv_param_init_get_ccm) + i.drv_param_init_get_scld_filter_h 0x00016ec0 Section 0 drv_param_init.o(i.drv_param_init_get_scld_filter_h) + i.drv_param_init_get_scld_filter_v 0x00016ed4 Section 0 drv_param_init.o(i.drv_param_init_get_scld_filter_v) + i.drv_param_init_get_sclu_filter 0x00016ee8 Section 0 drv_param_init.o(i.drv_param_init_get_sclu_filter) + i.drv_param_init_set_ccm 0x00016ef0 Section 0 drv_param_init.o(i.drv_param_init_set_ccm) + i.drv_param_p2r_filter_init 0x00016f04 Section 0 drv_param_init.o(i.drv_param_p2r_filter_init) + i.drv_phy_enable_calibration 0x00016f28 Section 0 drv_phy_common.o(i.drv_phy_enable_calibration) + i.drv_phy_get_calibration 0x00016f38 Section 0 drv_phy_common.o(i.drv_phy_get_calibration) + i.drv_phy_get_pll_para 0x00016f74 Section 0 drv_phy_common.o(i.drv_phy_get_pll_para) + i.drv_phy_get_rate_para 0x00016fd4 Section 0 drv_phy_common.o(i.drv_phy_get_rate_para) + i.drv_phy_test_clear 0x00017028 Section 0 drv_phy_common.o(i.drv_phy_test_clear) + i.drv_phy_test_lock 0x00017038 Section 0 drv_phy_common.o(i.drv_phy_test_lock) + i.drv_phy_test_write_1_byte 0x00017050 Section 0 drv_phy_common.o(i.drv_phy_test_write_1_byte) + i.drv_phy_test_write_2_byte 0x00017070 Section 0 drv_phy_common.o(i.drv_phy_test_write_2_byte) + i.drv_phy_test_write_code 0x00017096 Section 0 drv_phy_common.o(i.drv_phy_test_write_code) + i.drv_phy_test_write_data 0x000170b4 Section 0 drv_phy_common.o(i.drv_phy_test_write_data) + drv_phy_test_write_data 0x000170b5 Thumb Code 32 drv_phy_common.o(i.drv_phy_test_write_data) + i.drv_pwr_set_cp_mode 0x000170d4 Section 0 drv_pwr.o(i.drv_pwr_set_cp_mode) + i.drv_pwr_set_pvd_mode 0x000170f4 Section 0 drv_pwr.o(i.drv_pwr_set_pvd_mode) + i.drv_pwr_set_system_clk_src 0x0001710c Section 0 drv_pwr.o(i.drv_pwr_set_system_clk_src) + i.drv_rx_phy_test_clear 0x00017144 Section 0 drv_dsi_rx.o(i.drv_rx_phy_test_clear) + drv_rx_phy_test_clear 0x00017145 Thumb Code 12 drv_dsi_rx.o(i.drv_rx_phy_test_clear) + i.drv_rx_phy_test_lock 0x00017150 Section 0 drv_dsi_rx.o(i.drv_rx_phy_test_lock) + drv_rx_phy_test_lock 0x00017151 Thumb Code 16 drv_dsi_rx.o(i.drv_rx_phy_test_lock) + i.drv_rx_phy_test_write_1_byte 0x00017160 Section 0 drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) + drv_rx_phy_test_write_1_byte 0x00017161 Thumb Code 20 drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) + i.drv_rx_phy_test_write_2_byte 0x00017174 Section 0 drv_dsi_rx.o(i.drv_rx_phy_test_write_2_byte) + drv_rx_phy_test_write_2_byte 0x00017175 Thumb Code 22 drv_dsi_rx.o(i.drv_rx_phy_test_write_2_byte) + i.drv_rxbr_clear_pkt_buffer 0x0001718a Section 0 drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) + i.drv_rxbr_clear_status0 0x00017194 Section 0 drv_rxbr.o(i.drv_rxbr_clear_status0) + i.drv_rxbr_enable_irq 0x00017198 Section 0 drv_rxbr.o(i.drv_rxbr_enable_irq) + i.drv_rxbr_frame_drop_cfg 0x000171f4 Section 0 drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) + i.drv_rxbr_get_clk 0x00017208 Section 0 drv_rxbr.o(i.drv_rxbr_get_clk) + i.drv_rxbr_get_col_addr 0x0001726c Section 0 drv_rxbr.o(i.drv_rxbr_get_col_addr) + i.drv_rxbr_get_int_source 0x00017270 Section 0 hal_internal_vsync.o(i.drv_rxbr_get_int_source) + drv_rxbr_get_int_source 0x00017271 Thumb Code 18 hal_internal_vsync.o(i.drv_rxbr_get_int_source) + i.drv_rxbr_get_page_addr 0x00017282 Section 0 drv_rxbr.o(i.drv_rxbr_get_page_addr) + i.drv_rxbr_get_status0 0x00017286 Section 0 hal_internal_vsync.o(i.drv_rxbr_get_status0) + drv_rxbr_get_status0 0x00017287 Thumb Code 18 hal_internal_vsync.o(i.drv_rxbr_get_status0) + i.drv_rxbr_hline_rcv0_cfg 0x00017298 Section 0 drv_rxbr.o(i.drv_rxbr_hline_rcv0_cfg) + i.drv_rxbr_hline_rcv_cfg 0x000172a4 Section 0 drv_rxbr.o(i.drv_rxbr_hline_rcv_cfg) + i.drv_rxbr_register_irq0_callback 0x000172ac Section 0 drv_rxbr.o(i.drv_rxbr_register_irq0_callback) + i.drv_rxbr_register_irq1_callback 0x000172b8 Section 0 drv_rxbr.o(i.drv_rxbr_register_irq1_callback) + i.drv_rxbr_set_ack_pkt_header 0x000172c4 Section 0 drv_rxbr.o(i.drv_rxbr_set_ack_pkt_header) + i.drv_rxbr_set_cmd_filter 0x000172d8 Section 0 drv_rxbr.o(i.drv_rxbr_set_cmd_filter) + i.drv_rxbr_set_color_format 0x000173a4 Section 0 drv_rxbr.o(i.drv_rxbr_set_color_format) + i.drv_rxbr_set_inten 0x000173b8 Section 0 drv_rxbr.o(i.drv_rxbr_set_inten) + i.drv_rxbr_set_ltpo_drop_th 0x000173cc Section 0 drv_rxbr.o(i.drv_rxbr_set_ltpo_drop_th) + i.drv_rxbr_set_usr_cfg 0x000173dc Section 0 drv_rxbr.o(i.drv_rxbr_set_usr_cfg) + i.drv_rxbr_set_usr_col 0x00017402 Section 0 drv_rxbr.o(i.drv_rxbr_set_usr_col) + i.drv_rxbr_set_usr_row 0x0001740a Section 0 drv_rxbr.o(i.drv_rxbr_set_usr_row) + i.drv_spi_m_read_data 0x00017414 Section 0 drv_spi_master.o(i.drv_spi_m_read_data) + i.drv_swire_set_int 0x00017434 Section 0 drv_swire.o(i.drv_swire_set_int) + i.drv_swire_set_power_down 0x00017488 Section 0 drv_swire.o(i.drv_swire_set_power_down) + i.drv_sys_cfg_clear_all_int 0x000174a4 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_clear_all_int) + i.drv_sys_cfg_clear_pending 0x000174b0 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) + i.drv_sys_cfg_sel_ap_rst_lvl_trig 0x000174d8 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_lvl_trig) + i.drv_sys_cfg_sel_ap_rst_trig 0x000174f0 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) + i.drv_sys_cfg_sel_gpio_group 0x0001750c Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_gpio_group) + i.drv_sys_cfg_sel_int_trig 0x00017530 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_int_trig) + i.drv_sys_cfg_set_dma_rx_req 0x00017554 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) + i.drv_sys_cfg_set_dma_tx_req 0x00017564 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) + i.drv_sys_cfg_set_int 0x00017574 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_set_int) + i.drv_timer_clear_status_flags 0x00017598 Section 0 drv_timer.o(i.drv_timer_clear_status_flags) + drv_timer_clear_status_flags 0x00017599 Thumb Code 26 drv_timer.o(i.drv_timer_clear_status_flags) + i.drv_timer_enable 0x000175b2 Section 0 drv_timer.o(i.drv_timer_enable) + i.drv_timer_get_instance 0x000175d4 Section 0 drv_timer.o(i.drv_timer_get_instance) + i.drv_timer_get_prescaler 0x000175e4 Section 0 drv_timer.o(i.drv_timer_get_prescaler) + i.drv_timer_handle_interrupt 0x000175f4 Section 0 drv_timer.o(i.drv_timer_handle_interrupt) + drv_timer_handle_interrupt 0x000175f5 Thumb Code 62 drv_timer.o(i.drv_timer_handle_interrupt) + i.drv_timer_register_callback 0x00017638 Section 0 drv_timer.o(i.drv_timer_register_callback) + i.drv_timer_set_compare_val 0x0001764c Section 0 drv_timer.o(i.drv_timer_set_compare_val) + i.drv_timer_set_int 0x0001765c Section 0 drv_timer.o(i.drv_timer_set_int) + i.drv_timer_set_prescaler 0x000176b0 Section 0 drv_timer.o(i.drv_timer_set_prescaler) + i.drv_tx_phy_test_clear 0x000176d8 Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_clear) + drv_tx_phy_test_clear 0x000176d9 Thumb Code 10 drv_dsi_tx.o(i.drv_tx_phy_test_clear) + i.drv_tx_phy_test_enter 0x000176e2 Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_enter) + i.drv_tx_phy_test_exit 0x000176fe Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_exit) + i.drv_tx_phy_test_write_1_byte 0x0001771a Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) + drv_tx_phy_test_write_1_byte 0x0001771b Thumb Code 18 drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) + i.drv_tx_phy_test_write_2_byte 0x0001772c Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_write_2_byte) + drv_tx_phy_test_write_2_byte 0x0001772d Thumb Code 20 drv_dsi_tx.o(i.drv_tx_phy_test_write_2_byte) + i.drv_tx_phy_test_write_code 0x00017740 Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_write_code) + drv_tx_phy_test_write_code 0x00017741 Thumb Code 16 drv_dsi_tx.o(i.drv_tx_phy_test_write_code) + i.drv_vidc_clear_irq 0x00017750 Section 0 drv_vidc.o(i.drv_vidc_clear_irq) + i.drv_vidc_enable 0x00017758 Section 0 drv_vidc.o(i.drv_vidc_enable) + i.drv_vidc_enable_irq 0x00017770 Section 0 drv_vidc.o(i.drv_vidc_enable_irq) + i.drv_vidc_get_irq_status 0x000177b0 Section 0 drv_vidc.o(i.drv_vidc_get_irq_status) + i.drv_vidc_init_module_enable 0x000177c4 Section 0 drv_vidc.o(i.drv_vidc_init_module_enable) + i.drv_vidc_register_callback 0x000177ec Section 0 drv_vidc.o(i.drv_vidc_register_callback) + i.drv_vidc_reset 0x000177f8 Section 0 drv_vidc.o(i.drv_vidc_reset) + i.drv_vidc_set_dst_parameter 0x000177fe Section 0 drv_vidc.o(i.drv_vidc_set_dst_parameter) + i.drv_vidc_set_irqen 0x0001783a Section 0 drv_vidc.o(i.drv_vidc_set_irqen) + i.drv_vidc_set_mirror 0x0001784e Section 0 drv_vidc.o(i.drv_vidc_set_mirror) + i.drv_vidc_set_p2r_hcoef0 0x0001785e Section 0 drv_vidc.o(i.drv_vidc_set_p2r_hcoef0) + i.drv_vidc_set_p2r_hinitb 0x00017866 Section 0 drv_vidc.o(i.drv_vidc_set_p2r_hinitb) + i.drv_vidc_set_p2r_hinitr 0x0001788c Section 0 drv_vidc.o(i.drv_vidc_set_p2r_hinitr) + i.drv_vidc_set_pentile_swap 0x000178b4 Section 0 drv_vidc.o(i.drv_vidc_set_pentile_swap) + i.drv_vidc_set_pu_ctrl 0x000178cc Section 0 drv_vidc.o(i.drv_vidc_set_pu_ctrl) + i.drv_vidc_set_rotation 0x000178d6 Section 0 drv_vidc.o(i.drv_vidc_set_rotation) + i.drv_vidc_set_scld_hcoef0 0x000178e6 Section 0 drv_vidc.o(i.drv_vidc_set_scld_hcoef0) + i.drv_vidc_set_scld_hcoef1 0x000178f0 Section 0 drv_vidc.o(i.drv_vidc_set_scld_hcoef1) + i.drv_vidc_set_scld_step 0x000178fa Section 0 drv_vidc.o(i.drv_vidc_set_scld_step) + i.drv_vidc_set_scld_vcoef0 0x0001790c Section 0 drv_vidc.o(i.drv_vidc_set_scld_vcoef0) + i.drv_vidc_set_scld_vcoef1 0x00017916 Section 0 drv_vidc.o(i.drv_vidc_set_scld_vcoef1) + i.drv_vidc_set_src_parameter 0x00017920 Section 0 drv_vidc.o(i.drv_vidc_set_src_parameter) + i.drv_wdg_clear_counter 0x00017938 Section 0 drv_wdg.o(i.drv_wdg_clear_counter) + i.drv_wdg_clear_edge_flag 0x00017948 Section 0 drv_wdg.o(i.drv_wdg_clear_edge_flag) + drv_wdg_clear_edge_flag 0x00017949 Thumb Code 12 drv_wdg.o(i.drv_wdg_clear_edge_flag) + i.drv_wdg_read_edge_flag 0x00017958 Section 0 drv_wdg.o(i.drv_wdg_read_edge_flag) + drv_wdg_read_edge_flag 0x00017959 Thumb Code 10 drv_wdg.o(i.drv_wdg_read_edge_flag) + i.drv_wdg_set_int 0x00017968 Section 0 drv_wdg.o(i.drv_wdg_set_int) + i.fls_clr_interrupt_flag 0x000179a8 Section 0 drv_fls.o(i.fls_clr_interrupt_flag) + i.fputc 0x000179b2 Section 0 tau_log.o(i.fputc) + i.hal_dsi_rx_ctrl_create_handle 0x000179c8 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) + i.hal_dsi_rx_ctrl_deinit 0x000179fc Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) + i.hal_dsi_rx_ctrl_dsc_async_handler 0x00017a98 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) + i.hal_dsi_rx_ctrl_gen_a_tear_signal 0x00017b1c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) + i.hal_dsi_rx_ctrl_get_max_ret_size 0x00017b44 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) + i.hal_dsi_rx_ctrl_hight_performan_mode 0x00017b6c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) + i.hal_dsi_rx_ctrl_init 0x00017bd0 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) + i.hal_dsi_rx_ctrl_init_clk 0x00017c68 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) + hal_dsi_rx_ctrl_init_clk 0x00017c69 Thumb Code 332 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) + i.hal_dsi_rx_ctrl_init_dsi_rx 0x00017e0c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) + hal_dsi_rx_ctrl_init_dsi_rx 0x00017e0d Thumb Code 184 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) + i.hal_dsi_rx_ctrl_init_memc 0x00017ee4 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) + hal_dsi_rx_ctrl_init_memc 0x00017ee5 Thumb Code 334 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) + i.hal_dsi_rx_ctrl_init_rxbr 0x0001803c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) + hal_dsi_rx_ctrl_init_rxbr 0x0001803d Thumb Code 312 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) + i.hal_dsi_rx_ctrl_init_vidc 0x00018184 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) + hal_dsi_rx_ctrl_init_vidc 0x00018185 Thumb Code 544 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) + i.hal_dsi_rx_ctrl_pre_init_pps 0x000183b0 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_pre_init_pps) + i.hal_dsi_rx_ctrl_send_ack_cmd 0x000183ec Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) + i.hal_dsi_rx_ctrl_set_cus_sync_line 0x000184dc Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) + i.hal_dsi_rx_ctrl_set_hw_tear_mode 0x00018510 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode) + i.hal_dsi_rx_ctrl_set_ipi_cfg 0x00018544 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) + hal_dsi_rx_ctrl_set_ipi_cfg 0x00018545 Thumb Code 50 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) + i.hal_dsi_rx_ctrl_set_rxbr_clk 0x0001857c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) + hal_dsi_rx_ctrl_set_rxbr_clk 0x0001857d Thumb Code 114 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) + i.hal_dsi_rx_ctrl_set_sw_tear_mode 0x000185f0 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) + i.hal_dsi_rx_ctrl_set_tear_mode_ex 0x00018624 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_tear_mode_ex) + i.hal_dsi_rx_ctrl_start 0x00018634 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) + i.hal_dsi_rx_ctrl_stop 0x00018670 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) + i.hal_dsi_rx_ctrl_toggle_resolution 0x000186ac Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) + i.hal_dsi_tx_calc_video_chunks 0x000186cc Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) + hal_dsi_tx_calc_video_chunks 0x000186cd Thumb Code 384 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) + i.hal_dsi_tx_config_params_for_lane_rate 0x0001885c Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) + hal_dsi_tx_config_params_for_lane_rate 0x0001885d Thumb Code 42 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) + i.hal_dsi_tx_count_lane_rate 0x00018890 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) + hal_dsi_tx_count_lane_rate 0x00018891 Thumb Code 1022 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) + i.hal_dsi_tx_ctrl_create_handle 0x00018ce0 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) + i.hal_dsi_tx_ctrl_deinit 0x00018d0c Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) + i.hal_dsi_tx_ctrl_enter_init_panel_mode 0x00018d90 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) + i.hal_dsi_tx_ctrl_exit_init_panel_mode 0x00018ddc Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) + i.hal_dsi_tx_ctrl_init 0x00018e04 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) + i.hal_dsi_tx_ctrl_init_clk 0x00018ea8 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) + hal_dsi_tx_ctrl_init_clk 0x00018ea9 Thumb Code 36 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) + i.hal_dsi_tx_ctrl_panel_reset_pin 0x00018ecc Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_panel_reset_pin) + i.hal_dsi_tx_ctrl_set_ccm 0x00018ed8 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) + i.hal_dsi_tx_ctrl_set_overwrite_rgb 0x00018ef8 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) + i.hal_dsi_tx_ctrl_set_partial_disp 0x00018f0c Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp) + i.hal_dsi_tx_ctrl_set_partial_disp_area 0x00018f1c Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp_area) + i.hal_dsi_tx_ctrl_start 0x00018f40 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) + i.hal_dsi_tx_ctrl_stop 0x00018fdc Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) + i.hal_dsi_tx_ctrl_write_array_cmd 0x00019020 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) + i.hal_dsi_tx_ctrl_write_cmd 0x000190f8 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) + i.hal_dsi_tx_init_data_mode 0x000191a8 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) + hal_dsi_tx_init_data_mode 0x000191a9 Thumb Code 58 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) + i.hal_dsi_tx_init_dpi_cfg 0x000191ec Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) + hal_dsi_tx_init_dpi_cfg 0x000191ed Thumb Code 42 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) + i.hal_dsi_tx_init_interrupt 0x0001921c Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) + hal_dsi_tx_init_interrupt 0x0001921d Thumb Code 28 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) + i.hal_dsi_tx_init_phy_cfg 0x0001923c Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) + hal_dsi_tx_init_phy_cfg 0x0001923d Thumb Code 28 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) + i.hal_dsi_tx_init_remains 0x0001925c Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) + hal_dsi_tx_init_remains 0x0001925d Thumb Code 142 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) + i.hal_dsi_tx_init_video_mode 0x000192f0 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) + hal_dsi_tx_init_video_mode 0x000192f1 Thumb Code 82 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) + i.hal_dsi_tx_send_cmd 0x00019348 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) + hal_dsi_tx_send_cmd 0x00019349 Thumb Code 60 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) + i.hal_gpio_ctrl_eint 0x0001938c Section 0 hal_gpio.o(i.hal_gpio_ctrl_eint) + i.hal_gpio_get_input_data 0x000193a4 Section 0 hal_gpio.o(i.hal_gpio_get_input_data) + i.hal_gpio_init_eint 0x000193b8 Section 0 hal_gpio.o(i.hal_gpio_init_eint) + i.hal_gpio_init_input 0x000193f8 Section 0 hal_gpio.o(i.hal_gpio_init_input) + i.hal_gpio_init_output 0x00019418 Section 0 hal_gpio.o(i.hal_gpio_init_output) + i.hal_gpio_reg_eint_cb 0x00019440 Section 0 hal_gpio.o(i.hal_gpio_reg_eint_cb) + i.hal_gpio_set_ap_reset_int 0x00019458 Section 0 hal_gpio.o(i.hal_gpio_set_ap_reset_int) + i.hal_gpio_set_mode 0x000194a8 Section 0 hal_gpio.o(i.hal_gpio_set_mode) + i.hal_gpio_set_output_data 0x00019508 Section 0 hal_gpio.o(i.hal_gpio_set_output_data) + i.hal_gpio_set_pull_state 0x00019510 Section 0 hal_gpio.o(i.hal_gpio_set_pull_state) + i.hal_i2c_m_dma_init 0x00019530 Section 0 hal_i2c_master.o(i.hal_i2c_m_dma_init) + i.hal_i2c_m_dma_read 0x0001959c Section 0 hal_i2c_master.o(i.hal_i2c_m_dma_read) + i.hal_i2c_m_dma_write 0x000195bc Section 0 hal_i2c_master.o(i.hal_i2c_m_dma_write) + i.hal_i2c_m_transfer_complate 0x000195d8 Section 0 hal_i2c_master.o(i.hal_i2c_m_transfer_complate) + i.hal_i2c_master_irq_callback 0x000195e4 Section 0 hal_i2c_master.o(i.hal_i2c_master_irq_callback) + hal_i2c_master_irq_callback 0x000195e5 Thumb Code 24 hal_i2c_master.o(i.hal_i2c_master_irq_callback) + i.hal_i2c_s_dma_user_callback 0x00019604 Section 0 hal_i2c_slave.o(i.hal_i2c_s_dma_user_callback) + hal_i2c_s_dma_user_callback 0x00019605 Thumb Code 12 hal_i2c_slave.o(i.hal_i2c_s_dma_user_callback) + i.hal_i2c_s_dma_write 0x00019614 Section 0 hal_i2c_slave.o(i.hal_i2c_s_dma_write) + i.hal_i2c_s_init 0x00019660 Section 0 hal_i2c_slave.o(i.hal_i2c_s_init) + i.hal_i2c_s_nonblocking_read 0x00019728 Section 0 hal_i2c_slave.o(i.hal_i2c_s_nonblocking_read) + i.hal_i2c_s_set_transfer 0x0001973c Section 0 hal_i2c_slave.o(i.hal_i2c_s_set_transfer) + i.hal_i2c_slave_irq_callback 0x00019748 Section 0 hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) + hal_i2c_slave_irq_callback 0x00019749 Thumb Code 356 hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) + i.hal_internal_init_memc 0x000198bc Section 0 hal_internal_vsync.o(i.hal_internal_init_memc) + i.hal_internal_sync_get_fb_setting 0x000199b8 Section 0 hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) + i.hal_internal_sync_get_hight_performan_mode 0x000199c8 Section 0 hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) + i.hal_internal_sync_input_resolution_change 0x000199d8 Section 0 hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) + i.hal_internal_update_dpi_param 0x00019c04 Section 0 hal_internal_vsync.o(i.hal_internal_update_dpi_param) + i.hal_internal_video_mode_auto_sync 0x00019c14 Section 0 hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) + i.hal_internal_vsync_deinit 0x00019d40 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_deinit) + i.hal_internal_vsync_get_rx_state 0x00019d68 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) + i.hal_internal_vsync_get_sync_line 0x00019d74 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) + i.hal_internal_vsync_get_tear_mode 0x00019d8c Section 0 hal_internal_vsync.o(i.hal_internal_vsync_get_tear_mode) + i.hal_internal_vsync_get_tx_state 0x00019d98 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) + i.hal_internal_vsync_init_rx 0x00019da4 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_init_rx) + i.hal_internal_vsync_init_tx 0x00019ebc Section 0 hal_internal_vsync.o(i.hal_internal_vsync_init_tx) + i.hal_internal_vsync_set_auto_hw_filter 0x00019f6c Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) + i.hal_internal_vsync_set_rx_state 0x0001a088 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) + i.hal_internal_vsync_set_sync_line 0x0001a09c Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) + i.hal_internal_vsync_set_tear_mode 0x0001a0c0 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) + i.hal_internal_vsync_set_tx_state 0x0001a110 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) + i.hal_lcdc_config_ccm 0x0001a190 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) + hal_lcdc_config_ccm 0x0001a191 Thumb Code 30 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) + i.hal_lcdc_config_remains 0x0001a1b4 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) + hal_lcdc_config_remains 0x0001a1b5 Thumb Code 84 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) + i.hal_lcdc_config_rgb_to_pentile 0x0001a20c Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_rgb_to_pentile) + hal_lcdc_config_rgb_to_pentile 0x0001a20d Thumb Code 14 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_rgb_to_pentile) + i.hal_lcdc_config_upscaler 0x0001a220 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) + hal_lcdc_config_upscaler 0x0001a221 Thumb Code 348 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) + i.hal_lcdc_init_cfg 0x0001a384 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) + hal_lcdc_init_cfg 0x0001a385 Thumb Code 78 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) + i.hal_lcdc_init_clk 0x0001a3d8 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) + hal_lcdc_init_clk 0x0001a3d9 Thumb Code 422 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) + i.hal_lcdc_init_interrupt 0x0001a588 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) + hal_lcdc_init_interrupt 0x0001a589 Thumb Code 58 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) + i.hal_spi_m_clear_rxfifo 0x0001a5c8 Section 0 hal_spi_master.o(i.hal_spi_m_clear_rxfifo) + i.hal_swire_open 0x0001a5d6 Section 0 hal_swire.o(i.hal_swire_open) + i.hal_system_enable_systick 0x0001a5ec Section 0 hal_system.o(i.hal_system_enable_systick) + i.hal_system_init 0x0001a5f4 Section 0 hal_system.o(i.hal_system_init) + i.hal_system_init_console 0x0001a67c Section 0 hal_system.o(i.hal_system_init_console) + i.hal_system_set_phy_calibration 0x0001a698 Section 0 hal_system.o(i.hal_system_set_phy_calibration) + i.hal_system_set_pvd 0x0001a6a0 Section 0 hal_system.o(i.hal_system_set_pvd) + i.hal_system_set_vcc 0x0001a6a8 Section 0 hal_system.o(i.hal_system_set_vcc) + i.hal_timer_init 0x0001a6b0 Section 0 hal_timer.o(i.hal_timer_init) + i.hal_timer_start 0x0001a6cc Section 0 hal_timer.o(i.hal_timer_start) + i.hal_timer_stop 0x0001a714 Section 0 hal_timer.o(i.hal_timer_stop) + i.hal_uart_init 0x0001a73c Section 0 hal_uart.o(i.hal_uart_init) + i.hal_uart_transmit_blocking 0x0001a7c8 Section 0 hal_uart.o(i.hal_uart_transmit_blocking) + i.handle_init 0x0001a7d8 Section 0 irq_redirect .o(i.handle_init) + i.init_mipi_tx 0x0001a8e8 Section 0 ap_demo.o(i.init_mipi_tx) + init_mipi_tx 0x0001a8e9 Thumb Code 96 ap_demo.o(i.init_mipi_tx) + i.init_panel 0x0001a94c Section 0 ap_demo.o(i.init_panel) + init_panel 0x0001a94d Thumb Code 126 ap_demo.o(i.init_panel) + i.main 0x0001a9d4 Section 0 main.o(i.main) + i.open_mipi_rx 0x0001a9e0 Section 0 ap_demo.o(i.open_mipi_rx) + open_mipi_rx 0x0001a9e1 Thumb Code 138 ap_demo.o(i.open_mipi_rx) + i.pps_update_handle 0x0001aa80 Section 0 ap_demo.o(i.pps_update_handle) + pps_update_handle 0x0001aa81 Thumb Code 80 ap_demo.o(i.pps_update_handle) + i.rx_get_dcs_packet_data 0x0001aad4 Section 0 hal_internal_vsync.o(i.rx_get_dcs_packet_data) + rx_get_dcs_packet_data 0x0001aad5 Thumb Code 654 hal_internal_vsync.o(i.rx_get_dcs_packet_data) + i.rx_partial_update 0x0001aec8 Section 0 hal_internal_vsync.o(i.rx_partial_update) + rx_partial_update 0x0001aec9 Thumb Code 358 hal_internal_vsync.o(i.rx_partial_update) + i.rx_receive_packet 0x0001b040 Section 0 hal_internal_vsync.o(i.rx_receive_packet) + rx_receive_packet 0x0001b041 Thumb Code 128 hal_internal_vsync.o(i.rx_receive_packet) + i.rx_receive_pps 0x0001b0cc Section 0 hal_internal_vsync.o(i.rx_receive_pps) + rx_receive_pps 0x0001b0cd Thumb Code 268 hal_internal_vsync.o(i.rx_receive_pps) + i.rxbr_irq0_callback 0x0001b24c Section 0 hal_internal_vsync.o(i.rxbr_irq0_callback) + rxbr_irq0_callback 0x0001b24d Thumb Code 158 hal_internal_vsync.o(i.rxbr_irq0_callback) + i.rxbr_irq1_callback 0x0001b2f0 Section 0 hal_internal_vsync.o(i.rxbr_irq1_callback) + rxbr_irq1_callback 0x0001b2f1 Thumb Code 324 hal_internal_vsync.o(i.rxbr_irq1_callback) + i.soft_gen_te 0x0001b4cc Section 0 hal_internal_vsync.o(i.soft_gen_te) + soft_gen_te 0x0001b4cd Thumb Code 166 hal_internal_vsync.o(i.soft_gen_te) + i.soft_gen_te_double_buffer 0x0001b590 Section 0 hal_internal_vsync.o(i.soft_gen_te_double_buffer) + soft_gen_te_double_buffer 0x0001b591 Thumb Code 166 hal_internal_vsync.o(i.soft_gen_te_double_buffer) + i.soft_timer3_cb 0x0001b650 Section 0 ap_demo.o(i.soft_timer3_cb) + soft_timer3_cb 0x0001b651 Thumb Code 36 ap_demo.o(i.soft_timer3_cb) + i.sqrt 0x0001b680 Section 0 sqrt.o(i.sqrt) + i.tp_heartbeat_exec 0x0001b6c8 Section 0 ap_demo.o(i.tp_heartbeat_exec) + i.vidc_callback 0x0001b708 Section 0 hal_internal_vsync.o(i.vidc_callback) + vidc_callback 0x0001b709 Thumb Code 232 hal_internal_vsync.o(i.vidc_callback) + i.vpre_err_reset 0x0001b810 Section 0 hal_internal_vsync.o(i.vpre_err_reset) + vpre_err_reset 0x0001b811 Thumb Code 184 hal_internal_vsync.o(i.vpre_err_reset) + i.vsync_set_te_mode 0x0001b8e0 Section 0 hal_internal_vsync.o(i.vsync_set_te_mode) + vsync_set_te_mode 0x0001b8e1 Thumb Code 300 hal_internal_vsync.o(i.vsync_set_te_mode) + .constdata 0x0001baac Section 248 ap_demo.o(.constdata) + g_cus_rx_dcs_execute_table 0x0001baac Data 120 ap_demo.o(.constdata) + .constdata 0x0001bba4 Section 32 app_tp_st_touch.o(.constdata) + .constdata 0x0001bbc4 Section 36 hal_dsi_tx_ctrl.o(.constdata) + .constdata 0x0001bbe8 Section 210 hal_gpio.o(.constdata) + s_gpio_map 0x0001bbe8 Data 120 hal_gpio.o(.constdata) + s_gpio_perf 0x0001bc60 Data 90 hal_gpio.o(.constdata) + .constdata 0x0001bcbc Section 32 hal_i2c_slave.o(.constdata) + sg_i2c_s_config 0x0001bcbc Data 32 hal_i2c_slave.o(.constdata) + .constdata 0x0001bcdc Section 8528 app_tp_for_custom_s8.o(.constdata) + .constdata 0x0001de2c Section 1 app_tp_for_custom_s8.o(.constdata) + .constdata 0x0001de30 Section 8 drv_param_init.o(.constdata) + .constdata 0x0001de38 Section 390 drv_phy_common.o(.constdata) + phy_para_mapping_h 0x0001de38 Data 184 drv_phy_common.o(.constdata) + phy_para_mapping_l 0x0001def0 Data 128 drv_phy_common.o(.constdata) + phy_data_high_map 0x0001df70 Data 48 drv_phy_common.o(.constdata) + phy_data_lp_map 0x0001dfa0 Data 30 drv_phy_common.o(.constdata) + .conststring 0x0001dfc0 Section 72 hal_dsi_rx_ctrl.o(.conststring) + .conststring 0x0001e008 Section 67 hal_dsi_tx_ctrl.o(.conststring) + .conststring 0x0001e04c Section 308 hal_internal_vsync.o(.conststring) + .ARM.__AT_0x00070100 0x00070100 Section 192 irq_redirect .o(.ARM.__AT_0x00070100) + .data 0x000701d0 Section 7526 ap_demo.o(.data) + start_display_on 0x000701d0 Data 1 ap_demo.o(.data) + g_need_enter_sleep_mode 0x000701d1 Data 1 ap_demo.o(.data) + g_mipi_path_off 0x000701d2 Data 1 ap_demo.o(.data) + phone_off_flag 0x000701d3 Data 1 ap_demo.o(.data) + g_exit_sleep_mode 0x000701d4 Data 1 ap_demo.o(.data) + panel_display_done 0x000701d5 Data 1 ap_demo.o(.data) + phone_power_on 0x000701d6 Data 1 ap_demo.o(.data) + bl_adj_flag 0x000701de Data 1 ap_demo.o(.data) + b3_read_flag 0x000701e0 Data 1 ap_demo.o(.data) + c8_read_flag 0x000701e1 Data 1 ap_demo.o(.data) + c9_read_flag 0x000701e2 Data 1 ap_demo.o(.data) + c9_read_flag2 0x000701e3 Data 1 ap_demo.o(.data) + c9_read_flag3 0x000701e4 Data 1 ap_demo.o(.data) + flag_5a 0x000701e5 Data 1 ap_demo.o(.data) + frame_rate 0x000701e6 Data 1 ap_demo.o(.data) + g_rx_ctrl_handle 0x000701f8 Data 4 ap_demo.o(.data) + g_tx_ctrl_handle 0x000701fc Data 4 ap_demo.o(.data) + value_reg_df 0x00070208 Data 4 ap_demo.o(.data) + .data 0x00071f36 Section 23 app_tp_transfer.o(.data) + s_spim_write 0x00071f36 Data 1 app_tp_transfer.o(.data) + s_screen_int_flag 0x00071f37 Data 1 app_tp_transfer.o(.data) + s_phone_reset_flag 0x00071f38 Data 1 app_tp_transfer.o(.data) + s_screen_int_transfer_status 0x00071f39 Data 1 app_tp_transfer.o(.data) + s_screen_const_transfer_count 0x00071f3b Data 1 app_tp_transfer.o(.data) + screen_int_transfer_count 0x00071f3c Data 1 app_tp_transfer.o(.data) + screen_int_transfer_buffer_ready 0x00071f3d Data 1 app_tp_transfer.o(.data) + .data 0x00071f4d Section 40 app_tp_st_touch.o(.data) + s_calibration_flag 0x00071f4d Data 1 app_tp_st_touch.o(.data) + s_calibration_correct_flag 0x00071f4e Data 1 app_tp_st_touch.o(.data) + .data 0x00071f78 Section 8 hal_dsi_rx_ctrl.o(.data) + g_hw_auto_filter 0x00071f78 Data 1 hal_dsi_rx_ctrl.o(.data) + g_esc_clk 0x00071f7c Data 4 hal_dsi_rx_ctrl.o(.data) + .data 0x00071f80 Section 3 hal_dsi_tx_ctrl.o(.data) + g_tx_vcom_en 0x00071f80 Data 1 hal_dsi_tx_ctrl.o(.data) + g_tx_vpg_en 0x00071f81 Data 1 hal_dsi_tx_ctrl.o(.data) + g_tx_mode 0x00071f82 Data 1 hal_dsi_tx_ctrl.o(.data) + .data 0x00071f83 Section 1 hal_i2c_master.o(.data) + s_i2c_m_transfer_end 0x00071f83 Data 1 hal_i2c_master.o(.data) + .data 0x00071f84 Section 32 hal_i2c_slave.o(.data) + s_txbuffer_complate 0x00071f84 Data 1 hal_i2c_slave.o(.data) + s_i2c_s_dma_end 0x00071f85 Data 1 hal_i2c_slave.o(.data) + s_i2c_s_receive_cnt 0x00071f86 Data 1 hal_i2c_slave.o(.data) + sg_i2c_s_index 0x00071f87 Data 1 hal_i2c_slave.o(.data) + s_hal_slave_rxbuffer 0x00071f88 Data 4 hal_i2c_slave.o(.data) + s_hal_slave_rxbuffer_size 0x00071f8c Data 4 hal_i2c_slave.o(.data) + hal_i2c_s_callback 0x00071f90 Data 4 hal_i2c_slave.o(.data) + sg_tx_byte_num 0x00071f94 Data 4 hal_i2c_slave.o(.data) + s_receive_count 0x00071f98 Data 4 hal_i2c_slave.o(.data) + s_tx_buffer_t 0x00071f9c Data 4 hal_i2c_slave.o(.data) + tx_sum 0x00071fa0 Data 4 hal_i2c_slave.o(.data) + .data 0x00071fa4 Section 228 app_tp_for_custom_s8.o(.data) + app_tp_count 0x00071fae Data 1 app_tp_for_custom_s8.o(.data) + phone_85_flag 0x00071faf Data 1 app_tp_for_custom_s8.o(.data) + phone_F6_flag 0x00071fb0 Data 1 app_tp_for_custom_s8.o(.data) + phone_E4_flag 0x00071fb1 Data 1 app_tp_for_custom_s8.o(.data) + phone_72_flag 0x00071fb2 Data 1 app_tp_for_custom_s8.o(.data) + phone_75_flag 0x00071fb3 Data 1 app_tp_for_custom_s8.o(.data) + phone_92_flag 0x00071fb4 Data 1 app_tp_for_custom_s8.o(.data) + phone_74_flag 0x00071fb5 Data 1 app_tp_for_custom_s8.o(.data) + u16CoordY 0x00071fb8 Data 2 app_tp_for_custom_s8.o(.data) + u16CoordX 0x00071fba Data 2 app_tp_for_custom_s8.o(.data) + u16CoordY_back 0x00071fbc Data 2 app_tp_for_custom_s8.o(.data) + u16CoordX_back 0x00071fbe Data 2 app_tp_for_custom_s8.o(.data) + .data 0x00072088 Section 1 app_tp_for_custom_s8.o(.data) + .data 0x00072089 Section 1 app_tp_for_custom_s8.o(.data) + .data 0x0007208a Section 1 app_tp_for_custom_s8.o(.data) + .data 0x0007208b Section 3 app_tp_for_custom_s8.o(.data) + .data 0x0007208e Section 5 app_tp_for_custom_s8.o(.data) + .data 0x00072094 Section 48 app_tp_for_custom_s8.o(.data) + .data 0x000720c4 Section 24 hal_internal_vsync.o(.data) + sg_cmd_mode_tx_start 0x000720c4 Data 1 hal_internal_vsync.o(.data) + sg_cur_te_info 0x000720c8 Data 4 hal_internal_vsync.o(.data) + g_cus_rx_write_cmd_handle 0x000720d0 Data 12 hal_internal_vsync.o(.data) + .data 0x000720dc Section 12 drv_common.o(.data) + s_my_tick 0x000720dc Data 4 drv_common.o(.data) + .data 0x000720e8 Section 4 drv_gpio.o(.data) + g_ap_reset_cb 0x000720e8 Data 4 drv_gpio.o(.data) + .data 0x000720ec Section 8 drv_i2c_dma.o(.data) + i2c0_dma_callback 0x000720ec Data 4 drv_i2c_dma.o(.data) + i2c1_dma_callback 0x000720f0 Data 4 drv_i2c_dma.o(.data) + .data 0x000720f4 Section 4 drv_i2c_master.o(.data) + i2c1_intr_callback 0x000720f4 Data 4 drv_i2c_master.o(.data) + .data 0x000720f8 Section 4 drv_i2c_slave.o(.data) + i2c0_intr_callback 0x000720f8 Data 4 drv_i2c_slave.o(.data) + .data 0x000720fc Section 1188 drv_param_init.o(.data) + .data 0x000725a0 Section 4 drv_spi_master.o(.data) + SPIM_intr_callback 0x000725a0 Data 4 drv_spi_master.o(.data) + .data 0x000725a4 Section 8 drv_swire.o(.data) + s_swire_cb 0x000725a4 Data 8 drv_swire.o(.data) + .data 0x000725ac Section 1 drv_sys_cfg.o(.data) + sg_ap_rstn_trigger_type 0x000725ac Data 1 drv_sys_cfg.o(.data) + .data 0x000725b0 Section 80 drv_timer.o(.data) + sg_timer_info 0x000725b0 Data 80 drv_timer.o(.data) + .data 0x00072600 Section 8 drv_rxbr.o(.data) + .data 0x00072608 Section 4 drv_vidc.o(.data) + .data 0x0007260c Section 1 drv_phy_common.o(.data) + g_phy_calibration 0x0007260c Data 1 drv_phy_common.o(.data) + .data 0x00072610 Section 12 drv_chip_info.o(.data) + sg_chip_info 0x00072610 Data 4 drv_chip_info.o(.data) + sg_chip_function 0x00072614 Data 4 drv_chip_info.o(.data) + sg_chip_encrypt 0x00072618 Data 4 drv_chip_info.o(.data) + .data 0x0007261c Section 6 app_tp_enc.o(.data) + init_flag 0x0007261c Data 1 app_tp_enc.o(.data) + g_u8EncryptFlag 0x0007261d Data 1 app_tp_enc.o(.data) + g_u8EncryptData 0x0007261e Data 1 app_tp_enc.o(.data) + g_u16EncryptCnt 0x00072620 Data 2 app_tp_enc.o(.data) + .data 0x00072624 Section 18 norflash.o(.data) + tmprg 0x0007262c Data 4 norflash.o(.data) + .data 0x00072638 Section 12 drv_pwm.o(.data) + s_pwm_type 0x00072638 Data 1 drv_pwm.o(.data) + s_pwm_cb 0x0007263c Data 8 drv_pwm.o(.data) + .data 0x00072644 Section 8 drv_uart.o(.data) + s_UartFcrReg 0x00072644 Data 4 drv_uart.o(.data) + uart_userData 0x00072648 Data 4 drv_uart.o(.data) + .data 0x0007264c Section 12 drv_wdg.o(.data) + sg_wdg_repeat 0x0007264c Data 1 drv_wdg.o(.data) + sg_wdg_cb 0x00072650 Data 8 drv_wdg.o(.data) + .data 0x00072658 Section 4 stdout.o(.data) + .data 0x0007265c Section 4 errno.o(.data) + _errno 0x0007265c Data 4 errno.o(.data) + .bss 0x00072660 Section 400 app_tp_transfer.o(.bss) + s_screen_read_buffer 0x00072660 Data 200 app_tp_transfer.o(.bss) + s_phone_read_buffer 0x00072728 Data 200 app_tp_transfer.o(.bss) + .bss 0x000727f0 Section 12 app_tp_st_touch.o(.bss) + .bss 0x000727fc Section 196 hal_dsi_rx_ctrl.o(.bss) + g_rx_ctrl_handle 0x000727fc Data 196 hal_dsi_rx_ctrl.o(.bss) + .bss 0x000728c0 Section 76 hal_dsi_tx_ctrl.o(.bss) + g_tx_ctrl_handle 0x000728c0 Data 76 hal_dsi_tx_ctrl.o(.bss) + .bss 0x0007290c Section 208 hal_uart.o(.bss) + .bss 0x000729dc Section 2436 hal_internal_vsync.o(.bss) + g_imm_buffer 0x00073240 Data 255 hal_internal_vsync.o(.bss) + sg_te_info 0x00073340 Data 12 hal_internal_vsync.o(.bss) + g_imm_packet 0x0007334c Data 20 hal_internal_vsync.o(.bss) + .bss 0x00073360 Section 28 drv_dma.o(.bss) + s_dma_handle 0x00073360 Data 28 drv_dma.o(.bss) + .bss 0x0007337c Section 64 drv_gpio.o(.bss) + s_gpio_cb 0x0007337c Data 64 drv_gpio.o(.bss) + .bss 0x000733bc Section 320 drv_i2c_dma.o(.bss) + i2c0_dma_slave_handle 0x000733bc Data 160 drv_i2c_dma.o(.bss) + i2c1_dma_master_handle 0x0007345c Data 160 drv_i2c_dma.o(.bss) + .bss 0x000734fc Section 4144 dcs_packet_fifo.o(.bss) + .bss 0x0007452c Section 256 tau_log.o(.bss) + .bss 0x0007462c Section 32 hal_spi_slave.o(.bss) + STACK 0x00074650 Section 4096 startup_armcm0.o(STACK) + + Global Symbols + + Symbol Name Value Ov Type Size Object(Section) + + BuildAttributes$$THM_ISAv3M$S$PE$A:L22$X:L11$S22$IEEE1$IW$USESV6$~STKCKD$USESV7$~SHL$OTIME$ROPI$IEEEJ$EBA8$MICROLIB$REQ8$PRES8$EABIv2 0x00000000 Number 0 anon$$obj.o ABSOLUTE + __ARM_use_no_argv 0x00000000 Number 0 main.o ABSOLUTE + _printf_a 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_c 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_charcount 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_d 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_e 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_f 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_flags 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_fp_dec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_fp_hex 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_g 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_i 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_int_dec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_l 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_lc 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_ll 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_lld 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_lli 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_llo 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_llu 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_llx 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_longlong_dec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_longlong_hex 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_longlong_oct 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_ls 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_mbtowc 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_n 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_o 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_p 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_percent 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_pre_padding 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_return_value 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_s 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_sizespec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_str 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_truncate_signed 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_truncate_unsigned 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_u 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_wc 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_wctomb 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_widthprec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_x 0x00000000 Number 0 stubs.o ABSOLUTE + __cpp_initialize__aeabi_ - Undefined Weak Reference + __cxa_finalize - Undefined Weak Reference + _clock_init - Undefined Weak Reference + _microlib_exit - Undefined Weak Reference + __Vectors_Size 0x000000c0 Number 0 startup_armcm0.o ABSOLUTE + __Vectors 0x00010000 Data 4 startup_armcm0.o(RESET) + __Vectors_End 0x000100c0 Data 0 startup_armcm0.o(RESET) + __main 0x000100c1 Thumb Code 0 entry.o(.ARM.Collect$$$$00000000) + _main_stk 0x000100c1 Thumb Code 0 entry2.o(.ARM.Collect$$$$00000001) + _main_scatterload 0x000100c5 Thumb Code 0 entry5.o(.ARM.Collect$$$$00000004) + __main_after_scatterload 0x000100c9 Thumb Code 0 entry5.o(.ARM.Collect$$$$00000004) + _main_clock 0x000100c9 Thumb Code 0 entry7b.o(.ARM.Collect$$$$00000008) + _main_cpp_init 0x000100c9 Thumb Code 0 entry8b.o(.ARM.Collect$$$$0000000A) + _main_init 0x000100c9 Thumb Code 0 entry9a.o(.ARM.Collect$$$$0000000B) + __rt_final_cpp 0x000100d1 Thumb Code 0 entry10a.o(.ARM.Collect$$$$0000000D) + __rt_final_exit 0x000100d1 Thumb Code 0 entry11a.o(.ARM.Collect$$$$0000000F) + Reset_Handler 0x000100d5 Thumb Code 28 startup_armcm0.o(.text) + NMI_Handler 0x000100f1 Thumb Code 2 startup_armcm0.o(.text) + SVC_Handler 0x000100f5 Thumb Code 2 startup_armcm0.o(.text) + PendSV_Handler 0x000100f7 Thumb Code 2 startup_armcm0.o(.text) + OTP_IRQn_Handler 0x00010123 Thumb Code 2 startup_armcm0.o(.text) + PVD_IRQn_Handler 0x00010127 Thumb Code 2 startup_armcm0.o(.text) + __aeabi_uidiv 0x0001014d Thumb Code 0 uidiv.o(.text) + __aeabi_uidivmod 0x0001014d Thumb Code 44 uidiv.o(.text) + __aeabi_idiv 0x00010179 Thumb Code 0 idiv.o(.text) + __aeabi_idivmod 0x00010179 Thumb Code 40 idiv.o(.text) + __aeabi_memcpy 0x000101a1 Thumb Code 36 memcpya.o(.text) + __aeabi_memcpy4 0x000101a1 Thumb Code 0 memcpya.o(.text) + __aeabi_memcpy8 0x000101a1 Thumb Code 0 memcpya.o(.text) + __aeabi_memset 0x000101c5 Thumb Code 14 memseta.o(.text) + __aeabi_memset4 0x000101c5 Thumb Code 0 memseta.o(.text) + __aeabi_memset8 0x000101c5 Thumb Code 0 memseta.o(.text) + __aeabi_memclr 0x000101d3 Thumb Code 4 memseta.o(.text) + __aeabi_memclr4 0x000101d3 Thumb Code 0 memseta.o(.text) + __aeabi_memclr8 0x000101d3 Thumb Code 0 memseta.o(.text) + _memset$wrapper 0x000101d7 Thumb Code 18 memseta.o(.text) + __aeabi_fadd 0x000101e9 Thumb Code 162 fadd.o(.text) + __aeabi_fsub 0x0001028b Thumb Code 8 fadd.o(.text) + __aeabi_frsub 0x00010293 Thumb Code 8 fadd.o(.text) + __aeabi_fmul 0x0001029b Thumb Code 122 fmul.o(.text) + __aeabi_fdiv 0x00010315 Thumb Code 124 fdiv.o(.text) + __ARM_scalbnf 0x00010391 Thumb Code 24 fscalb.o(.text) + scalbnf 0x00010391 Thumb Code 0 fscalb.o(.text) + __aeabi_dadd 0x000103a9 Thumb Code 328 dadd.o(.text) + __aeabi_dsub 0x000104f1 Thumb Code 12 dadd.o(.text) + __aeabi_drsub 0x000104fd Thumb Code 12 dadd.o(.text) + __aeabi_dmul 0x0001050d Thumb Code 202 dmul.o(.text) + __aeabi_ddiv 0x000105dd Thumb Code 234 ddiv.o(.text) + __aeabi_i2f 0x000106cd Thumb Code 22 fflti.o(.text) + __aeabi_ui2f 0x000106e3 Thumb Code 14 ffltui.o(.text) + __aeabi_ui2d 0x000106f1 Thumb Code 24 dfltui.o(.text) + __aeabi_f2iz 0x0001070d Thumb Code 50 ffixi.o(.text) + __aeabi_f2uiz 0x0001073f Thumb Code 40 ffixui.o(.text) + __aeabi_d2iz 0x00010769 Thumb Code 62 dfixi.o(.text) + __aeabi_d2uiz 0x000107b1 Thumb Code 50 dfixui.o(.text) + __aeabi_f2d 0x000107ed Thumb Code 40 f2d.o(.text) + __aeabi_cdcmpeq 0x00010815 Thumb Code 0 cdcmple.o(.text) + __aeabi_cdcmple 0x00010815 Thumb Code 38 cdcmple.o(.text) + __aeabi_cfrcmple 0x0001083d Thumb Code 20 cfrcmple.o(.text) + __aeabi_uldivmod 0x00010851 Thumb Code 96 uldiv.o(.text) + __aeabi_llsl 0x000108b1 Thumb Code 32 llshl.o(.text) + _ll_shift_l 0x000108b1 Thumb Code 0 llshl.o(.text) + __aeabi_llsr 0x000108d1 Thumb Code 34 llushr.o(.text) + _ll_ushift_r 0x000108d1 Thumb Code 0 llushr.o(.text) + __aeabi_lasr 0x000108f3 Thumb Code 38 llsshr.o(.text) + _ll_sshift_r 0x000108f3 Thumb Code 0 llsshr.o(.text) + __I$use$fp 0x00010919 Thumb Code 0 iusefp.o(.text) + _float_round 0x00010919 Thumb Code 16 fepilogue.o(.text) + _float_epilogue 0x00010929 Thumb Code 114 fepilogue.o(.text) + _double_round 0x0001099b Thumb Code 26 depilogue.o(.text) + _double_epilogue 0x000109b5 Thumb Code 164 depilogue.o(.text) + _dsqrt 0x00010a59 Thumb Code 162 dsqrt.o(.text) + __aeabi_d2ulz 0x00010afd Thumb Code 54 dfixul.o(.text) + __aeabi_cdrcmple 0x00010b3d Thumb Code 38 cdrcmple.o(.text) + __scatterload 0x00010b65 Thumb Code 28 init.o(.text) + __scatterload_rt2 0x00010b65 Thumb Code 0 init.o(.text) + __decompress 0x00010b89 Thumb Code 0 __dczerorl2.o(.text) + __decompress1 0x00010b89 Thumb Code 86 __dczerorl2.o(.text) + ADC_IRQn_Handler 0x00010be1 Thumb Code 18 irq_redirect .o(i.ADC_IRQn_Handler) + AP_NRESET_IRQn_Handler 0x00010bf9 Thumb Code 18 irq_redirect .o(i.AP_NRESET_IRQn_Handler) + CRC16_2 0x00010c11 Thumb Code 54 app_tp_st_touch.o(i.CRC16_2) + DMA_IRQn_Handler 0x00010c51 Thumb Code 14 irq_redirect .o(i.DMA_IRQn_Handler) + EXTI_INT0_IRQn_Handler 0x00010c65 Thumb Code 22 irq_redirect .o(i.EXTI_INT0_IRQn_Handler) + EXTI_INT1_IRQn_Handler 0x00010c81 Thumb Code 22 irq_redirect .o(i.EXTI_INT1_IRQn_Handler) + EXTI_INT2_IRQn_Handler 0x00010c9d Thumb Code 22 irq_redirect .o(i.EXTI_INT2_IRQn_Handler) + EXTI_INT3_IRQn_Handler 0x00010cb9 Thumb Code 22 irq_redirect .o(i.EXTI_INT3_IRQn_Handler) + EXTI_INT4_IRQn_Handler 0x00010cd5 Thumb Code 22 irq_redirect .o(i.EXTI_INT4_IRQn_Handler) + EXTI_INT5_IRQn_Handler 0x00010cf1 Thumb Code 22 irq_redirect .o(i.EXTI_INT5_IRQn_Handler) + EXTI_INT6_IRQn_Handler 0x00010d0d Thumb Code 22 irq_redirect .o(i.EXTI_INT6_IRQn_Handler) + EXTI_INT7_IRQn_Handler 0x00010d29 Thumb Code 22 irq_redirect .o(i.EXTI_INT7_IRQn_Handler) + EncryptCheck 0x00010d45 Thumb Code 90 app_tp_enc.o(i.EncryptCheck) + FLSCTRL_IRQn_Handler 0x00010da9 Thumb Code 14 irq_redirect .o(i.FLSCTRL_IRQn_Handler) + Gpio_swire_output 0x00010dbd Thumb Code 110 ap_demo.o(i.Gpio_swire_output) + HardFault_Handler 0x00010e31 Thumb Code 14 irq_redirect .o(i.HardFault_Handler) + I2C0_IRQn_Handler 0x00010e45 Thumb Code 18 irq_redirect .o(i.I2C0_IRQn_Handler) + I2C1_IRQn_Handler 0x00010e5d Thumb Code 18 irq_redirect .o(i.I2C1_IRQn_Handler) + LCDC_IRQn_Handler 0x00010e75 Thumb Code 18 irq_redirect .o(i.LCDC_IRQn_Handler) + LOG_printf 0x00010e8d Thumb Code 30 tau_log.o(i.LOG_printf) + MEMC_IRQn_Handler 0x00010eb5 Thumb Code 18 irq_redirect .o(i.MEMC_IRQn_Handler) + MIPI_RX_IRQn_Handler 0x00010ecd Thumb Code 18 irq_redirect .o(i.MIPI_RX_IRQn_Handler) + MIPI_TX_IRQn_Handler 0x00010ee5 Thumb Code 18 irq_redirect .o(i.MIPI_TX_IRQn_Handler) + PWMDET_IRQn_Handler 0x00010efd Thumb Code 22 irq_redirect .o(i.PWMDET_IRQn_Handler) + SPIM_IRQn_Handler 0x00010f19 Thumb Code 22 irq_redirect .o(i.SPIM_IRQn_Handler) + SPIS_IRQn_Handler 0x00010f35 Thumb Code 22 irq_redirect .o(i.SPIS_IRQn_Handler) + SWIRE_IRQn_Handler 0x00010f51 Thumb Code 22 irq_redirect .o(i.SWIRE_IRQn_Handler) + SysTick_Handler 0x00010f6d Thumb Code 18 irq_redirect .o(i.SysTick_Handler) + TIMER0_IRQn_Handler 0x00010f85 Thumb Code 18 irq_redirect .o(i.TIMER0_IRQn_Handler) + TIMER1_IRQn_Handler 0x00010f9d Thumb Code 18 irq_redirect .o(i.TIMER1_IRQn_Handler) + TIMER2_IRQn_Handler 0x00010fb5 Thumb Code 18 irq_redirect .o(i.TIMER2_IRQn_Handler) + TIMER3_IRQn_Handler 0x00010fcd Thumb Code 18 irq_redirect .o(i.TIMER3_IRQn_Handler) + UART0_IRQ_Handle 0x00010fe5 Thumb Code 20 drv_uart.o(i.UART0_IRQ_Handle) + s_RAM_CK 0x00011000 Data 20 drv_common.o(.ARM.__at_0x11000) + UART_DisableDma 0x00011015 Thumb Code 2 drv_uart.o(i.UART_DisableDma) + __scatterload_null 0x00011017 Thumb Code 2 handlers.o(i.__scatterload_null) + s_debug_state 0x00011018 Data 4 drv_common.o(.ARM.__at_0x11018) + S20_Start_init 0x0001101d Thumb Code 300 app_tp_transfer.o(i.S20_Start_init) + UART_GetInstance 0x00011161 Thumb Code 4 drv_uart.o(i.UART_GetInstance) + UART_IRQn_Handler 0x00011165 Thumb Code 18 irq_redirect .o(i.UART_IRQn_Handler) + UART_ResetRxFIFO 0x0001117d Thumb Code 32 drv_uart.o(i.UART_ResetRxFIFO) + UART_SetBaudRate 0x000111a1 Thumb Code 72 drv_uart.o(i.UART_SetBaudRate) + UART_SwitchSCLK 0x000111e9 Thumb Code 26 drv_uart.o(i.UART_SwitchSCLK) + UART_TransferHandleIRQ 0x00011203 Thumb Code 308 drv_uart.o(i.UART_TransferHandleIRQ) + UART_WriteBlocking 0x00011337 Thumb Code 26 drv_uart.o(i.UART_WriteBlocking) + UART_init 0x00011351 Thumb Code 182 drv_uart.o(i.UART_init) + VIDC_IRQn_Handler 0x0001140d Thumb Code 18 irq_redirect .o(i.VIDC_IRQn_Handler) + VPRE_IRQn_Handler 0x00011425 Thumb Code 18 irq_redirect .o(i.VPRE_IRQn_Handler) + WDG_IRQn_Handler 0x0001143d Thumb Code 18 irq_redirect .o(i.WDG_IRQn_Handler) + __0printf 0x00011455 Thumb Code 24 printfa.o(i.__0printf) + __1printf 0x00011455 Thumb Code 0 printfa.o(i.__0printf) + __2printf 0x00011455 Thumb Code 0 printfa.o(i.__0printf) + __c89printf 0x00011455 Thumb Code 0 printfa.o(i.__0printf) + printf 0x00011455 Thumb Code 0 printfa.o(i.__0printf) + __0vsprintf 0x00011475 Thumb Code 30 printfa.o(i.__0vsprintf) + __1vsprintf 0x00011475 Thumb Code 0 printfa.o(i.__0vsprintf) + __2vsprintf 0x00011475 Thumb Code 0 printfa.o(i.__0vsprintf) + __c89vsprintf 0x00011475 Thumb Code 0 printfa.o(i.__0vsprintf) + vsprintf 0x00011475 Thumb Code 0 printfa.o(i.__0vsprintf) + __ARM_clz 0x00011499 Thumb Code 46 depilogue.o(i.__ARM_clz) + __ARM_common_switch8 0x000114c7 Thumb Code 26 ap_demo.o(i.__ARM_common_switch8) + __scatterload_copy 0x0001158d Thumb Code 14 handlers.o(i.__scatterload_copy) + __scatterload_zeroinit 0x0001159b Thumb Code 14 handlers.o(i.__scatterload_zeroinit) + __set_errno 0x000115a9 Thumb Code 6 errno.o(i.__set_errno) + ap_demo 0x00012ec9 Thumb Code 292 ap_demo.o(i.ap_demo) + ap_get_tp_calibration_status_01 0x000130d9 Thumb Code 28 app_tp_st_touch.o(i.ap_get_tp_calibration_status_01) + ap_set_tp_calibration_04 0x00013455 Thumb Code 138 app_tp_st_touch.o(i.ap_set_tp_calibration_04) + ap_tp_st_touch_calibration 0x000134ed Thumb Code 170 app_tp_st_touch.o(i.ap_tp_st_touch_calibration) + ap_tp_st_touch_error_handler_F3 0x0001359d Thumb Code 14 app_tp_st_touch.o(i.ap_tp_st_touch_error_handler_F3) + ap_tp_st_touch_error_handler_FF 0x000135ab Thumb Code 32 app_tp_st_touch.o(i.ap_tp_st_touch_error_handler_FF) + ap_tp_st_touch_get_calibration_success_mark 0x000135cd Thumb Code 150 app_tp_st_touch.o(i.ap_tp_st_touch_get_calibration_success_mark) + ap_tp_st_touch_hardware_reset 0x00013675 Thumb Code 126 app_tp_st_touch.o(i.ap_tp_st_touch_hardware_reset) + ap_tp_st_touch_scan_point_init 0x000136fd Thumb Code 24 app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_init) + ap_tp_st_touch_scan_point_record_event 0x00013719 Thumb Code 142 app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_record_event) + ap_tp_st_touch_scan_point_record_event_exec 0x000137ad Thumb Code 44 app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_record_event_exec) + ap_tp_st_touch_simulate_finger_release_event 0x000137e1 Thumb Code 44 app_tp_st_touch.o(i.ap_tp_st_touch_simulate_finger_release_event) + app_ADC_IRQn_Handler 0x00013841 Thumb Code 22 drv_rxbr.o(i.app_ADC_IRQn_Handler) + app_AP_NRESET_IRQn_Handler 0x0001385d Thumb Code 32 drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) + app_EXTI_INT0_IRQn_Handler 0x00013881 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) + app_EXTI_INT1_IRQn_Handler 0x0001389d Thumb Code 22 drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) + app_EXTI_INT2_IRQn_Handler 0x000138b9 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) + app_EXTI_INT3_IRQn_Handler 0x000138d5 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) + app_EXTI_INT4_IRQn_Handler 0x000138f1 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) + app_EXTI_INT5_IRQn_Handler 0x0001390d Thumb Code 22 drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) + app_EXTI_INT6_IRQn_Handler 0x00013929 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) + app_EXTI_INT7_IRQn_Handler 0x00013945 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) + app_HardFault_Handler 0x00013961 Thumb Code 12 drv_common.o(i.app_HardFault_Handler) + app_I2C0_IRQn_Handler 0x000139a9 Thumb Code 14 drv_i2c_slave.o(i.app_I2C0_IRQn_Handler) + app_I2C1_IRQn_Handler 0x000139c1 Thumb Code 8 drv_i2c_master.o(i.app_I2C1_IRQn_Handler) + app_LCDC_IRQn_Handler 0x000139d1 Thumb Code 208 hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) + app_MEMC_IRQn_Handler 0x00013b75 Thumb Code 132 drv_memc.o(i.app_MEMC_IRQn_Handler) + app_MIPI_RX_IRQn_Handler 0x00013bfd Thumb Code 232 drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) + app_MIPI_TX_IRQn_Handler 0x00013e95 Thumb Code 56 drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) + app_PWMDET_IRQn_Handler 0x00013f35 Thumb Code 62 drv_pwm.o(i.app_PWMDET_IRQn_Handler) + app_SPIM_IRQn_Handler 0x00013f7d Thumb Code 34 drv_spi_master.o(i.app_SPIM_IRQn_Handler) + app_SPIS_IRQn_Handler 0x00013fad Thumb Code 500 hal_spi_slave.o(i.app_SPIS_IRQn_Handler) + app_SWIRE_IRQn_Handler 0x000141ad Thumb Code 28 drv_swire.o(i.app_SWIRE_IRQn_Handler) + app_SysTick_Handler 0x000141cd Thumb Code 20 drv_common.o(i.app_SysTick_Handler) + app_TIMER0_IRQn_Handler 0x000141e5 Thumb Code 10 drv_timer.o(i.app_TIMER0_IRQn_Handler) + app_TIMER1_IRQn_Handler 0x000141ef Thumb Code 10 drv_timer.o(i.app_TIMER1_IRQn_Handler) + app_TIMER2_IRQn_Handler 0x000141f9 Thumb Code 10 drv_timer.o(i.app_TIMER2_IRQn_Handler) + app_TIMER3_IRQn_Handler 0x00014203 Thumb Code 10 drv_timer.o(i.app_TIMER3_IRQn_Handler) + app_UART_IRQn_Handler 0x0001420d Thumb Code 8 drv_uart.o(i.app_UART_IRQn_Handler) + app_VIDC_IRQn_Handler 0x00014215 Thumb Code 22 drv_vidc.o(i.app_VIDC_IRQn_Handler) + app_VPRE_IRQn_Handler 0x00014231 Thumb Code 22 drv_rxbr.o(i.app_VPRE_IRQn_Handler) + app_WDG_IRQn_Handler 0x0001424d Thumb Code 52 drv_wdg.o(i.app_WDG_IRQn_Handler) + app_dma_irq_handler 0x00014285 Thumb Code 10 drv_dma.o(i.app_dma_irq_handler) + app_fls_ctrl_Handler 0x00014295 Thumb Code 38 norflash.o(i.app_fls_ctrl_Handler) + app_tp_I2C_init 0x000142c5 Thumb Code 26 app_tp_transfer.o(i.app_tp_I2C_init) + app_tp_calibration_exec 0x000142e9 Thumb Code 50 app_tp_st_touch.o(i.app_tp_calibration_exec) + app_tp_init 0x00014351 Thumb Code 52 app_tp_transfer.o(i.app_tp_init) + app_tp_m_read 0x00014391 Thumb Code 32 app_tp_transfer.o(i.app_tp_m_read) + app_tp_m_write 0x000143b1 Thumb Code 8 app_tp_transfer.o(i.app_tp_m_write) + app_tp_phone_analysis_data 0x000143b9 Thumb Code 992 app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) + app_tp_phone_clear_reset_on 0x000147d5 Thumb Code 8 app_tp_transfer.o(i.app_tp_phone_clear_reset_on) + app_tp_s_read 0x000147e1 Thumb Code 8 app_tp_transfer.o(i.app_tp_s_read) + app_tp_s_write 0x000147e9 Thumb Code 8 app_tp_transfer.o(i.app_tp_s_write) + app_tp_screen_analysis_int 0x000147f1 Thumb Code 718 app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) + app_tp_transfer_screen_int 0x00014b19 Thumb Code 336 app_tp_transfer.o(i.app_tp_transfer_screen_int) + app_tp_transfer_screen_start 0x00014c79 Thumb Code 18 app_tp_transfer.o(i.app_tp_transfer_screen_start) + blue_change_ccm 0x00014c91 Thumb Code 54 ap_demo.o(i.blue_change_ccm) + board_Init 0x00014cc9 Thumb Code 30 board.o(i.board_Init) + calc_framebuffer_setting 0x00014ced Thumb Code 1258 hal_internal_vsync.o(i.calc_framebuffer_setting) + ceil 0x000151dd Thumb Code 180 ceil.o(i.ceil) + dcs_packet_fifo_alloc 0x00015361 Thumb Code 80 dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) + dcs_packet_fifo_init 0x000153b9 Thumb Code 18 dcs_packet_fifo.o(i.dcs_packet_fifo_init) + dcs_packet_free_fifo_header 0x000153d1 Thumb Code 60 dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) + dcs_packet_get_fifo_header 0x00015415 Thumb Code 26 dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) + delayMs 0x00015465 Thumb Code 24 tau_delay.o(i.delayMs) + delayUs 0x0001547d Thumb Code 34 tau_delay.o(i.delayUs) + drv_ap_rst_trig_edge_detect 0x000154f9 Thumb Code 46 drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) + drv_chip_info_get_info 0x00015531 Thumb Code 6 drv_chip_info.o(i.drv_chip_info_get_info) + drv_chip_info_init 0x0001553d Thumb Code 56 drv_chip_info.o(i.drv_chip_info_init) + drv_chip_rx_info_check 0x0001557d Thumb Code 98 drv_chip_info.o(i.drv_chip_rx_info_check) + drv_chip_rx_init_done 0x0001562d Thumb Code 16 drv_chip_info.o(i.drv_chip_rx_init_done) + drv_common_enable_systick 0x00015641 Thumb Code 70 drv_common.o(i.drv_common_enable_systick) + drv_common_system_init 0x00015699 Thumb Code 8 drv_common.o(i.drv_common_system_init) + drv_crgu_config_reset_modules 0x000156a1 Thumb Code 10 drv_crgu.o(i.drv_crgu_config_reset_modules) + drv_crgu_set_ahb_pre_div 0x000156b1 Thumb Code 14 drv_crgu.o(i.drv_crgu_set_ahb_pre_div) + drv_crgu_set_ahb_src 0x000156c5 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_ahb_src) + drv_crgu_set_clock 0x000156d9 Thumb Code 26 drv_crgu.o(i.drv_crgu_set_clock) + drv_crgu_set_dpi_mux_src 0x000156f9 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dpi_mux_src) + drv_crgu_set_dpi_pre_div 0x0001570d Thumb Code 18 drv_crgu.o(i.drv_crgu_set_dpi_pre_div) + drv_crgu_set_dpi_pre_src 0x00015725 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dpi_pre_src) + drv_crgu_set_dsc_core_div 0x00015739 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dsc_core_div) + drv_crgu_set_dsco_src 0x0001574d Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dsco_src) + drv_crgu_set_dsco_src_div 0x00015761 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dsco_src_div) + drv_crgu_set_fb_div 0x00015775 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_fb_div) + drv_crgu_set_fb_src 0x00015789 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_fb_src) + drv_crgu_set_lcdc_div 0x0001579d Thumb Code 16 drv_crgu.o(i.drv_crgu_set_lcdc_div) + drv_crgu_set_lcdc_src 0x000157b1 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_lcdc_src) + drv_crgu_set_mipi_cfg_src 0x000157c5 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_mipi_cfg_src) + drv_crgu_set_mipi_ref_src 0x000157d9 Thumb Code 18 drv_crgu.o(i.drv_crgu_set_mipi_ref_src) + drv_crgu_set_reset 0x000157f1 Thumb Code 20 drv_crgu.o(i.drv_crgu_set_reset) + drv_crgu_set_rxbr_div 0x00015809 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_rxbr_div) + drv_crgu_set_rxbr_src 0x0001581d Thumb Code 16 drv_crgu.o(i.drv_crgu_set_rxbr_src) + drv_crgu_set_vidc_src 0x00015831 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_vidc_src) + drv_dma_clear_flag 0x00015845 Thumb Code 24 drv_dma.o(i.drv_dma_clear_flag) + drv_dma_create_handle 0x0001585d Thumb Code 22 drv_dma.o(i.drv_dma_create_handle) + drv_dma_disenable_channel 0x00015879 Thumb Code 16 drv_dma.o(i.drv_dma_disenable_channel) + drv_dma_enable_channel 0x00015889 Thumb Code 16 drv_dma.o(i.drv_dma_enable_channel) + drv_dma_enable_channel_interrupts 0x00015899 Thumb Code 32 drv_dma.o(i.drv_dma_enable_channel_interrupts) + drv_dma_get_channel_flag 0x000158bd Thumb Code 12 drv_dma.o(i.drv_dma_get_channel_flag) + drv_dma_irq_handler 0x000158c9 Thumb Code 138 drv_dma.o(i.drv_dma_irq_handler) + drv_dma_prepar_transfer 0x00015959 Thumb Code 18 drv_dma.o(i.drv_dma_prepar_transfer) + drv_dma_set_burst 0x0001596b Thumb Code 26 drv_dma.o(i.drv_dma_set_burst) + drv_dma_set_callback 0x00015985 Thumb Code 6 drv_dma.o(i.drv_dma_set_callback) + drv_dma_set_transfer 0x0001598d Thumb Code 62 drv_dma.o(i.drv_dma_set_transfer) + drv_dsc_dec_convert_pps_rc_parameter 0x000159d1 Thumb Code 54 drv_dsc_dec.o(i.drv_dsc_dec_convert_pps_rc_parameter) + drv_dsc_dec_disable 0x00015a07 Thumb Code 12 drv_dsc_dec.o(i.drv_dsc_dec_disable) + drv_dsc_dec_enable 0x00015a15 Thumb Code 88 drv_dsc_dec.o(i.drv_dsc_dec_enable) + drv_dsc_dec_get_nslc 0x00015a89 Thumb Code 10 drv_dsc_dec.o(i.drv_dsc_dec_get_nslc) + drv_dsc_dec_set_u8_pps 0x00015a93 Thumb Code 40 drv_dsc_dec.o(i.drv_dsc_dec_set_u8_pps) + drv_dsi_rx_calc_ipi_tx_delay 0x00015abd Thumb Code 244 drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) + drv_dsi_rx_enable_irq 0x00015bc1 Thumb Code 58 drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) + drv_dsi_rx_get_compression_en 0x00015c6d Thumb Code 8 drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) + drv_dsi_rx_get_max_ret_size 0x00015c75 Thumb Code 6 drv_dsi_rx.o(i.drv_dsi_rx_get_max_ret_size) + drv_dsi_rx_power_up 0x00015c7b Thumb Code 14 drv_dsi_rx.o(i.drv_dsi_rx_power_up) + drv_dsi_rx_set_ctrl_cfg 0x00015c89 Thumb Code 32 drv_dsi_rx.o(i.drv_dsi_rx_set_ctrl_cfg) + drv_dsi_rx_set_ddi_cfg 0x00015ca9 Thumb Code 16 drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) + drv_dsi_rx_set_inten 0x00015cb9 Thumb Code 4 drv_dsi_rx.o(i.drv_dsi_rx_set_inten) + drv_dsi_rx_set_ipi_cfg 0x00015cbd Thumb Code 16 drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_cfg) + drv_dsi_rx_set_lane_swap 0x00015ccd Thumb Code 70 drv_dsi_rx.o(i.drv_dsi_rx_set_lane_swap) + drv_dsi_rx_set_resp_cnt 0x00015d13 Thumb Code 38 drv_dsi_rx.o(i.drv_dsi_rx_set_resp_cnt) + drv_dsi_rx_set_up_phy 0x00015d39 Thumb Code 256 drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) + drv_dsi_rx_shut_down 0x00015e3d Thumb Code 14 drv_dsi_rx.o(i.drv_dsi_rx_shut_down) + drv_dsi_tx_command_header 0x00015e4b Thumb Code 20 drv_dsi_tx.o(i.drv_dsi_tx_command_header) + drv_dsi_tx_command_mode_cfg 0x00015e5f Thumb Code 108 drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) + drv_dsi_tx_command_put_payload 0x00015ecb Thumb Code 4 drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) + drv_dsi_tx_config_eotp 0x00015ecf Thumb Code 24 drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) + drv_dsi_tx_config_int 0x00015ee7 Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_config_int) + drv_dsi_tx_dpi_lpcmd_time 0x00015eef Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_dpi_lpcmd_time) + drv_dsi_tx_dpi_mode 0x00015ef7 Thumb Code 10 drv_dsi_tx.o(i.drv_dsi_tx_dpi_mode) + drv_dsi_tx_dpi_polarity 0x00015f01 Thumb Code 36 drv_dsi_tx.o(i.drv_dsi_tx_dpi_polarity) + drv_dsi_tx_edpi_cmd_size 0x00015f25 Thumb Code 4 drv_dsi_tx.o(i.drv_dsi_tx_edpi_cmd_size) + drv_dsi_tx_get_cmd_status 0x00015f29 Thumb Code 4 drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) + drv_dsi_tx_mode 0x00015f2d Thumb Code 4 drv_dsi_tx.o(i.drv_dsi_tx_mode) + drv_dsi_tx_phy_clock_lane_auto_lp 0x00015f31 Thumb Code 24 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_auto_lp) + drv_dsi_tx_phy_clock_lane_req_hs 0x00015f49 Thumb Code 26 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) + drv_dsi_tx_phy_lane_mode 0x00015f63 Thumb Code 12 drv_dsi_tx.o(i.drv_dsi_tx_phy_lane_mode) + drv_dsi_tx_phy_status_ready 0x00015f6f Thumb Code 100 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ready) + drv_dsi_tx_phy_status_stopstate 0x00015fd3 Thumb Code 62 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) + drv_dsi_tx_phy_test_setup 0x00016011 Thumb Code 308 drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) + drv_dsi_tx_phy_time_cfg 0x00016145 Thumb Code 30 drv_dsi_tx.o(i.drv_dsi_tx_phy_time_cfg) + drv_dsi_tx_powerup 0x00016163 Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_powerup) + drv_dsi_tx_response_mode 0x0001616b Thumb Code 28 drv_dsi_tx.o(i.drv_dsi_tx_response_mode) + drv_dsi_tx_set_bta_ack 0x00016187 Thumb Code 24 drv_dsi_tx.o(i.drv_dsi_tx_set_bta_ack) + drv_dsi_tx_set_esc_div 0x0001619f Thumb Code 12 drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) + drv_dsi_tx_set_int 0x000161ad Thumb Code 58 drv_dsi_tx.o(i.drv_dsi_tx_set_int) + drv_dsi_tx_set_time_out_div 0x000161ed Thumb Code 16 drv_dsi_tx.o(i.drv_dsi_tx_set_time_out_div) + drv_dsi_tx_set_video_chunk 0x000161fd Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_set_video_chunk) + drv_dsi_tx_set_video_timing 0x00016205 Thumb Code 34 drv_dsi_tx.o(i.drv_dsi_tx_set_video_timing) + drv_dsi_tx_shutdown 0x00016227 Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_shutdown) + drv_dsi_tx_timeout_cfg 0x0001622f Thumb Code 38 drv_dsi_tx.o(i.drv_dsi_tx_timeout_cfg) + drv_dsi_tx_video_mode_cfg 0x00016255 Thumb Code 170 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_cfg) + drv_dsi_tx_video_mode_disable_hact_cmd 0x000162ff Thumb Code 22 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_disable_hact_cmd) + drv_dsi_tx_video_mode_set_lp_cmd 0x00016315 Thumb Code 24 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_set_lp_cmd) + drv_efuse_enter_inactive 0x0001632d Thumb Code 46 drv_efuse.o(i.drv_efuse_enter_inactive) + drv_efuse_int_enable 0x0001635b Thumb Code 12 drv_efuse.o(i.drv_efuse_int_enable) + drv_efuse_read 0x00016367 Thumb Code 50 drv_efuse.o(i.drv_efuse_read) + drv_efuse_read_req 0x00016399 Thumb Code 24 drv_efuse.o(i.drv_efuse_read_req) + drv_gpio_get_input_data 0x000163b1 Thumb Code 20 drv_gpio.o(i.drv_gpio_get_input_data) + drv_gpio_register_ap_reset_callback 0x000163c9 Thumb Code 6 drv_gpio.o(i.drv_gpio_register_ap_reset_callback) + drv_gpio_register_callback 0x000163d5 Thumb Code 14 drv_gpio.o(i.drv_gpio_register_callback) + drv_gpio_set_int 0x000163e9 Thumb Code 74 drv_gpio.o(i.drv_gpio_set_int) + drv_gpio_set_ioe 0x00016439 Thumb Code 26 drv_gpio.o(i.drv_gpio_set_ioe) + drv_gpio_set_mode0 0x00016459 Thumb Code 12 drv_gpio.o(i.drv_gpio_set_mode0) + drv_gpio_set_mode1 0x00016469 Thumb Code 12 drv_gpio.o(i.drv_gpio_set_mode1) + drv_gpio_set_mode2 0x00016479 Thumb Code 12 drv_gpio.o(i.drv_gpio_set_mode2) + drv_gpio_set_mode3 0x00016489 Thumb Code 12 drv_gpio.o(i.drv_gpio_set_mode3) + drv_gpio_set_pull_state 0x000164b9 Thumb Code 298 drv_gpio.o(i.drv_gpio_set_pull_state) + drv_i2c0_set_callback 0x000165e9 Thumb Code 6 drv_i2c_slave.o(i.drv_i2c0_set_callback) + drv_i2c1_set_callback 0x000165f5 Thumb Code 6 drv_i2c_master.o(i.drv_i2c1_set_callback) + drv_i2c_dma_init 0x00016635 Thumb Code 146 drv_i2c_dma.o(i.drv_i2c_dma_init) + drv_i2c_enable_rx_dma 0x000166e1 Thumb Code 26 drv_i2c_dma.o(i.drv_i2c_enable_rx_dma) + drv_i2c_enable_tx_dma 0x000166fb Thumb Code 24 drv_i2c_dma.o(i.drv_i2c_enable_tx_dma) + drv_i2c_m_clear_it_pending_bit 0x00016715 Thumb Code 86 drv_i2c_master.o(i.drv_i2c_m_clear_it_pending_bit) + drv_i2c_m_enable 0x00016775 Thumb Code 10 drv_i2c_master.o(i.drv_i2c_m_enable) + drv_i2c_m_enable_intr 0x00016785 Thumb Code 42 drv_i2c_master.o(i.drv_i2c_m_enable_intr) + drv_i2c_master_init 0x000167bd Thumb Code 118 drv_i2c_master.o(i.drv_i2c_master_init) + drv_i2c_master_read_dma 0x00016849 Thumb Code 82 drv_i2c_dma.o(i.drv_i2c_master_read_dma) + drv_i2c_master_write_dma 0x000168a5 Thumb Code 50 drv_i2c_dma.o(i.drv_i2c_master_write_dma) + drv_i2c_s_clear_it_pending_bit 0x0001691f Thumb Code 66 drv_i2c_slave.o(i.drv_i2c_s_clear_it_pending_bit) + drv_i2c_s_config_intr 0x00016961 Thumb Code 4 drv_i2c_slave.o(i.drv_i2c_s_config_intr) + drv_i2c_s_enable 0x00016965 Thumb Code 8 drv_i2c_slave.o(i.drv_i2c_s_enable) + drv_i2c_s_get_fifo_status 0x0001696d Thumb Code 20 drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) + drv_i2c_s_set_intr 0x00016981 Thumb Code 74 drv_i2c_slave.o(i.drv_i2c_s_set_intr) + drv_i2c_s_write_data 0x000169d1 Thumb Code 28 drv_i2c_slave.o(i.drv_i2c_s_write_data) + drv_i2c_set_dma_irq_callback 0x000169ed Thumb Code 68 drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) + drv_i2c_slave_init 0x00016a45 Thumb Code 50 drv_i2c_slave.o(i.drv_i2c_slave_init) + drv_i2c_slave_write_dma 0x00016a79 Thumb Code 20 drv_i2c_dma.o(i.drv_i2c_slave_write_dma) + drv_lcdc_config_bypass 0x00016a91 Thumb Code 24 drv_lcdc.o(i.drv_lcdc_config_bypass) + drv_lcdc_config_ccm 0x00016aa9 Thumb Code 48 drv_lcdc.o(i.drv_lcdc_config_ccm) + drv_lcdc_config_disp_mode 0x00016ad9 Thumb Code 22 drv_lcdc.o(i.drv_lcdc_config_disp_mode) + drv_lcdc_config_dpi_polarity 0x00016aef Thumb Code 36 drv_lcdc.o(i.drv_lcdc_config_dpi_polarity) + drv_lcdc_config_dpi_timing 0x00016b13 Thumb Code 38 drv_lcdc.o(i.drv_lcdc_config_dpi_timing) + drv_lcdc_config_edpi_mode 0x00016b39 Thumb Code 22 drv_lcdc.o(i.drv_lcdc_config_edpi_mode) + drv_lcdc_config_endianness 0x00016b4f Thumb Code 22 drv_lcdc.o(i.drv_lcdc_config_endianness) + drv_lcdc_config_input_size 0x00016b65 Thumb Code 12 drv_lcdc.o(i.drv_lcdc_config_input_size) + drv_lcdc_config_int 0x00016b71 Thumb Code 30 drv_lcdc.o(i.drv_lcdc_config_int) + drv_lcdc_config_int_single 0x00016b8f Thumb Code 34 drv_lcdc.o(i.drv_lcdc_config_int_single) + drv_lcdc_config_overwrite 0x00016bb1 Thumb Code 34 drv_lcdc.o(i.drv_lcdc_config_overwrite) + drv_lcdc_config_overwrite_rgb 0x00016bd3 Thumb Code 12 drv_lcdc.o(i.drv_lcdc_config_overwrite_rgb) + drv_lcdc_config_partial_display_area 0x00016bdf Thumb Code 26 drv_lcdc.o(i.drv_lcdc_config_partial_display_area) + drv_lcdc_config_partial_display_enable 0x00016bf9 Thumb Code 34 drv_lcdc.o(i.drv_lcdc_config_partial_display_enable) + drv_lcdc_config_scale_up_coef 0x00016c1b Thumb Code 26 drv_lcdc.o(i.drv_lcdc_config_scale_up_coef) + drv_lcdc_config_scale_up_step 0x00016c35 Thumb Code 12 drv_lcdc.o(i.drv_lcdc_config_scale_up_step) + drv_lcdc_config_src_parameter 0x00016c41 Thumb Code 76 drv_lcdc.o(i.drv_lcdc_config_src_parameter) + drv_lcdc_config_thresh 0x00016c8d Thumb Code 6 drv_lcdc.o(i.drv_lcdc_config_thresh) + drv_lcdc_ctrl_flow 0x00016c93 Thumb Code 18 drv_lcdc.o(i.drv_lcdc_ctrl_flow) + drv_lcdc_enable_shadow_reg 0x00016ca5 Thumb Code 32 drv_lcdc.o(i.drv_lcdc_enable_shadow_reg) + drv_lcdc_set_int 0x00016cc5 Thumb Code 58 drv_lcdc.o(i.drv_lcdc_set_int) + drv_lcdc_set_prefetch 0x00016d05 Thumb Code 24 drv_lcdc.o(i.drv_lcdc_set_prefetch) + drv_lcdc_set_video_hw_mode 0x00016d1d Thumb Code 20 drv_lcdc.o(i.drv_lcdc_set_video_hw_mode) + drv_lcdc_start 0x00016d31 Thumb Code 32 drv_lcdc.o(i.drv_lcdc_start) + drv_memc_clear_status 0x00016d51 Thumb Code 12 drv_memc.o(i.drv_memc_clear_status) + drv_memc_enable_irq 0x00016d5d Thumb Code 58 drv_memc.o(i.drv_memc_enable_irq) + drv_memc_gen_a_tear_signal 0x00016d9d Thumb Code 12 drv_memc.o(i.drv_memc_gen_a_tear_signal) + drv_memc_get_status 0x00016da9 Thumb Code 18 drv_memc.o(i.drv_memc_get_status) + drv_memc_rate_transfer_sel 0x00016dbb Thumb Code 16 drv_memc.o(i.drv_memc_rate_transfer_sel) + drv_memc_sel_vsync 0x00016dcb Thumb Code 14 drv_memc.o(i.drv_memc_sel_vsync) + drv_memc_set_active_height 0x00016dd9 Thumb Code 14 drv_memc.o(i.drv_memc_set_active_height) + drv_memc_set_data_mode 0x00016ded Thumb Code 12 drv_memc.o(i.drv_memc_set_data_mode) + drv_memc_set_double_buffer 0x00016df9 Thumb Code 16 drv_memc.o(i.drv_memc_set_double_buffer) + drv_memc_set_double_buffer_reverse 0x00016e09 Thumb Code 18 drv_memc.o(i.drv_memc_set_double_buffer_reverse) + drv_memc_set_fs_en_conditions 0x00016e1b Thumb Code 16 drv_memc.o(i.drv_memc_set_fs_en_conditions) + drv_memc_set_inten 0x00016e2b Thumb Code 20 drv_memc.o(i.drv_memc_set_inten) + drv_memc_set_lcdc_st_conditions 0x00016e41 Thumb Code 18 drv_memc.o(i.drv_memc_set_lcdc_st_conditions) + drv_memc_set_ltpo_mode 0x00016e59 Thumb Code 26 drv_memc.o(i.drv_memc_set_ltpo_mode) + drv_memc_set_tear_mode 0x00016e73 Thumb Code 14 drv_memc.o(i.drv_memc_set_tear_mode) + drv_memc_set_tear_waveform 0x00016e81 Thumb Code 34 drv_memc.o(i.drv_memc_set_tear_waveform) + drv_memc_set_vidc_sync_cnt 0x00016ea9 Thumb Code 14 drv_memc.o(i.drv_memc_set_vidc_sync_cnt) + drv_param_init_get_ccm 0x00016eb9 Thumb Code 4 drv_param_init.o(i.drv_param_init_get_ccm) + drv_param_init_get_scld_filter_h 0x00016ec1 Thumb Code 12 drv_param_init.o(i.drv_param_init_get_scld_filter_h) + drv_param_init_get_scld_filter_v 0x00016ed5 Thumb Code 12 drv_param_init.o(i.drv_param_init_get_scld_filter_v) + drv_param_init_get_sclu_filter 0x00016ee9 Thumb Code 4 drv_param_init.o(i.drv_param_init_get_sclu_filter) + drv_param_init_set_ccm 0x00016ef1 Thumb Code 14 drv_param_init.o(i.drv_param_init_set_ccm) + drv_param_p2r_filter_init 0x00016f05 Thumb Code 30 drv_param_init.o(i.drv_param_p2r_filter_init) + drv_phy_enable_calibration 0x00016f29 Thumb Code 12 drv_phy_common.o(i.drv_phy_enable_calibration) + drv_phy_get_calibration 0x00016f39 Thumb Code 50 drv_phy_common.o(i.drv_phy_get_calibration) + drv_phy_get_pll_para 0x00016f75 Thumb Code 88 drv_phy_common.o(i.drv_phy_get_pll_para) + drv_phy_get_rate_para 0x00016fd5 Thumb Code 76 drv_phy_common.o(i.drv_phy_get_rate_para) + drv_phy_test_clear 0x00017029 Thumb Code 16 drv_phy_common.o(i.drv_phy_test_clear) + drv_phy_test_lock 0x00017039 Thumb Code 24 drv_phy_common.o(i.drv_phy_test_lock) + drv_phy_test_write_1_byte 0x00017051 Thumb Code 32 drv_phy_common.o(i.drv_phy_test_write_1_byte) + drv_phy_test_write_2_byte 0x00017071 Thumb Code 38 drv_phy_common.o(i.drv_phy_test_write_2_byte) + drv_phy_test_write_code 0x00017097 Thumb Code 30 drv_phy_common.o(i.drv_phy_test_write_code) + drv_pwr_set_cp_mode 0x000170d5 Thumb Code 26 drv_pwr.o(i.drv_pwr_set_cp_mode) + drv_pwr_set_pvd_mode 0x000170f5 Thumb Code 18 drv_pwr.o(i.drv_pwr_set_pvd_mode) + drv_pwr_set_system_clk_src 0x0001710d Thumb Code 44 drv_pwr.o(i.drv_pwr_set_system_clk_src) + drv_rxbr_clear_pkt_buffer 0x0001718b Thumb Code 10 drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) + drv_rxbr_clear_status0 0x00017195 Thumb Code 4 drv_rxbr.o(i.drv_rxbr_clear_status0) + drv_rxbr_enable_irq 0x00017199 Thumb Code 90 drv_rxbr.o(i.drv_rxbr_enable_irq) + drv_rxbr_frame_drop_cfg 0x000171f5 Thumb Code 16 drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) + drv_rxbr_get_clk 0x00017209 Thumb Code 66 drv_rxbr.o(i.drv_rxbr_get_clk) + drv_rxbr_get_col_addr 0x0001726d Thumb Code 4 drv_rxbr.o(i.drv_rxbr_get_col_addr) + drv_rxbr_get_page_addr 0x00017283 Thumb Code 4 drv_rxbr.o(i.drv_rxbr_get_page_addr) + drv_rxbr_hline_rcv0_cfg 0x00017299 Thumb Code 12 drv_rxbr.o(i.drv_rxbr_hline_rcv0_cfg) + drv_rxbr_hline_rcv_cfg 0x000172a5 Thumb Code 8 drv_rxbr.o(i.drv_rxbr_hline_rcv_cfg) + drv_rxbr_register_irq0_callback 0x000172ad Thumb Code 6 drv_rxbr.o(i.drv_rxbr_register_irq0_callback) + drv_rxbr_register_irq1_callback 0x000172b9 Thumb Code 6 drv_rxbr.o(i.drv_rxbr_register_irq1_callback) + drv_rxbr_set_ack_pkt_header 0x000172c5 Thumb Code 20 drv_rxbr.o(i.drv_rxbr_set_ack_pkt_header) + drv_rxbr_set_cmd_filter 0x000172d9 Thumb Code 204 drv_rxbr.o(i.drv_rxbr_set_cmd_filter) + drv_rxbr_set_color_format 0x000173a5 Thumb Code 20 drv_rxbr.o(i.drv_rxbr_set_color_format) + drv_rxbr_set_inten 0x000173b9 Thumb Code 20 drv_rxbr.o(i.drv_rxbr_set_inten) + drv_rxbr_set_ltpo_drop_th 0x000173cd Thumb Code 16 drv_rxbr.o(i.drv_rxbr_set_ltpo_drop_th) + drv_rxbr_set_usr_cfg 0x000173dd Thumb Code 38 drv_rxbr.o(i.drv_rxbr_set_usr_cfg) + drv_rxbr_set_usr_col 0x00017403 Thumb Code 8 drv_rxbr.o(i.drv_rxbr_set_usr_col) + drv_rxbr_set_usr_row 0x0001740b Thumb Code 8 drv_rxbr.o(i.drv_rxbr_set_usr_row) + drv_spi_m_read_data 0x00017415 Thumb Code 28 drv_spi_master.o(i.drv_spi_m_read_data) + drv_swire_set_int 0x00017435 Thumb Code 76 drv_swire.o(i.drv_swire_set_int) + drv_swire_set_power_down 0x00017489 Thumb Code 24 drv_swire.o(i.drv_swire_set_power_down) + drv_sys_cfg_clear_all_int 0x000174a5 Thumb Code 8 drv_sys_cfg.o(i.drv_sys_cfg_clear_all_int) + drv_sys_cfg_clear_pending 0x000174b1 Thumb Code 32 drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) + drv_sys_cfg_sel_ap_rst_lvl_trig 0x000174d9 Thumb Code 18 drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_lvl_trig) + drv_sys_cfg_sel_ap_rst_trig 0x000174f1 Thumb Code 22 drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) + drv_sys_cfg_sel_gpio_group 0x0001750d Thumb Code 30 drv_sys_cfg.o(i.drv_sys_cfg_sel_gpio_group) + drv_sys_cfg_sel_int_trig 0x00017531 Thumb Code 30 drv_sys_cfg.o(i.drv_sys_cfg_sel_int_trig) + drv_sys_cfg_set_dma_rx_req 0x00017555 Thumb Code 10 drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) + drv_sys_cfg_set_dma_tx_req 0x00017565 Thumb Code 10 drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) + drv_sys_cfg_set_int 0x00017575 Thumb Code 30 drv_sys_cfg.o(i.drv_sys_cfg_set_int) + drv_timer_enable 0x000175b3 Thumb Code 32 drv_timer.o(i.drv_timer_enable) + drv_timer_get_instance 0x000175d5 Thumb Code 10 drv_timer.o(i.drv_timer_get_instance) + drv_timer_get_prescaler 0x000175e5 Thumb Code 12 drv_timer.o(i.drv_timer_get_prescaler) + drv_timer_register_callback 0x00017639 Thumb Code 14 drv_timer.o(i.drv_timer_register_callback) + drv_timer_set_compare_val 0x0001764d Thumb Code 16 drv_timer.o(i.drv_timer_set_compare_val) + drv_timer_set_int 0x0001765d Thumb Code 80 drv_timer.o(i.drv_timer_set_int) + drv_timer_set_prescaler 0x000176b1 Thumb Code 36 drv_timer.o(i.drv_timer_set_prescaler) + drv_tx_phy_test_enter 0x000176e3 Thumb Code 28 drv_dsi_tx.o(i.drv_tx_phy_test_enter) + drv_tx_phy_test_exit 0x000176ff Thumb Code 28 drv_dsi_tx.o(i.drv_tx_phy_test_exit) + drv_vidc_clear_irq 0x00017751 Thumb Code 8 drv_vidc.o(i.drv_vidc_clear_irq) + drv_vidc_enable 0x00017759 Thumb Code 24 drv_vidc.o(i.drv_vidc_enable) + drv_vidc_enable_irq 0x00017771 Thumb Code 58 drv_vidc.o(i.drv_vidc_enable_irq) + drv_vidc_get_irq_status 0x000177b1 Thumb Code 18 drv_vidc.o(i.drv_vidc_get_irq_status) + drv_vidc_init_module_enable 0x000177c5 Thumb Code 36 drv_vidc.o(i.drv_vidc_init_module_enable) + drv_vidc_register_callback 0x000177ed Thumb Code 6 drv_vidc.o(i.drv_vidc_register_callback) + drv_vidc_reset 0x000177f9 Thumb Code 6 drv_vidc.o(i.drv_vidc_reset) + drv_vidc_set_dst_parameter 0x000177ff Thumb Code 60 drv_vidc.o(i.drv_vidc_set_dst_parameter) + drv_vidc_set_irqen 0x0001783b Thumb Code 20 drv_vidc.o(i.drv_vidc_set_irqen) + drv_vidc_set_mirror 0x0001784f Thumb Code 16 drv_vidc.o(i.drv_vidc_set_mirror) + drv_vidc_set_p2r_hcoef0 0x0001785f Thumb Code 8 drv_vidc.o(i.drv_vidc_set_p2r_hcoef0) + drv_vidc_set_p2r_hinitb 0x00017867 Thumb Code 38 drv_vidc.o(i.drv_vidc_set_p2r_hinitb) + drv_vidc_set_p2r_hinitr 0x0001788d Thumb Code 38 drv_vidc.o(i.drv_vidc_set_p2r_hinitr) + drv_vidc_set_pentile_swap 0x000178b5 Thumb Code 18 drv_vidc.o(i.drv_vidc_set_pentile_swap) + drv_vidc_set_pu_ctrl 0x000178cd Thumb Code 10 drv_vidc.o(i.drv_vidc_set_pu_ctrl) + drv_vidc_set_rotation 0x000178d7 Thumb Code 16 drv_vidc.o(i.drv_vidc_set_rotation) + drv_vidc_set_scld_hcoef0 0x000178e7 Thumb Code 10 drv_vidc.o(i.drv_vidc_set_scld_hcoef0) + drv_vidc_set_scld_hcoef1 0x000178f1 Thumb Code 10 drv_vidc.o(i.drv_vidc_set_scld_hcoef1) + drv_vidc_set_scld_step 0x000178fb Thumb Code 18 drv_vidc.o(i.drv_vidc_set_scld_step) + drv_vidc_set_scld_vcoef0 0x0001790d Thumb Code 10 drv_vidc.o(i.drv_vidc_set_scld_vcoef0) + drv_vidc_set_scld_vcoef1 0x00017917 Thumb Code 10 drv_vidc.o(i.drv_vidc_set_scld_vcoef1) + drv_vidc_set_src_parameter 0x00017921 Thumb Code 22 drv_vidc.o(i.drv_vidc_set_src_parameter) + drv_wdg_clear_counter 0x00017939 Thumb Code 12 drv_wdg.o(i.drv_wdg_clear_counter) + drv_wdg_set_int 0x00017969 Thumb Code 60 drv_wdg.o(i.drv_wdg_set_int) + fls_clr_interrupt_flag 0x000179a9 Thumb Code 10 drv_fls.o(i.fls_clr_interrupt_flag) + fputc 0x000179b3 Thumb Code 20 tau_log.o(i.fputc) + hal_dsi_rx_ctrl_create_handle 0x000179c9 Thumb Code 48 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) + hal_dsi_rx_ctrl_deinit 0x000179fd Thumb Code 148 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) + hal_dsi_rx_ctrl_dsc_async_handler 0x00017a99 Thumb Code 120 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) + hal_dsi_rx_ctrl_gen_a_tear_signal 0x00017b1d Thumb Code 32 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) + hal_dsi_rx_ctrl_get_max_ret_size 0x00017b45 Thumb Code 30 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) + hal_dsi_rx_ctrl_hight_performan_mode 0x00017b6d Thumb Code 16 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) + hal_dsi_rx_ctrl_init 0x00017bd1 Thumb Code 144 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) + hal_dsi_rx_ctrl_pre_init_pps 0x000183b1 Thumb Code 56 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_pre_init_pps) + hal_dsi_rx_ctrl_send_ack_cmd 0x000183ed Thumb Code 212 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) + hal_dsi_rx_ctrl_set_cus_sync_line 0x000184dd Thumb Code 44 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) + hal_dsi_rx_ctrl_set_hw_tear_mode 0x00018511 Thumb Code 42 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode) + hal_dsi_rx_ctrl_set_sw_tear_mode 0x000185f1 Thumb Code 42 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) + hal_dsi_rx_ctrl_set_tear_mode_ex 0x00018625 Thumb Code 14 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_tear_mode_ex) + hal_dsi_rx_ctrl_start 0x00018635 Thumb Code 46 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) + hal_dsi_rx_ctrl_stop 0x00018671 Thumb Code 46 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) + hal_dsi_rx_ctrl_toggle_resolution 0x000186ad Thumb Code 28 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) + hal_dsi_tx_ctrl_create_handle 0x00018ce1 Thumb Code 34 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) + hal_dsi_tx_ctrl_deinit 0x00018d0d Thumb Code 118 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) + hal_dsi_tx_ctrl_enter_init_panel_mode 0x00018d91 Thumb Code 68 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) + hal_dsi_tx_ctrl_exit_init_panel_mode 0x00018ddd Thumb Code 32 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) + hal_dsi_tx_ctrl_init 0x00018e05 Thumb Code 154 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) + hal_dsi_tx_ctrl_panel_reset_pin 0x00018ecd Thumb Code 12 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_panel_reset_pin) + hal_dsi_tx_ctrl_set_ccm 0x00018ed9 Thumb Code 28 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) + hal_dsi_tx_ctrl_set_overwrite_rgb 0x00018ef9 Thumb Code 16 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) + hal_dsi_tx_ctrl_set_partial_disp 0x00018f0d Thumb Code 12 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp) + hal_dsi_tx_ctrl_set_partial_disp_area 0x00018f1d Thumb Code 30 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp_area) + hal_dsi_tx_ctrl_start 0x00018f41 Thumb Code 140 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) + hal_dsi_tx_ctrl_stop 0x00018fdd Thumb Code 56 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) + hal_dsi_tx_ctrl_write_array_cmd 0x00019021 Thumb Code 210 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) + hal_dsi_tx_ctrl_write_cmd 0x000190f9 Thumb Code 172 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) + hal_gpio_ctrl_eint 0x0001938d Thumb Code 18 hal_gpio.o(i.hal_gpio_ctrl_eint) + hal_gpio_get_input_data 0x000193a5 Thumb Code 18 hal_gpio.o(i.hal_gpio_get_input_data) + hal_gpio_init_eint 0x000193b9 Thumb Code 58 hal_gpio.o(i.hal_gpio_init_eint) + hal_gpio_init_input 0x000193f9 Thumb Code 28 hal_gpio.o(i.hal_gpio_init_input) + hal_gpio_init_output 0x00019419 Thumb Code 34 hal_gpio.o(i.hal_gpio_init_output) + hal_gpio_reg_eint_cb 0x00019441 Thumb Code 20 hal_gpio.o(i.hal_gpio_reg_eint_cb) + hal_gpio_set_ap_reset_int 0x00019459 Thumb Code 76 hal_gpio.o(i.hal_gpio_set_ap_reset_int) + hal_gpio_set_mode 0x000194a9 Thumb Code 90 hal_gpio.o(i.hal_gpio_set_mode) + hal_gpio_set_output_data 0x00019509 Thumb Code 8 hal_gpio.o(i.hal_gpio_set_output_data) + hal_gpio_set_pull_state 0x00019511 Thumb Code 26 hal_gpio.o(i.hal_gpio_set_pull_state) + hal_i2c_m_dma_init 0x00019531 Thumb Code 92 hal_i2c_master.o(i.hal_i2c_m_dma_init) + hal_i2c_m_dma_read 0x0001959d Thumb Code 26 hal_i2c_master.o(i.hal_i2c_m_dma_read) + hal_i2c_m_dma_write 0x000195bd Thumb Code 24 hal_i2c_master.o(i.hal_i2c_m_dma_write) + hal_i2c_m_transfer_complate 0x000195d9 Thumb Code 6 hal_i2c_master.o(i.hal_i2c_m_transfer_complate) + hal_i2c_s_dma_write 0x00019615 Thumb Code 62 hal_i2c_slave.o(i.hal_i2c_s_dma_write) + hal_i2c_s_init 0x00019661 Thumb Code 176 hal_i2c_slave.o(i.hal_i2c_s_init) + hal_i2c_s_nonblocking_read 0x00019729 Thumb Code 14 hal_i2c_slave.o(i.hal_i2c_s_nonblocking_read) + hal_i2c_s_set_transfer 0x0001973d Thumb Code 6 hal_i2c_slave.o(i.hal_i2c_s_set_transfer) + hal_internal_init_memc 0x000198bd Thumb Code 170 hal_internal_vsync.o(i.hal_internal_init_memc) + hal_internal_sync_get_fb_setting 0x000199b9 Thumb Code 12 hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) + hal_internal_sync_get_hight_performan_mode 0x000199c9 Thumb Code 10 hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) + hal_internal_sync_input_resolution_change 0x000199d9 Thumb Code 438 hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) + hal_internal_update_dpi_param 0x00019c05 Thumb Code 10 hal_internal_vsync.o(i.hal_internal_update_dpi_param) + hal_internal_video_mode_auto_sync 0x00019c15 Thumb Code 270 hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) + hal_internal_vsync_deinit 0x00019d41 Thumb Code 30 hal_internal_vsync.o(i.hal_internal_vsync_deinit) + hal_internal_vsync_get_rx_state 0x00019d69 Thumb Code 6 hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) + hal_internal_vsync_get_sync_line 0x00019d75 Thumb Code 18 hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) + hal_internal_vsync_get_tear_mode 0x00019d8d Thumb Code 6 hal_internal_vsync.o(i.hal_internal_vsync_get_tear_mode) + hal_internal_vsync_get_tx_state 0x00019d99 Thumb Code 6 hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) + hal_internal_vsync_init_rx 0x00019da5 Thumb Code 236 hal_internal_vsync.o(i.hal_internal_vsync_init_rx) + hal_internal_vsync_init_tx 0x00019ebd Thumb Code 172 hal_internal_vsync.o(i.hal_internal_vsync_init_tx) + hal_internal_vsync_set_auto_hw_filter 0x00019f6d Thumb Code 222 hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) + hal_internal_vsync_set_rx_state 0x0001a089 Thumb Code 16 hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) + hal_internal_vsync_set_sync_line 0x0001a09d Thumb Code 30 hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) + hal_internal_vsync_set_tear_mode 0x0001a0c1 Thumb Code 72 hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) + hal_internal_vsync_set_tx_state 0x0001a111 Thumb Code 118 hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) + hal_spi_m_clear_rxfifo 0x0001a5c9 Thumb Code 14 hal_spi_master.o(i.hal_spi_m_clear_rxfifo) + hal_swire_open 0x0001a5d7 Thumb Code 22 hal_swire.o(i.hal_swire_open) + hal_system_enable_systick 0x0001a5ed Thumb Code 8 hal_system.o(i.hal_system_enable_systick) + hal_system_init 0x0001a5f5 Thumb Code 104 hal_system.o(i.hal_system_init) + hal_system_init_console 0x0001a67d Thumb Code 28 hal_system.o(i.hal_system_init_console) + hal_system_set_phy_calibration 0x0001a699 Thumb Code 8 hal_system.o(i.hal_system_set_phy_calibration) + hal_system_set_pvd 0x0001a6a1 Thumb Code 8 hal_system.o(i.hal_system_set_pvd) + hal_system_set_vcc 0x0001a6a9 Thumb Code 8 hal_system.o(i.hal_system_set_vcc) + hal_timer_init 0x0001a6b1 Thumb Code 26 hal_timer.o(i.hal_timer_init) + hal_timer_start 0x0001a6cd Thumb Code 66 hal_timer.o(i.hal_timer_start) + hal_timer_stop 0x0001a715 Thumb Code 40 hal_timer.o(i.hal_timer_stop) + hal_uart_init 0x0001a73d Thumb Code 126 hal_uart.o(i.hal_uart_init) + hal_uart_transmit_blocking 0x0001a7c9 Thumb Code 12 hal_uart.o(i.hal_uart_transmit_blocking) + handle_init 0x0001a7d9 Thumb Code 140 irq_redirect .o(i.handle_init) + main 0x0001a9d5 Thumb Code 10 main.o(i.main) + sqrt 0x0001b681 Thumb Code 66 sqrt.o(i.sqrt) + tp_heartbeat_exec 0x0001b6c9 Thumb Code 50 ap_demo.o(i.tp_heartbeat_exec) + wCRCTalbeAbs 0x0001bba4 Data 32 app_tp_st_touch.o(.constdata) + phone_data_21 0x0001bcdc Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_55 0x0001bcdd Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_85_1 0x0001bcde Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_92_1 0x0001bcdf Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_F5_1 0x0001bce0 Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_F5_2 0x0001bce1 Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_F5_3 0x0001bce2 Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_F5_4 0x0001bce3 Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_30 0x0001bce4 Data 2 app_tp_for_custom_s8.o(.constdata) + phone_data_52 0x0001bce6 Data 3 app_tp_for_custom_s8.o(.constdata) + phone_data_92_3 0x0001bce9 Data 3 app_tp_for_custom_s8.o(.constdata) + phone_data_A3 0x0001bcec Data 4 app_tp_for_custom_s8.o(.constdata) + phone_data_A4 0x0001bcf0 Data 4 app_tp_for_custom_s8.o(.constdata) + phone_data_A5 0x0001bcf4 Data 4 app_tp_for_custom_s8.o(.constdata) + phone_data_AF 0x0001bcf8 Data 4 app_tp_for_custom_s8.o(.constdata) + phone_data_F1 0x0001bcfc Data 4 app_tp_for_custom_s8.o(.constdata) + phone_data_22 0x0001bd00 Data 5 app_tp_for_custom_s8.o(.constdata) + phone_data_92_2 0x0001bd05 Data 6 app_tp_for_custom_s8.o(.constdata) + phone_data_F6_1 0x0001bd0b Data 6 app_tp_for_custom_s8.o(.constdata) + phone_data_F6_2 0x0001bd11 Data 6 app_tp_for_custom_s8.o(.constdata) + phone_data_F6_3 0x0001bd17 Data 6 app_tp_for_custom_s8.o(.constdata) + phone_data_F6_4 0x0001bd1d Data 6 app_tp_for_custom_s8.o(.constdata) + phone_data_60_1 0x0001bd23 Data 16 app_tp_for_custom_s8.o(.constdata) + phone_data_23 0x0001bd33 Data 11 app_tp_for_custom_s8.o(.constdata) + phone_data_85_2 0x0001bd3e Data 28 app_tp_for_custom_s8.o(.constdata) + phone_data_90 0x0001bd5a Data 10 app_tp_for_custom_s8.o(.constdata) + phone_data_72_0 0x0001bd64 Data 1292 app_tp_for_custom_s8.o(.constdata) + phone_data_72_5 0x0001c270 Data 1292 app_tp_for_custom_s8.o(.constdata) + phone_data_72_13 0x0001c77c Data 1292 app_tp_for_custom_s8.o(.constdata) + phone_data_75_01 0x0001cc88 Data 654 app_tp_for_custom_s8.o(.constdata) + phone_data_75_02 0x0001cf16 Data 654 app_tp_for_custom_s8.o(.constdata) + phone_data_75_03 0x0001d1a4 Data 654 app_tp_for_custom_s8.o(.constdata) + phone_data_75_06 0x0001d432 Data 654 app_tp_for_custom_s8.o(.constdata) + phone_data_75_07 0x0001d6c0 Data 654 app_tp_for_custom_s8.o(.constdata) + phone_data_75_05 0x0001d94e Data 654 app_tp_for_custom_s8.o(.constdata) + phone_data_75_00 0x0001dbdc Data 288 app_tp_for_custom_s8.o(.constdata) + phone_data_75_FF 0x0001dcfc Data 288 app_tp_for_custom_s8.o(.constdata) + sleep_on 0x0001de1c Data 16 app_tp_for_custom_s8.o(.constdata) + screen_reg_start_data_size 0x0001de2c Data 1 app_tp_for_custom_s8.o(.constdata) + Region$$Table$$Base 0x0001e180 Number 0 anon$$obj.o(Region$$Table) + Region$$Table$$Limit 0x0001e1b0 Number 0 anon$$obj.o(Region$$Table) + g_fun_handle 0x00070100 Data 192 irq_redirect .o(.ARM.__AT_0x00070100) + phone_86_flag 0x000701d7 Data 1 ap_demo.o(.data) + phone_A6_flag 0x000701d8 Data 1 ap_demo.o(.data) + phone_start_flag 0x000701d9 Data 1 ap_demo.o(.data) + phone_DisplayOFF_flag 0x000701da Data 1 ap_demo.o(.data) + ap_tear_flag 0x000701db Data 1 ap_demo.o(.data) + g_enter_display_off 0x000701dc Data 1 ap_demo.o(.data) + g_enter_display_ON 0x000701dd Data 1 ap_demo.o(.data) + panel_mode 0x000701df Data 1 ap_demo.o(.data) + phone_DisplayOFF_count 0x000701e8 Data 2 ap_demo.o(.data) + value_reg_b1 0x000701ea Data 2 ap_demo.o(.data) + value_reg_b1_bak 0x000701ec Data 2 ap_demo.o(.data) + value_reg51 0x000701ee Data 2 ap_demo.o(.data) + value_reg51_bak 0x000701f0 Data 2 ap_demo.o(.data) + panel_r 0x000701f2 Data 2 ap_demo.o(.data) + panel_g 0x000701f4 Data 2 ap_demo.o(.data) + panel_b 0x000701f6 Data 2 ap_demo.o(.data) + s_heartbeat 0x00070200 Data 4 ap_demo.o(.data) + value_reg_ca 0x00070204 Data 4 ap_demo.o(.data) + panel_init_code 0x0007020c Data 7466 ap_demo.o(.data) + s_screen_init_complate 0x00071f3a Data 1 app_tp_transfer.o(.data) + MI10_PRO_screen_init_data1 0x00071f3e Data 3 app_tp_transfer.o(.data) + MI10_PRO_screen_init_data3 0x00071f41 Data 3 app_tp_transfer.o(.data) + MI10_PRO_screen_init_data4 0x00071f44 Data 3 app_tp_transfer.o(.data) + MI10_PRO_screen_init_data2 0x00071f47 Data 6 app_tp_transfer.o(.data) + st_touch_init_sensor_off 0x00071f4f Data 3 app_tp_st_touch.o(.data) + st_touch_init_sensor_on 0x00071f52 Data 3 app_tp_st_touch.o(.data) + st_touch_tp_tuning_reset 0x00071f55 Data 3 app_tp_st_touch.o(.data) + st_touch_tp_tuning_FpnlInit 0x00071f58 Data 3 app_tp_st_touch.o(.data) + st_touch_tp_tuning_PnlInit 0x00071f5b Data 3 app_tp_st_touch.o(.data) + st_touch_tp_tuning_SvCfg 0x00071f5e Data 3 app_tp_st_touch.o(.data) + st_touch_tp_tuning_SvCx 0x00071f61 Data 3 app_tp_st_touch.o(.data) + st_touch_tp_tuning_SvPnl 0x00071f64 Data 3 app_tp_st_touch.o(.data) + st_touch_tp_tuning_clearfifo 0x00071f67 Data 3 app_tp_st_touch.o(.data) + st_touch_tp_tuning_clkreset 0x00071f6a Data 3 app_tp_st_touch.o(.data) + st_touch_tp_tuning_TuneM 0x00071f6d Data 4 app_tp_st_touch.o(.data) + st_touch_tp_tuning_TuneS 0x00071f71 Data 4 app_tp_st_touch.o(.data) + phone_data_E4 0x00071fa4 Data 1 app_tp_for_custom_s8.o(.data) + tp_flag 0x00071fa5 Data 1 app_tp_for_custom_s8.o(.data) + g_phone_output_int_pad 0x00071fa6 Data 1 app_tp_for_custom_s8.o(.data) + tp_sleep_in 0x00071fa7 Data 1 app_tp_for_custom_s8.o(.data) + tp_sleep_count 0x00071fa8 Data 1 app_tp_for_custom_s8.o(.data) + sleep_double_EN 0x00071fa9 Data 1 app_tp_for_custom_s8.o(.data) + Flag_EA_EN 0x00071faa Data 1 app_tp_for_custom_s8.o(.data) + Flag_touch_count 0x00071fab Data 1 app_tp_for_custom_s8.o(.data) + touchnum_bak 0x00071fac Data 1 app_tp_for_custom_s8.o(.data) + Flag_blacklight_EN 0x00071fad Data 1 app_tp_for_custom_s8.o(.data) + phone_data_B1 0x00071fb6 Data 2 app_tp_for_custom_s8.o(.data) + phone_reg_coord_back 0x00071fc0 Data 200 app_tp_for_custom_s8.o(.data) + g_screen_input_rst_pad 0x00072088 Data 1 app_tp_for_custom_s8.o(.data) + g_screen_input_int_pad 0x00072089 Data 1 app_tp_for_custom_s8.o(.data) + screen_data_write_1 0x0007208a Data 1 app_tp_for_custom_s8.o(.data) + screen_data_write_2 0x0007208b Data 3 app_tp_for_custom_s8.o(.data) + screen_data_write_3 0x0007208e Data 5 app_tp_for_custom_s8.o(.data) + screen_reg_int_data 0x00072094 Data 48 app_tp_for_custom_s8.o(.data) + g_sof_gen_te_func 0x000720cc Data 4 hal_internal_vsync.o(.data) + g_systick_cb_func 0x000720e0 Data 4 drv_common.o(.data) + g_system_clock 0x000720e4 Data 4 drv_common.o(.data) + g_scld_fhd_filter_h 0x000720fc Data 256 drv_param_init.o(.data) + g_scld_fhd_filter_v 0x000721fc Data 256 drv_param_init.o(.data) + g_scld_hd_filter_h 0x000722fc Data 256 drv_param_init.o(.data) + g_scld_hd_filter_v 0x000723fc Data 256 drv_param_init.o(.data) + g_sclu_lanczos_filter 0x000724fc Data 128 drv_param_init.o(.data) + g_ccm_setting 0x0007257c Data 36 drv_param_init.o(.data) + g_int_rxbr_irq0_cb_func 0x00072600 Data 4 drv_rxbr.o(.data) + g_int_rxbr_irq1_cb_func 0x00072604 Data 4 drv_rxbr.o(.data) + g_int_vidc_cb_func 0x00072608 Data 4 drv_vidc.o(.data) + g_fls_w_cmd 0x00072624 Data 1 norflash.o(.data) + g_fls_r_cmd 0x00072625 Data 1 norflash.o(.data) + g_fls_write_en_status 0x00072626 Data 1 norflash.o(.data) + isFlsTransferEnd 0x00072627 Data 1 norflash.o(.data) + isFlsFifoReq 0x00072628 Data 1 norflash.o(.data) + isNandWriteCompleted 0x00072629 Data 1 norflash.o(.data) + isNandReadCompleted 0x0007262a Data 1 norflash.o(.data) + g_fls_error_info 0x00072630 Data 6 norflash.o(.data) + __stdout 0x00072658 Data 4 stdout.o(.data) + tp_scan_data 0x000727f0 Data 12 app_tp_st_touch.o(.bss) + hal_dmahandle 0x0007290c Data 160 hal_uart.o(.bss) + hal_uarthandle_dma 0x000729ac Data 32 hal_uart.o(.bss) + hal_uart_handle_global 0x000729cc Data 16 hal_uart.o(.bss) + g_vsync_hande 0x000729dc Data 100 hal_internal_vsync.o(.bss) + g_dcs_execute_table 0x00072a40 Data 2048 hal_internal_vsync.o(.bss) + g_packet_fifo 0x000734fc Data 4144 dcs_packet_fifo.o(.bss) + string 0x0007452c Data 256 tau_log.o(.bss) + g_spis_ctrl_handle 0x0007462c Data 32 hal_spi_slave.o(.bss) + __stack_limit 0x00074650 Data 0 startup_armcm0.o(STACK) + __initial_sp 0x00075650 Data 0 startup_armcm0.o(STACK) + + + +============================================================================== + +Memory Map of the image + + Image Entry point : 0x000100c1 + + Load Region LR_IROM2 (Base: 0x00010000, Size: 0x00010640, Max: 0x00010000, ABSOLUTE, COMPRESSED[0x0000f600]) + + Execution Region ER_IROM2 (Exec base: 0x00010000, Load base: 0x00010000, Size: 0x0000e1b0, Max: 0x00010000, ABSOLUTE) + + Exec Addr Load Addr Size Type Attr Idx E Section Name Object + + 0x00010000 0x00010000 0x000000c0 Data RO 533 RESET startup_armcm0.o + 0x000100c0 0x000100c0 0x00000000 Code RO 2774 * .ARM.Collect$$$$00000000 mc_p.l(entry.o) + 0x000100c0 0x000100c0 0x00000004 Code RO 3084 .ARM.Collect$$$$00000001 mc_p.l(entry2.o) + 0x000100c4 0x000100c4 0x00000004 Code RO 3087 .ARM.Collect$$$$00000004 mc_p.l(entry5.o) + 0x000100c8 0x000100c8 0x00000000 Code RO 3089 .ARM.Collect$$$$00000008 mc_p.l(entry7b.o) + 0x000100c8 0x000100c8 0x00000000 Code RO 3091 .ARM.Collect$$$$0000000A mc_p.l(entry8b.o) + 0x000100c8 0x000100c8 0x00000008 Code RO 3092 .ARM.Collect$$$$0000000B mc_p.l(entry9a.o) + 0x000100d0 0x000100d0 0x00000000 Code RO 3094 .ARM.Collect$$$$0000000D mc_p.l(entry10a.o) + 0x000100d0 0x000100d0 0x00000000 Code RO 3096 .ARM.Collect$$$$0000000F mc_p.l(entry11a.o) + 0x000100d0 0x000100d0 0x00000004 Code RO 3085 .ARM.Collect$$$$00002712 mc_p.l(entry2.o) + 0x000100d4 0x000100d4 0x00000078 Code RO 534 .text startup_armcm0.o + 0x0001014c 0x0001014c 0x0000002c Code RO 2777 .text mc_p.l(uidiv.o) + 0x00010178 0x00010178 0x00000028 Code RO 2779 .text mc_p.l(idiv.o) + 0x000101a0 0x000101a0 0x00000024 Code RO 2781 .text mc_p.l(memcpya.o) + 0x000101c4 0x000101c4 0x00000024 Code RO 2783 .text mc_p.l(memseta.o) + 0x000101e8 0x000101e8 0x000000b2 Code RO 3048 .text mf_p.l(fadd.o) + 0x0001029a 0x0001029a 0x0000007a Code RO 3050 .text mf_p.l(fmul.o) + 0x00010314 0x00010314 0x0000007c Code RO 3052 .text mf_p.l(fdiv.o) + 0x00010390 0x00010390 0x00000018 Code RO 3054 .text mf_p.l(fscalb.o) + 0x000103a8 0x000103a8 0x00000164 Code RO 3056 .text mf_p.l(dadd.o) + 0x0001050c 0x0001050c 0x000000d0 Code RO 3058 .text mf_p.l(dmul.o) + 0x000105dc 0x000105dc 0x000000f0 Code RO 3060 .text mf_p.l(ddiv.o) + 0x000106cc 0x000106cc 0x00000016 Code RO 3062 .text mf_p.l(fflti.o) + 0x000106e2 0x000106e2 0x0000000e Code RO 3064 .text mf_p.l(ffltui.o) + 0x000106f0 0x000106f0 0x0000001c Code RO 3068 .text mf_p.l(dfltui.o) + 0x0001070c 0x0001070c 0x00000032 Code RO 3070 .text mf_p.l(ffixi.o) + 0x0001073e 0x0001073e 0x00000028 Code RO 3072 .text mf_p.l(ffixui.o) + 0x00010766 0x00010766 0x00000002 PAD + 0x00010768 0x00010768 0x00000048 Code RO 3074 .text mf_p.l(dfixi.o) + 0x000107b0 0x000107b0 0x0000003c Code RO 3076 .text mf_p.l(dfixui.o) + 0x000107ec 0x000107ec 0x00000028 Code RO 3078 .text mf_p.l(f2d.o) + 0x00010814 0x00010814 0x00000028 Code RO 3080 .text mf_p.l(cdcmple.o) + 0x0001083c 0x0001083c 0x00000014 Code RO 3082 .text mf_p.l(cfrcmple.o) + 0x00010850 0x00010850 0x00000060 Code RO 3099 .text mc_p.l(uldiv.o) + 0x000108b0 0x000108b0 0x00000020 Code RO 3101 .text mc_p.l(llshl.o) + 0x000108d0 0x000108d0 0x00000022 Code RO 3103 .text mc_p.l(llushr.o) + 0x000108f2 0x000108f2 0x00000026 Code RO 3105 .text mc_p.l(llsshr.o) + 0x00010918 0x00010918 0x00000000 Code RO 3114 .text mc_p.l(iusefp.o) + 0x00010918 0x00010918 0x00000082 Code RO 3115 .text mf_p.l(fepilogue.o) + 0x0001099a 0x0001099a 0x000000be Code RO 3117 .text mf_p.l(depilogue.o) + 0x00010a58 0x00010a58 0x000000a2 Code RO 3121 .text mf_p.l(dsqrt.o) + 0x00010afa 0x00010afa 0x00000002 PAD + 0x00010afc 0x00010afc 0x00000040 Code RO 3123 .text mf_p.l(dfixul.o) + 0x00010b3c 0x00010b3c 0x00000028 Code RO 3125 .text mf_p.l(cdrcmple.o) + 0x00010b64 0x00010b64 0x00000024 Code RO 3127 .text mc_p.l(init.o) + 0x00010b88 0x00010b88 0x00000056 Code RO 3137 .text mc_p.l(__dczerorl2.o) + 0x00010bde 0x00010bde 0x00000002 PAD + 0x00010be0 0x00010be0 0x00000018 Code RO 2195 i.ADC_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010bf8 0x00010bf8 0x00000018 Code RO 2196 i.AP_NRESET_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010c10 0x00010c10 0x00000040 Code RO 410 i.CRC16_2 app_tp_st_touch.o + 0x00010c50 0x00010c50 0x00000014 Code RO 2197 i.DMA_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010c64 0x00010c64 0x0000001c Code RO 2198 i.EXTI_INT0_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010c80 0x00010c80 0x0000001c Code RO 2199 i.EXTI_INT1_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010c9c 0x00010c9c 0x0000001c Code RO 2200 i.EXTI_INT2_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010cb8 0x00010cb8 0x0000001c Code RO 2201 i.EXTI_INT3_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010cd4 0x00010cd4 0x0000001c Code RO 2202 i.EXTI_INT4_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010cf0 0x00010cf0 0x0000001c Code RO 2203 i.EXTI_INT5_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010d0c 0x00010d0c 0x0000001c Code RO 2204 i.EXTI_INT6_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010d28 0x00010d28 0x0000001c Code RO 2205 i.EXTI_INT7_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010d44 0x00010d44 0x00000064 Code RO 2356 i.EncryptCheck tp_EncryptCheck.lib(app_tp_enc.o) + 0x00010da8 0x00010da8 0x00000014 Code RO 2206 i.FLSCTRL_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010dbc 0x00010dbc 0x00000074 Code RO 102 i.Gpio_swire_output ap_demo.o + 0x00010e30 0x00010e30 0x00000014 Code RO 2207 i.HardFault_Handler CVWL568.lib(irq_redirect .o) + 0x00010e44 0x00010e44 0x00000018 Code RO 2208 i.I2C0_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010e5c 0x00010e5c 0x00000018 Code RO 2209 i.I2C1_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010e74 0x00010e74 0x00000018 Code RO 2210 i.LCDC_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010e8c 0x00010e8c 0x00000028 Code RO 2345 i.LOG_printf CVWL568.lib(tau_log.o) + 0x00010eb4 0x00010eb4 0x00000018 Code RO 2211 i.MEMC_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010ecc 0x00010ecc 0x00000018 Code RO 2212 i.MIPI_RX_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010ee4 0x00010ee4 0x00000018 Code RO 2213 i.MIPI_TX_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010efc 0x00010efc 0x0000001c Code RO 2214 i.PWMDET_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010f18 0x00010f18 0x0000001c Code RO 2215 i.SPIM_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010f34 0x00010f34 0x0000001c Code RO 2216 i.SPIS_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010f50 0x00010f50 0x0000001c Code RO 2217 i.SWIRE_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010f6c 0x00010f6c 0x00000018 Code RO 2218 i.SysTick_Handler CVWL568.lib(irq_redirect .o) + 0x00010f84 0x00010f84 0x00000018 Code RO 2219 i.TIMER0_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010f9c 0x00010f9c 0x00000018 Code RO 2220 i.TIMER1_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010fb4 0x00010fb4 0x00000018 Code RO 2221 i.TIMER2_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010fcc 0x00010fcc 0x00000018 Code RO 2222 i.TIMER3_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010fe4 0x00010fe4 0x0000001c Code RO 2652 i.UART0_IRQ_Handle CVWL568.lib(drv_uart.o) + 0x00011000 0x00011000 0x00000014 Data RO 1191 .ARM.__at_0x11000 CVWL568.lib(drv_common.o) + 0x00011014 0x00011014 0x00000002 Code RO 2656 i.UART_DisableDma CVWL568.lib(drv_uart.o) + 0x00011016 0x00011016 0x00000002 Code RO 3132 i.__scatterload_null mc_p.l(handlers.o) + 0x00011018 0x00011018 0x00000004 Data RO 1192 .ARM.__at_0x11018 CVWL568.lib(drv_common.o) + 0x0001101c 0x0001101c 0x00000144 Code RO 269 i.S20_Start_init app_tp_transfer.o + 0x00011160 0x00011160 0x00000004 Code RO 2662 i.UART_GetInstance CVWL568.lib(drv_uart.o) + 0x00011164 0x00011164 0x00000018 Code RO 2223 i.UART_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x0001117c 0x0001117c 0x00000024 Code RO 2670 i.UART_ResetRxFIFO CVWL568.lib(drv_uart.o) + 0x000111a0 0x000111a0 0x00000048 Code RO 2673 i.UART_SetBaudRate CVWL568.lib(drv_uart.o) + 0x000111e8 0x000111e8 0x0000001a Code RO 2674 i.UART_SwitchSCLK CVWL568.lib(drv_uart.o) + 0x00011202 0x00011202 0x00000134 Code RO 2676 i.UART_TransferHandleIRQ CVWL568.lib(drv_uart.o) + 0x00011336 0x00011336 0x0000001a Code RO 2678 i.UART_WriteBlocking CVWL568.lib(drv_uart.o) + 0x00011350 0x00011350 0x000000bc Code RO 2679 i.UART_init CVWL568.lib(drv_uart.o) + 0x0001140c 0x0001140c 0x00000018 Code RO 2224 i.VIDC_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00011424 0x00011424 0x00000018 Code RO 2225 i.VPRE_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x0001143c 0x0001143c 0x00000018 Code RO 2226 i.WDG_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00011454 0x00011454 0x00000020 Code RO 3020 i.__0printf mc_p.l(printfa.o) + 0x00011474 0x00011474 0x00000024 Code RO 3026 i.__0vsprintf mc_p.l(printfa.o) + 0x00011498 0x00011498 0x0000002e Code RO 3119 i.__ARM_clz mf_p.l(depilogue.o) + 0x000114c6 0x000114c6 0x0000001a Code RO 221 i.__ARM_common_switch8 ap_demo.o + 0x000114e0 0x000114e0 0x00000018 Code RO 1512 i.__NVIC_ClearPendingIRQ CVWL568.lib(drv_i2c_master.o) + 0x000114f8 0x000114f8 0x00000018 Code RO 1636 i.__NVIC_ClearPendingIRQ CVWL568.lib(drv_spi_master.o) + 0x00011510 0x00011510 0x00000020 Code RO 2049 i.__NVIC_DisableIRQ CVWL568.lib(drv_rxbr.o) + 0x00011530 0x00011530 0x00000018 Code RO 2050 i.__NVIC_EnableIRQ CVWL568.lib(drv_rxbr.o) + 0x00011548 0x00011548 0x00000044 Code RO 2433 i.__NVIC_SetPriority CVWL568.lib(hal_spi_slave.o) + 0x0001158c 0x0001158c 0x0000000e Code RO 3131 i.__scatterload_copy mc_p.l(handlers.o) + 0x0001159a 0x0001159a 0x0000000e Code RO 3133 i.__scatterload_zeroinit mc_p.l(handlers.o) + 0x000115a8 0x000115a8 0x0000000c Code RO 3109 i.__set_errno mc_p.l(errno.o) + 0x000115b4 0x000115b4 0x00000174 Code RO 3027 i._fp_digits mc_p.l(printfa.o) + 0x00011728 0x00011728 0x000006ec Code RO 3028 i._printf_core mc_p.l(printfa.o) + 0x00011e14 0x00011e14 0x00000020 Code RO 3029 i._printf_post_padding mc_p.l(printfa.o) + 0x00011e34 0x00011e34 0x0000002c Code RO 3030 i._printf_pre_padding mc_p.l(printfa.o) + 0x00011e60 0x00011e60 0x0000000a Code RO 3032 i._sputc mc_p.l(printfa.o) + 0x00011e6a 0x00011e6a 0x00000002 PAD + 0x00011e6c 0x00011e6c 0x0000105c Code RO 103 i.ap_dcs_read ap_demo.o + 0x00012ec8 0x00012ec8 0x00000138 Code RO 104 i.ap_demo ap_demo.o + 0x00013000 0x00013000 0x00000028 Code RO 105 i.ap_get_reg_ca ap_demo.o + 0x00013028 0x00013028 0x000000b0 Code RO 106 i.ap_get_reg_df ap_demo.o + 0x000130d8 0x000130d8 0x00000020 Code RO 411 i.ap_get_tp_calibration_status_01 app_tp_st_touch.o + 0x000130f8 0x000130f8 0x00000028 Code RO 107 i.ap_reset_cb ap_demo.o + 0x00013120 0x00013120 0x000002c0 Code RO 108 i.ap_set_backlight ap_demo.o + 0x000133e0 0x000133e0 0x00000024 Code RO 109 i.ap_set_display_off ap_demo.o + 0x00013404 0x00013404 0x0000000c Code RO 110 i.ap_set_display_on ap_demo.o + 0x00013410 0x00013410 0x00000038 Code RO 111 i.ap_set_enter_sleep_mode ap_demo.o + 0x00013448 0x00013448 0x0000000c Code RO 112 i.ap_set_exit_sleep_mode ap_demo.o + 0x00013454 0x00013454 0x00000098 Code RO 412 i.ap_set_tp_calibration_04 app_tp_st_touch.o + 0x000134ec 0x000134ec 0x000000b0 Code RO 413 i.ap_tp_st_touch_calibration app_tp_st_touch.o + 0x0001359c 0x0001359c 0x0000000e Code RO 414 i.ap_tp_st_touch_error_handler_F3 app_tp_st_touch.o + 0x000135aa 0x000135aa 0x00000020 Code RO 415 i.ap_tp_st_touch_error_handler_FF app_tp_st_touch.o + 0x000135ca 0x000135ca 0x00000002 PAD + 0x000135cc 0x000135cc 0x000000a8 Code RO 416 i.ap_tp_st_touch_get_calibration_success_mark app_tp_st_touch.o + 0x00013674 0x00013674 0x00000088 Code RO 417 i.ap_tp_st_touch_hardware_reset app_tp_st_touch.o + 0x000136fc 0x000136fc 0x0000001c Code RO 418 i.ap_tp_st_touch_scan_point_init app_tp_st_touch.o + 0x00013718 0x00013718 0x00000094 Code RO 419 i.ap_tp_st_touch_scan_point_record_event app_tp_st_touch.o + 0x000137ac 0x000137ac 0x00000034 Code RO 420 i.ap_tp_st_touch_scan_point_record_event_exec app_tp_st_touch.o + 0x000137e0 0x000137e0 0x00000034 Code RO 421 i.ap_tp_st_touch_simulate_finger_release_event app_tp_st_touch.o + 0x00013814 0x00013814 0x0000002c Code RO 113 i.ap_update_frame_rate ap_demo.o + 0x00013840 0x00013840 0x0000001c Code RO 2051 i.app_ADC_IRQn_Handler CVWL568.lib(drv_rxbr.o) + 0x0001385c 0x0001385c 0x00000024 Code RO 1436 i.app_AP_NRESET_IRQn_Handler CVWL568.lib(drv_gpio.o) + 0x00013880 0x00013880 0x0000001c Code RO 1437 i.app_EXTI_INT0_IRQn_Handler CVWL568.lib(drv_gpio.o) + 0x0001389c 0x0001389c 0x0000001c Code RO 1438 i.app_EXTI_INT1_IRQn_Handler CVWL568.lib(drv_gpio.o) + 0x000138b8 0x000138b8 0x0000001c Code RO 1439 i.app_EXTI_INT2_IRQn_Handler CVWL568.lib(drv_gpio.o) + 0x000138d4 0x000138d4 0x0000001c Code RO 1440 i.app_EXTI_INT3_IRQn_Handler CVWL568.lib(drv_gpio.o) + 0x000138f0 0x000138f0 0x0000001c Code RO 1441 i.app_EXTI_INT4_IRQn_Handler CVWL568.lib(drv_gpio.o) + 0x0001390c 0x0001390c 0x0000001c Code RO 1442 i.app_EXTI_INT5_IRQn_Handler CVWL568.lib(drv_gpio.o) + 0x00013928 0x00013928 0x0000001c Code RO 1443 i.app_EXTI_INT6_IRQn_Handler CVWL568.lib(drv_gpio.o) + 0x00013944 0x00013944 0x0000001c Code RO 1444 i.app_EXTI_INT7_IRQn_Handler CVWL568.lib(drv_gpio.o) + 0x00013960 0x00013960 0x00000048 Code RO 1183 i.app_HardFault_Handler CVWL568.lib(drv_common.o) + 0x000139a8 0x000139a8 0x00000018 Code RO 1547 i.app_I2C0_IRQn_Handler CVWL568.lib(drv_i2c_slave.o) + 0x000139c0 0x000139c0 0x00000010 Code RO 1513 i.app_I2C1_IRQn_Handler CVWL568.lib(drv_i2c_master.o) + 0x000139d0 0x000139d0 0x000001a4 Code RO 1088 i.app_LCDC_IRQn_Handler CVWL568.lib(hal_internal_vsync.o) + 0x00013b74 0x00013b74 0x00000088 Code RO 1993 i.app_MEMC_IRQn_Handler CVWL568.lib(drv_memc.o) + 0x00013bfc 0x00013bfc 0x00000298 Code RO 1765 i.app_MIPI_RX_IRQn_Handler CVWL568.lib(drv_dsi_rx.o) + 0x00013e94 0x00013e94 0x000000a0 Code RO 1821 i.app_MIPI_TX_IRQn_Handler CVWL568.lib(drv_dsi_tx.o) + 0x00013f34 0x00013f34 0x00000048 Code RO 2587 i.app_PWMDET_IRQn_Handler CVWL568.lib(drv_pwm.o) + 0x00013f7c 0x00013f7c 0x00000030 Code RO 1637 i.app_SPIM_IRQn_Handler CVWL568.lib(drv_spi_master.o) + 0x00013fac 0x00013fac 0x00000200 Code RO 2434 i.app_SPIS_IRQn_Handler CVWL568.lib(hal_spi_slave.o) + 0x000141ac 0x000141ac 0x00000020 Code RO 1669 i.app_SWIRE_IRQn_Handler CVWL568.lib(drv_swire.o) + 0x000141cc 0x000141cc 0x00000018 Code RO 1184 i.app_SysTick_Handler CVWL568.lib(drv_common.o) + 0x000141e4 0x000141e4 0x0000000a Code RO 1719 i.app_TIMER0_IRQn_Handler CVWL568.lib(drv_timer.o) + 0x000141ee 0x000141ee 0x0000000a Code RO 1720 i.app_TIMER1_IRQn_Handler CVWL568.lib(drv_timer.o) + 0x000141f8 0x000141f8 0x0000000a Code RO 1721 i.app_TIMER2_IRQn_Handler CVWL568.lib(drv_timer.o) + 0x00014202 0x00014202 0x0000000a Code RO 1722 i.app_TIMER3_IRQn_Handler CVWL568.lib(drv_timer.o) + 0x0001420c 0x0001420c 0x00000008 Code RO 2680 i.app_UART_IRQn_Handler CVWL568.lib(drv_uart.o) + 0x00014214 0x00014214 0x0000001c Code RO 2116 i.app_VIDC_IRQn_Handler CVWL568.lib(drv_vidc.o) + 0x00014230 0x00014230 0x0000001c Code RO 2052 i.app_VPRE_IRQn_Handler CVWL568.lib(drv_rxbr.o) + 0x0001424c 0x0001424c 0x00000038 Code RO 2739 i.app_WDG_IRQn_Handler CVWL568.lib(drv_wdg.o) + 0x00014284 0x00014284 0x00000010 Code RO 1298 i.app_dma_irq_handler CVWL568.lib(drv_dma.o) + 0x00014294 0x00014294 0x00000030 Code RO 2476 i.app_fls_ctrl_Handler CVWL568.lib(norflash.o) + 0x000142c4 0x000142c4 0x00000024 Code RO 270 i.app_tp_I2C_init app_tp_transfer.o + 0x000142e8 0x000142e8 0x00000038 Code RO 423 i.app_tp_calibration_exec app_tp_st_touch.o + 0x00014320 0x00014320 0x00000030 Code RO 271 i.app_tp_i2cs_callback app_tp_transfer.o + 0x00014350 0x00014350 0x00000040 Code RO 272 i.app_tp_init app_tp_transfer.o + 0x00014390 0x00014390 0x00000020 Code RO 273 i.app_tp_m_read app_tp_transfer.o + 0x000143b0 0x000143b0 0x00000008 Code RO 275 i.app_tp_m_write app_tp_transfer.o + 0x000143b8 0x000143b8 0x0000041c Code RO 938 i.app_tp_phone_analysis_data WL568_20U_HX667_TP.lib(app_tp_for_custom_s8.o) + 0x000147d4 0x000147d4 0x0000000c Code RO 276 i.app_tp_phone_clear_reset_on app_tp_transfer.o + 0x000147e0 0x000147e0 0x00000008 Code RO 278 i.app_tp_s_read app_tp_transfer.o + 0x000147e8 0x000147e8 0x00000008 Code RO 280 i.app_tp_s_write app_tp_transfer.o + 0x000147f0 0x000147f0 0x000002dc Code RO 940 i.app_tp_screen_analysis_int WL568_20U_HX667_TP.lib(app_tp_for_custom_s8.o) + 0x00014acc 0x00014acc 0x0000000c Code RO 282 i.app_tp_screen_int_callback app_tp_transfer.o + 0x00014ad8 0x00014ad8 0x00000040 Code RO 283 i.app_tp_transfer_screen_const app_tp_transfer.o + 0x00014b18 0x00014b18 0x00000160 Code RO 284 i.app_tp_transfer_screen_int app_tp_transfer.o + 0x00014c78 0x00014c78 0x00000018 Code RO 285 i.app_tp_transfer_screen_start app_tp_transfer.o + 0x00014c90 0x00014c90 0x00000036 Code RO 114 i.blue_change_ccm ap_demo.o + 0x00014cc6 0x00014cc6 0x00000002 PAD + 0x00014cc8 0x00014cc8 0x00000024 Code RO 513 i.board_Init board.o + 0x00014cec 0x00014cec 0x000004f0 Code RO 1089 i.calc_framebuffer_setting CVWL568.lib(hal_internal_vsync.o) + 0x000151dc 0x000151dc 0x000000c8 Code RO 2763 i.ceil m_ps.l(ceil.o) + 0x000152a4 0x000152a4 0x0000002c Code RO 1090 i.check_mipi_rx_tx_video_info CVWL568.lib(hal_internal_vsync.o) + 0x000152d0 0x000152d0 0x00000090 Code RO 1091 i.check_pkt_buf_rev CVWL568.lib(hal_internal_vsync.o) + 0x00015360 0x00015360 0x00000058 Code RO 1752 i.dcs_packet_fifo_alloc CVWL568.lib(dcs_packet_fifo.o) + 0x000153b8 0x000153b8 0x00000018 Code RO 1753 i.dcs_packet_fifo_init CVWL568.lib(dcs_packet_fifo.o) + 0x000153d0 0x000153d0 0x00000044 Code RO 1754 i.dcs_packet_free_fifo_header CVWL568.lib(dcs_packet_fifo.o) + 0x00015414 0x00015414 0x00000024 Code RO 1755 i.dcs_packet_get_fifo_header CVWL568.lib(dcs_packet_fifo.o) + 0x00015438 0x00015438 0x0000002c Code RO 1092 i.dcs_sw_filter CVWL568.lib(hal_internal_vsync.o) + 0x00015464 0x00015464 0x00000018 Code RO 930 i.delayMs CVWL568.lib(tau_delay.o) + 0x0001547c 0x0001547c 0x00000022 Code RO 931 i.delayUs CVWL568.lib(tau_delay.o) + 0x0001549e 0x0001549e 0x00000002 PAD + 0x000154a0 0x000154a0 0x00000058 Code RO 115 i.disable_mipi_timer_cb ap_demo.o + 0x000154f8 0x000154f8 0x00000038 Code RO 1688 i.drv_ap_rst_trig_edge_detect CVWL568.lib(drv_sys_cfg.o) + 0x00015530 0x00015530 0x0000000c Code RO 2316 i.drv_chip_info_get_info CVWL568.lib(drv_chip_info.o) + 0x0001553c 0x0001553c 0x00000040 Code RO 2317 i.drv_chip_info_init CVWL568.lib(drv_chip_info.o) + 0x0001557c 0x0001557c 0x000000b0 Code RO 2318 i.drv_chip_rx_info_check CVWL568.lib(drv_chip_info.o) + 0x0001562c 0x0001562c 0x00000014 Code RO 2319 i.drv_chip_rx_init_done CVWL568.lib(drv_chip_info.o) + 0x00015640 0x00015640 0x00000058 Code RO 1186 i.drv_common_enable_systick CVWL568.lib(drv_common.o) + 0x00015698 0x00015698 0x00000008 Code RO 1189 i.drv_common_system_init CVWL568.lib(drv_common.o) + 0x000156a0 0x000156a0 0x00000010 Code RO 1211 i.drv_crgu_config_reset_modules CVWL568.lib(drv_crgu.o) + 0x000156b0 0x000156b0 0x00000014 Code RO 1224 i.drv_crgu_set_ahb_pre_div CVWL568.lib(drv_crgu.o) + 0x000156c4 0x000156c4 0x00000014 Code RO 1225 i.drv_crgu_set_ahb_src CVWL568.lib(drv_crgu.o) + 0x000156d8 0x000156d8 0x00000020 Code RO 1228 i.drv_crgu_set_clock CVWL568.lib(drv_crgu.o) + 0x000156f8 0x000156f8 0x00000014 Code RO 1229 i.drv_crgu_set_dpi_mux_src CVWL568.lib(drv_crgu.o) + 0x0001570c 0x0001570c 0x00000018 Code RO 1230 i.drv_crgu_set_dpi_pre_div CVWL568.lib(drv_crgu.o) + 0x00015724 0x00015724 0x00000014 Code RO 1231 i.drv_crgu_set_dpi_pre_src CVWL568.lib(drv_crgu.o) + 0x00015738 0x00015738 0x00000014 Code RO 1232 i.drv_crgu_set_dsc_core_div CVWL568.lib(drv_crgu.o) + 0x0001574c 0x0001574c 0x00000014 Code RO 1233 i.drv_crgu_set_dsco_src CVWL568.lib(drv_crgu.o) + 0x00015760 0x00015760 0x00000014 Code RO 1234 i.drv_crgu_set_dsco_src_div CVWL568.lib(drv_crgu.o) + 0x00015774 0x00015774 0x00000014 Code RO 1235 i.drv_crgu_set_fb_div CVWL568.lib(drv_crgu.o) + 0x00015788 0x00015788 0x00000014 Code RO 1236 i.drv_crgu_set_fb_src CVWL568.lib(drv_crgu.o) + 0x0001579c 0x0001579c 0x00000014 Code RO 1239 i.drv_crgu_set_lcdc_div CVWL568.lib(drv_crgu.o) + 0x000157b0 0x000157b0 0x00000014 Code RO 1240 i.drv_crgu_set_lcdc_src CVWL568.lib(drv_crgu.o) + 0x000157c4 0x000157c4 0x00000014 Code RO 1241 i.drv_crgu_set_mipi_cfg_src CVWL568.lib(drv_crgu.o) + 0x000157d8 0x000157d8 0x00000018 Code RO 1242 i.drv_crgu_set_mipi_ref_src CVWL568.lib(drv_crgu.o) + 0x000157f0 0x000157f0 0x00000018 Code RO 1245 i.drv_crgu_set_reset CVWL568.lib(drv_crgu.o) + 0x00015808 0x00015808 0x00000014 Code RO 1246 i.drv_crgu_set_rxbr_div CVWL568.lib(drv_crgu.o) + 0x0001581c 0x0001581c 0x00000014 Code RO 1247 i.drv_crgu_set_rxbr_src CVWL568.lib(drv_crgu.o) + 0x00015830 0x00015830 0x00000014 Code RO 1249 i.drv_crgu_set_vidc_src CVWL568.lib(drv_crgu.o) + 0x00015844 0x00015844 0x00000018 Code RO 1302 i.drv_dma_clear_flag CVWL568.lib(drv_dma.o) + 0x0001585c 0x0001585c 0x0000001c Code RO 1303 i.drv_dma_create_handle CVWL568.lib(drv_dma.o) + 0x00015878 0x00015878 0x00000010 Code RO 1305 i.drv_dma_disenable_channel CVWL568.lib(drv_dma.o) + 0x00015888 0x00015888 0x00000010 Code RO 1307 i.drv_dma_enable_channel CVWL568.lib(drv_dma.o) + 0x00015898 0x00015898 0x00000024 Code RO 1308 i.drv_dma_enable_channel_interrupts CVWL568.lib(drv_dma.o) + 0x000158bc 0x000158bc 0x0000000c Code RO 1310 i.drv_dma_get_channel_flag CVWL568.lib(drv_dma.o) + 0x000158c8 0x000158c8 0x00000090 Code RO 1313 i.drv_dma_irq_handler CVWL568.lib(drv_dma.o) + 0x00015958 0x00015958 0x00000012 Code RO 1315 i.drv_dma_prepar_transfer CVWL568.lib(drv_dma.o) + 0x0001596a 0x0001596a 0x0000001a Code RO 1317 i.drv_dma_set_burst CVWL568.lib(drv_dma.o) + 0x00015984 0x00015984 0x00000006 Code RO 1318 i.drv_dma_set_callback CVWL568.lib(drv_dma.o) + 0x0001598a 0x0001598a 0x00000002 PAD + 0x0001598c 0x0001598c 0x00000044 Code RO 1320 i.drv_dma_set_transfer CVWL568.lib(drv_dma.o) + 0x000159d0 0x000159d0 0x00000036 Code RO 2329 i.drv_dsc_dec_convert_pps_rc_parameter CVWL568.lib(drv_dsc_dec.o) + 0x00015a06 0x00015a06 0x0000000c Code RO 2330 i.drv_dsc_dec_disable CVWL568.lib(drv_dsc_dec.o) + 0x00015a12 0x00015a12 0x00000002 PAD + 0x00015a14 0x00015a14 0x00000074 Code RO 2331 i.drv_dsc_dec_enable CVWL568.lib(drv_dsc_dec.o) + 0x00015a88 0x00015a88 0x0000000a Code RO 2332 i.drv_dsc_dec_get_nslc CVWL568.lib(drv_dsc_dec.o) + 0x00015a92 0x00015a92 0x00000028 Code RO 2334 i.drv_dsc_dec_set_u8_pps CVWL568.lib(drv_dsc_dec.o) + 0x00015aba 0x00015aba 0x00000002 PAD + 0x00015abc 0x00015abc 0x00000104 Code RO 1766 i.drv_dsi_rx_calc_ipi_tx_delay CVWL568.lib(drv_dsi_rx.o) + 0x00015bc0 0x00015bc0 0x00000040 Code RO 1767 i.drv_dsi_rx_enable_irq CVWL568.lib(drv_dsi_rx.o) + 0x00015c00 0x00015c00 0x00000050 Code RO 1768 i.drv_dsi_rx_get_color_bpp CVWL568.lib(drv_dsi_rx.o) + 0x00015c50 0x00015c50 0x0000001c Code RO 1769 i.drv_dsi_rx_get_color_pcc CVWL568.lib(drv_dsi_rx.o) + 0x00015c6c 0x00015c6c 0x00000008 Code RO 1770 i.drv_dsi_rx_get_compression_en CVWL568.lib(drv_dsi_rx.o) + 0x00015c74 0x00015c74 0x00000006 Code RO 1771 i.drv_dsi_rx_get_max_ret_size CVWL568.lib(drv_dsi_rx.o) + 0x00015c7a 0x00015c7a 0x0000000e Code RO 1775 i.drv_dsi_rx_power_up CVWL568.lib(drv_dsi_rx.o) + 0x00015c88 0x00015c88 0x00000020 Code RO 1776 i.drv_dsi_rx_set_ctrl_cfg CVWL568.lib(drv_dsi_rx.o) + 0x00015ca8 0x00015ca8 0x00000010 Code RO 1777 i.drv_dsi_rx_set_ddi_cfg CVWL568.lib(drv_dsi_rx.o) + 0x00015cb8 0x00015cb8 0x00000004 Code RO 1779 i.drv_dsi_rx_set_inten CVWL568.lib(drv_dsi_rx.o) + 0x00015cbc 0x00015cbc 0x00000010 Code RO 1780 i.drv_dsi_rx_set_ipi_cfg CVWL568.lib(drv_dsi_rx.o) + 0x00015ccc 0x00015ccc 0x00000046 Code RO 1782 i.drv_dsi_rx_set_lane_swap CVWL568.lib(drv_dsi_rx.o) + 0x00015d12 0x00015d12 0x00000026 Code RO 1783 i.drv_dsi_rx_set_resp_cnt CVWL568.lib(drv_dsi_rx.o) + 0x00015d38 0x00015d38 0x00000104 Code RO 1784 i.drv_dsi_rx_set_up_phy CVWL568.lib(drv_dsi_rx.o) + 0x00015e3c 0x00015e3c 0x0000000e Code RO 1785 i.drv_dsi_rx_shut_down CVWL568.lib(drv_dsi_rx.o) + 0x00015e4a 0x00015e4a 0x00000014 Code RO 1823 i.drv_dsi_tx_command_header CVWL568.lib(drv_dsi_tx.o) + 0x00015e5e 0x00015e5e 0x0000006c Code RO 1824 i.drv_dsi_tx_command_mode_cfg CVWL568.lib(drv_dsi_tx.o) + 0x00015eca 0x00015eca 0x00000004 Code RO 1825 i.drv_dsi_tx_command_put_payload CVWL568.lib(drv_dsi_tx.o) + 0x00015ece 0x00015ece 0x00000018 Code RO 1826 i.drv_dsi_tx_config_eotp CVWL568.lib(drv_dsi_tx.o) + 0x00015ee6 0x00015ee6 0x00000008 Code RO 1827 i.drv_dsi_tx_config_int CVWL568.lib(drv_dsi_tx.o) + 0x00015eee 0x00015eee 0x00000008 Code RO 1828 i.drv_dsi_tx_dpi_lpcmd_time CVWL568.lib(drv_dsi_tx.o) + 0x00015ef6 0x00015ef6 0x0000000a Code RO 1829 i.drv_dsi_tx_dpi_mode CVWL568.lib(drv_dsi_tx.o) + 0x00015f00 0x00015f00 0x00000024 Code RO 1830 i.drv_dsi_tx_dpi_polarity CVWL568.lib(drv_dsi_tx.o) + 0x00015f24 0x00015f24 0x00000004 Code RO 1831 i.drv_dsi_tx_edpi_cmd_size CVWL568.lib(drv_dsi_tx.o) + 0x00015f28 0x00015f28 0x00000004 Code RO 1833 i.drv_dsi_tx_get_cmd_status CVWL568.lib(drv_dsi_tx.o) + 0x00015f2c 0x00015f2c 0x00000004 Code RO 1835 i.drv_dsi_tx_mode CVWL568.lib(drv_dsi_tx.o) + 0x00015f30 0x00015f30 0x00000018 Code RO 1836 i.drv_dsi_tx_phy_clock_lane_auto_lp CVWL568.lib(drv_dsi_tx.o) + 0x00015f48 0x00015f48 0x0000001a Code RO 1837 i.drv_dsi_tx_phy_clock_lane_req_hs CVWL568.lib(drv_dsi_tx.o) + 0x00015f62 0x00015f62 0x0000000c Code RO 1839 i.drv_dsi_tx_phy_lane_mode CVWL568.lib(drv_dsi_tx.o) + 0x00015f6e 0x00015f6e 0x00000064 Code RO 1843 i.drv_dsi_tx_phy_status_ready CVWL568.lib(drv_dsi_tx.o) + 0x00015fd2 0x00015fd2 0x0000003e Code RO 1844 i.drv_dsi_tx_phy_status_stopstate CVWL568.lib(drv_dsi_tx.o) + 0x00016010 0x00016010 0x00000134 Code RO 1846 i.drv_dsi_tx_phy_test_setup CVWL568.lib(drv_dsi_tx.o) + 0x00016144 0x00016144 0x0000001e Code RO 1847 i.drv_dsi_tx_phy_time_cfg CVWL568.lib(drv_dsi_tx.o) + 0x00016162 0x00016162 0x00000008 Code RO 1851 i.drv_dsi_tx_powerup CVWL568.lib(drv_dsi_tx.o) + 0x0001616a 0x0001616a 0x0000001c Code RO 1852 i.drv_dsi_tx_response_mode CVWL568.lib(drv_dsi_tx.o) + 0x00016186 0x00016186 0x00000018 Code RO 1855 i.drv_dsi_tx_set_bta_ack CVWL568.lib(drv_dsi_tx.o) + 0x0001619e 0x0001619e 0x0000000c Code RO 1856 i.drv_dsi_tx_set_esc_div CVWL568.lib(drv_dsi_tx.o) + 0x000161aa 0x000161aa 0x00000002 PAD + 0x000161ac 0x000161ac 0x00000040 Code RO 1857 i.drv_dsi_tx_set_int CVWL568.lib(drv_dsi_tx.o) + 0x000161ec 0x000161ec 0x00000010 Code RO 1858 i.drv_dsi_tx_set_time_out_div CVWL568.lib(drv_dsi_tx.o) + 0x000161fc 0x000161fc 0x00000008 Code RO 1859 i.drv_dsi_tx_set_video_chunk CVWL568.lib(drv_dsi_tx.o) + 0x00016204 0x00016204 0x00000022 Code RO 1860 i.drv_dsi_tx_set_video_timing CVWL568.lib(drv_dsi_tx.o) + 0x00016226 0x00016226 0x00000008 Code RO 1862 i.drv_dsi_tx_shutdown CVWL568.lib(drv_dsi_tx.o) + 0x0001622e 0x0001622e 0x00000026 Code RO 1863 i.drv_dsi_tx_timeout_cfg CVWL568.lib(drv_dsi_tx.o) + 0x00016254 0x00016254 0x000000aa Code RO 1866 i.drv_dsi_tx_video_mode_cfg CVWL568.lib(drv_dsi_tx.o) + 0x000162fe 0x000162fe 0x00000016 Code RO 1867 i.drv_dsi_tx_video_mode_disable_hact_cmd CVWL568.lib(drv_dsi_tx.o) + 0x00016314 0x00016314 0x00000018 Code RO 1868 i.drv_dsi_tx_video_mode_set_lp_cmd CVWL568.lib(drv_dsi_tx.o) + 0x0001632c 0x0001632c 0x0000002e Code RO 2267 i.drv_efuse_enter_inactive CVWL568.lib(drv_efuse.o) + 0x0001635a 0x0001635a 0x0000000c Code RO 2270 i.drv_efuse_int_enable CVWL568.lib(drv_efuse.o) + 0x00016366 0x00016366 0x00000032 Code RO 2271 i.drv_efuse_read CVWL568.lib(drv_efuse.o) + 0x00016398 0x00016398 0x00000018 Code RO 2272 i.drv_efuse_read_req CVWL568.lib(drv_efuse.o) + 0x000163b0 0x000163b0 0x00000018 Code RO 1445 i.drv_gpio_get_input_data CVWL568.lib(drv_gpio.o) + 0x000163c8 0x000163c8 0x0000000c Code RO 1447 i.drv_gpio_register_ap_reset_callback CVWL568.lib(drv_gpio.o) + 0x000163d4 0x000163d4 0x00000014 Code RO 1448 i.drv_gpio_register_callback CVWL568.lib(drv_gpio.o) + 0x000163e8 0x000163e8 0x00000050 Code RO 1450 i.drv_gpio_set_int CVWL568.lib(drv_gpio.o) + 0x00016438 0x00016438 0x00000020 Code RO 1451 i.drv_gpio_set_ioe CVWL568.lib(drv_gpio.o) + 0x00016458 0x00016458 0x00000010 Code RO 1452 i.drv_gpio_set_mode0 CVWL568.lib(drv_gpio.o) + 0x00016468 0x00016468 0x00000010 Code RO 1453 i.drv_gpio_set_mode1 CVWL568.lib(drv_gpio.o) + 0x00016478 0x00016478 0x00000010 Code RO 1454 i.drv_gpio_set_mode2 CVWL568.lib(drv_gpio.o) + 0x00016488 0x00016488 0x00000010 Code RO 1455 i.drv_gpio_set_mode3 CVWL568.lib(drv_gpio.o) + 0x00016498 0x00016498 0x00000020 Code RO 739 i.drv_gpio_set_output_data CVWL568.lib(hal_gpio.o) + 0x000164b8 0x000164b8 0x00000130 Code RO 1456 i.drv_gpio_set_pull_state CVWL568.lib(drv_gpio.o) + 0x000165e8 0x000165e8 0x0000000c Code RO 1548 i.drv_i2c0_set_callback CVWL568.lib(drv_i2c_slave.o) + 0x000165f4 0x000165f4 0x0000000c Code RO 1514 i.drv_i2c1_set_callback CVWL568.lib(drv_i2c_master.o) + 0x00016600 0x00016600 0x00000034 Code RO 1488 i.drv_i2c_dma_callback CVWL568.lib(drv_i2c_dma.o) + 0x00016634 0x00016634 0x000000ac Code RO 1489 i.drv_i2c_dma_init CVWL568.lib(drv_i2c_dma.o) + 0x000166e0 0x000166e0 0x0000001a Code RO 1490 i.drv_i2c_enable_rx_dma CVWL568.lib(drv_i2c_dma.o) + 0x000166fa 0x000166fa 0x00000018 Code RO 1491 i.drv_i2c_enable_tx_dma CVWL568.lib(drv_i2c_dma.o) + 0x00016712 0x00016712 0x00000002 PAD + 0x00016714 0x00016714 0x00000060 Code RO 1516 i.drv_i2c_m_clear_it_pending_bit CVWL568.lib(drv_i2c_master.o) + 0x00016774 0x00016774 0x00000010 Code RO 1519 i.drv_i2c_m_enable CVWL568.lib(drv_i2c_master.o) + 0x00016784 0x00016784 0x00000038 Code RO 1520 i.drv_i2c_m_enable_intr CVWL568.lib(drv_i2c_master.o) + 0x000167bc 0x000167bc 0x0000008c Code RO 1526 i.drv_i2c_master_init CVWL568.lib(drv_i2c_master.o) + 0x00016848 0x00016848 0x0000005c Code RO 1492 i.drv_i2c_master_read_dma CVWL568.lib(drv_i2c_dma.o) + 0x000168a4 0x000168a4 0x0000003c Code RO 1493 i.drv_i2c_master_write_dma CVWL568.lib(drv_i2c_dma.o) + 0x000168e0 0x000168e0 0x0000003e Code RO 1494 i.drv_i2c_master_write_read_cmd CVWL568.lib(drv_i2c_dma.o) + 0x0001691e 0x0001691e 0x00000042 Code RO 1549 i.drv_i2c_s_clear_it_pending_bit CVWL568.lib(drv_i2c_slave.o) + 0x00016960 0x00016960 0x00000004 Code RO 1550 i.drv_i2c_s_config_intr CVWL568.lib(drv_i2c_slave.o) + 0x00016964 0x00016964 0x00000008 Code RO 1551 i.drv_i2c_s_enable CVWL568.lib(drv_i2c_slave.o) + 0x0001696c 0x0001696c 0x00000014 Code RO 1552 i.drv_i2c_s_get_fifo_status CVWL568.lib(drv_i2c_slave.o) + 0x00016980 0x00016980 0x00000050 Code RO 1555 i.drv_i2c_s_set_intr CVWL568.lib(drv_i2c_slave.o) + 0x000169d0 0x000169d0 0x0000001c Code RO 1556 i.drv_i2c_s_write_data CVWL568.lib(drv_i2c_slave.o) + 0x000169ec 0x000169ec 0x00000058 Code RO 1495 i.drv_i2c_set_dma_irq_callback CVWL568.lib(drv_i2c_dma.o) + 0x00016a44 0x00016a44 0x00000032 Code RO 1557 i.drv_i2c_slave_init CVWL568.lib(drv_i2c_slave.o) + 0x00016a76 0x00016a76 0x00000002 PAD + 0x00016a78 0x00016a78 0x00000018 Code RO 1496 i.drv_i2c_slave_write_dma CVWL568.lib(drv_i2c_dma.o) + 0x00016a90 0x00016a90 0x00000018 Code RO 1935 i.drv_lcdc_config_bypass CVWL568.lib(drv_lcdc.o) + 0x00016aa8 0x00016aa8 0x00000030 Code RO 1936 i.drv_lcdc_config_ccm CVWL568.lib(drv_lcdc.o) + 0x00016ad8 0x00016ad8 0x00000016 Code RO 1937 i.drv_lcdc_config_disp_mode CVWL568.lib(drv_lcdc.o) + 0x00016aee 0x00016aee 0x00000024 Code RO 1938 i.drv_lcdc_config_dpi_polarity CVWL568.lib(drv_lcdc.o) + 0x00016b12 0x00016b12 0x00000026 Code RO 1939 i.drv_lcdc_config_dpi_timing CVWL568.lib(drv_lcdc.o) + 0x00016b38 0x00016b38 0x00000016 Code RO 1940 i.drv_lcdc_config_edpi_mode CVWL568.lib(drv_lcdc.o) + 0x00016b4e 0x00016b4e 0x00000016 Code RO 1941 i.drv_lcdc_config_endianness CVWL568.lib(drv_lcdc.o) + 0x00016b64 0x00016b64 0x0000000c Code RO 1942 i.drv_lcdc_config_input_size CVWL568.lib(drv_lcdc.o) + 0x00016b70 0x00016b70 0x0000001e Code RO 1943 i.drv_lcdc_config_int CVWL568.lib(drv_lcdc.o) + 0x00016b8e 0x00016b8e 0x00000022 Code RO 1944 i.drv_lcdc_config_int_single CVWL568.lib(drv_lcdc.o) + 0x00016bb0 0x00016bb0 0x00000022 Code RO 1945 i.drv_lcdc_config_overwrite CVWL568.lib(drv_lcdc.o) + 0x00016bd2 0x00016bd2 0x0000000c Code RO 1946 i.drv_lcdc_config_overwrite_rgb CVWL568.lib(drv_lcdc.o) + 0x00016bde 0x00016bde 0x0000001a Code RO 1947 i.drv_lcdc_config_partial_display_area CVWL568.lib(drv_lcdc.o) + 0x00016bf8 0x00016bf8 0x00000022 Code RO 1948 i.drv_lcdc_config_partial_display_enable CVWL568.lib(drv_lcdc.o) + 0x00016c1a 0x00016c1a 0x0000001a Code RO 1950 i.drv_lcdc_config_scale_up_coef CVWL568.lib(drv_lcdc.o) + 0x00016c34 0x00016c34 0x0000000c Code RO 1951 i.drv_lcdc_config_scale_up_step CVWL568.lib(drv_lcdc.o) + 0x00016c40 0x00016c40 0x0000004c Code RO 1952 i.drv_lcdc_config_src_parameter CVWL568.lib(drv_lcdc.o) + 0x00016c8c 0x00016c8c 0x00000006 Code RO 1953 i.drv_lcdc_config_thresh CVWL568.lib(drv_lcdc.o) + 0x00016c92 0x00016c92 0x00000012 Code RO 1954 i.drv_lcdc_ctrl_flow CVWL568.lib(drv_lcdc.o) + 0x00016ca4 0x00016ca4 0x00000020 Code RO 1956 i.drv_lcdc_enable_shadow_reg CVWL568.lib(drv_lcdc.o) + 0x00016cc4 0x00016cc4 0x00000040 Code RO 1957 i.drv_lcdc_set_int CVWL568.lib(drv_lcdc.o) + 0x00016d04 0x00016d04 0x00000018 Code RO 1958 i.drv_lcdc_set_prefetch CVWL568.lib(drv_lcdc.o) + 0x00016d1c 0x00016d1c 0x00000014 Code RO 1959 i.drv_lcdc_set_video_hw_mode CVWL568.lib(drv_lcdc.o) + 0x00016d30 0x00016d30 0x00000020 Code RO 1960 i.drv_lcdc_start CVWL568.lib(drv_lcdc.o) + 0x00016d50 0x00016d50 0x0000000c Code RO 1994 i.drv_memc_clear_status CVWL568.lib(drv_memc.o) + 0x00016d5c 0x00016d5c 0x00000040 Code RO 1995 i.drv_memc_enable_irq CVWL568.lib(drv_memc.o) + 0x00016d9c 0x00016d9c 0x0000000c Code RO 1996 i.drv_memc_gen_a_tear_signal CVWL568.lib(drv_memc.o) + 0x00016da8 0x00016da8 0x00000012 Code RO 1997 i.drv_memc_get_status CVWL568.lib(drv_memc.o) + 0x00016dba 0x00016dba 0x00000010 Code RO 1998 i.drv_memc_rate_transfer_sel CVWL568.lib(drv_memc.o) + 0x00016dca 0x00016dca 0x0000000e Code RO 1999 i.drv_memc_sel_vsync CVWL568.lib(drv_memc.o) + 0x00016dd8 0x00016dd8 0x00000014 Code RO 2000 i.drv_memc_set_active_height CVWL568.lib(drv_memc.o) + 0x00016dec 0x00016dec 0x0000000c Code RO 2001 i.drv_memc_set_data_mode CVWL568.lib(drv_memc.o) + 0x00016df8 0x00016df8 0x00000010 Code RO 2004 i.drv_memc_set_double_buffer CVWL568.lib(drv_memc.o) + 0x00016e08 0x00016e08 0x00000012 Code RO 2005 i.drv_memc_set_double_buffer_reverse CVWL568.lib(drv_memc.o) + 0x00016e1a 0x00016e1a 0x00000010 Code RO 2007 i.drv_memc_set_fs_en_conditions CVWL568.lib(drv_memc.o) + 0x00016e2a 0x00016e2a 0x00000014 Code RO 2008 i.drv_memc_set_inten CVWL568.lib(drv_memc.o) + 0x00016e3e 0x00016e3e 0x00000002 PAD + 0x00016e40 0x00016e40 0x00000018 Code RO 2009 i.drv_memc_set_lcdc_st_conditions CVWL568.lib(drv_memc.o) + 0x00016e58 0x00016e58 0x0000001a Code RO 2010 i.drv_memc_set_ltpo_mode CVWL568.lib(drv_memc.o) + 0x00016e72 0x00016e72 0x0000000e Code RO 2014 i.drv_memc_set_tear_mode CVWL568.lib(drv_memc.o) + 0x00016e80 0x00016e80 0x00000028 Code RO 2015 i.drv_memc_set_tear_waveform CVWL568.lib(drv_memc.o) + 0x00016ea8 0x00016ea8 0x0000000e Code RO 2017 i.drv_memc_set_vidc_sync_cnt CVWL568.lib(drv_memc.o) + 0x00016eb6 0x00016eb6 0x00000002 PAD + 0x00016eb8 0x00016eb8 0x00000008 Code RO 1574 i.drv_param_init_get_ccm CVWL568.lib(drv_param_init.o) + 0x00016ec0 0x00016ec0 0x00000014 Code RO 1575 i.drv_param_init_get_scld_filter_h CVWL568.lib(drv_param_init.o) + 0x00016ed4 0x00016ed4 0x00000014 Code RO 1576 i.drv_param_init_get_scld_filter_v CVWL568.lib(drv_param_init.o) + 0x00016ee8 0x00016ee8 0x00000008 Code RO 1577 i.drv_param_init_get_sclu_filter CVWL568.lib(drv_param_init.o) + 0x00016ef0 0x00016ef0 0x00000014 Code RO 1578 i.drv_param_init_set_ccm CVWL568.lib(drv_param_init.o) + 0x00016f04 0x00016f04 0x00000024 Code RO 1581 i.drv_param_p2r_filter_init CVWL568.lib(drv_param_init.o) + 0x00016f28 0x00016f28 0x00000010 Code RO 2288 i.drv_phy_enable_calibration CVWL568.lib(drv_phy_common.o) + 0x00016f38 0x00016f38 0x0000003c Code RO 2289 i.drv_phy_get_calibration CVWL568.lib(drv_phy_common.o) + 0x00016f74 0x00016f74 0x00000060 Code RO 2290 i.drv_phy_get_pll_para CVWL568.lib(drv_phy_common.o) + 0x00016fd4 0x00016fd4 0x00000054 Code RO 2291 i.drv_phy_get_rate_para CVWL568.lib(drv_phy_common.o) + 0x00017028 0x00017028 0x00000010 Code RO 2292 i.drv_phy_test_clear CVWL568.lib(drv_phy_common.o) + 0x00017038 0x00017038 0x00000018 Code RO 2293 i.drv_phy_test_lock CVWL568.lib(drv_phy_common.o) + 0x00017050 0x00017050 0x00000020 Code RO 2295 i.drv_phy_test_write_1_byte CVWL568.lib(drv_phy_common.o) + 0x00017070 0x00017070 0x00000026 Code RO 2296 i.drv_phy_test_write_2_byte CVWL568.lib(drv_phy_common.o) + 0x00017096 0x00017096 0x0000001e Code RO 2297 i.drv_phy_test_write_code CVWL568.lib(drv_phy_common.o) + 0x000170b4 0x000170b4 0x00000020 Code RO 2298 i.drv_phy_test_write_data CVWL568.lib(drv_phy_common.o) + 0x000170d4 0x000170d4 0x00000020 Code RO 1597 i.drv_pwr_set_cp_mode CVWL568.lib(drv_pwr.o) + 0x000170f4 0x000170f4 0x00000018 Code RO 1599 i.drv_pwr_set_pvd_mode CVWL568.lib(drv_pwr.o) + 0x0001710c 0x0001710c 0x00000038 Code RO 1600 i.drv_pwr_set_system_clk_src CVWL568.lib(drv_pwr.o) + 0x00017144 0x00017144 0x0000000c Code RO 1786 i.drv_rx_phy_test_clear CVWL568.lib(drv_dsi_rx.o) + 0x00017150 0x00017150 0x00000010 Code RO 1787 i.drv_rx_phy_test_lock CVWL568.lib(drv_dsi_rx.o) + 0x00017160 0x00017160 0x00000014 Code RO 1789 i.drv_rx_phy_test_write_1_byte CVWL568.lib(drv_dsi_rx.o) + 0x00017174 0x00017174 0x00000016 Code RO 1790 i.drv_rx_phy_test_write_2_byte CVWL568.lib(drv_dsi_rx.o) + 0x0001718a 0x0001718a 0x0000000a Code RO 2053 i.drv_rxbr_clear_pkt_buffer CVWL568.lib(drv_rxbr.o) + 0x00017194 0x00017194 0x00000004 Code RO 2054 i.drv_rxbr_clear_status0 CVWL568.lib(drv_rxbr.o) + 0x00017198 0x00017198 0x0000005a Code RO 2056 i.drv_rxbr_enable_irq CVWL568.lib(drv_rxbr.o) + 0x000171f2 0x000171f2 0x00000002 PAD + 0x000171f4 0x000171f4 0x00000014 Code RO 2057 i.drv_rxbr_frame_drop_cfg CVWL568.lib(drv_rxbr.o) + 0x00017208 0x00017208 0x00000064 Code RO 2058 i.drv_rxbr_get_clk CVWL568.lib(drv_rxbr.o) + 0x0001726c 0x0001726c 0x00000004 Code RO 2059 i.drv_rxbr_get_col_addr CVWL568.lib(drv_rxbr.o) + 0x00017270 0x00017270 0x00000012 Code RO 1093 i.drv_rxbr_get_int_source CVWL568.lib(hal_internal_vsync.o) + 0x00017282 0x00017282 0x00000004 Code RO 2062 i.drv_rxbr_get_page_addr CVWL568.lib(drv_rxbr.o) + 0x00017286 0x00017286 0x00000012 Code RO 1094 i.drv_rxbr_get_status0 CVWL568.lib(hal_internal_vsync.o) + 0x00017298 0x00017298 0x0000000c Code RO 2064 i.drv_rxbr_hline_rcv0_cfg CVWL568.lib(drv_rxbr.o) + 0x000172a4 0x000172a4 0x00000008 Code RO 2065 i.drv_rxbr_hline_rcv_cfg CVWL568.lib(drv_rxbr.o) + 0x000172ac 0x000172ac 0x0000000c Code RO 2066 i.drv_rxbr_register_irq0_callback CVWL568.lib(drv_rxbr.o) + 0x000172b8 0x000172b8 0x0000000c Code RO 2067 i.drv_rxbr_register_irq1_callback CVWL568.lib(drv_rxbr.o) + 0x000172c4 0x000172c4 0x00000014 Code RO 2068 i.drv_rxbr_set_ack_pkt_header CVWL568.lib(drv_rxbr.o) + 0x000172d8 0x000172d8 0x000000cc Code RO 2069 i.drv_rxbr_set_cmd_filter CVWL568.lib(drv_rxbr.o) + 0x000173a4 0x000173a4 0x00000014 Code RO 2071 i.drv_rxbr_set_color_format CVWL568.lib(drv_rxbr.o) + 0x000173b8 0x000173b8 0x00000014 Code RO 2073 i.drv_rxbr_set_inten CVWL568.lib(drv_rxbr.o) + 0x000173cc 0x000173cc 0x00000010 Code RO 2074 i.drv_rxbr_set_ltpo_drop_th CVWL568.lib(drv_rxbr.o) + 0x000173dc 0x000173dc 0x00000026 Code RO 2076 i.drv_rxbr_set_usr_cfg CVWL568.lib(drv_rxbr.o) + 0x00017402 0x00017402 0x00000008 Code RO 2077 i.drv_rxbr_set_usr_col CVWL568.lib(drv_rxbr.o) + 0x0001740a 0x0001740a 0x00000008 Code RO 2078 i.drv_rxbr_set_usr_row CVWL568.lib(drv_rxbr.o) + 0x00017412 0x00017412 0x00000002 PAD + 0x00017414 0x00017414 0x00000020 Code RO 1645 i.drv_spi_m_read_data CVWL568.lib(drv_spi_master.o) + 0x00017434 0x00017434 0x00000054 Code RO 1673 i.drv_swire_set_int CVWL568.lib(drv_swire.o) + 0x00017488 0x00017488 0x0000001c Code RO 1674 i.drv_swire_set_power_down CVWL568.lib(drv_swire.o) + 0x000174a4 0x000174a4 0x0000000c Code RO 1689 i.drv_sys_cfg_clear_all_int CVWL568.lib(drv_sys_cfg.o) + 0x000174b0 0x000174b0 0x00000028 Code RO 1690 i.drv_sys_cfg_clear_pending CVWL568.lib(drv_sys_cfg.o) + 0x000174d8 0x000174d8 0x00000018 Code RO 1693 i.drv_sys_cfg_sel_ap_rst_lvl_trig CVWL568.lib(drv_sys_cfg.o) + 0x000174f0 0x000174f0 0x0000001c Code RO 1694 i.drv_sys_cfg_sel_ap_rst_trig CVWL568.lib(drv_sys_cfg.o) + 0x0001750c 0x0001750c 0x00000024 Code RO 1695 i.drv_sys_cfg_sel_gpio_group CVWL568.lib(drv_sys_cfg.o) + 0x00017530 0x00017530 0x00000024 Code RO 1696 i.drv_sys_cfg_sel_int_trig CVWL568.lib(drv_sys_cfg.o) + 0x00017554 0x00017554 0x00000010 Code RO 1698 i.drv_sys_cfg_set_dma_rx_req CVWL568.lib(drv_sys_cfg.o) + 0x00017564 0x00017564 0x00000010 Code RO 1699 i.drv_sys_cfg_set_dma_tx_req CVWL568.lib(drv_sys_cfg.o) + 0x00017574 0x00017574 0x00000024 Code RO 1700 i.drv_sys_cfg_set_int CVWL568.lib(drv_sys_cfg.o) + 0x00017598 0x00017598 0x0000001a Code RO 1723 i.drv_timer_clear_status_flags CVWL568.lib(drv_timer.o) + 0x000175b2 0x000175b2 0x00000020 Code RO 1724 i.drv_timer_enable CVWL568.lib(drv_timer.o) + 0x000175d2 0x000175d2 0x00000002 PAD + 0x000175d4 0x000175d4 0x00000010 Code RO 1725 i.drv_timer_get_instance CVWL568.lib(drv_timer.o) + 0x000175e4 0x000175e4 0x00000010 Code RO 1726 i.drv_timer_get_prescaler CVWL568.lib(drv_timer.o) + 0x000175f4 0x000175f4 0x00000044 Code RO 1728 i.drv_timer_handle_interrupt CVWL568.lib(drv_timer.o) + 0x00017638 0x00017638 0x00000014 Code RO 1729 i.drv_timer_register_callback CVWL568.lib(drv_timer.o) + 0x0001764c 0x0001764c 0x00000010 Code RO 1730 i.drv_timer_set_compare_val CVWL568.lib(drv_timer.o) + 0x0001765c 0x0001765c 0x00000054 Code RO 1731 i.drv_timer_set_int CVWL568.lib(drv_timer.o) + 0x000176b0 0x000176b0 0x00000028 Code RO 1732 i.drv_timer_set_prescaler CVWL568.lib(drv_timer.o) + 0x000176d8 0x000176d8 0x0000000a Code RO 1869 i.drv_tx_phy_test_clear CVWL568.lib(drv_dsi_tx.o) + 0x000176e2 0x000176e2 0x0000001c Code RO 1870 i.drv_tx_phy_test_enter CVWL568.lib(drv_dsi_tx.o) + 0x000176fe 0x000176fe 0x0000001c Code RO 1871 i.drv_tx_phy_test_exit CVWL568.lib(drv_dsi_tx.o) + 0x0001771a 0x0001771a 0x00000012 Code RO 1873 i.drv_tx_phy_test_write_1_byte CVWL568.lib(drv_dsi_tx.o) + 0x0001772c 0x0001772c 0x00000014 Code RO 1874 i.drv_tx_phy_test_write_2_byte CVWL568.lib(drv_dsi_tx.o) + 0x00017740 0x00017740 0x00000010 Code RO 1875 i.drv_tx_phy_test_write_code CVWL568.lib(drv_dsi_tx.o) + 0x00017750 0x00017750 0x00000008 Code RO 2117 i.drv_vidc_clear_irq CVWL568.lib(drv_vidc.o) + 0x00017758 0x00017758 0x00000018 Code RO 2121 i.drv_vidc_enable CVWL568.lib(drv_vidc.o) + 0x00017770 0x00017770 0x00000040 Code RO 2122 i.drv_vidc_enable_irq CVWL568.lib(drv_vidc.o) + 0x000177b0 0x000177b0 0x00000012 Code RO 2124 i.drv_vidc_get_irq_status CVWL568.lib(drv_vidc.o) + 0x000177c2 0x000177c2 0x00000002 PAD + 0x000177c4 0x000177c4 0x00000028 Code RO 2128 i.drv_vidc_init_module_enable CVWL568.lib(drv_vidc.o) + 0x000177ec 0x000177ec 0x0000000c Code RO 2129 i.drv_vidc_register_callback CVWL568.lib(drv_vidc.o) + 0x000177f8 0x000177f8 0x00000006 Code RO 2130 i.drv_vidc_reset CVWL568.lib(drv_vidc.o) + 0x000177fe 0x000177fe 0x0000003c Code RO 2132 i.drv_vidc_set_dst_parameter CVWL568.lib(drv_vidc.o) + 0x0001783a 0x0001783a 0x00000014 Code RO 2136 i.drv_vidc_set_irqen CVWL568.lib(drv_vidc.o) + 0x0001784e 0x0001784e 0x00000010 Code RO 2137 i.drv_vidc_set_mirror CVWL568.lib(drv_vidc.o) + 0x0001785e 0x0001785e 0x00000008 Code RO 2140 i.drv_vidc_set_p2r_hcoef0 CVWL568.lib(drv_vidc.o) + 0x00017866 0x00017866 0x00000026 Code RO 2141 i.drv_vidc_set_p2r_hinitb CVWL568.lib(drv_vidc.o) + 0x0001788c 0x0001788c 0x00000026 Code RO 2142 i.drv_vidc_set_p2r_hinitr CVWL568.lib(drv_vidc.o) + 0x000178b2 0x000178b2 0x00000002 PAD + 0x000178b4 0x000178b4 0x00000018 Code RO 2143 i.drv_vidc_set_pentile_swap CVWL568.lib(drv_vidc.o) + 0x000178cc 0x000178cc 0x0000000a Code RO 2144 i.drv_vidc_set_pu_ctrl CVWL568.lib(drv_vidc.o) + 0x000178d6 0x000178d6 0x00000010 Code RO 2145 i.drv_vidc_set_rotation CVWL568.lib(drv_vidc.o) + 0x000178e6 0x000178e6 0x0000000a Code RO 2146 i.drv_vidc_set_scld_hcoef0 CVWL568.lib(drv_vidc.o) + 0x000178f0 0x000178f0 0x0000000a Code RO 2147 i.drv_vidc_set_scld_hcoef1 CVWL568.lib(drv_vidc.o) + 0x000178fa 0x000178fa 0x00000012 Code RO 2148 i.drv_vidc_set_scld_step CVWL568.lib(drv_vidc.o) + 0x0001790c 0x0001790c 0x0000000a Code RO 2149 i.drv_vidc_set_scld_vcoef0 CVWL568.lib(drv_vidc.o) + 0x00017916 0x00017916 0x0000000a Code RO 2150 i.drv_vidc_set_scld_vcoef1 CVWL568.lib(drv_vidc.o) + 0x00017920 0x00017920 0x00000016 Code RO 2151 i.drv_vidc_set_src_parameter CVWL568.lib(drv_vidc.o) + 0x00017936 0x00017936 0x00000002 PAD + 0x00017938 0x00017938 0x00000010 Code RO 2740 i.drv_wdg_clear_counter CVWL568.lib(drv_wdg.o) + 0x00017948 0x00017948 0x00000010 Code RO 2741 i.drv_wdg_clear_edge_flag CVWL568.lib(drv_wdg.o) + 0x00017958 0x00017958 0x00000010 Code RO 2744 i.drv_wdg_read_edge_flag CVWL568.lib(drv_wdg.o) + 0x00017968 0x00017968 0x00000040 Code RO 2747 i.drv_wdg_set_int CVWL568.lib(drv_wdg.o) + 0x000179a8 0x000179a8 0x0000000a Code RO 1357 i.fls_clr_interrupt_flag CVWL568.lib(drv_fls.o) + 0x000179b2 0x000179b2 0x00000014 Code RO 2347 i.fputc CVWL568.lib(tau_log.o) + 0x000179c6 0x000179c6 0x00000002 PAD + 0x000179c8 0x000179c8 0x00000034 Code RO 542 i.hal_dsi_rx_ctrl_create_handle CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x000179fc 0x000179fc 0x0000009c Code RO 544 i.hal_dsi_rx_ctrl_deinit CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00017a98 0x00017a98 0x00000084 Code RO 546 i.hal_dsi_rx_ctrl_dsc_async_handler CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00017b1c 0x00017b1c 0x00000028 Code RO 548 i.hal_dsi_rx_ctrl_gen_a_tear_signal CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00017b44 0x00017b44 0x00000028 Code RO 550 i.hal_dsi_rx_ctrl_get_max_ret_size CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00017b6c 0x00017b6c 0x00000064 Code RO 551 i.hal_dsi_rx_ctrl_hight_performan_mode CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00017bd0 0x00017bd0 0x00000098 Code RO 552 i.hal_dsi_rx_ctrl_init CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00017c68 0x00017c68 0x000001a4 Code RO 553 i.hal_dsi_rx_ctrl_init_clk CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00017e0c 0x00017e0c 0x000000d8 Code RO 554 i.hal_dsi_rx_ctrl_init_dsi_rx CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00017ee4 0x00017ee4 0x00000158 Code RO 555 i.hal_dsi_rx_ctrl_init_memc CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x0001803c 0x0001803c 0x00000148 Code RO 556 i.hal_dsi_rx_ctrl_init_rxbr CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00018184 0x00018184 0x0000022c Code RO 557 i.hal_dsi_rx_ctrl_init_vidc CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x000183b0 0x000183b0 0x0000003c Code RO 558 i.hal_dsi_rx_ctrl_pre_init_pps CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x000183ec 0x000183ec 0x000000f0 Code RO 561 i.hal_dsi_rx_ctrl_send_ack_cmd CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x000184dc 0x000184dc 0x00000034 Code RO 565 i.hal_dsi_rx_ctrl_set_cus_sync_line CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00018510 0x00018510 0x00000034 Code RO 568 i.hal_dsi_rx_ctrl_set_hw_tear_mode CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00018544 0x00018544 0x00000038 Code RO 569 i.hal_dsi_rx_ctrl_set_ipi_cfg CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x0001857c 0x0001857c 0x00000072 Code RO 574 i.hal_dsi_rx_ctrl_set_rxbr_clk CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x000185ee 0x000185ee 0x00000002 PAD + 0x000185f0 0x000185f0 0x00000034 Code RO 575 i.hal_dsi_rx_ctrl_set_sw_tear_mode CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00018624 0x00018624 0x0000000e Code RO 577 i.hal_dsi_rx_ctrl_set_tear_mode_ex CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00018632 0x00018632 0x00000002 PAD + 0x00018634 0x00018634 0x0000003c Code RO 578 i.hal_dsi_rx_ctrl_start CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00018670 0x00018670 0x0000003c Code RO 579 i.hal_dsi_rx_ctrl_stop CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x000186ac 0x000186ac 0x00000020 Code RO 581 i.hal_dsi_rx_ctrl_toggle_resolution CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x000186cc 0x000186cc 0x00000190 Code RO 635 i.hal_dsi_tx_calc_video_chunks CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x0001885c 0x0001885c 0x00000034 Code RO 636 i.hal_dsi_tx_config_params_for_lane_rate CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018890 0x00018890 0x00000450 Code RO 637 i.hal_dsi_tx_count_lane_rate CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018ce0 0x00018ce0 0x0000002c Code RO 640 i.hal_dsi_tx_ctrl_create_handle CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018d0c 0x00018d0c 0x00000084 Code RO 641 i.hal_dsi_tx_ctrl_deinit CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018d90 0x00018d90 0x0000004c Code RO 645 i.hal_dsi_tx_ctrl_enter_init_panel_mode CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018ddc 0x00018ddc 0x00000028 Code RO 647 i.hal_dsi_tx_ctrl_exit_init_panel_mode CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018e04 0x00018e04 0x000000a4 Code RO 649 i.hal_dsi_tx_ctrl_init CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018ea8 0x00018ea8 0x00000024 Code RO 650 i.hal_dsi_tx_ctrl_init_clk CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018ecc 0x00018ecc 0x0000000c Code RO 651 i.hal_dsi_tx_ctrl_panel_reset_pin CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018ed8 0x00018ed8 0x00000020 Code RO 654 i.hal_dsi_tx_ctrl_set_ccm CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018ef8 0x00018ef8 0x00000014 Code RO 660 i.hal_dsi_tx_ctrl_set_overwrite_rgb CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018f0c 0x00018f0c 0x00000010 Code RO 661 i.hal_dsi_tx_ctrl_set_partial_disp CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018f1c 0x00018f1c 0x00000024 Code RO 662 i.hal_dsi_tx_ctrl_set_partial_disp_area CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018f40 0x00018f40 0x0000009c Code RO 665 i.hal_dsi_tx_ctrl_start CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018fdc 0x00018fdc 0x00000044 Code RO 666 i.hal_dsi_tx_ctrl_stop CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00019020 0x00019020 0x000000d8 Code RO 667 i.hal_dsi_tx_ctrl_write_array_cmd CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x000190f8 0x000190f8 0x000000b0 Code RO 668 i.hal_dsi_tx_ctrl_write_cmd CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x000191a8 0x000191a8 0x00000044 Code RO 669 i.hal_dsi_tx_init_data_mode CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x000191ec 0x000191ec 0x00000030 Code RO 670 i.hal_dsi_tx_init_dpi_cfg CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x0001921c 0x0001921c 0x00000020 Code RO 671 i.hal_dsi_tx_init_interrupt CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x0001923c 0x0001923c 0x00000020 Code RO 672 i.hal_dsi_tx_init_phy_cfg CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x0001925c 0x0001925c 0x00000094 Code RO 673 i.hal_dsi_tx_init_remains CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x000192f0 0x000192f0 0x00000058 Code RO 674 i.hal_dsi_tx_init_video_mode CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00019348 0x00019348 0x00000044 Code RO 675 i.hal_dsi_tx_send_cmd CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x0001938c 0x0001938c 0x00000018 Code RO 740 i.hal_gpio_ctrl_eint CVWL568.lib(hal_gpio.o) + 0x000193a4 0x000193a4 0x00000012 Code RO 741 i.hal_gpio_get_input_data CVWL568.lib(hal_gpio.o) + 0x000193b6 0x000193b6 0x00000002 PAD + 0x000193b8 0x000193b8 0x00000040 Code RO 744 i.hal_gpio_init_eint CVWL568.lib(hal_gpio.o) + 0x000193f8 0x000193f8 0x00000020 Code RO 745 i.hal_gpio_init_input CVWL568.lib(hal_gpio.o) + 0x00019418 0x00019418 0x00000028 Code RO 746 i.hal_gpio_init_output CVWL568.lib(hal_gpio.o) + 0x00019440 0x00019440 0x00000018 Code RO 747 i.hal_gpio_reg_eint_cb CVWL568.lib(hal_gpio.o) + 0x00019458 0x00019458 0x00000050 Code RO 748 i.hal_gpio_set_ap_reset_int CVWL568.lib(hal_gpio.o) + 0x000194a8 0x000194a8 0x00000060 Code RO 750 i.hal_gpio_set_mode CVWL568.lib(hal_gpio.o) + 0x00019508 0x00019508 0x00000008 Code RO 751 i.hal_gpio_set_output_data CVWL568.lib(hal_gpio.o) + 0x00019510 0x00019510 0x00000020 Code RO 753 i.hal_gpio_set_pull_state CVWL568.lib(hal_gpio.o) + 0x00019530 0x00019530 0x0000006c Code RO 779 i.hal_i2c_m_dma_init CVWL568.lib(hal_i2c_master.o) + 0x0001959c 0x0001959c 0x00000020 Code RO 780 i.hal_i2c_m_dma_read CVWL568.lib(hal_i2c_master.o) + 0x000195bc 0x000195bc 0x0000001c Code RO 781 i.hal_i2c_m_dma_write CVWL568.lib(hal_i2c_master.o) + 0x000195d8 0x000195d8 0x0000000c Code RO 783 i.hal_i2c_m_transfer_complate CVWL568.lib(hal_i2c_master.o) + 0x000195e4 0x000195e4 0x00000020 Code RO 784 i.hal_i2c_master_irq_callback CVWL568.lib(hal_i2c_master.o) + 0x00019604 0x00019604 0x00000010 Code RO 798 i.hal_i2c_s_dma_user_callback CVWL568.lib(hal_i2c_slave.o) + 0x00019614 0x00019614 0x0000004c Code RO 799 i.hal_i2c_s_dma_write CVWL568.lib(hal_i2c_slave.o) + 0x00019660 0x00019660 0x000000c8 Code RO 801 i.hal_i2c_s_init CVWL568.lib(hal_i2c_slave.o) + 0x00019728 0x00019728 0x00000014 Code RO 802 i.hal_i2c_s_nonblocking_read CVWL568.lib(hal_i2c_slave.o) + 0x0001973c 0x0001973c 0x0000000c Code RO 810 i.hal_i2c_s_set_transfer CVWL568.lib(hal_i2c_slave.o) + 0x00019748 0x00019748 0x00000174 Code RO 813 i.hal_i2c_slave_irq_callback CVWL568.lib(hal_i2c_slave.o) + 0x000198bc 0x000198bc 0x000000fc Code RO 1095 i.hal_internal_init_memc CVWL568.lib(hal_internal_vsync.o) + 0x000199b8 0x000199b8 0x00000010 Code RO 1097 i.hal_internal_sync_get_fb_setting CVWL568.lib(hal_internal_vsync.o) + 0x000199c8 0x000199c8 0x00000010 Code RO 1098 i.hal_internal_sync_get_hight_performan_mode CVWL568.lib(hal_internal_vsync.o) + 0x000199d8 0x000199d8 0x0000022c Code RO 1099 i.hal_internal_sync_input_resolution_change CVWL568.lib(hal_internal_vsync.o) + 0x00019c04 0x00019c04 0x00000010 Code RO 1102 i.hal_internal_update_dpi_param CVWL568.lib(hal_internal_vsync.o) + 0x00019c14 0x00019c14 0x0000012c Code RO 1103 i.hal_internal_video_mode_auto_sync CVWL568.lib(hal_internal_vsync.o) + 0x00019d40 0x00019d40 0x00000028 Code RO 1104 i.hal_internal_vsync_deinit CVWL568.lib(hal_internal_vsync.o) + 0x00019d68 0x00019d68 0x0000000c Code RO 1105 i.hal_internal_vsync_get_rx_state CVWL568.lib(hal_internal_vsync.o) + 0x00019d74 0x00019d74 0x00000018 Code RO 1106 i.hal_internal_vsync_get_sync_line CVWL568.lib(hal_internal_vsync.o) + 0x00019d8c 0x00019d8c 0x0000000c Code RO 1107 i.hal_internal_vsync_get_tear_mode CVWL568.lib(hal_internal_vsync.o) + 0x00019d98 0x00019d98 0x0000000c Code RO 1108 i.hal_internal_vsync_get_tx_state CVWL568.lib(hal_internal_vsync.o) + 0x00019da4 0x00019da4 0x00000118 Code RO 1109 i.hal_internal_vsync_init_rx CVWL568.lib(hal_internal_vsync.o) + 0x00019ebc 0x00019ebc 0x000000b0 Code RO 1110 i.hal_internal_vsync_init_tx CVWL568.lib(hal_internal_vsync.o) + 0x00019f6c 0x00019f6c 0x0000011c Code RO 1112 i.hal_internal_vsync_set_auto_hw_filter CVWL568.lib(hal_internal_vsync.o) + 0x0001a088 0x0001a088 0x00000014 Code RO 1114 i.hal_internal_vsync_set_rx_state CVWL568.lib(hal_internal_vsync.o) + 0x0001a09c 0x0001a09c 0x00000024 Code RO 1115 i.hal_internal_vsync_set_sync_line CVWL568.lib(hal_internal_vsync.o) + 0x0001a0c0 0x0001a0c0 0x00000050 Code RO 1116 i.hal_internal_vsync_set_tear_mode CVWL568.lib(hal_internal_vsync.o) + 0x0001a110 0x0001a110 0x00000080 Code RO 1117 i.hal_internal_vsync_set_tx_state CVWL568.lib(hal_internal_vsync.o) + 0x0001a190 0x0001a190 0x00000024 Code RO 676 i.hal_lcdc_config_ccm CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x0001a1b4 0x0001a1b4 0x00000058 Code RO 677 i.hal_lcdc_config_remains CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x0001a20c 0x0001a20c 0x00000014 Code RO 678 i.hal_lcdc_config_rgb_to_pentile CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x0001a220 0x0001a220 0x00000164 Code RO 679 i.hal_lcdc_config_upscaler CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x0001a384 0x0001a384 0x00000054 Code RO 680 i.hal_lcdc_init_cfg CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x0001a3d8 0x0001a3d8 0x000001b0 Code RO 681 i.hal_lcdc_init_clk CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x0001a588 0x0001a588 0x00000040 Code RO 682 i.hal_lcdc_init_interrupt CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x0001a5c8 0x0001a5c8 0x0000000e Code RO 838 i.hal_spi_m_clear_rxfifo CVWL568.lib(hal_spi_master.o) + 0x0001a5d6 0x0001a5d6 0x00000016 Code RO 864 i.hal_swire_open CVWL568.lib(hal_swire.o) + 0x0001a5ec 0x0001a5ec 0x00000008 Code RO 879 i.hal_system_enable_systick CVWL568.lib(hal_system.o) + 0x0001a5f4 0x0001a5f4 0x00000088 Code RO 883 i.hal_system_init CVWL568.lib(hal_system.o) + 0x0001a67c 0x0001a67c 0x0000001c Code RO 884 i.hal_system_init_console CVWL568.lib(hal_system.o) + 0x0001a698 0x0001a698 0x00000008 Code RO 887 i.hal_system_set_phy_calibration CVWL568.lib(hal_system.o) + 0x0001a6a0 0x0001a6a0 0x00000008 Code RO 888 i.hal_system_set_pvd CVWL568.lib(hal_system.o) + 0x0001a6a8 0x0001a6a8 0x00000008 Code RO 889 i.hal_system_set_vcc CVWL568.lib(hal_system.o) + 0x0001a6b0 0x0001a6b0 0x0000001a Code RO 914 i.hal_timer_init CVWL568.lib(hal_timer.o) + 0x0001a6ca 0x0001a6ca 0x00000002 PAD + 0x0001a6cc 0x0001a6cc 0x00000048 Code RO 916 i.hal_timer_start CVWL568.lib(hal_timer.o) + 0x0001a714 0x0001a714 0x00000028 Code RO 918 i.hal_timer_stop CVWL568.lib(hal_timer.o) + 0x0001a73c 0x0001a73c 0x0000008c Code RO 1071 i.hal_uart_init CVWL568.lib(hal_uart.o) + 0x0001a7c8 0x0001a7c8 0x00000010 Code RO 1074 i.hal_uart_transmit_blocking CVWL568.lib(hal_uart.o) + 0x0001a7d8 0x0001a7d8 0x00000110 Code RO 2227 i.handle_init CVWL568.lib(irq_redirect .o) + 0x0001a8e8 0x0001a8e8 0x00000064 Code RO 116 i.init_mipi_tx ap_demo.o + 0x0001a94c 0x0001a94c 0x00000088 Code RO 117 i.init_panel ap_demo.o + 0x0001a9d4 0x0001a9d4 0x0000000a Code RO 3 i.main main.o + 0x0001a9de 0x0001a9de 0x00000002 PAD + 0x0001a9e0 0x0001a9e0 0x000000a0 Code RO 118 i.open_mipi_rx ap_demo.o + 0x0001aa80 0x0001aa80 0x00000054 Code RO 119 i.pps_update_handle ap_demo.o + 0x0001aad4 0x0001aad4 0x000003f4 Code RO 1121 i.rx_get_dcs_packet_data CVWL568.lib(hal_internal_vsync.o) + 0x0001aec8 0x0001aec8 0x00000178 Code RO 1122 i.rx_partial_update CVWL568.lib(hal_internal_vsync.o) + 0x0001b040 0x0001b040 0x0000008c Code RO 1123 i.rx_receive_packet CVWL568.lib(hal_internal_vsync.o) + 0x0001b0cc 0x0001b0cc 0x00000180 Code RO 1124 i.rx_receive_pps CVWL568.lib(hal_internal_vsync.o) + 0x0001b24c 0x0001b24c 0x000000a4 Code RO 1125 i.rxbr_irq0_callback CVWL568.lib(hal_internal_vsync.o) + 0x0001b2f0 0x0001b2f0 0x000001dc Code RO 1126 i.rxbr_irq1_callback CVWL568.lib(hal_internal_vsync.o) + 0x0001b4cc 0x0001b4cc 0x000000c4 Code RO 1127 i.soft_gen_te CVWL568.lib(hal_internal_vsync.o) + 0x0001b590 0x0001b590 0x000000c0 Code RO 1128 i.soft_gen_te_double_buffer CVWL568.lib(hal_internal_vsync.o) + 0x0001b650 0x0001b650 0x00000030 Code RO 120 i.soft_timer3_cb ap_demo.o + 0x0001b680 0x0001b680 0x00000048 Code RO 2767 i.sqrt m_ps.l(sqrt.o) + 0x0001b6c8 0x0001b6c8 0x00000040 Code RO 121 i.tp_heartbeat_exec ap_demo.o + 0x0001b708 0x0001b708 0x00000108 Code RO 1129 i.vidc_callback CVWL568.lib(hal_internal_vsync.o) + 0x0001b810 0x0001b810 0x000000d0 Code RO 1130 i.vpre_err_reset CVWL568.lib(hal_internal_vsync.o) + 0x0001b8e0 0x0001b8e0 0x000001cc Code RO 1131 i.vsync_set_te_mode CVWL568.lib(hal_internal_vsync.o) + 0x0001baac 0x0001baac 0x000000f8 Data RO 122 .constdata ap_demo.o + 0x0001bba4 0x0001bba4 0x00000020 Data RO 425 .constdata app_tp_st_touch.o + 0x0001bbc4 0x0001bbc4 0x00000024 Data RO 684 .constdata CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x0001bbe8 0x0001bbe8 0x000000d2 Data RO 756 .constdata CVWL568.lib(hal_gpio.o) + 0x0001bcba 0x0001bcba 0x00000002 PAD + 0x0001bcbc 0x0001bcbc 0x00000020 Data RO 814 .constdata CVWL568.lib(hal_i2c_slave.o) + 0x0001bcdc 0x0001bcdc 0x00002150 Data RO 942 .constdata WL568_20U_HX667_TP.lib(app_tp_for_custom_s8.o) + 0x0001de2c 0x0001de2c 0x00000001 Data RO 955 .constdata WL568_20U_HX667_TP.lib(app_tp_for_custom_s8.o) + 0x0001de2d 0x0001de2d 0x00000003 PAD + 0x0001de30 0x0001de30 0x00000008 Data RO 1582 .constdata CVWL568.lib(drv_param_init.o) + 0x0001de38 0x0001de38 0x00000186 Data RO 2299 .constdata CVWL568.lib(drv_phy_common.o) + 0x0001dfbe 0x0001dfbe 0x00000002 PAD + 0x0001dfc0 0x0001dfc0 0x00000048 Data RO 585 .conststring CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x0001e008 0x0001e008 0x00000043 Data RO 685 .conststring CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x0001e04b 0x0001e04b 0x00000001 PAD + 0x0001e04c 0x0001e04c 0x00000134 Data RO 1133 .conststring CVWL568.lib(hal_internal_vsync.o) + 0x0001e180 0x0001e180 0x00000030 Data RO 3129 Region$$Table anon$$obj.o + + + Execution Region RW_RAM1 (Exec base: 0x00070000, Load base: 0x0001e1b0, Size: 0x00000000, Max: 0x000000f0, ABSOLUTE) + + **** No section assigned to this execution region **** + + + Execution Region RW_RAM2 (Exec base: 0x00070100, Load base: 0x0001e1b0, Size: 0x000000c0, Max: 0x000000d0, ABSOLUTE) + + Exec Addr Load Addr Size Type Attr Idx E Section Name Object + + 0x00070100 - 0x000000c0 Zero RW 2228 .ARM.__AT_0x00070100 CVWL568.lib(irq_redirect .o) + + + Execution Region RW_RAM3 (Exec base: 0x000701d0, Load base: 0x0001e1b0, Size: 0x00005480, Max: 0x00007e30, ABSOLUTE, COMPRESSED[0x00001450]) + + Exec Addr Load Addr Size Type Attr Idx E Section Name Object + + 0x000701d0 COMPRESSED 0x00001d66 Data RW 123 .data ap_demo.o + 0x00071f36 COMPRESSED 0x00000017 Data RW 287 .data app_tp_transfer.o + 0x00071f4d COMPRESSED 0x00000028 Data RW 426 .data app_tp_st_touch.o + 0x00071f75 COMPRESSED 0x00000003 PAD + 0x00071f78 COMPRESSED 0x00000008 Data RW 586 .data CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00071f80 COMPRESSED 0x00000003 Data RW 686 .data CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00071f83 COMPRESSED 0x00000001 Data RW 785 .data CVWL568.lib(hal_i2c_master.o) + 0x00071f84 COMPRESSED 0x00000020 Data RW 815 .data CVWL568.lib(hal_i2c_slave.o) + 0x00071fa4 COMPRESSED 0x000000e4 Data RW 956 .data WL568_20U_HX667_TP.lib(app_tp_for_custom_s8.o) + 0x00072088 COMPRESSED 0x00000001 Data RW 959 .data WL568_20U_HX667_TP.lib(app_tp_for_custom_s8.o) + 0x00072089 COMPRESSED 0x00000001 Data RW 960 .data WL568_20U_HX667_TP.lib(app_tp_for_custom_s8.o) + 0x0007208a COMPRESSED 0x00000001 Data RW 965 .data WL568_20U_HX667_TP.lib(app_tp_for_custom_s8.o) + 0x0007208b COMPRESSED 0x00000003 Data RW 966 .data WL568_20U_HX667_TP.lib(app_tp_for_custom_s8.o) + 0x0007208e COMPRESSED 0x00000005 Data RW 967 .data WL568_20U_HX667_TP.lib(app_tp_for_custom_s8.o) + 0x00072093 COMPRESSED 0x00000001 PAD + 0x00072094 COMPRESSED 0x00000030 Data RW 977 .data WL568_20U_HX667_TP.lib(app_tp_for_custom_s8.o) + 0x000720c4 COMPRESSED 0x00000018 Data RW 1134 .data CVWL568.lib(hal_internal_vsync.o) + 0x000720dc COMPRESSED 0x0000000c Data RW 1193 .data CVWL568.lib(drv_common.o) + 0x000720e8 COMPRESSED 0x00000004 Data RW 1460 .data CVWL568.lib(drv_gpio.o) + 0x000720ec COMPRESSED 0x00000008 Data RW 1498 .data CVWL568.lib(drv_i2c_dma.o) + 0x000720f4 COMPRESSED 0x00000004 Data RW 1527 .data CVWL568.lib(drv_i2c_master.o) + 0x000720f8 COMPRESSED 0x00000004 Data RW 1558 .data CVWL568.lib(drv_i2c_slave.o) + 0x000720fc COMPRESSED 0x000004a4 Data RW 1583 .data CVWL568.lib(drv_param_init.o) + 0x000725a0 COMPRESSED 0x00000004 Data RW 1650 .data CVWL568.lib(drv_spi_master.o) + 0x000725a4 COMPRESSED 0x00000008 Data RW 1676 .data CVWL568.lib(drv_swire.o) + 0x000725ac COMPRESSED 0x00000001 Data RW 1701 .data CVWL568.lib(drv_sys_cfg.o) + 0x000725ad COMPRESSED 0x00000003 PAD + 0x000725b0 COMPRESSED 0x00000050 Data RW 1734 .data CVWL568.lib(drv_timer.o) + 0x00072600 COMPRESSED 0x00000008 Data RW 2080 .data CVWL568.lib(drv_rxbr.o) + 0x00072608 COMPRESSED 0x00000004 Data RW 2153 .data CVWL568.lib(drv_vidc.o) + 0x0007260c COMPRESSED 0x00000001 Data RW 2300 .data CVWL568.lib(drv_phy_common.o) + 0x0007260d COMPRESSED 0x00000003 PAD + 0x00072610 COMPRESSED 0x0000000c Data RW 2320 .data CVWL568.lib(drv_chip_info.o) + 0x0007261c COMPRESSED 0x00000006 Data RW 2357 .data tp_EncryptCheck.lib(app_tp_enc.o) + 0x00072622 COMPRESSED 0x00000002 PAD + 0x00072624 COMPRESSED 0x00000012 Data RW 2517 .data CVWL568.lib(norflash.o) + 0x00072636 COMPRESSED 0x00000002 PAD + 0x00072638 COMPRESSED 0x0000000c Data RW 2604 .data CVWL568.lib(drv_pwm.o) + 0x00072644 COMPRESSED 0x00000008 Data RW 2682 .data CVWL568.lib(drv_uart.o) + 0x0007264c COMPRESSED 0x0000000c Data RW 2749 .data CVWL568.lib(drv_wdg.o) + 0x00072658 COMPRESSED 0x00000004 Data RW 3098 .data mc_p.l(stdout.o) + 0x0007265c COMPRESSED 0x00000004 Data RW 3110 .data mc_p.l(errno.o) + 0x00072660 - 0x00000190 Zero RW 286 .bss app_tp_transfer.o + 0x000727f0 - 0x0000000c Zero RW 424 .bss app_tp_st_touch.o + 0x000727fc - 0x000000c4 Zero RW 584 .bss CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x000728c0 - 0x0000004c Zero RW 683 .bss CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x0007290c - 0x000000d0 Zero RW 1076 .bss CVWL568.lib(hal_uart.o) + 0x000729dc - 0x00000984 Zero RW 1132 .bss CVWL568.lib(hal_internal_vsync.o) + 0x00073360 - 0x0000001c Zero RW 1322 .bss CVWL568.lib(drv_dma.o) + 0x0007337c - 0x00000040 Zero RW 1459 .bss CVWL568.lib(drv_gpio.o) + 0x000733bc - 0x00000140 Zero RW 1497 .bss CVWL568.lib(drv_i2c_dma.o) + 0x000734fc - 0x00001030 Zero RW 1757 .bss CVWL568.lib(dcs_packet_fifo.o) + 0x0007452c - 0x00000100 Zero RW 2348 .bss CVWL568.lib(tau_log.o) + 0x0007462c - 0x00000020 Zero RW 2452 .bss CVWL568.lib(hal_spi_slave.o) + 0x0007464c COMPRESSED 0x00000004 PAD + 0x00074650 - 0x00001000 Zero RW 531 STACK startup_armcm0.o + + +============================================================================== + +Image component sizes + + + Code (inc. data) RO Data RW Data ZI Data Debug Object Name + + 6496 208 248 7526 0 37825 ap_demo.o + 1110 94 32 40 12 11805 app_tp_st_touch.o + 992 96 0 23 400 12927 app_tp_transfer.o + 36 6 0 0 0 513 board.o + 10 0 0 0 0 5663 main.o + 120 18 192 0 4096 2084 startup_armcm0.o + + ---------------------------------------------------------------------- + 8770 422 520 7592 4508 70817 Object Totals + 0 0 48 0 0 0 (incl. Generated) + 6 0 0 3 0 0 (incl. Padding) + + ---------------------------------------------------------------------- + + Code (inc. data) RO Data RW Data ZI Data Debug Library Member Name + + 216 32 0 0 4144 252 dcs_packet_fifo.o + 272 96 0 12 0 256 drv_chip_info.o + 192 82 24 12 0 264 drv_common.o + 420 90 0 0 0 1200 drv_crgu.o + 410 28 0 0 28 796 drv_dma.o + 232 28 0 0 0 340 drv_dsc_dec.o + 1644 494 0 0 0 1336 drv_dsi_rx.o + 1528 118 0 0 0 2428 drv_dsi_tx.o + 132 0 0 0 0 256 drv_efuse.o + 10 0 0 0 0 60 drv_fls.o + 796 112 0 4 64 1236 drv_gpio.o + 600 82 0 8 320 624 drv_i2c_dma.o + 360 86 0 4 0 456 drv_i2c_master.o + 292 36 0 4 0 580 drv_i2c_slave.o + 704 6 0 0 0 1504 drv_lcdc.o + 492 28 0 0 0 1112 drv_memc.o + 112 36 8 1188 0 376 drv_param_init.o + 428 30 390 1 0 664 drv_phy_common.o + 72 10 0 12 0 76 drv_pwm.o + 112 24 0 0 0 180 drv_pwr.o + 722 84 0 8 0 1456 drv_rxbr.o + 104 24 0 4 0 188 drv_spi_master.o + 144 16 0 8 0 200 drv_swire.o + 300 64 0 1 0 628 drv_sys_cfg.o + 358 30 0 80 0 872 drv_timer.o + 698 18 0 8 0 680 drv_uart.o + 510 28 0 4 0 1452 drv_vidc.o + 168 22 0 12 0 316 drv_wdg.o + 3328 398 72 8 196 1668 hal_dsi_rx_ctrl.o + 4344 304 103 3 76 2408 hal_dsi_tx_ctrl.o + 450 48 210 0 0 752 hal_gpio.o + 212 40 0 1 0 340 hal_i2c_master.o + 696 70 32 32 0 408 hal_i2c_slave.o + 8084 1704 308 24 2436 2616 hal_internal_vsync.o + 14 0 0 0 0 68 hal_spi_master.o + 580 32 0 0 32 136 hal_spi_slave.o + 22 0 0 0 0 68 hal_swire.o + 196 32 0 0 0 408 hal_system.o + 138 6 0 0 0 208 hal_timer.o + 156 18 0 0 208 144 hal_uart.o + 1076 324 0 0 192 1980 irq_redirect .o + 48 10 0 18 0 68 norflash.o + 58 0 0 0 0 128 tau_delay.o + 60 10 0 0 256 156 tau_log.o + 1784 74 8529 287 0 18027 app_tp_for_custom_s8.o + 200 20 0 0 0 76 ceil.o + 72 6 0 0 0 76 sqrt.o + 86 0 0 0 0 0 __dczerorl2.o + 0 0 0 0 0 0 entry.o + 0 0 0 0 0 0 entry10a.o + 0 0 0 0 0 0 entry11a.o + 8 4 0 0 0 0 entry2.o + 4 0 0 0 0 0 entry5.o + 0 0 0 0 0 0 entry7b.o + 0 0 0 0 0 0 entry8b.o + 8 4 0 0 0 0 entry9a.o + 12 6 0 4 0 60 errno.o + 30 0 0 0 0 0 handlers.o + 40 0 0 0 0 72 idiv.o + 36 8 0 0 0 68 init.o + 0 0 0 0 0 0 iusefp.o + 32 0 0 0 0 68 llshl.o + 38 0 0 0 0 68 llsshr.o + 34 0 0 0 0 68 llushr.o + 36 0 0 0 0 60 memcpya.o + 36 0 0 0 0 100 memseta.o + 2298 104 0 0 0 544 printfa.o + 0 0 0 4 0 0 stdout.o + 44 0 0 0 0 72 uidiv.o + 96 0 0 0 0 84 uldiv.o + 40 2 0 0 0 68 cdcmple.o + 40 2 0 0 0 68 cdrcmple.o + 20 0 0 0 0 68 cfrcmple.o + 356 4 0 0 0 140 dadd.o + 240 6 0 0 0 84 ddiv.o + 236 0 0 0 0 216 depilogue.o + 72 10 0 0 0 72 dfixi.o + 60 10 0 0 0 68 dfixui.o + 64 10 0 0 0 68 dfixul.o + 28 4 0 0 0 68 dfltui.o + 208 6 0 0 0 88 dmul.o + 162 0 0 0 0 80 dsqrt.o + 40 0 0 0 0 60 f2d.o + 178 0 0 0 0 108 fadd.o + 124 0 0 0 0 72 fdiv.o + 130 0 0 0 0 144 fepilogue.o + 50 0 0 0 0 60 ffixi.o + 40 0 0 0 0 60 ffixui.o + 22 0 0 0 0 68 fflti.o + 14 0 0 0 0 68 ffltui.o + 122 0 0 0 0 72 fmul.o + 24 0 0 0 0 60 fscalb.o + 100 10 0 6 0 4107 app_tp_enc.o + + ---------------------------------------------------------------------- + 38802 4990 9684 1768 7956 56754 Library Totals + 48 0 8 11 4 0 (incl. Padding) + + ---------------------------------------------------------------------- + + Code (inc. data) RO Data RW Data ZI Data Debug Library Name + + 31490 4700 1147 1456 7952 31344 CVWL568.lib + 1784 74 8529 287 0 18027 WL568_20U_HX667_TP.lib + 272 26 0 0 0 152 m_ps.l + 2838 126 0 8 0 1264 mc_p.l + 2270 54 0 0 0 1860 mf_p.l + 100 10 0 6 0 4107 tp_EncryptCheck.lib + + ---------------------------------------------------------------------- + 38802 4990 9684 1768 7956 56754 Library Totals + + ---------------------------------------------------------------------- + +============================================================================== + + + Code (inc. data) RO Data RW Data ZI Data Debug + + 47572 5412 10204 9360 12464 103087 Grand Totals + 47572 5412 10204 5200 12464 103087 ELF Image Totals (compressed) + 47572 5412 10204 5200 0 0 ROM Totals + +============================================================================== + + Total RO Size (Code + RO Data) 57776 ( 56.42kB) + Total RW Size (RW Data + ZI Data) 21824 ( 21.31kB) + Total ROM Size (Code + RO Data + RW Data) 62976 ( 61.50kB) + +============================================================================== + diff --git a/project/ISP_568/Listings/WL568_S20U_CSOT667_V100_20230713_NoBlue.map b/project/ISP_568/Listings/WL568_S20U_CSOT667_V100_20230713_NoBlue.map new file mode 100644 index 0000000..1664d9f --- /dev/null +++ b/project/ISP_568/Listings/WL568_S20U_CSOT667_V100_20230713_NoBlue.map @@ -0,0 +1,5386 @@ +Component: ARM Compiler 5.06 update 6 (build 750) Tool: armlink [4d35ed] + +============================================================================== + +Section Cross References + + main.o(i.main) refers to board.o(i.board_Init) for board_Init + main.o(i.main) refers to ap_demo.o(i.ap_demo) for ap_demo + ap_demo.o(i.Gpio_swire_output) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + ap_demo.o(i.Gpio_swire_output) refers to tau_delay.o(i.delayUs) for delayUs + ap_demo.o(i.Gpio_swire_output) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + ap_demo.o(i.ap_dcs_read) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) for hal_dsi_rx_ctrl_get_max_ret_size + ap_demo.o(i.ap_dcs_read) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) for hal_dsi_rx_ctrl_send_ack_cmd + ap_demo.o(i.ap_dcs_read) refers to app_tp_st_touch.o(i.ap_get_tp_calibration_status_01) for ap_get_tp_calibration_status_01 + ap_demo.o(i.ap_dcs_read) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_demo) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + ap_demo.o(i.ap_demo) refers to app_tp_transfer.o(i.app_tp_I2C_init) for app_tp_I2C_init + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.open_mipi_rx) for open_mipi_rx + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.init_mipi_tx) for init_mipi_tx + ap_demo.o(i.ap_demo) refers to app_tp_transfer.o(i.app_tp_init) for app_tp_init + ap_demo.o(i.ap_demo) refers to hal_timer.o(i.hal_timer_init) for hal_timer_init + ap_demo.o(i.ap_demo) refers to hal_timer.o(i.hal_timer_start) for hal_timer_start + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.init_panel) for init_panel + ap_demo.o(i.ap_demo) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) for hal_dsi_tx_ctrl_start + ap_demo.o(i.ap_demo) refers to tau_delay.o(i.delayMs) for delayMs + ap_demo.o(i.ap_demo) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.Gpio_swire_output) for Gpio_swire_output + ap_demo.o(i.ap_demo) refers to hal_gpio.o(i.hal_gpio_set_ap_reset_int) for hal_gpio_set_ap_reset_int + ap_demo.o(i.ap_demo) refers to app_tp_transfer.o(i.app_tp_phone_clear_reset_on) for app_tp_phone_clear_reset_on + ap_demo.o(i.ap_demo) refers to app_tp_transfer.o(i.app_tp_transfer_screen_start) for app_tp_transfer_screen_start + ap_demo.o(i.ap_demo) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) for hal_dsi_rx_ctrl_dsc_async_handler + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.tp_heartbeat_exec) for tp_heartbeat_exec + ap_demo.o(i.ap_demo) refers to app_tp_st_touch.o(i.app_tp_calibration_exec) for app_tp_calibration_exec + ap_demo.o(i.ap_demo) refers to app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_record_event_exec) for ap_tp_st_touch_scan_point_record_event_exec + ap_demo.o(i.ap_demo) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + ap_demo.o(i.ap_demo) refers to app_tp_transfer.o(i.app_tp_transfer_screen_int) for app_tp_transfer_screen_int + ap_demo.o(i.ap_demo) refers to app_tp_transfer.o(i.S20_Start_init) for S20_Start_init + ap_demo.o(i.ap_demo) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_demo) refers to app_tp_for_custom_s8.o(.data) for tp_sleep_count + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.soft_timer3_cb) for soft_timer3_cb + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.ap_reset_cb) for ap_reset_cb + ap_demo.o(i.ap_get_reg_ca) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_reset_cb) refers to hal_system.o(i.hal_system_set_pvd) for hal_system_set_pvd + ap_demo.o(i.ap_reset_cb) refers to hal_system.o(i.hal_system_set_vcc) for hal_system_set_vcc + ap_demo.o(i.ap_set_backlight) refers to ap_demo.o(i.__ARM_common_switch8) for __ARM_common_switch8 + ap_demo.o(i.ap_set_backlight) refers to idiv.o(.text) for __aeabi_idivmod + ap_demo.o(i.ap_set_backlight) refers to uidiv.o(.text) for __aeabi_uidivmod + ap_demo.o(i.ap_set_backlight) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.ap_set_backlight) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_set_display_off) refers to ap_demo.o(i.Gpio_swire_output) for Gpio_swire_output + ap_demo.o(i.ap_set_display_off) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.ap_set_display_off) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_set_display_on) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_set_enter_sleep_mode) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.ap_set_enter_sleep_mode) refers to hal_timer.o(i.hal_timer_init) for hal_timer_init + ap_demo.o(i.ap_set_enter_sleep_mode) refers to hal_timer.o(i.hal_timer_start) for hal_timer_start + ap_demo.o(i.ap_set_enter_sleep_mode) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_set_enter_sleep_mode) refers to ap_demo.o(i.disable_mipi_timer_cb) for disable_mipi_timer_cb + ap_demo.o(i.ap_set_exit_sleep_mode) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_update_frame_rate) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_tear_mode_ex) for hal_dsi_rx_ctrl_set_tear_mode_ex + ap_demo.o(i.ap_update_frame_rate) refers to ap_demo.o(.data) for .data + ap_demo.o(i.blue_change_ccm) refers to memcpya.o(.text) for __aeabi_memcpy4 + ap_demo.o(i.blue_change_ccm) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) for hal_dsi_tx_ctrl_set_ccm + ap_demo.o(i.disable_mipi_timer_cb) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + ap_demo.o(i.disable_mipi_timer_cb) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) for hal_dsi_tx_ctrl_stop + ap_demo.o(i.disable_mipi_timer_cb) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) for hal_dsi_tx_ctrl_deinit + ap_demo.o(i.disable_mipi_timer_cb) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) for hal_dsi_rx_ctrl_stop + ap_demo.o(i.disable_mipi_timer_cb) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) for hal_dsi_rx_ctrl_deinit + ap_demo.o(i.disable_mipi_timer_cb) refers to hal_swire.o(i.hal_swire_open) for hal_swire_open + ap_demo.o(i.disable_mipi_timer_cb) refers to hal_timer.o(i.hal_timer_stop) for hal_timer_stop + ap_demo.o(i.disable_mipi_timer_cb) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + ap_demo.o(i.disable_mipi_timer_cb) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_panel_reset_pin) for hal_dsi_tx_ctrl_panel_reset_pin + ap_demo.o(i.disable_mipi_timer_cb) refers to hal_system.o(i.hal_system_set_vcc) for hal_system_set_vcc + ap_demo.o(i.disable_mipi_timer_cb) refers to ap_demo.o(.data) for .data + ap_demo.o(i.disable_mipi_timer_cb) refers to app_tp_for_custom_s8.o(.data) for tp_sleep_in + ap_demo.o(i.init_mipi_tx) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) for hal_dsi_tx_ctrl_create_handle + ap_demo.o(i.init_mipi_tx) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) for hal_dsi_tx_ctrl_init + ap_demo.o(i.init_mipi_tx) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) for hal_dsi_tx_ctrl_set_overwrite_rgb + ap_demo.o(i.init_mipi_tx) refers to ap_demo.o(.data) for .data + ap_demo.o(i.init_panel) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_panel_reset_pin) for hal_dsi_tx_ctrl_panel_reset_pin + ap_demo.o(i.init_panel) refers to tau_delay.o(i.delayMs) for delayMs + ap_demo.o(i.init_panel) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) for hal_dsi_tx_ctrl_enter_init_panel_mode + ap_demo.o(i.init_panel) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) for hal_dsi_tx_ctrl_write_array_cmd + ap_demo.o(i.init_panel) refers to tau_delay.o(i.delayUs) for delayUs + ap_demo.o(i.init_panel) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + ap_demo.o(i.init_panel) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode) for hal_dsi_rx_ctrl_set_hw_tear_mode + ap_demo.o(i.init_panel) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.init_panel) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) for hal_dsi_tx_ctrl_exit_init_panel_mode + ap_demo.o(i.init_panel) refers to ap_demo.o(.data) for .data + ap_demo.o(i.open_mipi_rx) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) for hal_dsi_rx_ctrl_create_handle + ap_demo.o(i.open_mipi_rx) refers to memcpya.o(.text) for __aeabi_memcpy4 + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_pre_init_pps) for hal_dsi_rx_ctrl_pre_init_pps + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) for hal_dsi_rx_ctrl_init + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) for hal_dsi_rx_ctrl_set_cus_sync_line + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) for hal_dsi_rx_ctrl_hight_performan_mode + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) for hal_dsi_rx_ctrl_start + ap_demo.o(i.open_mipi_rx) refers to ap_demo.o(.data) for .data + ap_demo.o(i.open_mipi_rx) refers to ap_demo.o(.constdata) for .constdata + ap_demo.o(i.open_mipi_rx) refers to ap_demo.o(i.ap_dcs_read) for ap_dcs_read + ap_demo.o(i.open_mipi_rx) refers to ap_demo.o(i.pps_update_handle) for pps_update_handle + ap_demo.o(i.pps_update_handle) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) for hal_dsi_rx_ctrl_set_sw_tear_mode + ap_demo.o(i.pps_update_handle) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) for hal_dsi_rx_ctrl_toggle_resolution + ap_demo.o(i.pps_update_handle) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode) for hal_dsi_rx_ctrl_set_hw_tear_mode + ap_demo.o(i.pps_update_handle) refers to ap_demo.o(.data) for .data + ap_demo.o(i.soft_timer3_cb) refers to hal_timer.o(i.hal_timer_start) for hal_timer_start + ap_demo.o(i.soft_timer3_cb) refers to app_tp_for_custom_s8.o(.data) for tp_sleep_count + ap_demo.o(i.soft_timer3_cb) refers to ap_demo.o(.data) for .data + ap_demo.o(i.tp_heartbeat_exec) refers to hal_gpio.o(i.hal_gpio_get_input_data) for hal_gpio_get_input_data + ap_demo.o(i.tp_heartbeat_exec) refers to app_tp_st_touch.o(i.ap_tp_st_touch_hardware_reset) for ap_tp_st_touch_hardware_reset + ap_demo.o(i.tp_heartbeat_exec) refers to app_tp_transfer.o(.data) for s_screen_init_complate + ap_demo.o(i.tp_heartbeat_exec) refers to ap_demo.o(.data) for .data + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_display_on) for ap_set_display_on + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_display_off) for ap_set_display_off + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_get_reg_ca) for ap_get_reg_ca + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_backlight) for ap_set_backlight + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_update_frame_rate) for ap_update_frame_rate + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_enter_sleep_mode) for ap_set_enter_sleep_mode + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_exit_sleep_mode) for ap_set_exit_sleep_mode + ap_demo.o(.constdata) refers to app_tp_st_touch.o(i.ap_set_tp_calibration_04) for ap_set_tp_calibration_04 + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_transfer.o(i.app_tp_m_read) for app_tp_m_read + app_tp_transfer.o(i.S20_Start_init) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_transfer.o(i.S20_Start_init) refers to tau_delay.o(i.delayMs) for delayMs + app_tp_transfer.o(i.S20_Start_init) refers to hal_gpio.o(i.hal_gpio_get_input_data) for hal_gpio_get_input_data + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_transfer.o(i.app_tp_m_write) for app_tp_m_write + app_tp_transfer.o(i.S20_Start_init) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + app_tp_transfer.o(i.S20_Start_init) refers to hal_gpio.o(i.hal_gpio_ctrl_eint) for hal_gpio_ctrl_eint + app_tp_transfer.o(i.S20_Start_init) refers to hal_gpio.o(i.hal_gpio_init_eint) for hal_gpio_init_eint + app_tp_transfer.o(i.S20_Start_init) refers to hal_gpio.o(i.hal_gpio_reg_eint_cb) for hal_gpio_reg_eint_cb + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_for_custom_s8.o(.data) for screen_reg_int_data + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_transfer.o(.bss) for .bss + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_for_custom_s8.o(.data) for g_screen_input_int_pad + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_transfer.o(i.app_tp_screen_int_callback) for app_tp_screen_int_callback + app_tp_transfer.o(i.S20_Start_init) refers to ap_demo.o(.data) for phone_start_flag + app_tp_transfer.o(i.app_tp_I2C_init) refers to hal_i2c_slave.o(i.hal_i2c_s_init) for hal_i2c_s_init + app_tp_transfer.o(i.app_tp_I2C_init) refers to hal_i2c_slave.o(i.hal_i2c_s_set_transfer) for hal_i2c_s_set_transfer + app_tp_transfer.o(i.app_tp_I2C_init) refers to hal_i2c_slave.o(i.hal_i2c_s_nonblocking_read) for hal_i2c_s_nonblocking_read + app_tp_transfer.o(i.app_tp_I2C_init) refers to app_tp_transfer.o(i.app_tp_i2cs_callback) for app_tp_i2cs_callback + app_tp_transfer.o(i.app_tp_I2C_init) refers to app_tp_transfer.o(.bss) for .bss + app_tp_transfer.o(i.app_tp_i2cs_callback) refers to app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) for app_tp_phone_analysis_data + app_tp_transfer.o(i.app_tp_i2cs_callback) refers to app_tp_transfer.o(i.app_tp_s_read) for app_tp_s_read + app_tp_transfer.o(i.app_tp_i2cs_callback) refers to app_tp_transfer.o(i.app_tp_s_write) for app_tp_s_write + app_tp_transfer.o(i.app_tp_i2cs_callback) refers to app_tp_transfer.o(.bss) for .bss + app_tp_transfer.o(i.app_tp_init) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + app_tp_transfer.o(i.app_tp_init) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + app_tp_transfer.o(i.app_tp_init) refers to hal_gpio.o(i.hal_gpio_init_input) for hal_gpio_init_input + app_tp_transfer.o(i.app_tp_init) refers to hal_i2c_master.o(i.hal_i2c_m_dma_init) for hal_i2c_m_dma_init + app_tp_transfer.o(i.app_tp_init) refers to app_tp_for_custom_s8.o(.data) for g_phone_output_int_pad + app_tp_transfer.o(i.app_tp_init) refers to app_tp_for_custom_s8.o(.data) for g_screen_input_int_pad + app_tp_transfer.o(i.app_tp_m_read) refers to hal_i2c_master.o(i.hal_i2c_m_dma_read) for hal_i2c_m_dma_read + app_tp_transfer.o(i.app_tp_m_transfer_complate) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_transfer.o(i.app_tp_m_write) refers to hal_i2c_master.o(i.hal_i2c_m_dma_write) for hal_i2c_m_dma_write + app_tp_transfer.o(i.app_tp_phone_clear_reset_on) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.app_tp_phone_reset_on) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.app_tp_s_read) refers to hal_i2c_slave.o(i.hal_i2c_s_nonblocking_read) for hal_i2c_s_nonblocking_read + app_tp_transfer.o(i.app_tp_s_transfer_complate) refers to hal_i2c_slave.o(i.hal_i2c_s_write_complate) for hal_i2c_s_write_complate + app_tp_transfer.o(i.app_tp_s_transfer_complate) refers to hal_i2c_slave.o(i.hal_i2c_s_read_complate) for hal_i2c_s_read_complate + app_tp_transfer.o(i.app_tp_s_write) refers to hal_i2c_slave.o(i.hal_i2c_s_dma_write) for hal_i2c_s_dma_write + app_tp_transfer.o(i.app_tp_screen_init) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + app_tp_transfer.o(i.app_tp_screen_init) refers to tau_delay.o(i.delayUs) for delayUs + app_tp_transfer.o(i.app_tp_screen_init) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + app_tp_transfer.o(i.app_tp_screen_init) refers to app_tp_for_custom_s8.o(.data) for g_screen_input_rst_pad + app_tp_transfer.o(i.app_tp_screen_int_callback) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to hal_spi_master.o(i.hal_spi_m_clear_rxfifo) for hal_spi_m_clear_rxfifo + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to app_tp_transfer.o(i.S20_Start_init) for S20_Start_init + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to app_tp_for_custom_s8.o(.constdata) for screen_reg_start_data_size + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to ap_demo.o(.data) for phone_start_flag + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to hal_spi_master.o(i.hal_spi_m_clear_rxfifo) for hal_spi_m_clear_rxfifo + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_transfer.o(i.app_tp_m_read) for app_tp_m_read + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to tau_delay.o(i.delayUs) for delayUs + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_transfer.o(i.app_tp_transfer_screen_const) for app_tp_transfer_screen_const + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to tau_delay.o(i.delayMs) for delayMs + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to hal_gpio.o(i.hal_gpio_get_input_data) for hal_gpio_get_input_data + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_record_event) for ap_tp_st_touch_scan_point_record_event + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_st_touch.o(i.ap_tp_st_touch_error_handler_FF) for ap_tp_st_touch_error_handler_FF + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_st_touch.o(i.ap_tp_st_touch_error_handler_F3) for ap_tp_st_touch_error_handler_F3 + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) for app_tp_screen_analysis_int + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_for_custom_s8.o(.data) for screen_reg_int_data + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_transfer.o(.bss) for .bss + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_for_custom_s8.o(.data) for g_screen_input_int_pad + app_tp_transfer.o(i.app_tp_transfer_screen_start) refers to app_tp_transfer.o(i.app_tp_transfer_screen_const) for app_tp_transfer_screen_const + app_tp_transfer.o(i.app_tp_transfer_screen_start) refers to app_tp_transfer.o(.data) for .data + app_tp_st_touch.o(i.CRC16_2) refers to app_tp_st_touch.o(.constdata) for .constdata + app_tp_st_touch.o(i.ap_get_tp_calibration_status_01) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) for hal_dsi_rx_ctrl_send_ack_cmd + app_tp_st_touch.o(i.ap_get_tp_calibration_status_01) refers to app_tp_st_touch.o(.data) for .data + app_tp_st_touch.o(i.ap_set_tp_calibration_04) refers to memseta.o(.text) for __aeabi_memclr4 + app_tp_st_touch.o(i.ap_set_tp_calibration_04) refers to printfa.o(i.__0printf) for __2printf + app_tp_st_touch.o(i.ap_set_tp_calibration_04) refers to app_tp_st_touch.o(i.CRC16_2) for CRC16_2 + app_tp_st_touch.o(i.ap_set_tp_calibration_04) refers to app_tp_st_touch.o(.data) for .data + app_tp_st_touch.o(i.ap_tp_st_touch_calibration) refers to app_tp_transfer.o(i.app_tp_m_write) for app_tp_m_write + app_tp_st_touch.o(i.ap_tp_st_touch_calibration) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_st_touch.o(i.ap_tp_st_touch_calibration) refers to tau_delay.o(i.delayMs) for delayMs + app_tp_st_touch.o(i.ap_tp_st_touch_calibration) refers to app_tp_st_touch.o(.data) for .data + app_tp_st_touch.o(i.ap_tp_st_touch_error_handler_F3) refers to app_tp_st_touch.o(i.ap_tp_st_touch_hardware_reset) for ap_tp_st_touch_hardware_reset + app_tp_st_touch.o(i.ap_tp_st_touch_error_handler_FF) refers to app_tp_st_touch.o(i.ap_tp_st_touch_hardware_reset) for ap_tp_st_touch_hardware_reset + app_tp_st_touch.o(i.ap_tp_st_touch_get_calibration_success_mark) refers to memseta.o(.text) for __aeabi_memclr4 + app_tp_st_touch.o(i.ap_tp_st_touch_get_calibration_success_mark) refers to app_tp_transfer.o(i.app_tp_m_read) for app_tp_m_read + app_tp_st_touch.o(i.ap_tp_st_touch_get_calibration_success_mark) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_st_touch.o(i.ap_tp_st_touch_get_calibration_success_mark) refers to tau_delay.o(i.delayMs) for delayMs + app_tp_st_touch.o(i.ap_tp_st_touch_get_calibration_success_mark) refers to app_tp_transfer.o(i.app_tp_m_write) for app_tp_m_write + app_tp_st_touch.o(i.ap_tp_st_touch_get_calibration_success_mark) refers to app_tp_st_touch.o(.data) for .data + app_tp_st_touch.o(i.ap_tp_st_touch_hardware_reset) refers to app_tp_st_touch.o(i.ap_tp_st_touch_simulate_finger_release_event) for ap_tp_st_touch_simulate_finger_release_event + app_tp_st_touch.o(i.ap_tp_st_touch_hardware_reset) refers to app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_init) for ap_tp_st_touch_scan_point_init + app_tp_st_touch.o(i.ap_tp_st_touch_hardware_reset) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + app_tp_st_touch.o(i.ap_tp_st_touch_hardware_reset) refers to tau_delay.o(i.delayMs) for delayMs + app_tp_st_touch.o(i.ap_tp_st_touch_hardware_reset) refers to app_tp_transfer.o(i.app_tp_m_write) for app_tp_m_write + app_tp_st_touch.o(i.ap_tp_st_touch_hardware_reset) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_st_touch.o(i.ap_tp_st_touch_hardware_reset) refers to app_tp_for_custom_s8.o(.data) for g_screen_input_rst_pad + app_tp_st_touch.o(i.ap_tp_st_touch_hardware_reset) refers to app_tp_st_touch.o(.data) for .data + app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_init) refers to app_tp_st_touch.o(.bss) for .bss + app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_record_event) refers to app_tp_st_touch.o(.bss) for .bss + app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_record_event_exec) refers to app_tp_st_touch.o(i.ap_tp_st_touch_simulate_finger_release_event) for ap_tp_st_touch_simulate_finger_release_event + app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_record_event_exec) refers to app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_init) for ap_tp_st_touch_scan_point_init + app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_record_event_exec) refers to app_tp_st_touch.o(.bss) for .bss + app_tp_st_touch.o(i.ap_tp_st_touch_simulate_finger_release_event) refers to app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) for app_tp_screen_analysis_int + app_tp_st_touch.o(i.ap_tp_st_touch_simulate_finger_release_event) refers to tau_delay.o(i.delayMs) for delayMs + app_tp_st_touch.o(i.ap_tp_st_touch_software_reset) refers to app_tp_st_touch.o(i.ap_tp_st_touch_simulate_finger_release_event) for ap_tp_st_touch_simulate_finger_release_event + app_tp_st_touch.o(i.ap_tp_st_touch_software_reset) refers to app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_init) for ap_tp_st_touch_scan_point_init + app_tp_st_touch.o(i.ap_tp_st_touch_software_reset) refers to app_tp_transfer.o(i.app_tp_m_write) for app_tp_m_write + app_tp_st_touch.o(i.ap_tp_st_touch_software_reset) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_st_touch.o(i.ap_tp_st_touch_software_reset) refers to tau_delay.o(i.delayMs) for delayMs + app_tp_st_touch.o(i.ap_tp_st_touch_software_reset) refers to app_tp_st_touch.o(.data) for .data + app_tp_st_touch.o(i.app_tp_calibration_exec) refers to app_tp_st_touch.o(i.ap_tp_st_touch_calibration) for ap_tp_st_touch_calibration + app_tp_st_touch.o(i.app_tp_calibration_exec) refers to tau_delay.o(i.delayMs) for delayMs + app_tp_st_touch.o(i.app_tp_calibration_exec) refers to app_tp_st_touch.o(i.ap_tp_st_touch_get_calibration_success_mark) for ap_tp_st_touch_get_calibration_success_mark + app_tp_st_touch.o(i.app_tp_calibration_exec) refers to app_tp_st_touch.o(.data) for .data + board.o(i.board_Init) refers to hal_system.o(i.hal_system_init) for hal_system_init + board.o(i.board_Init) refers to hal_system.o(i.hal_system_enable_systick) for hal_system_enable_systick + board.o(i.board_Init) refers to hal_system.o(i.hal_system_init_console) for hal_system_init_console + board.o(i.board_Init) refers to hal_system.o(i.hal_system_set_phy_calibration) for hal_system_set_phy_calibration + startup_armcm0.o(RESET) refers to startup_armcm0.o(STACK) for __initial_sp + startup_armcm0.o(RESET) refers to startup_armcm0.o(.text) for Reset_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.HardFault_Handler) for HardFault_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.SysTick_Handler) for SysTick_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.VIDC_IRQn_Handler) for VIDC_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.LCDC_IRQn_Handler) for LCDC_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.MIPI_RX_IRQn_Handler) for MIPI_RX_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.MIPI_TX_IRQn_Handler) for MIPI_TX_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.MEMC_IRQn_Handler) for MEMC_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.VPRE_IRQn_Handler) for VPRE_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.FLSCTRL_IRQn_Handler) for FLSCTRL_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.DMA_IRQn_Handler) for DMA_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.TIMER0_IRQn_Handler) for TIMER0_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.TIMER1_IRQn_Handler) for TIMER1_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.TIMER2_IRQn_Handler) for TIMER2_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.TIMER3_IRQn_Handler) for TIMER3_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.WDG_IRQn_Handler) for WDG_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.UART_IRQn_Handler) for UART_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.I2C0_IRQn_Handler) for I2C0_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.I2C1_IRQn_Handler) for I2C1_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.SPIS_IRQn_Handler) for SPIS_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.SPIM_IRQn_Handler) for SPIM_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.ADC_IRQn_Handler) for ADC_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.PWMDET_IRQn_Handler) for PWMDET_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.SWIRE_IRQn_Handler) for SWIRE_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.AP_NRESET_IRQn_Handler) for AP_NRESET_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT0_IRQn_Handler) for EXTI_INT0_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT1_IRQn_Handler) for EXTI_INT1_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT2_IRQn_Handler) for EXTI_INT2_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT3_IRQn_Handler) for EXTI_INT3_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT4_IRQn_Handler) for EXTI_INT4_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT5_IRQn_Handler) for EXTI_INT5_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT6_IRQn_Handler) for EXTI_INT6_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT7_IRQn_Handler) for EXTI_INT7_IRQn_Handler + startup_armcm0.o(.text) refers to entry.o(.ARM.Collect$$$$00000000) for __main + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to dadd.o(.text) for __aeabi_dadd + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to drv_vidc.o(i.drv_vidc_set_scld_step) for drv_vidc_set_scld_step + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to drv_vidc.o(i.drv_vidc_set_module_enable) for drv_vidc_set_module_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) for hal_internal_vsync_get_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_dsc_dec.o(i.drv_dsc_dec_disable) for drv_dsc_dec_disable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) for drv_dsi_rx_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_rxbr.o(i.drv_rxbr_enable_irq) for drv_rxbr_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_vidc.o(i.drv_vidc_enable_irq) for drv_vidc_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_memc.o(i.drv_memc_enable_irq) for drv_memc_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) for hal_internal_vsync_get_tx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_config_reset_modules) for drv_crgu_config_reset_modules + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) for hal_internal_vsync_set_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_mode_init) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) refers to dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) for dcs_packet_get_fifo_header + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) refers to dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) for dcs_packet_free_fifo_header + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_pg_cfg) for drv_dsi_rx_set_ddi_pg_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_crgu.o(i.drv_crgu_set_rxbr_src) for drv_crgu_set_rxbr_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_crgu.o(i.drv_crgu_set_rxbr_div) for drv_crgu_set_rxbr_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_pg_cfg) for drv_dsi_rx_set_ipi_pg_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) refers to drv_memc.o(i.drv_memc_gen_a_tear_signal) for drv_memc_gen_a_tear_signal + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_compressen_en) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) for drv_dsi_rx_get_compression_en + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_max_ret_size) for drv_dsi_rx_get_max_ret_size + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) for hal_dsi_rx_ctrl_init_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_vsync_init_rx) for hal_internal_vsync_init_rx + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) for hal_dsi_rx_ctrl_init_dsi_rx + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) for hal_dsi_rx_ctrl_init_rxbr + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to drv_dsc_dec.o(i.drv_dsc_dec_enable) for drv_dsc_dec_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to drv_dsc_dec.o(i.drv_dsc_dec_set_u8_pps) for drv_dsc_dec_set_u8_pps + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to drv_dsc_dec.o(i.drv_dsc_dec_disable) for drv_dsc_dec_disable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) for hal_dsi_rx_ctrl_init_vidc + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) for hal_dsi_rx_ctrl_init_memc + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) for hal_internal_vsync_set_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to drv_chip_info.o(i.drv_chip_rx_init_done) for drv_chip_rx_init_done + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_efuse.o(i.drv_efuse_read) for drv_efuse_read + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_vidc_src) for drv_crgu_set_vidc_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_fb_src) for drv_crgu_set_fb_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_fb_div) for drv_crgu_set_fb_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) for hal_dsi_rx_ctrl_set_rxbr_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ctrl_cfg) for drv_dsi_rx_set_ctrl_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) for drv_dsi_rx_set_ddi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) for hal_dsi_rx_ctrl_set_ipi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) for drv_dsi_rx_set_up_phy + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_lane_swap) for drv_dsi_rx_set_lane_swap + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_inten) for drv_dsi_rx_set_inten + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_resp_cnt) for drv_dsi_rx_set_resp_cnt + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) for drv_dsi_rx_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_data_mode) for drv_memc_set_data_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_ltpo_mode) for drv_memc_set_ltpo_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_tear_waveform) for drv_memc_set_tear_waveform + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tear_mode) for hal_internal_vsync_get_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to ap_demo.o(i.__ARM_common_switch8) for __ARM_common_switch8 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_rate_transfer_sel) for drv_memc_rate_transfer_sel + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_fs_en_conditions) for drv_memc_set_fs_en_conditions + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_lcdc_st_conditions) for drv_memc_set_lcdc_st_conditions + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_sel_vsync) for drv_memc_sel_vsync + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_vidc_sync_cnt) for drv_memc_set_vidc_sync_cnt + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_double_buffer) for drv_memc_set_double_buffer + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_active_height) for drv_memc_set_active_height + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_inten) for drv_memc_set_inten + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_enable_irq) for drv_memc_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_color_format) for drv_rxbr_set_color_format + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) for drv_rxbr_frame_drop_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_ltpo_drop_th) for drv_rxbr_set_ltpo_drop_th + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_usr_cfg) for drv_rxbr_set_usr_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_usr_col) for drv_rxbr_set_usr_col + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_usr_row) for drv_rxbr_set_usr_row + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_hline_rcv_cfg) for drv_rxbr_hline_rcv_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_enable_irq) for drv_rxbr_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) for hal_internal_vsync_set_auto_hw_filter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_src_parameter) for drv_vidc_set_src_parameter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_pentile_swap) for drv_vidc_set_pentile_swap + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_dst_parameter) for drv_vidc_set_dst_parameter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_init_module_enable) for drv_vidc_init_module_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_rotation) for drv_vidc_set_rotation + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to dadd.o(.text) for __aeabi_dadd + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_step) for drv_vidc_set_scld_step + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_param_init.o(i.drv_param_init_get_scld_filter_h) for drv_param_init_get_scld_filter_h + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_param_init.o(i.drv_param_init_get_scld_filter_v) for drv_param_init_get_scld_filter_v + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_hcoef0) for drv_vidc_set_scld_hcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_hcoef1) for drv_vidc_set_scld_hcoef1 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_vcoef0) for drv_vidc_set_scld_vcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_vcoef1) for drv_vidc_set_scld_vcoef1 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_p2r_hinitr) for drv_vidc_set_p2r_hinitr + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_p2r_hinitb) for drv_vidc_set_p2r_hinitb + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_param_init.o(i.drv_param_p2r_filter_init) for drv_param_p2r_filter_init + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_p2r_hcoef0) for drv_vidc_set_p2r_hcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_mirror) for drv_vidc_set_mirror + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_pu_ctrl) for drv_vidc_set_pu_ctrl + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_irqen) for drv_vidc_set_irqen + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_enable_irq) for drv_vidc_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_pre_init_pps) refers to drv_dsc_dec.o(i.drv_dsc_dec_convert_pps_rc_parameter) for drv_dsc_dec_convert_pps_rc_parameter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_pre_init_pps) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_release_handle) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to drv_dsi_rx.o(i.drv_dsi_rx_shut_down) for drv_dsi_rx_shut_down + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) for hal_dsi_rx_ctrl_init + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) for hal_internal_vsync_get_tx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) for hal_dsi_rx_ctrl_start + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) refers to drv_rxbr.o(i.drv_rxbr_set_ack_pkt_header) for drv_rxbr_set_ack_pkt_header + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) refers to hal_dsi_rx_ctrl.o(.conststring) for .conststring + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_auto_hw_filter) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) for hal_internal_vsync_set_auto_hw_filter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_auto_hw_filter) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) for drv_dsi_rx_set_ddi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to drv_vidc.o(i.drv_vidc_set_scld_hcoef0) for drv_vidc_set_scld_hcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to drv_vidc.o(i.drv_vidc_set_scld_hcoef1) for drv_vidc_set_scld_hcoef1 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to drv_vidc.o(i.drv_vidc_set_scld_vcoef0) for drv_vidc_set_scld_vcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to drv_vidc.o(i.drv_vidc_set_scld_vcoef1) for drv_vidc_set_scld_vcoef1 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to drv_param_init.o(i.drv_param_init_set_scld_filter) for drv_param_init_set_scld_filter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) for hal_internal_vsync_set_sync_line + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) refers to drv_rxbr.o(i.drv_rxbr_hline_rcv0_cfg) for drv_rxbr_hline_rcv0_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_dcs_direct_mode) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_dcs_direct_mode) for hal_internal_vsync_set_dcs_direct_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_cmd_filter) refers to drv_rxbr.o(i.drv_rxbr_set_cmd_filter) for drv_rxbr_set_cmd_filter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_cmd_filter) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) for hal_internal_vsync_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) refers to drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) for drv_dsi_rx_calc_ipi_tx_delay + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_cfg) for drv_dsi_rx_set_ipi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pentile_format) refers to drv_vidc.o(i.drv_vidc_update_src_format) for drv_vidc_update_src_format + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pentile_format) refers to drv_vidc.o(i.drv_vidc_set_pentile_swap) for drv_vidc_set_pentile_swap + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pentile_format) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to dflti.o(.text) for __aeabi_i2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to dmul.o(.text) for __aeabi_dmul + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to ddiv.o(.text) for __aeabi_ddiv + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to dfixi.o(.text) for __aeabi_d2iz + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rect_pixel_data) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rect_pixel_data) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rect_pixel_data) refers to dflti.o(.text) for __aeabi_i2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rect_pixel_data) refers to dmul.o(.text) for __aeabi_dmul + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rect_pixel_data) refers to ddiv.o(.text) for __aeabi_ddiv + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rect_pixel_data) refers to dfixi.o(.text) for __aeabi_d2iz + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) for hal_dsi_rx_ctrl_set_rxbr_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) for drv_dsi_rx_set_ddi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) for hal_dsi_rx_ctrl_set_ipi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_rxbr_src) for drv_crgu_set_rxbr_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_rxbr_div) for drv_crgu_set_rxbr_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_dsco_src) for drv_crgu_set_dsco_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_dsco_src_div) for drv_crgu_set_dsco_src_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_dsc_core_div) for drv_crgu_set_dsc_core_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) for hal_internal_vsync_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_te_waveform) refers to drv_memc.o(i.drv_memc_set_tear_waveform) for drv_memc_set_tear_waveform + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_te_waveform) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_tear_mode_ex) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) for hal_internal_vsync_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) refers to drv_dsi_rx.o(i.drv_dsi_rx_power_up) for drv_dsi_rx_power_up + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) for hal_internal_vsync_set_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) refers to drv_dsi_rx.o(i.drv_dsi_rx_shut_down) for drv_dsi_rx_shut_down + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) for hal_internal_vsync_set_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate) refers to hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) for hal_internal_vsync_toggle_input_frame_rate + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) refers to hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) for hal_internal_sync_input_resolution_change + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution_ex) refers to hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) for hal_internal_sync_input_resolution_change_ex + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution_ex) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_register_write_cmd_entry) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_cmd_filter) for hal_dsi_rx_ctrl_set_hw_cmd_filter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_register_write_cmd_entry) refers to hal_internal_vsync.o(i.hal_internal_vsync_register_write_cmd_entry) for hal_internal_vsync_register_write_cmd_entry + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to ffltui.o(.text) for __aeabi_ui2f + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to fscalb.o(.text) for __ARM_scalbnf + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to fdiv.o(.text) for __aeabi_fdiv + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to fmul.o(.text) for __aeabi_fmul + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to idiv.o(.text) for __aeabi_idivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to fflti.o(.text) for __aeabi_i2f + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to ffixi.o(.text) for __aeabi_f2iz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to f2d.o(.text) for __aeabi_f2d + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to ceil.o(i.ceil) for ceil + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to dfixi.o(.text) for __aeabi_d2iz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to fadd.o(.text) for __aeabi_fadd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_video_chunk) for drv_dsi_tx_set_video_chunk + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_video_timing) for drv_dsi_tx_set_video_timing + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) refers to fadd.o(.text) for __aeabi_fadd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to ffltui.o(.text) for __aeabi_ui2f + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to fmul.o(.text) for __aeabi_fmul + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to fdiv.o(.text) for __aeabi_fdiv + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to f2d.o(.text) for __aeabi_f2d + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to ceil.o(i.ceil) for ceil + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to drv_phy_common.o(i.drv_phy_get_rate_para) for drv_phy_get_rate_para + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to idiv.o(.text) for __aeabi_idivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to fadd.o(.text) for __aeabi_fadd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to ffixui.o(.text) for __aeabi_f2uiz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) for hal_internal_sync_get_hight_performan_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to hal_dsi_tx_ctrl.o(.conststring) for .conststring + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) for hal_lcdc_config_upscaler + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic) refers to drv_lcdc.o(i.drv_lcdc_config_src_parameter) for drv_lcdc_config_src_parameter + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic) refers to hal_internal_vsync.o(i.hal_internal_vsync_update_lcdc_addr) for hal_internal_vsync_update_lcdc_addr + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_cmd_mode_rcv_te) refers to hal_internal_vsync.o(i.hal_internal_sync_cmd_mode_rcv_te) for hal_internal_sync_cmd_mode_rcv_te + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_config_reset_modules) for drv_crgu_config_reset_modules + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to drv_param_init.o(i.drv_param_init_set_ccm) for drv_param_init_set_ccm + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to hal_dsi_tx_ctrl.o(.constdata) for .constdata + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to drv_memc.o(i.drv_memc_set_data_mode) for drv_memc_set_data_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) for hal_lcdc_config_upscaler + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) for hal_lcdc_config_remains + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_mode_init) for hal_dsi_tx_ctrl_draw_mode_init + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data) for hal_dsi_tx_ctrl_set_rect_pixel_data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to drv_memc.o(i.drv_memc_set_data_mode) for drv_memc_set_data_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) for hal_lcdc_config_upscaler + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) for hal_lcdc_config_remains + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_mode_init) for hal_dsi_tx_ctrl_draw_mode_init + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) for drv_dsi_tx_command_mode_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_mode) for drv_dsi_tx_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_ulps_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) for drv_dsi_tx_phy_ulps_enter + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) for drv_dsi_tx_command_mode_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_mode) for drv_dsi_tx_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_ulps_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) for drv_dsi_tx_phy_ulps_exit + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) for hal_dsi_tx_ctrl_init_clk + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_vsync_init_tx) for hal_internal_vsync_init_tx + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) for hal_dsi_tx_config_params_for_lane_rate + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) for hal_dsi_tx_count_lane_rate + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) for hal_dsi_tx_init_phy_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) for drv_dsi_tx_phy_test_setup + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) for hal_lcdc_init_clk + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) for hal_lcdc_init_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) for hal_dsi_tx_init_dpi_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) for hal_dsi_tx_init_data_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) for hal_dsi_tx_init_remains + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) for hal_dsi_tx_init_interrupt + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ready) for drv_dsi_tx_phy_status_ready + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to drv_dsi_tx.o(i.drv_dsi_tx_powerup) for drv_dsi_tx_powerup + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_panel_reset_pin) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) for hal_dsi_tx_send_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) for drv_dsi_tx_get_cmd_status + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_get_payload) for drv_dsi_tx_command_get_payload + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to memcpya.o(.text) for __aeabi_memcpy + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_release_handle) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) refers to drv_param_init.o(i.drv_param_init_set_ccm) for drv_param_init_set_ccm + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_cus_pq_filter) refers to drv_lcdc.o(i.drv_lcdc_config_scale_up_coef) for drv_lcdc_config_scale_up_coef + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_cus_pq_filter) refers to drv_param_init.o(i.drv_param_init_set_sclu_filter) for drv_param_init_set_sclu_filter + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_endianness) refers to drv_lcdc.o(i.drv_lcdc_config_endianness) for drv_lcdc_config_endianness + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_escape_clock_div) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) for drv_dsi_tx_set_esc_div + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_lp_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_video_mode_set_lp_cmd) for drv_dsi_tx_video_mode_set_lp_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite) for drv_lcdc_config_overwrite + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite_rgb) for drv_lcdc_config_overwrite_rgb + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp) refers to drv_lcdc.o(i.drv_lcdc_config_partial_display_enable) for drv_lcdc_config_partial_display_enable + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp_area) refers to drv_lcdc.o(i.drv_lcdc_config_partial_display_area) for drv_lcdc_config_partial_display_area + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data) refers to dflti.o(.text) for __aeabi_i2d + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data) refers to dmul.o(.text) for __aeabi_dmul + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data) refers to ddiv.o(.text) for __aeabi_ddiv + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data) refers to dfixi.o(.text) for __aeabi_d2iz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_vpg) for drv_dsi_tx_set_vpg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) for hal_dsi_tx_ctrl_draw_flicker + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) for hal_dsi_tx_ctrl_draw_chessboard + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) for drv_dsi_tx_config_eotp + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) for drv_dsi_tx_phy_clock_lane_req_hs + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_lcdc.o(i.drv_lcdc_enable_shadow_reg) for drv_lcdc_enable_shadow_reg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_lcdc.o(i.drv_lcdc_set_video_hw_mode) for drv_lcdc_set_video_hw_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite) for drv_lcdc_config_overwrite + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_lcdc.o(i.drv_lcdc_start) for drv_lcdc_start + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to drv_lcdc.o(i.drv_lcdc_set_int) for drv_lcdc_set_int + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_int) for drv_dsi_tx_set_int + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to drv_dsi_tx.o(i.drv_dsi_tx_shutdown) for drv_dsi_tx_shutdown + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) for drv_dsi_tx_get_cmd_status + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) for hal_dsi_tx_send_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) for drv_dsi_tx_command_put_payload + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) for drv_dsi_tx_get_cmd_status + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) for hal_dsi_tx_send_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) for drv_dsi_tx_command_put_payload + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_mode) for drv_dsi_tx_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_edpi_cmd_size) for drv_dsi_tx_edpi_cmd_size + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) for hal_dsi_tx_init_video_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_dpi_mode) for drv_dsi_tx_dpi_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_dpi_polarity) for drv_dsi_tx_dpi_polarity + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_dpi_lpcmd_time) for drv_dsi_tx_dpi_lpcmd_time + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_int) for drv_dsi_tx_set_int + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) refers to drv_dsi_tx.o(i.drv_dsi_tx_config_int) for drv_dsi_tx_config_int + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_lane_mode) for drv_dsi_tx_phy_lane_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_time_cfg) for drv_dsi_tx_phy_time_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_response_mode) for drv_dsi_tx_response_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) for drv_dsi_tx_set_esc_div + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_time_out_div) for drv_dsi_tx_set_time_out_div + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_timeout_cfg) for drv_dsi_tx_timeout_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) for drv_dsi_tx_config_eotp + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) for drv_dsi_tx_phy_clock_lane_req_hs + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_auto_lp) for drv_dsi_tx_phy_clock_lane_auto_lp + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_video_mode_cfg) for drv_dsi_tx_video_mode_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_bta_ack) for drv_dsi_tx_set_bta_ack + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_video_mode_set_lp_cmd) for drv_dsi_tx_video_mode_set_lp_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_video_mode_disable_hact_cmd) for drv_dsi_tx_video_mode_disable_hact_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) for hal_dsi_tx_calc_video_chunks + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) for drv_dsi_tx_get_cmd_status + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_header) for drv_dsi_tx_command_header + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) for drv_dsi_tx_phy_status_stopstate + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) refers to drv_param_init.o(i.drv_param_init_get_ccm) for drv_param_init_get_ccm + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) refers to drv_lcdc.o(i.drv_lcdc_config_ccm) for drv_lcdc_config_ccm + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_disp_mode) for drv_lcdc_config_disp_mode + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_edpi_mode) for drv_lcdc_config_edpi_mode + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_endianness) for drv_lcdc_config_endianness + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_thresh) for drv_lcdc_config_thresh + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_dpi_polarity) for drv_lcdc_config_dpi_polarity + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_src_parameter) for drv_lcdc_config_src_parameter + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_rgb_to_pentile) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to dadd.o(.text) for __aeabi_dadd + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp_area) for hal_dsi_tx_ctrl_set_partial_disp_area + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp) for hal_dsi_tx_ctrl_set_partial_disp + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to drv_lcdc.o(i.drv_lcdc_config_scale_up_step) for drv_lcdc_config_scale_up_step + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to drv_param_init.o(i.drv_param_init_get_sclu_filter) for drv_param_init_get_sclu_filter + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to drv_lcdc.o(i.drv_lcdc_config_scale_up_coef) for drv_lcdc_config_scale_up_coef + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) for hal_lcdc_config_upscaler + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) for hal_lcdc_config_ccm + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_rgb_to_pentile) for hal_lcdc_config_rgb_to_pentile + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) for hal_lcdc_config_remains + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) for hal_lcdc_init_interrupt + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to drv_lcdc.o(i.drv_lcdc_set_prefetch) for drv_lcdc_set_prefetch + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to ffltui.o(.text) for __aeabi_ui2f + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_dpi_pre_div) for drv_crgu_set_dpi_pre_div + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_dpi_pre_src) for drv_crgu_set_dpi_pre_src + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_dpi_mux_src) for drv_crgu_set_dpi_mux_src + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to fmul.o(.text) for __aeabi_fmul + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to fdiv.o(.text) for __aeabi_fdiv + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to f2d.o(.text) for __aeabi_f2d + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to ceil.o(i.ceil) for ceil + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_lcdc.o(i.drv_lcdc_config_dpi_timing) for drv_lcdc_config_dpi_timing + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to hal_internal_vsync.o(i.hal_internal_update_dpi_param) for hal_internal_update_dpi_param + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to cfrcmple.o(.text) for __aeabi_cfrcmple + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to ffixi.o(.text) for __aeabi_f2iz + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to idiv.o(.text) for __aeabi_idivmod + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_lcdc_div) for drv_crgu_set_lcdc_div + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_lcdc_src) for drv_crgu_set_lcdc_src + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) for hal_internal_vsync_get_sync_line + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) refers to drv_lcdc.o(i.drv_lcdc_set_int) for drv_lcdc_set_int + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) refers to drv_lcdc.o(i.drv_lcdc_ctrl_flow) for drv_lcdc_ctrl_flow + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) refers to drv_lcdc.o(i.drv_lcdc_config_int) for drv_lcdc_config_int + hal_gpio.o(i.hal_gpio_ctrl_eint) refers to drv_gpio.o(i.drv_gpio_set_int) for drv_gpio_set_int + hal_gpio.o(i.hal_gpio_ctrl_eint) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_get_input_data) refers to drv_gpio.o(i.drv_gpio_get_input_data) for drv_gpio_get_input_data + hal_gpio.o(i.hal_gpio_get_int_type) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_get_pull_state) refers to drv_gpio.o(i.drv_gpio_get_pull_state) for drv_gpio_get_pull_state + hal_gpio.o(i.hal_gpio_get_pull_state) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_init_eint) refers to drv_gpio.o(i.drv_gpio_set_ioe) for drv_gpio_set_ioe + hal_gpio.o(i.hal_gpio_init_eint) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_gpio.o(i.hal_gpio_init_eint) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_gpio_group) for drv_sys_cfg_sel_gpio_group + hal_gpio.o(i.hal_gpio_init_eint) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_int_trig) for drv_sys_cfg_sel_int_trig + hal_gpio.o(i.hal_gpio_init_eint) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_gpio.o(i.hal_gpio_init_eint) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_init_input) refers to drv_gpio.o(i.drv_gpio_set_ioe) for drv_gpio_set_ioe + hal_gpio.o(i.hal_gpio_init_input) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_gpio.o(i.hal_gpio_init_input) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_init_output) refers to hal_gpio.o(i.drv_gpio_set_output_data) for drv_gpio_set_output_data + hal_gpio.o(i.hal_gpio_init_output) refers to drv_gpio.o(i.drv_gpio_set_ioe) for drv_gpio_set_ioe + hal_gpio.o(i.hal_gpio_init_output) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_gpio.o(i.hal_gpio_init_output) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_reg_eint_cb) refers to drv_gpio.o(i.drv_gpio_register_callback) for drv_gpio_register_callback + hal_gpio.o(i.hal_gpio_reg_eint_cb) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_ap_reset_int) refers to drv_gpio.o(i.drv_gpio_register_ap_reset_callback) for drv_gpio_register_ap_reset_callback + hal_gpio.o(i.hal_gpio_set_ap_reset_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) for drv_sys_cfg_sel_ap_rst_trig + hal_gpio.o(i.hal_gpio_set_ap_reset_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_gpio.o(i.hal_gpio_set_ap_reset_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + hal_gpio.o(i.hal_gpio_set_driving_strength) refers to drv_gpio.o(i.drv_gpio_set_driving_strength) for drv_gpio_set_driving_strength + hal_gpio.o(i.hal_gpio_set_driving_strength) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_mode) refers to drv_gpio.o(i.drv_gpio_set_mode3) for drv_gpio_set_mode3 + hal_gpio.o(i.hal_gpio_set_mode) refers to drv_gpio.o(i.drv_gpio_set_mode2) for drv_gpio_set_mode2 + hal_gpio.o(i.hal_gpio_set_mode) refers to drv_gpio.o(i.drv_gpio_set_mode1) for drv_gpio_set_mode1 + hal_gpio.o(i.hal_gpio_set_mode) refers to drv_gpio.o(i.drv_gpio_set_mode0) for drv_gpio_set_mode0 + hal_gpio.o(i.hal_gpio_set_mode) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_output_data) refers to hal_gpio.o(i.drv_gpio_set_output_data) for drv_gpio_set_output_data + hal_gpio.o(i.hal_gpio_set_pull_state) refers to drv_gpio.o(i.drv_gpio_set_pull_state) for drv_gpio_set_pull_state + hal_gpio.o(i.hal_gpio_set_pull_state) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_schmitt_trigger) refers to drv_gpio.o(i.drv_gpio_set_schmitt_trigger) for drv_gpio_set_schmitt_trigger + hal_gpio.o(i.hal_gpio_set_schmitt_trigger) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_slew_rate) refers to drv_gpio.o(i.drv_gpio_set_slew_rate) for drv_gpio_set_slew_rate + hal_gpio.o(i.hal_gpio_set_slew_rate) refers to hal_gpio.o(.constdata) for .constdata + hal_i2c_master.o(i.hal_i2c_m_deinit) refers to drv_i2c_master.o(i.drv_i2c_m_deinit) for drv_i2c_m_deinit + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_master.o(i.drv_i2c_master_init) for drv_i2c_master_init + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_master.o(i.drv_i2c1_set_callback) for drv_i2c1_set_callback + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_master.o(i.drv_i2c_m_enable_intr) for drv_i2c_m_enable_intr + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_dma.o(i.drv_i2c_dma_init) for drv_i2c_dma_init + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_dma.o(i.drv_i2c_enable_rx_dma) for drv_i2c_enable_rx_dma + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_dma.o(i.drv_i2c_enable_tx_dma) for drv_i2c_enable_tx_dma + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to hal_i2c_master.o(i.hal_i2c_master_irq_callback) for hal_i2c_master_irq_callback + hal_i2c_master.o(i.hal_i2c_m_dma_read) refers to drv_i2c_dma.o(i.drv_i2c_master_read_dma) for drv_i2c_master_read_dma + hal_i2c_master.o(i.hal_i2c_m_dma_read) refers to hal_i2c_master.o(.data) for .data + hal_i2c_master.o(i.hal_i2c_m_dma_write) refers to drv_i2c_dma.o(i.drv_i2c_master_write_dma) for drv_i2c_master_write_dma + hal_i2c_master.o(i.hal_i2c_m_dma_write) refers to hal_i2c_master.o(.data) for .data + hal_i2c_master.o(i.hal_i2c_m_set_high_impedance) refers to drv_i2c_master.o(i.drv_i2c_m_enable) for drv_i2c_m_enable + hal_i2c_master.o(i.hal_i2c_m_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_i2c_master.o(i.hal_i2c_m_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + hal_i2c_master.o(i.hal_i2c_m_transfer_complate) refers to hal_i2c_master.o(.data) for .data + hal_i2c_master.o(i.hal_i2c_master_irq_callback) refers to drv_i2c_master.o(i.drv_i2c_m_clear_it_pending_bit) for drv_i2c_m_clear_it_pending_bit + hal_i2c_master.o(i.hal_i2c_master_irq_callback) refers to hal_i2c_master.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_deinit) refers to drv_i2c_slave.o(i.drv_i2c_s_set_intr) for drv_i2c_s_set_intr + hal_i2c_slave.o(i.hal_i2c_s_deinit) refers to drv_i2c_slave.o(i.drv_i2c_s_enable) for drv_i2c_s_enable + hal_i2c_slave.o(i.hal_i2c_s_deinit) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_i2c_slave.o(i.hal_i2c_s_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_i2c_slave.o(i.hal_i2c_s_deinit) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_deinit) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_i2c_slave.o(i.hal_i2c_s_dma_user_callback) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_dma_write) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + hal_i2c_slave.o(i.hal_i2c_s_dma_write) refers to drv_i2c_dma.o(i.drv_i2c_slave_write_dma) for drv_i2c_slave_write_dma + hal_i2c_slave.o(i.hal_i2c_s_dma_write) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_dma_write) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_i2c_slave.o(i.hal_i2c_s_get_tx_byte_num) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_i2c_slave.o(i.hal_i2c_s_init) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_slave.o(i.drv_i2c_slave_init) for drv_i2c_slave_init + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_master.o(i.drv_i2c1_set_callback) for drv_i2c1_set_callback + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_slave.o(i.drv_i2c_s_config_intr) for drv_i2c_s_config_intr + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_slave.o(i.drv_i2c_s_set_intr) for drv_i2c_s_set_intr + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_dma.o(i.drv_i2c_dma_init) for drv_i2c_dma_init + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) for drv_i2c_set_dma_irq_callback + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) for drv_sys_cfg_set_dma_tx_req + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_dma.o(i.drv_i2c_enable_tx_dma) for drv_i2c_enable_tx_dma + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_dma.o(i.drv_dma_enable_channel_interrupts) for drv_dma_enable_channel_interrupts + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_slave.o(i.drv_i2c0_set_callback) for drv_i2c0_set_callback + hal_i2c_slave.o(i.hal_i2c_s_init) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_init) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_i2c_slave.o(i.hal_i2c_s_init) refers to hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) for hal_i2c_slave_irq_callback + hal_i2c_slave.o(i.hal_i2c_s_init) refers to hal_i2c_slave.o(i.hal_i2c_s_dma_user_callback) for hal_i2c_s_dma_user_callback + hal_i2c_slave.o(i.hal_i2c_s_nonblocking_read) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_read_complate) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_read_complate_clear) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_read_data) refers to drv_i2c_slave.o(i.drv_i2c_s_read_data) for drv_i2c_s_read_data + hal_i2c_slave.o(i.hal_i2c_s_read_data) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_read_data) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_i2c_slave.o(i.hal_i2c_s_rxfifo_notempty) refers to drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) for drv_i2c_s_get_fifo_status + hal_i2c_slave.o(i.hal_i2c_s_rxfifo_notempty) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_rxfifo_notempty) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_i2c_slave.o(i.hal_i2c_s_sel) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_set_dma_tx_cycle) refers to drv_dma.o(i.drv_dma_enable_cycle) for drv_dma_enable_cycle + hal_i2c_slave.o(i.hal_i2c_s_set_dma_tx_cycle) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_set_dma_tx_cycle) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_i2c_slave.o(i.hal_i2c_s_set_high_impedance) refers to drv_i2c_slave.o(i.drv_i2c_s_enable) for drv_i2c_s_enable + hal_i2c_slave.o(i.hal_i2c_s_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_i2c_slave.o(i.hal_i2c_s_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + hal_i2c_slave.o(i.hal_i2c_s_set_high_impedance) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_set_high_impedance) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_i2c_slave.o(i.hal_i2c_s_set_transfer) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_write_complate) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_write_data) refers to drv_i2c_slave.o(i.drv_i2c_s_write_data) for drv_i2c_s_write_data + hal_i2c_slave.o(i.hal_i2c_s_write_data) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_write_data) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) for drv_i2c_s_get_fifo_status + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_i2c_slave.o(i.drv_i2c_s_clear_it_pending_bit) for drv_i2c_s_clear_it_pending_bit + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_i2c_slave.o(i.drv_i2c_s_write_data) for drv_i2c_s_write_data + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_spi_master.o(i.hal_spi_m_callback) refers to drv_spi_dma.o(i.drv_spi_abort_dma) for drv_spi_abort_dma + hal_spi_master.o(i.hal_spi_m_callback) refers to hal_spi_master.o(.data) for .data + hal_spi_master.o(i.hal_spi_m_clear_rxfifo) refers to drv_spi_master.o(i.drv_spi_m_read_data) for drv_spi_m_read_data + hal_spi_master.o(i.hal_spi_m_deinit) refers to drv_spi_master.o(i.drv_spi_m_deinit) for drv_spi_m_deinit + hal_spi_master.o(i.hal_spi_m_dma_init) refers to hal_spi_master.o(i.hal_spi_m_gpio_init) for hal_spi_m_gpio_init + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_master.o(i.drv_spi_master_init) for drv_spi_master_init + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_dma.o(i.drv_spi_dma_init) for drv_spi_dma_init + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_dma.o(i.drv_spi_dma_ch6_init) for drv_spi_dma_ch6_init + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) for drv_spi_set_dma_irq_callback + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) for drv_spi_set_dma_ch6_irq_callback + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) for drv_sys_cfg_set_dma_rx_req + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) for drv_sys_cfg_set_dma_tx_req + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_master.o(i.drv_spi_m_enable_rx_dma) for drv_spi_m_enable_rx_dma + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_master.o(i.drv_spi_m_enable_tx_dma) for drv_spi_m_enable_tx_dma + hal_spi_master.o(i.hal_spi_m_dma_init) refers to hal_spi_master.o(i.hal_spi_m_callback) for hal_spi_m_callback + hal_spi_master.o(i.hal_spi_m_dma_read) refers to drv_spi_dma.o(i.drv_spim_dma_read) for drv_spim_dma_read + hal_spi_master.o(i.hal_spi_m_dma_read) refers to hal_spi_master.o(.data) for .data + hal_spi_master.o(i.hal_spi_m_dma_write) refers to drv_spi_dma.o(i.drv_spim_dma_write) for drv_spim_dma_write + hal_spi_master.o(i.hal_spi_m_dma_write) refers to hal_spi_master.o(.data) for .data + hal_spi_master.o(i.hal_spi_m_get_transfer_complate) refers to hal_spi_master.o(.data) for .data + hal_spi_master.o(i.hal_spi_m_gpio_init) refers to drv_spi_master.o(i.drv_spi_m_gpio_init) for drv_spi_m_gpio_init + hal_spi_master.o(i.hal_spi_m_read_rxfifo) refers to drv_spi_master.o(i.drv_spi_m_read_data) for drv_spi_m_read_data + hal_spi_master.o(i.hal_spi_m_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_spi_master.o(i.hal_spi_m_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_init_input) for hal_gpio_init_input + hal_spi_master.o(i.hal_spi_m_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + hal_swire.o(i.hal_swire_deinit) refers to drv_swire.o(i.drv_swire_enable) for drv_swire_enable + hal_swire.o(i.hal_swire_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_swire.o(i.hal_swire_init) refers to drv_crgu.o(i.drv_crgu_set_swire_div) for drv_crgu_set_swire_div + hal_swire.o(i.hal_swire_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_swire.o(i.hal_swire_init) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_swire.o(i.hal_swire_init) refers to drv_swire.o(i.drv_swire_enable) for drv_swire_enable + hal_swire.o(i.hal_swire_open) refers to drv_swire.o(i.drv_swire_set_power_down) for drv_swire_set_power_down + hal_swire.o(i.hal_swire_register_callback) refers to drv_swire.o(i.drv_swire_register_callback) for drv_swire_register_callback + hal_swire.o(i.hal_swire_start) refers to drv_swire.o(i.drv_swire_set_int) for drv_swire_set_int + hal_swire.o(i.hal_swire_start) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_swire.o(i.hal_swire_start) refers to drv_swire.o(i.drv_swire_set_bit_time) for drv_swire_set_bit_time + hal_swire.o(i.hal_swire_start) refers to drv_swire.o(i.drv_swire_set_pulse_count) for drv_swire_set_pulse_count + hal_swire.o(i.hal_swire_start) refers to drv_common.o(.data) for g_system_clock + hal_system.o(i.hal_system_deep_sleep_mode) refers to drv_pwr.o(i.drv_pwr_enter_deep_sleep_mode) for drv_pwr_enter_deep_sleep_mode + hal_system.o(i.hal_system_disable_systick) refers to drv_common.o(i.drv_common_disable_systick) for drv_common_disable_systick + hal_system.o(i.hal_system_enable_systick) refers to drv_common.o(i.drv_common_enable_systick) for drv_common_enable_systick + hal_system.o(i.hal_system_get_tick) refers to drv_common.o(i.drv_common_get_tick) for drv_common_get_tick + hal_system.o(i.hal_system_idle_mode) refers to drv_common.o(i.drv_common_idle_mode) for drv_common_idle_mode + hal_system.o(i.hal_system_init) refers to drv_pwr.o(i.drv_pwr_set_system_clk_src) for drv_pwr_set_system_clk_src + hal_system.o(i.hal_system_init) refers to drv_crgu.o(i.drv_crgu_set_ahb_src) for drv_crgu_set_ahb_src + hal_system.o(i.hal_system_init) refers to drv_crgu.o(i.drv_crgu_set_ahb_pre_div) for drv_crgu_set_ahb_pre_div + hal_system.o(i.hal_system_init) refers to irq_redirect .o(i.handle_init) for handle_init + hal_system.o(i.hal_system_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_all_int) for drv_sys_cfg_clear_all_int + hal_system.o(i.hal_system_init) refers to drv_common.o(i.drv_common_system_init) for drv_common_system_init + hal_system.o(i.hal_system_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_system.o(i.hal_system_init) refers to drv_pwr.o(i.drv_pwr_set_pvd_mode) for drv_pwr_set_pvd_mode + hal_system.o(i.hal_system_init) refers to drv_common.o(.data) for g_system_clock + hal_system.o(i.hal_system_init_console) refers to hal_uart.o(i.hal_uart_init) for hal_uart_init + hal_system.o(i.hal_system_register_systick_cb) refers to drv_common.o(i.drv_common_systick_register_cb) for drv_common_systick_register_cb + hal_system.o(i.hal_system_set_phy_calibration) refers to drv_phy_common.o(i.drv_phy_enable_calibration) for drv_phy_enable_calibration + hal_system.o(i.hal_system_set_pvd) refers to drv_pwr.o(i.drv_pwr_set_pvd_mode) for drv_pwr_set_pvd_mode + hal_system.o(i.hal_system_set_vcc) refers to drv_pwr.o(i.drv_pwr_set_cp_mode) for drv_pwr_set_cp_mode + hal_system.o(i.hal_system_share_flash_mode) refers to drv_fls.o(i.drv_fls_gpio_connect) for drv_fls_gpio_connect + hal_system.o(i.hal_system_share_flash_mode) refers to drv_fls.o(i.drv_fls_gpio_disconnect) for drv_fls_gpio_disconnect + hal_system.o(i.hal_system_sleep_mode) refers to drv_crgu.o(i.drv_crgu_config_clocks) for drv_crgu_config_clocks + hal_timer.o(i.hal_timer_deinit) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + hal_timer.o(i.hal_timer_deinit) refers to drv_timer.o(i.drv_timer_set_repeat) for drv_timer_set_repeat + hal_timer.o(i.hal_timer_deinit) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_timer.o(i.hal_timer_deinit) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_timer.o(i.hal_timer_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_timer.o(i.hal_timer_get_status) refers to drv_timer.o(i.drv_timer_get_status) for drv_timer_get_status + hal_timer.o(i.hal_timer_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_timer.o(i.hal_timer_init) refers to drv_timer.o(i.drv_timer_set_prescaler) for drv_timer_set_prescaler + hal_timer.o(i.hal_timer_set_repeat) refers to drv_timer.o(i.drv_timer_set_repeat) for drv_timer_set_repeat + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_register_callback) for drv_timer_register_callback + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_get_prescaler) for drv_timer_get_prescaler + hal_timer.o(i.hal_timer_start) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_set_compare_val) for drv_timer_set_compare_val + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_timer.o(i.hal_timer_start) refers to drv_common.o(.data) for g_system_clock + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_register_callback) for drv_timer_register_callback + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_get_prescaler) for drv_timer_get_prescaler + hal_timer.o(i.hal_timer_start_ex) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_set_compare_val) for drv_timer_set_compare_val + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_timer.o(i.hal_timer_start_ex) refers to drv_common.o(.data) for g_system_clock + hal_timer.o(i.hal_timer_stop) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_timer.o(i.hal_timer_stop) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + hal_timer.o(i.hal_timer_stop) refers to drv_timer.o(i.drv_timer_register_callback) for drv_timer_register_callback + hal_timer.o(i.hal_timer_stop) refers to drv_timer.o(i.drv_timer_set_compare_val) for drv_timer_set_compare_val + tau_delay.o(i.delayMs) refers to tau_delay.o(i.delayUs) for delayUs + app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) refers to app_tp_for_custom_s8.o(.data) for .data + app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) refers to app_tp_for_custom_s8.o(.constdata) for .constdata + app_tp_for_custom_s8.o(i.app_tp_screen_analysis_const) refers to app_tp_transfer.o(i.app_tp_screen_init) for app_tp_screen_init + app_tp_for_custom_s8.o(i.app_tp_screen_analysis_const) refers to app_tp_for_custom_s8.o(.data) for .data + app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) refers to app_tp_enc.o(i.EncryptCheck) for EncryptCheck + app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) refers to uidiv.o(.text) for __aeabi_uidivmod + app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) refers to app_tp_for_custom_s8.o(.data) for .data + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_1 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_2 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_3 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_4 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_5 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_6 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_7 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for phone_reg_point_data + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for phone_reg_point_back + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for phone_reg_coord_data + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for phone_reg_coord_back + hal_uart.o(i.hal_uart_deinit) refers to drv_dma.o(i.drv_dma_deinit) for drv_dma_deinit + hal_uart.o(i.hal_uart_deinit) refers to drv_uart.o(i.UART_Deinit) for UART_Deinit + hal_uart.o(i.hal_uart_dmacallback) refers to hal_uart.o(.bss) for .bss + hal_uart.o(i.hal_uart_init) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_uart.o(i.hal_uart_init) refers to memseta.o(.text) for __aeabi_memclr4 + hal_uart.o(i.hal_uart_init) refers to drv_uart.o(i.UART_init) for UART_init + hal_uart.o(i.hal_uart_init) refers to drv_common.o(.data) for g_system_clock + hal_uart.o(i.hal_uart_init) refers to hal_uart.o(.bss) for .bss + hal_uart.o(i.hal_uart_receive_blocking) refers to drv_uart.o(i.UART_ReadBlocking) for UART_ReadBlocking + hal_uart.o(i.hal_uart_receive_dma) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + hal_uart.o(i.hal_uart_receive_dma) refers to drv_uart_dma.o(i.UART_TransferCreateHandleDMA) for UART_TransferCreateHandleDMA + hal_uart.o(i.hal_uart_receive_dma) refers to drv_uart_dma.o(i.UART_TransferReceiveDMA) for UART_TransferReceiveDMA + hal_uart.o(i.hal_uart_receive_dma) refers to hal_uart.o(.bss) for .bss + hal_uart.o(i.hal_uart_receive_dma) refers to hal_uart.o(i.hal_uart_dmacallback) for hal_uart_dmacallback + hal_uart.o(i.hal_uart_transmit_blocking) refers to drv_uart.o(i.UART_WriteBlocking) for UART_WriteBlocking + hal_uart.o(i.hal_uart_transmit_dma) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + hal_uart.o(i.hal_uart_transmit_dma) refers to drv_uart_dma.o(i.UART_TransferCreateHandleDMA) for UART_TransferCreateHandleDMA + hal_uart.o(i.hal_uart_transmit_dma) refers to drv_uart_dma.o(i.UART_TransferSendDMA) for UART_TransferSendDMA + hal_uart.o(i.hal_uart_transmit_dma) refers to hal_uart.o(.bss) for .bss + hal_uart.o(i.hal_uart_transmit_dma) refers to hal_uart.o(i.hal_uart_dmacallback) for hal_uart_dmacallback + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_param_init.o(i.drv_param_init_get_ccm) for drv_param_init_get_ccm + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_lcdc.o(i.drv_lcdc_config_ccm) for drv_lcdc_config_ccm + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to ffltui.o(.text) for __aeabi_ui2f + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to fdiv.o(.text) for __aeabi_fdiv + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to f2d.o(.text) for __aeabi_f2d + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) for hal_internal_sync_get_hight_performan_mode + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to dfltui.o(.text) for __aeabi_ui2d + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to ddiv.o(.text) for __aeabi_ddiv + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to sqrt.o(i.sqrt) for sqrt + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to dmul.o(.text) for __aeabi_dmul + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to cdcmple.o(.text) for __aeabi_cdcmple + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.check_pkt_buf_rev) refers to hal_internal_vsync.o(i.drv_rxbr_get_status0) for drv_rxbr_get_status0 + hal_internal_vsync.o(i.check_pkt_buf_rev) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.check_pkt_buf_rev) refers to drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) for drv_rxbr_clear_pkt_buffer + hal_internal_vsync.o(i.check_pkt_buf_rev) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.dcs_sw_filter) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.dcs_sw_filter) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_data_mode) for drv_memc_set_data_mode + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_tear_waveform) for drv_memc_set_tear_waveform + hal_internal_vsync.o(i.hal_internal_init_memc) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tear_mode) for hal_internal_vsync_get_tear_mode + hal_internal_vsync.o(i.hal_internal_init_memc) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_ltpo_mode) for drv_memc_set_ltpo_mode + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_double_buffer) for drv_memc_set_double_buffer + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_active_height) for drv_memc_set_active_height + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_inten) for drv_memc_set_inten + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_enable_irq) for drv_memc_enable_irq + hal_internal_vsync.o(i.hal_internal_init_memc) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_cmd_mode_rcv_te) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_sync_cmd_mode_rcv_te) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite) for drv_lcdc_config_overwrite + hal_internal_vsync.o(i.hal_internal_sync_cmd_mode_rcv_te) refers to drv_lcdc.o(i.drv_lcdc_start) for drv_lcdc_start + hal_internal_vsync.o(i.hal_internal_sync_cmd_mode_rcv_te) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.hal_internal_sync_cmd_mode_rcv_te) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(i.calc_framebuffer_setting) for calc_framebuffer_setting + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_vidc.o(i.drv_vidc_reset) for drv_vidc_reset + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) for hal_dsi_rx_ctrl_init + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) for hal_dsi_tx_ctrl_init + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) for hal_dsi_rx_ctrl_start + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) for hal_dsi_rx_ctrl_gen_a_tear_signal + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to tau_delay.o(i.delayUs) for delayUs + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_dsi_tx.o(i.drv_dsi_tx_shutdown) for drv_dsi_tx_shutdown + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_crgu.o(i.drv_crgu_config_reset_modules) for drv_crgu_config_reset_modules + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(i.hal_internal_init_memc) for hal_internal_init_memc + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) for hal_dsi_tx_ctrl_start + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to hal_internal_vsync.o(i.calc_framebuffer_setting) for calc_framebuffer_setting + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to drv_vidc.o(i.drv_vidc_reset) for drv_vidc_reset + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) for hal_dsi_rx_ctrl_init + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) for hal_dsi_rx_ctrl_start + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to drv_lcdc.o(i.drv_lcdc_enable_shadow_reg) for drv_lcdc_enable_shadow_reg + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to tau_delay.o(i.delayMs) for delayMs + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) for hal_dsi_rx_ctrl_gen_a_tear_signal + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to tau_delay.o(i.delayUs) for delayUs + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) for hal_vsync_reset_lcdc_scaler + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to hal_internal_vsync.o(i.vsync_set_te_mode) for vsync_set_te_mode + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.hal_internal_update_dpi_param) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) refers to ffltui.o(.text) for __aeabi_ui2f + hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) refers to fdiv.o(.text) for __aeabi_fdiv + hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) refers to fmul.o(.text) for __aeabi_fmul + hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) refers to f2d.o(.text) for __aeabi_f2d + hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) refers to dadd.o(.text) for __aeabi_dadd + hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) refers to ceil.o(i.ceil) for ceil + hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_deinit) refers to memseta.o(.text) for __aeabi_memclr4 + hal_internal_vsync.o(i.hal_internal_vsync_deinit) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_deinit) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_get_tear_mode) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to drv_chip_info.o(i.drv_chip_rx_info_check) for drv_chip_rx_info_check + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) for check_mipi_rx_tx_video_info + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.calc_framebuffer_setting) for calc_framebuffer_setting + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to drv_rxbr.o(i.drv_rxbr_register_irq0_callback) for drv_rxbr_register_irq0_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to drv_rxbr.o(i.drv_rxbr_register_irq1_callback) for drv_rxbr_register_irq1_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to drv_vidc.o(i.drv_vidc_register_callback) for drv_vidc_register_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to dcs_packet_fifo.o(i.dcs_packet_fifo_init) for dcs_packet_fifo_init + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.soft_gen_te) for soft_gen_te + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.soft_gen_te_double_buffer) for soft_gen_te_double_buffer + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.rxbr_irq0_callback) for rxbr_irq0_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.rxbr_irq1_callback) for rxbr_irq1_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.vidc_callback) for vidc_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) for check_mipi_rx_tx_video_info + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to hal_internal_vsync.o(i.calc_framebuffer_setting) for calc_framebuffer_setting + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_register_write_cmd_entry) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) refers to drv_rxbr.o(i.drv_rxbr_set_cmd_filter) for drv_rxbr_set_cmd_filter + hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_dcs_direct_mode) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) for hal_internal_vsync_set_auto_hw_filter + hal_internal_vsync.o(i.hal_internal_vsync_set_dcs_direct_mode) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) refers to hal_internal_vsync.o(i.hal_internal_vsync_deinit) for hal_internal_vsync_deinit + hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to hal_internal_vsync.o(i.vsync_set_te_mode) for vsync_set_te_mode + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to hal_internal_vsync.o(i.hal_internal_vsync_deinit) for hal_internal_vsync_deinit + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite) for drv_lcdc_config_overwrite + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to hal_internal_vsync.o(i.vsync_set_te_mode) for vsync_set_te_mode + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to ap_demo.o(i.__ARM_common_switch8) for __ARM_common_switch8 + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_memc.o(i.drv_memc_rate_transfer_sel) for drv_memc_rate_transfer_sel + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_memc.o(i.drv_memc_sel_vsync) for drv_memc_sel_vsync + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) for drv_rxbr_frame_drop_cfg + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_rxbr.o(i.drv_rxbr_hline_rcv0_cfg) for drv_rxbr_hline_rcv0_cfg + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to tau_delay.o(i.delayMs) for delayMs + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to hal_internal_vsync.o(i.drv_rxbr_get_status0) for drv_rxbr_get_status0 + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to ffltui.o(.text) for __aeabi_ui2f + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to fdiv.o(.text) for __aeabi_fdiv + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_memc.o(i.drv_memc_set_fs_en_conditions) for drv_memc_set_fs_en_conditions + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_memc.o(i.drv_memc_set_lcdc_st_conditions) for drv_memc_set_lcdc_st_conditions + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_memc.o(i.drv_memc_set_vidc_sync_cnt) for drv_memc_set_vidc_sync_cnt + hal_internal_vsync.o(i.hal_internal_vsync_update_lcdc_addr) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to dfltui.o(.text) for __aeabi_ui2d + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to dadd.o(.text) for __aeabi_dadd + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp_area) for hal_dsi_tx_ctrl_set_partial_disp_area + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp) for hal_dsi_tx_ctrl_set_partial_disp + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to drv_param_init.o(i.drv_param_init_get_sclu_filter) for drv_param_init_get_sclu_filter + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to drv_lcdc.o(i.drv_lcdc_config_scale_up_coef) for drv_lcdc_config_scale_up_coef + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to drv_crgu.o(i.drv_crgu_config_reset_modules) for drv_crgu_config_reset_modules + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) for hal_dsi_tx_ctrl_init + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to hal_internal_vsync.o(i.hal_internal_init_memc) for hal_internal_init_memc + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) for hal_dsi_tx_ctrl_start + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to hal_internal_vsync.o(i.dcs_sw_filter) for dcs_sw_filter + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) for dcs_packet_fifo_alloc + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) for hal_dsi_rx_ctrl_dsc_async_handler + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to hal_internal_vsync.o(i.check_pkt_buf_rev) for check_pkt_buf_rev + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) for drv_dsi_tx_command_put_payload + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rx_partial_update) refers to drv_rxbr.o(i.drv_rxbr_get_col_addr) for drv_rxbr_get_col_addr + hal_internal_vsync.o(i.rx_partial_update) refers to drv_rxbr.o(i.drv_rxbr_get_page_addr) for drv_rxbr_get_page_addr + hal_internal_vsync.o(i.rx_partial_update) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.rx_partial_update) refers to drv_dsc_dec.o(i.drv_dsc_dec_get_nslc) for drv_dsc_dec_get_nslc + hal_internal_vsync.o(i.rx_partial_update) refers to drv_crgu.o(i.drv_crgu_set_dsco_src) for drv_crgu_set_dsco_src + hal_internal_vsync.o(i.rx_partial_update) refers to drv_crgu.o(i.drv_crgu_set_dsco_src_div) for drv_crgu_set_dsco_src_div + hal_internal_vsync.o(i.rx_partial_update) refers to drv_crgu.o(i.drv_crgu_set_dsc_core_div) for drv_crgu_set_dsc_core_div + hal_internal_vsync.o(i.rx_partial_update) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.rx_partial_update) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rx_receive_packet) refers to hal_internal_vsync.o(i.rx_get_dcs_packet_data) for rx_get_dcs_packet_data + hal_internal_vsync.o(i.rx_receive_packet) refers to hal_internal_vsync.o(i.rx_receive_pps) for rx_receive_pps + hal_internal_vsync.o(i.rx_receive_packet) refers to drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) for drv_rxbr_clear_pkt_buffer + hal_internal_vsync.o(i.rx_receive_packet) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.rx_receive_packet) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rx_receive_pps) refers to memseta.o(.text) for __aeabi_memclr4 + hal_internal_vsync.o(i.rx_receive_pps) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.rx_receive_pps) refers to drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) for drv_rxbr_clear_pkt_buffer + hal_internal_vsync.o(i.rx_receive_pps) refers to hal_internal_vsync.o(i.check_pkt_buf_rev) for check_pkt_buf_rev + hal_internal_vsync.o(i.rx_receive_pps) refers to drv_dsc_dec.o(i.drv_dsc_dec_convert_pps_rc_parameter) for drv_dsc_dec_convert_pps_rc_parameter + hal_internal_vsync.o(i.rx_receive_pps) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.rx_receive_pps) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) for drv_dsi_rx_get_compression_en + hal_internal_vsync.o(i.rx_receive_pps) refers to drv_dsc_dec.o(i.drv_dsc_dec_enable) for drv_dsc_dec_enable + hal_internal_vsync.o(i.rx_receive_pps) refers to drv_dsc_dec.o(i.drv_dsc_dec_set_u8_pps) for drv_dsc_dec_set_u8_pps + hal_internal_vsync.o(i.rx_receive_pps) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.rx_receive_pps) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to hal_internal_vsync.o(i.drv_rxbr_get_status0) for drv_rxbr_get_status0 + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to hal_internal_vsync.o(i.rx_receive_packet) for rx_receive_packet + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to hal_internal_vsync.o(i.drv_rxbr_get_int_source) for drv_rxbr_get_int_source + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to hal_internal_vsync.o(i.rx_partial_update) for rx_partial_update + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(i.drv_rxbr_get_int_source) for drv_rxbr_get_int_source + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) for hal_internal_video_mode_auto_sync + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(i.vpre_err_reset) for vpre_err_reset + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to drv_memc.o(i.drv_memc_set_double_buffer_reverse) for drv_memc_set_double_buffer_reverse + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) for drv_rxbr_clear_pkt_buffer + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.soft_gen_te) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.soft_gen_te) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.soft_gen_te_double_buffer) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.soft_gen_te_double_buffer) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.vidc_callback) refers to drv_vidc.o(i.drv_vidc_get_irq_status) for drv_vidc_get_irq_status + hal_internal_vsync.o(i.vidc_callback) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite) for drv_lcdc_config_overwrite + hal_internal_vsync.o(i.vidc_callback) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_internal_vsync.o(i.vidc_callback) refers to drv_vidc.o(i.drv_vidc_clear_irq) for drv_vidc_clear_irq + hal_internal_vsync.o(i.vidc_callback) refers to drv_vidc.o(i.drv_vidc_set_irqen) for drv_vidc_set_irqen + hal_internal_vsync.o(i.vidc_callback) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.vidc_callback) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.vidc_callback) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.vpre_err_reset) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_internal_vsync.o(i.vpre_err_reset) refers to drv_vidc.o(i.drv_vidc_reset) for drv_vidc_reset + hal_internal_vsync.o(i.vpre_err_reset) refers to drv_dsc_dec.o(i.drv_dsc_dec_set_u8_pps) for drv_dsc_dec_set_u8_pps + hal_internal_vsync.o(i.vpre_err_reset) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.vsync_set_te_mode) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_internal_vsync.o(i.vsync_set_te_mode) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_internal_vsync.o(i.vsync_set_te_mode) refers to drv_lcdc.o(i.drv_lcdc_ctrl_flow) for drv_lcdc_ctrl_flow + hal_internal_vsync.o(i.vsync_set_te_mode) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.vsync_set_te_mode) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.vsync_set_te_mode) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.vsync_set_te_mode) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(.data) refers to hal_internal_vsync.o(.bss) for sg_te_info + drv_common.o(i.app_HardFault_Handler) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_common.o(i.app_SysTick_Handler) refers to drv_common.o(.data) for .data + drv_common.o(i.drv_common_enable_systick) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_common.o(i.drv_common_enable_systick) refers to drv_common.o(.data) for .data + drv_common.o(i.drv_common_get_tick) refers to drv_common.o(.data) for .data + drv_common.o(i.drv_common_system_init) refers to drv_chip_info.o(i.drv_chip_info_init) for drv_chip_info_init + drv_common.o(i.drv_common_systick_register_cb) refers to drv_common.o(.data) for .data + drv_dma.o(i.app_dma_irq_handler) refers to drv_dma.o(i.drv_dma_irq_handler) for drv_dma_irq_handler + drv_dma.o(i.drv_dma_abort_transfer) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + drv_dma.o(i.drv_dma_abort_transfer) refers to drv_dma.o(i.drv_dma_disenable_channel_interrupts) for drv_dma_disenable_channel_interrupts + drv_dma.o(i.drv_dma_ahb_init) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + drv_dma.o(i.drv_dma_ahb_init) refers to drv_dma.o(i.drv_dma_disenable_channel_interrupts) for drv_dma_disenable_channel_interrupts + drv_dma.o(i.drv_dma_ahb_init) refers to drv_dma.o(i.drv_dma_clear_flag) for drv_dma_clear_flag + drv_dma.o(i.drv_dma_ahb_init) refers to drv_dma.o(i.drv_dma_set_ccr) for drv_dma_set_ccr + drv_dma.o(i.drv_dma_ahb_init) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_dma.o(i.drv_dma_clear_flag) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dma.o(i.drv_dma_create_handle) refers to drv_dma.o(.bss) for .bss + drv_dma.o(i.drv_dma_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_dma.o(i.drv_dma_disenable_channel_interrupts) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dma.o(i.drv_dma_enable_channel_interrupts) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_dma.o(i.drv_dma_enable_cycle) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + drv_dma.o(i.drv_dma_get_remaining_bytes) refers to drv_dma.o(i.drv_dma_channel_is_active) for drv_dma_channel_is_active + drv_dma.o(i.drv_dma_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_dma.o(i.drv_dma_init) refers to drv_dma.o(i.drv_dma_ahb_init) for drv_dma_ahb_init + drv_dma.o(i.drv_dma_irq_handler) refers to drv_dma.o(i.drv_dma_get_channel_flag) for drv_dma_get_channel_flag + drv_dma.o(i.drv_dma_irq_handler) refers to drv_dma.o(i.drv_dma_clear_flag) for drv_dma_clear_flag + drv_dma.o(i.drv_dma_irq_handler) refers to drv_dma.o(.bss) for .bss + drv_dma.o(i.drv_dma_m2m_init) refers to memseta.o(.text) for __aeabi_memclr4 + drv_dma.o(i.drv_dma_m2m_init) refers to drv_dma.o(i.drv_dma_init) for drv_dma_init + drv_dma.o(i.drv_dma_reset) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + drv_dma.o(i.drv_dma_set_burst) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + drv_dma.o(i.drv_dma_set_transfer) refers to drv_dma.o(i.drv_dma_set_burst) for drv_dma_set_burst + drv_dma.o(i.drv_dma_start_transfer) refers to drv_dma.o(i.drv_dma_enable_channel_interrupts) for drv_dma_enable_channel_interrupts + drv_dma.o(i.drv_dma_start_transfer) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_fls.o(i.drv_fls_gpio_connect) refers to drv_fls.o(i.drv_fls_gpio_disconnect) for drv_fls_gpio_disconnect + drv_fls.o(i.drv_fls_gpio_disconnect) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_fls.o(i.fls_EnableClk) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_fls.o(i.fls_busy_pending) refers to norflash.o(i.norflash_get_status) for norflash_get_status + drv_fls.o(i.fls_de_init) refers to drv_fls_dma.o(i.fls_dma_disable) for fls_dma_disable + drv_fls.o(i.fls_de_init) refers to drv_dma.o(i.drv_dma_clear_flag) for drv_dma_clear_flag + drv_fls.o(i.fls_de_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_fls.o(i.fls_disable_it) refers to drv_fls.o(i.__NVIC_DisableIRQ) for __NVIC_DisableIRQ + drv_fls.o(i.fls_disable_it) refers to drv_fls.o(i.fls_set_mc_irq_mask) for fls_set_mc_irq_mask + drv_fls.o(i.fls_enable_it) refers to drv_fls.o(i.__NVIC_DisableIRQ) for __NVIC_DisableIRQ + drv_fls.o(i.fls_enable_it) refers to drv_fls.o(i.fls_set_mc_irq_mask) for fls_set_mc_irq_mask + drv_fls.o(i.fls_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_fls.o(i.fls_init) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + drv_fls.o(i.fls_init) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_init) refers to drv_fls.o(i.fls_spi_init) for fls_spi_init + drv_fls.o(i.fls_init) refers to drv_fls.o(i.fls_ctrl_cfg_init) for fls_ctrl_cfg_init + drv_fls.o(i.fls_init) refers to drv_fls.o(i.fls_set_tuning) for fls_set_tuning + drv_fls.o(i.fls_init) refers to drv_fls_dma.o(i.fls_dma_disable) for fls_dma_disable + drv_fls.o(i.fls_read_byte_data) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_read_byte_data) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls.o(i.fls_read_byte_data) refers to drv_fls.o(i.fls_set_read) for fls_set_read + drv_fls.o(i.fls_read_byte_data) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls.o(i.fls_read_cmd) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_read_cmd) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls.o(i.fls_read_cmd) refers to drv_fls.o(i.fls_set_read) for fls_set_read + drv_fls.o(i.fls_read_cmd) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls.o(i.fls_read_cmd_it) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_read_cmd_it) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls.o(i.fls_read_cmd_it) refers to drv_fls.o(i.fls_set_read) for fls_set_read + drv_fls.o(i.fls_read_cmd_it) refers to drv_fls.o(i.fls_enable_it) for fls_enable_it + drv_fls.o(i.fls_read_cmd_it) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls.o(i.fls_set_mc_irq_mask) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_fls.o(i.fls_set_mc_irq_mask) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_fls.o(i.fls_write_byte_data) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_write_byte_data) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls.o(i.fls_write_byte_data) refers to drv_fls.o(i.fls_set_write) for fls_set_write + drv_fls.o(i.fls_write_byte_data) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls.o(i.fls_write_cmd) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_write_cmd) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls.o(i.fls_write_cmd) refers to drv_fls.o(i.fls_set_write) for fls_set_write + drv_fls.o(i.fls_write_cmd) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) for drv_ap_rst_trig_edge_detect + drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) refers to drv_gpio.o(.data) for .data + drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.drv_gpio_get_pull_state) refers to ap_demo.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_gpio.o(i.drv_gpio_register_ap_reset_callback) refers to drv_gpio.o(.data) for .data + drv_gpio.o(i.drv_gpio_register_callback) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.drv_gpio_set_driving_strength) refers to ap_demo.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_gpio.o(i.drv_gpio_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.drv_gpio_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_gpio.o(i.drv_gpio_set_pull_state) refers to ap_demo.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_gpio.o(i.drv_gpio_set_schmitt_trigger) refers to ap_demo.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_gpio.o(i.drv_gpio_set_slew_rate) refers to ap_demo.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_i2c_dma.o(i.drv_i2c_dma_callback) refers to drv_i2c_dma.o(.data) for .data + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_i2c_master.o(i.drv_i2c_m_enable) for drv_i2c_m_enable + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) for drv_sys_cfg_set_dma_rx_req + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_dma.o(i.drv_dma_set_transfer) for drv_dma_set_transfer + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_i2c_dma.o(i.drv_i2c_master_write_read_cmd) for drv_i2c_master_write_read_cmd + drv_i2c_dma.o(i.drv_i2c_master_write_dma) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) for drv_sys_cfg_set_dma_tx_req + drv_i2c_dma.o(i.drv_i2c_master_write_dma) refers to drv_dma.o(i.drv_dma_set_transfer) for drv_dma_set_transfer + drv_i2c_dma.o(i.drv_i2c_master_write_dma) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_i2c_dma.o(i.drv_i2c_master_write_dma) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) refers to drv_dma.o(i.drv_dma_set_callback) for drv_dma_set_callback + drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) refers to drv_i2c_dma.o(.data) for .data + drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) refers to drv_i2c_dma.o(.bss) for .bss + drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) refers to drv_i2c_dma.o(i.drv_i2c_dma_callback) for drv_i2c_dma_callback + drv_i2c_dma.o(i.drv_i2c_slave_write_dma) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_i2c_master.o(i.app_I2C1_IRQn_Handler) refers to drv_i2c_master.o(.data) for .data + drv_i2c_master.o(i.drv_i2c1_set_callback) refers to drv_i2c_master.o(.data) for .data + drv_i2c_master.o(i.drv_i2c_m_clear_it_pending_bit) refers to ap_demo.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_i2c_master.o(i.drv_i2c_m_clear_it_pending_bit) refers to drv_i2c_master.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_i2c_master.o(i.drv_i2c_m_deinit) refers to drv_i2c_master.o(i.drv_i2c_m_disable_intr) for drv_i2c_m_disable_intr + drv_i2c_master.o(i.drv_i2c_m_deinit) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + drv_i2c_master.o(i.drv_i2c_m_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_i2c_master.o(i.drv_i2c_m_enable_intr) refers to drv_i2c_master.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_i2c_master.o(i.drv_i2c_m_read_data) refers to drv_i2c_master.o(i.drv_i2c_m_get_fifo_status) for drv_i2c_m_get_fifo_status + drv_i2c_master.o(i.drv_i2c_m_set_sys_mask) refers to drv_i2c_master.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_i2c_master.o(i.drv_i2c_m_write_data) refers to drv_i2c_master.o(i.drv_i2c_m_get_fifo_status) for drv_i2c_m_get_fifo_status + drv_i2c_master.o(i.drv_i2c_master_init) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_i2c_master.o(i.drv_i2c_master_init) refers to drv_common.o(.data) for g_system_clock + drv_i2c_slave.o(i.app_I2C0_IRQn_Handler) refers to drv_i2c_slave.o(.data) for .data + drv_i2c_slave.o(i.drv_i2c0_set_callback) refers to drv_i2c_slave.o(.data) for .data + drv_i2c_slave.o(i.drv_i2c_s_clear_it_pending_bit) refers to ap_demo.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_i2c_slave.o(i.drv_i2c_s_read_data) refers to drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) for drv_i2c_s_get_fifo_status + drv_i2c_slave.o(i.drv_i2c_s_set_intr) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_i2c_slave.o(i.drv_i2c_s_set_intr) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_i2c_slave.o(i.drv_i2c_s_write_data) refers to drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) for drv_i2c_s_get_fifo_status + drv_i2c_slave.o(i.drv_i2c_slave_init) refers to drv_i2c_slave.o(i.drv_i2c_s_enable) for drv_i2c_s_enable + drv_param_init.o(i.drv_param_init_get_ccm) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_get_scld_filter_h) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_get_scld_filter_v) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_get_sclu_filter) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_set_ccm) refers to memcpya.o(.text) for __aeabi_memcpy4 + drv_param_init.o(i.drv_param_init_set_ccm) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_set_scld_filter) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_set_sclu_filter) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_p2r_filter_init) refers to drv_param_init.o(.constdata) for .constdata + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_dma.o(i.drv_dma_disenable_channel_interrupts) for drv_dma_disenable_channel_interrupts + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_master.o(i.drv_spi_m_enable_tx_dma) for drv_spi_m_enable_tx_dma + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_master.o(i.drv_spi_m_enable_rx_dma) for drv_spi_m_enable_rx_dma + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_slave.o(i.drv_spi_s_enable_tx_dma) for drv_spi_s_enable_tx_dma + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_slave.o(i.drv_spi_s_enable_rx_dma) for drv_spi_s_enable_rx_dma + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_dma.o(.bss) for .bss + drv_spi_dma.o(i.drv_spi_dma_callback) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_dma_ch6_init) refers to drv_spi_dma.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_spi_dma.o(i.drv_spi_dma_ch6_init) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_dma_init) refers to drv_spi_dma.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_spi_dma.o(i.drv_spi_dma_init) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) refers to drv_dma.o(i.drv_dma_set_callback) for drv_dma_set_callback + drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) refers to drv_spi_dma.o(.bss) for .bss + drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) refers to drv_spi_dma.o(i.drv_spi_dma_callback) for drv_spi_dma_callback + drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) refers to drv_dma.o(i.drv_dma_set_callback) for drv_dma_set_callback + drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) refers to drv_spi_dma.o(.bss) for .bss + drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) refers to drv_spi_dma.o(i.drv_spi_dma_callback) for drv_spi_dma_callback + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_spi_master.o(i.drv_spi_m_enable_rx_dma) for drv_spi_m_enable_rx_dma + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_spi_master.o(i.drv_spi_m_enable_tx_dma) for drv_spi_m_enable_tx_dma + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_dma.o(i.drv_dma_enable_channel_interrupts) for drv_dma_enable_channel_interrupts + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spim_dma_write) refers to drv_spi_master.o(i.drv_spi_m_enable_tx_dma) for drv_spi_m_enable_tx_dma + drv_spi_dma.o(i.drv_spim_dma_write) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_spi_dma.o(i.drv_spim_dma_write) refers to drv_dma.o(i.drv_dma_enable_channel_interrupts) for drv_dma_enable_channel_interrupts + drv_spi_dma.o(i.drv_spim_dma_write) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_spi_dma.o(i.drv_spim_dma_write) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spis_dma_write) refers to drv_spi_slave.o(i.drv_spi_s_enable_tx_dma) for drv_spi_s_enable_tx_dma + drv_spi_dma.o(i.drv_spis_dma_write) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_spi_dma.o(i.drv_spis_dma_write) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_spi_dma.o(i.drv_spis_dma_write) refers to drv_spi_dma.o(.bss) for .bss + drv_spi_master.o(i.app_SPIM_IRQn_Handler) refers to drv_spi_master.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_spi_master.o(i.app_SPIM_IRQn_Handler) refers to drv_spi_master.o(.data) for .data + drv_spi_master.o(i.drv_spi_m_deinit) refers to drv_spi_master.o(i.drv_spi_m_switch_sclk) for drv_spi_m_switch_sclk + drv_spi_master.o(i.drv_spi_m_disable_int) refers to drv_spi_master.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_spi_master.o(i.drv_spi_m_set_intr_callback) refers to drv_spi_master.o(.data) for .data + drv_spi_master.o(i.drv_spi_master_init) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_spi_master.o(i.drv_spi_master_init) refers to drv_common.o(.data) for g_system_clock + drv_swire.o(i.app_SWIRE_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_swire.o(i.app_SWIRE_IRQn_Handler) refers to drv_swire.o(i.drv_swire_set_int) for drv_swire_set_int + drv_swire.o(i.app_SWIRE_IRQn_Handler) refers to drv_swire.o(.data) for .data + drv_swire.o(i.drv_swire_register_callback) refers to drv_swire.o(.data) for .data + drv_swire.o(i.drv_swire_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_swire.o(i.drv_swire_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_lvl_trig) for drv_sys_cfg_sel_ap_rst_lvl_trig + drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) refers to drv_sys_cfg.o(.data) for .data + drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_lvl_trig) for drv_sys_cfg_sel_ap_rst_lvl_trig + drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) refers to drv_sys_cfg.o(.data) for .data + drv_timer.o(i.app_TIMER0_IRQn_Handler) refers to drv_timer.o(i.drv_timer_handle_interrupt) for drv_timer_handle_interrupt + drv_timer.o(i.app_TIMER1_IRQn_Handler) refers to drv_timer.o(i.drv_timer_handle_interrupt) for drv_timer_handle_interrupt + drv_timer.o(i.app_TIMER2_IRQn_Handler) refers to drv_timer.o(i.drv_timer_handle_interrupt) for drv_timer_handle_interrupt + drv_timer.o(i.app_TIMER3_IRQn_Handler) refers to drv_timer.o(i.drv_timer_handle_interrupt) for drv_timer_handle_interrupt + drv_timer.o(i.drv_timer_clear_status_flags) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_clear_status_flags) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_timer.o(i.drv_timer_enable) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_get_instance) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_get_prescaler) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_get_status) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(i.drv_timer_clear_status_flags) for drv_timer_clear_status_flags + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(i.drv_timer_set_compare_val) for drv_timer_set_compare_val + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_register_callback) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_set_compare_val) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_timer.o(i.drv_timer_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_timer.o(i.drv_timer_set_prescaler) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_set_prescaler) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_set_repeat) refers to drv_timer.o(.data) for .data + dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) refers to dcs_packet_fifo.o(.bss) for .bss + dcs_packet_fifo.o(i.dcs_packet_fifo_init) refers to dcs_packet_fifo.o(.bss) for .bss + dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) refers to dcs_packet_fifo.o(.bss) for .bss + dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) refers to dcs_packet_fifo.o(.bss) for .bss + dcs_packet_fifo.o(i.dcs_packet_get_fifo_size) refers to dcs_packet_fifo.o(.bss) for .bss + drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to ffltui.o(.text) for __aeabi_ui2f + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to fdiv.o(.text) for __aeabi_fdiv + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to fmul.o(.text) for __aeabi_fmul + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) for drv_dsi_rx_get_color_bpp + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_color_pcc) for drv_dsi_rx_get_color_pcc + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to fadd.o(.text) for __aeabi_fadd + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to cfrcmple.o(.text) for __aeabi_cfrcmple + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to f2d.o(.text) for __aeabi_f2d + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to dadd.o(.text) for __aeabi_dadd + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to dfixui.o(.text) for __aeabi_d2uiz + drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) refers to ap_demo.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_dsi_rx.o(i.drv_dsi_rx_get_phy_stopstate) refers to ap_demo.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_dsi_rx.o(i.drv_dsi_rx_phy_resistor_calibration) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_dsi_rx.o(i.drv_dsi_rx_phy_resistor_calibration) refers to drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) for drv_rx_phy_test_write_1_byte + drv_dsi_rx.o(i.drv_dsi_rx_phy_resistor_calibration) refers to drv_dsi_rx.o(i.drv_rx_phy_test_read) for drv_rx_phy_test_read + drv_dsi_rx.o(i.drv_dsi_rx_phy_resistor_calibration) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_rx.o(i.drv_dsi_rx_set_lane_swap) refers to drv_chip_info.o(i.drv_chip_info_get_info) for drv_chip_info_get_info + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_phy_common.o(i.drv_phy_get_rate_para) for drv_phy_get_rate_para + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_phy_common.o(i.drv_phy_get_calibration) for drv_phy_get_calibration + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_dsi_rx.o(i.drv_rx_phy_test_clear) for drv_rx_phy_test_clear + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) for drv_rx_phy_test_write_1_byte + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_dsi_rx.o(i.drv_rx_phy_test_write_2_byte) for drv_rx_phy_test_write_2_byte + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_chip_info.o(i.drv_chip_info_get_info) for drv_chip_info_get_info + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_dsi_rx.o(i.drv_rx_phy_test_lock) for drv_rx_phy_test_lock + drv_dsi_rx.o(i.drv_rx_phy_test_clear) refers to drv_phy_common.o(i.drv_phy_test_clear) for drv_phy_test_clear + drv_dsi_rx.o(i.drv_rx_phy_test_lock) refers to drv_phy_common.o(i.drv_phy_test_lock) for drv_phy_test_lock + drv_dsi_rx.o(i.drv_rx_phy_test_read) refers to drv_phy_common.o(i.drv_phy_test_read) for drv_phy_test_read + drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) refers to drv_phy_common.o(i.drv_phy_test_write_1_byte) for drv_phy_test_write_1_byte + drv_dsi_rx.o(i.drv_rx_phy_test_write_2_byte) refers to drv_phy_common.o(i.drv_phy_test_write_2_byte) for drv_phy_test_write_2_byte + drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dsi_tx.o(i.drv_dsi_tx_phy_resistor_calibration) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_dsi_tx.o(i.drv_dsi_tx_phy_resistor_calibration) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) for drv_tx_phy_test_write_1_byte + drv_dsi_tx.o(i.drv_dsi_tx_phy_resistor_calibration) refers to drv_dsi_tx.o(i.drv_tx_phy_test_read) for drv_tx_phy_test_read + drv_dsi_tx.o(i.drv_dsi_tx_phy_resistor_calibration) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) refers to ap_demo.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ulpsactivenot) refers to ap_demo.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_phy_common.o(i.drv_phy_get_rate_para) for drv_phy_get_rate_para + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_phy_common.o(i.drv_phy_get_pll_para) for drv_phy_get_pll_para + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_phy_common.o(i.drv_phy_get_calibration) for drv_phy_get_calibration + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_enter) for drv_tx_phy_test_enter + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_crgu.o(i.drv_crgu_set_mipi_ref_src) for drv_crgu_set_mipi_ref_src + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_crgu.o(i.drv_crgu_set_mipi_cfg_src) for drv_crgu_set_mipi_cfg_src + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_clear) for drv_tx_phy_test_clear + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) for drv_tx_phy_test_write_1_byte + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_2_byte) for drv_tx_phy_test_write_2_byte + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_code) for drv_tx_phy_test_write_code + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_exit) for drv_tx_phy_test_exit + drv_dsi_tx.o(i.drv_dsi_tx_phy_trigger) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) for drv_dsi_tx_phy_status_stopstate + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) for drv_dsi_tx_phy_status_stopstate + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_pll_lock) for drv_dsi_tx_phy_status_pll_lock + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ulpsactivenot) for drv_dsi_tx_phy_status_ulpsactivenot + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ulpsactivenot) for drv_dsi_tx_phy_status_ulpsactivenot + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) for drv_tx_phy_test_write_1_byte + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_pll_lock) for drv_dsi_tx_phy_status_pll_lock + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to drv_dsi_tx.o(i.drv_dsi_tx_version) for drv_dsi_tx_version + drv_dsi_tx.o(i.drv_dsi_tx_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dsi_tx.o(i.drv_dsi_tx_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_dsi_tx.o(i.drv_tx_phy_test_clear) refers to drv_phy_common.o(i.drv_phy_test_clear) for drv_phy_test_clear + drv_dsi_tx.o(i.drv_tx_phy_test_read) refers to drv_phy_common.o(i.drv_phy_test_read) for drv_phy_test_read + drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) refers to drv_phy_common.o(i.drv_phy_test_write_1_byte) for drv_phy_test_write_1_byte + drv_dsi_tx.o(i.drv_tx_phy_test_write_2_byte) refers to drv_phy_common.o(i.drv_phy_test_write_2_byte) for drv_phy_test_write_2_byte + drv_dsi_tx.o(i.drv_tx_phy_test_write_code) refers to drv_phy_common.o(i.drv_phy_test_write_code) for drv_phy_test_write_code + drv_lcdc.o(i.drv_lcdc_config_src_parameter) refers to drv_lcdc.o(i.drv_lcdc_config_input_size) for drv_lcdc_config_input_size + drv_lcdc.o(i.drv_lcdc_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_lcdc.o(i.drv_lcdc_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_memc.o(i.app_MEMC_IRQn_Handler) refers to drv_memc.o(i.drv_memc_get_status) for drv_memc_get_status + drv_memc.o(i.app_MEMC_IRQn_Handler) refers to drv_memc.o(i.drv_memc_clear_status) for drv_memc_clear_status + drv_memc.o(i.app_MEMC_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_memc.o(i.drv_memc_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_memc.o(i.drv_memc_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_rxbr.o(i.app_ADC_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_rxbr.o(i.app_ADC_IRQn_Handler) refers to drv_rxbr.o(.data) for .data + drv_rxbr.o(i.app_VPRE_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_rxbr.o(i.app_VPRE_IRQn_Handler) refers to drv_rxbr.o(.data) for .data + drv_rxbr.o(i.drv_rxbr_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_rxbr.o(i.drv_rxbr_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_rxbr.o(i.drv_rxbr_enable_irq) refers to drv_rxbr.o(i.__NVIC_EnableIRQ) for __NVIC_EnableIRQ + drv_rxbr.o(i.drv_rxbr_enable_irq) refers to drv_rxbr.o(i.__NVIC_DisableIRQ) for __NVIC_DisableIRQ + drv_rxbr.o(i.drv_rxbr_register_irq0_callback) refers to drv_rxbr.o(.data) for .data + drv_rxbr.o(i.drv_rxbr_register_irq1_callback) refers to drv_rxbr.o(.data) for .data + drv_rxbr.o(i.drv_rxbr_set_cmd_filter) refers to ap_demo.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_rxbr.o(i.drv_rxbr_soft_reset) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + drv_vidc.o(i.app_VIDC_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_vidc.o(i.app_VIDC_IRQn_Handler) refers to drv_vidc.o(.data) for .data + drv_vidc.o(i.drv_vidc_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_vidc.o(i.drv_vidc_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_vidc.o(i.drv_vidc_register_callback) refers to drv_vidc.o(.data) for .data + irq_redirect .o(i.ADC_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.AP_NRESET_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.DMA_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT0_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT1_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT2_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT3_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT4_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT5_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT6_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT7_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.FLSCTRL_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.HardFault_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.I2C0_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.I2C1_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.LCDC_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.MEMC_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.MIPI_RX_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.MIPI_TX_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.PWMDET_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.SPIM_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.SPIS_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.SWIRE_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.SysTick_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.TIMER0_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.TIMER1_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.TIMER2_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.TIMER3_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.UART_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.VIDC_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.VPRE_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.WDG_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.handle_init) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.handle_init) refers to drv_common.o(i.app_SysTick_Handler) for app_SysTick_Handler + irq_redirect .o(i.handle_init) refers to hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) for app_LCDC_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) for app_MIPI_RX_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) for app_MIPI_TX_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_dma.o(i.app_dma_irq_handler) for app_dma_irq_handler + irq_redirect .o(i.handle_init) refers to norflash.o(i.app_fls_ctrl_Handler) for app_fls_ctrl_Handler + irq_redirect .o(i.handle_init) refers to drv_i2c_slave.o(i.app_I2C0_IRQn_Handler) for app_I2C0_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_i2c_master.o(i.app_I2C1_IRQn_Handler) for app_I2C1_IRQn_Handler + irq_redirect .o(i.handle_init) refers to hal_spi_slave.o(i.app_SPIS_IRQn_Handler) for app_SPIS_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_spi_master.o(i.app_SPIM_IRQn_Handler) for app_SPIM_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_rxbr.o(i.app_VPRE_IRQn_Handler) for app_VPRE_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_rxbr.o(i.app_ADC_IRQn_Handler) for app_ADC_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_vidc.o(i.app_VIDC_IRQn_Handler) for app_VIDC_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_memc.o(i.app_MEMC_IRQn_Handler) for app_MEMC_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_timer.o(i.app_TIMER0_IRQn_Handler) for app_TIMER0_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_timer.o(i.app_TIMER1_IRQn_Handler) for app_TIMER1_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_timer.o(i.app_TIMER2_IRQn_Handler) for app_TIMER2_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_timer.o(i.app_TIMER3_IRQn_Handler) for app_TIMER3_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_wdg.o(i.app_WDG_IRQn_Handler) for app_WDG_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_uart.o(i.app_UART_IRQn_Handler) for app_UART_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_pwm.o(i.app_PWMDET_IRQn_Handler) for app_PWMDET_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_swire.o(i.app_SWIRE_IRQn_Handler) for app_SWIRE_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) for app_AP_NRESET_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) for app_EXTI_INT0_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) for app_EXTI_INT1_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) for app_EXTI_INT2_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) for app_EXTI_INT3_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) for app_EXTI_INT4_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) for app_EXTI_INT5_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) for app_EXTI_INT6_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) for app_EXTI_INT7_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_common.o(i.app_HardFault_Handler) for app_HardFault_Handler + drv_efuse.o(i.drv_efuse_enter_inactive) refers to drv_efuse.o(i.drv_efuse_int_enable) for drv_efuse_int_enable + drv_efuse.o(i.drv_efuse_read) refers to drv_efuse.o(i.drv_efuse_read_req) for drv_efuse_read_req + drv_efuse.o(i.drv_efuse_write) refers to drv_efuse.o(i.drv_efuse_write_req) for drv_efuse_write_req + drv_phy_common.o(i.drv_phy_enable_calibration) refers to drv_phy_common.o(.data) for .data + drv_phy_common.o(i.drv_phy_get_calibration) refers to drv_chip_info.o(i.drv_chip_info_get_info) for drv_chip_info_get_info + drv_phy_common.o(i.drv_phy_get_calibration) refers to drv_efuse.o(i.drv_efuse_read) for drv_efuse_read + drv_phy_common.o(i.drv_phy_get_calibration) refers to drv_phy_common.o(.data) for .data + drv_phy_common.o(i.drv_phy_get_pll_para) refers to drv_phy_common.o(.constdata) for .constdata + drv_phy_common.o(i.drv_phy_get_rate_para) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_phy_common.o(i.drv_phy_get_rate_para) refers to drv_phy_common.o(.constdata) for .constdata + drv_phy_common.o(i.drv_phy_test_write_1_byte) refers to drv_phy_common.o(i.drv_phy_test_write_code) for drv_phy_test_write_code + drv_phy_common.o(i.drv_phy_test_write_1_byte) refers to drv_phy_common.o(i.drv_phy_test_write_data) for drv_phy_test_write_data + drv_phy_common.o(i.drv_phy_test_write_2_byte) refers to drv_phy_common.o(i.drv_phy_test_write_code) for drv_phy_test_write_code + drv_phy_common.o(i.drv_phy_test_write_2_byte) refers to drv_phy_common.o(i.drv_phy_test_write_data) for drv_phy_test_write_data + drv_chip_info.o(i.drv_chip_info_get_info) refers to drv_chip_info.o(.data) for .data + drv_chip_info.o(i.drv_chip_info_init) refers to drv_efuse.o(i.drv_efuse_enter_inactive) for drv_efuse_enter_inactive + drv_chip_info.o(i.drv_chip_info_init) refers to drv_efuse.o(i.drv_efuse_read) for drv_efuse_read + drv_chip_info.o(i.drv_chip_info_init) refers to drv_chip_info.o(.data) for .data + drv_chip_info.o(i.drv_chip_rx_info_check) refers to printfa.o(i.__0printf) for __2printf + drv_chip_info.o(i.drv_chip_rx_info_check) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_chip_info.o(i.drv_chip_rx_info_check) refers to drv_chip_info.o(.data) for .data + drv_dsc_dec.o(i.drv_dsc_dec_enable) refers to drv_efuse.o(i.drv_efuse_enter_inactive) for drv_efuse_enter_inactive + drv_dsc_dec.o(i.drv_dsc_dec_enable) refers to drv_efuse.o(i.drv_efuse_read) for drv_efuse_read + drv_dsc_dec.o(i.drv_dsc_dec_enable) refers to printfa.o(i.__0printf) for __2printf + tau_log.o(i.LOG_printf) refers to printfa.o(i.__0vsprintf) for vsprintf + tau_log.o(i.LOG_printf) refers to printfa.o(i.__0printf) for __2printf + tau_log.o(i.LOG_printf) refers to tau_log.o(.bss) for .bss + tau_log.o(i.fgetc) refers to hal_uart.o(i.hal_uart_receive_blocking) for hal_uart_receive_blocking + tau_log.o(i.fputc) refers to hal_uart.o(i.hal_uart_transmit_blocking) for hal_uart_transmit_blocking + app_tp_enc.o(i.EncryptCheck) refers to app_tp_enc.o(.data) for .data + hal_spi_slave.o(i.app_SPIS_IRQn_Handler) refers to ap_demo.o(i.__ARM_common_switch8) for __ARM_common_switch8 + hal_spi_slave.o(i.app_SPIS_IRQn_Handler) refers to hal_spi_slave.o(i.__NVIC_SetPriority) for __NVIC_SetPriority + hal_spi_slave.o(i.app_SPIS_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_spi_slave.o(i.app_SPIS_IRQn_Handler) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_s_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_spi_slave.o(i.hal_spi_s_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_init_input) for hal_gpio_init_input + hal_spi_slave.o(i.hal_spi_s_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + hal_spi_slave.o(i.hal_spi_slave_auto_transfer_abort) refers to drv_spi_dma.o(i.drv_spi_abort_dma) for drv_spi_abort_dma + hal_spi_slave.o(i.hal_spi_slave_auto_transfer_start) refers to drv_dma.o(i.drv_dma_enable_cycle) for drv_dma_enable_cycle + hal_spi_slave.o(i.hal_spi_slave_auto_transfer_start) refers to drv_spi_dma.o(i.drv_spis_dma_write) for drv_spis_dma_write + hal_spi_slave.o(i.hal_spi_slave_auto_transfer_start) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_deinit) refers to drv_spi_slave.o(i.drv_spi_s_deinit) for drv_spi_s_deinit + hal_spi_slave.o(i.hal_spi_slave_enable) refers to drv_spi_slave.o(i.drv_spi_s_enable_int) for drv_spi_s_enable_int + hal_spi_slave.o(i.hal_spi_slave_enable) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_spi_slave.o(i.hal_spi_slave_enable) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_gpio_init) refers to drv_spi_slave.o(i.drv_spi_s_gpio_init) for drv_spi_s_gpio_init + hal_spi_slave.o(i.hal_spi_slave_init) refers to hal_spi_slave.o(i.hal_spi_slave_gpio_init) for hal_spi_slave_gpio_init + hal_spi_slave.o(i.hal_spi_slave_init) refers to drv_spi_slave.o(i.drv_spi_slave_init) for drv_spi_slave_init + hal_spi_slave.o(i.hal_spi_slave_init) refers to drv_spi_dma.o(i.drv_spi_dma_init) for drv_spi_dma_init + hal_spi_slave.o(i.hal_spi_slave_init) refers to drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) for drv_spi_set_dma_irq_callback + hal_spi_slave.o(i.hal_spi_slave_init) refers to drv_spi_slave.o(i.drv_spi_s_enable_tx_dma) for drv_spi_s_enable_tx_dma + hal_spi_slave.o(i.hal_spi_slave_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) for drv_sys_cfg_set_dma_tx_req + hal_spi_slave.o(i.hal_spi_slave_init) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_read_data) refers to drv_spi_slave.o(i.drv_spi_s_read_data) for drv_spi_s_read_data + hal_spi_slave.o(i.hal_spi_slave_register_callback) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_reset_tx) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_set_auto_rx_buffer) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_set_auto_tx_buffer) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_write_data) refers to drv_spi_slave.o(i.drv_spi_s_write_data) for drv_spi_s_write_data + norflash.o(i.app_fls_ctrl_Handler) refers to drv_fls.o(i.fls_clr_interrupt_flag) for fls_clr_interrupt_flag + norflash.o(i.app_fls_ctrl_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + norflash.o(i.app_fls_ctrl_Handler) refers to norflash.o(.data) for .data + norflash.o(i.norflash_best_cfg_init) refers to drv_fls.o(i.fls_spi_init) for fls_spi_init + norflash.o(i.norflash_best_cfg_init) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_check_id) refers to norflash.o(i.norflash_read_id) for norflash_read_id + norflash.o(i.norflash_check_id) refers to tau_delay.o(i.delayUs) for delayUs + norflash.o(i.norflash_check_id) refers to norflash.o(.data) for .data + norflash.o(i.norflash_dma_callback) refers to norflash.o(.data) for .data + norflash.o(i.norflash_dma_read) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + norflash.o(i.norflash_dma_read) refers to drv_fls_dma.o(i.fls_transfer_create_handle_dma) for fls_transfer_create_handle_dma + norflash.o(i.norflash_dma_read) refers to drv_fls_dma.o(i.fls_dma_read_prepare) for fls_dma_read_prepare + norflash.o(i.norflash_dma_read) refers to drv_fls_dma.o(i.fls_transfer_dma) for fls_transfer_dma + norflash.o(i.norflash_dma_read) refers to drv_fls_dma.o(i.fls_dma_disable) for fls_dma_disable + norflash.o(i.norflash_dma_read) refers to norflash.o(.data) for .data + norflash.o(i.norflash_dma_read) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_dma_read) refers to norflash.o(i.norflash_dma_callback) for norflash_dma_callback + norflash.o(i.norflash_dma_write) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + norflash.o(i.norflash_dma_write) refers to drv_fls_dma.o(i.fls_transfer_create_handle_dma) for fls_transfer_create_handle_dma + norflash.o(i.norflash_dma_write) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_dma_write) refers to norflash.o(i.norflash_switch_fls_spi) for norflash_switch_fls_spi + norflash.o(i.norflash_dma_write) refers to drv_fls_dma.o(i.fls_dma_write_prepare) for fls_dma_write_prepare + norflash.o(i.norflash_dma_write) refers to drv_fls_dma.o(i.fls_transfer_dma) for fls_transfer_dma + norflash.o(i.norflash_dma_write) refers to drv_fls_dma.o(i.fls_dma_disable) for fls_dma_disable + norflash.o(i.norflash_dma_write) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_dma_write) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_dma_write) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_dma_write) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_dma_write) refers to norflash.o(i.norflash_dma_callback) for norflash_dma_callback + norflash.o(i.norflash_dma_write) refers to norflash.o(.data) for .data + norflash.o(i.norflash_dual_read) refers to drv_fls.o(i.fls_ddat_enable) for fls_ddat_enable + norflash.o(i.norflash_dual_read) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_dual_read) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_dual_write) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_dual_write) refers to norflash.o(i.norflash_switch_fls_spi) for norflash_switch_fls_spi + norflash.o(i.norflash_dual_write) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_dual_write) refers to drv_fls.o(i.fls_ddat_enable) for fls_ddat_enable + norflash.o(i.norflash_dual_write) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_dual_write) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_en4b) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_en4b) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + norflash.o(i.norflash_en4b) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_en4b) refers to norflash.o(i.norflash_read_config_reg) for norflash_read_config_reg + norflash.o(i.norflash_en4b) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_en_quad) refers to norflash.o(i.norflash_en_quad_check) for norflash_en_quad_check + norflash.o(i.norflash_en_quad) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_en_quad) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_en_quad) refers to drv_fls.o(i.fls_busy_pending) for fls_busy_pending + norflash.o(i.norflash_en_quad) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_en_quad_check) refers to norflash.o(i.norflash_get_dual_hstatus) for norflash_get_dual_hstatus + norflash.o(i.norflash_en_quad_check) refers to norflash.o(i.norflash_get_hstatus) for norflash_get_hstatus + norflash.o(i.norflash_en_quad_check) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_en_quad_check) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_erase_block) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_erase_block) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_erase_block) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_erase_block) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_erase_chip) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_erase_chip) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + norflash.o(i.norflash_erase_chip) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_erase_sector) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_erase_sector) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_erase_sector) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_erase_sector) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_ex4b) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_ex4b) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + norflash.o(i.norflash_ex4b) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_ex4b) refers to norflash.o(i.norflash_read_config_reg) for norflash_read_config_reg + norflash.o(i.norflash_ex4b) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_exit_quad) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_exit_quad) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_exit_quad) refers to norflash.o(i.norflash_en_quad_check) for norflash_en_quad_check + norflash.o(i.norflash_exit_quad) refers to drv_fls.o(i.fls_busy_pending) for fls_busy_pending + norflash.o(i.norflash_exit_quad) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_get_dual_hstatus) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_get_dual_hstatus) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_get_dual_hstatus) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_get_hstatus) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_get_hstatus) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_get_hstatus) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_get_status) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_get_status) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_get_status) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_init) refers to drv_fls.o(i.fls_get_default_spi_config) for fls_get_default_spi_config + norflash.o(i.norflash_init) refers to drv_fls.o(i.fls_get_default_fls_config) for fls_get_default_fls_config + norflash.o(i.norflash_init) refers to drv_fls.o(i.fls_get_default_tuning) for fls_get_default_tuning + norflash.o(i.norflash_init) refers to drv_fls.o(i.fls_init) for fls_init + norflash.o(i.norflash_init) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_init) refers to drv_fls.o(.data) for g_fls_tuning + norflash.o(i.norflash_quad_read) refers to drv_fls.o(i.fls_qdat_enable) for fls_qdat_enable + norflash.o(i.norflash_quad_read) refers to drv_fls.o(i.fls_qadr_enable) for fls_qadr_enable + norflash.o(i.norflash_quad_read) refers to drv_fls.o(i.fls_qcmd_enable) for fls_qcmd_enable + norflash.o(i.norflash_quad_read) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_quad_read) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_quad_write) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_quad_write) refers to norflash.o(i.norflash_switch_fls_spi) for norflash_switch_fls_spi + norflash.o(i.norflash_quad_write) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_quad_write) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_quad_write) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_quad_write) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_read) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_read_config_reg) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_read_id) refers to drv_fls.o(i.fls_read_cmd) for fls_read_cmd + norflash.o(i.norflash_read_uid) refers to memseta.o(.text) for __aeabi_memclr4 + norflash.o(i.norflash_read_uid) refers to drv_fls.o(i.fls_read_cmd) for fls_read_cmd + norflash.o(i.norflash_read_uid) refers to memcpya.o(.text) for __aeabi_memcpy + norflash.o(i.norflash_set_best_cfg) refers to memseta.o(.text) for __aeabi_memclr4 + norflash.o(i.norflash_set_best_read_cfg) refers to norflash.o(i.norflash_en_quad) for norflash_en_quad + norflash.o(i.norflash_set_best_read_cfg) refers to norflash.o(.data) for .data + norflash.o(i.norflash_set_best_read_cfg) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_set_best_write_cfg) refers to norflash.o(i.norflash_en_quad) for norflash_en_quad + norflash.o(i.norflash_set_best_write_cfg) refers to norflash.o(.data) for .data + norflash.o(i.norflash_set_best_write_cfg) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_switch_fls_spi) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_switch_fls_spi) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_switch_fls_spi) refers to drv_fls.o(i.fls_ddat_enable) for fls_ddat_enable + norflash.o(i.norflash_switch_fls_spi) refers to drv_fls.o(i.fls_qdat_enable) for fls_qdat_enable + norflash.o(i.norflash_switch_fls_spi) refers to drv_fls.o(i.fls_qadr_enable) for fls_qadr_enable + norflash.o(i.norflash_write) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_write) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_write) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_write) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_write_disable) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + norflash.o(i.norflash_write_disable) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_write_disable) refers to norflash.o(.data) for .data + norflash.o(i.norflash_write_disable) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_write_enable) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + norflash.o(i.norflash_write_enable) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_write_enable) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_write_enable) refers to norflash.o(.data) for .data + norflash.o(i.norflash_write_endian_scr) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_write_endian_scr) refers to norflash.o(i.norflash_big_end_enable) for norflash_big_end_enable + norflash.o(i.norflash_write_endian_scr) refers to drv_fls.o(i.fls_en_scr) for fls_en_scr + norflash.o(i.norflash_write_endian_scr) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_write_endian_scr) refers to norflash.o(i.norflash_big_end_clear) for norflash_big_end_clear + norflash.o(i.norflash_write_endian_scr) refers to drv_fls.o(i.fls_scr_clear) for fls_scr_clear + norflash.o(i.norflash_write_endian_scr) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_write_endian_scr) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + drv_fls_dma.o(i.fls_abort_dma) refers to drv_dma.o(i.drv_dma_abort_transfer) for drv_dma_abort_transfer + drv_fls_dma.o(i.fls_abort_dma) refers to drv_fls_dma.o(i.fls_dma_disable) for fls_dma_disable + drv_fls_dma.o(i.fls_dma_read_prepare) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls_dma.o(i.fls_dma_read_prepare) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls_dma.o(i.fls_dma_read_prepare) refers to drv_fls.o(i.fls_set_read) for fls_set_read + drv_fls_dma.o(i.fls_dma_read_prepare) refers to drv_fls_dma.o(i.fls_dma_enable) for fls_dma_enable + drv_fls_dma.o(i.fls_dma_read_prepare) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls_dma.o(i.fls_dma_write_prepare) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls_dma.o(i.fls_dma_write_prepare) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls_dma.o(i.fls_dma_write_prepare) refers to drv_fls.o(i.fls_set_write) for fls_set_write + drv_fls_dma.o(i.fls_dma_write_prepare) refers to drv_fls_dma.o(i.fls_dma_enable) for fls_dma_enable + drv_fls_dma.o(i.fls_dma_write_prepare) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls_dma.o(i.fls_read_dmacallback) refers to drv_dma.o(i.drv_dma_abort_transfer) for drv_dma_abort_transfer + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to memseta.o(.text) for __aeabi_memclr4 + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to drv_dma.o(i.drv_dma_init) for drv_dma_init + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to drv_dma.o(i.drv_dma_set_callback) for drv_dma_set_callback + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to drv_fls_dma.o(.data) for .data + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to drv_fls_dma.o(i.fls_read_dmacallback) for fls_read_dmacallback + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to drv_fls_dma.o(i.fls_write_dmacallback) for fls_write_dmacallback + drv_fls_dma.o(i.fls_transfer_dma) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_fls_dma.o(i.fls_transfer_dma) refers to drv_dma.o(i.drv_dma_start_transfer) for drv_dma_start_transfer + drv_fls_dma.o(i.fls_transfer_get_receive_count_dma) refers to drv_dma.o(i.drv_dma_get_remaining_bytes) for drv_dma_get_remaining_bytes + drv_fls_dma.o(i.fls_write_dmacallback) refers to drv_dma.o(i.drv_dma_abort_transfer) for drv_dma_abort_transfer + drv_pwm.o(i.app_PWMDET_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_pwm.o(i.app_PWMDET_IRQn_Handler) refers to drv_pwm.o(.data) for .data + drv_pwm.o(i.drv_pwm_in_register_callback) refers to drv_pwm.o(.data) for .data + drv_pwm.o(i.drv_pwm_in_set_sys_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_pwm.o(i.drv_pwm_in_set_sys_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_spi_slave.o(i.drv_spi_s_deinit) refers to drv_spi_slave.o(i.drv_spi_s_switch_sclk) for drv_spi_s_switch_sclk + drv_uart.o(i.UART0_IRQ_Handle) refers to drv_uart.o(i.UART_TransferHandleIRQ) for UART_TransferHandleIRQ + drv_uart.o(i.UART0_IRQ_Handle) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_uart.o(i.UART0_IRQ_Handle) refers to drv_uart.o(.data) for .data + drv_uart.o(i.UART_AbortReceive) refers to drv_uart.o(i.UART_Disable_IT) for UART_Disable_IT + drv_uart.o(i.UART_AbortReceive) refers to drv_uart.o(i.UART_ResetRxFIFO) for UART_ResetRxFIFO + drv_uart.o(i.UART_AbortSend) refers to drv_uart.o(i.UART_Disable_IT) for UART_Disable_IT + drv_uart.o(i.UART_AbortSend) refers to drv_uart.o(i.UART_ResetTxFIFO) for UART_ResetTxFIFO + drv_uart.o(i.UART_Deinit) refers to drv_uart.o(i.UART_SwitchSCLK) for UART_SwitchSCLK + drv_uart.o(i.UART_Disable_IT) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_Disable_IT) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_uart.o(i.UART_Disable_IT) refers to drv_uart.o(.constdata) for .constdata + drv_uart.o(i.UART_EnableDma) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) for drv_sys_cfg_set_dma_rx_req + drv_uart.o(i.UART_EnableDma) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) for drv_sys_cfg_set_dma_tx_req + drv_uart.o(i.UART_Enable_IT) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_Enable_IT) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_uart.o(i.UART_GetDefaultConfig) refers to memseta.o(.text) for __aeabi_memclr4 + drv_uart.o(i.UART_GetDefaultConfig) refers to drv_common.o(.data) for g_system_clock + drv_uart.o(i.UART_GetFIFO_Ctrl) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_GetFIFO_Ctrl) refers to drv_uart.o(.data) for .data + drv_uart.o(i.UART_ResetRxFIFO) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_ResetRxFIFO) refers to drv_uart.o(.data) for .data + drv_uart.o(i.UART_ResetTxFIFO) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_ResetTxFIFO) refers to drv_uart.o(.data) for .data + drv_uart.o(i.UART_SetBaudRate) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_uart.o(i.UART_SwitchSCLK) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_uart.o(i.UART_TransferCreateHandle) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_TransferCreateHandle) refers to memseta.o(.text) for __aeabi_memclr4 + drv_uart.o(i.UART_TransferCreateHandle) refers to drv_uart.o(i.UART_Enable_IT) for UART_Enable_IT + drv_uart.o(i.UART_TransferCreateHandle) refers to drv_uart.o(.data) for .data + drv_uart.o(i.UART_TransferHandleIRQ) refers to drv_uart.o(i.UART_ResetRxFIFO) for UART_ResetRxFIFO + drv_uart.o(i.UART_init) refers to drv_uart.o(i.UART_DisableDma) for UART_DisableDma + drv_uart.o(i.UART_init) refers to drv_uart.o(i.UART_SwitchSCLK) for UART_SwitchSCLK + drv_uart.o(i.UART_init) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_init) refers to drv_uart.o(i.UART_SetBaudRate) for UART_SetBaudRate + drv_uart.o(i.UART_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_uart.o(i.UART_init) refers to drv_uart.o(.data) for .data + drv_uart.o(i.app_UART_IRQn_Handler) refers to drv_uart.o(i.UART0_IRQ_Handle) for UART0_IRQ_Handle + drv_uart_dma.o(i.UART_DMAInit) refers to memseta.o(.text) for __aeabi_memclr4 + drv_uart_dma.o(i.UART_DMAInit) refers to drv_dma.o(i.drv_dma_init) for drv_dma_init + drv_uart_dma.o(i.UART_TransferAbortReceiveDMA) refers to drv_dma.o(i.drv_dma_abort_transfer) for drv_dma_abort_transfer + drv_uart_dma.o(i.UART_TransferAbortSendDMA) refers to drv_dma.o(i.drv_dma_abort_transfer) for drv_dma_abort_transfer + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to memseta.o(.text) for __aeabi_memclr4 + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart.o(i.UART_EnableDma) for UART_EnableDma + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart_dma.o(i.UART_DMAInit) for UART_DMAInit + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_dma.o(i.drv_dma_set_callback) for drv_dma_set_callback + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart_dma.o(.data) for .data + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart_dma.o(i.UART_TransferReceiveDMACallback) for UART_TransferReceiveDMACallback + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart_dma.o(i.UART_TransferSendDMACallback) for UART_TransferSendDMACallback + drv_uart_dma.o(i.UART_TransferGetReceiveCountDMA) refers to drv_dma.o(i.drv_dma_get_remaining_bytes) for drv_dma_get_remaining_bytes + drv_uart_dma.o(i.UART_TransferReceiveDMA) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_uart_dma.o(i.UART_TransferReceiveDMA) refers to drv_uart.o(i.UART_EnableDma) for UART_EnableDma + drv_uart_dma.o(i.UART_TransferReceiveDMA) refers to drv_dma.o(i.drv_dma_start_transfer) for drv_dma_start_transfer + drv_uart_dma.o(i.UART_TransferSendDMA) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_uart_dma.o(i.UART_TransferSendDMA) refers to drv_uart.o(i.UART_EnableDma) for UART_EnableDma + drv_uart_dma.o(i.UART_TransferSendDMA) refers to drv_dma.o(i.drv_dma_start_transfer) for drv_dma_start_transfer + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_wdg.o(i.drv_wdg_set_int) for drv_wdg_set_int + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_wdg.o(i.drv_wdg_clear_counter) for drv_wdg_clear_counter + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_wdg.o(i.drv_wdg_read_edge_flag) for drv_wdg_read_edge_flag + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_wdg.o(i.drv_wdg_clear_edge_flag) for drv_wdg_clear_edge_flag + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_wdg.o(.data) for .data + drv_wdg.o(i.drv_wdg_register_callback) refers to drv_wdg.o(.data) for .data + drv_wdg.o(i.drv_wdg_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_wdg.o(i.drv_wdg_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_wdg.o(i.drv_wdg_set_repeat) refers to drv_wdg.o(.data) for .data + ceil.o(i.__softfp_ceil) refers (Special) to iusefp.o(.text) for __I$use$fp + ceil.o(i.__softfp_ceil) refers to ceil.o(i.ceil) for ceil + ceil.o(i.ceil) refers (Special) to iusefp.o(.text) for __I$use$fp + ceil.o(i.ceil) refers to dadd.o(.text) for __aeabi_dadd + ceil.o(i.ceil) refers to cdrcmple.o(.text) for __aeabi_cdrcmple + sqrt.o(i.__softfp_sqrt) refers (Special) to iusefp.o(.text) for __I$use$fp + sqrt.o(i.__softfp_sqrt) refers to dsqrt.o(.text) for _dsqrt + sqrt.o(i.__softfp_sqrt) refers to errno.o(i.__set_errno) for __set_errno + sqrt.o(i.sqrt) refers (Special) to iusefp.o(.text) for __I$use$fp + sqrt.o(i.sqrt) refers to dsqrt.o(.text) for _dsqrt + sqrt.o(i.sqrt) refers to errno.o(i.__set_errno) for __set_errno + sqrt_x.o(i.____softfp_sqrt$lsc) refers (Special) to iusefp.o(.text) for __I$use$fp + sqrt_x.o(i.____softfp_sqrt$lsc) refers to cdcmple.o(.text) for __aeabi_cdcmple + sqrt_x.o(i.____softfp_sqrt$lsc) refers to errno.o(i.__set_errno) for __set_errno + sqrt_x.o(i.____softfp_sqrt$lsc) refers to dsqrt.o(.text) for _dsqrt + sqrt_x.o(i.__sqrt$lsc) refers (Special) to iusefp.o(.text) for __I$use$fp + sqrt_x.o(i.__sqrt$lsc) refers to cdcmple.o(.text) for __aeabi_cdcmple + sqrt_x.o(i.__sqrt$lsc) refers to errno.o(i.__set_errno) for __set_errno + sqrt_x.o(i.__sqrt$lsc) refers to dsqrt.o(.text) for _dsqrt + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry10a.o(.ARM.Collect$$$$0000000D) for __rt_final_cpp + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry11a.o(.ARM.Collect$$$$0000000F) for __rt_final_exit + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry7b.o(.ARM.Collect$$$$00000008) for _main_clock + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry8b.o(.ARM.Collect$$$$0000000A) for _main_cpp_init + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry9a.o(.ARM.Collect$$$$0000000B) for _main_init + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry5.o(.ARM.Collect$$$$00000004) for _main_scatterload + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry2.o(.ARM.Collect$$$$00000001) for _main_stk + idiv.o(.text) refers to uidiv.o(.text) for __aeabi_uidivmod + printfb.o(i.__0fprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0fprintf$bare) refers to tau_log.o(i.fputc) for fputc + printfb.o(i.__0printf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0printf$bare) refers to tau_log.o(i.fputc) for fputc + printfb.o(i.__0printf$bare) refers to stdout.o(.data) for __stdout + printfb.o(i.__0snprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0snprintf$bare) refers to printfb.o(i._snputc) for _snputc + printfb.o(i.__0sprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0sprintf$bare) refers to printfb.o(i._sputc) for _sputc + printfb.o(i.__0vfprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vfprintf$bare) refers to tau_log.o(i.fputc) for fputc + printfb.o(i.__0vprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vprintf$bare) refers to tau_log.o(i.fputc) for fputc + printfb.o(i.__0vprintf$bare) refers to stdout.o(.data) for __stdout + printfb.o(i.__0vsnprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vsnprintf$bare) refers to printfb.o(i._snputc) for _snputc + printfb.o(i.__0vsprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vsprintf$bare) refers to printfb.o(i._sputc) for _sputc + printf0.o(i.__0fprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0fprintf$0) refers to tau_log.o(i.fputc) for fputc + printf0.o(i.__0printf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0printf$0) refers to tau_log.o(i.fputc) for fputc + printf0.o(i.__0printf$0) refers to stdout.o(.data) for __stdout + printf0.o(i.__0snprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0snprintf$0) refers to printf0.o(i._snputc) for _snputc + printf0.o(i.__0sprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0sprintf$0) refers to printf0.o(i._sputc) for _sputc + printf0.o(i.__0vfprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vfprintf$0) refers to tau_log.o(i.fputc) for fputc + printf0.o(i.__0vprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vprintf$0) refers to tau_log.o(i.fputc) for fputc + printf0.o(i.__0vprintf$0) refers to stdout.o(.data) for __stdout + printf0.o(i.__0vsnprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vsnprintf$0) refers to printf0.o(i._snputc) for _snputc + printf0.o(i.__0vsprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vsprintf$0) refers to printf0.o(i._sputc) for _sputc + printf1.o(i.__0fprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0fprintf$1) refers to tau_log.o(i.fputc) for fputc + printf1.o(i.__0printf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0printf$1) refers to tau_log.o(i.fputc) for fputc + printf1.o(i.__0printf$1) refers to stdout.o(.data) for __stdout + printf1.o(i.__0snprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0snprintf$1) refers to printf1.o(i._snputc) for _snputc + printf1.o(i.__0sprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0sprintf$1) refers to printf1.o(i._sputc) for _sputc + printf1.o(i.__0vfprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vfprintf$1) refers to tau_log.o(i.fputc) for fputc + printf1.o(i.__0vprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vprintf$1) refers to tau_log.o(i.fputc) for fputc + printf1.o(i.__0vprintf$1) refers to stdout.o(.data) for __stdout + printf1.o(i.__0vsnprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vsnprintf$1) refers to printf1.o(i._snputc) for _snputc + printf1.o(i.__0vsprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vsprintf$1) refers to printf1.o(i._sputc) for _sputc + printf1.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printf2.o(i.__0fprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0fprintf$2) refers to tau_log.o(i.fputc) for fputc + printf2.o(i.__0printf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0printf$2) refers to tau_log.o(i.fputc) for fputc + printf2.o(i.__0printf$2) refers to stdout.o(.data) for __stdout + printf2.o(i.__0snprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0snprintf$2) refers to printf2.o(i._snputc) for _snputc + printf2.o(i.__0sprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0sprintf$2) refers to printf2.o(i._sputc) for _sputc + printf2.o(i.__0vfprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vfprintf$2) refers to tau_log.o(i.fputc) for fputc + printf2.o(i.__0vprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vprintf$2) refers to tau_log.o(i.fputc) for fputc + printf2.o(i.__0vprintf$2) refers to stdout.o(.data) for __stdout + printf2.o(i.__0vsnprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vsnprintf$2) refers to printf2.o(i._snputc) for _snputc + printf2.o(i.__0vsprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vsprintf$2) refers to printf2.o(i._sputc) for _sputc + printf3.o(i.__0fprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0fprintf$3) refers to tau_log.o(i.fputc) for fputc + printf3.o(i.__0printf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0printf$3) refers to tau_log.o(i.fputc) for fputc + printf3.o(i.__0printf$3) refers to stdout.o(.data) for __stdout + printf3.o(i.__0snprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0snprintf$3) refers to printf3.o(i._snputc) for _snputc + printf3.o(i.__0sprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0sprintf$3) refers to printf3.o(i._sputc) for _sputc + printf3.o(i.__0vfprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vfprintf$3) refers to tau_log.o(i.fputc) for fputc + printf3.o(i.__0vprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vprintf$3) refers to tau_log.o(i.fputc) for fputc + printf3.o(i.__0vprintf$3) refers to stdout.o(.data) for __stdout + printf3.o(i.__0vsnprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vsnprintf$3) refers to printf3.o(i._snputc) for _snputc + printf3.o(i.__0vsprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vsprintf$3) refers to printf3.o(i._sputc) for _sputc + printf3.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printf4.o(i.__0fprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0fprintf$4) refers to tau_log.o(i.fputc) for fputc + printf4.o(i.__0printf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0printf$4) refers to tau_log.o(i.fputc) for fputc + printf4.o(i.__0printf$4) refers to stdout.o(.data) for __stdout + printf4.o(i.__0snprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0snprintf$4) refers to printf4.o(i._snputc) for _snputc + printf4.o(i.__0sprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0sprintf$4) refers to printf4.o(i._sputc) for _sputc + printf4.o(i.__0vfprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vfprintf$4) refers to tau_log.o(i.fputc) for fputc + printf4.o(i.__0vprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vprintf$4) refers to tau_log.o(i.fputc) for fputc + printf4.o(i.__0vprintf$4) refers to stdout.o(.data) for __stdout + printf4.o(i.__0vsnprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vsnprintf$4) refers to printf4.o(i._snputc) for _snputc + printf4.o(i.__0vsprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vsprintf$4) refers to printf4.o(i._sputc) for _sputc + printf4.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printf5.o(i.__0fprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0fprintf$5) refers to tau_log.o(i.fputc) for fputc + printf5.o(i.__0printf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0printf$5) refers to tau_log.o(i.fputc) for fputc + printf5.o(i.__0printf$5) refers to stdout.o(.data) for __stdout + printf5.o(i.__0snprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0snprintf$5) refers to printf5.o(i._snputc) for _snputc + printf5.o(i.__0sprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0sprintf$5) refers to printf5.o(i._sputc) for _sputc + printf5.o(i.__0vfprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vfprintf$5) refers to tau_log.o(i.fputc) for fputc + printf5.o(i.__0vprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vprintf$5) refers to tau_log.o(i.fputc) for fputc + printf5.o(i.__0vprintf$5) refers to stdout.o(.data) for __stdout + printf5.o(i.__0vsnprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vsnprintf$5) refers to printf5.o(i._snputc) for _snputc + printf5.o(i.__0vsprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vsprintf$5) refers to printf5.o(i._sputc) for _sputc + printf5.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printf6.o(i.__0fprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0fprintf$6) refers to tau_log.o(i.fputc) for fputc + printf6.o(i.__0printf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0printf$6) refers to tau_log.o(i.fputc) for fputc + printf6.o(i.__0printf$6) refers to stdout.o(.data) for __stdout + printf6.o(i.__0snprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0snprintf$6) refers to printf6.o(i._snputc) for _snputc + printf6.o(i.__0sprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0sprintf$6) refers to printf6.o(i._sputc) for _sputc + printf6.o(i.__0vfprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vfprintf$6) refers to tau_log.o(i.fputc) for fputc + printf6.o(i.__0vprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vprintf$6) refers to tau_log.o(i.fputc) for fputc + printf6.o(i.__0vprintf$6) refers to stdout.o(.data) for __stdout + printf6.o(i.__0vsnprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vsnprintf$6) refers to printf6.o(i._snputc) for _snputc + printf6.o(i.__0vsprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vsprintf$6) refers to printf6.o(i._sputc) for _sputc + printf6.o(i._printf_core) refers to printf6.o(i._printf_pre_padding) for _printf_pre_padding + printf6.o(i._printf_core) refers to printf6.o(i._printf_post_padding) for _printf_post_padding + printf6.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printf7.o(i.__0fprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0fprintf$7) refers to tau_log.o(i.fputc) for fputc + printf7.o(i.__0printf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0printf$7) refers to tau_log.o(i.fputc) for fputc + printf7.o(i.__0printf$7) refers to stdout.o(.data) for __stdout + printf7.o(i.__0snprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0snprintf$7) refers to printf7.o(i._snputc) for _snputc + printf7.o(i.__0sprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0sprintf$7) refers to printf7.o(i._sputc) for _sputc + printf7.o(i.__0vfprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vfprintf$7) refers to tau_log.o(i.fputc) for fputc + printf7.o(i.__0vprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vprintf$7) refers to tau_log.o(i.fputc) for fputc + printf7.o(i.__0vprintf$7) refers to stdout.o(.data) for __stdout + printf7.o(i.__0vsnprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vsnprintf$7) refers to printf7.o(i._snputc) for _snputc + printf7.o(i.__0vsprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vsprintf$7) refers to printf7.o(i._sputc) for _sputc + printf7.o(i._printf_core) refers to printf7.o(i._printf_pre_padding) for _printf_pre_padding + printf7.o(i._printf_core) refers to printf7.o(i._printf_post_padding) for _printf_post_padding + printf7.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printf8.o(i.__0fprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0fprintf$8) refers to tau_log.o(i.fputc) for fputc + printf8.o(i.__0printf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0printf$8) refers to tau_log.o(i.fputc) for fputc + printf8.o(i.__0printf$8) refers to stdout.o(.data) for __stdout + printf8.o(i.__0snprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0snprintf$8) refers to printf8.o(i._snputc) for _snputc + printf8.o(i.__0sprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0sprintf$8) refers to printf8.o(i._sputc) for _sputc + printf8.o(i.__0vfprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vfprintf$8) refers to tau_log.o(i.fputc) for fputc + printf8.o(i.__0vprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vprintf$8) refers to tau_log.o(i.fputc) for fputc + printf8.o(i.__0vprintf$8) refers to stdout.o(.data) for __stdout + printf8.o(i.__0vsnprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vsnprintf$8) refers to printf8.o(i._snputc) for _snputc + printf8.o(i.__0vsprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vsprintf$8) refers to printf8.o(i._sputc) for _sputc + printf8.o(i._printf_core) refers to printf8.o(i._printf_pre_padding) for _printf_pre_padding + printf8.o(i._printf_core) refers to printf8.o(i._printf_post_padding) for _printf_post_padding + printf8.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printfa.o(i.__0fprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0fprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0fprintf) refers to tau_log.o(i.fputc) for fputc + printfa.o(i.__0printf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0printf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0printf) refers to tau_log.o(i.fputc) for fputc + printfa.o(i.__0printf) refers to stdout.o(.data) for __stdout + printfa.o(i.__0snprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0snprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0snprintf) refers to printfa.o(i._snputc) for _snputc + printfa.o(i.__0sprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0sprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0sprintf) refers to printfa.o(i._sputc) for _sputc + printfa.o(i.__0vfprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vfprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vfprintf) refers to tau_log.o(i.fputc) for fputc + printfa.o(i.__0vprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vprintf) refers to tau_log.o(i.fputc) for fputc + printfa.o(i.__0vprintf) refers to stdout.o(.data) for __stdout + printfa.o(i.__0vsnprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vsnprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vsnprintf) refers to printfa.o(i._snputc) for _snputc + printfa.o(i.__0vsprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vsprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vsprintf) refers to printfa.o(i._sputc) for _sputc + printfa.o(i._fp_digits) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._fp_digits) refers to dmul.o(.text) for __aeabi_dmul + printfa.o(i._fp_digits) refers to ddiv.o(.text) for __aeabi_ddiv + printfa.o(i._fp_digits) refers to cdrcmple.o(.text) for __aeabi_cdrcmple + printfa.o(i._fp_digits) refers to dadd.o(.text) for __aeabi_dadd + printfa.o(i._fp_digits) refers to dfixul.o(.text) for __aeabi_d2ulz + printfa.o(i._fp_digits) refers to uldiv.o(.text) for __aeabi_uldivmod + printfa.o(i._printf_core) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._printf_core) refers to printfa.o(i._printf_pre_padding) for _printf_pre_padding + printfa.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printfa.o(i._printf_core) refers to printfa.o(i._printf_post_padding) for _printf_post_padding + printfa.o(i._printf_core) refers to printfa.o(i._fp_digits) for _fp_digits + printfa.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printfa.o(i._printf_post_padding) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._printf_pre_padding) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._snputc) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._sputc) refers (Special) to iusefp.o(.text) for __I$use$fp + fadd.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + fadd.o(.text) refers to fepilogue.o(.text) for _float_epilogue + fmul.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + fdiv.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + fdiv.o(.text) refers to fepilogue.o(.text) for _float_round + fscalb.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dadd.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dadd.o(.text) refers to llshl.o(.text) for __aeabi_llsl + dadd.o(.text) refers to llsshr.o(.text) for __aeabi_lasr + dadd.o(.text) refers to depilogue.o(.text) for _double_epilogue + dmul.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dmul.o(.text) refers to depilogue.o(.text) for _double_epilogue + ddiv.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + ddiv.o(.text) refers to depilogue.o(.text) for _double_round + fflti.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + fflti.o(.text) refers to fepilogue.o(.text) for _float_epilogue + ffltui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + ffltui.o(.text) refers to fepilogue.o(.text) for _float_epilogue + dflti.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dflti.o(.text) refers to depilogue.o(.text) for _double_epilogue + dfltui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dfltui.o(.text) refers to depilogue.o(.text) for _double_epilogue + ffixi.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + ffixui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dfixi.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dfixi.o(.text) refers to llushr.o(.text) for __aeabi_llsr + dfixui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dfixui.o(.text) refers to llushr.o(.text) for __aeabi_llsr + f2d.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + cdcmple.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + cfrcmple.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + entry2.o(.ARM.Collect$$$$00000001) refers to entry2.o(.ARM.Collect$$$$00002712) for __lit__00000000 + entry2.o(.ARM.Collect$$$$00002712) refers to startup_armcm0.o(STACK) for __initial_sp + entry2.o(__vectab_stack_and_reset_area) refers to startup_armcm0.o(STACK) for __initial_sp + entry2.o(__vectab_stack_and_reset_area) refers to entry.o(.ARM.Collect$$$$00000000) for __main + entry5.o(.ARM.Collect$$$$00000004) refers to init.o(.text) for __scatterload + entry9a.o(.ARM.Collect$$$$0000000B) refers to main.o(i.main) for main + entry9b.o(.ARM.Collect$$$$0000000C) refers to main.o(i.main) for main + uldiv.o(.text) refers to llushr.o(.text) for __aeabi_llsr + uldiv.o(.text) refers to llshl.o(.text) for __aeabi_llsl + errno.o(i.__aeabi_errno_addr) refers to errno.o(.data) for .data + errno.o(i.__read_errno) refers to errno.o(.data) for .data + errno.o(i.__set_errno) refers to errno.o(.data) for .data + depilogue.o(.text) refers to depilogue.o(i.__ARM_clz) for __ARM_clz + depilogue.o(.text) refers to llshl.o(.text) for __aeabi_llsl + depilogue.o(.text) refers to llushr.o(.text) for __aeabi_llsr + dsqrt.o(.text) refers to llushr.o(.text) for __aeabi_llsr + dsqrt.o(.text) refers to depilogue.o(.text) for _double_round + dfixul.o(.text) refers to llushr.o(.text) for __aeabi_llsr + dfixul.o(.text) refers to llshl.o(.text) for __aeabi_llsl + init.o(.text) refers to entry5.o(.ARM.Collect$$$$00000004) for __main_after_scatterload + + +============================================================================== + +Removing Unused input sections from the image. + + Removing main.o(.rev16_text), (4 bytes). + Removing main.o(.revsh_text), (4 bytes). + Removing ap_demo.o(.rev16_text), (4 bytes). + Removing ap_demo.o(.revsh_text), (4 bytes). + Removing ap_demo.o(i.blue_change_ccm), (54 bytes). + Removing ap_demo.o(.data), (1 bytes). + Removing ap_demo.o(.data), (4 bytes). + Removing ap_demo.o(.data), (1 bytes). + Removing ap_demo.o(.data), (2 bytes). + Removing ap_demo.o(.data), (2 bytes). + Removing ap_demo.o(.data), (2 bytes). + Removing app_tp_transfer.o(.rev16_text), (4 bytes). + Removing app_tp_transfer.o(.revsh_text), (4 bytes). + Removing app_tp_transfer.o(i.app_tp_m_transfer_complate), (8 bytes). + Removing app_tp_transfer.o(i.app_tp_phone_reset_on), (12 bytes). + Removing app_tp_transfer.o(i.app_tp_s_transfer_complate), (26 bytes). + Removing app_tp_transfer.o(i.app_tp_screen_init), (48 bytes). + Removing app_tp_transfer.o(.data), (3 bytes). + Removing app_tp_transfer.o(.data), (3 bytes). + Removing app_tp_transfer.o(.data), (5 bytes). + Removing app_tp_transfer.o(.data), (6 bytes). + Removing app_tp_transfer.o(.data), (2 bytes). + Removing app_tp_transfer.o(.data), (3 bytes). + Removing app_tp_transfer.o(.data), (1 bytes). + Removing app_tp_transfer.o(.data), (2 bytes). + Removing app_tp_transfer.o(.data), (2 bytes). + Removing app_tp_st_touch.o(.rev16_text), (4 bytes). + Removing app_tp_st_touch.o(.revsh_text), (4 bytes). + Removing app_tp_st_touch.o(i.ap_tp_st_touch_software_reset), (112 bytes). + Removing board.o(.rev16_text), (4 bytes). + Removing board.o(.revsh_text), (4 bytes). + Removing startup_armcm0.o(HEAP), (3072 bytes). + Removing hal_dsi_rx_ctrl.o(.rev16_text), (4 bytes). + Removing hal_dsi_rx_ctrl.o(.revsh_text), (4 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_ack_long_cmd), (88 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_ack_short_cmd), (28 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video), (228 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_mode_init), (48 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern), (216 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_compressen_en), (16 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_release_handle), (40 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart), (80 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_auto_hw_filter), (28 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk), (44 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter), (108 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_dcs_direct_mode), (8 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_cmd_filter), (40 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pentile_format), (56 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data), (148 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rect_pixel_data), (268 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk), (68 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_te_waveform), (52 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate), (10 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution_ex), (32 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_register_write_cmd_entry), (110 bytes). + Removing hal_dsi_tx_ctrl.o(.rev16_text), (4 bytes). + Removing hal_dsi_tx_ctrl.o(.revsh_text), (4 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic), (148 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_cmd_mode_rcv_te), (10 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard), (280 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker), (172 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_mode_init), (30 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_ulps_mode), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_ulps_mode), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd), (140 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_release_handle), (28 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm), (32 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_cus_pq_filter), (28 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_endianness), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_escape_clock_div), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_lp_cmd), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data), (272 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg), (80 bytes). + Removing hal_gpio.o(.rev16_text), (4 bytes). + Removing hal_gpio.o(.revsh_text), (4 bytes). + Removing hal_gpio.o(i.hal_gpio_get_int_type), (20 bytes). + Removing hal_gpio.o(i.hal_gpio_get_pull_state), (32 bytes). + Removing hal_gpio.o(i.hal_gpio_set_driving_strength), (32 bytes). + Removing hal_gpio.o(i.hal_gpio_set_output_data_ex), (36 bytes). + Removing hal_gpio.o(i.hal_gpio_set_schmitt_trigger), (32 bytes). + Removing hal_gpio.o(i.hal_gpio_set_slew_rate), (32 bytes). + Removing hal_i2c_master.o(.rev16_text), (4 bytes). + Removing hal_i2c_master.o(.revsh_text), (4 bytes). + Removing hal_i2c_master.o(i.hal_i2c_m_deinit), (8 bytes). + Removing hal_i2c_master.o(i.hal_i2c_m_set_high_impedance), (46 bytes). + Removing hal_i2c_slave.o(.rev16_text), (4 bytes). + Removing hal_i2c_slave.o(.revsh_text), (4 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_deinit), (88 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_get_tx_byte_num), (12 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_read_complate), (12 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_read_complate_clear), (12 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_read_data), (32 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_rxfifo_notempty), (40 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_sel), (12 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_set_dma_tx_cycle), (36 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_set_high_impedance), (88 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_write_complate), (12 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_write_data), (32 bytes). + Removing hal_spi_master.o(.rev16_text), (4 bytes). + Removing hal_spi_master.o(.revsh_text), (4 bytes). + Removing hal_spi_master.o(i.hal_spi_m_callback), (24 bytes). + Removing hal_spi_master.o(i.hal_spi_m_deinit), (10 bytes). + Removing hal_spi_master.o(i.hal_spi_m_dma_init), (104 bytes). + Removing hal_spi_master.o(i.hal_spi_m_dma_read), (36 bytes). + Removing hal_spi_master.o(i.hal_spi_m_dma_write), (40 bytes). + Removing hal_spi_master.o(i.hal_spi_m_get_transfer_complate), (36 bytes). + Removing hal_spi_master.o(i.hal_spi_m_gpio_init), (8 bytes). + Removing hal_spi_master.o(i.hal_spi_m_read_rxfifo), (28 bytes). + Removing hal_spi_master.o(i.hal_spi_m_set_high_impedance), (100 bytes). + Removing hal_spi_master.o(.data), (1 bytes). + Removing hal_swire.o(.rev16_text), (4 bytes). + Removing hal_swire.o(.revsh_text), (4 bytes). + Removing hal_swire.o(i.hal_swire_deinit), (18 bytes). + Removing hal_swire.o(i.hal_swire_init), (32 bytes). + Removing hal_swire.o(i.hal_swire_register_callback), (10 bytes). + Removing hal_swire.o(i.hal_swire_start), (108 bytes). + Removing hal_system.o(.rev16_text), (4 bytes). + Removing hal_system.o(.revsh_text), (4 bytes). + Removing hal_system.o(i.hal_system_clear_debug_state), (10 bytes). + Removing hal_system.o(i.hal_system_deep_sleep_mode), (8 bytes). + Removing hal_system.o(i.hal_system_disable_systick), (8 bytes). + Removing hal_system.o(i.hal_system_get_debug_state), (8 bytes). + Removing hal_system.o(i.hal_system_get_tick), (8 bytes). + Removing hal_system.o(i.hal_system_idle_mode), (8 bytes). + Removing hal_system.o(i.hal_system_register_systick_cb), (8 bytes). + Removing hal_system.o(i.hal_system_reset_chip), (32 bytes). + Removing hal_system.o(i.hal_system_share_flash_mode), (20 bytes). + Removing hal_system.o(i.hal_system_sleep_mode), (48 bytes). + Removing hal_timer.o(.rev16_text), (4 bytes). + Removing hal_timer.o(.revsh_text), (4 bytes). + Removing hal_timer.o(i.hal_timer_deinit), (46 bytes). + Removing hal_timer.o(i.hal_timer_get_status), (8 bytes). + Removing hal_timer.o(i.hal_timer_set_repeat), (8 bytes). + Removing hal_timer.o(i.hal_timer_start_ex), (72 bytes). + Removing tau_delay.o(.rev16_text), (4 bytes). + Removing tau_delay.o(.revsh_text), (4 bytes). + Removing app_tp_for_custom_s8.o(.rev16_text), (4 bytes). + Removing app_tp_for_custom_s8.o(.revsh_text), (4 bytes). + Removing app_tp_for_custom_s8.o(i.app_tp_screen_analysis_const), (56 bytes). + Removing app_tp_for_custom_s8.o(.bss), (200 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (37 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (1 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (3 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (3 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (1 bytes). + Removing app_tp_for_custom_s8.o(.data), (11 bytes). + Removing app_tp_for_custom_s8.o(.data), (10 bytes). + Removing app_tp_for_custom_s8.o(.data), (1 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (1 bytes). + Removing app_tp_for_custom_s8.o(.data), (1 bytes). + Removing app_tp_for_custom_s8.o(.data), (64 bytes). + Removing app_tp_for_custom_s8.o(.data), (3 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (1 bytes). + Removing app_tp_for_custom_s8.o(.data), (32 bytes). + Removing app_tp_for_custom_s8.o(.data), (1 bytes). + Removing hal_uart.o(.rev16_text), (4 bytes). + Removing hal_uart.o(.revsh_text), (4 bytes). + Removing hal_uart.o(i.hal_uart_deinit), (28 bytes). + Removing hal_uart.o(i.hal_uart_dmacallback), (36 bytes). + Removing hal_uart.o(i.hal_uart_receive_blocking), (16 bytes). + Removing hal_uart.o(i.hal_uart_receive_dma), (76 bytes). + Removing hal_uart.o(i.hal_uart_transmit_dma), (76 bytes). + Removing hal_internal_vsync.o(.rev16_text), (4 bytes). + Removing hal_internal_vsync.o(.revsh_text), (4 bytes). + Removing hal_internal_vsync.o(i.hal_internal_sync_cmd_mode_rcv_te), (168 bytes). + Removing hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex), (468 bytes). + Removing hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual), (528 bytes). + Removing hal_internal_vsync.o(i.hal_internal_vsync_register_write_cmd_entry), (12 bytes). + Removing hal_internal_vsync.o(i.hal_internal_vsync_set_dcs_direct_mode), (48 bytes). + Removing hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate), (680 bytes). + Removing hal_internal_vsync.o(i.hal_internal_vsync_update_lcdc_addr), (48 bytes). + Removing hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler), (476 bytes). + Removing drv_common.o(.rev16_text), (4 bytes). + Removing drv_common.o(.revsh_text), (4 bytes). + Removing drv_common.o(i.drv_common_disable_systick), (20 bytes). + Removing drv_common.o(i.drv_common_get_tick), (12 bytes). + Removing drv_common.o(i.drv_common_idle_mode), (40 bytes). + Removing drv_common.o(i.drv_common_systick_register_cb), (12 bytes). + Removing drv_crgu.o(.rev16_text), (4 bytes). + Removing drv_crgu.o(.revsh_text), (4 bytes). + Removing drv_crgu.o(i.drv_crgu_clear_all_reset_flags), (12 bytes). + Removing drv_crgu.o(i.drv_crgu_clear_reset_flag), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_config_clocks), (16 bytes). + Removing drv_crgu.o(i.drv_crgu_config_clocks_div), (16 bytes). + Removing drv_crgu.o(i.drv_crgu_config_clocks_src), (16 bytes). + Removing drv_crgu.o(i.drv_crgu_get_ana_clk_status), (24 bytes). + Removing drv_crgu.o(i.drv_crgu_get_clocks), (12 bytes). + Removing drv_crgu.o(i.drv_crgu_get_fpga_id), (12 bytes). + Removing drv_crgu.o(i.drv_crgu_get_mipi_ref_src), (16 bytes). + Removing drv_crgu.o(i.drv_crgu_get_reset_flag), (24 bytes). + Removing drv_crgu.o(i.drv_crgu_get_system_clk), (28 bytes). + Removing drv_crgu.o(i.drv_crgu_reset_chip), (12 bytes). + Removing drv_crgu.o(i.drv_crgu_set_200m_scan_src), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_300m_scan_src), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_abp0_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_adc_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_adc_src), (24 bytes). + Removing drv_crgu.o(i.drv_crgu_set_apb1_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_apb2_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_fls_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_fls_src), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_monitor_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_monitor_src), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_swire_div), (20 bytes). + Removing drv_dma.o(.rev16_text), (4 bytes). + Removing drv_dma.o(.revsh_text), (4 bytes). + Removing drv_dma.o(i.drv_dma_abort_transfer), (32 bytes). + Removing drv_dma.o(i.drv_dma_ahb_init), (74 bytes). + Removing drv_dma.o(i.drv_dma_channel_is_active), (20 bytes). + Removing drv_dma.o(i.drv_dma_deinit), (32 bytes). + Removing drv_dma.o(i.drv_dma_disenable_channel_interrupts), (24 bytes). + Removing drv_dma.o(i.drv_dma_enable_cycle), (44 bytes). + Removing drv_dma.o(i.drv_dma_get_remaining_bytes), (32 bytes). + Removing drv_dma.o(i.drv_dma_init), (24 bytes). + Removing drv_dma.o(i.drv_dma_m2m_init), (72 bytes). + Removing drv_dma.o(i.drv_dma_reset), (10 bytes). + Removing drv_dma.o(i.drv_dma_set_ccr), (114 bytes). + Removing drv_dma.o(i.drv_dma_start_transfer), (32 bytes). + Removing drv_fls.o(.rev16_text), (4 bytes). + Removing drv_fls.o(.revsh_text), (4 bytes). + Removing drv_fls.o(i.__NVIC_DisableIRQ), (32 bytes). + Removing drv_fls.o(i.drv_fls_gpio_connect), (28 bytes). + Removing drv_fls.o(i.drv_fls_gpio_disconnect), (32 bytes). + Removing drv_fls.o(i.fls_EnableClk), (12 bytes). + Removing drv_fls.o(i.fls_busy_pending), (12 bytes). + Removing drv_fls.o(i.fls_clear_irq_status), (6 bytes). + Removing drv_fls.o(i.fls_ctrl_cfg_init), (72 bytes). + Removing drv_fls.o(i.fls_ddat_enable), (24 bytes). + Removing drv_fls.o(i.fls_de_init), (52 bytes). + Removing drv_fls.o(i.fls_descr), (10 bytes). + Removing drv_fls.o(i.fls_disable_it), (36 bytes). + Removing drv_fls.o(i.fls_en_scr), (10 bytes). + Removing drv_fls.o(i.fls_enable_it), (48 bytes). + Removing drv_fls.o(i.fls_get_crcout), (4 bytes). + Removing drv_fls.o(i.fls_get_default_fls_config), (20 bytes). + Removing drv_fls.o(i.fls_get_default_spi_config), (44 bytes). + Removing drv_fls.o(i.fls_get_default_tuning), (12 bytes). + Removing drv_fls.o(i.fls_get_tuning), (18 bytes). + Removing drv_fls.o(i.fls_init), (62 bytes). + Removing drv_fls.o(i.fls_qadr_enable), (22 bytes). + Removing drv_fls.o(i.fls_qcmd_enable), (22 bytes). + Removing drv_fls.o(i.fls_qdat_enable), (22 bytes). + Removing drv_fls.o(i.fls_read_byte_data), (130 bytes). + Removing drv_fls.o(i.fls_read_cmd), (104 bytes). + Removing drv_fls.o(i.fls_read_cmd_it), (110 bytes). + Removing drv_fls.o(i.fls_reset_crc), (18 bytes). + Removing drv_fls.o(i.fls_scr_clear), (10 bytes). + Removing drv_fls.o(i.fls_set_addr_dummy), (32 bytes). + Removing drv_fls.o(i.fls_set_addr_len), (32 bytes). + Removing drv_fls.o(i.fls_set_mc_irq_mask), (26 bytes). + Removing drv_fls.o(i.fls_set_read), (10 bytes). + Removing drv_fls.o(i.fls_set_tuning), (24 bytes). + Removing drv_fls.o(i.fls_set_write), (10 bytes). + Removing drv_fls.o(i.fls_single_mode), (16 bytes). + Removing drv_fls.o(i.fls_spi_init), (180 bytes). + Removing drv_fls.o(i.fls_spi_start), (10 bytes). + Removing drv_fls.o(i.fls_swrst), (18 bytes). + Removing drv_fls.o(i.fls_write_byte_data), (164 bytes). + Removing drv_fls.o(i.fls_write_cmd), (58 bytes). + Removing drv_fls.o(.data), (4 bytes). + Removing drv_gpio.o(.rev16_text), (4 bytes). + Removing drv_gpio.o(.revsh_text), (4 bytes). + Removing drv_gpio.o(i.drv_gpio_get_pull_state), (224 bytes). + Removing drv_gpio.o(i.drv_gpio_set_driving_strength), (312 bytes). + Removing drv_gpio.o(i.drv_gpio_set_schmitt_trigger), (168 bytes). + Removing drv_gpio.o(i.drv_gpio_set_slew_rate), (168 bytes). + Removing drv_i2c_dma.o(.rev16_text), (4 bytes). + Removing drv_i2c_dma.o(.revsh_text), (4 bytes). + Removing drv_i2c_master.o(.rev16_text), (4 bytes). + Removing drv_i2c_master.o(.revsh_text), (4 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_bus_init), (36 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_deinit), (44 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_disable_intr), (16 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_get_fifo_status), (28 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_read_data), (32 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_set_fifo_threshold), (24 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_set_sys_mask), (48 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_write_data), (32 bytes). + Removing drv_i2c_slave.o(.rev16_text), (4 bytes). + Removing drv_i2c_slave.o(.revsh_text), (4 bytes). + Removing drv_i2c_slave.o(i.drv_i2c_s_read_data), (30 bytes). + Removing drv_i2c_slave.o(i.drv_i2c_s_set_fifo_threshold), (16 bytes). + Removing drv_param_init.o(.rev16_text), (4 bytes). + Removing drv_param_init.o(.revsh_text), (4 bytes). + Removing drv_param_init.o(i.drv_param_init_set_scld_filter), (100 bytes). + Removing drv_param_init.o(i.drv_param_init_set_sclu_filter), (28 bytes). + Removing drv_pwr.o(.rev16_text), (4 bytes). + Removing drv_pwr.o(.revsh_text), (4 bytes). + Removing drv_pwr.o(i.drv_pwr_enter_deep_sleep_mode), (44 bytes). + Removing drv_pwr.o(i.drv_pwr_set_frame_buff_pd), (28 bytes). + Removing drv_spi_dma.o(.rev16_text), (4 bytes). + Removing drv_spi_dma.o(.revsh_text), (4 bytes). + Removing drv_spi_dma.o(i.__NVIC_ClearPendingIRQ), (24 bytes). + Removing drv_spi_dma.o(i.drv_spi_abort_dma), (108 bytes). + Removing drv_spi_dma.o(i.drv_spi_dma_callback), (60 bytes). + Removing drv_spi_dma.o(i.drv_spi_dma_ch6_init), (208 bytes). + Removing drv_spi_dma.o(i.drv_spi_dma_init), (220 bytes). + Removing drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback), (48 bytes). + Removing drv_spi_dma.o(i.drv_spi_set_dma_irq_callback), (88 bytes). + Removing drv_spi_dma.o(i.drv_spim_dma_read), (96 bytes). + Removing drv_spi_dma.o(i.drv_spim_dma_write), (60 bytes). + Removing drv_spi_dma.o(i.drv_spis_dma_write), (72 bytes). + Removing drv_spi_dma.o(.bss), (480 bytes). + Removing drv_spi_dma.o(.data), (16 bytes). + Removing drv_spi_master.o(.rev16_text), (4 bytes). + Removing drv_spi_master.o(.revsh_text), (4 bytes). + Removing drv_spi_master.o(i.drv_spi_m_deinit), (40 bytes). + Removing drv_spi_master.o(i.drv_spi_m_disable_int), (68 bytes). + Removing drv_spi_master.o(i.drv_spi_m_enable_int), (72 bytes). + Removing drv_spi_master.o(i.drv_spi_m_enable_rx_dma), (32 bytes). + Removing drv_spi_master.o(i.drv_spi_m_enable_tx_dma), (28 bytes). + Removing drv_spi_master.o(i.drv_spi_m_get_dma_address), (8 bytes). + Removing drv_spi_master.o(i.drv_spi_m_gpio_init), (32 bytes). + Removing drv_spi_master.o(i.drv_spi_m_set_intr_callback), (12 bytes). + Removing drv_spi_master.o(i.drv_spi_m_switch_sclk), (28 bytes). + Removing drv_spi_master.o(i.drv_spi_m_write_data), (44 bytes). + Removing drv_spi_master.o(i.drv_spi_master_init), (164 bytes). + Removing drv_swire.o(.rev16_text), (4 bytes). + Removing drv_swire.o(.revsh_text), (4 bytes). + Removing drv_swire.o(i.drv_swire_enable), (28 bytes). + Removing drv_swire.o(i.drv_swire_register_callback), (12 bytes). + Removing drv_swire.o(i.drv_swire_set_bit_time), (24 bytes). + Removing drv_swire.o(i.drv_swire_set_pulse_count), (12 bytes). + Removing drv_sys_cfg.o(.rev16_text), (4 bytes). + Removing drv_sys_cfg.o(.revsh_text), (4 bytes). + Removing drv_sys_cfg.o(i.drv_sys_cfg_dma_req_mask), (32 bytes). + Removing drv_sys_cfg.o(i.drv_sys_cfg_read_version0_id), (12 bytes). + Removing drv_sys_cfg.o(i.drv_sys_cfg_set_ap_reset), (28 bytes). + Removing drv_timer.o(.rev16_text), (4 bytes). + Removing drv_timer.o(.revsh_text), (4 bytes). + Removing drv_timer.o(i.drv_timer_get_status), (38 bytes). + Removing drv_timer.o(i.drv_timer_set_repeat), (16 bytes). + Removing dcs_packet_fifo.o(i.dcs_packet_get_fifo_size), (16 bytes). + Removing drv_dsi_rx.o(.rev16_text), (4 bytes). + Removing drv_dsi_rx.o(.revsh_text), (4 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_get_phy_stopstate), (66 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_get_version), (4 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_phy_resistor_calibration), (236 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_pg_cfg), (32 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_pg_cfg), (48 bytes). + Removing drv_dsi_rx.o(i.drv_rx_phy_test_read), (12 bytes). + Removing drv_dsi_tx.o(.rev16_text), (4 bytes). + Removing drv_dsi_tx.o(.revsh_text), (4 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_command_get_payload), (4 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_force_interrupt), (8 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_get_phy_status), (6 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_forcepll), (12 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_resistor_calibration), (232 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_start), (18 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_status_pll_lock), (10 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ulpsactivenot), (62 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_trigger), (92 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter), (344 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit), (276 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_sdf_3d), (28 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_set_bta), (22 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_set_vpg), (70 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_version), (4 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_vid_shadow), (16 bytes). + Removing drv_dsi_tx.o(i.drv_tx_phy_test_read), (10 bytes). + Removing drv_lcdc.o(.rev16_text), (4 bytes). + Removing drv_lcdc.o(.revsh_text), (4 bytes). + Removing drv_lcdc.o(i.drv_lcdc_config_rgb_to_pentile), (6 bytes). + Removing drv_lcdc.o(i.drv_lcdc_enable), (42 bytes). + Removing drv_lcdc.o(i.drv_lcdc_update_shadow_reg), (12 bytes). + Removing drv_memc.o(.rev16_text), (4 bytes). + Removing drv_memc.o(.revsh_text), (4 bytes). + Removing drv_memc.o(i.drv_memc_set_db_frm_time), (14 bytes). + Removing drv_memc.o(i.drv_memc_set_db_int_frame), (28 bytes). + Removing drv_memc.o(i.drv_memc_set_fb_remaining_line_trigger), (12 bytes). + Removing drv_memc.o(i.drv_memc_set_read_trigger_line), (16 bytes). + Removing drv_memc.o(i.drv_memc_set_te_ind), (16 bytes). + Removing drv_memc.o(i.drv_memc_set_tear_hwclr), (16 bytes). + Removing drv_memc.o(i.drv_memc_set_vidc_fb_arb), (14 bytes). + Removing drv_memc.o(i.drv_memc_set_write_trigger_line), (16 bytes). + Removing drv_rxbr.o(.rev16_text), (4 bytes). + Removing drv_rxbr.o(.revsh_text), (4 bytes). + Removing drv_rxbr.o(i.drv_rxbr_dsc_flush), (16 bytes). + Removing drv_rxbr.o(i.drv_rxbr_get_cur_hline_rcv_cnt), (8 bytes). + Removing drv_rxbr.o(i.drv_rxbr_get_ipi_vsync_interval), (8 bytes). + Removing drv_rxbr.o(i.drv_rxbr_get_pix_fmt), (8 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_col_addr), (4 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_compress), (24 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_page_addr), (4 bytes). + Removing drv_rxbr.o(i.drv_rxbr_soft_reset), (98 bytes). + Removing drv_vidc.o(.rev16_text), (4 bytes). + Removing drv_vidc.o(.revsh_text), (4 bytes). + Removing drv_vidc.o(i.drv_vidc_clear_status0), (14 bytes). + Removing drv_vidc.o(i.drv_vidc_debug_cap_pixel), (24 bytes). + Removing drv_vidc.o(i.drv_vidc_debug_signal_frame), (30 bytes). + Removing drv_vidc.o(i.drv_vidc_get_int_source), (38 bytes). + Removing drv_vidc.o(i.drv_vidc_get_status0), (20 bytes). + Removing drv_vidc.o(i.drv_vidc_get_status1), (20 bytes). + Removing drv_vidc.o(i.drv_vidc_get_status2), (6 bytes). + Removing drv_vidc.o(i.drv_vidc_set_dsc_thresh), (4 bytes). + Removing drv_vidc.o(i.drv_vidc_set_frmst_latency), (12 bytes). + Removing drv_vidc.o(i.drv_vidc_set_inff_thresh), (4 bytes). + Removing drv_vidc.o(i.drv_vidc_set_irq_line), (20 bytes). + Removing drv_vidc.o(i.drv_vidc_set_module_enable), (20 bytes). + Removing drv_vidc.o(i.drv_vidc_set_outff_thresh), (4 bytes). + Removing drv_vidc.o(i.drv_vidc_update_src_format), (14 bytes). + Removing irq_redirect .o(.rev16_text), (4 bytes). + Removing irq_redirect .o(.revsh_text), (4 bytes). + Removing drv_efuse.o(.rev16_text), (4 bytes). + Removing drv_efuse.o(.revsh_text), (4 bytes). + Removing drv_efuse.o(i.drv_efuse_crc_cal), (128 bytes). + Removing drv_efuse.o(i.drv_efuse_get_default_config), (26 bytes). + Removing drv_efuse.o(i.drv_efuse_int_disable), (12 bytes). + Removing drv_efuse.o(i.drv_efuse_write), (46 bytes). + Removing drv_efuse.o(i.drv_efuse_write_req), (22 bytes). + Removing drv_phy_common.o(.rev16_text), (4 bytes). + Removing drv_phy_common.o(.revsh_text), (4 bytes). + Removing drv_phy_common.o(i.drv_phy_test_read), (8 bytes). + Removing drv_chip_info.o(.rev16_text), (4 bytes). + Removing drv_chip_info.o(.revsh_text), (4 bytes). + Removing drv_dsc_dec.o(.rev16_text), (4 bytes). + Removing drv_dsc_dec.o(.revsh_text), (4 bytes). + Removing drv_dsc_dec.o(i.drv_dsc_dec_set_u32_pps), (120 bytes). + Removing tau_log.o(.rev16_text), (4 bytes). + Removing tau_log.o(.revsh_text), (4 bytes). + Removing tau_log.o(i.fgetc), (22 bytes). + Removing app_tp_enc.o(.rev16_text), (4 bytes). + Removing app_tp_enc.o(.revsh_text), (4 bytes). + Removing hal_spi_slave.o(.rev16_text), (4 bytes). + Removing hal_spi_slave.o(.revsh_text), (4 bytes). + Removing hal_spi_slave.o(i.hal_spi_s_set_high_impedance), (100 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_auto_transfer_abort), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_auto_transfer_start), (56 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_busy), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_deinit), (10 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_disable), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_enable), (96 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_flush_fifo), (20 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_get_rxfifo_notempty), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_gpio_init), (8 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_init), (76 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_read_data), (10 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_register_callback), (12 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_reset_tx), (68 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_set_auto_rx_buffer), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_set_auto_tx_buffer), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_write_data), (14 bytes). + Removing norflash.o(.rev16_text), (4 bytes). + Removing norflash.o(.revsh_text), (4 bytes). + Removing norflash.o(i.norflash_best_cfg_init), (44 bytes). + Removing norflash.o(i.norflash_big_end_clear), (14 bytes). + Removing norflash.o(i.norflash_big_end_enable), (20 bytes). + Removing norflash.o(i.norflash_check_crc32), (14 bytes). + Removing norflash.o(i.norflash_check_id), (72 bytes). + Removing norflash.o(i.norflash_dma_callback), (24 bytes). + Removing norflash.o(i.norflash_dma_read), (156 bytes). + Removing norflash.o(i.norflash_dma_write), (252 bytes). + Removing norflash.o(i.norflash_dual_read), (60 bytes). + Removing norflash.o(i.norflash_dual_write), (112 bytes). + Removing norflash.o(i.norflash_en4b), (40 bytes). + Removing norflash.o(i.norflash_en_quad), (116 bytes). + Removing norflash.o(i.norflash_en_quad_check), (64 bytes). + Removing norflash.o(i.norflash_erase_block), (44 bytes). + Removing norflash.o(i.norflash_erase_chip), (28 bytes). + Removing norflash.o(i.norflash_erase_sector), (44 bytes). + Removing norflash.o(i.norflash_ex4b), (40 bytes). + Removing norflash.o(i.norflash_exit_quad), (76 bytes). + Removing norflash.o(i.norflash_get_dual_hstatus), (52 bytes). + Removing norflash.o(i.norflash_get_hstatus), (52 bytes). + Removing norflash.o(i.norflash_get_status), (52 bytes). + Removing norflash.o(i.norflash_init), (48 bytes). + Removing norflash.o(i.norflash_quad_read), (76 bytes). + Removing norflash.o(i.norflash_quad_write), (108 bytes). + Removing norflash.o(i.norflash_read), (28 bytes). + Removing norflash.o(i.norflash_read_config_reg), (36 bytes). + Removing norflash.o(i.norflash_read_id), (20 bytes). + Removing norflash.o(i.norflash_read_uid), (52 bytes). + Removing norflash.o(i.norflash_reset), (2 bytes). + Removing norflash.o(i.norflash_reset_crc32), (32 bytes). + Removing norflash.o(i.norflash_set_best_cfg), (50 bytes). + Removing norflash.o(i.norflash_set_best_read_cfg), (84 bytes). + Removing norflash.o(i.norflash_set_best_write_cfg), (84 bytes). + Removing norflash.o(i.norflash_switch_fls_spi), (112 bytes). + Removing norflash.o(i.norflash_write), (96 bytes). + Removing norflash.o(i.norflash_write_disable), (64 bytes). + Removing norflash.o(i.norflash_write_enable), (56 bytes). + Removing norflash.o(i.norflash_write_endian_scr), (132 bytes). + Removing norflash.o(.bss), (412 bytes). + Removing norflash.o(.bss), (32 bytes). + Removing norflash.o(.data), (2 bytes). + Removing drv_fls_dma.o(.rev16_text), (4 bytes). + Removing drv_fls_dma.o(.revsh_text), (4 bytes). + Removing drv_fls_dma.o(i.fls_abort_dma), (42 bytes). + Removing drv_fls_dma.o(i.fls_dma_disable), (10 bytes). + Removing drv_fls_dma.o(i.fls_dma_enable), (10 bytes). + Removing drv_fls_dma.o(i.fls_dma_read_prepare), (86 bytes). + Removing drv_fls_dma.o(i.fls_dma_write_prepare), (82 bytes). + Removing drv_fls_dma.o(i.fls_read_dmacallback), (32 bytes). + Removing drv_fls_dma.o(i.fls_transfer_create_handle_dma), (208 bytes). + Removing drv_fls_dma.o(i.fls_transfer_dma), (112 bytes). + Removing drv_fls_dma.o(i.fls_transfer_get_receive_count_dma), (44 bytes). + Removing drv_fls_dma.o(i.fls_write_dmacallback), (32 bytes). + Removing drv_fls_dma.o(.data), (8 bytes). + Removing drv_pwm.o(.rev16_text), (4 bytes). + Removing drv_pwm.o(.revsh_text), (4 bytes). + Removing drv_pwm.o(i.drv_pwm_in_clear_pwm_int_all), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_in_enable), (32 bytes). + Removing drv_pwm.o(i.drv_pwm_in_get_counter_period), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_in_get_current_count), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_in_get_high_period), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_in_get_low_period), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_in_register_callback), (24 bytes). + Removing drv_pwm.o(i.drv_pwm_in_set_pwm_int), (32 bytes). + Removing drv_pwm.o(i.drv_pwm_in_set_sys_int), (64 bytes). + Removing drv_pwm.o(i.drv_pwm_out_enable), (32 bytes). + Removing drv_pwm.o(i.drv_pwm_out_get_sync_flag), (16 bytes). + Removing drv_pwm.o(i.drv_pwm_out_pause), (28 bytes). + Removing drv_pwm.o(i.drv_pwm_out_set_control), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_out_set_period), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_out_set_sync_mode), (32 bytes). + Removing drv_pwm.o(i.drv_pwm_out_set_threshold), (12 bytes). + Removing drv_spi_slave.o(.rev16_text), (4 bytes). + Removing drv_spi_slave.o(.revsh_text), (4 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_deinit), (40 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_disable_int), (68 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_enable_int), (72 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_enable_rx_dma), (32 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_enable_tx_dma), (28 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_get_dma_address), (8 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_gpio_init), (24 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_read_data), (32 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_switch_sclk), (28 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_write_data), (44 bytes). + Removing drv_spi_slave.o(i.drv_spi_slave_init), (76 bytes). + Removing drv_uart.o(.rev16_text), (4 bytes). + Removing drv_uart.o(.revsh_text), (4 bytes). + Removing drv_uart.o(i.UART_AbortReceive), (30 bytes). + Removing drv_uart.o(i.UART_AbortSend), (30 bytes). + Removing drv_uart.o(i.UART_Deinit), (28 bytes). + Removing drv_uart.o(i.UART_Disable_IT), (68 bytes). + Removing drv_uart.o(i.UART_EnableDma), (32 bytes). + Removing drv_uart.o(i.UART_Enable_IT), (44 bytes). + Removing drv_uart.o(i.UART_GetDefaultConfig), (72 bytes). + Removing drv_uart.o(i.UART_GetFIFO_Ctrl), (20 bytes). + Removing drv_uart.o(i.UART_GetReceiveCount), (22 bytes). + Removing drv_uart.o(i.UART_GetReceiveStatus), (20 bytes). + Removing drv_uart.o(i.UART_GetRxRingBufferLength), (28 bytes). + Removing drv_uart.o(i.UART_GetSendCount), (22 bytes). + Removing drv_uart.o(i.UART_GetSendStatus), (20 bytes). + Removing drv_uart.o(i.UART_ReadBlocking), (32 bytes). + Removing drv_uart.o(i.UART_ReceiveNonBlocking), (50 bytes). + Removing drv_uart.o(i.UART_ResetTxFIFO), (36 bytes). + Removing drv_uart.o(i.UART_SendNonBlocking), (38 bytes). + Removing drv_uart.o(i.UART_TransferCreateHandle), (96 bytes). + Removing drv_uart.o(i.UART_TransferStartRingBuffer), (30 bytes). + Removing drv_uart.o(.constdata), (1 bytes). + Removing drv_uart_dma.o(.rev16_text), (4 bytes). + Removing drv_uart_dma.o(.revsh_text), (4 bytes). + Removing drv_uart_dma.o(i.UART_DMAInit), (76 bytes). + Removing drv_uart_dma.o(i.UART_TransferAbortReceiveDMA), (16 bytes). + Removing drv_uart_dma.o(i.UART_TransferAbortSendDMA), (16 bytes). + Removing drv_uart_dma.o(i.UART_TransferCreateHandleDMA), (176 bytes). + Removing drv_uart_dma.o(i.UART_TransferGetReceiveCountDMA), (44 bytes). + Removing drv_uart_dma.o(i.UART_TransferReceiveDMA), (68 bytes). + Removing drv_uart_dma.o(i.UART_TransferReceiveDMACallback), (34 bytes). + Removing drv_uart_dma.o(i.UART_TransferSendDMA), (68 bytes). + Removing drv_uart_dma.o(i.UART_TransferSendDMACallback), (34 bytes). + Removing drv_uart_dma.o(.data), (8 bytes). + Removing drv_wdg.o(.rev16_text), (4 bytes). + Removing drv_wdg.o(.revsh_text), (4 bytes). + Removing drv_wdg.o(i.drv_wdg_enable), (32 bytes). + Removing drv_wdg.o(i.drv_wdg_load_match), (12 bytes). + Removing drv_wdg.o(i.drv_wdg_register_callback), (12 bytes). + Removing drv_wdg.o(i.drv_wdg_sel_mode), (28 bytes). + Removing drv_wdg.o(i.drv_wdg_set_repeat), (12 bytes). + Removing dflti.o(.text), (40 bytes). + +590 unused section(s) (total 26647 bytes) removed from the image. + +============================================================================== + +Image Symbol Table + + Local Symbols + + Symbol Name Value Ov Type Size Object(Section) + + ../clib/../cmprslib/zerorunl2.c 0x00000000 Number 0 __dczerorl2.o ABSOLUTE + ../clib/microlib/division.c 0x00000000 Number 0 idiv.o ABSOLUTE + ../clib/microlib/division.c 0x00000000 Number 0 uidiv.o ABSOLUTE + ../clib/microlib/division.c 0x00000000 Number 0 uldiv.o ABSOLUTE + ../clib/microlib/errno.c 0x00000000 Number 0 errno.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry10b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry10a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry11a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry11b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry7a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry5.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry2.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry7b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry8a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry8b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry9a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry9b.o ABSOLUTE + ../clib/microlib/longlong.c 0x00000000 Number 0 llsshr.o ABSOLUTE + ../clib/microlib/longlong.c 0x00000000 Number 0 llushr.o ABSOLUTE + ../clib/microlib/longlong.c 0x00000000 Number 0 llshl.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf2.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf5.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf8.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf4.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf3.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf1.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printfa.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf0.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printfb.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf7.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf6.o ABSOLUTE + ../clib/microlib/printf/stubs.s 0x00000000 Number 0 stubs.o ABSOLUTE + ../clib/microlib/stdio/streams.c 0x00000000 Number 0 stdout.o ABSOLUTE + ../clib/microlib/string/memcpy.c 0x00000000 Number 0 memcpyb.o ABSOLUTE + ../clib/microlib/string/memcpy.c 0x00000000 Number 0 memcpya.o ABSOLUTE + ../clib/microlib/string/memset.c 0x00000000 Number 0 memseta.o ABSOLUTE + ../clib/microlib/stubs.s 0x00000000 Number 0 iusefp.o ABSOLUTE + ../fplib/microlib/f2d.c 0x00000000 Number 0 f2d.o ABSOLUTE + ../fplib/microlib/fpadd.c 0x00000000 Number 0 dadd.o ABSOLUTE + ../fplib/microlib/fpadd.c 0x00000000 Number 0 fadd.o ABSOLUTE + ../fplib/microlib/fpdiv.c 0x00000000 Number 0 fdiv.o ABSOLUTE + ../fplib/microlib/fpdiv.c 0x00000000 Number 0 ddiv.o ABSOLUTE + ../fplib/microlib/fpepilogue.c 0x00000000 Number 0 fepilogue.o ABSOLUTE + ../fplib/microlib/fpepilogue.c 0x00000000 Number 0 depilogue.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 dfixi.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 dfixui.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 ffixi.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 ffixui.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 dfixul.o ABSOLUTE + ../fplib/microlib/fpflt.c 0x00000000 Number 0 fflti.o ABSOLUTE + ../fplib/microlib/fpflt.c 0x00000000 Number 0 ffltui.o ABSOLUTE + ../fplib/microlib/fpflt.c 0x00000000 Number 0 dflti.o ABSOLUTE + ../fplib/microlib/fpflt.c 0x00000000 Number 0 dfltui.o ABSOLUTE + ../fplib/microlib/fpmul.c 0x00000000 Number 0 fmul.o ABSOLUTE + ../fplib/microlib/fpmul.c 0x00000000 Number 0 dmul.o ABSOLUTE + ../fplib/microlib/fpscalb.c 0x00000000 Number 0 fscalb.o ABSOLUTE + ../fplib/microlib/fpsqrt.c 0x00000000 Number 0 dsqrt.o ABSOLUTE + ../mathlib/ceil.c 0x00000000 Number 0 ceil.o ABSOLUTE + ../mathlib/sqrt.c 0x00000000 Number 0 sqrt.o ABSOLUTE + ../mathlib/sqrt.c 0x00000000 Number 0 sqrt_x.o ABSOLUTE + ..\..\..\src\common\tau_delay.c 0x00000000 Number 0 tau_delay.o ABSOLUTE + ..\..\..\src\common\tau_log.c 0x00000000 Number 0 tau_log.o ABSOLUTE + ..\..\..\src\driver\robin\src\drv_chip_info.c 0x00000000 Number 0 drv_chip_info.o ABSOLUTE + ..\..\..\src\driver\robin\src\drv_dsc_dec.c 0x00000000 Number 0 drv_dsc_dec.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_dsi_rx.c 0x00000000 Number 0 drv_dsi_rx.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_dsi_tx.c 0x00000000 Number 0 drv_dsi_tx.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_efuse.c 0x00000000 Number 0 drv_efuse.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_lcdc.c 0x00000000 Number 0 drv_lcdc.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_memc.c 0x00000000 Number 0 drv_memc.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_phy_common.c 0x00000000 Number 0 drv_phy_common.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_rxbr.c 0x00000000 Number 0 drv_rxbr.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_vidc.c 0x00000000 Number 0 drv_vidc.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\irq_redirect .c 0x00000000 Number 0 irq_redirect .o ABSOLUTE + ..\..\..\src\driver\source\robin\hal\internal\dcs_packet_fifo.c 0x00000000 Number 0 dcs_packet_fifo.o ABSOLUTE + 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i.HardFault_Handler 0x00010e30 Section 0 irq_redirect .o(i.HardFault_Handler) + i.I2C0_IRQn_Handler 0x00010e44 Section 0 irq_redirect .o(i.I2C0_IRQn_Handler) + i.I2C1_IRQn_Handler 0x00010e5c Section 0 irq_redirect .o(i.I2C1_IRQn_Handler) + i.LCDC_IRQn_Handler 0x00010e74 Section 0 irq_redirect .o(i.LCDC_IRQn_Handler) + i.LOG_printf 0x00010e8c Section 0 tau_log.o(i.LOG_printf) + i.MEMC_IRQn_Handler 0x00010eb4 Section 0 irq_redirect .o(i.MEMC_IRQn_Handler) + i.MIPI_RX_IRQn_Handler 0x00010ecc Section 0 irq_redirect .o(i.MIPI_RX_IRQn_Handler) + i.MIPI_TX_IRQn_Handler 0x00010ee4 Section 0 irq_redirect .o(i.MIPI_TX_IRQn_Handler) + i.PWMDET_IRQn_Handler 0x00010efc Section 0 irq_redirect .o(i.PWMDET_IRQn_Handler) + i.SPIM_IRQn_Handler 0x00010f18 Section 0 irq_redirect .o(i.SPIM_IRQn_Handler) + i.SPIS_IRQn_Handler 0x00010f34 Section 0 irq_redirect .o(i.SPIS_IRQn_Handler) + i.SWIRE_IRQn_Handler 0x00010f50 Section 0 irq_redirect .o(i.SWIRE_IRQn_Handler) + i.SysTick_Handler 0x00010f6c Section 0 irq_redirect .o(i.SysTick_Handler) + i.TIMER0_IRQn_Handler 0x00010f84 Section 0 irq_redirect .o(i.TIMER0_IRQn_Handler) + i.TIMER1_IRQn_Handler 0x00010f9c Section 0 irq_redirect .o(i.TIMER1_IRQn_Handler) + i.TIMER2_IRQn_Handler 0x00010fb4 Section 0 irq_redirect .o(i.TIMER2_IRQn_Handler) + i.TIMER3_IRQn_Handler 0x00010fcc Section 0 irq_redirect .o(i.TIMER3_IRQn_Handler) + i.UART0_IRQ_Handle 0x00010fe4 Section 0 drv_uart.o(i.UART0_IRQ_Handle) + .ARM.__at_0x11000 0x00011000 Section 20 drv_common.o(.ARM.__at_0x11000) + i.UART_DisableDma 0x00011014 Section 0 drv_uart.o(i.UART_DisableDma) + i.__scatterload_null 0x00011016 Section 2 handlers.o(i.__scatterload_null) + .ARM.__at_0x11018 0x00011018 Section 4 drv_common.o(.ARM.__at_0x11018) + i.S20_Start_init 0x0001101c Section 0 app_tp_transfer.o(i.S20_Start_init) + i.UART_GetInstance 0x00011160 Section 0 drv_uart.o(i.UART_GetInstance) + i.UART_IRQn_Handler 0x00011164 Section 0 irq_redirect .o(i.UART_IRQn_Handler) + i.UART_ResetRxFIFO 0x0001117c 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__NVIC_ClearPendingIRQ 0x000114e1 Thumb Code 18 drv_i2c_master.o(i.__NVIC_ClearPendingIRQ) + i.__NVIC_ClearPendingIRQ 0x000114f8 Section 0 drv_spi_master.o(i.__NVIC_ClearPendingIRQ) + __NVIC_ClearPendingIRQ 0x000114f9 Thumb Code 18 drv_spi_master.o(i.__NVIC_ClearPendingIRQ) + i.__NVIC_DisableIRQ 0x00011510 Section 0 drv_rxbr.o(i.__NVIC_DisableIRQ) + __NVIC_DisableIRQ 0x00011511 Thumb Code 26 drv_rxbr.o(i.__NVIC_DisableIRQ) + i.__NVIC_EnableIRQ 0x00011530 Section 0 drv_rxbr.o(i.__NVIC_EnableIRQ) + __NVIC_EnableIRQ 0x00011531 Thumb Code 18 drv_rxbr.o(i.__NVIC_EnableIRQ) + i.__NVIC_SetPriority 0x00011548 Section 0 hal_spi_slave.o(i.__NVIC_SetPriority) + __NVIC_SetPriority 0x00011549 Thumb Code 60 hal_spi_slave.o(i.__NVIC_SetPriority) + i.__scatterload_copy 0x0001158c Section 14 handlers.o(i.__scatterload_copy) + i.__scatterload_zeroinit 0x0001159a Section 14 handlers.o(i.__scatterload_zeroinit) + i.__set_errno 0x000115a8 Section 0 errno.o(i.__set_errno) + i._fp_digits 0x000115b4 Section 0 printfa.o(i._fp_digits) + _fp_digits 0x000115b5 Thumb Code 344 printfa.o(i._fp_digits) + i._printf_core 0x00011728 Section 0 printfa.o(i._printf_core) + _printf_core 0x00011729 Thumb Code 1754 printfa.o(i._printf_core) + i._printf_post_padding 0x00011e14 Section 0 printfa.o(i._printf_post_padding) + _printf_post_padding 0x00011e15 Thumb Code 32 printfa.o(i._printf_post_padding) + i._printf_pre_padding 0x00011e34 Section 0 printfa.o(i._printf_pre_padding) + _printf_pre_padding 0x00011e35 Thumb Code 44 printfa.o(i._printf_pre_padding) + i._sputc 0x00011e60 Section 0 printfa.o(i._sputc) + _sputc 0x00011e61 Thumb Code 10 printfa.o(i._sputc) + i.ap_dcs_read 0x00011e6c Section 0 ap_demo.o(i.ap_dcs_read) + ap_dcs_read 0x00011e6d Thumb Code 4188 ap_demo.o(i.ap_dcs_read) + i.ap_demo 0x00012ec8 Section 0 ap_demo.o(i.ap_demo) + i.ap_get_reg_ca 0x00013000 Section 0 ap_demo.o(i.ap_get_reg_ca) + ap_get_reg_ca 0x00013001 Thumb Code 36 ap_demo.o(i.ap_get_reg_ca) + i.ap_get_tp_calibration_status_01 0x00013028 Section 0 app_tp_st_touch.o(i.ap_get_tp_calibration_status_01) + i.ap_reset_cb 0x00013048 Section 0 ap_demo.o(i.ap_reset_cb) + ap_reset_cb 0x00013049 Thumb Code 30 ap_demo.o(i.ap_reset_cb) + i.ap_set_backlight 0x00013070 Section 0 ap_demo.o(i.ap_set_backlight) + ap_set_backlight 0x00013071 Thumb Code 672 ap_demo.o(i.ap_set_backlight) + i.ap_set_display_off 0x00013330 Section 0 ap_demo.o(i.ap_set_display_off) + ap_set_display_off 0x00013331 Thumb Code 32 ap_demo.o(i.ap_set_display_off) + i.ap_set_display_on 0x00013354 Section 0 ap_demo.o(i.ap_set_display_on) + ap_set_display_on 0x00013355 Thumb Code 8 ap_demo.o(i.ap_set_display_on) + i.ap_set_enter_sleep_mode 0x00013360 Section 0 ap_demo.o(i.ap_set_enter_sleep_mode) + ap_set_enter_sleep_mode 0x00013361 Thumb Code 46 ap_demo.o(i.ap_set_enter_sleep_mode) + i.ap_set_exit_sleep_mode 0x00013398 Section 0 ap_demo.o(i.ap_set_exit_sleep_mode) + ap_set_exit_sleep_mode 0x00013399 Thumb Code 8 ap_demo.o(i.ap_set_exit_sleep_mode) + i.ap_set_tp_calibration_04 0x000133a4 Section 0 app_tp_st_touch.o(i.ap_set_tp_calibration_04) + i.ap_tp_st_touch_calibration 0x0001343c Section 0 app_tp_st_touch.o(i.ap_tp_st_touch_calibration) + i.ap_tp_st_touch_error_handler_F3 0x000134ec Section 0 app_tp_st_touch.o(i.ap_tp_st_touch_error_handler_F3) + i.ap_tp_st_touch_error_handler_FF 0x000134fa Section 0 app_tp_st_touch.o(i.ap_tp_st_touch_error_handler_FF) + i.ap_tp_st_touch_get_calibration_success_mark 0x0001351c Section 0 app_tp_st_touch.o(i.ap_tp_st_touch_get_calibration_success_mark) + i.ap_tp_st_touch_hardware_reset 0x000135c4 Section 0 app_tp_st_touch.o(i.ap_tp_st_touch_hardware_reset) + i.ap_tp_st_touch_scan_point_init 0x0001364c Section 0 app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_init) + i.ap_tp_st_touch_scan_point_record_event 0x00013668 Section 0 app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_record_event) + i.ap_tp_st_touch_scan_point_record_event_exec 0x000136fc Section 0 app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_record_event_exec) + i.ap_tp_st_touch_simulate_finger_release_event 0x00013730 Section 0 app_tp_st_touch.o(i.ap_tp_st_touch_simulate_finger_release_event) + i.ap_update_frame_rate 0x00013764 Section 0 ap_demo.o(i.ap_update_frame_rate) + ap_update_frame_rate 0x00013765 Thumb Code 40 ap_demo.o(i.ap_update_frame_rate) + i.app_ADC_IRQn_Handler 0x00013790 Section 0 drv_rxbr.o(i.app_ADC_IRQn_Handler) + i.app_AP_NRESET_IRQn_Handler 0x000137ac Section 0 drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) + i.app_EXTI_INT0_IRQn_Handler 0x000137d0 Section 0 drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) + i.app_EXTI_INT1_IRQn_Handler 0x000137ec Section 0 drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) + i.app_EXTI_INT2_IRQn_Handler 0x00013808 Section 0 drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) + i.app_EXTI_INT3_IRQn_Handler 0x00013824 Section 0 drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) + i.app_EXTI_INT4_IRQn_Handler 0x00013840 Section 0 drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) + i.app_EXTI_INT5_IRQn_Handler 0x0001385c Section 0 drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) + i.app_EXTI_INT6_IRQn_Handler 0x00013878 Section 0 drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) + i.app_EXTI_INT7_IRQn_Handler 0x00013894 Section 0 drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) + i.app_HardFault_Handler 0x000138b0 Section 0 drv_common.o(i.app_HardFault_Handler) + i.app_I2C0_IRQn_Handler 0x000138f8 Section 0 drv_i2c_slave.o(i.app_I2C0_IRQn_Handler) + i.app_I2C1_IRQn_Handler 0x00013910 Section 0 drv_i2c_master.o(i.app_I2C1_IRQn_Handler) + i.app_LCDC_IRQn_Handler 0x00013920 Section 0 hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) + i.app_MEMC_IRQn_Handler 0x00013ac4 Section 0 drv_memc.o(i.app_MEMC_IRQn_Handler) + i.app_MIPI_RX_IRQn_Handler 0x00013b4c Section 0 drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) + i.app_MIPI_TX_IRQn_Handler 0x00013de4 Section 0 drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) + i.app_PWMDET_IRQn_Handler 0x00013e84 Section 0 drv_pwm.o(i.app_PWMDET_IRQn_Handler) + i.app_SPIM_IRQn_Handler 0x00013ecc Section 0 drv_spi_master.o(i.app_SPIM_IRQn_Handler) + i.app_SPIS_IRQn_Handler 0x00013efc Section 0 hal_spi_slave.o(i.app_SPIS_IRQn_Handler) + i.app_SWIRE_IRQn_Handler 0x000140fc Section 0 drv_swire.o(i.app_SWIRE_IRQn_Handler) + i.app_SysTick_Handler 0x0001411c Section 0 drv_common.o(i.app_SysTick_Handler) + i.app_TIMER0_IRQn_Handler 0x00014134 Section 0 drv_timer.o(i.app_TIMER0_IRQn_Handler) + i.app_TIMER1_IRQn_Handler 0x0001413e Section 0 drv_timer.o(i.app_TIMER1_IRQn_Handler) + i.app_TIMER2_IRQn_Handler 0x00014148 Section 0 drv_timer.o(i.app_TIMER2_IRQn_Handler) + i.app_TIMER3_IRQn_Handler 0x00014152 Section 0 drv_timer.o(i.app_TIMER3_IRQn_Handler) + i.app_UART_IRQn_Handler 0x0001415c Section 0 drv_uart.o(i.app_UART_IRQn_Handler) + i.app_VIDC_IRQn_Handler 0x00014164 Section 0 drv_vidc.o(i.app_VIDC_IRQn_Handler) + i.app_VPRE_IRQn_Handler 0x00014180 Section 0 drv_rxbr.o(i.app_VPRE_IRQn_Handler) + i.app_WDG_IRQn_Handler 0x0001419c Section 0 drv_wdg.o(i.app_WDG_IRQn_Handler) + i.app_dma_irq_handler 0x000141d4 Section 0 drv_dma.o(i.app_dma_irq_handler) + i.app_fls_ctrl_Handler 0x000141e4 Section 0 norflash.o(i.app_fls_ctrl_Handler) + i.app_tp_I2C_init 0x00014214 Section 0 app_tp_transfer.o(i.app_tp_I2C_init) + i.app_tp_calibration_exec 0x00014238 Section 0 app_tp_st_touch.o(i.app_tp_calibration_exec) + i.app_tp_i2cs_callback 0x00014270 Section 0 app_tp_transfer.o(i.app_tp_i2cs_callback) + app_tp_i2cs_callback 0x00014271 Thumb Code 42 app_tp_transfer.o(i.app_tp_i2cs_callback) + i.app_tp_init 0x000142a0 Section 0 app_tp_transfer.o(i.app_tp_init) + i.app_tp_m_read 0x000142e0 Section 0 app_tp_transfer.o(i.app_tp_m_read) + i.app_tp_m_write 0x00014300 Section 0 app_tp_transfer.o(i.app_tp_m_write) + i.app_tp_phone_analysis_data 0x00014308 Section 0 app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) + i.app_tp_phone_clear_reset_on 0x00014724 Section 0 app_tp_transfer.o(i.app_tp_phone_clear_reset_on) + i.app_tp_s_read 0x00014730 Section 0 app_tp_transfer.o(i.app_tp_s_read) + i.app_tp_s_write 0x00014738 Section 0 app_tp_transfer.o(i.app_tp_s_write) + i.app_tp_screen_analysis_int 0x00014740 Section 0 app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) + i.app_tp_screen_int_callback 0x00014a1c Section 0 app_tp_transfer.o(i.app_tp_screen_int_callback) + app_tp_screen_int_callback 0x00014a1d Thumb Code 8 app_tp_transfer.o(i.app_tp_screen_int_callback) + i.app_tp_transfer_screen_const 0x00014a28 Section 0 app_tp_transfer.o(i.app_tp_transfer_screen_const) + app_tp_transfer_screen_const 0x00014a29 Thumb Code 50 app_tp_transfer.o(i.app_tp_transfer_screen_const) + i.app_tp_transfer_screen_int 0x00014a68 Section 0 app_tp_transfer.o(i.app_tp_transfer_screen_int) + i.app_tp_transfer_screen_start 0x00014bc8 Section 0 app_tp_transfer.o(i.app_tp_transfer_screen_start) + i.board_Init 0x00014be0 Section 0 board.o(i.board_Init) + i.calc_framebuffer_setting 0x00014c04 Section 0 hal_internal_vsync.o(i.calc_framebuffer_setting) + i.ceil 0x000150f4 Section 0 ceil.o(i.ceil) + i.check_mipi_rx_tx_video_info 0x000151bc Section 0 hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) + check_mipi_rx_tx_video_info 0x000151bd Thumb Code 44 hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) + i.check_pkt_buf_rev 0x000151e8 Section 0 hal_internal_vsync.o(i.check_pkt_buf_rev) + check_pkt_buf_rev 0x000151e9 Thumb Code 92 hal_internal_vsync.o(i.check_pkt_buf_rev) + i.dcs_packet_fifo_alloc 0x00015278 Section 0 dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) + i.dcs_packet_fifo_init 0x000152d0 Section 0 dcs_packet_fifo.o(i.dcs_packet_fifo_init) + i.dcs_packet_free_fifo_header 0x000152e8 Section 0 dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) + i.dcs_packet_get_fifo_header 0x0001532c Section 0 dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) + i.dcs_sw_filter 0x00015350 Section 0 hal_internal_vsync.o(i.dcs_sw_filter) + dcs_sw_filter 0x00015351 Thumb Code 36 hal_internal_vsync.o(i.dcs_sw_filter) + i.delayMs 0x0001537c Section 0 tau_delay.o(i.delayMs) + i.delayUs 0x00015394 Section 0 tau_delay.o(i.delayUs) + i.disable_mipi_timer_cb 0x000153b8 Section 0 ap_demo.o(i.disable_mipi_timer_cb) + disable_mipi_timer_cb 0x000153b9 Thumb Code 78 ap_demo.o(i.disable_mipi_timer_cb) + i.drv_ap_rst_trig_edge_detect 0x00015410 Section 0 drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) + i.drv_chip_info_get_info 0x00015448 Section 0 drv_chip_info.o(i.drv_chip_info_get_info) + i.drv_chip_info_init 0x00015454 Section 0 drv_chip_info.o(i.drv_chip_info_init) + i.drv_chip_rx_info_check 0x00015494 Section 0 drv_chip_info.o(i.drv_chip_rx_info_check) + i.drv_chip_rx_init_done 0x00015544 Section 0 drv_chip_info.o(i.drv_chip_rx_init_done) + i.drv_common_enable_systick 0x00015558 Section 0 drv_common.o(i.drv_common_enable_systick) + i.drv_common_system_init 0x000155b0 Section 0 drv_common.o(i.drv_common_system_init) + i.drv_crgu_config_reset_modules 0x000155b8 Section 0 drv_crgu.o(i.drv_crgu_config_reset_modules) + i.drv_crgu_set_ahb_pre_div 0x000155c8 Section 0 drv_crgu.o(i.drv_crgu_set_ahb_pre_div) + i.drv_crgu_set_ahb_src 0x000155dc Section 0 drv_crgu.o(i.drv_crgu_set_ahb_src) + i.drv_crgu_set_clock 0x000155f0 Section 0 drv_crgu.o(i.drv_crgu_set_clock) + i.drv_crgu_set_dpi_mux_src 0x00015610 Section 0 drv_crgu.o(i.drv_crgu_set_dpi_mux_src) + i.drv_crgu_set_dpi_pre_div 0x00015624 Section 0 drv_crgu.o(i.drv_crgu_set_dpi_pre_div) + i.drv_crgu_set_dpi_pre_src 0x0001563c Section 0 drv_crgu.o(i.drv_crgu_set_dpi_pre_src) + i.drv_crgu_set_dsc_core_div 0x00015650 Section 0 drv_crgu.o(i.drv_crgu_set_dsc_core_div) + i.drv_crgu_set_dsco_src 0x00015664 Section 0 drv_crgu.o(i.drv_crgu_set_dsco_src) + i.drv_crgu_set_dsco_src_div 0x00015678 Section 0 drv_crgu.o(i.drv_crgu_set_dsco_src_div) + i.drv_crgu_set_fb_div 0x0001568c Section 0 drv_crgu.o(i.drv_crgu_set_fb_div) + i.drv_crgu_set_fb_src 0x000156a0 Section 0 drv_crgu.o(i.drv_crgu_set_fb_src) + i.drv_crgu_set_lcdc_div 0x000156b4 Section 0 drv_crgu.o(i.drv_crgu_set_lcdc_div) + i.drv_crgu_set_lcdc_src 0x000156c8 Section 0 drv_crgu.o(i.drv_crgu_set_lcdc_src) + i.drv_crgu_set_mipi_cfg_src 0x000156dc Section 0 drv_crgu.o(i.drv_crgu_set_mipi_cfg_src) + i.drv_crgu_set_mipi_ref_src 0x000156f0 Section 0 drv_crgu.o(i.drv_crgu_set_mipi_ref_src) + i.drv_crgu_set_reset 0x00015708 Section 0 drv_crgu.o(i.drv_crgu_set_reset) + i.drv_crgu_set_rxbr_div 0x00015720 Section 0 drv_crgu.o(i.drv_crgu_set_rxbr_div) + i.drv_crgu_set_rxbr_src 0x00015734 Section 0 drv_crgu.o(i.drv_crgu_set_rxbr_src) + i.drv_crgu_set_vidc_src 0x00015748 Section 0 drv_crgu.o(i.drv_crgu_set_vidc_src) + i.drv_dma_clear_flag 0x0001575c Section 0 drv_dma.o(i.drv_dma_clear_flag) + i.drv_dma_create_handle 0x00015774 Section 0 drv_dma.o(i.drv_dma_create_handle) + i.drv_dma_disenable_channel 0x00015790 Section 0 drv_dma.o(i.drv_dma_disenable_channel) + i.drv_dma_enable_channel 0x000157a0 Section 0 drv_dma.o(i.drv_dma_enable_channel) + i.drv_dma_enable_channel_interrupts 0x000157b0 Section 0 drv_dma.o(i.drv_dma_enable_channel_interrupts) + i.drv_dma_get_channel_flag 0x000157d4 Section 0 drv_dma.o(i.drv_dma_get_channel_flag) + i.drv_dma_irq_handler 0x000157e0 Section 0 drv_dma.o(i.drv_dma_irq_handler) + i.drv_dma_prepar_transfer 0x00015870 Section 0 drv_dma.o(i.drv_dma_prepar_transfer) + i.drv_dma_set_burst 0x00015882 Section 0 drv_dma.o(i.drv_dma_set_burst) + i.drv_dma_set_callback 0x0001589c Section 0 drv_dma.o(i.drv_dma_set_callback) + i.drv_dma_set_transfer 0x000158a4 Section 0 drv_dma.o(i.drv_dma_set_transfer) + i.drv_dsc_dec_convert_pps_rc_parameter 0x000158e8 Section 0 drv_dsc_dec.o(i.drv_dsc_dec_convert_pps_rc_parameter) + i.drv_dsc_dec_disable 0x0001591e Section 0 drv_dsc_dec.o(i.drv_dsc_dec_disable) + i.drv_dsc_dec_enable 0x0001592c Section 0 drv_dsc_dec.o(i.drv_dsc_dec_enable) + i.drv_dsc_dec_get_nslc 0x000159a0 Section 0 drv_dsc_dec.o(i.drv_dsc_dec_get_nslc) + i.drv_dsc_dec_set_u8_pps 0x000159aa Section 0 drv_dsc_dec.o(i.drv_dsc_dec_set_u8_pps) + i.drv_dsi_rx_calc_ipi_tx_delay 0x000159d4 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) + i.drv_dsi_rx_enable_irq 0x00015ad8 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) + i.drv_dsi_rx_get_color_bpp 0x00015b18 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) + drv_dsi_rx_get_color_bpp 0x00015b19 Thumb Code 62 drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) + i.drv_dsi_rx_get_color_pcc 0x00015b68 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_color_pcc) + drv_dsi_rx_get_color_pcc 0x00015b69 Thumb Code 24 drv_dsi_rx.o(i.drv_dsi_rx_get_color_pcc) + i.drv_dsi_rx_get_compression_en 0x00015b84 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) + i.drv_dsi_rx_get_max_ret_size 0x00015b8c Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_max_ret_size) + i.drv_dsi_rx_power_up 0x00015b92 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_power_up) + i.drv_dsi_rx_set_ctrl_cfg 0x00015ba0 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_ctrl_cfg) + i.drv_dsi_rx_set_ddi_cfg 0x00015bc0 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) + i.drv_dsi_rx_set_inten 0x00015bd0 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_inten) + i.drv_dsi_rx_set_ipi_cfg 0x00015bd4 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_cfg) + i.drv_dsi_rx_set_lane_swap 0x00015be4 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_lane_swap) + i.drv_dsi_rx_set_resp_cnt 0x00015c2a Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_resp_cnt) + i.drv_dsi_rx_set_up_phy 0x00015c50 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) + i.drv_dsi_rx_shut_down 0x00015d54 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_shut_down) + i.drv_dsi_tx_command_header 0x00015d62 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_command_header) + i.drv_dsi_tx_command_mode_cfg 0x00015d76 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) + i.drv_dsi_tx_command_put_payload 0x00015de2 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) + i.drv_dsi_tx_config_eotp 0x00015de6 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) + i.drv_dsi_tx_config_int 0x00015dfe Section 0 drv_dsi_tx.o(i.drv_dsi_tx_config_int) + i.drv_dsi_tx_dpi_lpcmd_time 0x00015e06 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_dpi_lpcmd_time) + i.drv_dsi_tx_dpi_mode 0x00015e0e Section 0 drv_dsi_tx.o(i.drv_dsi_tx_dpi_mode) + i.drv_dsi_tx_dpi_polarity 0x00015e18 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_dpi_polarity) + i.drv_dsi_tx_edpi_cmd_size 0x00015e3c Section 0 drv_dsi_tx.o(i.drv_dsi_tx_edpi_cmd_size) + i.drv_dsi_tx_get_cmd_status 0x00015e40 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) + i.drv_dsi_tx_mode 0x00015e44 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_mode) + i.drv_dsi_tx_phy_clock_lane_auto_lp 0x00015e48 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_auto_lp) + i.drv_dsi_tx_phy_clock_lane_req_hs 0x00015e60 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) + i.drv_dsi_tx_phy_lane_mode 0x00015e7a Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_lane_mode) + i.drv_dsi_tx_phy_status_ready 0x00015e86 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ready) + i.drv_dsi_tx_phy_status_stopstate 0x00015eea Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) + i.drv_dsi_tx_phy_test_setup 0x00015f28 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) + i.drv_dsi_tx_phy_time_cfg 0x0001605c Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_time_cfg) + i.drv_dsi_tx_powerup 0x0001607a Section 0 drv_dsi_tx.o(i.drv_dsi_tx_powerup) + i.drv_dsi_tx_response_mode 0x00016082 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_response_mode) + i.drv_dsi_tx_set_bta_ack 0x0001609e Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_bta_ack) + i.drv_dsi_tx_set_esc_div 0x000160b6 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) + i.drv_dsi_tx_set_int 0x000160c4 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_int) + i.drv_dsi_tx_set_time_out_div 0x00016104 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_time_out_div) + i.drv_dsi_tx_set_video_chunk 0x00016114 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_video_chunk) + i.drv_dsi_tx_set_video_timing 0x0001611c Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_video_timing) + i.drv_dsi_tx_shutdown 0x0001613e Section 0 drv_dsi_tx.o(i.drv_dsi_tx_shutdown) + i.drv_dsi_tx_timeout_cfg 0x00016146 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_timeout_cfg) + i.drv_dsi_tx_video_mode_cfg 0x0001616c Section 0 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_cfg) + i.drv_dsi_tx_video_mode_disable_hact_cmd 0x00016216 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_disable_hact_cmd) + i.drv_dsi_tx_video_mode_set_lp_cmd 0x0001622c Section 0 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_set_lp_cmd) + i.drv_efuse_enter_inactive 0x00016244 Section 0 drv_efuse.o(i.drv_efuse_enter_inactive) + i.drv_efuse_int_enable 0x00016272 Section 0 drv_efuse.o(i.drv_efuse_int_enable) + i.drv_efuse_read 0x0001627e Section 0 drv_efuse.o(i.drv_efuse_read) + i.drv_efuse_read_req 0x000162b0 Section 0 drv_efuse.o(i.drv_efuse_read_req) + i.drv_gpio_get_input_data 0x000162c8 Section 0 drv_gpio.o(i.drv_gpio_get_input_data) + i.drv_gpio_register_ap_reset_callback 0x000162e0 Section 0 drv_gpio.o(i.drv_gpio_register_ap_reset_callback) + i.drv_gpio_register_callback 0x000162ec Section 0 drv_gpio.o(i.drv_gpio_register_callback) + i.drv_gpio_set_int 0x00016300 Section 0 drv_gpio.o(i.drv_gpio_set_int) + i.drv_gpio_set_ioe 0x00016350 Section 0 drv_gpio.o(i.drv_gpio_set_ioe) + i.drv_gpio_set_mode0 0x00016370 Section 0 drv_gpio.o(i.drv_gpio_set_mode0) + i.drv_gpio_set_mode1 0x00016380 Section 0 drv_gpio.o(i.drv_gpio_set_mode1) + i.drv_gpio_set_mode2 0x00016390 Section 0 drv_gpio.o(i.drv_gpio_set_mode2) + i.drv_gpio_set_mode3 0x000163a0 Section 0 drv_gpio.o(i.drv_gpio_set_mode3) + i.drv_gpio_set_output_data 0x000163b0 Section 0 hal_gpio.o(i.drv_gpio_set_output_data) + drv_gpio_set_output_data 0x000163b1 Thumb Code 26 hal_gpio.o(i.drv_gpio_set_output_data) + i.drv_gpio_set_pull_state 0x000163d0 Section 0 drv_gpio.o(i.drv_gpio_set_pull_state) + i.drv_i2c0_set_callback 0x00016500 Section 0 drv_i2c_slave.o(i.drv_i2c0_set_callback) + i.drv_i2c1_set_callback 0x0001650c Section 0 drv_i2c_master.o(i.drv_i2c1_set_callback) + i.drv_i2c_dma_callback 0x00016518 Section 0 drv_i2c_dma.o(i.drv_i2c_dma_callback) + drv_i2c_dma_callback 0x00016519 Thumb Code 40 drv_i2c_dma.o(i.drv_i2c_dma_callback) + i.drv_i2c_dma_init 0x0001654c Section 0 drv_i2c_dma.o(i.drv_i2c_dma_init) + i.drv_i2c_enable_rx_dma 0x000165f8 Section 0 drv_i2c_dma.o(i.drv_i2c_enable_rx_dma) + i.drv_i2c_enable_tx_dma 0x00016612 Section 0 drv_i2c_dma.o(i.drv_i2c_enable_tx_dma) + i.drv_i2c_m_clear_it_pending_bit 0x0001662c Section 0 drv_i2c_master.o(i.drv_i2c_m_clear_it_pending_bit) + i.drv_i2c_m_enable 0x0001668c Section 0 drv_i2c_master.o(i.drv_i2c_m_enable) + i.drv_i2c_m_enable_intr 0x0001669c Section 0 drv_i2c_master.o(i.drv_i2c_m_enable_intr) + i.drv_i2c_master_init 0x000166d4 Section 0 drv_i2c_master.o(i.drv_i2c_master_init) + i.drv_i2c_master_read_dma 0x00016760 Section 0 drv_i2c_dma.o(i.drv_i2c_master_read_dma) + i.drv_i2c_master_write_dma 0x000167bc Section 0 drv_i2c_dma.o(i.drv_i2c_master_write_dma) + i.drv_i2c_master_write_read_cmd 0x000167f8 Section 0 drv_i2c_dma.o(i.drv_i2c_master_write_read_cmd) + drv_i2c_master_write_read_cmd 0x000167f9 Thumb Code 62 drv_i2c_dma.o(i.drv_i2c_master_write_read_cmd) + i.drv_i2c_s_clear_it_pending_bit 0x00016836 Section 0 drv_i2c_slave.o(i.drv_i2c_s_clear_it_pending_bit) + i.drv_i2c_s_config_intr 0x00016878 Section 0 drv_i2c_slave.o(i.drv_i2c_s_config_intr) + i.drv_i2c_s_enable 0x0001687c Section 0 drv_i2c_slave.o(i.drv_i2c_s_enable) + i.drv_i2c_s_get_fifo_status 0x00016884 Section 0 drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) + i.drv_i2c_s_set_intr 0x00016898 Section 0 drv_i2c_slave.o(i.drv_i2c_s_set_intr) + i.drv_i2c_s_write_data 0x000168e8 Section 0 drv_i2c_slave.o(i.drv_i2c_s_write_data) + i.drv_i2c_set_dma_irq_callback 0x00016904 Section 0 drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) + i.drv_i2c_slave_init 0x0001695c Section 0 drv_i2c_slave.o(i.drv_i2c_slave_init) + i.drv_i2c_slave_write_dma 0x00016990 Section 0 drv_i2c_dma.o(i.drv_i2c_slave_write_dma) + i.drv_lcdc_config_bypass 0x000169a8 Section 0 drv_lcdc.o(i.drv_lcdc_config_bypass) + i.drv_lcdc_config_ccm 0x000169c0 Section 0 drv_lcdc.o(i.drv_lcdc_config_ccm) + i.drv_lcdc_config_disp_mode 0x000169f0 Section 0 drv_lcdc.o(i.drv_lcdc_config_disp_mode) + i.drv_lcdc_config_dpi_polarity 0x00016a06 Section 0 drv_lcdc.o(i.drv_lcdc_config_dpi_polarity) + i.drv_lcdc_config_dpi_timing 0x00016a2a Section 0 drv_lcdc.o(i.drv_lcdc_config_dpi_timing) + i.drv_lcdc_config_edpi_mode 0x00016a50 Section 0 drv_lcdc.o(i.drv_lcdc_config_edpi_mode) + i.drv_lcdc_config_endianness 0x00016a66 Section 0 drv_lcdc.o(i.drv_lcdc_config_endianness) + i.drv_lcdc_config_input_size 0x00016a7c Section 0 drv_lcdc.o(i.drv_lcdc_config_input_size) + i.drv_lcdc_config_int 0x00016a88 Section 0 drv_lcdc.o(i.drv_lcdc_config_int) + i.drv_lcdc_config_int_single 0x00016aa6 Section 0 drv_lcdc.o(i.drv_lcdc_config_int_single) + i.drv_lcdc_config_overwrite 0x00016ac8 Section 0 drv_lcdc.o(i.drv_lcdc_config_overwrite) + i.drv_lcdc_config_overwrite_rgb 0x00016aea Section 0 drv_lcdc.o(i.drv_lcdc_config_overwrite_rgb) + i.drv_lcdc_config_partial_display_area 0x00016af6 Section 0 drv_lcdc.o(i.drv_lcdc_config_partial_display_area) + i.drv_lcdc_config_partial_display_enable 0x00016b10 Section 0 drv_lcdc.o(i.drv_lcdc_config_partial_display_enable) + i.drv_lcdc_config_scale_up_coef 0x00016b32 Section 0 drv_lcdc.o(i.drv_lcdc_config_scale_up_coef) + i.drv_lcdc_config_scale_up_step 0x00016b4c Section 0 drv_lcdc.o(i.drv_lcdc_config_scale_up_step) + i.drv_lcdc_config_src_parameter 0x00016b58 Section 0 drv_lcdc.o(i.drv_lcdc_config_src_parameter) + i.drv_lcdc_config_thresh 0x00016ba4 Section 0 drv_lcdc.o(i.drv_lcdc_config_thresh) + i.drv_lcdc_ctrl_flow 0x00016baa Section 0 drv_lcdc.o(i.drv_lcdc_ctrl_flow) + i.drv_lcdc_enable_shadow_reg 0x00016bbc Section 0 drv_lcdc.o(i.drv_lcdc_enable_shadow_reg) + i.drv_lcdc_set_int 0x00016bdc Section 0 drv_lcdc.o(i.drv_lcdc_set_int) + i.drv_lcdc_set_prefetch 0x00016c1c Section 0 drv_lcdc.o(i.drv_lcdc_set_prefetch) + i.drv_lcdc_set_video_hw_mode 0x00016c34 Section 0 drv_lcdc.o(i.drv_lcdc_set_video_hw_mode) + i.drv_lcdc_start 0x00016c48 Section 0 drv_lcdc.o(i.drv_lcdc_start) + i.drv_memc_clear_status 0x00016c68 Section 0 drv_memc.o(i.drv_memc_clear_status) + i.drv_memc_enable_irq 0x00016c74 Section 0 drv_memc.o(i.drv_memc_enable_irq) + i.drv_memc_gen_a_tear_signal 0x00016cb4 Section 0 drv_memc.o(i.drv_memc_gen_a_tear_signal) + i.drv_memc_get_status 0x00016cc0 Section 0 drv_memc.o(i.drv_memc_get_status) + i.drv_memc_rate_transfer_sel 0x00016cd2 Section 0 drv_memc.o(i.drv_memc_rate_transfer_sel) + i.drv_memc_sel_vsync 0x00016ce2 Section 0 drv_memc.o(i.drv_memc_sel_vsync) + i.drv_memc_set_active_height 0x00016cf0 Section 0 drv_memc.o(i.drv_memc_set_active_height) + i.drv_memc_set_data_mode 0x00016d04 Section 0 drv_memc.o(i.drv_memc_set_data_mode) + i.drv_memc_set_double_buffer 0x00016d10 Section 0 drv_memc.o(i.drv_memc_set_double_buffer) + i.drv_memc_set_double_buffer_reverse 0x00016d20 Section 0 drv_memc.o(i.drv_memc_set_double_buffer_reverse) + i.drv_memc_set_fs_en_conditions 0x00016d32 Section 0 drv_memc.o(i.drv_memc_set_fs_en_conditions) + i.drv_memc_set_inten 0x00016d42 Section 0 drv_memc.o(i.drv_memc_set_inten) + i.drv_memc_set_lcdc_st_conditions 0x00016d58 Section 0 drv_memc.o(i.drv_memc_set_lcdc_st_conditions) + i.drv_memc_set_ltpo_mode 0x00016d70 Section 0 drv_memc.o(i.drv_memc_set_ltpo_mode) + i.drv_memc_set_tear_mode 0x00016d8a Section 0 drv_memc.o(i.drv_memc_set_tear_mode) + i.drv_memc_set_tear_waveform 0x00016d98 Section 0 drv_memc.o(i.drv_memc_set_tear_waveform) + i.drv_memc_set_vidc_sync_cnt 0x00016dc0 Section 0 drv_memc.o(i.drv_memc_set_vidc_sync_cnt) + i.drv_param_init_get_ccm 0x00016dd0 Section 0 drv_param_init.o(i.drv_param_init_get_ccm) + i.drv_param_init_get_scld_filter_h 0x00016dd8 Section 0 drv_param_init.o(i.drv_param_init_get_scld_filter_h) + i.drv_param_init_get_scld_filter_v 0x00016dec Section 0 drv_param_init.o(i.drv_param_init_get_scld_filter_v) + i.drv_param_init_get_sclu_filter 0x00016e00 Section 0 drv_param_init.o(i.drv_param_init_get_sclu_filter) + i.drv_param_init_set_ccm 0x00016e08 Section 0 drv_param_init.o(i.drv_param_init_set_ccm) + i.drv_param_p2r_filter_init 0x00016e1c Section 0 drv_param_init.o(i.drv_param_p2r_filter_init) + i.drv_phy_enable_calibration 0x00016e40 Section 0 drv_phy_common.o(i.drv_phy_enable_calibration) + i.drv_phy_get_calibration 0x00016e50 Section 0 drv_phy_common.o(i.drv_phy_get_calibration) + i.drv_phy_get_pll_para 0x00016e8c Section 0 drv_phy_common.o(i.drv_phy_get_pll_para) + i.drv_phy_get_rate_para 0x00016eec Section 0 drv_phy_common.o(i.drv_phy_get_rate_para) + i.drv_phy_test_clear 0x00016f40 Section 0 drv_phy_common.o(i.drv_phy_test_clear) + i.drv_phy_test_lock 0x00016f50 Section 0 drv_phy_common.o(i.drv_phy_test_lock) + i.drv_phy_test_write_1_byte 0x00016f68 Section 0 drv_phy_common.o(i.drv_phy_test_write_1_byte) + i.drv_phy_test_write_2_byte 0x00016f88 Section 0 drv_phy_common.o(i.drv_phy_test_write_2_byte) + i.drv_phy_test_write_code 0x00016fae Section 0 drv_phy_common.o(i.drv_phy_test_write_code) + i.drv_phy_test_write_data 0x00016fcc Section 0 drv_phy_common.o(i.drv_phy_test_write_data) + drv_phy_test_write_data 0x00016fcd Thumb Code 32 drv_phy_common.o(i.drv_phy_test_write_data) + i.drv_pwr_set_cp_mode 0x00016fec Section 0 drv_pwr.o(i.drv_pwr_set_cp_mode) + i.drv_pwr_set_pvd_mode 0x0001700c Section 0 drv_pwr.o(i.drv_pwr_set_pvd_mode) + i.drv_pwr_set_system_clk_src 0x00017024 Section 0 drv_pwr.o(i.drv_pwr_set_system_clk_src) + i.drv_rx_phy_test_clear 0x0001705c Section 0 drv_dsi_rx.o(i.drv_rx_phy_test_clear) + drv_rx_phy_test_clear 0x0001705d Thumb Code 12 drv_dsi_rx.o(i.drv_rx_phy_test_clear) + i.drv_rx_phy_test_lock 0x00017068 Section 0 drv_dsi_rx.o(i.drv_rx_phy_test_lock) + drv_rx_phy_test_lock 0x00017069 Thumb Code 16 drv_dsi_rx.o(i.drv_rx_phy_test_lock) + i.drv_rx_phy_test_write_1_byte 0x00017078 Section 0 drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) + drv_rx_phy_test_write_1_byte 0x00017079 Thumb Code 20 drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) + i.drv_rx_phy_test_write_2_byte 0x0001708c Section 0 drv_dsi_rx.o(i.drv_rx_phy_test_write_2_byte) + drv_rx_phy_test_write_2_byte 0x0001708d Thumb Code 22 drv_dsi_rx.o(i.drv_rx_phy_test_write_2_byte) + i.drv_rxbr_clear_pkt_buffer 0x000170a2 Section 0 drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) + i.drv_rxbr_clear_status0 0x000170ac Section 0 drv_rxbr.o(i.drv_rxbr_clear_status0) + i.drv_rxbr_enable_irq 0x000170b0 Section 0 drv_rxbr.o(i.drv_rxbr_enable_irq) + i.drv_rxbr_frame_drop_cfg 0x0001710c Section 0 drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) + i.drv_rxbr_get_clk 0x00017120 Section 0 drv_rxbr.o(i.drv_rxbr_get_clk) + i.drv_rxbr_get_col_addr 0x00017184 Section 0 drv_rxbr.o(i.drv_rxbr_get_col_addr) + i.drv_rxbr_get_int_source 0x00017188 Section 0 hal_internal_vsync.o(i.drv_rxbr_get_int_source) + drv_rxbr_get_int_source 0x00017189 Thumb Code 18 hal_internal_vsync.o(i.drv_rxbr_get_int_source) + i.drv_rxbr_get_page_addr 0x0001719a Section 0 drv_rxbr.o(i.drv_rxbr_get_page_addr) + i.drv_rxbr_get_status0 0x0001719e Section 0 hal_internal_vsync.o(i.drv_rxbr_get_status0) + drv_rxbr_get_status0 0x0001719f Thumb Code 18 hal_internal_vsync.o(i.drv_rxbr_get_status0) + i.drv_rxbr_hline_rcv0_cfg 0x000171b0 Section 0 drv_rxbr.o(i.drv_rxbr_hline_rcv0_cfg) + i.drv_rxbr_hline_rcv_cfg 0x000171bc Section 0 drv_rxbr.o(i.drv_rxbr_hline_rcv_cfg) + i.drv_rxbr_register_irq0_callback 0x000171c4 Section 0 drv_rxbr.o(i.drv_rxbr_register_irq0_callback) + i.drv_rxbr_register_irq1_callback 0x000171d0 Section 0 drv_rxbr.o(i.drv_rxbr_register_irq1_callback) + i.drv_rxbr_set_ack_pkt_header 0x000171dc Section 0 drv_rxbr.o(i.drv_rxbr_set_ack_pkt_header) + i.drv_rxbr_set_cmd_filter 0x000171f0 Section 0 drv_rxbr.o(i.drv_rxbr_set_cmd_filter) + i.drv_rxbr_set_color_format 0x000172bc Section 0 drv_rxbr.o(i.drv_rxbr_set_color_format) + i.drv_rxbr_set_inten 0x000172d0 Section 0 drv_rxbr.o(i.drv_rxbr_set_inten) + i.drv_rxbr_set_ltpo_drop_th 0x000172e4 Section 0 drv_rxbr.o(i.drv_rxbr_set_ltpo_drop_th) + i.drv_rxbr_set_usr_cfg 0x000172f4 Section 0 drv_rxbr.o(i.drv_rxbr_set_usr_cfg) + i.drv_rxbr_set_usr_col 0x0001731a Section 0 drv_rxbr.o(i.drv_rxbr_set_usr_col) + i.drv_rxbr_set_usr_row 0x00017322 Section 0 drv_rxbr.o(i.drv_rxbr_set_usr_row) + i.drv_spi_m_read_data 0x0001732c Section 0 drv_spi_master.o(i.drv_spi_m_read_data) + i.drv_swire_set_int 0x0001734c Section 0 drv_swire.o(i.drv_swire_set_int) + i.drv_swire_set_power_down 0x000173a0 Section 0 drv_swire.o(i.drv_swire_set_power_down) + i.drv_sys_cfg_clear_all_int 0x000173bc Section 0 drv_sys_cfg.o(i.drv_sys_cfg_clear_all_int) + i.drv_sys_cfg_clear_pending 0x000173c8 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) + i.drv_sys_cfg_sel_ap_rst_lvl_trig 0x000173f0 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_lvl_trig) + i.drv_sys_cfg_sel_ap_rst_trig 0x00017408 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) + i.drv_sys_cfg_sel_gpio_group 0x00017424 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_gpio_group) + i.drv_sys_cfg_sel_int_trig 0x00017448 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_int_trig) + i.drv_sys_cfg_set_dma_rx_req 0x0001746c Section 0 drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) + i.drv_sys_cfg_set_dma_tx_req 0x0001747c Section 0 drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) + i.drv_sys_cfg_set_int 0x0001748c Section 0 drv_sys_cfg.o(i.drv_sys_cfg_set_int) + i.drv_timer_clear_status_flags 0x000174b0 Section 0 drv_timer.o(i.drv_timer_clear_status_flags) + drv_timer_clear_status_flags 0x000174b1 Thumb Code 26 drv_timer.o(i.drv_timer_clear_status_flags) + i.drv_timer_enable 0x000174ca Section 0 drv_timer.o(i.drv_timer_enable) + i.drv_timer_get_instance 0x000174ec Section 0 drv_timer.o(i.drv_timer_get_instance) + i.drv_timer_get_prescaler 0x000174fc Section 0 drv_timer.o(i.drv_timer_get_prescaler) + i.drv_timer_handle_interrupt 0x0001750c Section 0 drv_timer.o(i.drv_timer_handle_interrupt) + drv_timer_handle_interrupt 0x0001750d Thumb Code 62 drv_timer.o(i.drv_timer_handle_interrupt) + i.drv_timer_register_callback 0x00017550 Section 0 drv_timer.o(i.drv_timer_register_callback) + i.drv_timer_set_compare_val 0x00017564 Section 0 drv_timer.o(i.drv_timer_set_compare_val) + i.drv_timer_set_int 0x00017574 Section 0 drv_timer.o(i.drv_timer_set_int) + i.drv_timer_set_prescaler 0x000175c8 Section 0 drv_timer.o(i.drv_timer_set_prescaler) + i.drv_tx_phy_test_clear 0x000175f0 Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_clear) + drv_tx_phy_test_clear 0x000175f1 Thumb Code 10 drv_dsi_tx.o(i.drv_tx_phy_test_clear) + i.drv_tx_phy_test_enter 0x000175fa Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_enter) + i.drv_tx_phy_test_exit 0x00017616 Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_exit) + i.drv_tx_phy_test_write_1_byte 0x00017632 Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) + drv_tx_phy_test_write_1_byte 0x00017633 Thumb Code 18 drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) + i.drv_tx_phy_test_write_2_byte 0x00017644 Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_write_2_byte) + drv_tx_phy_test_write_2_byte 0x00017645 Thumb Code 20 drv_dsi_tx.o(i.drv_tx_phy_test_write_2_byte) + i.drv_tx_phy_test_write_code 0x00017658 Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_write_code) + drv_tx_phy_test_write_code 0x00017659 Thumb Code 16 drv_dsi_tx.o(i.drv_tx_phy_test_write_code) + i.drv_vidc_clear_irq 0x00017668 Section 0 drv_vidc.o(i.drv_vidc_clear_irq) + i.drv_vidc_enable 0x00017670 Section 0 drv_vidc.o(i.drv_vidc_enable) + i.drv_vidc_enable_irq 0x00017688 Section 0 drv_vidc.o(i.drv_vidc_enable_irq) + i.drv_vidc_get_irq_status 0x000176c8 Section 0 drv_vidc.o(i.drv_vidc_get_irq_status) + i.drv_vidc_init_module_enable 0x000176dc Section 0 drv_vidc.o(i.drv_vidc_init_module_enable) + i.drv_vidc_register_callback 0x00017704 Section 0 drv_vidc.o(i.drv_vidc_register_callback) + i.drv_vidc_reset 0x00017710 Section 0 drv_vidc.o(i.drv_vidc_reset) + i.drv_vidc_set_dst_parameter 0x00017716 Section 0 drv_vidc.o(i.drv_vidc_set_dst_parameter) + i.drv_vidc_set_irqen 0x00017752 Section 0 drv_vidc.o(i.drv_vidc_set_irqen) + i.drv_vidc_set_mirror 0x00017766 Section 0 drv_vidc.o(i.drv_vidc_set_mirror) + i.drv_vidc_set_p2r_hcoef0 0x00017776 Section 0 drv_vidc.o(i.drv_vidc_set_p2r_hcoef0) + i.drv_vidc_set_p2r_hinitb 0x0001777e Section 0 drv_vidc.o(i.drv_vidc_set_p2r_hinitb) + i.drv_vidc_set_p2r_hinitr 0x000177a4 Section 0 drv_vidc.o(i.drv_vidc_set_p2r_hinitr) + i.drv_vidc_set_pentile_swap 0x000177cc Section 0 drv_vidc.o(i.drv_vidc_set_pentile_swap) + i.drv_vidc_set_pu_ctrl 0x000177e4 Section 0 drv_vidc.o(i.drv_vidc_set_pu_ctrl) + i.drv_vidc_set_rotation 0x000177ee Section 0 drv_vidc.o(i.drv_vidc_set_rotation) + i.drv_vidc_set_scld_hcoef0 0x000177fe Section 0 drv_vidc.o(i.drv_vidc_set_scld_hcoef0) + i.drv_vidc_set_scld_hcoef1 0x00017808 Section 0 drv_vidc.o(i.drv_vidc_set_scld_hcoef1) + i.drv_vidc_set_scld_step 0x00017812 Section 0 drv_vidc.o(i.drv_vidc_set_scld_step) + i.drv_vidc_set_scld_vcoef0 0x00017824 Section 0 drv_vidc.o(i.drv_vidc_set_scld_vcoef0) + i.drv_vidc_set_scld_vcoef1 0x0001782e Section 0 drv_vidc.o(i.drv_vidc_set_scld_vcoef1) + i.drv_vidc_set_src_parameter 0x00017838 Section 0 drv_vidc.o(i.drv_vidc_set_src_parameter) + i.drv_wdg_clear_counter 0x00017850 Section 0 drv_wdg.o(i.drv_wdg_clear_counter) + i.drv_wdg_clear_edge_flag 0x00017860 Section 0 drv_wdg.o(i.drv_wdg_clear_edge_flag) + drv_wdg_clear_edge_flag 0x00017861 Thumb Code 12 drv_wdg.o(i.drv_wdg_clear_edge_flag) + i.drv_wdg_read_edge_flag 0x00017870 Section 0 drv_wdg.o(i.drv_wdg_read_edge_flag) + drv_wdg_read_edge_flag 0x00017871 Thumb Code 10 drv_wdg.o(i.drv_wdg_read_edge_flag) + i.drv_wdg_set_int 0x00017880 Section 0 drv_wdg.o(i.drv_wdg_set_int) + i.fls_clr_interrupt_flag 0x000178c0 Section 0 drv_fls.o(i.fls_clr_interrupt_flag) + i.fputc 0x000178ca Section 0 tau_log.o(i.fputc) + i.hal_dsi_rx_ctrl_create_handle 0x000178e0 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) + i.hal_dsi_rx_ctrl_deinit 0x00017914 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) + i.hal_dsi_rx_ctrl_dsc_async_handler 0x000179b0 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) + i.hal_dsi_rx_ctrl_gen_a_tear_signal 0x00017a34 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) + i.hal_dsi_rx_ctrl_get_max_ret_size 0x00017a5c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) + i.hal_dsi_rx_ctrl_hight_performan_mode 0x00017a84 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) + i.hal_dsi_rx_ctrl_init 0x00017ae8 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) + i.hal_dsi_rx_ctrl_init_clk 0x00017b80 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) + hal_dsi_rx_ctrl_init_clk 0x00017b81 Thumb Code 332 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) + i.hal_dsi_rx_ctrl_init_dsi_rx 0x00017d24 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) + hal_dsi_rx_ctrl_init_dsi_rx 0x00017d25 Thumb Code 184 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) + i.hal_dsi_rx_ctrl_init_memc 0x00017dfc Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) + hal_dsi_rx_ctrl_init_memc 0x00017dfd Thumb Code 334 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) + i.hal_dsi_rx_ctrl_init_rxbr 0x00017f54 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) + hal_dsi_rx_ctrl_init_rxbr 0x00017f55 Thumb Code 312 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) + i.hal_dsi_rx_ctrl_init_vidc 0x0001809c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) + hal_dsi_rx_ctrl_init_vidc 0x0001809d Thumb Code 544 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) + i.hal_dsi_rx_ctrl_pre_init_pps 0x000182c8 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_pre_init_pps) + i.hal_dsi_rx_ctrl_send_ack_cmd 0x00018304 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) + i.hal_dsi_rx_ctrl_set_cus_sync_line 0x000183f4 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) + i.hal_dsi_rx_ctrl_set_hw_tear_mode 0x00018428 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode) + i.hal_dsi_rx_ctrl_set_ipi_cfg 0x0001845c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) + hal_dsi_rx_ctrl_set_ipi_cfg 0x0001845d Thumb Code 50 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) + i.hal_dsi_rx_ctrl_set_rxbr_clk 0x00018494 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) + hal_dsi_rx_ctrl_set_rxbr_clk 0x00018495 Thumb Code 114 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) + i.hal_dsi_rx_ctrl_set_sw_tear_mode 0x00018508 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) + i.hal_dsi_rx_ctrl_set_tear_mode_ex 0x0001853c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_tear_mode_ex) + i.hal_dsi_rx_ctrl_start 0x0001854c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) + i.hal_dsi_rx_ctrl_stop 0x00018588 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) + i.hal_dsi_rx_ctrl_toggle_resolution 0x000185c4 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) + i.hal_dsi_tx_calc_video_chunks 0x000185e4 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) + hal_dsi_tx_calc_video_chunks 0x000185e5 Thumb Code 384 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) + i.hal_dsi_tx_config_params_for_lane_rate 0x00018774 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) + hal_dsi_tx_config_params_for_lane_rate 0x00018775 Thumb Code 42 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) + i.hal_dsi_tx_count_lane_rate 0x000187a8 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) + hal_dsi_tx_count_lane_rate 0x000187a9 Thumb Code 1022 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) + i.hal_dsi_tx_ctrl_create_handle 0x00018bf8 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) + i.hal_dsi_tx_ctrl_deinit 0x00018c24 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) + i.hal_dsi_tx_ctrl_enter_init_panel_mode 0x00018ca8 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) + i.hal_dsi_tx_ctrl_exit_init_panel_mode 0x00018cf4 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) + i.hal_dsi_tx_ctrl_init 0x00018d1c Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) + i.hal_dsi_tx_ctrl_init_clk 0x00018dc0 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) + hal_dsi_tx_ctrl_init_clk 0x00018dc1 Thumb Code 36 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) + i.hal_dsi_tx_ctrl_panel_reset_pin 0x00018de4 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_panel_reset_pin) + i.hal_dsi_tx_ctrl_set_overwrite_rgb 0x00018df0 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) + i.hal_dsi_tx_ctrl_set_partial_disp 0x00018e04 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp) + i.hal_dsi_tx_ctrl_set_partial_disp_area 0x00018e14 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp_area) + i.hal_dsi_tx_ctrl_start 0x00018e38 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) + i.hal_dsi_tx_ctrl_stop 0x00018ed4 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) + i.hal_dsi_tx_ctrl_write_array_cmd 0x00018f18 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) + i.hal_dsi_tx_ctrl_write_cmd 0x00018ff0 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) + i.hal_dsi_tx_init_data_mode 0x000190a0 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) + hal_dsi_tx_init_data_mode 0x000190a1 Thumb Code 58 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) + i.hal_dsi_tx_init_dpi_cfg 0x000190e4 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) + hal_dsi_tx_init_dpi_cfg 0x000190e5 Thumb Code 42 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) + i.hal_dsi_tx_init_interrupt 0x00019114 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) + hal_dsi_tx_init_interrupt 0x00019115 Thumb Code 28 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) + i.hal_dsi_tx_init_phy_cfg 0x00019134 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) + hal_dsi_tx_init_phy_cfg 0x00019135 Thumb Code 28 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) + i.hal_dsi_tx_init_remains 0x00019154 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) + hal_dsi_tx_init_remains 0x00019155 Thumb Code 142 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) + i.hal_dsi_tx_init_video_mode 0x000191e8 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) + hal_dsi_tx_init_video_mode 0x000191e9 Thumb Code 82 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) + i.hal_dsi_tx_send_cmd 0x00019240 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) + hal_dsi_tx_send_cmd 0x00019241 Thumb Code 60 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) + i.hal_gpio_ctrl_eint 0x00019284 Section 0 hal_gpio.o(i.hal_gpio_ctrl_eint) + i.hal_gpio_get_input_data 0x0001929c Section 0 hal_gpio.o(i.hal_gpio_get_input_data) + i.hal_gpio_init_eint 0x000192b0 Section 0 hal_gpio.o(i.hal_gpio_init_eint) + i.hal_gpio_init_input 0x000192f0 Section 0 hal_gpio.o(i.hal_gpio_init_input) + i.hal_gpio_init_output 0x00019310 Section 0 hal_gpio.o(i.hal_gpio_init_output) + i.hal_gpio_reg_eint_cb 0x00019338 Section 0 hal_gpio.o(i.hal_gpio_reg_eint_cb) + i.hal_gpio_set_ap_reset_int 0x00019350 Section 0 hal_gpio.o(i.hal_gpio_set_ap_reset_int) + i.hal_gpio_set_mode 0x000193a0 Section 0 hal_gpio.o(i.hal_gpio_set_mode) + i.hal_gpio_set_output_data 0x00019400 Section 0 hal_gpio.o(i.hal_gpio_set_output_data) + i.hal_gpio_set_pull_state 0x00019408 Section 0 hal_gpio.o(i.hal_gpio_set_pull_state) + i.hal_i2c_m_dma_init 0x00019428 Section 0 hal_i2c_master.o(i.hal_i2c_m_dma_init) + i.hal_i2c_m_dma_read 0x00019494 Section 0 hal_i2c_master.o(i.hal_i2c_m_dma_read) + i.hal_i2c_m_dma_write 0x000194b4 Section 0 hal_i2c_master.o(i.hal_i2c_m_dma_write) + i.hal_i2c_m_transfer_complate 0x000194d0 Section 0 hal_i2c_master.o(i.hal_i2c_m_transfer_complate) + i.hal_i2c_master_irq_callback 0x000194dc Section 0 hal_i2c_master.o(i.hal_i2c_master_irq_callback) + hal_i2c_master_irq_callback 0x000194dd Thumb Code 24 hal_i2c_master.o(i.hal_i2c_master_irq_callback) + i.hal_i2c_s_dma_user_callback 0x000194fc Section 0 hal_i2c_slave.o(i.hal_i2c_s_dma_user_callback) + hal_i2c_s_dma_user_callback 0x000194fd Thumb Code 12 hal_i2c_slave.o(i.hal_i2c_s_dma_user_callback) + i.hal_i2c_s_dma_write 0x0001950c Section 0 hal_i2c_slave.o(i.hal_i2c_s_dma_write) + i.hal_i2c_s_init 0x00019558 Section 0 hal_i2c_slave.o(i.hal_i2c_s_init) + i.hal_i2c_s_nonblocking_read 0x00019620 Section 0 hal_i2c_slave.o(i.hal_i2c_s_nonblocking_read) + i.hal_i2c_s_set_transfer 0x00019634 Section 0 hal_i2c_slave.o(i.hal_i2c_s_set_transfer) + i.hal_i2c_slave_irq_callback 0x00019640 Section 0 hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) + hal_i2c_slave_irq_callback 0x00019641 Thumb Code 356 hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) + i.hal_internal_init_memc 0x000197b4 Section 0 hal_internal_vsync.o(i.hal_internal_init_memc) + i.hal_internal_sync_get_fb_setting 0x000198b0 Section 0 hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) + i.hal_internal_sync_get_hight_performan_mode 0x000198c0 Section 0 hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) + i.hal_internal_sync_input_resolution_change 0x000198d0 Section 0 hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) + i.hal_internal_update_dpi_param 0x00019afc Section 0 hal_internal_vsync.o(i.hal_internal_update_dpi_param) + i.hal_internal_video_mode_auto_sync 0x00019b0c Section 0 hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) + i.hal_internal_vsync_deinit 0x00019c38 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_deinit) + i.hal_internal_vsync_get_rx_state 0x00019c60 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) + i.hal_internal_vsync_get_sync_line 0x00019c6c Section 0 hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) + i.hal_internal_vsync_get_tear_mode 0x00019c84 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_get_tear_mode) + i.hal_internal_vsync_get_tx_state 0x00019c90 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) + i.hal_internal_vsync_init_rx 0x00019c9c Section 0 hal_internal_vsync.o(i.hal_internal_vsync_init_rx) + i.hal_internal_vsync_init_tx 0x00019db4 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_init_tx) + i.hal_internal_vsync_set_auto_hw_filter 0x00019e64 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) + i.hal_internal_vsync_set_rx_state 0x00019f80 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) + i.hal_internal_vsync_set_sync_line 0x00019f94 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) + i.hal_internal_vsync_set_tear_mode 0x00019fb8 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) + i.hal_internal_vsync_set_tx_state 0x0001a008 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) + i.hal_lcdc_config_ccm 0x0001a088 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) + hal_lcdc_config_ccm 0x0001a089 Thumb Code 30 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) + i.hal_lcdc_config_remains 0x0001a0ac Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) + hal_lcdc_config_remains 0x0001a0ad Thumb Code 84 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) + i.hal_lcdc_config_rgb_to_pentile 0x0001a104 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_rgb_to_pentile) + hal_lcdc_config_rgb_to_pentile 0x0001a105 Thumb Code 14 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_rgb_to_pentile) + i.hal_lcdc_config_upscaler 0x0001a118 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) + hal_lcdc_config_upscaler 0x0001a119 Thumb Code 348 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) + i.hal_lcdc_init_cfg 0x0001a27c Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) + hal_lcdc_init_cfg 0x0001a27d Thumb Code 78 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) + i.hal_lcdc_init_clk 0x0001a2d0 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) + hal_lcdc_init_clk 0x0001a2d1 Thumb Code 422 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) + i.hal_lcdc_init_interrupt 0x0001a480 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) + hal_lcdc_init_interrupt 0x0001a481 Thumb Code 58 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) + i.hal_spi_m_clear_rxfifo 0x0001a4c0 Section 0 hal_spi_master.o(i.hal_spi_m_clear_rxfifo) + i.hal_swire_open 0x0001a4ce Section 0 hal_swire.o(i.hal_swire_open) + i.hal_system_enable_systick 0x0001a4e4 Section 0 hal_system.o(i.hal_system_enable_systick) + i.hal_system_init 0x0001a4ec Section 0 hal_system.o(i.hal_system_init) + i.hal_system_init_console 0x0001a574 Section 0 hal_system.o(i.hal_system_init_console) + i.hal_system_set_phy_calibration 0x0001a590 Section 0 hal_system.o(i.hal_system_set_phy_calibration) + i.hal_system_set_pvd 0x0001a598 Section 0 hal_system.o(i.hal_system_set_pvd) + i.hal_system_set_vcc 0x0001a5a0 Section 0 hal_system.o(i.hal_system_set_vcc) + i.hal_timer_init 0x0001a5a8 Section 0 hal_timer.o(i.hal_timer_init) + i.hal_timer_start 0x0001a5c4 Section 0 hal_timer.o(i.hal_timer_start) + i.hal_timer_stop 0x0001a60c Section 0 hal_timer.o(i.hal_timer_stop) + i.hal_uart_init 0x0001a634 Section 0 hal_uart.o(i.hal_uart_init) + i.hal_uart_transmit_blocking 0x0001a6c0 Section 0 hal_uart.o(i.hal_uart_transmit_blocking) + i.handle_init 0x0001a6d0 Section 0 irq_redirect .o(i.handle_init) + i.init_mipi_tx 0x0001a7e0 Section 0 ap_demo.o(i.init_mipi_tx) + init_mipi_tx 0x0001a7e1 Thumb Code 96 ap_demo.o(i.init_mipi_tx) + i.init_panel 0x0001a844 Section 0 ap_demo.o(i.init_panel) + init_panel 0x0001a845 Thumb Code 126 ap_demo.o(i.init_panel) + i.main 0x0001a8cc Section 0 main.o(i.main) + i.open_mipi_rx 0x0001a8d8 Section 0 ap_demo.o(i.open_mipi_rx) + open_mipi_rx 0x0001a8d9 Thumb Code 138 ap_demo.o(i.open_mipi_rx) + i.pps_update_handle 0x0001a978 Section 0 ap_demo.o(i.pps_update_handle) + pps_update_handle 0x0001a979 Thumb Code 80 ap_demo.o(i.pps_update_handle) + i.rx_get_dcs_packet_data 0x0001a9cc Section 0 hal_internal_vsync.o(i.rx_get_dcs_packet_data) + rx_get_dcs_packet_data 0x0001a9cd Thumb Code 654 hal_internal_vsync.o(i.rx_get_dcs_packet_data) + i.rx_partial_update 0x0001adc0 Section 0 hal_internal_vsync.o(i.rx_partial_update) + rx_partial_update 0x0001adc1 Thumb Code 358 hal_internal_vsync.o(i.rx_partial_update) + i.rx_receive_packet 0x0001af38 Section 0 hal_internal_vsync.o(i.rx_receive_packet) + rx_receive_packet 0x0001af39 Thumb Code 128 hal_internal_vsync.o(i.rx_receive_packet) + i.rx_receive_pps 0x0001afc4 Section 0 hal_internal_vsync.o(i.rx_receive_pps) + rx_receive_pps 0x0001afc5 Thumb Code 268 hal_internal_vsync.o(i.rx_receive_pps) + i.rxbr_irq0_callback 0x0001b144 Section 0 hal_internal_vsync.o(i.rxbr_irq0_callback) + rxbr_irq0_callback 0x0001b145 Thumb Code 158 hal_internal_vsync.o(i.rxbr_irq0_callback) + i.rxbr_irq1_callback 0x0001b1e8 Section 0 hal_internal_vsync.o(i.rxbr_irq1_callback) + rxbr_irq1_callback 0x0001b1e9 Thumb Code 324 hal_internal_vsync.o(i.rxbr_irq1_callback) + i.soft_gen_te 0x0001b3c4 Section 0 hal_internal_vsync.o(i.soft_gen_te) + soft_gen_te 0x0001b3c5 Thumb Code 166 hal_internal_vsync.o(i.soft_gen_te) + i.soft_gen_te_double_buffer 0x0001b488 Section 0 hal_internal_vsync.o(i.soft_gen_te_double_buffer) + soft_gen_te_double_buffer 0x0001b489 Thumb Code 166 hal_internal_vsync.o(i.soft_gen_te_double_buffer) + i.soft_timer3_cb 0x0001b548 Section 0 ap_demo.o(i.soft_timer3_cb) + soft_timer3_cb 0x0001b549 Thumb Code 36 ap_demo.o(i.soft_timer3_cb) + i.sqrt 0x0001b578 Section 0 sqrt.o(i.sqrt) + i.tp_heartbeat_exec 0x0001b5c0 Section 0 ap_demo.o(i.tp_heartbeat_exec) + i.vidc_callback 0x0001b600 Section 0 hal_internal_vsync.o(i.vidc_callback) + vidc_callback 0x0001b601 Thumb Code 232 hal_internal_vsync.o(i.vidc_callback) + i.vpre_err_reset 0x0001b708 Section 0 hal_internal_vsync.o(i.vpre_err_reset) + vpre_err_reset 0x0001b709 Thumb Code 184 hal_internal_vsync.o(i.vpre_err_reset) + i.vsync_set_te_mode 0x0001b7d8 Section 0 hal_internal_vsync.o(i.vsync_set_te_mode) + vsync_set_te_mode 0x0001b7d9 Thumb Code 300 hal_internal_vsync.o(i.vsync_set_te_mode) + .constdata 0x0001b9a4 Section 236 ap_demo.o(.constdata) + g_cus_rx_dcs_execute_table 0x0001b9a4 Data 108 ap_demo.o(.constdata) + .constdata 0x0001ba90 Section 32 app_tp_st_touch.o(.constdata) + .constdata 0x0001bab0 Section 36 hal_dsi_tx_ctrl.o(.constdata) + .constdata 0x0001bad4 Section 210 hal_gpio.o(.constdata) + s_gpio_map 0x0001bad4 Data 120 hal_gpio.o(.constdata) + s_gpio_perf 0x0001bb4c Data 90 hal_gpio.o(.constdata) + .constdata 0x0001bba8 Section 32 hal_i2c_slave.o(.constdata) + sg_i2c_s_config 0x0001bba8 Data 32 hal_i2c_slave.o(.constdata) + .constdata 0x0001bbc8 Section 8528 app_tp_for_custom_s8.o(.constdata) + .constdata 0x0001dd18 Section 1 app_tp_for_custom_s8.o(.constdata) + .constdata 0x0001dd1c Section 8 drv_param_init.o(.constdata) + .constdata 0x0001dd24 Section 390 drv_phy_common.o(.constdata) + phy_para_mapping_h 0x0001dd24 Data 184 drv_phy_common.o(.constdata) + phy_para_mapping_l 0x0001dddc Data 128 drv_phy_common.o(.constdata) + phy_data_high_map 0x0001de5c Data 48 drv_phy_common.o(.constdata) + phy_data_lp_map 0x0001de8c Data 30 drv_phy_common.o(.constdata) + .conststring 0x0001deac Section 72 hal_dsi_rx_ctrl.o(.conststring) + .conststring 0x0001def4 Section 67 hal_dsi_tx_ctrl.o(.conststring) + .conststring 0x0001df38 Section 308 hal_internal_vsync.o(.conststring) + .ARM.__AT_0x00070100 0x00070100 Section 192 irq_redirect .o(.ARM.__AT_0x00070100) + .data 0x000701d0 Section 7514 ap_demo.o(.data) + start_display_on 0x000701d0 Data 1 ap_demo.o(.data) + g_need_enter_sleep_mode 0x000701d1 Data 1 ap_demo.o(.data) + g_mipi_path_off 0x000701d2 Data 1 ap_demo.o(.data) + phone_off_flag 0x000701d3 Data 1 ap_demo.o(.data) + g_exit_sleep_mode 0x000701d4 Data 1 ap_demo.o(.data) + panel_display_done 0x000701d5 Data 1 ap_demo.o(.data) + phone_power_on 0x000701d6 Data 1 ap_demo.o(.data) + bl_adj_flag 0x000701de Data 1 ap_demo.o(.data) + b3_read_flag 0x000701df Data 1 ap_demo.o(.data) + c8_read_flag 0x000701e0 Data 1 ap_demo.o(.data) + c9_read_flag 0x000701e1 Data 1 ap_demo.o(.data) + c9_read_flag2 0x000701e2 Data 1 ap_demo.o(.data) + c9_read_flag3 0x000701e3 Data 1 ap_demo.o(.data) + flag_5a 0x000701e4 Data 1 ap_demo.o(.data) + frame_rate 0x000701e5 Data 1 ap_demo.o(.data) + g_rx_ctrl_handle 0x000701f0 Data 4 ap_demo.o(.data) + g_tx_ctrl_handle 0x000701f4 Data 4 ap_demo.o(.data) + .data 0x00071f2a Section 23 app_tp_transfer.o(.data) + s_spim_write 0x00071f2a Data 1 app_tp_transfer.o(.data) + s_screen_int_flag 0x00071f2b Data 1 app_tp_transfer.o(.data) + s_phone_reset_flag 0x00071f2c Data 1 app_tp_transfer.o(.data) + s_screen_int_transfer_status 0x00071f2d Data 1 app_tp_transfer.o(.data) + s_screen_const_transfer_count 0x00071f2f Data 1 app_tp_transfer.o(.data) + screen_int_transfer_count 0x00071f30 Data 1 app_tp_transfer.o(.data) + screen_int_transfer_buffer_ready 0x00071f31 Data 1 app_tp_transfer.o(.data) + .data 0x00071f41 Section 40 app_tp_st_touch.o(.data) + s_calibration_flag 0x00071f41 Data 1 app_tp_st_touch.o(.data) + s_calibration_correct_flag 0x00071f42 Data 1 app_tp_st_touch.o(.data) + .data 0x00071f6c Section 8 hal_dsi_rx_ctrl.o(.data) + g_hw_auto_filter 0x00071f6c Data 1 hal_dsi_rx_ctrl.o(.data) + g_esc_clk 0x00071f70 Data 4 hal_dsi_rx_ctrl.o(.data) + .data 0x00071f74 Section 3 hal_dsi_tx_ctrl.o(.data) + g_tx_vcom_en 0x00071f74 Data 1 hal_dsi_tx_ctrl.o(.data) + g_tx_vpg_en 0x00071f75 Data 1 hal_dsi_tx_ctrl.o(.data) + g_tx_mode 0x00071f76 Data 1 hal_dsi_tx_ctrl.o(.data) + .data 0x00071f77 Section 1 hal_i2c_master.o(.data) + s_i2c_m_transfer_end 0x00071f77 Data 1 hal_i2c_master.o(.data) + .data 0x00071f78 Section 32 hal_i2c_slave.o(.data) + s_txbuffer_complate 0x00071f78 Data 1 hal_i2c_slave.o(.data) + s_i2c_s_dma_end 0x00071f79 Data 1 hal_i2c_slave.o(.data) + s_i2c_s_receive_cnt 0x00071f7a Data 1 hal_i2c_slave.o(.data) + sg_i2c_s_index 0x00071f7b Data 1 hal_i2c_slave.o(.data) + s_hal_slave_rxbuffer 0x00071f7c Data 4 hal_i2c_slave.o(.data) + s_hal_slave_rxbuffer_size 0x00071f80 Data 4 hal_i2c_slave.o(.data) + hal_i2c_s_callback 0x00071f84 Data 4 hal_i2c_slave.o(.data) + sg_tx_byte_num 0x00071f88 Data 4 hal_i2c_slave.o(.data) + s_receive_count 0x00071f8c Data 4 hal_i2c_slave.o(.data) + s_tx_buffer_t 0x00071f90 Data 4 hal_i2c_slave.o(.data) + tx_sum 0x00071f94 Data 4 hal_i2c_slave.o(.data) + .data 0x00071f98 Section 228 app_tp_for_custom_s8.o(.data) + app_tp_count 0x00071fa2 Data 1 app_tp_for_custom_s8.o(.data) + phone_85_flag 0x00071fa3 Data 1 app_tp_for_custom_s8.o(.data) + phone_F6_flag 0x00071fa4 Data 1 app_tp_for_custom_s8.o(.data) + phone_E4_flag 0x00071fa5 Data 1 app_tp_for_custom_s8.o(.data) + phone_72_flag 0x00071fa6 Data 1 app_tp_for_custom_s8.o(.data) + phone_75_flag 0x00071fa7 Data 1 app_tp_for_custom_s8.o(.data) + phone_92_flag 0x00071fa8 Data 1 app_tp_for_custom_s8.o(.data) + phone_74_flag 0x00071fa9 Data 1 app_tp_for_custom_s8.o(.data) + u16CoordY 0x00071fac Data 2 app_tp_for_custom_s8.o(.data) + u16CoordX 0x00071fae Data 2 app_tp_for_custom_s8.o(.data) + u16CoordY_back 0x00071fb0 Data 2 app_tp_for_custom_s8.o(.data) + u16CoordX_back 0x00071fb2 Data 2 app_tp_for_custom_s8.o(.data) + .data 0x0007207c Section 1 app_tp_for_custom_s8.o(.data) + .data 0x0007207d Section 1 app_tp_for_custom_s8.o(.data) + .data 0x0007207e Section 1 app_tp_for_custom_s8.o(.data) + .data 0x0007207f Section 3 app_tp_for_custom_s8.o(.data) + .data 0x00072082 Section 5 app_tp_for_custom_s8.o(.data) + .data 0x00072088 Section 48 app_tp_for_custom_s8.o(.data) + .data 0x000720b8 Section 24 hal_internal_vsync.o(.data) + sg_cmd_mode_tx_start 0x000720b8 Data 1 hal_internal_vsync.o(.data) + sg_cur_te_info 0x000720bc Data 4 hal_internal_vsync.o(.data) + g_cus_rx_write_cmd_handle 0x000720c4 Data 12 hal_internal_vsync.o(.data) + .data 0x000720d0 Section 12 drv_common.o(.data) + s_my_tick 0x000720d0 Data 4 drv_common.o(.data) + .data 0x000720dc Section 4 drv_gpio.o(.data) + g_ap_reset_cb 0x000720dc Data 4 drv_gpio.o(.data) + .data 0x000720e0 Section 8 drv_i2c_dma.o(.data) + i2c0_dma_callback 0x000720e0 Data 4 drv_i2c_dma.o(.data) + i2c1_dma_callback 0x000720e4 Data 4 drv_i2c_dma.o(.data) + .data 0x000720e8 Section 4 drv_i2c_master.o(.data) + i2c1_intr_callback 0x000720e8 Data 4 drv_i2c_master.o(.data) + .data 0x000720ec Section 4 drv_i2c_slave.o(.data) + i2c0_intr_callback 0x000720ec Data 4 drv_i2c_slave.o(.data) + .data 0x000720f0 Section 1188 drv_param_init.o(.data) + .data 0x00072594 Section 4 drv_spi_master.o(.data) + SPIM_intr_callback 0x00072594 Data 4 drv_spi_master.o(.data) + .data 0x00072598 Section 8 drv_swire.o(.data) + s_swire_cb 0x00072598 Data 8 drv_swire.o(.data) + .data 0x000725a0 Section 1 drv_sys_cfg.o(.data) + sg_ap_rstn_trigger_type 0x000725a0 Data 1 drv_sys_cfg.o(.data) + .data 0x000725a4 Section 80 drv_timer.o(.data) + sg_timer_info 0x000725a4 Data 80 drv_timer.o(.data) + .data 0x000725f4 Section 8 drv_rxbr.o(.data) + .data 0x000725fc Section 4 drv_vidc.o(.data) + .data 0x00072600 Section 1 drv_phy_common.o(.data) + g_phy_calibration 0x00072600 Data 1 drv_phy_common.o(.data) + .data 0x00072604 Section 12 drv_chip_info.o(.data) + sg_chip_info 0x00072604 Data 4 drv_chip_info.o(.data) + sg_chip_function 0x00072608 Data 4 drv_chip_info.o(.data) + sg_chip_encrypt 0x0007260c Data 4 drv_chip_info.o(.data) + .data 0x00072610 Section 6 app_tp_enc.o(.data) + init_flag 0x00072610 Data 1 app_tp_enc.o(.data) + g_u8EncryptFlag 0x00072611 Data 1 app_tp_enc.o(.data) + g_u8EncryptData 0x00072612 Data 1 app_tp_enc.o(.data) + g_u16EncryptCnt 0x00072614 Data 2 app_tp_enc.o(.data) + .data 0x00072618 Section 18 norflash.o(.data) + tmprg 0x00072620 Data 4 norflash.o(.data) + .data 0x0007262c Section 12 drv_pwm.o(.data) + s_pwm_type 0x0007262c Data 1 drv_pwm.o(.data) + s_pwm_cb 0x00072630 Data 8 drv_pwm.o(.data) + .data 0x00072638 Section 8 drv_uart.o(.data) + s_UartFcrReg 0x00072638 Data 4 drv_uart.o(.data) + uart_userData 0x0007263c Data 4 drv_uart.o(.data) + .data 0x00072640 Section 12 drv_wdg.o(.data) + sg_wdg_repeat 0x00072640 Data 1 drv_wdg.o(.data) + sg_wdg_cb 0x00072644 Data 8 drv_wdg.o(.data) + .data 0x0007264c Section 4 stdout.o(.data) + .data 0x00072650 Section 4 errno.o(.data) + _errno 0x00072650 Data 4 errno.o(.data) + .bss 0x00072654 Section 400 app_tp_transfer.o(.bss) + s_screen_read_buffer 0x00072654 Data 200 app_tp_transfer.o(.bss) + s_phone_read_buffer 0x0007271c Data 200 app_tp_transfer.o(.bss) + .bss 0x000727e4 Section 12 app_tp_st_touch.o(.bss) + .bss 0x000727f0 Section 196 hal_dsi_rx_ctrl.o(.bss) + g_rx_ctrl_handle 0x000727f0 Data 196 hal_dsi_rx_ctrl.o(.bss) + .bss 0x000728b4 Section 76 hal_dsi_tx_ctrl.o(.bss) + g_tx_ctrl_handle 0x000728b4 Data 76 hal_dsi_tx_ctrl.o(.bss) + .bss 0x00072900 Section 208 hal_uart.o(.bss) + .bss 0x000729d0 Section 2436 hal_internal_vsync.o(.bss) + g_imm_buffer 0x00073234 Data 255 hal_internal_vsync.o(.bss) + sg_te_info 0x00073334 Data 12 hal_internal_vsync.o(.bss) + g_imm_packet 0x00073340 Data 20 hal_internal_vsync.o(.bss) + .bss 0x00073354 Section 28 drv_dma.o(.bss) + s_dma_handle 0x00073354 Data 28 drv_dma.o(.bss) + .bss 0x00073370 Section 64 drv_gpio.o(.bss) + s_gpio_cb 0x00073370 Data 64 drv_gpio.o(.bss) + .bss 0x000733b0 Section 320 drv_i2c_dma.o(.bss) + i2c0_dma_slave_handle 0x000733b0 Data 160 drv_i2c_dma.o(.bss) + i2c1_dma_master_handle 0x00073450 Data 160 drv_i2c_dma.o(.bss) + .bss 0x000734f0 Section 4144 dcs_packet_fifo.o(.bss) + .bss 0x00074520 Section 256 tau_log.o(.bss) + .bss 0x00074620 Section 32 hal_spi_slave.o(.bss) + STACK 0x00074640 Section 4096 startup_armcm0.o(STACK) + + Global Symbols + + Symbol Name Value Ov Type Size Object(Section) + + BuildAttributes$$THM_ISAv3M$S$PE$A:L22$X:L11$S22$IEEE1$IW$USESV6$~STKCKD$USESV7$~SHL$OTIME$ROPI$IEEEJ$EBA8$MICROLIB$REQ8$PRES8$EABIv2 0x00000000 Number 0 anon$$obj.o ABSOLUTE + __ARM_use_no_argv 0x00000000 Number 0 main.o ABSOLUTE + _printf_a 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_c 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_charcount 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_d 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_e 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_f 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_flags 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_fp_dec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_fp_hex 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_g 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_i 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_int_dec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_l 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_lc 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_ll 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_lld 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_lli 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_llo 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_llu 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_llx 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_longlong_dec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_longlong_hex 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_longlong_oct 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_ls 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_mbtowc 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_n 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_o 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_p 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_percent 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_pre_padding 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_return_value 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_s 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_sizespec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_str 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_truncate_signed 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_truncate_unsigned 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_u 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_wc 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_wctomb 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_widthprec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_x 0x00000000 Number 0 stubs.o ABSOLUTE + __cpp_initialize__aeabi_ - Undefined Weak Reference + __cxa_finalize - Undefined Weak Reference + _clock_init - Undefined Weak Reference + _microlib_exit - Undefined Weak Reference + __Vectors_Size 0x000000c0 Number 0 startup_armcm0.o ABSOLUTE + __Vectors 0x00010000 Data 4 startup_armcm0.o(RESET) + __Vectors_End 0x000100c0 Data 0 startup_armcm0.o(RESET) + __main 0x000100c1 Thumb Code 0 entry.o(.ARM.Collect$$$$00000000) + _main_stk 0x000100c1 Thumb Code 0 entry2.o(.ARM.Collect$$$$00000001) + _main_scatterload 0x000100c5 Thumb Code 0 entry5.o(.ARM.Collect$$$$00000004) + __main_after_scatterload 0x000100c9 Thumb Code 0 entry5.o(.ARM.Collect$$$$00000004) + _main_clock 0x000100c9 Thumb Code 0 entry7b.o(.ARM.Collect$$$$00000008) + _main_cpp_init 0x000100c9 Thumb Code 0 entry8b.o(.ARM.Collect$$$$0000000A) + _main_init 0x000100c9 Thumb Code 0 entry9a.o(.ARM.Collect$$$$0000000B) + __rt_final_cpp 0x000100d1 Thumb Code 0 entry10a.o(.ARM.Collect$$$$0000000D) + __rt_final_exit 0x000100d1 Thumb Code 0 entry11a.o(.ARM.Collect$$$$0000000F) + Reset_Handler 0x000100d5 Thumb Code 28 startup_armcm0.o(.text) + NMI_Handler 0x000100f1 Thumb Code 2 startup_armcm0.o(.text) + SVC_Handler 0x000100f5 Thumb Code 2 startup_armcm0.o(.text) + PendSV_Handler 0x000100f7 Thumb Code 2 startup_armcm0.o(.text) + OTP_IRQn_Handler 0x00010123 Thumb Code 2 startup_armcm0.o(.text) + PVD_IRQn_Handler 0x00010127 Thumb Code 2 startup_armcm0.o(.text) + __aeabi_uidiv 0x0001014d Thumb Code 0 uidiv.o(.text) + __aeabi_uidivmod 0x0001014d Thumb Code 44 uidiv.o(.text) + __aeabi_idiv 0x00010179 Thumb Code 0 idiv.o(.text) + __aeabi_idivmod 0x00010179 Thumb Code 40 idiv.o(.text) + __aeabi_memcpy 0x000101a1 Thumb Code 36 memcpya.o(.text) + __aeabi_memcpy4 0x000101a1 Thumb Code 0 memcpya.o(.text) + __aeabi_memcpy8 0x000101a1 Thumb Code 0 memcpya.o(.text) + __aeabi_memset 0x000101c5 Thumb Code 14 memseta.o(.text) + __aeabi_memset4 0x000101c5 Thumb Code 0 memseta.o(.text) + __aeabi_memset8 0x000101c5 Thumb Code 0 memseta.o(.text) + __aeabi_memclr 0x000101d3 Thumb Code 4 memseta.o(.text) + __aeabi_memclr4 0x000101d3 Thumb Code 0 memseta.o(.text) + __aeabi_memclr8 0x000101d3 Thumb Code 0 memseta.o(.text) + _memset$wrapper 0x000101d7 Thumb Code 18 memseta.o(.text) + __aeabi_fadd 0x000101e9 Thumb Code 162 fadd.o(.text) + __aeabi_fsub 0x0001028b Thumb Code 8 fadd.o(.text) + __aeabi_frsub 0x00010293 Thumb Code 8 fadd.o(.text) + __aeabi_fmul 0x0001029b Thumb Code 122 fmul.o(.text) + __aeabi_fdiv 0x00010315 Thumb Code 124 fdiv.o(.text) + __ARM_scalbnf 0x00010391 Thumb Code 24 fscalb.o(.text) + scalbnf 0x00010391 Thumb Code 0 fscalb.o(.text) + __aeabi_dadd 0x000103a9 Thumb Code 328 dadd.o(.text) + __aeabi_dsub 0x000104f1 Thumb Code 12 dadd.o(.text) + __aeabi_drsub 0x000104fd Thumb Code 12 dadd.o(.text) + __aeabi_dmul 0x0001050d Thumb Code 202 dmul.o(.text) + __aeabi_ddiv 0x000105dd Thumb Code 234 ddiv.o(.text) + __aeabi_i2f 0x000106cd Thumb Code 22 fflti.o(.text) + __aeabi_ui2f 0x000106e3 Thumb Code 14 ffltui.o(.text) + __aeabi_ui2d 0x000106f1 Thumb Code 24 dfltui.o(.text) + __aeabi_f2iz 0x0001070d Thumb Code 50 ffixi.o(.text) + __aeabi_f2uiz 0x0001073f Thumb Code 40 ffixui.o(.text) + __aeabi_d2iz 0x00010769 Thumb Code 62 dfixi.o(.text) + __aeabi_d2uiz 0x000107b1 Thumb Code 50 dfixui.o(.text) + __aeabi_f2d 0x000107ed Thumb Code 40 f2d.o(.text) + __aeabi_cdcmpeq 0x00010815 Thumb Code 0 cdcmple.o(.text) + __aeabi_cdcmple 0x00010815 Thumb Code 38 cdcmple.o(.text) + __aeabi_cfrcmple 0x0001083d Thumb Code 20 cfrcmple.o(.text) + __aeabi_uldivmod 0x00010851 Thumb Code 96 uldiv.o(.text) + __aeabi_llsl 0x000108b1 Thumb Code 32 llshl.o(.text) + _ll_shift_l 0x000108b1 Thumb Code 0 llshl.o(.text) + __aeabi_llsr 0x000108d1 Thumb Code 34 llushr.o(.text) + _ll_ushift_r 0x000108d1 Thumb Code 0 llushr.o(.text) + __aeabi_lasr 0x000108f3 Thumb Code 38 llsshr.o(.text) + _ll_sshift_r 0x000108f3 Thumb Code 0 llsshr.o(.text) + __I$use$fp 0x00010919 Thumb Code 0 iusefp.o(.text) + _float_round 0x00010919 Thumb Code 16 fepilogue.o(.text) + _float_epilogue 0x00010929 Thumb Code 114 fepilogue.o(.text) + _double_round 0x0001099b Thumb Code 26 depilogue.o(.text) + _double_epilogue 0x000109b5 Thumb Code 164 depilogue.o(.text) + _dsqrt 0x00010a59 Thumb Code 162 dsqrt.o(.text) + __aeabi_d2ulz 0x00010afd Thumb Code 54 dfixul.o(.text) + __aeabi_cdrcmple 0x00010b3d Thumb Code 38 cdrcmple.o(.text) + __scatterload 0x00010b65 Thumb Code 28 init.o(.text) + __scatterload_rt2 0x00010b65 Thumb Code 0 init.o(.text) + __decompress 0x00010b89 Thumb Code 0 __dczerorl2.o(.text) + __decompress1 0x00010b89 Thumb Code 86 __dczerorl2.o(.text) + ADC_IRQn_Handler 0x00010be1 Thumb Code 18 irq_redirect .o(i.ADC_IRQn_Handler) + AP_NRESET_IRQn_Handler 0x00010bf9 Thumb Code 18 irq_redirect .o(i.AP_NRESET_IRQn_Handler) + CRC16_2 0x00010c11 Thumb Code 54 app_tp_st_touch.o(i.CRC16_2) + DMA_IRQn_Handler 0x00010c51 Thumb Code 14 irq_redirect .o(i.DMA_IRQn_Handler) + EXTI_INT0_IRQn_Handler 0x00010c65 Thumb Code 22 irq_redirect .o(i.EXTI_INT0_IRQn_Handler) + EXTI_INT1_IRQn_Handler 0x00010c81 Thumb Code 22 irq_redirect .o(i.EXTI_INT1_IRQn_Handler) + EXTI_INT2_IRQn_Handler 0x00010c9d Thumb Code 22 irq_redirect .o(i.EXTI_INT2_IRQn_Handler) + EXTI_INT3_IRQn_Handler 0x00010cb9 Thumb Code 22 irq_redirect .o(i.EXTI_INT3_IRQn_Handler) + EXTI_INT4_IRQn_Handler 0x00010cd5 Thumb Code 22 irq_redirect .o(i.EXTI_INT4_IRQn_Handler) + EXTI_INT5_IRQn_Handler 0x00010cf1 Thumb Code 22 irq_redirect .o(i.EXTI_INT5_IRQn_Handler) + EXTI_INT6_IRQn_Handler 0x00010d0d Thumb Code 22 irq_redirect .o(i.EXTI_INT6_IRQn_Handler) + EXTI_INT7_IRQn_Handler 0x00010d29 Thumb Code 22 irq_redirect .o(i.EXTI_INT7_IRQn_Handler) + EncryptCheck 0x00010d45 Thumb Code 90 app_tp_enc.o(i.EncryptCheck) + FLSCTRL_IRQn_Handler 0x00010da9 Thumb Code 14 irq_redirect .o(i.FLSCTRL_IRQn_Handler) + Gpio_swire_output 0x00010dbd Thumb Code 110 ap_demo.o(i.Gpio_swire_output) + HardFault_Handler 0x00010e31 Thumb Code 14 irq_redirect .o(i.HardFault_Handler) + I2C0_IRQn_Handler 0x00010e45 Thumb Code 18 irq_redirect .o(i.I2C0_IRQn_Handler) + I2C1_IRQn_Handler 0x00010e5d Thumb Code 18 irq_redirect .o(i.I2C1_IRQn_Handler) + LCDC_IRQn_Handler 0x00010e75 Thumb Code 18 irq_redirect .o(i.LCDC_IRQn_Handler) + LOG_printf 0x00010e8d Thumb Code 30 tau_log.o(i.LOG_printf) + MEMC_IRQn_Handler 0x00010eb5 Thumb Code 18 irq_redirect .o(i.MEMC_IRQn_Handler) + MIPI_RX_IRQn_Handler 0x00010ecd Thumb Code 18 irq_redirect .o(i.MIPI_RX_IRQn_Handler) + MIPI_TX_IRQn_Handler 0x00010ee5 Thumb Code 18 irq_redirect .o(i.MIPI_TX_IRQn_Handler) + PWMDET_IRQn_Handler 0x00010efd Thumb Code 22 irq_redirect .o(i.PWMDET_IRQn_Handler) + SPIM_IRQn_Handler 0x00010f19 Thumb Code 22 irq_redirect .o(i.SPIM_IRQn_Handler) + SPIS_IRQn_Handler 0x00010f35 Thumb Code 22 irq_redirect .o(i.SPIS_IRQn_Handler) + SWIRE_IRQn_Handler 0x00010f51 Thumb Code 22 irq_redirect .o(i.SWIRE_IRQn_Handler) + SysTick_Handler 0x00010f6d Thumb Code 18 irq_redirect .o(i.SysTick_Handler) + TIMER0_IRQn_Handler 0x00010f85 Thumb Code 18 irq_redirect .o(i.TIMER0_IRQn_Handler) + TIMER1_IRQn_Handler 0x00010f9d Thumb Code 18 irq_redirect .o(i.TIMER1_IRQn_Handler) + TIMER2_IRQn_Handler 0x00010fb5 Thumb Code 18 irq_redirect .o(i.TIMER2_IRQn_Handler) + TIMER3_IRQn_Handler 0x00010fcd Thumb Code 18 irq_redirect .o(i.TIMER3_IRQn_Handler) + UART0_IRQ_Handle 0x00010fe5 Thumb Code 20 drv_uart.o(i.UART0_IRQ_Handle) + s_RAM_CK 0x00011000 Data 20 drv_common.o(.ARM.__at_0x11000) + UART_DisableDma 0x00011015 Thumb Code 2 drv_uart.o(i.UART_DisableDma) + __scatterload_null 0x00011017 Thumb Code 2 handlers.o(i.__scatterload_null) + s_debug_state 0x00011018 Data 4 drv_common.o(.ARM.__at_0x11018) + S20_Start_init 0x0001101d Thumb Code 300 app_tp_transfer.o(i.S20_Start_init) + UART_GetInstance 0x00011161 Thumb Code 4 drv_uart.o(i.UART_GetInstance) + UART_IRQn_Handler 0x00011165 Thumb Code 18 irq_redirect .o(i.UART_IRQn_Handler) + UART_ResetRxFIFO 0x0001117d Thumb Code 32 drv_uart.o(i.UART_ResetRxFIFO) + UART_SetBaudRate 0x000111a1 Thumb Code 72 drv_uart.o(i.UART_SetBaudRate) + UART_SwitchSCLK 0x000111e9 Thumb Code 26 drv_uart.o(i.UART_SwitchSCLK) + UART_TransferHandleIRQ 0x00011203 Thumb Code 308 drv_uart.o(i.UART_TransferHandleIRQ) + UART_WriteBlocking 0x00011337 Thumb Code 26 drv_uart.o(i.UART_WriteBlocking) + UART_init 0x00011351 Thumb Code 182 drv_uart.o(i.UART_init) + VIDC_IRQn_Handler 0x0001140d Thumb Code 18 irq_redirect .o(i.VIDC_IRQn_Handler) + VPRE_IRQn_Handler 0x00011425 Thumb Code 18 irq_redirect .o(i.VPRE_IRQn_Handler) + WDG_IRQn_Handler 0x0001143d Thumb Code 18 irq_redirect .o(i.WDG_IRQn_Handler) + __0printf 0x00011455 Thumb Code 24 printfa.o(i.__0printf) + __1printf 0x00011455 Thumb Code 0 printfa.o(i.__0printf) + __2printf 0x00011455 Thumb Code 0 printfa.o(i.__0printf) + __c89printf 0x00011455 Thumb Code 0 printfa.o(i.__0printf) + printf 0x00011455 Thumb Code 0 printfa.o(i.__0printf) + __0vsprintf 0x00011475 Thumb Code 30 printfa.o(i.__0vsprintf) + __1vsprintf 0x00011475 Thumb Code 0 printfa.o(i.__0vsprintf) + __2vsprintf 0x00011475 Thumb Code 0 printfa.o(i.__0vsprintf) + __c89vsprintf 0x00011475 Thumb Code 0 printfa.o(i.__0vsprintf) + vsprintf 0x00011475 Thumb Code 0 printfa.o(i.__0vsprintf) + __ARM_clz 0x00011499 Thumb Code 46 depilogue.o(i.__ARM_clz) + __ARM_common_switch8 0x000114c7 Thumb Code 26 ap_demo.o(i.__ARM_common_switch8) + __scatterload_copy 0x0001158d Thumb Code 14 handlers.o(i.__scatterload_copy) + __scatterload_zeroinit 0x0001159b Thumb Code 14 handlers.o(i.__scatterload_zeroinit) + __set_errno 0x000115a9 Thumb Code 6 errno.o(i.__set_errno) + ap_demo 0x00012ec9 Thumb Code 292 ap_demo.o(i.ap_demo) + ap_get_tp_calibration_status_01 0x00013029 Thumb Code 28 app_tp_st_touch.o(i.ap_get_tp_calibration_status_01) + ap_set_tp_calibration_04 0x000133a5 Thumb Code 138 app_tp_st_touch.o(i.ap_set_tp_calibration_04) + ap_tp_st_touch_calibration 0x0001343d Thumb Code 170 app_tp_st_touch.o(i.ap_tp_st_touch_calibration) + ap_tp_st_touch_error_handler_F3 0x000134ed Thumb Code 14 app_tp_st_touch.o(i.ap_tp_st_touch_error_handler_F3) + ap_tp_st_touch_error_handler_FF 0x000134fb Thumb Code 32 app_tp_st_touch.o(i.ap_tp_st_touch_error_handler_FF) + ap_tp_st_touch_get_calibration_success_mark 0x0001351d Thumb Code 150 app_tp_st_touch.o(i.ap_tp_st_touch_get_calibration_success_mark) + ap_tp_st_touch_hardware_reset 0x000135c5 Thumb Code 126 app_tp_st_touch.o(i.ap_tp_st_touch_hardware_reset) + ap_tp_st_touch_scan_point_init 0x0001364d Thumb Code 24 app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_init) + ap_tp_st_touch_scan_point_record_event 0x00013669 Thumb Code 142 app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_record_event) + ap_tp_st_touch_scan_point_record_event_exec 0x000136fd Thumb Code 44 app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_record_event_exec) + ap_tp_st_touch_simulate_finger_release_event 0x00013731 Thumb Code 44 app_tp_st_touch.o(i.ap_tp_st_touch_simulate_finger_release_event) + app_ADC_IRQn_Handler 0x00013791 Thumb Code 22 drv_rxbr.o(i.app_ADC_IRQn_Handler) + app_AP_NRESET_IRQn_Handler 0x000137ad Thumb Code 32 drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) + app_EXTI_INT0_IRQn_Handler 0x000137d1 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) + app_EXTI_INT1_IRQn_Handler 0x000137ed Thumb Code 22 drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) + app_EXTI_INT2_IRQn_Handler 0x00013809 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) + app_EXTI_INT3_IRQn_Handler 0x00013825 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) + app_EXTI_INT4_IRQn_Handler 0x00013841 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) + app_EXTI_INT5_IRQn_Handler 0x0001385d Thumb Code 22 drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) + app_EXTI_INT6_IRQn_Handler 0x00013879 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) + app_EXTI_INT7_IRQn_Handler 0x00013895 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) + app_HardFault_Handler 0x000138b1 Thumb Code 12 drv_common.o(i.app_HardFault_Handler) + app_I2C0_IRQn_Handler 0x000138f9 Thumb Code 14 drv_i2c_slave.o(i.app_I2C0_IRQn_Handler) + app_I2C1_IRQn_Handler 0x00013911 Thumb Code 8 drv_i2c_master.o(i.app_I2C1_IRQn_Handler) + app_LCDC_IRQn_Handler 0x00013921 Thumb Code 208 hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) + app_MEMC_IRQn_Handler 0x00013ac5 Thumb Code 132 drv_memc.o(i.app_MEMC_IRQn_Handler) + app_MIPI_RX_IRQn_Handler 0x00013b4d Thumb Code 232 drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) + app_MIPI_TX_IRQn_Handler 0x00013de5 Thumb Code 56 drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) + app_PWMDET_IRQn_Handler 0x00013e85 Thumb Code 62 drv_pwm.o(i.app_PWMDET_IRQn_Handler) + app_SPIM_IRQn_Handler 0x00013ecd Thumb Code 34 drv_spi_master.o(i.app_SPIM_IRQn_Handler) + app_SPIS_IRQn_Handler 0x00013efd Thumb Code 500 hal_spi_slave.o(i.app_SPIS_IRQn_Handler) + app_SWIRE_IRQn_Handler 0x000140fd Thumb Code 28 drv_swire.o(i.app_SWIRE_IRQn_Handler) + app_SysTick_Handler 0x0001411d Thumb Code 20 drv_common.o(i.app_SysTick_Handler) + app_TIMER0_IRQn_Handler 0x00014135 Thumb Code 10 drv_timer.o(i.app_TIMER0_IRQn_Handler) + app_TIMER1_IRQn_Handler 0x0001413f Thumb Code 10 drv_timer.o(i.app_TIMER1_IRQn_Handler) + app_TIMER2_IRQn_Handler 0x00014149 Thumb Code 10 drv_timer.o(i.app_TIMER2_IRQn_Handler) + app_TIMER3_IRQn_Handler 0x00014153 Thumb Code 10 drv_timer.o(i.app_TIMER3_IRQn_Handler) + app_UART_IRQn_Handler 0x0001415d Thumb Code 8 drv_uart.o(i.app_UART_IRQn_Handler) + app_VIDC_IRQn_Handler 0x00014165 Thumb Code 22 drv_vidc.o(i.app_VIDC_IRQn_Handler) + app_VPRE_IRQn_Handler 0x00014181 Thumb Code 22 drv_rxbr.o(i.app_VPRE_IRQn_Handler) + app_WDG_IRQn_Handler 0x0001419d Thumb Code 52 drv_wdg.o(i.app_WDG_IRQn_Handler) + app_dma_irq_handler 0x000141d5 Thumb Code 10 drv_dma.o(i.app_dma_irq_handler) + app_fls_ctrl_Handler 0x000141e5 Thumb Code 38 norflash.o(i.app_fls_ctrl_Handler) + app_tp_I2C_init 0x00014215 Thumb Code 26 app_tp_transfer.o(i.app_tp_I2C_init) + app_tp_calibration_exec 0x00014239 Thumb Code 50 app_tp_st_touch.o(i.app_tp_calibration_exec) + app_tp_init 0x000142a1 Thumb Code 52 app_tp_transfer.o(i.app_tp_init) + app_tp_m_read 0x000142e1 Thumb Code 32 app_tp_transfer.o(i.app_tp_m_read) + app_tp_m_write 0x00014301 Thumb Code 8 app_tp_transfer.o(i.app_tp_m_write) + app_tp_phone_analysis_data 0x00014309 Thumb Code 992 app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) + app_tp_phone_clear_reset_on 0x00014725 Thumb Code 8 app_tp_transfer.o(i.app_tp_phone_clear_reset_on) + app_tp_s_read 0x00014731 Thumb Code 8 app_tp_transfer.o(i.app_tp_s_read) + app_tp_s_write 0x00014739 Thumb Code 8 app_tp_transfer.o(i.app_tp_s_write) + app_tp_screen_analysis_int 0x00014741 Thumb Code 718 app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) + app_tp_transfer_screen_int 0x00014a69 Thumb Code 336 app_tp_transfer.o(i.app_tp_transfer_screen_int) + app_tp_transfer_screen_start 0x00014bc9 Thumb Code 18 app_tp_transfer.o(i.app_tp_transfer_screen_start) + board_Init 0x00014be1 Thumb Code 30 board.o(i.board_Init) + calc_framebuffer_setting 0x00014c05 Thumb Code 1258 hal_internal_vsync.o(i.calc_framebuffer_setting) + ceil 0x000150f5 Thumb Code 180 ceil.o(i.ceil) + dcs_packet_fifo_alloc 0x00015279 Thumb Code 80 dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) + dcs_packet_fifo_init 0x000152d1 Thumb Code 18 dcs_packet_fifo.o(i.dcs_packet_fifo_init) + dcs_packet_free_fifo_header 0x000152e9 Thumb Code 60 dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) + dcs_packet_get_fifo_header 0x0001532d Thumb Code 26 dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) + delayMs 0x0001537d Thumb Code 24 tau_delay.o(i.delayMs) + delayUs 0x00015395 Thumb Code 34 tau_delay.o(i.delayUs) + drv_ap_rst_trig_edge_detect 0x00015411 Thumb Code 46 drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) + drv_chip_info_get_info 0x00015449 Thumb Code 6 drv_chip_info.o(i.drv_chip_info_get_info) + drv_chip_info_init 0x00015455 Thumb Code 56 drv_chip_info.o(i.drv_chip_info_init) + drv_chip_rx_info_check 0x00015495 Thumb Code 98 drv_chip_info.o(i.drv_chip_rx_info_check) + drv_chip_rx_init_done 0x00015545 Thumb Code 16 drv_chip_info.o(i.drv_chip_rx_init_done) + drv_common_enable_systick 0x00015559 Thumb Code 70 drv_common.o(i.drv_common_enable_systick) + drv_common_system_init 0x000155b1 Thumb Code 8 drv_common.o(i.drv_common_system_init) + drv_crgu_config_reset_modules 0x000155b9 Thumb Code 10 drv_crgu.o(i.drv_crgu_config_reset_modules) + drv_crgu_set_ahb_pre_div 0x000155c9 Thumb Code 14 drv_crgu.o(i.drv_crgu_set_ahb_pre_div) + drv_crgu_set_ahb_src 0x000155dd Thumb Code 16 drv_crgu.o(i.drv_crgu_set_ahb_src) + drv_crgu_set_clock 0x000155f1 Thumb Code 26 drv_crgu.o(i.drv_crgu_set_clock) + drv_crgu_set_dpi_mux_src 0x00015611 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dpi_mux_src) + drv_crgu_set_dpi_pre_div 0x00015625 Thumb Code 18 drv_crgu.o(i.drv_crgu_set_dpi_pre_div) + drv_crgu_set_dpi_pre_src 0x0001563d Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dpi_pre_src) + drv_crgu_set_dsc_core_div 0x00015651 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dsc_core_div) + drv_crgu_set_dsco_src 0x00015665 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dsco_src) + drv_crgu_set_dsco_src_div 0x00015679 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dsco_src_div) + drv_crgu_set_fb_div 0x0001568d Thumb Code 16 drv_crgu.o(i.drv_crgu_set_fb_div) + drv_crgu_set_fb_src 0x000156a1 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_fb_src) + drv_crgu_set_lcdc_div 0x000156b5 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_lcdc_div) + drv_crgu_set_lcdc_src 0x000156c9 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_lcdc_src) + drv_crgu_set_mipi_cfg_src 0x000156dd Thumb Code 16 drv_crgu.o(i.drv_crgu_set_mipi_cfg_src) + drv_crgu_set_mipi_ref_src 0x000156f1 Thumb Code 18 drv_crgu.o(i.drv_crgu_set_mipi_ref_src) + drv_crgu_set_reset 0x00015709 Thumb Code 20 drv_crgu.o(i.drv_crgu_set_reset) + drv_crgu_set_rxbr_div 0x00015721 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_rxbr_div) + drv_crgu_set_rxbr_src 0x00015735 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_rxbr_src) + drv_crgu_set_vidc_src 0x00015749 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_vidc_src) + drv_dma_clear_flag 0x0001575d Thumb Code 24 drv_dma.o(i.drv_dma_clear_flag) + drv_dma_create_handle 0x00015775 Thumb Code 22 drv_dma.o(i.drv_dma_create_handle) + drv_dma_disenable_channel 0x00015791 Thumb Code 16 drv_dma.o(i.drv_dma_disenable_channel) + drv_dma_enable_channel 0x000157a1 Thumb Code 16 drv_dma.o(i.drv_dma_enable_channel) + drv_dma_enable_channel_interrupts 0x000157b1 Thumb Code 32 drv_dma.o(i.drv_dma_enable_channel_interrupts) + drv_dma_get_channel_flag 0x000157d5 Thumb Code 12 drv_dma.o(i.drv_dma_get_channel_flag) + drv_dma_irq_handler 0x000157e1 Thumb Code 138 drv_dma.o(i.drv_dma_irq_handler) + drv_dma_prepar_transfer 0x00015871 Thumb Code 18 drv_dma.o(i.drv_dma_prepar_transfer) + drv_dma_set_burst 0x00015883 Thumb Code 26 drv_dma.o(i.drv_dma_set_burst) + drv_dma_set_callback 0x0001589d Thumb Code 6 drv_dma.o(i.drv_dma_set_callback) + drv_dma_set_transfer 0x000158a5 Thumb Code 62 drv_dma.o(i.drv_dma_set_transfer) + drv_dsc_dec_convert_pps_rc_parameter 0x000158e9 Thumb Code 54 drv_dsc_dec.o(i.drv_dsc_dec_convert_pps_rc_parameter) + drv_dsc_dec_disable 0x0001591f Thumb Code 12 drv_dsc_dec.o(i.drv_dsc_dec_disable) + drv_dsc_dec_enable 0x0001592d Thumb Code 88 drv_dsc_dec.o(i.drv_dsc_dec_enable) + drv_dsc_dec_get_nslc 0x000159a1 Thumb Code 10 drv_dsc_dec.o(i.drv_dsc_dec_get_nslc) + drv_dsc_dec_set_u8_pps 0x000159ab Thumb Code 40 drv_dsc_dec.o(i.drv_dsc_dec_set_u8_pps) + drv_dsi_rx_calc_ipi_tx_delay 0x000159d5 Thumb Code 244 drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) + drv_dsi_rx_enable_irq 0x00015ad9 Thumb Code 58 drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) + drv_dsi_rx_get_compression_en 0x00015b85 Thumb Code 8 drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) + drv_dsi_rx_get_max_ret_size 0x00015b8d Thumb Code 6 drv_dsi_rx.o(i.drv_dsi_rx_get_max_ret_size) + drv_dsi_rx_power_up 0x00015b93 Thumb Code 14 drv_dsi_rx.o(i.drv_dsi_rx_power_up) + drv_dsi_rx_set_ctrl_cfg 0x00015ba1 Thumb Code 32 drv_dsi_rx.o(i.drv_dsi_rx_set_ctrl_cfg) + drv_dsi_rx_set_ddi_cfg 0x00015bc1 Thumb Code 16 drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) + drv_dsi_rx_set_inten 0x00015bd1 Thumb Code 4 drv_dsi_rx.o(i.drv_dsi_rx_set_inten) + drv_dsi_rx_set_ipi_cfg 0x00015bd5 Thumb Code 16 drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_cfg) + drv_dsi_rx_set_lane_swap 0x00015be5 Thumb Code 70 drv_dsi_rx.o(i.drv_dsi_rx_set_lane_swap) + drv_dsi_rx_set_resp_cnt 0x00015c2b Thumb Code 38 drv_dsi_rx.o(i.drv_dsi_rx_set_resp_cnt) + drv_dsi_rx_set_up_phy 0x00015c51 Thumb Code 256 drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) + drv_dsi_rx_shut_down 0x00015d55 Thumb Code 14 drv_dsi_rx.o(i.drv_dsi_rx_shut_down) + drv_dsi_tx_command_header 0x00015d63 Thumb Code 20 drv_dsi_tx.o(i.drv_dsi_tx_command_header) + drv_dsi_tx_command_mode_cfg 0x00015d77 Thumb Code 108 drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) + drv_dsi_tx_command_put_payload 0x00015de3 Thumb Code 4 drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) + drv_dsi_tx_config_eotp 0x00015de7 Thumb Code 24 drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) + drv_dsi_tx_config_int 0x00015dff Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_config_int) + drv_dsi_tx_dpi_lpcmd_time 0x00015e07 Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_dpi_lpcmd_time) + drv_dsi_tx_dpi_mode 0x00015e0f Thumb Code 10 drv_dsi_tx.o(i.drv_dsi_tx_dpi_mode) + drv_dsi_tx_dpi_polarity 0x00015e19 Thumb Code 36 drv_dsi_tx.o(i.drv_dsi_tx_dpi_polarity) + drv_dsi_tx_edpi_cmd_size 0x00015e3d Thumb Code 4 drv_dsi_tx.o(i.drv_dsi_tx_edpi_cmd_size) + drv_dsi_tx_get_cmd_status 0x00015e41 Thumb Code 4 drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) + drv_dsi_tx_mode 0x00015e45 Thumb Code 4 drv_dsi_tx.o(i.drv_dsi_tx_mode) + drv_dsi_tx_phy_clock_lane_auto_lp 0x00015e49 Thumb Code 24 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_auto_lp) + drv_dsi_tx_phy_clock_lane_req_hs 0x00015e61 Thumb Code 26 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) + drv_dsi_tx_phy_lane_mode 0x00015e7b Thumb Code 12 drv_dsi_tx.o(i.drv_dsi_tx_phy_lane_mode) + drv_dsi_tx_phy_status_ready 0x00015e87 Thumb Code 100 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ready) + drv_dsi_tx_phy_status_stopstate 0x00015eeb Thumb Code 62 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) + drv_dsi_tx_phy_test_setup 0x00015f29 Thumb Code 308 drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) + drv_dsi_tx_phy_time_cfg 0x0001605d Thumb Code 30 drv_dsi_tx.o(i.drv_dsi_tx_phy_time_cfg) + drv_dsi_tx_powerup 0x0001607b Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_powerup) + drv_dsi_tx_response_mode 0x00016083 Thumb Code 28 drv_dsi_tx.o(i.drv_dsi_tx_response_mode) + drv_dsi_tx_set_bta_ack 0x0001609f Thumb Code 24 drv_dsi_tx.o(i.drv_dsi_tx_set_bta_ack) + drv_dsi_tx_set_esc_div 0x000160b7 Thumb Code 12 drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) + drv_dsi_tx_set_int 0x000160c5 Thumb Code 58 drv_dsi_tx.o(i.drv_dsi_tx_set_int) + drv_dsi_tx_set_time_out_div 0x00016105 Thumb Code 16 drv_dsi_tx.o(i.drv_dsi_tx_set_time_out_div) + drv_dsi_tx_set_video_chunk 0x00016115 Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_set_video_chunk) + drv_dsi_tx_set_video_timing 0x0001611d Thumb Code 34 drv_dsi_tx.o(i.drv_dsi_tx_set_video_timing) + drv_dsi_tx_shutdown 0x0001613f Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_shutdown) + drv_dsi_tx_timeout_cfg 0x00016147 Thumb Code 38 drv_dsi_tx.o(i.drv_dsi_tx_timeout_cfg) + drv_dsi_tx_video_mode_cfg 0x0001616d Thumb Code 170 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_cfg) + drv_dsi_tx_video_mode_disable_hact_cmd 0x00016217 Thumb Code 22 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_disable_hact_cmd) + drv_dsi_tx_video_mode_set_lp_cmd 0x0001622d Thumb Code 24 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_set_lp_cmd) + drv_efuse_enter_inactive 0x00016245 Thumb Code 46 drv_efuse.o(i.drv_efuse_enter_inactive) + drv_efuse_int_enable 0x00016273 Thumb Code 12 drv_efuse.o(i.drv_efuse_int_enable) + drv_efuse_read 0x0001627f Thumb Code 50 drv_efuse.o(i.drv_efuse_read) + drv_efuse_read_req 0x000162b1 Thumb Code 24 drv_efuse.o(i.drv_efuse_read_req) + drv_gpio_get_input_data 0x000162c9 Thumb Code 20 drv_gpio.o(i.drv_gpio_get_input_data) + drv_gpio_register_ap_reset_callback 0x000162e1 Thumb Code 6 drv_gpio.o(i.drv_gpio_register_ap_reset_callback) + drv_gpio_register_callback 0x000162ed Thumb Code 14 drv_gpio.o(i.drv_gpio_register_callback) + drv_gpio_set_int 0x00016301 Thumb Code 74 drv_gpio.o(i.drv_gpio_set_int) + drv_gpio_set_ioe 0x00016351 Thumb Code 26 drv_gpio.o(i.drv_gpio_set_ioe) + drv_gpio_set_mode0 0x00016371 Thumb Code 12 drv_gpio.o(i.drv_gpio_set_mode0) + drv_gpio_set_mode1 0x00016381 Thumb Code 12 drv_gpio.o(i.drv_gpio_set_mode1) + drv_gpio_set_mode2 0x00016391 Thumb Code 12 drv_gpio.o(i.drv_gpio_set_mode2) + drv_gpio_set_mode3 0x000163a1 Thumb Code 12 drv_gpio.o(i.drv_gpio_set_mode3) + drv_gpio_set_pull_state 0x000163d1 Thumb Code 298 drv_gpio.o(i.drv_gpio_set_pull_state) + drv_i2c0_set_callback 0x00016501 Thumb Code 6 drv_i2c_slave.o(i.drv_i2c0_set_callback) + drv_i2c1_set_callback 0x0001650d Thumb Code 6 drv_i2c_master.o(i.drv_i2c1_set_callback) + drv_i2c_dma_init 0x0001654d Thumb Code 146 drv_i2c_dma.o(i.drv_i2c_dma_init) + drv_i2c_enable_rx_dma 0x000165f9 Thumb Code 26 drv_i2c_dma.o(i.drv_i2c_enable_rx_dma) + drv_i2c_enable_tx_dma 0x00016613 Thumb Code 24 drv_i2c_dma.o(i.drv_i2c_enable_tx_dma) + drv_i2c_m_clear_it_pending_bit 0x0001662d Thumb Code 86 drv_i2c_master.o(i.drv_i2c_m_clear_it_pending_bit) + drv_i2c_m_enable 0x0001668d Thumb Code 10 drv_i2c_master.o(i.drv_i2c_m_enable) + drv_i2c_m_enable_intr 0x0001669d Thumb Code 42 drv_i2c_master.o(i.drv_i2c_m_enable_intr) + drv_i2c_master_init 0x000166d5 Thumb Code 118 drv_i2c_master.o(i.drv_i2c_master_init) + drv_i2c_master_read_dma 0x00016761 Thumb Code 82 drv_i2c_dma.o(i.drv_i2c_master_read_dma) + drv_i2c_master_write_dma 0x000167bd Thumb Code 50 drv_i2c_dma.o(i.drv_i2c_master_write_dma) + drv_i2c_s_clear_it_pending_bit 0x00016837 Thumb Code 66 drv_i2c_slave.o(i.drv_i2c_s_clear_it_pending_bit) + drv_i2c_s_config_intr 0x00016879 Thumb Code 4 drv_i2c_slave.o(i.drv_i2c_s_config_intr) + drv_i2c_s_enable 0x0001687d Thumb Code 8 drv_i2c_slave.o(i.drv_i2c_s_enable) + drv_i2c_s_get_fifo_status 0x00016885 Thumb Code 20 drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) + drv_i2c_s_set_intr 0x00016899 Thumb Code 74 drv_i2c_slave.o(i.drv_i2c_s_set_intr) + drv_i2c_s_write_data 0x000168e9 Thumb Code 28 drv_i2c_slave.o(i.drv_i2c_s_write_data) + drv_i2c_set_dma_irq_callback 0x00016905 Thumb Code 68 drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) + drv_i2c_slave_init 0x0001695d Thumb Code 50 drv_i2c_slave.o(i.drv_i2c_slave_init) + drv_i2c_slave_write_dma 0x00016991 Thumb Code 20 drv_i2c_dma.o(i.drv_i2c_slave_write_dma) + drv_lcdc_config_bypass 0x000169a9 Thumb Code 24 drv_lcdc.o(i.drv_lcdc_config_bypass) + drv_lcdc_config_ccm 0x000169c1 Thumb Code 48 drv_lcdc.o(i.drv_lcdc_config_ccm) + drv_lcdc_config_disp_mode 0x000169f1 Thumb Code 22 drv_lcdc.o(i.drv_lcdc_config_disp_mode) + drv_lcdc_config_dpi_polarity 0x00016a07 Thumb Code 36 drv_lcdc.o(i.drv_lcdc_config_dpi_polarity) + drv_lcdc_config_dpi_timing 0x00016a2b Thumb Code 38 drv_lcdc.o(i.drv_lcdc_config_dpi_timing) + drv_lcdc_config_edpi_mode 0x00016a51 Thumb Code 22 drv_lcdc.o(i.drv_lcdc_config_edpi_mode) + drv_lcdc_config_endianness 0x00016a67 Thumb Code 22 drv_lcdc.o(i.drv_lcdc_config_endianness) + drv_lcdc_config_input_size 0x00016a7d Thumb Code 12 drv_lcdc.o(i.drv_lcdc_config_input_size) + drv_lcdc_config_int 0x00016a89 Thumb Code 30 drv_lcdc.o(i.drv_lcdc_config_int) + drv_lcdc_config_int_single 0x00016aa7 Thumb Code 34 drv_lcdc.o(i.drv_lcdc_config_int_single) + drv_lcdc_config_overwrite 0x00016ac9 Thumb Code 34 drv_lcdc.o(i.drv_lcdc_config_overwrite) + drv_lcdc_config_overwrite_rgb 0x00016aeb Thumb Code 12 drv_lcdc.o(i.drv_lcdc_config_overwrite_rgb) + drv_lcdc_config_partial_display_area 0x00016af7 Thumb Code 26 drv_lcdc.o(i.drv_lcdc_config_partial_display_area) + drv_lcdc_config_partial_display_enable 0x00016b11 Thumb Code 34 drv_lcdc.o(i.drv_lcdc_config_partial_display_enable) + drv_lcdc_config_scale_up_coef 0x00016b33 Thumb Code 26 drv_lcdc.o(i.drv_lcdc_config_scale_up_coef) + drv_lcdc_config_scale_up_step 0x00016b4d Thumb Code 12 drv_lcdc.o(i.drv_lcdc_config_scale_up_step) + drv_lcdc_config_src_parameter 0x00016b59 Thumb Code 76 drv_lcdc.o(i.drv_lcdc_config_src_parameter) + drv_lcdc_config_thresh 0x00016ba5 Thumb Code 6 drv_lcdc.o(i.drv_lcdc_config_thresh) + drv_lcdc_ctrl_flow 0x00016bab Thumb Code 18 drv_lcdc.o(i.drv_lcdc_ctrl_flow) + drv_lcdc_enable_shadow_reg 0x00016bbd Thumb Code 32 drv_lcdc.o(i.drv_lcdc_enable_shadow_reg) + drv_lcdc_set_int 0x00016bdd Thumb Code 58 drv_lcdc.o(i.drv_lcdc_set_int) + drv_lcdc_set_prefetch 0x00016c1d Thumb Code 24 drv_lcdc.o(i.drv_lcdc_set_prefetch) + drv_lcdc_set_video_hw_mode 0x00016c35 Thumb Code 20 drv_lcdc.o(i.drv_lcdc_set_video_hw_mode) + drv_lcdc_start 0x00016c49 Thumb Code 32 drv_lcdc.o(i.drv_lcdc_start) + drv_memc_clear_status 0x00016c69 Thumb Code 12 drv_memc.o(i.drv_memc_clear_status) + drv_memc_enable_irq 0x00016c75 Thumb Code 58 drv_memc.o(i.drv_memc_enable_irq) + drv_memc_gen_a_tear_signal 0x00016cb5 Thumb Code 12 drv_memc.o(i.drv_memc_gen_a_tear_signal) + drv_memc_get_status 0x00016cc1 Thumb Code 18 drv_memc.o(i.drv_memc_get_status) + drv_memc_rate_transfer_sel 0x00016cd3 Thumb Code 16 drv_memc.o(i.drv_memc_rate_transfer_sel) + drv_memc_sel_vsync 0x00016ce3 Thumb Code 14 drv_memc.o(i.drv_memc_sel_vsync) + drv_memc_set_active_height 0x00016cf1 Thumb Code 14 drv_memc.o(i.drv_memc_set_active_height) + drv_memc_set_data_mode 0x00016d05 Thumb Code 12 drv_memc.o(i.drv_memc_set_data_mode) + drv_memc_set_double_buffer 0x00016d11 Thumb Code 16 drv_memc.o(i.drv_memc_set_double_buffer) + drv_memc_set_double_buffer_reverse 0x00016d21 Thumb Code 18 drv_memc.o(i.drv_memc_set_double_buffer_reverse) + drv_memc_set_fs_en_conditions 0x00016d33 Thumb Code 16 drv_memc.o(i.drv_memc_set_fs_en_conditions) + drv_memc_set_inten 0x00016d43 Thumb Code 20 drv_memc.o(i.drv_memc_set_inten) + drv_memc_set_lcdc_st_conditions 0x00016d59 Thumb Code 18 drv_memc.o(i.drv_memc_set_lcdc_st_conditions) + drv_memc_set_ltpo_mode 0x00016d71 Thumb Code 26 drv_memc.o(i.drv_memc_set_ltpo_mode) + drv_memc_set_tear_mode 0x00016d8b Thumb Code 14 drv_memc.o(i.drv_memc_set_tear_mode) + drv_memc_set_tear_waveform 0x00016d99 Thumb Code 34 drv_memc.o(i.drv_memc_set_tear_waveform) + drv_memc_set_vidc_sync_cnt 0x00016dc1 Thumb Code 14 drv_memc.o(i.drv_memc_set_vidc_sync_cnt) + drv_param_init_get_ccm 0x00016dd1 Thumb Code 4 drv_param_init.o(i.drv_param_init_get_ccm) + drv_param_init_get_scld_filter_h 0x00016dd9 Thumb Code 12 drv_param_init.o(i.drv_param_init_get_scld_filter_h) + drv_param_init_get_scld_filter_v 0x00016ded Thumb Code 12 drv_param_init.o(i.drv_param_init_get_scld_filter_v) + drv_param_init_get_sclu_filter 0x00016e01 Thumb Code 4 drv_param_init.o(i.drv_param_init_get_sclu_filter) + drv_param_init_set_ccm 0x00016e09 Thumb Code 14 drv_param_init.o(i.drv_param_init_set_ccm) + drv_param_p2r_filter_init 0x00016e1d Thumb Code 30 drv_param_init.o(i.drv_param_p2r_filter_init) + drv_phy_enable_calibration 0x00016e41 Thumb Code 12 drv_phy_common.o(i.drv_phy_enable_calibration) + drv_phy_get_calibration 0x00016e51 Thumb Code 50 drv_phy_common.o(i.drv_phy_get_calibration) + drv_phy_get_pll_para 0x00016e8d Thumb Code 88 drv_phy_common.o(i.drv_phy_get_pll_para) + drv_phy_get_rate_para 0x00016eed Thumb Code 76 drv_phy_common.o(i.drv_phy_get_rate_para) + drv_phy_test_clear 0x00016f41 Thumb Code 16 drv_phy_common.o(i.drv_phy_test_clear) + drv_phy_test_lock 0x00016f51 Thumb Code 24 drv_phy_common.o(i.drv_phy_test_lock) + drv_phy_test_write_1_byte 0x00016f69 Thumb Code 32 drv_phy_common.o(i.drv_phy_test_write_1_byte) + drv_phy_test_write_2_byte 0x00016f89 Thumb Code 38 drv_phy_common.o(i.drv_phy_test_write_2_byte) + drv_phy_test_write_code 0x00016faf Thumb Code 30 drv_phy_common.o(i.drv_phy_test_write_code) + drv_pwr_set_cp_mode 0x00016fed Thumb Code 26 drv_pwr.o(i.drv_pwr_set_cp_mode) + drv_pwr_set_pvd_mode 0x0001700d Thumb Code 18 drv_pwr.o(i.drv_pwr_set_pvd_mode) + drv_pwr_set_system_clk_src 0x00017025 Thumb Code 44 drv_pwr.o(i.drv_pwr_set_system_clk_src) + drv_rxbr_clear_pkt_buffer 0x000170a3 Thumb Code 10 drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) + drv_rxbr_clear_status0 0x000170ad Thumb Code 4 drv_rxbr.o(i.drv_rxbr_clear_status0) + drv_rxbr_enable_irq 0x000170b1 Thumb Code 90 drv_rxbr.o(i.drv_rxbr_enable_irq) + drv_rxbr_frame_drop_cfg 0x0001710d Thumb Code 16 drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) + drv_rxbr_get_clk 0x00017121 Thumb Code 66 drv_rxbr.o(i.drv_rxbr_get_clk) + drv_rxbr_get_col_addr 0x00017185 Thumb Code 4 drv_rxbr.o(i.drv_rxbr_get_col_addr) + drv_rxbr_get_page_addr 0x0001719b Thumb Code 4 drv_rxbr.o(i.drv_rxbr_get_page_addr) + drv_rxbr_hline_rcv0_cfg 0x000171b1 Thumb Code 12 drv_rxbr.o(i.drv_rxbr_hline_rcv0_cfg) + drv_rxbr_hline_rcv_cfg 0x000171bd Thumb Code 8 drv_rxbr.o(i.drv_rxbr_hline_rcv_cfg) + drv_rxbr_register_irq0_callback 0x000171c5 Thumb Code 6 drv_rxbr.o(i.drv_rxbr_register_irq0_callback) + drv_rxbr_register_irq1_callback 0x000171d1 Thumb Code 6 drv_rxbr.o(i.drv_rxbr_register_irq1_callback) + drv_rxbr_set_ack_pkt_header 0x000171dd Thumb Code 20 drv_rxbr.o(i.drv_rxbr_set_ack_pkt_header) + drv_rxbr_set_cmd_filter 0x000171f1 Thumb Code 204 drv_rxbr.o(i.drv_rxbr_set_cmd_filter) + drv_rxbr_set_color_format 0x000172bd Thumb Code 20 drv_rxbr.o(i.drv_rxbr_set_color_format) + drv_rxbr_set_inten 0x000172d1 Thumb Code 20 drv_rxbr.o(i.drv_rxbr_set_inten) + drv_rxbr_set_ltpo_drop_th 0x000172e5 Thumb Code 16 drv_rxbr.o(i.drv_rxbr_set_ltpo_drop_th) + drv_rxbr_set_usr_cfg 0x000172f5 Thumb Code 38 drv_rxbr.o(i.drv_rxbr_set_usr_cfg) + drv_rxbr_set_usr_col 0x0001731b Thumb Code 8 drv_rxbr.o(i.drv_rxbr_set_usr_col) + drv_rxbr_set_usr_row 0x00017323 Thumb Code 8 drv_rxbr.o(i.drv_rxbr_set_usr_row) + drv_spi_m_read_data 0x0001732d Thumb Code 28 drv_spi_master.o(i.drv_spi_m_read_data) + drv_swire_set_int 0x0001734d Thumb Code 76 drv_swire.o(i.drv_swire_set_int) + drv_swire_set_power_down 0x000173a1 Thumb Code 24 drv_swire.o(i.drv_swire_set_power_down) + drv_sys_cfg_clear_all_int 0x000173bd Thumb Code 8 drv_sys_cfg.o(i.drv_sys_cfg_clear_all_int) + drv_sys_cfg_clear_pending 0x000173c9 Thumb Code 32 drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) + drv_sys_cfg_sel_ap_rst_lvl_trig 0x000173f1 Thumb Code 18 drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_lvl_trig) + drv_sys_cfg_sel_ap_rst_trig 0x00017409 Thumb Code 22 drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) + drv_sys_cfg_sel_gpio_group 0x00017425 Thumb Code 30 drv_sys_cfg.o(i.drv_sys_cfg_sel_gpio_group) + drv_sys_cfg_sel_int_trig 0x00017449 Thumb Code 30 drv_sys_cfg.o(i.drv_sys_cfg_sel_int_trig) + drv_sys_cfg_set_dma_rx_req 0x0001746d Thumb Code 10 drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) + drv_sys_cfg_set_dma_tx_req 0x0001747d Thumb Code 10 drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) + drv_sys_cfg_set_int 0x0001748d Thumb Code 30 drv_sys_cfg.o(i.drv_sys_cfg_set_int) + drv_timer_enable 0x000174cb Thumb Code 32 drv_timer.o(i.drv_timer_enable) + drv_timer_get_instance 0x000174ed Thumb Code 10 drv_timer.o(i.drv_timer_get_instance) + drv_timer_get_prescaler 0x000174fd Thumb Code 12 drv_timer.o(i.drv_timer_get_prescaler) + drv_timer_register_callback 0x00017551 Thumb Code 14 drv_timer.o(i.drv_timer_register_callback) + drv_timer_set_compare_val 0x00017565 Thumb Code 16 drv_timer.o(i.drv_timer_set_compare_val) + drv_timer_set_int 0x00017575 Thumb Code 80 drv_timer.o(i.drv_timer_set_int) + drv_timer_set_prescaler 0x000175c9 Thumb Code 36 drv_timer.o(i.drv_timer_set_prescaler) + drv_tx_phy_test_enter 0x000175fb Thumb Code 28 drv_dsi_tx.o(i.drv_tx_phy_test_enter) + drv_tx_phy_test_exit 0x00017617 Thumb Code 28 drv_dsi_tx.o(i.drv_tx_phy_test_exit) + drv_vidc_clear_irq 0x00017669 Thumb Code 8 drv_vidc.o(i.drv_vidc_clear_irq) + drv_vidc_enable 0x00017671 Thumb Code 24 drv_vidc.o(i.drv_vidc_enable) + drv_vidc_enable_irq 0x00017689 Thumb Code 58 drv_vidc.o(i.drv_vidc_enable_irq) + drv_vidc_get_irq_status 0x000176c9 Thumb Code 18 drv_vidc.o(i.drv_vidc_get_irq_status) + drv_vidc_init_module_enable 0x000176dd Thumb Code 36 drv_vidc.o(i.drv_vidc_init_module_enable) + drv_vidc_register_callback 0x00017705 Thumb Code 6 drv_vidc.o(i.drv_vidc_register_callback) + drv_vidc_reset 0x00017711 Thumb Code 6 drv_vidc.o(i.drv_vidc_reset) + drv_vidc_set_dst_parameter 0x00017717 Thumb Code 60 drv_vidc.o(i.drv_vidc_set_dst_parameter) + drv_vidc_set_irqen 0x00017753 Thumb Code 20 drv_vidc.o(i.drv_vidc_set_irqen) + drv_vidc_set_mirror 0x00017767 Thumb Code 16 drv_vidc.o(i.drv_vidc_set_mirror) + drv_vidc_set_p2r_hcoef0 0x00017777 Thumb Code 8 drv_vidc.o(i.drv_vidc_set_p2r_hcoef0) + drv_vidc_set_p2r_hinitb 0x0001777f Thumb Code 38 drv_vidc.o(i.drv_vidc_set_p2r_hinitb) + drv_vidc_set_p2r_hinitr 0x000177a5 Thumb Code 38 drv_vidc.o(i.drv_vidc_set_p2r_hinitr) + drv_vidc_set_pentile_swap 0x000177cd Thumb Code 18 drv_vidc.o(i.drv_vidc_set_pentile_swap) + drv_vidc_set_pu_ctrl 0x000177e5 Thumb Code 10 drv_vidc.o(i.drv_vidc_set_pu_ctrl) + drv_vidc_set_rotation 0x000177ef Thumb Code 16 drv_vidc.o(i.drv_vidc_set_rotation) + drv_vidc_set_scld_hcoef0 0x000177ff Thumb Code 10 drv_vidc.o(i.drv_vidc_set_scld_hcoef0) + drv_vidc_set_scld_hcoef1 0x00017809 Thumb Code 10 drv_vidc.o(i.drv_vidc_set_scld_hcoef1) + drv_vidc_set_scld_step 0x00017813 Thumb Code 18 drv_vidc.o(i.drv_vidc_set_scld_step) + drv_vidc_set_scld_vcoef0 0x00017825 Thumb Code 10 drv_vidc.o(i.drv_vidc_set_scld_vcoef0) + drv_vidc_set_scld_vcoef1 0x0001782f Thumb Code 10 drv_vidc.o(i.drv_vidc_set_scld_vcoef1) + drv_vidc_set_src_parameter 0x00017839 Thumb Code 22 drv_vidc.o(i.drv_vidc_set_src_parameter) + drv_wdg_clear_counter 0x00017851 Thumb Code 12 drv_wdg.o(i.drv_wdg_clear_counter) + drv_wdg_set_int 0x00017881 Thumb Code 60 drv_wdg.o(i.drv_wdg_set_int) + fls_clr_interrupt_flag 0x000178c1 Thumb Code 10 drv_fls.o(i.fls_clr_interrupt_flag) + fputc 0x000178cb Thumb Code 20 tau_log.o(i.fputc) + hal_dsi_rx_ctrl_create_handle 0x000178e1 Thumb Code 48 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) + hal_dsi_rx_ctrl_deinit 0x00017915 Thumb Code 148 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) + hal_dsi_rx_ctrl_dsc_async_handler 0x000179b1 Thumb Code 120 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) + hal_dsi_rx_ctrl_gen_a_tear_signal 0x00017a35 Thumb Code 32 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) + hal_dsi_rx_ctrl_get_max_ret_size 0x00017a5d Thumb Code 30 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) + hal_dsi_rx_ctrl_hight_performan_mode 0x00017a85 Thumb Code 16 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) + hal_dsi_rx_ctrl_init 0x00017ae9 Thumb Code 144 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) + hal_dsi_rx_ctrl_pre_init_pps 0x000182c9 Thumb Code 56 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_pre_init_pps) + hal_dsi_rx_ctrl_send_ack_cmd 0x00018305 Thumb Code 212 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) + hal_dsi_rx_ctrl_set_cus_sync_line 0x000183f5 Thumb Code 44 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) + hal_dsi_rx_ctrl_set_hw_tear_mode 0x00018429 Thumb Code 42 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode) + hal_dsi_rx_ctrl_set_sw_tear_mode 0x00018509 Thumb Code 42 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) + hal_dsi_rx_ctrl_set_tear_mode_ex 0x0001853d Thumb Code 14 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_tear_mode_ex) + hal_dsi_rx_ctrl_start 0x0001854d Thumb Code 46 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) + hal_dsi_rx_ctrl_stop 0x00018589 Thumb Code 46 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) + hal_dsi_rx_ctrl_toggle_resolution 0x000185c5 Thumb Code 28 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) + hal_dsi_tx_ctrl_create_handle 0x00018bf9 Thumb Code 34 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) + hal_dsi_tx_ctrl_deinit 0x00018c25 Thumb Code 118 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) + hal_dsi_tx_ctrl_enter_init_panel_mode 0x00018ca9 Thumb Code 68 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) + hal_dsi_tx_ctrl_exit_init_panel_mode 0x00018cf5 Thumb Code 32 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) + hal_dsi_tx_ctrl_init 0x00018d1d Thumb Code 154 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) + hal_dsi_tx_ctrl_panel_reset_pin 0x00018de5 Thumb Code 12 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_panel_reset_pin) + hal_dsi_tx_ctrl_set_overwrite_rgb 0x00018df1 Thumb Code 16 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) + hal_dsi_tx_ctrl_set_partial_disp 0x00018e05 Thumb Code 12 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp) + hal_dsi_tx_ctrl_set_partial_disp_area 0x00018e15 Thumb Code 30 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp_area) + hal_dsi_tx_ctrl_start 0x00018e39 Thumb Code 140 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) + hal_dsi_tx_ctrl_stop 0x00018ed5 Thumb Code 56 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) + hal_dsi_tx_ctrl_write_array_cmd 0x00018f19 Thumb Code 210 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) + hal_dsi_tx_ctrl_write_cmd 0x00018ff1 Thumb Code 172 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) + hal_gpio_ctrl_eint 0x00019285 Thumb Code 18 hal_gpio.o(i.hal_gpio_ctrl_eint) + hal_gpio_get_input_data 0x0001929d Thumb Code 18 hal_gpio.o(i.hal_gpio_get_input_data) + hal_gpio_init_eint 0x000192b1 Thumb Code 58 hal_gpio.o(i.hal_gpio_init_eint) + hal_gpio_init_input 0x000192f1 Thumb Code 28 hal_gpio.o(i.hal_gpio_init_input) + hal_gpio_init_output 0x00019311 Thumb Code 34 hal_gpio.o(i.hal_gpio_init_output) + hal_gpio_reg_eint_cb 0x00019339 Thumb Code 20 hal_gpio.o(i.hal_gpio_reg_eint_cb) + hal_gpio_set_ap_reset_int 0x00019351 Thumb Code 76 hal_gpio.o(i.hal_gpio_set_ap_reset_int) + hal_gpio_set_mode 0x000193a1 Thumb Code 90 hal_gpio.o(i.hal_gpio_set_mode) + hal_gpio_set_output_data 0x00019401 Thumb Code 8 hal_gpio.o(i.hal_gpio_set_output_data) + hal_gpio_set_pull_state 0x00019409 Thumb Code 26 hal_gpio.o(i.hal_gpio_set_pull_state) + hal_i2c_m_dma_init 0x00019429 Thumb Code 92 hal_i2c_master.o(i.hal_i2c_m_dma_init) + hal_i2c_m_dma_read 0x00019495 Thumb Code 26 hal_i2c_master.o(i.hal_i2c_m_dma_read) + hal_i2c_m_dma_write 0x000194b5 Thumb Code 24 hal_i2c_master.o(i.hal_i2c_m_dma_write) + hal_i2c_m_transfer_complate 0x000194d1 Thumb Code 6 hal_i2c_master.o(i.hal_i2c_m_transfer_complate) + hal_i2c_s_dma_write 0x0001950d Thumb Code 62 hal_i2c_slave.o(i.hal_i2c_s_dma_write) + hal_i2c_s_init 0x00019559 Thumb Code 176 hal_i2c_slave.o(i.hal_i2c_s_init) + hal_i2c_s_nonblocking_read 0x00019621 Thumb Code 14 hal_i2c_slave.o(i.hal_i2c_s_nonblocking_read) + hal_i2c_s_set_transfer 0x00019635 Thumb Code 6 hal_i2c_slave.o(i.hal_i2c_s_set_transfer) + hal_internal_init_memc 0x000197b5 Thumb Code 170 hal_internal_vsync.o(i.hal_internal_init_memc) + hal_internal_sync_get_fb_setting 0x000198b1 Thumb Code 12 hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) + hal_internal_sync_get_hight_performan_mode 0x000198c1 Thumb Code 10 hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) + hal_internal_sync_input_resolution_change 0x000198d1 Thumb Code 438 hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) + hal_internal_update_dpi_param 0x00019afd Thumb Code 10 hal_internal_vsync.o(i.hal_internal_update_dpi_param) + hal_internal_video_mode_auto_sync 0x00019b0d Thumb Code 270 hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) + hal_internal_vsync_deinit 0x00019c39 Thumb Code 30 hal_internal_vsync.o(i.hal_internal_vsync_deinit) + hal_internal_vsync_get_rx_state 0x00019c61 Thumb Code 6 hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) + hal_internal_vsync_get_sync_line 0x00019c6d Thumb Code 18 hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) + hal_internal_vsync_get_tear_mode 0x00019c85 Thumb Code 6 hal_internal_vsync.o(i.hal_internal_vsync_get_tear_mode) + hal_internal_vsync_get_tx_state 0x00019c91 Thumb Code 6 hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) + hal_internal_vsync_init_rx 0x00019c9d Thumb Code 236 hal_internal_vsync.o(i.hal_internal_vsync_init_rx) + hal_internal_vsync_init_tx 0x00019db5 Thumb Code 172 hal_internal_vsync.o(i.hal_internal_vsync_init_tx) + hal_internal_vsync_set_auto_hw_filter 0x00019e65 Thumb Code 222 hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) + hal_internal_vsync_set_rx_state 0x00019f81 Thumb Code 16 hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) + hal_internal_vsync_set_sync_line 0x00019f95 Thumb Code 30 hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) + hal_internal_vsync_set_tear_mode 0x00019fb9 Thumb Code 72 hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) + hal_internal_vsync_set_tx_state 0x0001a009 Thumb Code 118 hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) + hal_spi_m_clear_rxfifo 0x0001a4c1 Thumb Code 14 hal_spi_master.o(i.hal_spi_m_clear_rxfifo) + hal_swire_open 0x0001a4cf Thumb Code 22 hal_swire.o(i.hal_swire_open) + hal_system_enable_systick 0x0001a4e5 Thumb Code 8 hal_system.o(i.hal_system_enable_systick) + hal_system_init 0x0001a4ed Thumb Code 104 hal_system.o(i.hal_system_init) + hal_system_init_console 0x0001a575 Thumb Code 28 hal_system.o(i.hal_system_init_console) + hal_system_set_phy_calibration 0x0001a591 Thumb Code 8 hal_system.o(i.hal_system_set_phy_calibration) + hal_system_set_pvd 0x0001a599 Thumb Code 8 hal_system.o(i.hal_system_set_pvd) + hal_system_set_vcc 0x0001a5a1 Thumb Code 8 hal_system.o(i.hal_system_set_vcc) + hal_timer_init 0x0001a5a9 Thumb Code 26 hal_timer.o(i.hal_timer_init) + hal_timer_start 0x0001a5c5 Thumb Code 66 hal_timer.o(i.hal_timer_start) + hal_timer_stop 0x0001a60d Thumb Code 40 hal_timer.o(i.hal_timer_stop) + hal_uart_init 0x0001a635 Thumb Code 126 hal_uart.o(i.hal_uart_init) + hal_uart_transmit_blocking 0x0001a6c1 Thumb Code 12 hal_uart.o(i.hal_uart_transmit_blocking) + handle_init 0x0001a6d1 Thumb Code 140 irq_redirect .o(i.handle_init) + main 0x0001a8cd Thumb Code 10 main.o(i.main) + sqrt 0x0001b579 Thumb Code 66 sqrt.o(i.sqrt) + tp_heartbeat_exec 0x0001b5c1 Thumb Code 50 ap_demo.o(i.tp_heartbeat_exec) + wCRCTalbeAbs 0x0001ba90 Data 32 app_tp_st_touch.o(.constdata) + phone_data_21 0x0001bbc8 Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_55 0x0001bbc9 Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_85_1 0x0001bbca Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_92_1 0x0001bbcb Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_F5_1 0x0001bbcc Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_F5_2 0x0001bbcd Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_F5_3 0x0001bbce Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_F5_4 0x0001bbcf Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_30 0x0001bbd0 Data 2 app_tp_for_custom_s8.o(.constdata) + phone_data_52 0x0001bbd2 Data 3 app_tp_for_custom_s8.o(.constdata) + phone_data_92_3 0x0001bbd5 Data 3 app_tp_for_custom_s8.o(.constdata) + phone_data_A3 0x0001bbd8 Data 4 app_tp_for_custom_s8.o(.constdata) + phone_data_A4 0x0001bbdc Data 4 app_tp_for_custom_s8.o(.constdata) + phone_data_A5 0x0001bbe0 Data 4 app_tp_for_custom_s8.o(.constdata) + phone_data_AF 0x0001bbe4 Data 4 app_tp_for_custom_s8.o(.constdata) + phone_data_F1 0x0001bbe8 Data 4 app_tp_for_custom_s8.o(.constdata) + phone_data_22 0x0001bbec Data 5 app_tp_for_custom_s8.o(.constdata) + phone_data_92_2 0x0001bbf1 Data 6 app_tp_for_custom_s8.o(.constdata) + phone_data_F6_1 0x0001bbf7 Data 6 app_tp_for_custom_s8.o(.constdata) + phone_data_F6_2 0x0001bbfd Data 6 app_tp_for_custom_s8.o(.constdata) + phone_data_F6_3 0x0001bc03 Data 6 app_tp_for_custom_s8.o(.constdata) + phone_data_F6_4 0x0001bc09 Data 6 app_tp_for_custom_s8.o(.constdata) + phone_data_60_1 0x0001bc0f Data 16 app_tp_for_custom_s8.o(.constdata) + phone_data_23 0x0001bc1f Data 11 app_tp_for_custom_s8.o(.constdata) + phone_data_85_2 0x0001bc2a Data 28 app_tp_for_custom_s8.o(.constdata) + phone_data_90 0x0001bc46 Data 10 app_tp_for_custom_s8.o(.constdata) + phone_data_72_0 0x0001bc50 Data 1292 app_tp_for_custom_s8.o(.constdata) + phone_data_72_5 0x0001c15c Data 1292 app_tp_for_custom_s8.o(.constdata) + phone_data_72_13 0x0001c668 Data 1292 app_tp_for_custom_s8.o(.constdata) + phone_data_75_01 0x0001cb74 Data 654 app_tp_for_custom_s8.o(.constdata) + phone_data_75_02 0x0001ce02 Data 654 app_tp_for_custom_s8.o(.constdata) + phone_data_75_03 0x0001d090 Data 654 app_tp_for_custom_s8.o(.constdata) + phone_data_75_06 0x0001d31e Data 654 app_tp_for_custom_s8.o(.constdata) + phone_data_75_07 0x0001d5ac Data 654 app_tp_for_custom_s8.o(.constdata) + phone_data_75_05 0x0001d83a Data 654 app_tp_for_custom_s8.o(.constdata) + phone_data_75_00 0x0001dac8 Data 288 app_tp_for_custom_s8.o(.constdata) + phone_data_75_FF 0x0001dbe8 Data 288 app_tp_for_custom_s8.o(.constdata) + sleep_on 0x0001dd08 Data 16 app_tp_for_custom_s8.o(.constdata) + screen_reg_start_data_size 0x0001dd18 Data 1 app_tp_for_custom_s8.o(.constdata) + Region$$Table$$Base 0x0001e06c Number 0 anon$$obj.o(Region$$Table) + Region$$Table$$Limit 0x0001e09c Number 0 anon$$obj.o(Region$$Table) + g_fun_handle 0x00070100 Data 192 irq_redirect .o(.ARM.__AT_0x00070100) + phone_86_flag 0x000701d7 Data 1 ap_demo.o(.data) + phone_A6_flag 0x000701d8 Data 1 ap_demo.o(.data) + phone_start_flag 0x000701d9 Data 1 ap_demo.o(.data) + phone_DisplayOFF_flag 0x000701da Data 1 ap_demo.o(.data) + ap_tear_flag 0x000701db Data 1 ap_demo.o(.data) + g_enter_display_off 0x000701dc Data 1 ap_demo.o(.data) + g_enter_display_ON 0x000701dd Data 1 ap_demo.o(.data) + phone_DisplayOFF_count 0x000701e6 Data 2 ap_demo.o(.data) + value_reg_b1 0x000701e8 Data 2 ap_demo.o(.data) + value_reg_b1_bak 0x000701ea Data 2 ap_demo.o(.data) + value_reg51 0x000701ec Data 2 ap_demo.o(.data) + value_reg51_bak 0x000701ee Data 2 ap_demo.o(.data) + s_heartbeat 0x000701f8 Data 4 ap_demo.o(.data) + value_reg_ca 0x000701fc Data 4 ap_demo.o(.data) + panel_init_code 0x00070200 Data 7466 ap_demo.o(.data) + s_screen_init_complate 0x00071f2e Data 1 app_tp_transfer.o(.data) + MI10_PRO_screen_init_data1 0x00071f32 Data 3 app_tp_transfer.o(.data) + MI10_PRO_screen_init_data3 0x00071f35 Data 3 app_tp_transfer.o(.data) + MI10_PRO_screen_init_data4 0x00071f38 Data 3 app_tp_transfer.o(.data) + MI10_PRO_screen_init_data2 0x00071f3b Data 6 app_tp_transfer.o(.data) + st_touch_init_sensor_off 0x00071f43 Data 3 app_tp_st_touch.o(.data) + st_touch_init_sensor_on 0x00071f46 Data 3 app_tp_st_touch.o(.data) + st_touch_tp_tuning_reset 0x00071f49 Data 3 app_tp_st_touch.o(.data) + st_touch_tp_tuning_FpnlInit 0x00071f4c Data 3 app_tp_st_touch.o(.data) + st_touch_tp_tuning_PnlInit 0x00071f4f Data 3 app_tp_st_touch.o(.data) + st_touch_tp_tuning_SvCfg 0x00071f52 Data 3 app_tp_st_touch.o(.data) + st_touch_tp_tuning_SvCx 0x00071f55 Data 3 app_tp_st_touch.o(.data) + st_touch_tp_tuning_SvPnl 0x00071f58 Data 3 app_tp_st_touch.o(.data) + st_touch_tp_tuning_clearfifo 0x00071f5b Data 3 app_tp_st_touch.o(.data) + st_touch_tp_tuning_clkreset 0x00071f5e Data 3 app_tp_st_touch.o(.data) + st_touch_tp_tuning_TuneM 0x00071f61 Data 4 app_tp_st_touch.o(.data) + st_touch_tp_tuning_TuneS 0x00071f65 Data 4 app_tp_st_touch.o(.data) + phone_data_E4 0x00071f98 Data 1 app_tp_for_custom_s8.o(.data) + tp_flag 0x00071f99 Data 1 app_tp_for_custom_s8.o(.data) + g_phone_output_int_pad 0x00071f9a Data 1 app_tp_for_custom_s8.o(.data) + tp_sleep_in 0x00071f9b Data 1 app_tp_for_custom_s8.o(.data) + tp_sleep_count 0x00071f9c Data 1 app_tp_for_custom_s8.o(.data) + sleep_double_EN 0x00071f9d Data 1 app_tp_for_custom_s8.o(.data) + Flag_EA_EN 0x00071f9e Data 1 app_tp_for_custom_s8.o(.data) + Flag_touch_count 0x00071f9f Data 1 app_tp_for_custom_s8.o(.data) + touchnum_bak 0x00071fa0 Data 1 app_tp_for_custom_s8.o(.data) + Flag_blacklight_EN 0x00071fa1 Data 1 app_tp_for_custom_s8.o(.data) + phone_data_B1 0x00071faa Data 2 app_tp_for_custom_s8.o(.data) + phone_reg_coord_back 0x00071fb4 Data 200 app_tp_for_custom_s8.o(.data) + g_screen_input_rst_pad 0x0007207c Data 1 app_tp_for_custom_s8.o(.data) + g_screen_input_int_pad 0x0007207d Data 1 app_tp_for_custom_s8.o(.data) + screen_data_write_1 0x0007207e Data 1 app_tp_for_custom_s8.o(.data) + screen_data_write_2 0x0007207f Data 3 app_tp_for_custom_s8.o(.data) + screen_data_write_3 0x00072082 Data 5 app_tp_for_custom_s8.o(.data) + screen_reg_int_data 0x00072088 Data 48 app_tp_for_custom_s8.o(.data) + g_sof_gen_te_func 0x000720c0 Data 4 hal_internal_vsync.o(.data) + g_systick_cb_func 0x000720d4 Data 4 drv_common.o(.data) + g_system_clock 0x000720d8 Data 4 drv_common.o(.data) + g_scld_fhd_filter_h 0x000720f0 Data 256 drv_param_init.o(.data) + g_scld_fhd_filter_v 0x000721f0 Data 256 drv_param_init.o(.data) + g_scld_hd_filter_h 0x000722f0 Data 256 drv_param_init.o(.data) + g_scld_hd_filter_v 0x000723f0 Data 256 drv_param_init.o(.data) + g_sclu_lanczos_filter 0x000724f0 Data 128 drv_param_init.o(.data) + g_ccm_setting 0x00072570 Data 36 drv_param_init.o(.data) + g_int_rxbr_irq0_cb_func 0x000725f4 Data 4 drv_rxbr.o(.data) + g_int_rxbr_irq1_cb_func 0x000725f8 Data 4 drv_rxbr.o(.data) + g_int_vidc_cb_func 0x000725fc Data 4 drv_vidc.o(.data) + g_fls_w_cmd 0x00072618 Data 1 norflash.o(.data) + g_fls_r_cmd 0x00072619 Data 1 norflash.o(.data) + g_fls_write_en_status 0x0007261a Data 1 norflash.o(.data) + isFlsTransferEnd 0x0007261b Data 1 norflash.o(.data) + isFlsFifoReq 0x0007261c Data 1 norflash.o(.data) + isNandWriteCompleted 0x0007261d Data 1 norflash.o(.data) + isNandReadCompleted 0x0007261e Data 1 norflash.o(.data) + g_fls_error_info 0x00072624 Data 6 norflash.o(.data) + __stdout 0x0007264c Data 4 stdout.o(.data) + tp_scan_data 0x000727e4 Data 12 app_tp_st_touch.o(.bss) + hal_dmahandle 0x00072900 Data 160 hal_uart.o(.bss) + hal_uarthandle_dma 0x000729a0 Data 32 hal_uart.o(.bss) + hal_uart_handle_global 0x000729c0 Data 16 hal_uart.o(.bss) + g_vsync_hande 0x000729d0 Data 100 hal_internal_vsync.o(.bss) + g_dcs_execute_table 0x00072a34 Data 2048 hal_internal_vsync.o(.bss) + g_packet_fifo 0x000734f0 Data 4144 dcs_packet_fifo.o(.bss) + string 0x00074520 Data 256 tau_log.o(.bss) + g_spis_ctrl_handle 0x00074620 Data 32 hal_spi_slave.o(.bss) + __stack_limit 0x00074640 Data 0 startup_armcm0.o(STACK) + __initial_sp 0x00075640 Data 0 startup_armcm0.o(STACK) + + + +============================================================================== + +Memory Map of the image + + Image Entry point : 0x000100c1 + + Load Region LR_IROM2 (Base: 0x00010000, Size: 0x00010520, Max: 0x00010000, ABSOLUTE, COMPRESSED[0x0000f4e8]) + + Execution Region ER_IROM2 (Exec base: 0x00010000, Load base: 0x00010000, Size: 0x0000e09c, Max: 0x00010000, ABSOLUTE) + + Exec Addr Load Addr Size Type Attr Idx E Section Name Object + + 0x00010000 0x00010000 0x000000c0 Data RO 532 RESET startup_armcm0.o + 0x000100c0 0x000100c0 0x00000000 Code RO 2773 * .ARM.Collect$$$$00000000 mc_p.l(entry.o) + 0x000100c0 0x000100c0 0x00000004 Code RO 3083 .ARM.Collect$$$$00000001 mc_p.l(entry2.o) + 0x000100c4 0x000100c4 0x00000004 Code RO 3086 .ARM.Collect$$$$00000004 mc_p.l(entry5.o) + 0x000100c8 0x000100c8 0x00000000 Code RO 3088 .ARM.Collect$$$$00000008 mc_p.l(entry7b.o) + 0x000100c8 0x000100c8 0x00000000 Code RO 3090 .ARM.Collect$$$$0000000A mc_p.l(entry8b.o) + 0x000100c8 0x000100c8 0x00000008 Code RO 3091 .ARM.Collect$$$$0000000B mc_p.l(entry9a.o) + 0x000100d0 0x000100d0 0x00000000 Code RO 3093 .ARM.Collect$$$$0000000D mc_p.l(entry10a.o) + 0x000100d0 0x000100d0 0x00000000 Code RO 3095 .ARM.Collect$$$$0000000F mc_p.l(entry11a.o) + 0x000100d0 0x000100d0 0x00000004 Code RO 3084 .ARM.Collect$$$$00002712 mc_p.l(entry2.o) + 0x000100d4 0x000100d4 0x00000078 Code RO 533 .text startup_armcm0.o + 0x0001014c 0x0001014c 0x0000002c Code RO 2776 .text mc_p.l(uidiv.o) + 0x00010178 0x00010178 0x00000028 Code RO 2778 .text mc_p.l(idiv.o) + 0x000101a0 0x000101a0 0x00000024 Code RO 2780 .text mc_p.l(memcpya.o) + 0x000101c4 0x000101c4 0x00000024 Code RO 2782 .text mc_p.l(memseta.o) + 0x000101e8 0x000101e8 0x000000b2 Code RO 3047 .text mf_p.l(fadd.o) + 0x0001029a 0x0001029a 0x0000007a Code RO 3049 .text mf_p.l(fmul.o) + 0x00010314 0x00010314 0x0000007c Code RO 3051 .text mf_p.l(fdiv.o) + 0x00010390 0x00010390 0x00000018 Code RO 3053 .text mf_p.l(fscalb.o) + 0x000103a8 0x000103a8 0x00000164 Code RO 3055 .text mf_p.l(dadd.o) + 0x0001050c 0x0001050c 0x000000d0 Code RO 3057 .text mf_p.l(dmul.o) + 0x000105dc 0x000105dc 0x000000f0 Code RO 3059 .text mf_p.l(ddiv.o) + 0x000106cc 0x000106cc 0x00000016 Code RO 3061 .text mf_p.l(fflti.o) + 0x000106e2 0x000106e2 0x0000000e Code RO 3063 .text mf_p.l(ffltui.o) + 0x000106f0 0x000106f0 0x0000001c Code RO 3067 .text mf_p.l(dfltui.o) + 0x0001070c 0x0001070c 0x00000032 Code RO 3069 .text mf_p.l(ffixi.o) + 0x0001073e 0x0001073e 0x00000028 Code RO 3071 .text mf_p.l(ffixui.o) + 0x00010766 0x00010766 0x00000002 PAD + 0x00010768 0x00010768 0x00000048 Code RO 3073 .text mf_p.l(dfixi.o) + 0x000107b0 0x000107b0 0x0000003c Code RO 3075 .text mf_p.l(dfixui.o) + 0x000107ec 0x000107ec 0x00000028 Code RO 3077 .text mf_p.l(f2d.o) + 0x00010814 0x00010814 0x00000028 Code RO 3079 .text mf_p.l(cdcmple.o) + 0x0001083c 0x0001083c 0x00000014 Code RO 3081 .text mf_p.l(cfrcmple.o) + 0x00010850 0x00010850 0x00000060 Code RO 3098 .text mc_p.l(uldiv.o) + 0x000108b0 0x000108b0 0x00000020 Code RO 3100 .text mc_p.l(llshl.o) + 0x000108d0 0x000108d0 0x00000022 Code RO 3102 .text mc_p.l(llushr.o) + 0x000108f2 0x000108f2 0x00000026 Code RO 3104 .text mc_p.l(llsshr.o) + 0x00010918 0x00010918 0x00000000 Code RO 3113 .text mc_p.l(iusefp.o) + 0x00010918 0x00010918 0x00000082 Code RO 3114 .text mf_p.l(fepilogue.o) + 0x0001099a 0x0001099a 0x000000be Code RO 3116 .text mf_p.l(depilogue.o) + 0x00010a58 0x00010a58 0x000000a2 Code RO 3120 .text mf_p.l(dsqrt.o) + 0x00010afa 0x00010afa 0x00000002 PAD + 0x00010afc 0x00010afc 0x00000040 Code RO 3122 .text mf_p.l(dfixul.o) + 0x00010b3c 0x00010b3c 0x00000028 Code RO 3124 .text mf_p.l(cdrcmple.o) + 0x00010b64 0x00010b64 0x00000024 Code RO 3126 .text mc_p.l(init.o) + 0x00010b88 0x00010b88 0x00000056 Code RO 3136 .text mc_p.l(__dczerorl2.o) + 0x00010bde 0x00010bde 0x00000002 PAD + 0x00010be0 0x00010be0 0x00000018 Code RO 2194 i.ADC_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010bf8 0x00010bf8 0x00000018 Code RO 2195 i.AP_NRESET_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010c10 0x00010c10 0x00000040 Code RO 409 i.CRC16_2 app_tp_st_touch.o + 0x00010c50 0x00010c50 0x00000014 Code RO 2196 i.DMA_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010c64 0x00010c64 0x0000001c Code RO 2197 i.EXTI_INT0_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010c80 0x00010c80 0x0000001c Code RO 2198 i.EXTI_INT1_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010c9c 0x00010c9c 0x0000001c Code RO 2199 i.EXTI_INT2_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010cb8 0x00010cb8 0x0000001c Code RO 2200 i.EXTI_INT3_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010cd4 0x00010cd4 0x0000001c Code RO 2201 i.EXTI_INT4_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010cf0 0x00010cf0 0x0000001c Code RO 2202 i.EXTI_INT5_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010d0c 0x00010d0c 0x0000001c Code RO 2203 i.EXTI_INT6_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010d28 0x00010d28 0x0000001c Code RO 2204 i.EXTI_INT7_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010d44 0x00010d44 0x00000064 Code RO 2355 i.EncryptCheck tp_EncryptCheck.lib(app_tp_enc.o) + 0x00010da8 0x00010da8 0x00000014 Code RO 2205 i.FLSCTRL_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010dbc 0x00010dbc 0x00000074 Code RO 102 i.Gpio_swire_output ap_demo.o + 0x00010e30 0x00010e30 0x00000014 Code RO 2206 i.HardFault_Handler CVWL568.lib(irq_redirect .o) + 0x00010e44 0x00010e44 0x00000018 Code RO 2207 i.I2C0_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010e5c 0x00010e5c 0x00000018 Code RO 2208 i.I2C1_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010e74 0x00010e74 0x00000018 Code RO 2209 i.LCDC_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010e8c 0x00010e8c 0x00000028 Code RO 2344 i.LOG_printf CVWL568.lib(tau_log.o) + 0x00010eb4 0x00010eb4 0x00000018 Code RO 2210 i.MEMC_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010ecc 0x00010ecc 0x00000018 Code RO 2211 i.MIPI_RX_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010ee4 0x00010ee4 0x00000018 Code RO 2212 i.MIPI_TX_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010efc 0x00010efc 0x0000001c Code RO 2213 i.PWMDET_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010f18 0x00010f18 0x0000001c Code RO 2214 i.SPIM_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010f34 0x00010f34 0x0000001c Code RO 2215 i.SPIS_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010f50 0x00010f50 0x0000001c Code RO 2216 i.SWIRE_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010f6c 0x00010f6c 0x00000018 Code RO 2217 i.SysTick_Handler CVWL568.lib(irq_redirect .o) + 0x00010f84 0x00010f84 0x00000018 Code RO 2218 i.TIMER0_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010f9c 0x00010f9c 0x00000018 Code RO 2219 i.TIMER1_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010fb4 0x00010fb4 0x00000018 Code RO 2220 i.TIMER2_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010fcc 0x00010fcc 0x00000018 Code RO 2221 i.TIMER3_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010fe4 0x00010fe4 0x0000001c Code RO 2651 i.UART0_IRQ_Handle CVWL568.lib(drv_uart.o) + 0x00011000 0x00011000 0x00000014 Data RO 1190 .ARM.__at_0x11000 CVWL568.lib(drv_common.o) + 0x00011014 0x00011014 0x00000002 Code RO 2655 i.UART_DisableDma CVWL568.lib(drv_uart.o) + 0x00011016 0x00011016 0x00000002 Code RO 3131 i.__scatterload_null mc_p.l(handlers.o) + 0x00011018 0x00011018 0x00000004 Data RO 1191 .ARM.__at_0x11018 CVWL568.lib(drv_common.o) + 0x0001101c 0x0001101c 0x00000144 Code RO 268 i.S20_Start_init app_tp_transfer.o + 0x00011160 0x00011160 0x00000004 Code RO 2661 i.UART_GetInstance CVWL568.lib(drv_uart.o) + 0x00011164 0x00011164 0x00000018 Code RO 2222 i.UART_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x0001117c 0x0001117c 0x00000024 Code RO 2669 i.UART_ResetRxFIFO CVWL568.lib(drv_uart.o) + 0x000111a0 0x000111a0 0x00000048 Code RO 2672 i.UART_SetBaudRate CVWL568.lib(drv_uart.o) + 0x000111e8 0x000111e8 0x0000001a Code RO 2673 i.UART_SwitchSCLK CVWL568.lib(drv_uart.o) + 0x00011202 0x00011202 0x00000134 Code RO 2675 i.UART_TransferHandleIRQ CVWL568.lib(drv_uart.o) + 0x00011336 0x00011336 0x0000001a Code RO 2677 i.UART_WriteBlocking CVWL568.lib(drv_uart.o) + 0x00011350 0x00011350 0x000000bc Code RO 2678 i.UART_init CVWL568.lib(drv_uart.o) + 0x0001140c 0x0001140c 0x00000018 Code RO 2223 i.VIDC_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00011424 0x00011424 0x00000018 Code RO 2224 i.VPRE_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x0001143c 0x0001143c 0x00000018 Code RO 2225 i.WDG_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00011454 0x00011454 0x00000020 Code RO 3019 i.__0printf mc_p.l(printfa.o) + 0x00011474 0x00011474 0x00000024 Code RO 3025 i.__0vsprintf mc_p.l(printfa.o) + 0x00011498 0x00011498 0x0000002e Code RO 3118 i.__ARM_clz mf_p.l(depilogue.o) + 0x000114c6 0x000114c6 0x0000001a Code RO 220 i.__ARM_common_switch8 ap_demo.o + 0x000114e0 0x000114e0 0x00000018 Code RO 1511 i.__NVIC_ClearPendingIRQ CVWL568.lib(drv_i2c_master.o) + 0x000114f8 0x000114f8 0x00000018 Code RO 1635 i.__NVIC_ClearPendingIRQ CVWL568.lib(drv_spi_master.o) + 0x00011510 0x00011510 0x00000020 Code RO 2048 i.__NVIC_DisableIRQ CVWL568.lib(drv_rxbr.o) + 0x00011530 0x00011530 0x00000018 Code RO 2049 i.__NVIC_EnableIRQ CVWL568.lib(drv_rxbr.o) + 0x00011548 0x00011548 0x00000044 Code RO 2432 i.__NVIC_SetPriority CVWL568.lib(hal_spi_slave.o) + 0x0001158c 0x0001158c 0x0000000e Code RO 3130 i.__scatterload_copy mc_p.l(handlers.o) + 0x0001159a 0x0001159a 0x0000000e Code RO 3132 i.__scatterload_zeroinit mc_p.l(handlers.o) + 0x000115a8 0x000115a8 0x0000000c Code RO 3108 i.__set_errno mc_p.l(errno.o) + 0x000115b4 0x000115b4 0x00000174 Code RO 3026 i._fp_digits mc_p.l(printfa.o) + 0x00011728 0x00011728 0x000006ec Code RO 3027 i._printf_core mc_p.l(printfa.o) + 0x00011e14 0x00011e14 0x00000020 Code RO 3028 i._printf_post_padding mc_p.l(printfa.o) + 0x00011e34 0x00011e34 0x0000002c Code RO 3029 i._printf_pre_padding mc_p.l(printfa.o) + 0x00011e60 0x00011e60 0x0000000a Code RO 3031 i._sputc mc_p.l(printfa.o) + 0x00011e6a 0x00011e6a 0x00000002 PAD + 0x00011e6c 0x00011e6c 0x0000105c Code RO 103 i.ap_dcs_read ap_demo.o + 0x00012ec8 0x00012ec8 0x00000138 Code RO 104 i.ap_demo ap_demo.o + 0x00013000 0x00013000 0x00000028 Code RO 105 i.ap_get_reg_ca ap_demo.o + 0x00013028 0x00013028 0x00000020 Code RO 410 i.ap_get_tp_calibration_status_01 app_tp_st_touch.o + 0x00013048 0x00013048 0x00000028 Code RO 106 i.ap_reset_cb ap_demo.o + 0x00013070 0x00013070 0x000002c0 Code RO 107 i.ap_set_backlight ap_demo.o + 0x00013330 0x00013330 0x00000024 Code RO 108 i.ap_set_display_off ap_demo.o + 0x00013354 0x00013354 0x0000000c Code RO 109 i.ap_set_display_on ap_demo.o + 0x00013360 0x00013360 0x00000038 Code RO 110 i.ap_set_enter_sleep_mode ap_demo.o + 0x00013398 0x00013398 0x0000000c Code RO 111 i.ap_set_exit_sleep_mode ap_demo.o + 0x000133a4 0x000133a4 0x00000098 Code RO 411 i.ap_set_tp_calibration_04 app_tp_st_touch.o + 0x0001343c 0x0001343c 0x000000b0 Code RO 412 i.ap_tp_st_touch_calibration app_tp_st_touch.o + 0x000134ec 0x000134ec 0x0000000e Code RO 413 i.ap_tp_st_touch_error_handler_F3 app_tp_st_touch.o + 0x000134fa 0x000134fa 0x00000020 Code RO 414 i.ap_tp_st_touch_error_handler_FF app_tp_st_touch.o + 0x0001351a 0x0001351a 0x00000002 PAD + 0x0001351c 0x0001351c 0x000000a8 Code RO 415 i.ap_tp_st_touch_get_calibration_success_mark app_tp_st_touch.o + 0x000135c4 0x000135c4 0x00000088 Code RO 416 i.ap_tp_st_touch_hardware_reset app_tp_st_touch.o + 0x0001364c 0x0001364c 0x0000001c Code RO 417 i.ap_tp_st_touch_scan_point_init app_tp_st_touch.o + 0x00013668 0x00013668 0x00000094 Code RO 418 i.ap_tp_st_touch_scan_point_record_event app_tp_st_touch.o + 0x000136fc 0x000136fc 0x00000034 Code RO 419 i.ap_tp_st_touch_scan_point_record_event_exec app_tp_st_touch.o + 0x00013730 0x00013730 0x00000034 Code RO 420 i.ap_tp_st_touch_simulate_finger_release_event app_tp_st_touch.o + 0x00013764 0x00013764 0x0000002c Code RO 112 i.ap_update_frame_rate ap_demo.o + 0x00013790 0x00013790 0x0000001c Code RO 2050 i.app_ADC_IRQn_Handler CVWL568.lib(drv_rxbr.o) + 0x000137ac 0x000137ac 0x00000024 Code RO 1435 i.app_AP_NRESET_IRQn_Handler CVWL568.lib(drv_gpio.o) + 0x000137d0 0x000137d0 0x0000001c Code RO 1436 i.app_EXTI_INT0_IRQn_Handler CVWL568.lib(drv_gpio.o) + 0x000137ec 0x000137ec 0x0000001c Code RO 1437 i.app_EXTI_INT1_IRQn_Handler CVWL568.lib(drv_gpio.o) + 0x00013808 0x00013808 0x0000001c Code RO 1438 i.app_EXTI_INT2_IRQn_Handler CVWL568.lib(drv_gpio.o) + 0x00013824 0x00013824 0x0000001c Code RO 1439 i.app_EXTI_INT3_IRQn_Handler CVWL568.lib(drv_gpio.o) + 0x00013840 0x00013840 0x0000001c Code RO 1440 i.app_EXTI_INT4_IRQn_Handler CVWL568.lib(drv_gpio.o) + 0x0001385c 0x0001385c 0x0000001c Code RO 1441 i.app_EXTI_INT5_IRQn_Handler CVWL568.lib(drv_gpio.o) + 0x00013878 0x00013878 0x0000001c Code RO 1442 i.app_EXTI_INT6_IRQn_Handler CVWL568.lib(drv_gpio.o) + 0x00013894 0x00013894 0x0000001c Code RO 1443 i.app_EXTI_INT7_IRQn_Handler CVWL568.lib(drv_gpio.o) + 0x000138b0 0x000138b0 0x00000048 Code RO 1182 i.app_HardFault_Handler CVWL568.lib(drv_common.o) + 0x000138f8 0x000138f8 0x00000018 Code RO 1546 i.app_I2C0_IRQn_Handler CVWL568.lib(drv_i2c_slave.o) + 0x00013910 0x00013910 0x00000010 Code RO 1512 i.app_I2C1_IRQn_Handler CVWL568.lib(drv_i2c_master.o) + 0x00013920 0x00013920 0x000001a4 Code RO 1087 i.app_LCDC_IRQn_Handler CVWL568.lib(hal_internal_vsync.o) + 0x00013ac4 0x00013ac4 0x00000088 Code RO 1992 i.app_MEMC_IRQn_Handler CVWL568.lib(drv_memc.o) + 0x00013b4c 0x00013b4c 0x00000298 Code RO 1764 i.app_MIPI_RX_IRQn_Handler CVWL568.lib(drv_dsi_rx.o) + 0x00013de4 0x00013de4 0x000000a0 Code RO 1820 i.app_MIPI_TX_IRQn_Handler CVWL568.lib(drv_dsi_tx.o) + 0x00013e84 0x00013e84 0x00000048 Code RO 2586 i.app_PWMDET_IRQn_Handler CVWL568.lib(drv_pwm.o) + 0x00013ecc 0x00013ecc 0x00000030 Code RO 1636 i.app_SPIM_IRQn_Handler CVWL568.lib(drv_spi_master.o) + 0x00013efc 0x00013efc 0x00000200 Code RO 2433 i.app_SPIS_IRQn_Handler CVWL568.lib(hal_spi_slave.o) + 0x000140fc 0x000140fc 0x00000020 Code RO 1668 i.app_SWIRE_IRQn_Handler CVWL568.lib(drv_swire.o) + 0x0001411c 0x0001411c 0x00000018 Code RO 1183 i.app_SysTick_Handler CVWL568.lib(drv_common.o) + 0x00014134 0x00014134 0x0000000a Code RO 1718 i.app_TIMER0_IRQn_Handler CVWL568.lib(drv_timer.o) + 0x0001413e 0x0001413e 0x0000000a Code RO 1719 i.app_TIMER1_IRQn_Handler CVWL568.lib(drv_timer.o) + 0x00014148 0x00014148 0x0000000a Code RO 1720 i.app_TIMER2_IRQn_Handler CVWL568.lib(drv_timer.o) + 0x00014152 0x00014152 0x0000000a Code RO 1721 i.app_TIMER3_IRQn_Handler CVWL568.lib(drv_timer.o) + 0x0001415c 0x0001415c 0x00000008 Code RO 2679 i.app_UART_IRQn_Handler CVWL568.lib(drv_uart.o) + 0x00014164 0x00014164 0x0000001c Code RO 2115 i.app_VIDC_IRQn_Handler CVWL568.lib(drv_vidc.o) + 0x00014180 0x00014180 0x0000001c Code RO 2051 i.app_VPRE_IRQn_Handler CVWL568.lib(drv_rxbr.o) + 0x0001419c 0x0001419c 0x00000038 Code RO 2738 i.app_WDG_IRQn_Handler CVWL568.lib(drv_wdg.o) + 0x000141d4 0x000141d4 0x00000010 Code RO 1297 i.app_dma_irq_handler CVWL568.lib(drv_dma.o) + 0x000141e4 0x000141e4 0x00000030 Code RO 2475 i.app_fls_ctrl_Handler CVWL568.lib(norflash.o) + 0x00014214 0x00014214 0x00000024 Code RO 269 i.app_tp_I2C_init app_tp_transfer.o + 0x00014238 0x00014238 0x00000038 Code RO 422 i.app_tp_calibration_exec app_tp_st_touch.o + 0x00014270 0x00014270 0x00000030 Code RO 270 i.app_tp_i2cs_callback app_tp_transfer.o + 0x000142a0 0x000142a0 0x00000040 Code RO 271 i.app_tp_init app_tp_transfer.o + 0x000142e0 0x000142e0 0x00000020 Code RO 272 i.app_tp_m_read app_tp_transfer.o + 0x00014300 0x00014300 0x00000008 Code RO 274 i.app_tp_m_write app_tp_transfer.o + 0x00014308 0x00014308 0x0000041c Code RO 937 i.app_tp_phone_analysis_data WL568_20U_HX667_TP.lib(app_tp_for_custom_s8.o) + 0x00014724 0x00014724 0x0000000c Code RO 275 i.app_tp_phone_clear_reset_on app_tp_transfer.o + 0x00014730 0x00014730 0x00000008 Code RO 277 i.app_tp_s_read app_tp_transfer.o + 0x00014738 0x00014738 0x00000008 Code RO 279 i.app_tp_s_write app_tp_transfer.o + 0x00014740 0x00014740 0x000002dc Code RO 939 i.app_tp_screen_analysis_int WL568_20U_HX667_TP.lib(app_tp_for_custom_s8.o) + 0x00014a1c 0x00014a1c 0x0000000c Code RO 281 i.app_tp_screen_int_callback app_tp_transfer.o + 0x00014a28 0x00014a28 0x00000040 Code RO 282 i.app_tp_transfer_screen_const app_tp_transfer.o + 0x00014a68 0x00014a68 0x00000160 Code RO 283 i.app_tp_transfer_screen_int app_tp_transfer.o + 0x00014bc8 0x00014bc8 0x00000018 Code RO 284 i.app_tp_transfer_screen_start app_tp_transfer.o + 0x00014be0 0x00014be0 0x00000024 Code RO 512 i.board_Init board.o + 0x00014c04 0x00014c04 0x000004f0 Code RO 1088 i.calc_framebuffer_setting CVWL568.lib(hal_internal_vsync.o) + 0x000150f4 0x000150f4 0x000000c8 Code RO 2762 i.ceil m_ps.l(ceil.o) + 0x000151bc 0x000151bc 0x0000002c Code RO 1089 i.check_mipi_rx_tx_video_info CVWL568.lib(hal_internal_vsync.o) + 0x000151e8 0x000151e8 0x00000090 Code RO 1090 i.check_pkt_buf_rev CVWL568.lib(hal_internal_vsync.o) + 0x00015278 0x00015278 0x00000058 Code RO 1751 i.dcs_packet_fifo_alloc CVWL568.lib(dcs_packet_fifo.o) + 0x000152d0 0x000152d0 0x00000018 Code RO 1752 i.dcs_packet_fifo_init CVWL568.lib(dcs_packet_fifo.o) + 0x000152e8 0x000152e8 0x00000044 Code RO 1753 i.dcs_packet_free_fifo_header CVWL568.lib(dcs_packet_fifo.o) + 0x0001532c 0x0001532c 0x00000024 Code RO 1754 i.dcs_packet_get_fifo_header CVWL568.lib(dcs_packet_fifo.o) + 0x00015350 0x00015350 0x0000002c Code RO 1091 i.dcs_sw_filter CVWL568.lib(hal_internal_vsync.o) + 0x0001537c 0x0001537c 0x00000018 Code RO 929 i.delayMs CVWL568.lib(tau_delay.o) + 0x00015394 0x00015394 0x00000022 Code RO 930 i.delayUs CVWL568.lib(tau_delay.o) + 0x000153b6 0x000153b6 0x00000002 PAD + 0x000153b8 0x000153b8 0x00000058 Code RO 114 i.disable_mipi_timer_cb ap_demo.o + 0x00015410 0x00015410 0x00000038 Code RO 1687 i.drv_ap_rst_trig_edge_detect CVWL568.lib(drv_sys_cfg.o) + 0x00015448 0x00015448 0x0000000c Code RO 2315 i.drv_chip_info_get_info CVWL568.lib(drv_chip_info.o) + 0x00015454 0x00015454 0x00000040 Code RO 2316 i.drv_chip_info_init CVWL568.lib(drv_chip_info.o) + 0x00015494 0x00015494 0x000000b0 Code RO 2317 i.drv_chip_rx_info_check CVWL568.lib(drv_chip_info.o) + 0x00015544 0x00015544 0x00000014 Code RO 2318 i.drv_chip_rx_init_done CVWL568.lib(drv_chip_info.o) + 0x00015558 0x00015558 0x00000058 Code RO 1185 i.drv_common_enable_systick CVWL568.lib(drv_common.o) + 0x000155b0 0x000155b0 0x00000008 Code RO 1188 i.drv_common_system_init CVWL568.lib(drv_common.o) + 0x000155b8 0x000155b8 0x00000010 Code RO 1210 i.drv_crgu_config_reset_modules CVWL568.lib(drv_crgu.o) + 0x000155c8 0x000155c8 0x00000014 Code RO 1223 i.drv_crgu_set_ahb_pre_div CVWL568.lib(drv_crgu.o) + 0x000155dc 0x000155dc 0x00000014 Code RO 1224 i.drv_crgu_set_ahb_src CVWL568.lib(drv_crgu.o) + 0x000155f0 0x000155f0 0x00000020 Code RO 1227 i.drv_crgu_set_clock CVWL568.lib(drv_crgu.o) + 0x00015610 0x00015610 0x00000014 Code RO 1228 i.drv_crgu_set_dpi_mux_src CVWL568.lib(drv_crgu.o) + 0x00015624 0x00015624 0x00000018 Code RO 1229 i.drv_crgu_set_dpi_pre_div CVWL568.lib(drv_crgu.o) + 0x0001563c 0x0001563c 0x00000014 Code RO 1230 i.drv_crgu_set_dpi_pre_src CVWL568.lib(drv_crgu.o) + 0x00015650 0x00015650 0x00000014 Code RO 1231 i.drv_crgu_set_dsc_core_div CVWL568.lib(drv_crgu.o) + 0x00015664 0x00015664 0x00000014 Code RO 1232 i.drv_crgu_set_dsco_src CVWL568.lib(drv_crgu.o) + 0x00015678 0x00015678 0x00000014 Code RO 1233 i.drv_crgu_set_dsco_src_div CVWL568.lib(drv_crgu.o) + 0x0001568c 0x0001568c 0x00000014 Code RO 1234 i.drv_crgu_set_fb_div CVWL568.lib(drv_crgu.o) + 0x000156a0 0x000156a0 0x00000014 Code RO 1235 i.drv_crgu_set_fb_src CVWL568.lib(drv_crgu.o) + 0x000156b4 0x000156b4 0x00000014 Code RO 1238 i.drv_crgu_set_lcdc_div CVWL568.lib(drv_crgu.o) + 0x000156c8 0x000156c8 0x00000014 Code RO 1239 i.drv_crgu_set_lcdc_src CVWL568.lib(drv_crgu.o) + 0x000156dc 0x000156dc 0x00000014 Code RO 1240 i.drv_crgu_set_mipi_cfg_src CVWL568.lib(drv_crgu.o) + 0x000156f0 0x000156f0 0x00000018 Code RO 1241 i.drv_crgu_set_mipi_ref_src CVWL568.lib(drv_crgu.o) + 0x00015708 0x00015708 0x00000018 Code RO 1244 i.drv_crgu_set_reset CVWL568.lib(drv_crgu.o) + 0x00015720 0x00015720 0x00000014 Code RO 1245 i.drv_crgu_set_rxbr_div CVWL568.lib(drv_crgu.o) + 0x00015734 0x00015734 0x00000014 Code RO 1246 i.drv_crgu_set_rxbr_src CVWL568.lib(drv_crgu.o) + 0x00015748 0x00015748 0x00000014 Code RO 1248 i.drv_crgu_set_vidc_src CVWL568.lib(drv_crgu.o) + 0x0001575c 0x0001575c 0x00000018 Code RO 1301 i.drv_dma_clear_flag CVWL568.lib(drv_dma.o) + 0x00015774 0x00015774 0x0000001c Code RO 1302 i.drv_dma_create_handle CVWL568.lib(drv_dma.o) + 0x00015790 0x00015790 0x00000010 Code RO 1304 i.drv_dma_disenable_channel CVWL568.lib(drv_dma.o) + 0x000157a0 0x000157a0 0x00000010 Code RO 1306 i.drv_dma_enable_channel CVWL568.lib(drv_dma.o) + 0x000157b0 0x000157b0 0x00000024 Code RO 1307 i.drv_dma_enable_channel_interrupts CVWL568.lib(drv_dma.o) + 0x000157d4 0x000157d4 0x0000000c Code RO 1309 i.drv_dma_get_channel_flag CVWL568.lib(drv_dma.o) + 0x000157e0 0x000157e0 0x00000090 Code RO 1312 i.drv_dma_irq_handler CVWL568.lib(drv_dma.o) + 0x00015870 0x00015870 0x00000012 Code RO 1314 i.drv_dma_prepar_transfer CVWL568.lib(drv_dma.o) + 0x00015882 0x00015882 0x0000001a Code RO 1316 i.drv_dma_set_burst CVWL568.lib(drv_dma.o) + 0x0001589c 0x0001589c 0x00000006 Code RO 1317 i.drv_dma_set_callback CVWL568.lib(drv_dma.o) + 0x000158a2 0x000158a2 0x00000002 PAD + 0x000158a4 0x000158a4 0x00000044 Code RO 1319 i.drv_dma_set_transfer CVWL568.lib(drv_dma.o) + 0x000158e8 0x000158e8 0x00000036 Code RO 2328 i.drv_dsc_dec_convert_pps_rc_parameter CVWL568.lib(drv_dsc_dec.o) + 0x0001591e 0x0001591e 0x0000000c Code RO 2329 i.drv_dsc_dec_disable CVWL568.lib(drv_dsc_dec.o) + 0x0001592a 0x0001592a 0x00000002 PAD + 0x0001592c 0x0001592c 0x00000074 Code RO 2330 i.drv_dsc_dec_enable CVWL568.lib(drv_dsc_dec.o) + 0x000159a0 0x000159a0 0x0000000a Code RO 2331 i.drv_dsc_dec_get_nslc CVWL568.lib(drv_dsc_dec.o) + 0x000159aa 0x000159aa 0x00000028 Code RO 2333 i.drv_dsc_dec_set_u8_pps CVWL568.lib(drv_dsc_dec.o) + 0x000159d2 0x000159d2 0x00000002 PAD + 0x000159d4 0x000159d4 0x00000104 Code RO 1765 i.drv_dsi_rx_calc_ipi_tx_delay CVWL568.lib(drv_dsi_rx.o) + 0x00015ad8 0x00015ad8 0x00000040 Code RO 1766 i.drv_dsi_rx_enable_irq CVWL568.lib(drv_dsi_rx.o) + 0x00015b18 0x00015b18 0x00000050 Code RO 1767 i.drv_dsi_rx_get_color_bpp CVWL568.lib(drv_dsi_rx.o) + 0x00015b68 0x00015b68 0x0000001c Code RO 1768 i.drv_dsi_rx_get_color_pcc CVWL568.lib(drv_dsi_rx.o) + 0x00015b84 0x00015b84 0x00000008 Code RO 1769 i.drv_dsi_rx_get_compression_en CVWL568.lib(drv_dsi_rx.o) + 0x00015b8c 0x00015b8c 0x00000006 Code RO 1770 i.drv_dsi_rx_get_max_ret_size CVWL568.lib(drv_dsi_rx.o) + 0x00015b92 0x00015b92 0x0000000e Code RO 1774 i.drv_dsi_rx_power_up CVWL568.lib(drv_dsi_rx.o) + 0x00015ba0 0x00015ba0 0x00000020 Code RO 1775 i.drv_dsi_rx_set_ctrl_cfg CVWL568.lib(drv_dsi_rx.o) + 0x00015bc0 0x00015bc0 0x00000010 Code RO 1776 i.drv_dsi_rx_set_ddi_cfg CVWL568.lib(drv_dsi_rx.o) + 0x00015bd0 0x00015bd0 0x00000004 Code RO 1778 i.drv_dsi_rx_set_inten CVWL568.lib(drv_dsi_rx.o) + 0x00015bd4 0x00015bd4 0x00000010 Code RO 1779 i.drv_dsi_rx_set_ipi_cfg CVWL568.lib(drv_dsi_rx.o) + 0x00015be4 0x00015be4 0x00000046 Code RO 1781 i.drv_dsi_rx_set_lane_swap CVWL568.lib(drv_dsi_rx.o) + 0x00015c2a 0x00015c2a 0x00000026 Code RO 1782 i.drv_dsi_rx_set_resp_cnt CVWL568.lib(drv_dsi_rx.o) + 0x00015c50 0x00015c50 0x00000104 Code RO 1783 i.drv_dsi_rx_set_up_phy CVWL568.lib(drv_dsi_rx.o) + 0x00015d54 0x00015d54 0x0000000e Code RO 1784 i.drv_dsi_rx_shut_down CVWL568.lib(drv_dsi_rx.o) + 0x00015d62 0x00015d62 0x00000014 Code RO 1822 i.drv_dsi_tx_command_header CVWL568.lib(drv_dsi_tx.o) + 0x00015d76 0x00015d76 0x0000006c Code RO 1823 i.drv_dsi_tx_command_mode_cfg CVWL568.lib(drv_dsi_tx.o) + 0x00015de2 0x00015de2 0x00000004 Code RO 1824 i.drv_dsi_tx_command_put_payload CVWL568.lib(drv_dsi_tx.o) + 0x00015de6 0x00015de6 0x00000018 Code RO 1825 i.drv_dsi_tx_config_eotp CVWL568.lib(drv_dsi_tx.o) + 0x00015dfe 0x00015dfe 0x00000008 Code RO 1826 i.drv_dsi_tx_config_int CVWL568.lib(drv_dsi_tx.o) + 0x00015e06 0x00015e06 0x00000008 Code RO 1827 i.drv_dsi_tx_dpi_lpcmd_time CVWL568.lib(drv_dsi_tx.o) + 0x00015e0e 0x00015e0e 0x0000000a Code RO 1828 i.drv_dsi_tx_dpi_mode CVWL568.lib(drv_dsi_tx.o) + 0x00015e18 0x00015e18 0x00000024 Code RO 1829 i.drv_dsi_tx_dpi_polarity CVWL568.lib(drv_dsi_tx.o) + 0x00015e3c 0x00015e3c 0x00000004 Code RO 1830 i.drv_dsi_tx_edpi_cmd_size CVWL568.lib(drv_dsi_tx.o) + 0x00015e40 0x00015e40 0x00000004 Code RO 1832 i.drv_dsi_tx_get_cmd_status CVWL568.lib(drv_dsi_tx.o) + 0x00015e44 0x00015e44 0x00000004 Code RO 1834 i.drv_dsi_tx_mode CVWL568.lib(drv_dsi_tx.o) + 0x00015e48 0x00015e48 0x00000018 Code RO 1835 i.drv_dsi_tx_phy_clock_lane_auto_lp CVWL568.lib(drv_dsi_tx.o) + 0x00015e60 0x00015e60 0x0000001a Code RO 1836 i.drv_dsi_tx_phy_clock_lane_req_hs CVWL568.lib(drv_dsi_tx.o) + 0x00015e7a 0x00015e7a 0x0000000c Code RO 1838 i.drv_dsi_tx_phy_lane_mode CVWL568.lib(drv_dsi_tx.o) + 0x00015e86 0x00015e86 0x00000064 Code RO 1842 i.drv_dsi_tx_phy_status_ready CVWL568.lib(drv_dsi_tx.o) + 0x00015eea 0x00015eea 0x0000003e Code RO 1843 i.drv_dsi_tx_phy_status_stopstate CVWL568.lib(drv_dsi_tx.o) + 0x00015f28 0x00015f28 0x00000134 Code RO 1845 i.drv_dsi_tx_phy_test_setup CVWL568.lib(drv_dsi_tx.o) + 0x0001605c 0x0001605c 0x0000001e Code RO 1846 i.drv_dsi_tx_phy_time_cfg CVWL568.lib(drv_dsi_tx.o) + 0x0001607a 0x0001607a 0x00000008 Code RO 1850 i.drv_dsi_tx_powerup CVWL568.lib(drv_dsi_tx.o) + 0x00016082 0x00016082 0x0000001c Code RO 1851 i.drv_dsi_tx_response_mode CVWL568.lib(drv_dsi_tx.o) + 0x0001609e 0x0001609e 0x00000018 Code RO 1854 i.drv_dsi_tx_set_bta_ack CVWL568.lib(drv_dsi_tx.o) + 0x000160b6 0x000160b6 0x0000000c Code RO 1855 i.drv_dsi_tx_set_esc_div CVWL568.lib(drv_dsi_tx.o) + 0x000160c2 0x000160c2 0x00000002 PAD + 0x000160c4 0x000160c4 0x00000040 Code RO 1856 i.drv_dsi_tx_set_int CVWL568.lib(drv_dsi_tx.o) + 0x00016104 0x00016104 0x00000010 Code RO 1857 i.drv_dsi_tx_set_time_out_div CVWL568.lib(drv_dsi_tx.o) + 0x00016114 0x00016114 0x00000008 Code RO 1858 i.drv_dsi_tx_set_video_chunk CVWL568.lib(drv_dsi_tx.o) + 0x0001611c 0x0001611c 0x00000022 Code RO 1859 i.drv_dsi_tx_set_video_timing CVWL568.lib(drv_dsi_tx.o) + 0x0001613e 0x0001613e 0x00000008 Code RO 1861 i.drv_dsi_tx_shutdown CVWL568.lib(drv_dsi_tx.o) + 0x00016146 0x00016146 0x00000026 Code RO 1862 i.drv_dsi_tx_timeout_cfg CVWL568.lib(drv_dsi_tx.o) + 0x0001616c 0x0001616c 0x000000aa Code RO 1865 i.drv_dsi_tx_video_mode_cfg CVWL568.lib(drv_dsi_tx.o) + 0x00016216 0x00016216 0x00000016 Code RO 1866 i.drv_dsi_tx_video_mode_disable_hact_cmd CVWL568.lib(drv_dsi_tx.o) + 0x0001622c 0x0001622c 0x00000018 Code RO 1867 i.drv_dsi_tx_video_mode_set_lp_cmd CVWL568.lib(drv_dsi_tx.o) + 0x00016244 0x00016244 0x0000002e Code RO 2266 i.drv_efuse_enter_inactive CVWL568.lib(drv_efuse.o) + 0x00016272 0x00016272 0x0000000c Code RO 2269 i.drv_efuse_int_enable CVWL568.lib(drv_efuse.o) + 0x0001627e 0x0001627e 0x00000032 Code RO 2270 i.drv_efuse_read CVWL568.lib(drv_efuse.o) + 0x000162b0 0x000162b0 0x00000018 Code RO 2271 i.drv_efuse_read_req CVWL568.lib(drv_efuse.o) + 0x000162c8 0x000162c8 0x00000018 Code RO 1444 i.drv_gpio_get_input_data CVWL568.lib(drv_gpio.o) + 0x000162e0 0x000162e0 0x0000000c Code RO 1446 i.drv_gpio_register_ap_reset_callback CVWL568.lib(drv_gpio.o) + 0x000162ec 0x000162ec 0x00000014 Code RO 1447 i.drv_gpio_register_callback CVWL568.lib(drv_gpio.o) + 0x00016300 0x00016300 0x00000050 Code RO 1449 i.drv_gpio_set_int CVWL568.lib(drv_gpio.o) + 0x00016350 0x00016350 0x00000020 Code RO 1450 i.drv_gpio_set_ioe CVWL568.lib(drv_gpio.o) + 0x00016370 0x00016370 0x00000010 Code RO 1451 i.drv_gpio_set_mode0 CVWL568.lib(drv_gpio.o) + 0x00016380 0x00016380 0x00000010 Code RO 1452 i.drv_gpio_set_mode1 CVWL568.lib(drv_gpio.o) + 0x00016390 0x00016390 0x00000010 Code RO 1453 i.drv_gpio_set_mode2 CVWL568.lib(drv_gpio.o) + 0x000163a0 0x000163a0 0x00000010 Code RO 1454 i.drv_gpio_set_mode3 CVWL568.lib(drv_gpio.o) + 0x000163b0 0x000163b0 0x00000020 Code RO 738 i.drv_gpio_set_output_data CVWL568.lib(hal_gpio.o) + 0x000163d0 0x000163d0 0x00000130 Code RO 1455 i.drv_gpio_set_pull_state CVWL568.lib(drv_gpio.o) + 0x00016500 0x00016500 0x0000000c Code RO 1547 i.drv_i2c0_set_callback CVWL568.lib(drv_i2c_slave.o) + 0x0001650c 0x0001650c 0x0000000c Code RO 1513 i.drv_i2c1_set_callback CVWL568.lib(drv_i2c_master.o) + 0x00016518 0x00016518 0x00000034 Code RO 1487 i.drv_i2c_dma_callback CVWL568.lib(drv_i2c_dma.o) + 0x0001654c 0x0001654c 0x000000ac Code RO 1488 i.drv_i2c_dma_init CVWL568.lib(drv_i2c_dma.o) + 0x000165f8 0x000165f8 0x0000001a Code RO 1489 i.drv_i2c_enable_rx_dma CVWL568.lib(drv_i2c_dma.o) + 0x00016612 0x00016612 0x00000018 Code RO 1490 i.drv_i2c_enable_tx_dma CVWL568.lib(drv_i2c_dma.o) + 0x0001662a 0x0001662a 0x00000002 PAD + 0x0001662c 0x0001662c 0x00000060 Code RO 1515 i.drv_i2c_m_clear_it_pending_bit CVWL568.lib(drv_i2c_master.o) + 0x0001668c 0x0001668c 0x00000010 Code RO 1518 i.drv_i2c_m_enable CVWL568.lib(drv_i2c_master.o) + 0x0001669c 0x0001669c 0x00000038 Code RO 1519 i.drv_i2c_m_enable_intr CVWL568.lib(drv_i2c_master.o) + 0x000166d4 0x000166d4 0x0000008c Code RO 1525 i.drv_i2c_master_init CVWL568.lib(drv_i2c_master.o) + 0x00016760 0x00016760 0x0000005c Code RO 1491 i.drv_i2c_master_read_dma CVWL568.lib(drv_i2c_dma.o) + 0x000167bc 0x000167bc 0x0000003c Code RO 1492 i.drv_i2c_master_write_dma CVWL568.lib(drv_i2c_dma.o) + 0x000167f8 0x000167f8 0x0000003e Code RO 1493 i.drv_i2c_master_write_read_cmd CVWL568.lib(drv_i2c_dma.o) + 0x00016836 0x00016836 0x00000042 Code RO 1548 i.drv_i2c_s_clear_it_pending_bit CVWL568.lib(drv_i2c_slave.o) + 0x00016878 0x00016878 0x00000004 Code RO 1549 i.drv_i2c_s_config_intr CVWL568.lib(drv_i2c_slave.o) + 0x0001687c 0x0001687c 0x00000008 Code RO 1550 i.drv_i2c_s_enable CVWL568.lib(drv_i2c_slave.o) + 0x00016884 0x00016884 0x00000014 Code RO 1551 i.drv_i2c_s_get_fifo_status CVWL568.lib(drv_i2c_slave.o) + 0x00016898 0x00016898 0x00000050 Code RO 1554 i.drv_i2c_s_set_intr CVWL568.lib(drv_i2c_slave.o) + 0x000168e8 0x000168e8 0x0000001c Code RO 1555 i.drv_i2c_s_write_data CVWL568.lib(drv_i2c_slave.o) + 0x00016904 0x00016904 0x00000058 Code RO 1494 i.drv_i2c_set_dma_irq_callback CVWL568.lib(drv_i2c_dma.o) + 0x0001695c 0x0001695c 0x00000032 Code RO 1556 i.drv_i2c_slave_init CVWL568.lib(drv_i2c_slave.o) + 0x0001698e 0x0001698e 0x00000002 PAD + 0x00016990 0x00016990 0x00000018 Code RO 1495 i.drv_i2c_slave_write_dma CVWL568.lib(drv_i2c_dma.o) + 0x000169a8 0x000169a8 0x00000018 Code RO 1934 i.drv_lcdc_config_bypass CVWL568.lib(drv_lcdc.o) + 0x000169c0 0x000169c0 0x00000030 Code RO 1935 i.drv_lcdc_config_ccm CVWL568.lib(drv_lcdc.o) + 0x000169f0 0x000169f0 0x00000016 Code RO 1936 i.drv_lcdc_config_disp_mode CVWL568.lib(drv_lcdc.o) + 0x00016a06 0x00016a06 0x00000024 Code RO 1937 i.drv_lcdc_config_dpi_polarity CVWL568.lib(drv_lcdc.o) + 0x00016a2a 0x00016a2a 0x00000026 Code RO 1938 i.drv_lcdc_config_dpi_timing CVWL568.lib(drv_lcdc.o) + 0x00016a50 0x00016a50 0x00000016 Code RO 1939 i.drv_lcdc_config_edpi_mode CVWL568.lib(drv_lcdc.o) + 0x00016a66 0x00016a66 0x00000016 Code RO 1940 i.drv_lcdc_config_endianness CVWL568.lib(drv_lcdc.o) + 0x00016a7c 0x00016a7c 0x0000000c Code RO 1941 i.drv_lcdc_config_input_size CVWL568.lib(drv_lcdc.o) + 0x00016a88 0x00016a88 0x0000001e Code RO 1942 i.drv_lcdc_config_int CVWL568.lib(drv_lcdc.o) + 0x00016aa6 0x00016aa6 0x00000022 Code RO 1943 i.drv_lcdc_config_int_single CVWL568.lib(drv_lcdc.o) + 0x00016ac8 0x00016ac8 0x00000022 Code RO 1944 i.drv_lcdc_config_overwrite CVWL568.lib(drv_lcdc.o) + 0x00016aea 0x00016aea 0x0000000c Code RO 1945 i.drv_lcdc_config_overwrite_rgb CVWL568.lib(drv_lcdc.o) + 0x00016af6 0x00016af6 0x0000001a Code RO 1946 i.drv_lcdc_config_partial_display_area CVWL568.lib(drv_lcdc.o) + 0x00016b10 0x00016b10 0x00000022 Code RO 1947 i.drv_lcdc_config_partial_display_enable CVWL568.lib(drv_lcdc.o) + 0x00016b32 0x00016b32 0x0000001a Code RO 1949 i.drv_lcdc_config_scale_up_coef CVWL568.lib(drv_lcdc.o) + 0x00016b4c 0x00016b4c 0x0000000c Code RO 1950 i.drv_lcdc_config_scale_up_step CVWL568.lib(drv_lcdc.o) + 0x00016b58 0x00016b58 0x0000004c Code RO 1951 i.drv_lcdc_config_src_parameter CVWL568.lib(drv_lcdc.o) + 0x00016ba4 0x00016ba4 0x00000006 Code RO 1952 i.drv_lcdc_config_thresh CVWL568.lib(drv_lcdc.o) + 0x00016baa 0x00016baa 0x00000012 Code RO 1953 i.drv_lcdc_ctrl_flow CVWL568.lib(drv_lcdc.o) + 0x00016bbc 0x00016bbc 0x00000020 Code RO 1955 i.drv_lcdc_enable_shadow_reg CVWL568.lib(drv_lcdc.o) + 0x00016bdc 0x00016bdc 0x00000040 Code RO 1956 i.drv_lcdc_set_int CVWL568.lib(drv_lcdc.o) + 0x00016c1c 0x00016c1c 0x00000018 Code RO 1957 i.drv_lcdc_set_prefetch CVWL568.lib(drv_lcdc.o) + 0x00016c34 0x00016c34 0x00000014 Code RO 1958 i.drv_lcdc_set_video_hw_mode CVWL568.lib(drv_lcdc.o) + 0x00016c48 0x00016c48 0x00000020 Code RO 1959 i.drv_lcdc_start CVWL568.lib(drv_lcdc.o) + 0x00016c68 0x00016c68 0x0000000c Code RO 1993 i.drv_memc_clear_status CVWL568.lib(drv_memc.o) + 0x00016c74 0x00016c74 0x00000040 Code RO 1994 i.drv_memc_enable_irq CVWL568.lib(drv_memc.o) + 0x00016cb4 0x00016cb4 0x0000000c Code RO 1995 i.drv_memc_gen_a_tear_signal CVWL568.lib(drv_memc.o) + 0x00016cc0 0x00016cc0 0x00000012 Code RO 1996 i.drv_memc_get_status CVWL568.lib(drv_memc.o) + 0x00016cd2 0x00016cd2 0x00000010 Code RO 1997 i.drv_memc_rate_transfer_sel CVWL568.lib(drv_memc.o) + 0x00016ce2 0x00016ce2 0x0000000e Code RO 1998 i.drv_memc_sel_vsync CVWL568.lib(drv_memc.o) + 0x00016cf0 0x00016cf0 0x00000014 Code RO 1999 i.drv_memc_set_active_height CVWL568.lib(drv_memc.o) + 0x00016d04 0x00016d04 0x0000000c Code RO 2000 i.drv_memc_set_data_mode CVWL568.lib(drv_memc.o) + 0x00016d10 0x00016d10 0x00000010 Code RO 2003 i.drv_memc_set_double_buffer CVWL568.lib(drv_memc.o) + 0x00016d20 0x00016d20 0x00000012 Code RO 2004 i.drv_memc_set_double_buffer_reverse CVWL568.lib(drv_memc.o) + 0x00016d32 0x00016d32 0x00000010 Code RO 2006 i.drv_memc_set_fs_en_conditions CVWL568.lib(drv_memc.o) + 0x00016d42 0x00016d42 0x00000014 Code RO 2007 i.drv_memc_set_inten CVWL568.lib(drv_memc.o) + 0x00016d56 0x00016d56 0x00000002 PAD + 0x00016d58 0x00016d58 0x00000018 Code RO 2008 i.drv_memc_set_lcdc_st_conditions CVWL568.lib(drv_memc.o) + 0x00016d70 0x00016d70 0x0000001a Code RO 2009 i.drv_memc_set_ltpo_mode CVWL568.lib(drv_memc.o) + 0x00016d8a 0x00016d8a 0x0000000e Code RO 2013 i.drv_memc_set_tear_mode CVWL568.lib(drv_memc.o) + 0x00016d98 0x00016d98 0x00000028 Code RO 2014 i.drv_memc_set_tear_waveform CVWL568.lib(drv_memc.o) + 0x00016dc0 0x00016dc0 0x0000000e Code RO 2016 i.drv_memc_set_vidc_sync_cnt CVWL568.lib(drv_memc.o) + 0x00016dce 0x00016dce 0x00000002 PAD + 0x00016dd0 0x00016dd0 0x00000008 Code RO 1573 i.drv_param_init_get_ccm CVWL568.lib(drv_param_init.o) + 0x00016dd8 0x00016dd8 0x00000014 Code RO 1574 i.drv_param_init_get_scld_filter_h CVWL568.lib(drv_param_init.o) + 0x00016dec 0x00016dec 0x00000014 Code RO 1575 i.drv_param_init_get_scld_filter_v CVWL568.lib(drv_param_init.o) + 0x00016e00 0x00016e00 0x00000008 Code RO 1576 i.drv_param_init_get_sclu_filter CVWL568.lib(drv_param_init.o) + 0x00016e08 0x00016e08 0x00000014 Code RO 1577 i.drv_param_init_set_ccm CVWL568.lib(drv_param_init.o) + 0x00016e1c 0x00016e1c 0x00000024 Code RO 1580 i.drv_param_p2r_filter_init CVWL568.lib(drv_param_init.o) + 0x00016e40 0x00016e40 0x00000010 Code RO 2287 i.drv_phy_enable_calibration CVWL568.lib(drv_phy_common.o) + 0x00016e50 0x00016e50 0x0000003c Code RO 2288 i.drv_phy_get_calibration CVWL568.lib(drv_phy_common.o) + 0x00016e8c 0x00016e8c 0x00000060 Code RO 2289 i.drv_phy_get_pll_para CVWL568.lib(drv_phy_common.o) + 0x00016eec 0x00016eec 0x00000054 Code RO 2290 i.drv_phy_get_rate_para CVWL568.lib(drv_phy_common.o) + 0x00016f40 0x00016f40 0x00000010 Code RO 2291 i.drv_phy_test_clear CVWL568.lib(drv_phy_common.o) + 0x00016f50 0x00016f50 0x00000018 Code RO 2292 i.drv_phy_test_lock CVWL568.lib(drv_phy_common.o) + 0x00016f68 0x00016f68 0x00000020 Code RO 2294 i.drv_phy_test_write_1_byte CVWL568.lib(drv_phy_common.o) + 0x00016f88 0x00016f88 0x00000026 Code RO 2295 i.drv_phy_test_write_2_byte CVWL568.lib(drv_phy_common.o) + 0x00016fae 0x00016fae 0x0000001e Code RO 2296 i.drv_phy_test_write_code CVWL568.lib(drv_phy_common.o) + 0x00016fcc 0x00016fcc 0x00000020 Code RO 2297 i.drv_phy_test_write_data CVWL568.lib(drv_phy_common.o) + 0x00016fec 0x00016fec 0x00000020 Code RO 1596 i.drv_pwr_set_cp_mode CVWL568.lib(drv_pwr.o) + 0x0001700c 0x0001700c 0x00000018 Code RO 1598 i.drv_pwr_set_pvd_mode CVWL568.lib(drv_pwr.o) + 0x00017024 0x00017024 0x00000038 Code RO 1599 i.drv_pwr_set_system_clk_src CVWL568.lib(drv_pwr.o) + 0x0001705c 0x0001705c 0x0000000c Code RO 1785 i.drv_rx_phy_test_clear CVWL568.lib(drv_dsi_rx.o) + 0x00017068 0x00017068 0x00000010 Code RO 1786 i.drv_rx_phy_test_lock CVWL568.lib(drv_dsi_rx.o) + 0x00017078 0x00017078 0x00000014 Code RO 1788 i.drv_rx_phy_test_write_1_byte CVWL568.lib(drv_dsi_rx.o) + 0x0001708c 0x0001708c 0x00000016 Code RO 1789 i.drv_rx_phy_test_write_2_byte CVWL568.lib(drv_dsi_rx.o) + 0x000170a2 0x000170a2 0x0000000a Code RO 2052 i.drv_rxbr_clear_pkt_buffer CVWL568.lib(drv_rxbr.o) + 0x000170ac 0x000170ac 0x00000004 Code RO 2053 i.drv_rxbr_clear_status0 CVWL568.lib(drv_rxbr.o) + 0x000170b0 0x000170b0 0x0000005a Code RO 2055 i.drv_rxbr_enable_irq CVWL568.lib(drv_rxbr.o) + 0x0001710a 0x0001710a 0x00000002 PAD + 0x0001710c 0x0001710c 0x00000014 Code RO 2056 i.drv_rxbr_frame_drop_cfg CVWL568.lib(drv_rxbr.o) + 0x00017120 0x00017120 0x00000064 Code RO 2057 i.drv_rxbr_get_clk CVWL568.lib(drv_rxbr.o) + 0x00017184 0x00017184 0x00000004 Code RO 2058 i.drv_rxbr_get_col_addr CVWL568.lib(drv_rxbr.o) + 0x00017188 0x00017188 0x00000012 Code RO 1092 i.drv_rxbr_get_int_source CVWL568.lib(hal_internal_vsync.o) + 0x0001719a 0x0001719a 0x00000004 Code RO 2061 i.drv_rxbr_get_page_addr CVWL568.lib(drv_rxbr.o) + 0x0001719e 0x0001719e 0x00000012 Code RO 1093 i.drv_rxbr_get_status0 CVWL568.lib(hal_internal_vsync.o) + 0x000171b0 0x000171b0 0x0000000c Code RO 2063 i.drv_rxbr_hline_rcv0_cfg CVWL568.lib(drv_rxbr.o) + 0x000171bc 0x000171bc 0x00000008 Code RO 2064 i.drv_rxbr_hline_rcv_cfg CVWL568.lib(drv_rxbr.o) + 0x000171c4 0x000171c4 0x0000000c Code RO 2065 i.drv_rxbr_register_irq0_callback CVWL568.lib(drv_rxbr.o) + 0x000171d0 0x000171d0 0x0000000c Code RO 2066 i.drv_rxbr_register_irq1_callback CVWL568.lib(drv_rxbr.o) + 0x000171dc 0x000171dc 0x00000014 Code RO 2067 i.drv_rxbr_set_ack_pkt_header CVWL568.lib(drv_rxbr.o) + 0x000171f0 0x000171f0 0x000000cc Code RO 2068 i.drv_rxbr_set_cmd_filter CVWL568.lib(drv_rxbr.o) + 0x000172bc 0x000172bc 0x00000014 Code RO 2070 i.drv_rxbr_set_color_format CVWL568.lib(drv_rxbr.o) + 0x000172d0 0x000172d0 0x00000014 Code RO 2072 i.drv_rxbr_set_inten CVWL568.lib(drv_rxbr.o) + 0x000172e4 0x000172e4 0x00000010 Code RO 2073 i.drv_rxbr_set_ltpo_drop_th CVWL568.lib(drv_rxbr.o) + 0x000172f4 0x000172f4 0x00000026 Code RO 2075 i.drv_rxbr_set_usr_cfg CVWL568.lib(drv_rxbr.o) + 0x0001731a 0x0001731a 0x00000008 Code RO 2076 i.drv_rxbr_set_usr_col CVWL568.lib(drv_rxbr.o) + 0x00017322 0x00017322 0x00000008 Code RO 2077 i.drv_rxbr_set_usr_row CVWL568.lib(drv_rxbr.o) + 0x0001732a 0x0001732a 0x00000002 PAD + 0x0001732c 0x0001732c 0x00000020 Code RO 1644 i.drv_spi_m_read_data CVWL568.lib(drv_spi_master.o) + 0x0001734c 0x0001734c 0x00000054 Code RO 1672 i.drv_swire_set_int CVWL568.lib(drv_swire.o) + 0x000173a0 0x000173a0 0x0000001c Code RO 1673 i.drv_swire_set_power_down CVWL568.lib(drv_swire.o) + 0x000173bc 0x000173bc 0x0000000c Code RO 1688 i.drv_sys_cfg_clear_all_int CVWL568.lib(drv_sys_cfg.o) + 0x000173c8 0x000173c8 0x00000028 Code RO 1689 i.drv_sys_cfg_clear_pending CVWL568.lib(drv_sys_cfg.o) + 0x000173f0 0x000173f0 0x00000018 Code RO 1692 i.drv_sys_cfg_sel_ap_rst_lvl_trig CVWL568.lib(drv_sys_cfg.o) + 0x00017408 0x00017408 0x0000001c Code RO 1693 i.drv_sys_cfg_sel_ap_rst_trig CVWL568.lib(drv_sys_cfg.o) + 0x00017424 0x00017424 0x00000024 Code RO 1694 i.drv_sys_cfg_sel_gpio_group CVWL568.lib(drv_sys_cfg.o) + 0x00017448 0x00017448 0x00000024 Code RO 1695 i.drv_sys_cfg_sel_int_trig CVWL568.lib(drv_sys_cfg.o) + 0x0001746c 0x0001746c 0x00000010 Code RO 1697 i.drv_sys_cfg_set_dma_rx_req CVWL568.lib(drv_sys_cfg.o) + 0x0001747c 0x0001747c 0x00000010 Code RO 1698 i.drv_sys_cfg_set_dma_tx_req CVWL568.lib(drv_sys_cfg.o) + 0x0001748c 0x0001748c 0x00000024 Code RO 1699 i.drv_sys_cfg_set_int CVWL568.lib(drv_sys_cfg.o) + 0x000174b0 0x000174b0 0x0000001a Code RO 1722 i.drv_timer_clear_status_flags CVWL568.lib(drv_timer.o) + 0x000174ca 0x000174ca 0x00000020 Code RO 1723 i.drv_timer_enable CVWL568.lib(drv_timer.o) + 0x000174ea 0x000174ea 0x00000002 PAD + 0x000174ec 0x000174ec 0x00000010 Code RO 1724 i.drv_timer_get_instance CVWL568.lib(drv_timer.o) + 0x000174fc 0x000174fc 0x00000010 Code RO 1725 i.drv_timer_get_prescaler CVWL568.lib(drv_timer.o) + 0x0001750c 0x0001750c 0x00000044 Code RO 1727 i.drv_timer_handle_interrupt CVWL568.lib(drv_timer.o) + 0x00017550 0x00017550 0x00000014 Code RO 1728 i.drv_timer_register_callback CVWL568.lib(drv_timer.o) + 0x00017564 0x00017564 0x00000010 Code RO 1729 i.drv_timer_set_compare_val CVWL568.lib(drv_timer.o) + 0x00017574 0x00017574 0x00000054 Code RO 1730 i.drv_timer_set_int CVWL568.lib(drv_timer.o) + 0x000175c8 0x000175c8 0x00000028 Code RO 1731 i.drv_timer_set_prescaler CVWL568.lib(drv_timer.o) + 0x000175f0 0x000175f0 0x0000000a Code RO 1868 i.drv_tx_phy_test_clear CVWL568.lib(drv_dsi_tx.o) + 0x000175fa 0x000175fa 0x0000001c Code RO 1869 i.drv_tx_phy_test_enter CVWL568.lib(drv_dsi_tx.o) + 0x00017616 0x00017616 0x0000001c Code RO 1870 i.drv_tx_phy_test_exit CVWL568.lib(drv_dsi_tx.o) + 0x00017632 0x00017632 0x00000012 Code RO 1872 i.drv_tx_phy_test_write_1_byte CVWL568.lib(drv_dsi_tx.o) + 0x00017644 0x00017644 0x00000014 Code RO 1873 i.drv_tx_phy_test_write_2_byte CVWL568.lib(drv_dsi_tx.o) + 0x00017658 0x00017658 0x00000010 Code RO 1874 i.drv_tx_phy_test_write_code CVWL568.lib(drv_dsi_tx.o) + 0x00017668 0x00017668 0x00000008 Code RO 2116 i.drv_vidc_clear_irq CVWL568.lib(drv_vidc.o) + 0x00017670 0x00017670 0x00000018 Code RO 2120 i.drv_vidc_enable CVWL568.lib(drv_vidc.o) + 0x00017688 0x00017688 0x00000040 Code RO 2121 i.drv_vidc_enable_irq CVWL568.lib(drv_vidc.o) + 0x000176c8 0x000176c8 0x00000012 Code RO 2123 i.drv_vidc_get_irq_status CVWL568.lib(drv_vidc.o) + 0x000176da 0x000176da 0x00000002 PAD + 0x000176dc 0x000176dc 0x00000028 Code RO 2127 i.drv_vidc_init_module_enable CVWL568.lib(drv_vidc.o) + 0x00017704 0x00017704 0x0000000c Code RO 2128 i.drv_vidc_register_callback CVWL568.lib(drv_vidc.o) + 0x00017710 0x00017710 0x00000006 Code RO 2129 i.drv_vidc_reset CVWL568.lib(drv_vidc.o) + 0x00017716 0x00017716 0x0000003c Code RO 2131 i.drv_vidc_set_dst_parameter CVWL568.lib(drv_vidc.o) + 0x00017752 0x00017752 0x00000014 Code RO 2135 i.drv_vidc_set_irqen CVWL568.lib(drv_vidc.o) + 0x00017766 0x00017766 0x00000010 Code RO 2136 i.drv_vidc_set_mirror CVWL568.lib(drv_vidc.o) + 0x00017776 0x00017776 0x00000008 Code RO 2139 i.drv_vidc_set_p2r_hcoef0 CVWL568.lib(drv_vidc.o) + 0x0001777e 0x0001777e 0x00000026 Code RO 2140 i.drv_vidc_set_p2r_hinitb CVWL568.lib(drv_vidc.o) + 0x000177a4 0x000177a4 0x00000026 Code RO 2141 i.drv_vidc_set_p2r_hinitr CVWL568.lib(drv_vidc.o) + 0x000177ca 0x000177ca 0x00000002 PAD + 0x000177cc 0x000177cc 0x00000018 Code RO 2142 i.drv_vidc_set_pentile_swap CVWL568.lib(drv_vidc.o) + 0x000177e4 0x000177e4 0x0000000a Code RO 2143 i.drv_vidc_set_pu_ctrl CVWL568.lib(drv_vidc.o) + 0x000177ee 0x000177ee 0x00000010 Code RO 2144 i.drv_vidc_set_rotation CVWL568.lib(drv_vidc.o) + 0x000177fe 0x000177fe 0x0000000a Code RO 2145 i.drv_vidc_set_scld_hcoef0 CVWL568.lib(drv_vidc.o) + 0x00017808 0x00017808 0x0000000a Code RO 2146 i.drv_vidc_set_scld_hcoef1 CVWL568.lib(drv_vidc.o) + 0x00017812 0x00017812 0x00000012 Code RO 2147 i.drv_vidc_set_scld_step CVWL568.lib(drv_vidc.o) + 0x00017824 0x00017824 0x0000000a Code RO 2148 i.drv_vidc_set_scld_vcoef0 CVWL568.lib(drv_vidc.o) + 0x0001782e 0x0001782e 0x0000000a Code RO 2149 i.drv_vidc_set_scld_vcoef1 CVWL568.lib(drv_vidc.o) + 0x00017838 0x00017838 0x00000016 Code RO 2150 i.drv_vidc_set_src_parameter CVWL568.lib(drv_vidc.o) + 0x0001784e 0x0001784e 0x00000002 PAD + 0x00017850 0x00017850 0x00000010 Code RO 2739 i.drv_wdg_clear_counter CVWL568.lib(drv_wdg.o) + 0x00017860 0x00017860 0x00000010 Code RO 2740 i.drv_wdg_clear_edge_flag CVWL568.lib(drv_wdg.o) + 0x00017870 0x00017870 0x00000010 Code RO 2743 i.drv_wdg_read_edge_flag CVWL568.lib(drv_wdg.o) + 0x00017880 0x00017880 0x00000040 Code RO 2746 i.drv_wdg_set_int CVWL568.lib(drv_wdg.o) + 0x000178c0 0x000178c0 0x0000000a Code RO 1356 i.fls_clr_interrupt_flag CVWL568.lib(drv_fls.o) + 0x000178ca 0x000178ca 0x00000014 Code RO 2346 i.fputc CVWL568.lib(tau_log.o) + 0x000178de 0x000178de 0x00000002 PAD + 0x000178e0 0x000178e0 0x00000034 Code RO 541 i.hal_dsi_rx_ctrl_create_handle CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00017914 0x00017914 0x0000009c Code RO 543 i.hal_dsi_rx_ctrl_deinit CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x000179b0 0x000179b0 0x00000084 Code RO 545 i.hal_dsi_rx_ctrl_dsc_async_handler CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00017a34 0x00017a34 0x00000028 Code RO 547 i.hal_dsi_rx_ctrl_gen_a_tear_signal CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00017a5c 0x00017a5c 0x00000028 Code RO 549 i.hal_dsi_rx_ctrl_get_max_ret_size CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00017a84 0x00017a84 0x00000064 Code RO 550 i.hal_dsi_rx_ctrl_hight_performan_mode CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00017ae8 0x00017ae8 0x00000098 Code RO 551 i.hal_dsi_rx_ctrl_init CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00017b80 0x00017b80 0x000001a4 Code RO 552 i.hal_dsi_rx_ctrl_init_clk CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00017d24 0x00017d24 0x000000d8 Code RO 553 i.hal_dsi_rx_ctrl_init_dsi_rx CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00017dfc 0x00017dfc 0x00000158 Code RO 554 i.hal_dsi_rx_ctrl_init_memc CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00017f54 0x00017f54 0x00000148 Code RO 555 i.hal_dsi_rx_ctrl_init_rxbr CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x0001809c 0x0001809c 0x0000022c Code RO 556 i.hal_dsi_rx_ctrl_init_vidc CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x000182c8 0x000182c8 0x0000003c Code RO 557 i.hal_dsi_rx_ctrl_pre_init_pps CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00018304 0x00018304 0x000000f0 Code RO 560 i.hal_dsi_rx_ctrl_send_ack_cmd CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x000183f4 0x000183f4 0x00000034 Code RO 564 i.hal_dsi_rx_ctrl_set_cus_sync_line CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00018428 0x00018428 0x00000034 Code RO 567 i.hal_dsi_rx_ctrl_set_hw_tear_mode CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x0001845c 0x0001845c 0x00000038 Code RO 568 i.hal_dsi_rx_ctrl_set_ipi_cfg CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00018494 0x00018494 0x00000072 Code RO 573 i.hal_dsi_rx_ctrl_set_rxbr_clk CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00018506 0x00018506 0x00000002 PAD + 0x00018508 0x00018508 0x00000034 Code RO 574 i.hal_dsi_rx_ctrl_set_sw_tear_mode CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x0001853c 0x0001853c 0x0000000e Code RO 576 i.hal_dsi_rx_ctrl_set_tear_mode_ex CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x0001854a 0x0001854a 0x00000002 PAD + 0x0001854c 0x0001854c 0x0000003c Code RO 577 i.hal_dsi_rx_ctrl_start CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00018588 0x00018588 0x0000003c Code RO 578 i.hal_dsi_rx_ctrl_stop CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x000185c4 0x000185c4 0x00000020 Code RO 580 i.hal_dsi_rx_ctrl_toggle_resolution CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x000185e4 0x000185e4 0x00000190 Code RO 634 i.hal_dsi_tx_calc_video_chunks CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018774 0x00018774 0x00000034 Code RO 635 i.hal_dsi_tx_config_params_for_lane_rate CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x000187a8 0x000187a8 0x00000450 Code RO 636 i.hal_dsi_tx_count_lane_rate CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018bf8 0x00018bf8 0x0000002c Code RO 639 i.hal_dsi_tx_ctrl_create_handle CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018c24 0x00018c24 0x00000084 Code RO 640 i.hal_dsi_tx_ctrl_deinit CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018ca8 0x00018ca8 0x0000004c Code RO 644 i.hal_dsi_tx_ctrl_enter_init_panel_mode CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018cf4 0x00018cf4 0x00000028 Code RO 646 i.hal_dsi_tx_ctrl_exit_init_panel_mode CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018d1c 0x00018d1c 0x000000a4 Code RO 648 i.hal_dsi_tx_ctrl_init CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018dc0 0x00018dc0 0x00000024 Code RO 649 i.hal_dsi_tx_ctrl_init_clk CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018de4 0x00018de4 0x0000000c Code RO 650 i.hal_dsi_tx_ctrl_panel_reset_pin CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018df0 0x00018df0 0x00000014 Code RO 659 i.hal_dsi_tx_ctrl_set_overwrite_rgb CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018e04 0x00018e04 0x00000010 Code RO 660 i.hal_dsi_tx_ctrl_set_partial_disp CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018e14 0x00018e14 0x00000024 Code RO 661 i.hal_dsi_tx_ctrl_set_partial_disp_area CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018e38 0x00018e38 0x0000009c Code RO 664 i.hal_dsi_tx_ctrl_start CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018ed4 0x00018ed4 0x00000044 Code RO 665 i.hal_dsi_tx_ctrl_stop CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018f18 0x00018f18 0x000000d8 Code RO 666 i.hal_dsi_tx_ctrl_write_array_cmd CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018ff0 0x00018ff0 0x000000b0 Code RO 667 i.hal_dsi_tx_ctrl_write_cmd CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x000190a0 0x000190a0 0x00000044 Code RO 668 i.hal_dsi_tx_init_data_mode CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x000190e4 0x000190e4 0x00000030 Code RO 669 i.hal_dsi_tx_init_dpi_cfg CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00019114 0x00019114 0x00000020 Code RO 670 i.hal_dsi_tx_init_interrupt CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00019134 0x00019134 0x00000020 Code RO 671 i.hal_dsi_tx_init_phy_cfg CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00019154 0x00019154 0x00000094 Code RO 672 i.hal_dsi_tx_init_remains CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x000191e8 0x000191e8 0x00000058 Code RO 673 i.hal_dsi_tx_init_video_mode CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00019240 0x00019240 0x00000044 Code RO 674 i.hal_dsi_tx_send_cmd CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00019284 0x00019284 0x00000018 Code RO 739 i.hal_gpio_ctrl_eint CVWL568.lib(hal_gpio.o) + 0x0001929c 0x0001929c 0x00000012 Code RO 740 i.hal_gpio_get_input_data CVWL568.lib(hal_gpio.o) + 0x000192ae 0x000192ae 0x00000002 PAD + 0x000192b0 0x000192b0 0x00000040 Code RO 743 i.hal_gpio_init_eint CVWL568.lib(hal_gpio.o) + 0x000192f0 0x000192f0 0x00000020 Code RO 744 i.hal_gpio_init_input CVWL568.lib(hal_gpio.o) + 0x00019310 0x00019310 0x00000028 Code RO 745 i.hal_gpio_init_output CVWL568.lib(hal_gpio.o) + 0x00019338 0x00019338 0x00000018 Code RO 746 i.hal_gpio_reg_eint_cb CVWL568.lib(hal_gpio.o) + 0x00019350 0x00019350 0x00000050 Code RO 747 i.hal_gpio_set_ap_reset_int CVWL568.lib(hal_gpio.o) + 0x000193a0 0x000193a0 0x00000060 Code RO 749 i.hal_gpio_set_mode CVWL568.lib(hal_gpio.o) + 0x00019400 0x00019400 0x00000008 Code RO 750 i.hal_gpio_set_output_data CVWL568.lib(hal_gpio.o) + 0x00019408 0x00019408 0x00000020 Code RO 752 i.hal_gpio_set_pull_state CVWL568.lib(hal_gpio.o) + 0x00019428 0x00019428 0x0000006c Code RO 778 i.hal_i2c_m_dma_init CVWL568.lib(hal_i2c_master.o) + 0x00019494 0x00019494 0x00000020 Code RO 779 i.hal_i2c_m_dma_read CVWL568.lib(hal_i2c_master.o) + 0x000194b4 0x000194b4 0x0000001c Code RO 780 i.hal_i2c_m_dma_write CVWL568.lib(hal_i2c_master.o) + 0x000194d0 0x000194d0 0x0000000c Code RO 782 i.hal_i2c_m_transfer_complate CVWL568.lib(hal_i2c_master.o) + 0x000194dc 0x000194dc 0x00000020 Code RO 783 i.hal_i2c_master_irq_callback CVWL568.lib(hal_i2c_master.o) + 0x000194fc 0x000194fc 0x00000010 Code RO 797 i.hal_i2c_s_dma_user_callback CVWL568.lib(hal_i2c_slave.o) + 0x0001950c 0x0001950c 0x0000004c Code RO 798 i.hal_i2c_s_dma_write CVWL568.lib(hal_i2c_slave.o) + 0x00019558 0x00019558 0x000000c8 Code RO 800 i.hal_i2c_s_init CVWL568.lib(hal_i2c_slave.o) + 0x00019620 0x00019620 0x00000014 Code RO 801 i.hal_i2c_s_nonblocking_read CVWL568.lib(hal_i2c_slave.o) + 0x00019634 0x00019634 0x0000000c Code RO 809 i.hal_i2c_s_set_transfer CVWL568.lib(hal_i2c_slave.o) + 0x00019640 0x00019640 0x00000174 Code RO 812 i.hal_i2c_slave_irq_callback CVWL568.lib(hal_i2c_slave.o) + 0x000197b4 0x000197b4 0x000000fc Code RO 1094 i.hal_internal_init_memc CVWL568.lib(hal_internal_vsync.o) + 0x000198b0 0x000198b0 0x00000010 Code RO 1096 i.hal_internal_sync_get_fb_setting CVWL568.lib(hal_internal_vsync.o) + 0x000198c0 0x000198c0 0x00000010 Code RO 1097 i.hal_internal_sync_get_hight_performan_mode CVWL568.lib(hal_internal_vsync.o) + 0x000198d0 0x000198d0 0x0000022c Code RO 1098 i.hal_internal_sync_input_resolution_change CVWL568.lib(hal_internal_vsync.o) + 0x00019afc 0x00019afc 0x00000010 Code RO 1101 i.hal_internal_update_dpi_param CVWL568.lib(hal_internal_vsync.o) + 0x00019b0c 0x00019b0c 0x0000012c Code RO 1102 i.hal_internal_video_mode_auto_sync CVWL568.lib(hal_internal_vsync.o) + 0x00019c38 0x00019c38 0x00000028 Code RO 1103 i.hal_internal_vsync_deinit CVWL568.lib(hal_internal_vsync.o) + 0x00019c60 0x00019c60 0x0000000c Code RO 1104 i.hal_internal_vsync_get_rx_state CVWL568.lib(hal_internal_vsync.o) + 0x00019c6c 0x00019c6c 0x00000018 Code RO 1105 i.hal_internal_vsync_get_sync_line CVWL568.lib(hal_internal_vsync.o) + 0x00019c84 0x00019c84 0x0000000c Code RO 1106 i.hal_internal_vsync_get_tear_mode CVWL568.lib(hal_internal_vsync.o) + 0x00019c90 0x00019c90 0x0000000c Code RO 1107 i.hal_internal_vsync_get_tx_state CVWL568.lib(hal_internal_vsync.o) + 0x00019c9c 0x00019c9c 0x00000118 Code RO 1108 i.hal_internal_vsync_init_rx CVWL568.lib(hal_internal_vsync.o) + 0x00019db4 0x00019db4 0x000000b0 Code RO 1109 i.hal_internal_vsync_init_tx CVWL568.lib(hal_internal_vsync.o) + 0x00019e64 0x00019e64 0x0000011c Code RO 1111 i.hal_internal_vsync_set_auto_hw_filter CVWL568.lib(hal_internal_vsync.o) + 0x00019f80 0x00019f80 0x00000014 Code RO 1113 i.hal_internal_vsync_set_rx_state CVWL568.lib(hal_internal_vsync.o) + 0x00019f94 0x00019f94 0x00000024 Code RO 1114 i.hal_internal_vsync_set_sync_line CVWL568.lib(hal_internal_vsync.o) + 0x00019fb8 0x00019fb8 0x00000050 Code RO 1115 i.hal_internal_vsync_set_tear_mode CVWL568.lib(hal_internal_vsync.o) + 0x0001a008 0x0001a008 0x00000080 Code RO 1116 i.hal_internal_vsync_set_tx_state CVWL568.lib(hal_internal_vsync.o) + 0x0001a088 0x0001a088 0x00000024 Code RO 675 i.hal_lcdc_config_ccm CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x0001a0ac 0x0001a0ac 0x00000058 Code RO 676 i.hal_lcdc_config_remains CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x0001a104 0x0001a104 0x00000014 Code RO 677 i.hal_lcdc_config_rgb_to_pentile CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x0001a118 0x0001a118 0x00000164 Code RO 678 i.hal_lcdc_config_upscaler CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x0001a27c 0x0001a27c 0x00000054 Code RO 679 i.hal_lcdc_init_cfg CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x0001a2d0 0x0001a2d0 0x000001b0 Code RO 680 i.hal_lcdc_init_clk CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x0001a480 0x0001a480 0x00000040 Code RO 681 i.hal_lcdc_init_interrupt CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x0001a4c0 0x0001a4c0 0x0000000e Code RO 837 i.hal_spi_m_clear_rxfifo CVWL568.lib(hal_spi_master.o) + 0x0001a4ce 0x0001a4ce 0x00000016 Code RO 863 i.hal_swire_open CVWL568.lib(hal_swire.o) + 0x0001a4e4 0x0001a4e4 0x00000008 Code RO 878 i.hal_system_enable_systick CVWL568.lib(hal_system.o) + 0x0001a4ec 0x0001a4ec 0x00000088 Code RO 882 i.hal_system_init CVWL568.lib(hal_system.o) + 0x0001a574 0x0001a574 0x0000001c Code RO 883 i.hal_system_init_console CVWL568.lib(hal_system.o) + 0x0001a590 0x0001a590 0x00000008 Code RO 886 i.hal_system_set_phy_calibration CVWL568.lib(hal_system.o) + 0x0001a598 0x0001a598 0x00000008 Code RO 887 i.hal_system_set_pvd CVWL568.lib(hal_system.o) + 0x0001a5a0 0x0001a5a0 0x00000008 Code RO 888 i.hal_system_set_vcc CVWL568.lib(hal_system.o) + 0x0001a5a8 0x0001a5a8 0x0000001a Code RO 913 i.hal_timer_init CVWL568.lib(hal_timer.o) + 0x0001a5c2 0x0001a5c2 0x00000002 PAD + 0x0001a5c4 0x0001a5c4 0x00000048 Code RO 915 i.hal_timer_start CVWL568.lib(hal_timer.o) + 0x0001a60c 0x0001a60c 0x00000028 Code RO 917 i.hal_timer_stop CVWL568.lib(hal_timer.o) + 0x0001a634 0x0001a634 0x0000008c Code RO 1070 i.hal_uart_init CVWL568.lib(hal_uart.o) + 0x0001a6c0 0x0001a6c0 0x00000010 Code RO 1073 i.hal_uart_transmit_blocking CVWL568.lib(hal_uart.o) + 0x0001a6d0 0x0001a6d0 0x00000110 Code RO 2226 i.handle_init CVWL568.lib(irq_redirect .o) + 0x0001a7e0 0x0001a7e0 0x00000064 Code RO 115 i.init_mipi_tx ap_demo.o + 0x0001a844 0x0001a844 0x00000088 Code RO 116 i.init_panel ap_demo.o + 0x0001a8cc 0x0001a8cc 0x0000000a Code RO 3 i.main main.o + 0x0001a8d6 0x0001a8d6 0x00000002 PAD + 0x0001a8d8 0x0001a8d8 0x000000a0 Code RO 117 i.open_mipi_rx ap_demo.o + 0x0001a978 0x0001a978 0x00000054 Code RO 118 i.pps_update_handle ap_demo.o + 0x0001a9cc 0x0001a9cc 0x000003f4 Code RO 1120 i.rx_get_dcs_packet_data CVWL568.lib(hal_internal_vsync.o) + 0x0001adc0 0x0001adc0 0x00000178 Code RO 1121 i.rx_partial_update CVWL568.lib(hal_internal_vsync.o) + 0x0001af38 0x0001af38 0x0000008c Code RO 1122 i.rx_receive_packet CVWL568.lib(hal_internal_vsync.o) + 0x0001afc4 0x0001afc4 0x00000180 Code RO 1123 i.rx_receive_pps CVWL568.lib(hal_internal_vsync.o) + 0x0001b144 0x0001b144 0x000000a4 Code RO 1124 i.rxbr_irq0_callback CVWL568.lib(hal_internal_vsync.o) + 0x0001b1e8 0x0001b1e8 0x000001dc Code RO 1125 i.rxbr_irq1_callback CVWL568.lib(hal_internal_vsync.o) + 0x0001b3c4 0x0001b3c4 0x000000c4 Code RO 1126 i.soft_gen_te CVWL568.lib(hal_internal_vsync.o) + 0x0001b488 0x0001b488 0x000000c0 Code RO 1127 i.soft_gen_te_double_buffer CVWL568.lib(hal_internal_vsync.o) + 0x0001b548 0x0001b548 0x00000030 Code RO 119 i.soft_timer3_cb ap_demo.o + 0x0001b578 0x0001b578 0x00000048 Code RO 2766 i.sqrt m_ps.l(sqrt.o) + 0x0001b5c0 0x0001b5c0 0x00000040 Code RO 120 i.tp_heartbeat_exec ap_demo.o + 0x0001b600 0x0001b600 0x00000108 Code RO 1128 i.vidc_callback CVWL568.lib(hal_internal_vsync.o) + 0x0001b708 0x0001b708 0x000000d0 Code RO 1129 i.vpre_err_reset CVWL568.lib(hal_internal_vsync.o) + 0x0001b7d8 0x0001b7d8 0x000001cc Code RO 1130 i.vsync_set_te_mode CVWL568.lib(hal_internal_vsync.o) + 0x0001b9a4 0x0001b9a4 0x000000ec Data RO 121 .constdata ap_demo.o + 0x0001ba90 0x0001ba90 0x00000020 Data RO 424 .constdata app_tp_st_touch.o + 0x0001bab0 0x0001bab0 0x00000024 Data RO 683 .constdata CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x0001bad4 0x0001bad4 0x000000d2 Data RO 755 .constdata CVWL568.lib(hal_gpio.o) + 0x0001bba6 0x0001bba6 0x00000002 PAD + 0x0001bba8 0x0001bba8 0x00000020 Data RO 813 .constdata CVWL568.lib(hal_i2c_slave.o) + 0x0001bbc8 0x0001bbc8 0x00002150 Data RO 941 .constdata WL568_20U_HX667_TP.lib(app_tp_for_custom_s8.o) + 0x0001dd18 0x0001dd18 0x00000001 Data RO 954 .constdata WL568_20U_HX667_TP.lib(app_tp_for_custom_s8.o) + 0x0001dd19 0x0001dd19 0x00000003 PAD + 0x0001dd1c 0x0001dd1c 0x00000008 Data RO 1581 .constdata CVWL568.lib(drv_param_init.o) + 0x0001dd24 0x0001dd24 0x00000186 Data RO 2298 .constdata CVWL568.lib(drv_phy_common.o) + 0x0001deaa 0x0001deaa 0x00000002 PAD + 0x0001deac 0x0001deac 0x00000048 Data RO 584 .conststring CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x0001def4 0x0001def4 0x00000043 Data RO 684 .conststring CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x0001df37 0x0001df37 0x00000001 PAD + 0x0001df38 0x0001df38 0x00000134 Data RO 1132 .conststring CVWL568.lib(hal_internal_vsync.o) + 0x0001e06c 0x0001e06c 0x00000030 Data RO 3128 Region$$Table anon$$obj.o + + + Execution Region RW_RAM1 (Exec base: 0x00070000, Load base: 0x0001e09c, Size: 0x00000000, Max: 0x000000f0, ABSOLUTE) + + **** No section assigned to this execution region **** + + + Execution Region RW_RAM2 (Exec base: 0x00070100, Load base: 0x0001e09c, Size: 0x000000c0, Max: 0x000000d0, ABSOLUTE) + + Exec Addr Load Addr Size Type Attr Idx E Section Name Object + + 0x00070100 - 0x000000c0 Zero RW 2227 .ARM.__AT_0x00070100 CVWL568.lib(irq_redirect .o) + + + Execution Region RW_RAM3 (Exec base: 0x000701d0, Load base: 0x0001e09c, Size: 0x00005470, Max: 0x00007e30, ABSOLUTE, COMPRESSED[0x0000144c]) + + Exec Addr Load Addr Size Type Attr Idx E Section Name Object + + 0x000701d0 COMPRESSED 0x00001d5a Data RW 122 .data ap_demo.o + 0x00071f2a COMPRESSED 0x00000017 Data RW 286 .data app_tp_transfer.o + 0x00071f41 COMPRESSED 0x00000028 Data RW 425 .data app_tp_st_touch.o + 0x00071f69 COMPRESSED 0x00000003 PAD + 0x00071f6c COMPRESSED 0x00000008 Data RW 585 .data CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00071f74 COMPRESSED 0x00000003 Data RW 685 .data CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00071f77 COMPRESSED 0x00000001 Data RW 784 .data CVWL568.lib(hal_i2c_master.o) + 0x00071f78 COMPRESSED 0x00000020 Data RW 814 .data CVWL568.lib(hal_i2c_slave.o) + 0x00071f98 COMPRESSED 0x000000e4 Data RW 955 .data WL568_20U_HX667_TP.lib(app_tp_for_custom_s8.o) + 0x0007207c COMPRESSED 0x00000001 Data RW 958 .data WL568_20U_HX667_TP.lib(app_tp_for_custom_s8.o) + 0x0007207d COMPRESSED 0x00000001 Data RW 959 .data WL568_20U_HX667_TP.lib(app_tp_for_custom_s8.o) + 0x0007207e COMPRESSED 0x00000001 Data RW 964 .data WL568_20U_HX667_TP.lib(app_tp_for_custom_s8.o) + 0x0007207f COMPRESSED 0x00000003 Data RW 965 .data WL568_20U_HX667_TP.lib(app_tp_for_custom_s8.o) + 0x00072082 COMPRESSED 0x00000005 Data RW 966 .data WL568_20U_HX667_TP.lib(app_tp_for_custom_s8.o) + 0x00072087 COMPRESSED 0x00000001 PAD + 0x00072088 COMPRESSED 0x00000030 Data RW 976 .data WL568_20U_HX667_TP.lib(app_tp_for_custom_s8.o) + 0x000720b8 COMPRESSED 0x00000018 Data RW 1133 .data CVWL568.lib(hal_internal_vsync.o) + 0x000720d0 COMPRESSED 0x0000000c Data RW 1192 .data CVWL568.lib(drv_common.o) + 0x000720dc COMPRESSED 0x00000004 Data RW 1459 .data CVWL568.lib(drv_gpio.o) + 0x000720e0 COMPRESSED 0x00000008 Data RW 1497 .data CVWL568.lib(drv_i2c_dma.o) + 0x000720e8 COMPRESSED 0x00000004 Data RW 1526 .data CVWL568.lib(drv_i2c_master.o) + 0x000720ec COMPRESSED 0x00000004 Data RW 1557 .data CVWL568.lib(drv_i2c_slave.o) + 0x000720f0 COMPRESSED 0x000004a4 Data RW 1582 .data CVWL568.lib(drv_param_init.o) + 0x00072594 COMPRESSED 0x00000004 Data RW 1649 .data CVWL568.lib(drv_spi_master.o) + 0x00072598 COMPRESSED 0x00000008 Data RW 1675 .data CVWL568.lib(drv_swire.o) + 0x000725a0 COMPRESSED 0x00000001 Data RW 1700 .data CVWL568.lib(drv_sys_cfg.o) + 0x000725a1 COMPRESSED 0x00000003 PAD + 0x000725a4 COMPRESSED 0x00000050 Data RW 1733 .data CVWL568.lib(drv_timer.o) + 0x000725f4 COMPRESSED 0x00000008 Data RW 2079 .data CVWL568.lib(drv_rxbr.o) + 0x000725fc COMPRESSED 0x00000004 Data RW 2152 .data CVWL568.lib(drv_vidc.o) + 0x00072600 COMPRESSED 0x00000001 Data RW 2299 .data CVWL568.lib(drv_phy_common.o) + 0x00072601 COMPRESSED 0x00000003 PAD + 0x00072604 COMPRESSED 0x0000000c Data RW 2319 .data CVWL568.lib(drv_chip_info.o) + 0x00072610 COMPRESSED 0x00000006 Data RW 2356 .data tp_EncryptCheck.lib(app_tp_enc.o) + 0x00072616 COMPRESSED 0x00000002 PAD + 0x00072618 COMPRESSED 0x00000012 Data RW 2516 .data CVWL568.lib(norflash.o) + 0x0007262a COMPRESSED 0x00000002 PAD + 0x0007262c COMPRESSED 0x0000000c Data RW 2603 .data CVWL568.lib(drv_pwm.o) + 0x00072638 COMPRESSED 0x00000008 Data RW 2681 .data CVWL568.lib(drv_uart.o) + 0x00072640 COMPRESSED 0x0000000c Data RW 2748 .data CVWL568.lib(drv_wdg.o) + 0x0007264c COMPRESSED 0x00000004 Data RW 3097 .data mc_p.l(stdout.o) + 0x00072650 COMPRESSED 0x00000004 Data RW 3109 .data mc_p.l(errno.o) + 0x00072654 - 0x00000190 Zero RW 285 .bss app_tp_transfer.o + 0x000727e4 - 0x0000000c Zero RW 423 .bss app_tp_st_touch.o + 0x000727f0 - 0x000000c4 Zero RW 583 .bss CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x000728b4 - 0x0000004c Zero RW 682 .bss CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00072900 - 0x000000d0 Zero RW 1075 .bss CVWL568.lib(hal_uart.o) + 0x000729d0 - 0x00000984 Zero RW 1131 .bss CVWL568.lib(hal_internal_vsync.o) + 0x00073354 - 0x0000001c Zero RW 1321 .bss CVWL568.lib(drv_dma.o) + 0x00073370 - 0x00000040 Zero RW 1458 .bss CVWL568.lib(drv_gpio.o) + 0x000733b0 - 0x00000140 Zero RW 1496 .bss CVWL568.lib(drv_i2c_dma.o) + 0x000734f0 - 0x00001030 Zero RW 1756 .bss CVWL568.lib(dcs_packet_fifo.o) + 0x00074520 - 0x00000100 Zero RW 2347 .bss CVWL568.lib(tau_log.o) + 0x00074620 - 0x00000020 Zero RW 2451 .bss CVWL568.lib(hal_spi_slave.o) + 0x00074640 - 0x00001000 Zero RW 530 STACK startup_armcm0.o + + +============================================================================== + +Image component sizes + + + Code (inc. data) RO Data RW Data ZI Data Debug Object Name + + 6266 202 236 7514 0 36555 ap_demo.o + 1110 94 32 40 12 11805 app_tp_st_touch.o + 992 96 0 23 400 12927 app_tp_transfer.o + 36 6 0 0 0 513 board.o + 10 0 0 0 0 5663 main.o + 120 18 192 0 4096 2084 startup_armcm0.o + + ---------------------------------------------------------------------- + 8538 416 508 7580 4508 69547 Object Totals + 0 0 48 0 0 0 (incl. Generated) + 4 0 0 3 0 0 (incl. Padding) + + ---------------------------------------------------------------------- + + Code (inc. data) RO Data RW Data ZI Data Debug Library Member Name + + 216 32 0 0 4144 252 dcs_packet_fifo.o + 272 96 0 12 0 256 drv_chip_info.o + 192 82 24 12 0 264 drv_common.o + 420 90 0 0 0 1200 drv_crgu.o + 410 28 0 0 28 796 drv_dma.o + 232 28 0 0 0 340 drv_dsc_dec.o + 1644 494 0 0 0 1336 drv_dsi_rx.o + 1528 118 0 0 0 2428 drv_dsi_tx.o + 132 0 0 0 0 256 drv_efuse.o + 10 0 0 0 0 60 drv_fls.o + 796 112 0 4 64 1236 drv_gpio.o + 600 82 0 8 320 624 drv_i2c_dma.o + 360 86 0 4 0 456 drv_i2c_master.o + 292 36 0 4 0 580 drv_i2c_slave.o + 704 6 0 0 0 1504 drv_lcdc.o + 492 28 0 0 0 1112 drv_memc.o + 112 36 8 1188 0 376 drv_param_init.o + 428 30 390 1 0 664 drv_phy_common.o + 72 10 0 12 0 76 drv_pwm.o + 112 24 0 0 0 180 drv_pwr.o + 722 84 0 8 0 1456 drv_rxbr.o + 104 24 0 4 0 188 drv_spi_master.o + 144 16 0 8 0 200 drv_swire.o + 300 64 0 1 0 628 drv_sys_cfg.o + 358 30 0 80 0 872 drv_timer.o + 698 18 0 8 0 680 drv_uart.o + 510 28 0 4 0 1452 drv_vidc.o + 168 22 0 12 0 316 drv_wdg.o + 3328 398 72 8 196 1668 hal_dsi_rx_ctrl.o + 4312 300 103 3 76 2324 hal_dsi_tx_ctrl.o + 450 48 210 0 0 752 hal_gpio.o + 212 40 0 1 0 340 hal_i2c_master.o + 696 70 32 32 0 408 hal_i2c_slave.o + 8084 1704 308 24 2436 2616 hal_internal_vsync.o + 14 0 0 0 0 68 hal_spi_master.o + 580 32 0 0 32 136 hal_spi_slave.o + 22 0 0 0 0 68 hal_swire.o + 196 32 0 0 0 408 hal_system.o + 138 6 0 0 0 208 hal_timer.o + 156 18 0 0 208 144 hal_uart.o + 1076 324 0 0 192 1980 irq_redirect .o + 48 10 0 18 0 68 norflash.o + 58 0 0 0 0 128 tau_delay.o + 60 10 0 0 256 156 tau_log.o + 1784 74 8529 287 0 18027 app_tp_for_custom_s8.o + 200 20 0 0 0 76 ceil.o + 72 6 0 0 0 76 sqrt.o + 86 0 0 0 0 0 __dczerorl2.o + 0 0 0 0 0 0 entry.o + 0 0 0 0 0 0 entry10a.o + 0 0 0 0 0 0 entry11a.o + 8 4 0 0 0 0 entry2.o + 4 0 0 0 0 0 entry5.o + 0 0 0 0 0 0 entry7b.o + 0 0 0 0 0 0 entry8b.o + 8 4 0 0 0 0 entry9a.o + 12 6 0 4 0 60 errno.o + 30 0 0 0 0 0 handlers.o + 40 0 0 0 0 72 idiv.o + 36 8 0 0 0 68 init.o + 0 0 0 0 0 0 iusefp.o + 32 0 0 0 0 68 llshl.o + 38 0 0 0 0 68 llsshr.o + 34 0 0 0 0 68 llushr.o + 36 0 0 0 0 60 memcpya.o + 36 0 0 0 0 100 memseta.o + 2298 104 0 0 0 544 printfa.o + 0 0 0 4 0 0 stdout.o + 44 0 0 0 0 72 uidiv.o + 96 0 0 0 0 84 uldiv.o + 40 2 0 0 0 68 cdcmple.o + 40 2 0 0 0 68 cdrcmple.o + 20 0 0 0 0 68 cfrcmple.o + 356 4 0 0 0 140 dadd.o + 240 6 0 0 0 84 ddiv.o + 236 0 0 0 0 216 depilogue.o + 72 10 0 0 0 72 dfixi.o + 60 10 0 0 0 68 dfixui.o + 64 10 0 0 0 68 dfixul.o + 28 4 0 0 0 68 dfltui.o + 208 6 0 0 0 88 dmul.o + 162 0 0 0 0 80 dsqrt.o + 40 0 0 0 0 60 f2d.o + 178 0 0 0 0 108 fadd.o + 124 0 0 0 0 72 fdiv.o + 130 0 0 0 0 144 fepilogue.o + 50 0 0 0 0 60 ffixi.o + 40 0 0 0 0 60 ffixui.o + 22 0 0 0 0 68 fflti.o + 14 0 0 0 0 68 ffltui.o + 122 0 0 0 0 72 fmul.o + 24 0 0 0 0 60 fscalb.o + 100 10 0 6 0 4107 app_tp_enc.o + + ---------------------------------------------------------------------- + 38770 4986 9684 1768 7952 56670 Library Totals + 48 0 8 11 0 0 (incl. Padding) + + ---------------------------------------------------------------------- + + Code (inc. data) RO Data RW Data ZI Data Debug Library Name + + 31458 4696 1147 1456 7952 31260 CVWL568.lib + 1784 74 8529 287 0 18027 WL568_20U_HX667_TP.lib + 272 26 0 0 0 152 m_ps.l + 2838 126 0 8 0 1264 mc_p.l + 2270 54 0 0 0 1860 mf_p.l + 100 10 0 6 0 4107 tp_EncryptCheck.lib + + ---------------------------------------------------------------------- + 38770 4986 9684 1768 7952 56670 Library Totals + + ---------------------------------------------------------------------- + +============================================================================== + + + Code (inc. data) RO Data RW Data ZI Data Debug + + 47308 5402 10192 9348 12460 101865 Grand Totals + 47308 5402 10192 5196 12460 101865 ELF Image Totals (compressed) + 47308 5402 10192 5196 0 0 ROM Totals + +============================================================================== + + Total RO Size (Code + RO Data) 57500 ( 56.15kB) + Total RW Size (RW Data + ZI Data) 21808 ( 21.30kB) + Total ROM Size (Code + RO Data + RW Data) 62696 ( 61.23kB) + +============================================================================== + diff --git a/project/ISP_568/Listings/ap_demo.txt b/project/ISP_568/Listings/ap_demo.txt new file mode 100644 index 0000000..bcf3f68 --- /dev/null +++ b/project/ISP_568/Listings/ap_demo.txt @@ -0,0 +1,7352 @@ +; generated by Component: ARM Compiler 5.06 update 6 (build 750) Tool: ArmCC [4d3637] +; commandline ArmCC [--c99 --list --split_sections --debug -c --asm --interleave --gnu -o.\objects\ap_demo.o --asm_dir=.\Listings\ --list_dir=.\Listings\ --depend=.\objects\ap_demo.d --cpu=Cortex-M0 --apcs=interwork -O3 --diag_suppress=9931 -I..\..\src -I..\..\src\board -I..\..\src\common -I..\..\src\sdk\include -I..\..\src\app\demo -I..\..\src\sdk\include\M0 -I..\..\src\app -I..\..\src\app\module_demo -I..\..\src\app\touch -I..\..\src\app\S8 -I..\..\src\app\S9 -I..\CVWL568 -I.\RTE\_ISP_568 -IC:\Keil_v5\ARM\PACK\ARM\CMSIS\5.5.1\CMSIS\Core\Include -IC:\Keil_v5\ARM\PACK\ARM\CMSIS\5.5.1\Device\ARM\ARMCM0\Include -D__MICROLIB -D__UVISION_VERSION=528 -D_RTE_ -DARMCM0 -DISP_568 --omf_browse=.\objects\ap_demo.crf ..\..\src\app\demo\ap_demo.c] + THUMB + + AREA ||i.Gpio_swire_output||, CODE, READONLY, ALIGN=2 + + Gpio_swire_output PROC +;;;975 //#define GPIO_SWIRE_PAD IO_PAD_ADCIN //S20Uʹô +;;;976 void Gpio_swire_output(uint8_t flag, uint8_t num) +000000 b570 PUSH {r4-r6,lr} +;;;977 { +000002 460d MOV r5,r1 +;;;978 uint8_t ii; +;;;979 +;;;980 if (flag) +000004 2800 CMP r0,#0 +000006 d029 BEQ |L1.92| +;;;981 { +;;;982 if (flag ==2) +000008 2802 CMP r0,#2 +00000a d10a BNE |L1.34| +;;;983 { +;;;984 //hal_gpio_init_output(GPIO_SWIRE_PAD, IO_LVL_HIGH); +;;;985 hal_gpio_set_output_data(GPIO_SWIRE_PAD, IO_LVL_HIGH); +00000c 2101 MOVS r1,#1 +00000e 2004 MOVS r0,#4 +000010 f7fffffe BL hal_gpio_set_output_data +;;;986 hal_gpio_set_output_data(IO_PAD_ADCIN, IO_LVL_HIGH); +000014 2101 MOVS r1,#1 +000016 2014 MOVS r0,#0x14 +000018 f7fffffe BL hal_gpio_set_output_data +;;;987 //delayMs(4); //2 +;;;988 delayUs(807); +00001c 4814 LDR r0,|L1.112| +00001e f7fffffe BL delayUs + |L1.34| +;;;989 } +;;;990 for (ii =0; ii< num; ii++) +000022 2400 MOVS r4,#0 +000024 e017 B |L1.86| + |L1.38| +;;;991 { +;;;992 hal_gpio_set_output_data(GPIO_SWIRE_PAD, IO_LVL_LOW); +000026 2100 MOVS r1,#0 +000028 2004 MOVS r0,#4 +00002a f7fffffe BL hal_gpio_set_output_data +;;;993 hal_gpio_set_output_data(IO_PAD_ADCIN, IO_LVL_LOW); +00002e 2100 MOVS r1,#0 +000030 2014 MOVS r0,#0x14 +000032 f7fffffe BL hal_gpio_set_output_data +;;;994 delayUs(9); +000036 2009 MOVS r0,#9 +000038 f7fffffe BL delayUs +;;;995 hal_gpio_set_output_data(GPIO_SWIRE_PAD, IO_LVL_HIGH); +00003c 2101 MOVS r1,#1 +00003e 2004 MOVS r0,#4 +000040 f7fffffe BL hal_gpio_set_output_data +;;;996 hal_gpio_set_output_data(IO_PAD_ADCIN, IO_LVL_HIGH); +000044 2101 MOVS r1,#1 +000046 2014 MOVS r0,#0x14 +000048 f7fffffe BL hal_gpio_set_output_data +;;;997 delayUs(9); +00004c 2009 MOVS r0,#9 +00004e f7fffffe BL delayUs +000052 1c64 ADDS r4,r4,#1 +000054 b2e4 UXTB r4,r4 ;990 + |L1.86| +000056 42ac CMP r4,r5 ;990 +000058 d3e5 BCC |L1.38| +;;;998 } +;;;999 } +;;;1000 else +;;;1001 { +;;;1002 hal_gpio_init_output(GPIO_SWIRE_PAD, IO_LVL_LOW); +;;;1003 hal_gpio_init_output(IO_PAD_ADCIN, IO_LVL_LOW); +;;;1004 } +;;;1005 } +00005a bd70 POP {r4-r6,pc} + |L1.92| +00005c 2100 MOVS r1,#0 ;1002 +00005e 2004 MOVS r0,#4 ;1002 +000060 f7fffffe BL hal_gpio_init_output +000064 2100 MOVS r1,#0 ;1003 +000066 2014 MOVS r0,#0x14 ;1003 +000068 f7fffffe BL hal_gpio_init_output +00006c bd70 POP {r4-r6,pc} +;;;1006 + ENDP + +00006e 0000 DCW 0x0000 + |L1.112| + DCD 0x00000327 + + AREA ||i.ap_dcs_read||, CODE, READONLY, ALIGN=2 + + ap_dcs_read PROC +;;;178 +;;;179 static bool ap_dcs_read(uint8_t data_type, uint8_t dcs_cmd, uint8_t param) +000000 b5f0 PUSH {r4-r7,lr} +;;;180 { +000002 b0ff SUB sp,sp,#0x1fc +000004 b092 SUB sp,sp,#0x48 +000006 4617 MOV r7,r2 +000008 460e MOV r6,r1 +;;;181 #ifdef USE_FOR_SUMSUNG_S20U +;;;182 static uint8_t b3_read_flag =0; +;;;183 static uint8_t c8_read_flag =0; +;;;184 static uint8_t c9_read_flag =0; +;;;185 static uint8_t c9_read_flag2 =0; +;;;186 static uint8_t c9_read_flag3 =0; +;;;187 +;;;188 uint32_t return_size = hal_dsi_rx_ctrl_get_max_ret_size(g_rx_ctrl_handle); +00000a 4cfe LDR r4,|L2.1028| +00000c 6aa0 LDR r0,[r4,#0x28] ; g_rx_ctrl_handle +00000e f7fffffe BL hal_dsi_rx_ctrl_get_max_ret_size +;;;189 // TAU_LOGD("r[%x] [%d]", dcs_cmd, return_size); +;;;190 +;;;191 if (dcs_cmd == 0xDA) +;;;192 { +;;;193 phone_DisplayOFF_flag=1; +000012 2501 MOVS r5,#1 +;;;194 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +000014 2381 MOVS r3,#0x81 +000016 2eda CMP r6,#0xda ;191 +000018 d02e BEQ |L2.120| +;;;195 DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, +;;;196 DSI_VC_0, +;;;197 0x1, 0x81); +;;;198 phone_power_on = true; +;;;199 } +;;;200 else if (dcs_cmd == 0xDB) +00001a 2edb CMP r6,#0xdb +00001c d036 BEQ |L2.140| +;;;201 { +;;;202 phone_DisplayOFF_flag=1; +;;;203 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;204 DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, +;;;205 DSI_VC_0, +;;;206 0x1, 0x21); //0x1, 0x01); +;;;207 +;;;208 } +;;;209 else if (dcs_cmd == 0xDC) +00001e 2edc CMP r6,#0xdc +000020 d037 BEQ |L2.146| +;;;210 { +;;;211 phone_DisplayOFF_flag=1; +;;;212 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;213 DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, +;;;214 DSI_VC_0, +;;;215 0x1, 0x04); //0x1, 0x03); +;;;216 +;;;217 } +;;;218 else if (dcs_cmd == 0x01) +000022 2e01 CMP r6,#1 +000024 d042 BEQ |L2.172| +;;;219 { +;;;220 ap_get_tp_calibration_status_01(g_rx_ctrl_handle, param); +;;;221 } +;;;222 else if (dcs_cmd == 0x04) +000026 2e04 CMP r6,#4 +000028 d045 BEQ |L2.182| +;;;223 { +;;;224 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;225 DSI_ACK_DT_DSC_LONG_RESPONSE, +;;;226 DSI_VC_0, +;;;227 3, 0x81,0x01,0x03); +;;;228 } +;;;229 else if (dcs_cmd == 0x0A) +;;;230 { +;;;231 if (return_size == 3) +;;;232 { +;;;233 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +00002a 229d MOVS r2,#0x9d +00002c 2e0a CMP r6,#0xa ;229 +00002e d047 BEQ |L2.192| +;;;234 DSI_ACK_DT_DSC_LONG_RESPONSE, +;;;235 DSI_VC_0, +;;;236 3, 0x9D,0x9D,0x9D); +;;;237 } +;;;238 else +;;;239 { +;;;240 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;241 DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, +;;;242 DSI_VC_0, +;;;243 0x1, 0x9F); +;;;244 } +;;;245 } +;;;246 else if (dcs_cmd == 0x0E) +000030 2e0e CMP r6,#0xe +000032 d053 BEQ |L2.220| +;;;247 { +;;;248 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;249 DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, +;;;250 DSI_VC_0, +;;;251 0x1, 0x80); +;;;252 } +;;;253 else if (dcs_cmd == 0x0F) +000034 2e0f CMP r6,#0xf +000036 d053 BEQ |L2.224| +000038 2100 MOVS r1,#0 +;;;254 { +;;;255 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;256 DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, +;;;257 DSI_VC_0, +;;;258 0x1, 0xC0); +;;;259 } +;;;260 else if (dcs_cmd == 0xEE) +00003a 2eee CMP r6,#0xee +00003c d01a BEQ |L2.116| +;;;261 { +;;;262 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;263 DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, +;;;264 DSI_VC_0, +;;;265 0x1, 0x00); +;;;266 } +;;;267 else if (dcs_cmd == 0x05) +00003e 2e05 CMP r6,#5 +000040 d018 BEQ |L2.116| +;;;268 { +;;;269 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;270 DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, +;;;271 DSI_VC_0, +;;;272 0x1, 0x00); +;;;273 } +;;;274 else if (dcs_cmd == 0x87) +000042 2e87 CMP r6,#0x87 +000044 d016 BEQ |L2.116| +;;;275 { +;;;276 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;277 DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, +;;;278 DSI_VC_0, +;;;279 0x1, 0x00); +;;;280 } +;;;281 else if (dcs_cmd == 0xA1) +;;;282 { +;;;283 if (return_size == 11) +;;;284 { +;;;285 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +000046 279b MOVS r7,#0x9b +000048 2ea1 CMP r6,#0xa1 ;281 +00004a d04b BEQ |L2.228| +;;;286 DSI_ACK_DT_DSC_LONG_RESPONSE, +;;;287 DSI_VC_0, +;;;288 return_size, 0x0B,0xF2,0x0C,0x90,0x9B,0x17,0x0D,0x05,0x0D,0x20,0xBF); +;;;289 +;;;290 } +;;;291 else if (return_size == 10) +;;;292 { +;;;293 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;294 DSI_ACK_DT_DSC_LONG_RESPONSE, +;;;295 DSI_VC_0, +;;;296 //10, 0x0B,0xF2,0x0C,0x90,0x9B,0x17,0x0D,0x05,0x0D,0x20); +;;;297 10, 0x0B,0xF6,0x0C,0x91,0x93,0x0D,0x09,0x15,0x03,0x1A); +;;;298 +;;;299 +;;;300 } +;;;301 else if (return_size == 4) +;;;302 { +;;;303 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;304 DSI_ACK_DT_DSC_LONG_RESPONSE, +;;;305 DSI_VC_0, +;;;306 4, 0x0B,0xF2,0x0C,0x90); +;;;307 +;;;308 } +;;;309 else if (return_size == 1) +;;;310 { +;;;311 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;312 DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, +;;;313 DSI_VC_0, +;;;314 1, 0x30); //1, 0xBF); +;;;315 } +;;;316 else +;;;317 { +;;;318 TAU_LOGD("r[%x] [%d] err", dcs_cmd, return_size); +;;;319 } +;;;320 } +;;;321 else if (dcs_cmd == 0xD6) +00004c 2ed6 CMP r6,#0xd6 +00004e d07c BEQ |L2.330| +;;;322 { +;;;323 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;324 DSI_ACK_DT_DSC_LONG_RESPONSE, +;;;325 DSI_VC_0, +;;;326 //5, 0x98,0x8E,0xB1,0x79,0x9A); +;;;327 5, 0x9B,0x8A,0x35,0x60,0xC2); +;;;328 +;;;329 } +;;;330 else if (dcs_cmd == 0xEC) +000050 2eec CMP r6,#0xec +000052 d07b BEQ |L2.332| +;;;331 { +;;;332 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;333 DSI_ACK_DT_DSC_LONG_RESPONSE, +;;;334 DSI_VC_0, +;;;335 5, 0x00,0x00,0x00,0x00,0x00); +;;;336 } +;;;337 else if (dcs_cmd == 0x7F) +000054 2e7f CMP r6,#0x7f +000056 d07a BEQ |L2.334| +;;;338 { +;;;339 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;340 DSI_ACK_DT_DSC_LONG_RESPONSE, +;;;341 DSI_VC_0, +;;;342 10, 0x40,0x04,0x00,0x00,0x00,0x00,0x3A,0x9B,0x74,0xB0); +;;;343 } +;;;344 else if (dcs_cmd == 0xFE) +;;;345 { +;;;346 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +000058 2710 MOVS r7,#0x10 +00005a 2efe CMP r6,#0xfe ;344 +00005c d078 BEQ |L2.336| +;;;347 DSI_ACK_DT_DSC_LONG_RESPONSE, +;;;348 DSI_VC_0, +;;;349 10, 0x30,0x08,0x00,0x31,0x00,0x00,0x00,0x00,0x00,0x10); +;;;350 } +;;;351 else if (dcs_cmd == 0x5A) +00005e 2e5a CMP r6,#0x5a +000060 d077 BEQ |L2.338| +;;;352 { +;;;353 static uint8_t flag_5a =0; +;;;354 if (flag_5a==0) +;;;355 { +;;;356 flag_5a =1; +;;;357 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;358 DSI_ACK_DT_DSC_LONG_RESPONSE, +;;;359 DSI_VC_0, +;;;360 41, 0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +;;;361 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00); +;;;362 } +;;;363 else +;;;364 { +;;;365 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;366 DSI_ACK_DT_DSC_LONG_RESPONSE, +;;;367 DSI_VC_0, +;;;368 41, 0x01,0x00,0x01,0x01,0x3B,0x01,0x3B,0x00,0x03,0x01,0x1F,0x00,0xE8,0x00,0xE7,0x00,0xEE,0x00,0x9D,0x00, +;;;369 0x85,0x00,0xAB,0x00,0x9D,0x00,0x85,0x00,0xAB,0x00,0x9D,0x00,0x85,0x00,0xAB,0x00,0x9D,0x00,0x85,0x00,0xAB); +;;;370 } +;;;371 } +;;;372 else if (dcs_cmd == 0xB5) +;;;373 { +;;;374 if (return_size == 76) +;;;375 { +;;;376 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +000062 2277 MOVS r2,#0x77 +000064 2eb5 CMP r6,#0xb5 ;372 +000066 d075 BEQ |L2.340| +;;;377 DSI_ACK_DT_DSC_LONG_RESPONSE, +;;;378 DSI_VC_0, +;;;379 return_size, +;;;380 0x19,0xDC,0x16,0x01,0x44,0x4C,0x7E,0x44,0xB0,0xE2,0x55,0x14,0x46,0x55,0x78,0xAA,0x56,0xDC,0x0E,0x66, +;;;381 0x40,0x72,0x66,0xA4,0xD6,0x77,0x08,0x3A,0x77,0x6C,0x9E,0x70,0xD0,0x01,0x02,0x03,0x04,0x05,0x06,0x07, +;;;382 0x08,0x09,0x0A,0x0B,0x0C,0x0D,0x0E,0x0F,0x10,0x11,0x12,0x13,0x14,0x14,0x14,0x14,0x14,0x14,0x14,0x14, +;;;383 0x01,0x22,0x33,0x44,0x00,0x00,0x06,0x66,0xBB,0x0B,0x01,0x11,0x11,0x10,0x15,0x04); +;;;384 } +;;;385 else if (return_size == 75) +;;;386 { +;;;387 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;388 DSI_ACK_DT_DSC_LONG_RESPONSE, +;;;389 DSI_VC_0, +;;;390 return_size, 0x19,0xDC,0x16,0x01,0x44,0x4C,0x7E,0x44,0xB0,0xE2,0x55,0x14,0x46,0x55,0x78,0xAA,0x56,0xDC,0x0E,0x66,0x40,0x72, +;;;391 0x66,0xA4,0xD6,0x77,0x08,0x3A,0x77,0x6C,0x9E,0x70,0xD0,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09,0x0A,0x0B,0x0C,0x0D,0x0E, +;;;392 0x0F,0x10,0x11,0x12,0x13,0x14,0x14,0x14,0x14,0x14,0x14,0x14,0x14,0x01,0x22,0x33,0x44,0x00,0x00,0x06,0x66,0xBB,0x0B,0x01,0x11,0x11,0x10,0x15); +;;;393 } +;;;394 else if (return_size == 23) +;;;395 { +;;;396 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;397 DSI_ACK_DT_DSC_LONG_RESPONSE, +;;;398 DSI_VC_0, +;;;399 23, 0x19,0xDC,0x16,0x01,0x44,0x4C,0x7E,0x44,0xB0,0xE2,0x55,0x14,0x46,0x55,0x78,0xAA,0x56,0xDC,0x0E,0x66,0x40,0x72,0x66); +;;;400 } +;;;401 else if (return_size == 2) +;;;402 { +;;;403 c8_read_flag =0x20; // C8B5棬־0x20 +;;;404 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;405 DSI_ACK_DT_DSC_SHORT_RESPONSE_2B, +;;;406 DSI_VC_0, +;;;407 //2, 0x15, 0x04); +;;;408 2, 0x13, 0x03); +;;;409 } +;;;410 else +;;;411 { +;;;412 TAU_LOGD("r[%x] [%d] err", dcs_cmd, return_size); +;;;413 } +;;;414 +;;;415 } +;;;416 else if (dcs_cmd == 0xC8) +000068 2ec8 CMP r6,#0xc8 +00006a d074 BEQ |L2.342| +;;;417 { +;;;418 if (return_size == 144) +;;;419 { +;;;420 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;421 DSI_ACK_DT_DSC_LONG_RESPONSE, +;;;422 DSI_VC_0, +;;;423 return_size, +;;;424 0x00,0x6A,0x20,0xAF,0x5C,0x5A,0x5D,0x5E,0x5C,0x5F,0x49,0x44,0x4B,0x4C,0x46,0x50,0x5C,0x56,0x5E,0x56,0x50, +;;;425 0x59,0x35,0x2F,0x3D,0x61,0x6A,0x66,0x66,0x74,0x6A,0x66,0x63,0x43,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +;;;426 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +;;;427 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +;;;428 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +;;;429 0x00,0x00,0x00,0x00,0x00,0x00,0x15,0xB1,0xB1,0xB0,0x7B,0x7A,0x7B,0x7A,0x79,0x7C,0x78,0x75,0x79,0x76,0x72, +;;;430 0x77,0x75,0x72,0x78,0x74,0x6C,0x76,0x68,0x58,0x6E,0x78,0x76,0x79,0x74,0x81,0x78,0x22,0x20); +;;;431 } +;;;432 else if (return_size == 34) +;;;433 { +;;;434 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;435 DSI_ACK_DT_DSC_LONG_RESPONSE, +;;;436 DSI_VC_0, +;;;437 return_size, +;;;438 0x00,0x6A,0x20,0xAF,0x5C,0x5A,0x5D,0x5E,0x5C,0x5F,0x49,0x44,0x4B,0x4C,0x46,0x50,0x5C,0x56,0x5E,0x56,0x50, +;;;439 0x59,0x35,0x2F,0x3D,0x61,0x6A,0x66,0x66,0x74,0x6A,0x66,0x63,0x43); +;;;440 } +;;;441 else if (return_size == 10) +;;;442 { +;;;443 if ((c8_read_flag&0xF0) ==0x10) // C9/B3 +;;;444 { +;;;445 if ((c8_read_flag&0x0F) ==0) +;;;446 { +;;;447 c8_read_flag |=0x01; +;;;448 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;449 DSI_ACK_DT_DSC_LONG_RESPONSE, +;;;450 DSI_VC_0, +;;;451 //10, 0x00,0x6A,0x20,0xAF,0x5C,0x5A,0x5D,0x5E,0x5C,0x5F); +;;;452 10, 0x00,0x6A,0x1A,0xB9,0x5D,0x5B,0x5D,0x5B,0x59,0x5C); +;;;453 +;;;454 } +;;;455 else if ((c8_read_flag&0x0F) ==1) +;;;456 { +;;;457 c8_read_flag |=0x02; +;;;458 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;459 DSI_ACK_DT_DSC_LONG_RESPONSE, +;;;460 DSI_VC_0, +;;;461 //10, 0x49,0x44,0x4B,0x4C,0x46,0x50,0x5C,0x56,0x5E,0x56); +;;;462 10, 0x4A,0x46,0x4C,0x4E,0x48,0x51,0x5B,0x56,0x5E,0x58); +;;;463 +;;;464 } +;;;465 else +;;;466 { +;;;467 c8_read_flag &= 0xF0; +;;;468 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;469 DSI_ACK_DT_DSC_LONG_RESPONSE, +;;;470 DSI_VC_0, +;;;471 //10, 0x50,0x59,0x35,0x2F,0x3D,0x61,0x6A,0x66,0x66,0x74); +;;;472 10, 0x51,0x5A,0x3C,0x35,0x41,0x5F,0x68,0x66,0x63,0x70); +;;;473 +;;;474 } +;;;475 } +;;;476 else // if ((c8_read_flag&0xF0) ==0x20) //B5 +;;;477 { +;;;478 if ((c8_read_flag&0x0F) ==0) +;;;479 { +;;;480 c8_read_flag |=0x01; +;;;481 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;482 DSI_ACK_DT_DSC_LONG_RESPONSE, +;;;483 DSI_VC_0, +;;;484 //10, 0x15,0xB1,0xB1,0xB0,0x7B,0x7A,0x7B,0x7A,0x79,0x7C); +;;;485 10, 0x15,0xB2,0xB2,0xB1,0x79,0x79,0x7A,0x7C,0x7A,0x7C); +;;;486 +;;;487 } +;;;488 else if ((c8_read_flag&0x0F) ==1) +;;;489 { +;;;490 c8_read_flag |=0x02; +;;;491 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;492 DSI_ACK_DT_DSC_LONG_RESPONSE, +;;;493 DSI_VC_0, +;;;494 //10, 0x78,0x75,0x79,0x76,0x72,0x77,0x75,0x72,0x78,0x74); +;;;495 10, 0x77,0x75,0x79,0x75,0x71,0x77,0x78,0x73,0x79,0x75); +;;;496 +;;;497 } +;;;498 else +;;;499 { +;;;500 c8_read_flag &= 0xF0; +;;;501 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;502 DSI_ACK_DT_DSC_LONG_RESPONSE, +;;;503 DSI_VC_0, +;;;504 //10, 0x6C,0x76,0x68,0x58,0x6E,0x78,0x76,0x79,0x74,0x81); +;;;505 10, 0x6E,0x77,0x65,0x59,0x6E,0x78,0x75,0x79,0x5A,0x69); +;;;506 +;;;507 } +;;;508 } +;;;509 +;;;510 } +;;;511 else if (return_size == 4) +;;;512 { +;;;513 c9_read_flag =0x10; // C9C8棬־0x10 +;;;514 +;;;515 if ((c8_read_flag&0xF0) ==0x10) +;;;516 { +;;;517 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;518 DSI_ACK_DT_DSC_LONG_RESPONSE, +;;;519 DSI_VC_0, +;;;520 //4, 0x6A,0x66,0x63,0x43); +;;;521 4, 0x68,0x66,0x63,0x43); +;;;522 +;;;523 } +;;;524 else +;;;525 { +;;;526 if (c9_read_flag2 >2) +;;;527 c8_read_flag =0x10; +;;;528 +;;;529 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;530 DSI_ACK_DT_DSC_LONG_RESPONSE, +;;;531 DSI_VC_0, +;;;532 //4, 0x78,0x22,0x20,0x00); +;;;533 4, 0x67,0x22,0x20,0x00); +;;;534 +;;;535 } +;;;536 } +;;;537 else +;;;538 { +;;;539 TAU_LOGD("r[%x] [%d] err", dcs_cmd, return_size); +;;;540 } +;;;541 // c8_read_flag =0x00|(c8_read_flag&0x0F); // C8C8棬־0x20 +;;;542 } +;;;543 else if (dcs_cmd == 0xC9) +00006c 2ec9 CMP r6,#0xc9 +00006e d073 BEQ |L2.344| +;;;544 { +;;;545 //ԭװеΪc9_read_flag=0X100X20ʱӦֵ +;;;546 if (return_size == 142) +;;;547 { +;;;548 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;549 DSI_ACK_DT_DSC_LONG_RESPONSE, +;;;550 DSI_VC_0, +;;;551 return_size, +;;;552 0x00,0x31,0x01,0x01,0x9E,0x41,0x33,0x54,0x53,0x31,0x53,0x30,0x39,0x30,0x31,0x38,0x42,0x42,0x32,0x32, +;;;553 0x35,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x15,0xAE,0xAE, +;;;554 0xAD,0x7B,0x7A,0x7C,0x7B,0x79,0x7B,0x77,0x76,0x79,0x77,0x73,0x77,0x77,0x75,0x79,0x76,0x73,0x78,0x73, +;;;555 0x72,0x76,0x82,0x83,0x7F,0x67,0x7B,0x6F,0x44,0x40,0x00,0x00,0x00,0x00,0x2A,0x0F,0x05,0x12,0x71,0x6E, +;;;556 0x73,0x75,0x74,0x76,0x70,0x6F,0x72,0x75,0x71,0x74,0x76,0x73,0x78,0x74,0x6D,0x75,0x69,0x5C,0x6F,0x7C, +;;;557 0x7E,0x7B,0x64,0x73,0x68,0x00,0x00,0x00,0x00,0x00,0x00,0x2A,0x12,0x08,0x16,0x70,0x6F,0x71,0x76,0x75, +;;;558 0x75,0x72,0x6F,0x74,0x72,0x6F,0x73,0x74,0x70,0x77,0x73,0x6B,0x75,0x62,0x4B,0x69,0x73,0x70,0x76,0x3E,0x5B,0x5A); +;;;559 } +;;;560 else if (return_size == 105) +;;;561 { +;;;562 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;563 DSI_ACK_DT_DSC_LONG_RESPONSE, +;;;564 DSI_VC_0, +;;;565 return_size, +;;;566 0x00,0x31,0x01,0x01,0x9E,0x41,0x33,0x54,0x53,0x31,0x53,0x30,0x39,0x30,0x31,0x38,0x42,0x42,0x32,0x32, +;;;567 0x35,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x15,0xAE,0xAE, +;;;568 0xAD,0x7B,0x7A,0x7C,0x7B,0x79,0x7B,0x77,0x76,0x79,0x77,0x73,0x77,0x77,0x75,0x79,0x76,0x73,0x78,0x73, +;;;569 0x72,0x76,0x82,0x83,0x7F,0x67,0x7B,0x6F,0x44,0x40,0x00,0x00,0x00,0x00,0x2A,0x0F,0x05,0x12,0x71,0x6E, +;;;570 0x73,0x75,0x74,0x76,0x70,0x6F,0x72,0x75,0x71,0x74,0x76,0x73,0x78,0x74,0x6D,0x75,0x69,0x5C,0x6F,0x7C,0x7E,0x7B,0x64,0x73,0x68); +;;;571 } +;;;572 else if (return_size == 70) +;;;573 { +;;;574 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;575 DSI_ACK_DT_DSC_LONG_RESPONSE, +;;;576 DSI_VC_0, +;;;577 return_size, +;;;578 0x00,0x31,0x01,0x01,0x9E,0x41,0x33,0x54,0x53,0x31,0x53,0x30,0x39,0x30,0x31,0x38,0x42,0x42,0x32,0x32, +;;;579 0x35,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x15,0xAE,0xAE, +;;;580 0xAD,0x7B,0x7A,0x7C,0x7B,0x79,0x7B,0x77,0x76,0x79,0x77,0x73,0x77,0x77,0x75,0x79,0x76,0x73,0x78,0x73, +;;;581 0x72,0x76,0x82,0x83,0x7F,0x67,0x7B,0x6F,0x44,0x40); +;;;582 } +;;;583 else if (return_size == 21) +;;;584 { +;;;585 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;586 DSI_ACK_DT_DSC_LONG_RESPONSE, +;;;587 DSI_VC_0, +;;;588 return_size, +;;;589 0x00,0x31,0x01,0x01,0x9E,0x41,0x33,0x54,0x53,0x31,0x53,0x30,0x39,0x30,0x31,0x38,0x42,0x42,0x32,0x32,0x35); +;;;590 } +;;;591 else if (return_size == 10) +;;;592 { +;;;593 if ((c9_read_flag&0xF0) ==0) +;;;594 { +;;;595 if ((c9_read_flag&0x0F) ==0) +;;;596 { +;;;597 c9_read_flag |=0x01; +;;;598 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;599 DSI_ACK_DT_DSC_LONG_RESPONSE, +;;;600 DSI_VC_0, +;;;601 //10, 0x31,0x01,0x01,0x9E,0x41,0x33,0x54,0x53,0x31,0x53); +;;;602 10, 0x40,0x01,0x01,0xA0,0x41,0x33,0x54,0x5A,0x31,0x53); +;;;603 +;;;604 } +;;;605 else +;;;606 { +;;;607 c9_read_flag &=0xF0; +;;;608 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;609 DSI_ACK_DT_DSC_LONG_RESPONSE, +;;;610 DSI_VC_0, +;;;611 //10, 0x30,0x39,0x30,0x31,0x38,0x42,0x42,0x32,0x32,0x35); +;;;612 10, 0x30,0x31,0x43,0x44,0x4E,0x42,0x45,0x30,0x36,0x39); +;;;613 +;;;614 } +;;;615 } +;;;616 else if ((c9_read_flag&0xF0) ==0x10) // C8 +;;;617 { +;;;618 if ((c9_read_flag&0x0F) ==0) +;;;619 { +;;;620 c9_read_flag &=0xF0; +;;;621 c9_read_flag |=0x01; +;;;622 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;623 DSI_ACK_DT_DSC_LONG_RESPONSE, +;;;624 DSI_VC_0, +;;;625 //10, 0x15,0xAE,0xAE,0xAD,0x7B,0x7A,0x7C,0x7B,0x79,0x7B); +;;;626 10, 0x15,0xAE,0xAF,0xAE,0x7B,0x7A,0x7B,0x7B,0x7A,0x7C); +;;;627 +;;;628 } +;;;629 else if ((c9_read_flag&0x0F) ==1) +;;;630 { +;;;631 c9_read_flag &=0xF0; +;;;632 c9_read_flag |=0x02; +;;;633 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;634 DSI_ACK_DT_DSC_LONG_RESPONSE, +;;;635 DSI_VC_0, +;;;636 //10, 0x77,0x76,0x79,0x77,0x73,0x77,0x77,0x75,0x79,0x76); +;;;637 10, 0x77,0x75,0x79,0x76,0x73,0x77,0x78,0x75,0x7A,0x77); +;;;638 +;;;639 } +;;;640 else +;;;641 { +;;;642 c9_read_flag &=0xF0; +;;;643 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;644 DSI_ACK_DT_DSC_LONG_RESPONSE, +;;;645 DSI_VC_0, +;;;646 //10, 0x73,0x78,0x73,0x72,0x76,0x82,0x83,0x7F,0x67,0x7B); +;;;647 10, 0x73,0x77,0x6D,0x6B,0x73,0x82,0x85,0x81,0x6A,0x78); +;;;648 +;;;649 } +;;;650 } +;;;651 else // if ((c9_read_flag&0xF0) ==0x20) //B3 +;;;652 { +;;;653 if ((c9_read_flag&0x0F) ==0) +;;;654 { +;;;655 c9_read_flag |=0x01; +;;;656 if (c9_read_flag2 >2) +;;;657 c9_read_flag2 =0; +;;;658 +;;;659 if (c9_read_flag2 >=2) +;;;660 { +;;;661 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;662 DSI_ACK_DT_DSC_LONG_RESPONSE, +;;;663 DSI_VC_0, +;;;664 //10, 0x2A,0x12,0x08,0x16,0x70,0x6F,0x71,0x76,0x75,0x75); +;;;665 10, 0x2A,0x1C,0x11,0x24,0x6E,0x6B,0x6F,0x76,0x76,0x77); +;;;666 +;;;667 } +;;;668 else +;;;669 { +;;;670 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;671 DSI_ACK_DT_DSC_LONG_RESPONSE, +;;;672 DSI_VC_0, +;;;673 //10, 0x2A,0x0F,0x05,0x12,0x71,0x6E,0x73,0x75,0x74,0x76); +;;;674 10, 0x2A,0x16,0x0B,0x1E,0x70,0x6E,0x72,0x78,0x78,0x78); +;;;675 +;;;676 } +;;;677 c9_read_flag2++; +;;;678 } +;;;679 else if ((c9_read_flag&0x0F) ==1) +;;;680 { +;;;681 c9_read_flag |=0x02; +;;;682 if (c9_read_flag2 >2) +;;;683 { +;;;684 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;685 DSI_ACK_DT_DSC_LONG_RESPONSE, +;;;686 DSI_VC_0, +;;;687 //10, 0x72,0x6F,0x74,0x72,0x6F,0x73,0x74,0x70,0x77,0x73); +;;;688 10, 0x71,0x6F,0x71,0x73,0x71,0x76,0x75,0x71,0x77,0x74); +;;;689 +;;;690 } +;;;691 else +;;;692 { +;;;693 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;694 DSI_ACK_DT_DSC_LONG_RESPONSE, +;;;695 DSI_VC_0, +;;;696 //10, 0x70,0x6F,0x72,0x75,0x71,0x74,0x76,0x73,0x78,0x74); +;;;697 10, 0x6F,0x6D,0x71,0x74,0x72,0x75,0x77,0x73,0x78,0x75); +;;;698 } +;;;699 } +;;;700 else +;;;701 { +;;;702 c9_read_flag &=0xF0; +;;;703 if (c9_read_flag2 >2) +;;;704 { +;;;705 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;706 DSI_ACK_DT_DSC_LONG_RESPONSE, +;;;707 DSI_VC_0, +;;;708 //10, 0x6B,0x75,0x62,0x4B,0x69,0x73,0x70,0x76,0x3E,0x5B); +;;;709 10, 0x6D,0x76,0x50,0x3C,0x5B,0x73,0x6C,0x74,0x40,0x52); +;;;710 +;;;711 } +;;;712 else +;;;713 { +;;;714 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;715 DSI_ACK_DT_DSC_LONG_RESPONSE, +;;;716 DSI_VC_0, +;;;717 //10, 0x6D,0x75,0x69,0x5C,0x6F,0x7C,0x7E,0x7B,0x64,0x73); +;;;718 10, 0x70,0x77,0x5A,0x52,0x63,0x7A,0x79,0x7A,0x5D,0x6F); +;;;719 } +;;;720 } +;;;721 } +;;;722 +;;;723 } +;;;724 else if (return_size == 4) +;;;725 { +;;;726 c8_read_flag =0x10; // C8C9(size=4)棬־0x10 +;;;727 +;;;728 c9_read_flag &=0xF0; +;;;729 if ((c9_read_flag&0xF0) ==0x10) +;;;730 { +;;;731 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;732 DSI_ACK_DT_DSC_LONG_RESPONSE, +;;;733 DSI_VC_0, +;;;734 //4, 0x6F,0x44,0x40,0x00); +;;;735 4, 0x6D,0x44,0x40,0x00); +;;;736 +;;;737 } +;;;738 else +;;;739 { +;;;740 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;741 DSI_ACK_DT_DSC_LONG_RESPONSE, +;;;742 DSI_VC_0, +;;;743 //4, 0x6F,0x44,0x40,0x00); +;;;744 4, 0x6D,0x44,0x40,0x00); +;;;745 } +;;;746 } +;;;747 else if (return_size == 1) +;;;748 { +;;;749 c8_read_flag =0x20; // C8C9(size=1)棬־0x20 +;;;750 +;;;751 if ((c9_read_flag&0xF0) ==0x20) +;;;752 { +;;;753 if (c9_read_flag2 >2) +;;;754 { +;;;755 if (c9_read_flag3) +;;;756 c9_read_flag3 =0; +;;;757 else +;;;758 c9_read_flag3 =1; +;;;759 +;;;760 if (c9_read_flag3) +;;;761 c8_read_flag =0x10; // C8Ϊ0x10 +;;;762 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;763 DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, +;;;764 DSI_VC_0, +;;;765 1, 0x58); //1, 0x5A); +;;;766 } +;;;767 else +;;;768 { +;;;769 c9_read_flag =0x10; // C9Ϊ0x10 +;;;770 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;771 DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, +;;;772 DSI_VC_0, +;;;773 1, 0x69); //1, 0x68); +;;;774 } +;;;775 } +;;;776 else +;;;777 { +;;;778 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;779 DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, +;;;780 DSI_VC_0, +;;;781 1, 0x51); +;;;782 } +;;;783 } +;;;784 else +;;;785 { +;;;786 TAU_LOGD("r[%x] [%d] err", dcs_cmd, return_size); +;;;787 } +;;;788 // c9_read_flag =0x00|(c9_read_flag&0x0F); // C9C9棬־0x20 +;;;789 } +;;;790 else if (dcs_cmd == 0xB3) +000070 2eb3 CMP r6,#0xb3 +000072 d072 BEQ |L2.346| + |L2.116| +000074 9100 STR r1,[sp,#0] ;262 +000076 e00f B |L2.152| + |L2.120| +000078 72a5 STRB r5,[r4,#0xa] ;193 +00007a 9300 STR r3,[sp,#0] ;194 +00007c 2301 MOVS r3,#1 ;194 +00007e 2200 MOVS r2,#0 ;194 +000080 2121 MOVS r1,#0x21 ;194 +000082 6aa0 LDR r0,[r4,#0x28] ;194 ; g_rx_ctrl_handle +000084 f7fffffe BL hal_dsi_rx_ctrl_send_ack_cmd +000088 71a5 STRB r5,[r4,#6] ;198 +00008a e00b B |L2.164| + |L2.140| +00008c 72a5 STRB r5,[r4,#0xa] ;202 +00008e 2021 MOVS r0,#0x21 ;203 +000090 e001 B |L2.150| + |L2.146| +000092 72a5 STRB r5,[r4,#0xa] ;211 +000094 2004 MOVS r0,#4 ;212 + |L2.150| +000096 9000 STR r0,[sp,#0] ;203 + |L2.152| +;;;791 { +;;;792 if (return_size == 39) +;;;793 { +;;;794 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;795 DSI_ACK_DT_DSC_LONG_RESPONSE, +;;;796 DSI_VC_0, +;;;797 return_size, +;;;798 0x21,0x00,0x50,0x00,0x28,0x2A,0x64,0x58,0x69,0x77,0x77,0x77,0x7B,0x7A,0x7B,0x7A,0x7A,0x7A,0x7F,0x7E, +;;;799 0x7D,0x7D,0x7E,0x7E,0x7D,0x7E,0x7F,0x7F,0x7A,0x80,0x7B,0x76,0x7A,0x54,0x6C,0x61,0x00,0x00,0x00); +;;;800 } +;;;801 else if (return_size == 10) +;;;802 { +;;;803 if (b3_read_flag ==0) +;;;804 { +;;;805 b3_read_flag =1; +;;;806 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;807 DSI_ACK_DT_DSC_LONG_RESPONSE, +;;;808 DSI_VC_0, +;;;809 //10, 0x2A,0x64,0x58,0x69,0x77,0x77,0x77,0x7B,0x7A,0x7B); +;;;810 10, 0x2A,0x6A,0x5F,0x73,0x76,0x74,0x77,0x7D,0x7E,0x7D); +;;;811 +;;;812 } +;;;813 else if (b3_read_flag ==1) +;;;814 { +;;;815 b3_read_flag =2; +;;;816 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;817 DSI_ACK_DT_DSC_LONG_RESPONSE, +;;;818 DSI_VC_0, +;;;819 //10, 0x7A,0x7A,0x7A,0x7F,0x7E,0x7D,0x7D,0x7E,0x7E,0x7D); +;;;820 10, 0x7A,0x7B,0x7A,0x7C,0x7D,0x7C,0x80,0x80,0x7F,0x7F); +;;;821 +;;;822 } +;;;823 else //if (b3_read_flag ==2) +;;;824 { +;;;825 b3_read_flag =0; +;;;826 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;827 DSI_ACK_DT_DSC_LONG_RESPONSE, +;;;828 DSI_VC_0, +;;;829 //10, 0x7E,0x7F,0x7F,0x7A,0x80,0x7B,0x76,0x7A,0x54,0x6C); +;;;830 10, 0x7E,0x80,0x6F,0x6C,0x72,0x7E,0x7A,0x7C,0x60,0x70); +;;;831 +;;;832 } +;;;833 +;;;834 } +;;;835 else if (return_size == 4) +;;;836 { +;;;837 c9_read_flag =0x20; // C9B3棬־0x20 +;;;838 c8_read_flag =0x10; // C8B3棬־0x10 +;;;839 +;;;840 b3_read_flag =0; +;;;841 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;842 DSI_ACK_DT_DSC_LONG_RESPONSE, +;;;843 DSI_VC_0, +;;;844 //4, 0x61,0x00,0x00,0x00); +;;;845 4, 0x6B,0x00,0x00,0x00); +;;;846 +;;;847 } +;;;848 else +;;;849 { +;;;850 TAU_LOGD("r[%x] [%d] err", dcs_cmd, return_size); +;;;851 } +;;;852 } +;;;853 else +;;;854 { +;;;855 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +000098 2301 MOVS r3,#1 +00009a 2200 MOVS r2,#0 +00009c 2121 MOVS r1,#0x21 +00009e 6aa0 LDR r0,[r4,#0x28] ; g_rx_ctrl_handle +0000a0 f7fffffe BL hal_dsi_rx_ctrl_send_ack_cmd + |L2.164| +;;;856 DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, +;;;857 DSI_VC_0, +;;;858 1, 0); +;;;859 TAU_LOGD("r[%x] [%d] err!!!!!!", dcs_cmd, return_size); +;;;860 } +;;;861 //TAU_LOGD("r %x\n",dcs_cmd); +;;;862 return true; +;;;863 #endif // USE_FOR_SUMSUNG_S20 +;;;864 +;;;865 } +0000a4 b07f ADD sp,sp,#0x1fc +0000a6 2001 MOVS r0,#1 ;862 +0000a8 b012 ADD sp,sp,#0x48 +0000aa bdf0 POP {r4-r7,pc} + |L2.172| +0000ac 4639 MOV r1,r7 ;220 +0000ae 6aa0 LDR r0,[r4,#0x28] ;220 ; g_rx_ctrl_handle +0000b0 f7fffffe BL ap_get_tp_calibration_status_01 +0000b4 e7f6 B |L2.164| + |L2.182| +0000b6 2003 MOVS r0,#3 ;224 +0000b8 9501 STR r5,[sp,#4] ;224 +0000ba 9300 STR r3,[sp,#0] ;224 +0000bc 9002 STR r0,[sp,#8] ;224 +0000be e006 B |L2.206| + |L2.192| +0000c0 2803 CMP r0,#3 ;231 +0000c2 d001 BEQ |L2.200| +0000c4 209f MOVS r0,#0x9f ;240 + |L2.198| +0000c6 e7e6 B |L2.150| + |L2.200| +0000c8 9200 STR r2,[sp,#0] ;233 +0000ca 9201 STR r2,[sp,#4] ;233 +0000cc 9202 STR r2,[sp,#8] ;233 + |L2.206| +0000ce 2303 MOVS r3,#3 ;233 +0000d0 2200 MOVS r2,#0 ;233 +0000d2 211c MOVS r1,#0x1c ;233 +0000d4 6aa0 LDR r0,[r4,#0x28] ;233 ; g_rx_ctrl_handle +0000d6 f7fffffe BL hal_dsi_rx_ctrl_send_ack_cmd +0000da e7e3 B |L2.164| + |L2.220| +0000dc 2080 MOVS r0,#0x80 ;248 +0000de e7da B |L2.150| + |L2.224| +0000e0 20c0 MOVS r0,#0xc0 ;255 +0000e2 e7d8 B |L2.150| + |L2.228| +0000e4 2290 MOVS r2,#0x90 ;285 +0000e6 21f2 MOVS r1,#0xf2 ;285 +0000e8 280b CMP r0,#0xb ;283 +0000ea d007 BEQ |L2.252| +0000ec 280a CMP r0,#0xa ;291 +0000ee d01d BEQ |L2.300| +0000f0 2804 CMP r0,#4 ;301 +0000f2 d033 BEQ |L2.348| +0000f4 2801 CMP r0,#1 ;309 +0000f6 d1d5 BNE |L2.164| +0000f8 2030 MOVS r0,#0x30 ;311 +0000fa e7cc B |L2.150| + |L2.252| +0000fc 200d MOVS r0,#0xd ;285 +0000fe 2320 MOVS r3,#0x20 ;285 +000100 9309 STR r3,[sp,#0x24] ;285 +000102 26bf MOVS r6,#0xbf ;285 +000104 9008 STR r0,[sp,#0x20] ;285 +000106 9006 STR r0,[sp,#0x18] ;285 +000108 960a STR r6,[sp,#0x28] ;285 +00010a 2317 MOVS r3,#0x17 ;285 +00010c 2505 MOVS r5,#5 ;285 +00010e 9305 STR r3,[sp,#0x14] ;285 +000110 9507 STR r5,[sp,#0x1c] ;285 +000112 9203 STR r2,[sp,#0xc] ;285 +000114 200c MOVS r0,#0xc ;285 +000116 230b MOVS r3,#0xb ;285 +000118 9101 STR r1,[sp,#4] ;285 +00011a 9704 STR r7,[sp,#0x10] ;285 +00011c 9300 STR r3,[sp,#0] ;285 +00011e 9002 STR r0,[sp,#8] ;285 +000120 2200 MOVS r2,#0 ;285 +000122 211c MOVS r1,#0x1c ;285 +000124 6aa0 LDR r0,[r4,#0x28] ;285 ; g_rx_ctrl_handle +000126 f7fffffe BL hal_dsi_rx_ctrl_send_ack_cmd +00012a e7bb B |L2.164| + |L2.300| +00012c 231a MOVS r3,#0x1a ;293 +00012e 2203 MOVS r2,#3 ;293 +000130 2115 MOVS r1,#0x15 ;293 +000132 2009 MOVS r0,#9 ;293 +000134 ad06 ADD r5,sp,#0x18 ;293 +000136 c50f STM r5!,{r0-r3} ;293 +000138 230d MOVS r3,#0xd ;293 +00013a 2293 MOVS r2,#0x93 ;293 +00013c 2191 MOVS r1,#0x91 ;293 +00013e 200c MOVS r0,#0xc ;293 +000140 ad02 ADD r5,sp,#8 ;293 +000142 c50f STM r5!,{r0-r3} ;293 +000144 21f6 MOVS r1,#0xf6 ;293 +000146 200b MOVS r0,#0xb ;293 +000148 e343 B |L2.2002| + |L2.330| +00014a e00e B |L2.362| + |L2.332| +00014c e017 B |L2.382| + |L2.334| +00014e e022 B |L2.406| + |L2.336| +000150 e030 B |L2.436| + |L2.338| +000152 e03c B |L2.462| + |L2.340| +000154 e09e B |L2.660| + |L2.342| +000156 e1f6 B |L2.1350| + |L2.344| +000158 e388 B |L2.2156| + |L2.346| +00015a e3fd B |L2.2392| + |L2.348| +00015c 200c MOVS r0,#0xc ;303 +00015e 230b MOVS r3,#0xb ;303 +000160 9300 STR r3,[sp,#0] ;303 +000162 9203 STR r2,[sp,#0xc] ;303 +000164 9101 STR r1,[sp,#4] ;303 +000166 9002 STR r0,[sp,#8] ;303 +000168 e37f B |L2.2154| + |L2.362| +00016a 22c2 MOVS r2,#0xc2 ;323 +00016c 2060 MOVS r0,#0x60 ;323 +00016e 2135 MOVS r1,#0x35 ;323 +000170 238a MOVS r3,#0x8a ;323 +000172 9700 STR r7,[sp,#0] ;323 +000174 9301 STR r3,[sp,#4] ;323 +000176 9204 STR r2,[sp,#0x10] ;323 +000178 9102 STR r1,[sp,#8] ;323 +00017a 9003 STR r0,[sp,#0xc] ;323 +00017c e004 B |L2.392| + |L2.382| +00017e 9101 STR r1,[sp,#4] ;332 +000180 9102 STR r1,[sp,#8] ;332 +000182 9103 STR r1,[sp,#0xc] ;332 +000184 9104 STR r1,[sp,#0x10] ;332 +000186 9100 STR r1,[sp,#0] ;332 + |L2.392| +000188 2305 MOVS r3,#5 ;332 +00018a 2200 MOVS r2,#0 ;332 +00018c 211c MOVS r1,#0x1c ;332 +00018e 6aa0 LDR r0,[r4,#0x28] ;332 ; g_rx_ctrl_handle +000190 f7fffffe BL hal_dsi_rx_ctrl_send_ack_cmd +000194 e786 B |L2.164| + |L2.406| +000196 20b0 MOVS r0,#0xb0 ;339 +000198 9104 STR r1,[sp,#0x10] ;339 +00019a 2274 MOVS r2,#0x74 ;339 +00019c 9103 STR r1,[sp,#0xc] ;339 +00019e 9009 STR r0,[sp,#0x24] ;339 +0001a0 233a MOVS r3,#0x3a ;339 +0001a2 9102 STR r1,[sp,#8] ;339 +0001a4 9208 STR r2,[sp,#0x20] ;339 +0001a6 ad05 ADD r5,sp,#0x14 ;339 +0001a8 c58a STM r5!,{r1,r3,r7} ;339 +0001aa 2004 MOVS r0,#4 ;339 +0001ac 2140 MOVS r1,#0x40 ;339 +0001ae e00c B |L2.458| + |L2.432| +0001b0 230a MOVS r3,#0xa ;293 +0001b2 e3fd B |L2.2480| + |L2.436| +0001b4 2031 MOVS r0,#0x31 ;346 +0001b6 9108 STR r1,[sp,#0x20] ;346 +0001b8 9107 STR r1,[sp,#0x1c] ;346 +0001ba 9104 STR r1,[sp,#0x10] ;346 +0001bc 9003 STR r0,[sp,#0xc] ;346 +0001be 9106 STR r1,[sp,#0x18] ;346 +0001c0 9102 STR r1,[sp,#8] ;346 +0001c2 9105 STR r1,[sp,#0x14] ;346 +0001c4 2008 MOVS r0,#8 ;346 +0001c6 9709 STR r7,[sp,#0x24] ;346 +0001c8 2130 MOVS r1,#0x30 ;346 + |L2.458| +0001ca 9100 STR r1,[sp,#0] ;339 +0001cc e3f1 B |L2.2482| + |L2.462| +0001ce 7d60 LDRB r0,[r4,#0x15] ;354 ; flag_5a +0001d0 2800 CMP r0,#0 ;354 +0001d2 d034 BEQ |L2.574| +0001d4 23ab MOVS r3,#0xab ;365 +0001d6 2085 MOVS r0,#0x85 ;365 +0001d8 ae26 ADD r6,sp,#0x98 ;365 +0001da 9125 STR r1,[sp,#0x94] ;365 +0001dc c60b STM r6!,{r0,r1,r3} ;365 +0001de 9123 STR r1,[sp,#0x8c] ;365 +0001e0 9224 STR r2,[sp,#0x90] ;365 +0001e2 911d STR r1,[sp,#0x74] ;365 +0001e4 921e STR r2,[sp,#0x78] ;365 +0001e6 9121 STR r1,[sp,#0x84] ;365 +0001e8 911f STR r1,[sp,#0x7c] ;365 +0001ea ae1a ADD r6,sp,#0x68 ;365 +0001ec 9322 STR r3,[sp,#0x88] ;365 +0001ee 9119 STR r1,[sp,#0x64] ;365 +0001f0 9020 STR r0,[sp,#0x80] ;365 +0001f2 c60b STM r6!,{r0,r1,r3} ;365 +0001f4 9117 STR r1,[sp,#0x5c] ;365 +0001f6 9014 STR r0,[sp,#0x50] ;365 +0001f8 9218 STR r2,[sp,#0x60] ;365 +0001fa 9212 STR r2,[sp,#0x48] ;365 +0001fc 9113 STR r1,[sp,#0x4c] ;365 +0001fe 22e7 MOVS r2,#0xe7 ;365 +000200 920e STR r2,[sp,#0x38] ;365 +000202 9115 STR r1,[sp,#0x54] ;365 +000204 20ee MOVS r0,#0xee ;365 +000206 910f STR r1,[sp,#0x3c] ;365 +000208 9010 STR r0,[sp,#0x40] ;365 +00020a 221f MOVS r2,#0x1f ;365 +00020c 9111 STR r1,[sp,#0x44] ;365 +00020e 920a STR r2,[sp,#0x28] ;365 +000210 9316 STR r3,[sp,#0x58] ;365 +000212 20e8 MOVS r0,#0xe8 ;365 +000214 900c STR r0,[sp,#0x30] ;365 +000216 2203 MOVS r2,#3 ;365 +000218 910d STR r1,[sp,#0x34] ;365 +00021a 9509 STR r5,[sp,#0x24] ;365 +00021c 910b STR r1,[sp,#0x2c] ;365 +00021e 203b MOVS r0,#0x3b ;365 +000220 ae06 ADD r6,sp,#0x18 ;365 +000222 9505 STR r5,[sp,#0x14] ;365 +000224 c607 STM r6!,{r0-r2} ;365 +000226 9502 STR r5,[sp,#8] ;365 +000228 9503 STR r5,[sp,#0xc] ;365 +00022a 9500 STR r5,[sp,#0] ;365 +00022c 9101 STR r1,[sp,#4] ;365 +00022e 9004 STR r0,[sp,#0x10] ;365 + |L2.560| +000230 2329 MOVS r3,#0x29 ;365 +000232 2200 MOVS r2,#0 ;365 +000234 211c MOVS r1,#0x1c ;365 +000236 6aa0 LDR r0,[r4,#0x28] ;365 ; g_rx_ctrl_handle +000238 f7fffffe BL hal_dsi_rx_ctrl_send_ack_cmd + |L2.572| +00023c e732 B |L2.164| + |L2.574| +00023e 7565 STRB r5,[r4,#0x15] ;356 +000240 9128 STR r1,[sp,#0xa0] ;357 +000242 9125 STR r1,[sp,#0x94] ;357 +000244 9126 STR r1,[sp,#0x98] ;357 +000246 9127 STR r1,[sp,#0x9c] ;357 +000248 9123 STR r1,[sp,#0x8c] ;357 +00024a 9124 STR r1,[sp,#0x90] ;357 +00024c 9121 STR r1,[sp,#0x84] ;357 +00024e 9122 STR r1,[sp,#0x88] ;357 +000250 911e STR r1,[sp,#0x78] ;357 +000252 911f STR r1,[sp,#0x7c] ;357 +000254 9120 STR r1,[sp,#0x80] ;357 +000256 911d STR r1,[sp,#0x74] ;357 +000258 9119 STR r1,[sp,#0x64] ;357 +00025a 911a STR r1,[sp,#0x68] ;357 +00025c 911b STR r1,[sp,#0x6c] ;357 +00025e 911c STR r1,[sp,#0x70] ;357 +000260 9115 STR r1,[sp,#0x54] ;357 +000262 9116 STR r1,[sp,#0x58] ;357 +000264 9117 STR r1,[sp,#0x5c] ;357 +000266 9118 STR r1,[sp,#0x60] ;357 +000268 9114 STR r1,[sp,#0x50] ;357 +00026a 9111 STR r1,[sp,#0x44] ;357 +00026c 9112 STR r1,[sp,#0x48] ;357 +00026e 9113 STR r1,[sp,#0x4c] ;357 +000270 910f STR r1,[sp,#0x3c] ;357 +000272 9110 STR r1,[sp,#0x40] ;357 +000274 910d STR r1,[sp,#0x34] ;357 +000276 910e STR r1,[sp,#0x38] ;357 +000278 910a STR r1,[sp,#0x28] ;357 +00027a 910b STR r1,[sp,#0x2c] ;357 +00027c 910c STR r1,[sp,#0x30] ;357 +00027e 9109 STR r1,[sp,#0x24] ;357 +000280 9105 STR r1,[sp,#0x14] ;357 +000282 9106 STR r1,[sp,#0x18] ;357 +000284 9107 STR r1,[sp,#0x1c] ;357 +000286 9508 STR r5,[sp,#0x20] ;357 +000288 9101 STR r1,[sp,#4] ;357 +00028a 9103 STR r1,[sp,#0xc] ;357 +00028c 9104 STR r1,[sp,#0x10] ;357 +00028e 9502 STR r5,[sp,#8] ;357 +000290 9100 STR r1,[sp,#0] ;357 +000292 e7cd B |L2.560| + |L2.660| +000294 284c CMP r0,#0x4c ;374 +000296 d012 BEQ |L2.702| +000298 284b CMP r0,#0x4b ;385 +00029a d07d BEQ |L2.920| +00029c 2817 CMP r0,#0x17 ;394 +00029e d07c BEQ |L2.922| +0002a0 2802 CMP r0,#2 ;401 +0002a2 d1cb BNE |L2.572| +0002a4 2020 MOVS r0,#0x20 ;403 +0002a6 7460 STRB r0,[r4,#0x11] ;403 +0002a8 2103 MOVS r1,#3 ;404 +0002aa 2013 MOVS r0,#0x13 ;404 +0002ac 9101 STR r1,[sp,#4] ;404 +0002ae 9000 STR r0,[sp,#0] ;404 +0002b0 2302 MOVS r3,#2 ;404 +0002b2 2200 MOVS r2,#0 ;404 +0002b4 2122 MOVS r1,#0x22 ;404 +0002b6 6aa0 LDR r0,[r4,#0x28] ;404 ; g_rx_ctrl_handle +0002b8 f7fffffe BL hal_dsi_rx_ctrl_send_ack_cmd + |L2.700| +0002bc e6f2 B |L2.164| + |L2.702| +0002be 2004 MOVS r0,#4 ;376 +0002c0 904b STR r0,[sp,#0x12c] ;376 +0002c2 2611 MOVS r6,#0x11 ;376 +0002c4 2315 MOVS r3,#0x15 ;376 +0002c6 4630 MOV r0,r6 ;376 +0002c8 934a STR r3,[sp,#0x128] ;376 +0002ca 9047 STR r0,[sp,#0x11c] ;376 +0002cc 9648 STR r6,[sp,#0x120] ;376 +0002ce 2301 MOVS r3,#1 ;376 +0002d0 9346 STR r3,[sp,#0x118] ;376 +0002d2 2066 MOVS r0,#0x66 ;376 +0002d4 9043 STR r0,[sp,#0x10c] ;376 +0002d6 9749 STR r7,[sp,#0x124] ;376 +0002d8 26bb MOVS r6,#0xbb ;376 +0002da 9644 STR r6,[sp,#0x110] ;376 +0002dc 2044 MOVS r0,#0x44 ;376 +0002de 903f STR r0,[sp,#0xfc] ;376 +0002e0 2014 MOVS r0,#0x14 ;376 +0002e2 250b MOVS r5,#0xb ;376 +0002e4 9545 STR r5,[sp,#0x114] ;376 +0002e6 9141 STR r1,[sp,#0x104] ;376 +0002e8 9140 STR r1,[sp,#0x100] ;376 +0002ea 2133 MOVS r1,#0x33 ;376 +0002ec 913e STR r1,[sp,#0xf8] ;376 +0002ee 2306 MOVS r3,#6 ;376 +0002f0 9342 STR r3,[sp,#0x108] ;376 +0002f2 903b STR r0,[sp,#0xec] ;376 +0002f4 2322 MOVS r3,#0x22 ;376 +0002f6 9036 STR r0,[sp,#0xd8] ;376 +0002f8 2111 MOVS r1,#0x11 ;376 +0002fa 933d STR r3,[sp,#0xf4] ;376 +0002fc 9131 STR r1,[sp,#0xc4] ;376 +0002fe 9038 STR r0,[sp,#0xe0] ;376 +000300 2313 MOVS r3,#0x13 ;376 +000302 2501 MOVS r5,#1 ;376 +000304 9333 STR r3,[sp,#0xcc] ;376 +000306 953c STR r5,[sp,#0xf0] ;376 +000308 230e MOVS r3,#0xe ;376 +00030a 2512 MOVS r5,#0x12 ;376 +00030c 932e STR r3,[sp,#0xb8] ;376 +00030e 9532 STR r5,[sp,#0xc8] ;376 +000310 9039 STR r0,[sp,#0xe4] ;376 +000312 903a STR r0,[sp,#0xe8] ;376 +000314 9034 STR r0,[sp,#0xd0] ;376 +000316 9035 STR r0,[sp,#0xd4] ;376 +000318 9037 STR r0,[sp,#0xdc] ;376 +00031a 210f MOVS r1,#0xf ;376 +00031c 250d MOVS r5,#0xd ;376 +00031e 260c MOVS r6,#0xc ;376 +000320 9730 STR r7,[sp,#0xc0] ;376 +000322 962c STR r6,[sp,#0xb0] ;376 +000324 952d STR r5,[sp,#0xb4] ;376 +000326 912f STR r1,[sp,#0xbc] ;376 +000328 230b MOVS r3,#0xb ;376 +00032a 250a MOVS r5,#0xa ;376 +00032c 2609 MOVS r6,#9 ;376 +00032e 952a STR r5,[sp,#0xa8] ;376 +000330 932b STR r3,[sp,#0xac] ;376 +000332 9629 STR r6,[sp,#0xa4] ;376 +000334 2506 MOVS r5,#6 ;376 +000336 2605 MOVS r6,#5 ;376 +000338 2307 MOVS r3,#7 ;376 +00033a 9625 STR r6,[sp,#0x94] ;376 +00033c 9526 STR r5,[sp,#0x98] ;376 +00033e 2108 MOVS r1,#8 ;376 +000340 2704 MOVS r7,#4 ;376 +000342 9327 STR r3,[sp,#0x9c] ;376 +000344 2601 MOVS r6,#1 ;376 +000346 9724 STR r7,[sp,#0x90] ;376 +000348 2303 MOVS r3,#3 ;376 +00034a 2502 MOVS r5,#2 ;376 +00034c 27d0 MOVS r7,#0xd0 ;376 +00034e 9128 STR r1,[sp,#0xa0] ;376 +000350 9720 STR r7,[sp,#0x80] ;376 +000352 9621 STR r6,[sp,#0x84] ;376 +000354 9323 STR r3,[sp,#0x8c] ;376 +000356 9522 STR r5,[sp,#0x88] ;376 +000358 2370 MOVS r3,#0x70 ;376 +00035a 259e MOVS r5,#0x9e ;376 +00035c 931f STR r3,[sp,#0x7c] ;376 +00035e 951e STR r5,[sp,#0x78] ;376 +000360 9219 STR r2,[sp,#0x64] ;376 +000362 266c MOVS r6,#0x6c ;376 +000364 233a MOVS r3,#0x3a ;376 +000366 961d STR r6,[sp,#0x74] ;376 +000368 25d6 MOVS r5,#0xd6 ;376 +00036a 931b STR r3,[sp,#0x6c] ;376 +00036c 921c STR r2,[sp,#0x70] ;376 +00036e 9518 STR r5,[sp,#0x60] ;376 +000370 911a STR r1,[sp,#0x68] ;376 +000372 2366 MOVS r3,#0x66 ;376 +000374 22a4 MOVS r2,#0xa4 ;376 +000376 2172 MOVS r1,#0x72 ;376 +000378 2540 MOVS r5,#0x40 ;376 +00037a 9217 STR r2,[sp,#0x5c] ;376 +00037c 9115 STR r1,[sp,#0x54] ;376 +00037e 9514 STR r5,[sp,#0x50] ;376 +000380 9316 STR r3,[sp,#0x58] ;376 +000382 461a MOV r2,r3 ;376 +000384 2556 MOVS r5,#0x56 ;376 +000386 230e MOVS r3,#0xe ;376 +000388 21dc MOVS r1,#0xdc ;376 +00038a 9510 STR r5,[sp,#0x40] ;376 +00038c 9312 STR r3,[sp,#0x48] ;376 +00038e 25aa MOVS r5,#0xaa ;376 +000390 9213 STR r2,[sp,#0x4c] ;376 +000392 9111 STR r1,[sp,#0x44] ;376 +000394 2378 MOVS r3,#0x78 ;376 +000396 e001 B |L2.924| + |L2.920| +000398 e01f B |L2.986| + |L2.922| +00039a e0a9 B |L2.1264| + |L2.924| +00039c 2646 MOVS r6,#0x46 ;376 +00039e 960c STR r6,[sp,#0x30] ;376 +0003a0 2255 MOVS r2,#0x55 ;376 +0003a2 ae0d ADD r6,sp,#0x34 ;376 +0003a4 c62c STM r6!,{r2,r3,r5} ;376 +0003a6 900b STR r0,[sp,#0x2c] ;376 +0003a8 23e2 MOVS r3,#0xe2 ;376 +0003aa 920a STR r2,[sp,#0x28] ;376 +0003ac 9309 STR r3,[sp,#0x24] ;376 +0003ae 227e MOVS r2,#0x7e ;376 +0003b0 2044 MOVS r0,#0x44 ;376 +0003b2 9206 STR r2,[sp,#0x18] ;376 +0003b4 25b0 MOVS r5,#0xb0 ;376 +0003b6 9508 STR r5,[sp,#0x20] ;376 +0003b8 234c MOVS r3,#0x4c ;376 +0003ba 9007 STR r0,[sp,#0x1c] ;376 +0003bc 9004 STR r0,[sp,#0x10] ;376 +0003be 9305 STR r3,[sp,#0x14] ;376 +0003c0 2219 MOVS r2,#0x19 ;376 +0003c2 2001 MOVS r0,#1 ;376 +0003c4 2516 MOVS r5,#0x16 ;376 +0003c6 9200 STR r2,[sp,#0] ;376 +0003c8 9101 STR r1,[sp,#4] ;376 +0003ca 9502 STR r5,[sp,#8] ;376 +0003cc 9003 STR r0,[sp,#0xc] ;376 +0003ce 2200 MOVS r2,#0 ;376 +0003d0 211c MOVS r1,#0x1c ;376 +0003d2 6aa0 LDR r0,[r4,#0x28] ;376 ; g_rx_ctrl_handle +0003d4 f7fffffe BL hal_dsi_rx_ctrl_send_ack_cmd +0003d8 e664 B |L2.164| + |L2.986| +0003da 2011 MOVS r0,#0x11 ;387 +0003dc 9048 STR r0,[sp,#0x120] ;387 +0003de 9047 STR r0,[sp,#0x11c] ;387 +0003e0 2315 MOVS r3,#0x15 ;387 +0003e2 2001 MOVS r0,#1 ;387 +0003e4 934a STR r3,[sp,#0x128] ;387 +0003e6 9046 STR r0,[sp,#0x118] ;387 +0003e8 230b MOVS r3,#0xb ;387 +0003ea 25bb MOVS r5,#0xbb ;387 +0003ec 2666 MOVS r6,#0x66 ;387 +0003ee 9345 STR r3,[sp,#0x114] ;387 +0003f0 2006 MOVS r0,#6 ;387 +0003f2 9749 STR r7,[sp,#0x124] ;387 +0003f4 9544 STR r5,[sp,#0x110] ;387 +0003f6 2344 MOVS r3,#0x44 ;387 +0003f8 9643 STR r6,[sp,#0x10c] ;387 +0003fa 9140 STR r1,[sp,#0x100] ;387 +0003fc 933f STR r3,[sp,#0xfc] ;387 +0003fe 9141 STR r1,[sp,#0x104] ;387 +000400 9042 STR r0,[sp,#0x108] ;387 +000402 e001 B |L2.1032| + |L2.1028| + DCD ||.data|| + |L2.1032| +000408 2014 MOVS r0,#0x14 ;387 +00040a 2133 MOVS r1,#0x33 ;387 +00040c 9039 STR r0,[sp,#0xe4] ;387 +00040e 2322 MOVS r3,#0x22 ;387 +000410 9038 STR r0,[sp,#0xe0] ;387 +000412 913e STR r1,[sp,#0xf8] ;387 +000414 933d STR r3,[sp,#0xf4] ;387 +000416 2501 MOVS r5,#1 ;387 +000418 9037 STR r0,[sp,#0xdc] ;387 +00041a 953c STR r5,[sp,#0xf0] ;387 +00041c 903b STR r0,[sp,#0xec] ;387 +00041e 2113 MOVS r1,#0x13 ;387 +000420 9036 STR r0,[sp,#0xd8] ;387 +000422 2311 MOVS r3,#0x11 ;387 +000424 9133 STR r1,[sp,#0xcc] ;387 +000426 9331 STR r3,[sp,#0xc4] ;387 +000428 2112 MOVS r1,#0x12 ;387 +00042a 9132 STR r1,[sp,#0xc8] ;387 +00042c 9034 STR r0,[sp,#0xd0] ;387 +00042e 250f MOVS r5,#0xf ;387 +000430 952f STR r5,[sp,#0xbc] ;387 +000432 903a STR r0,[sp,#0xe8] ;387 +000434 9035 STR r0,[sp,#0xd4] ;387 +000436 9730 STR r7,[sp,#0xc0] ;387 +000438 230d MOVS r3,#0xd ;387 +00043a 250c MOVS r5,#0xc ;387 +00043c 932d STR r3,[sp,#0xb4] ;387 +00043e 210e MOVS r1,#0xe ;387 +000440 952c STR r5,[sp,#0xb0] ;387 +000442 260b MOVS r6,#0xb ;387 +000444 912e STR r1,[sp,#0xb8] ;387 +000446 962b STR r6,[sp,#0xac] ;387 +000448 230a MOVS r3,#0xa ;387 +00044a 2509 MOVS r5,#9 ;387 +00044c 932a STR r3,[sp,#0xa8] ;387 +00044e 9529 STR r5,[sp,#0xa4] ;387 +000450 2607 MOVS r6,#7 ;387 +000452 9627 STR r6,[sp,#0x9c] ;387 +000454 2505 MOVS r5,#5 ;387 +000456 2604 MOVS r6,#4 ;387 +000458 9525 STR r5,[sp,#0x94] ;387 +00045a 2306 MOVS r3,#6 ;387 +00045c 9624 STR r6,[sp,#0x90] ;387 +00045e 9326 STR r3,[sp,#0x98] ;387 +000460 2108 MOVS r1,#8 ;387 +000462 26d0 MOVS r6,#0xd0 ;387 +000464 9128 STR r1,[sp,#0xa0] ;387 +000466 2703 MOVS r7,#3 ;387 +000468 9620 STR r6,[sp,#0x80] ;387 +00046a 9723 STR r7,[sp,#0x8c] ;387 +00046c 2302 MOVS r3,#2 ;387 +00046e 2501 MOVS r5,#1 ;387 +000470 263a MOVS r6,#0x3a ;387 +000472 2770 MOVS r7,#0x70 ;387 +000474 9521 STR r5,[sp,#0x84] ;387 +000476 9322 STR r3,[sp,#0x88] ;387 +000478 961b STR r6,[sp,#0x6c] ;387 +00047a 971f STR r7,[sp,#0x7c] ;387 +00047c 259e MOVS r5,#0x9e ;387 +00047e 236c MOVS r3,#0x6c ;387 +000480 ae1c ADD r6,sp,#0x70 ;387 +000482 c62c STM r6!,{r2,r3,r5} ;387 +000484 23d6 MOVS r3,#0xd6 ;387 +000486 9219 STR r2,[sp,#0x64] ;387 +000488 9318 STR r3,[sp,#0x60] ;387 +00048a 25a4 MOVS r5,#0xa4 ;387 +00048c 911a STR r1,[sp,#0x68] ;387 +00048e 2272 MOVS r2,#0x72 ;387 +000490 2340 MOVS r3,#0x40 ;387 +000492 2166 MOVS r1,#0x66 ;387 +000494 9517 STR r5,[sp,#0x5c] ;387 +000496 9113 STR r1,[sp,#0x4c] ;387 +000498 9314 STR r3,[sp,#0x50] ;387 +00049a 9215 STR r2,[sp,#0x54] ;387 +00049c 9116 STR r1,[sp,#0x58] ;387 +00049e 2556 MOVS r5,#0x56 ;387 +0004a0 23aa MOVS r3,#0xaa ;387 +0004a2 9510 STR r5,[sp,#0x40] ;387 +0004a4 930f STR r3,[sp,#0x3c] ;387 +0004a6 220e MOVS r2,#0xe ;387 +0004a8 9212 STR r2,[sp,#0x48] ;387 +0004aa 2378 MOVS r3,#0x78 ;387 +0004ac 2255 MOVS r2,#0x55 ;387 +0004ae 930e STR r3,[sp,#0x38] ;387 +0004b0 900b STR r0,[sp,#0x2c] ;387 +0004b2 21dc MOVS r1,#0xdc ;387 +0004b4 920d STR r2,[sp,#0x34] ;387 +0004b6 9111 STR r1,[sp,#0x44] ;387 +0004b8 2546 MOVS r5,#0x46 ;387 +0004ba 20e2 MOVS r0,#0xe2 ;387 +0004bc 950c STR r5,[sp,#0x30] ;387 +0004be 920a STR r2,[sp,#0x28] ;387 +0004c0 9009 STR r0,[sp,#0x24] ;387 +0004c2 23b0 MOVS r3,#0xb0 ;387 +0004c4 2544 MOVS r5,#0x44 ;387 +0004c6 9507 STR r5,[sp,#0x1c] ;387 +0004c8 9308 STR r3,[sp,#0x20] ;387 +0004ca 257e MOVS r5,#0x7e ;387 +0004cc 204c MOVS r0,#0x4c ;387 +0004ce 2244 MOVS r2,#0x44 ;387 +0004d0 2301 MOVS r3,#1 ;387 +0004d2 9506 STR r5,[sp,#0x18] ;387 +0004d4 9303 STR r3,[sp,#0xc] ;387 +0004d6 9204 STR r2,[sp,#0x10] ;387 +0004d8 9005 STR r0,[sp,#0x14] ;387 +0004da 2216 MOVS r2,#0x16 ;387 +0004dc 2019 MOVS r0,#0x19 ;387 +0004de 466d MOV r5,sp ;387 +0004e0 c507 STM r5!,{r0-r2} ;387 +0004e2 234b MOVS r3,#0x4b ;387 +0004e4 2200 MOVS r2,#0 ;387 +0004e6 211c MOVS r1,#0x1c ;387 +0004e8 6aa0 LDR r0,[r4,#0x28] ;387 ; g_rx_ctrl_handle +0004ea f7fffffe BL hal_dsi_rx_ctrl_send_ack_cmd + |L2.1262| +0004ee e5d9 B |L2.164| + |L2.1264| +0004f0 2266 MOVS r2,#0x66 ;396 +0004f2 2172 MOVS r1,#0x72 ;396 +0004f4 2040 MOVS r0,#0x40 ;396 +0004f6 ae14 ADD r6,sp,#0x50 ;396 +0004f8 9213 STR r2,[sp,#0x4c] ;396 +0004fa c607 STM r6!,{r0-r2} ;396 +0004fc 22aa MOVS r2,#0xaa ;396 +0004fe 920f STR r2,[sp,#0x3c] ;396 +000500 230e MOVS r3,#0xe ;396 +000502 21dc MOVS r1,#0xdc ;396 +000504 2056 MOVS r0,#0x56 ;396 +000506 ae10 ADD r6,sp,#0x40 ;396 +000508 c60b STM r6!,{r0,r1,r3} ;396 +00050a 2078 MOVS r0,#0x78 ;396 +00050c 2255 MOVS r2,#0x55 ;396 +00050e 2646 MOVS r6,#0x46 ;396 +000510 2314 MOVS r3,#0x14 ;396 +000512 900e STR r0,[sp,#0x38] ;396 +000514 960c STR r6,[sp,#0x30] ;396 +000516 930b STR r3,[sp,#0x2c] ;396 +000518 920d STR r2,[sp,#0x34] ;396 +00051a 23e2 MOVS r3,#0xe2 ;396 +00051c 26b0 MOVS r6,#0xb0 ;396 +00051e 2044 MOVS r0,#0x44 ;396 +000520 9309 STR r3,[sp,#0x24] ;396 +000522 920a STR r2,[sp,#0x28] ;396 +000524 9608 STR r6,[sp,#0x20] ;396 +000526 9007 STR r0,[sp,#0x1c] ;396 +000528 237e MOVS r3,#0x7e ;396 +00052a 224c MOVS r2,#0x4c ;396 +00052c af04 ADD r7,sp,#0x10 ;396 +00052e c70d STM r7!,{r0,r2,r3} ;396 +000530 2216 MOVS r2,#0x16 ;396 +000532 2019 MOVS r0,#0x19 ;396 +000534 466f MOV r7,sp ;396 +000536 c727 STM r7!,{r0-r2,r5} ;396 +000538 2317 MOVS r3,#0x17 ;396 +00053a 2200 MOVS r2,#0 ;396 +00053c 211c MOVS r1,#0x1c ;396 +00053e 6aa0 LDR r0,[r4,#0x28] ;396 ; g_rx_ctrl_handle +000540 f7fffffe BL hal_dsi_rx_ctrl_send_ack_cmd + |L2.1348| +000544 e5ae B |L2.164| + |L2.1350| +000546 2890 CMP r0,#0x90 ;418 +000548 d012 BEQ |L2.1392| +00054a 2822 CMP r0,#0x22 ;432 +00054c d07e BEQ |L2.1612| +00054e 280a CMP r0,#0xa ;441 +000550 d07d BEQ |L2.1614| +000552 2804 CMP r0,#4 ;511 +000554 d1cb BNE |L2.1262| +000556 74a7 STRB r7,[r4,#0x12] ;513 +000558 7c60 LDRB r0,[r4,#0x11] ;515 ; c8_read_flag +00055a 0900 LSRS r0,r0,#4 ;515 +00055c 2801 CMP r0,#1 ;515 +00055e d077 BEQ |L2.1616| +000560 7ce0 LDRB r0,[r4,#0x13] ;526 ; c9_read_flag2 +000562 2802 CMP r0,#2 ;526 +000564 d900 BLS |L2.1384| +000566 7467 STRB r7,[r4,#0x11] ;527 + |L2.1384| +000568 2020 MOVS r0,#0x20 ;529 +00056a 2222 MOVS r2,#0x22 ;529 +00056c 2367 MOVS r3,#0x67 ;529 +00056e e3fd B |L2.3436| + |L2.1392| +000570 2622 MOVS r6,#0x22 ;420 +000572 2578 MOVS r5,#0x78 ;420 +000574 af8c ADD r7,sp,#0x230 ;420 +000576 c768 STM r7!,{r3,r5,r6} ;420 +000578 2020 MOVS r0,#0x20 ;420 +00057a 908f STR r0,[sp,#0x23c] ;420 +00057c 2074 MOVS r0,#0x74 ;420 +00057e 2379 MOVS r3,#0x79 ;420 +000580 938a STR r3,[sp,#0x228] ;420 +000582 9588 STR r5,[sp,#0x220] ;420 +000584 908b STR r0,[sp,#0x22c] ;420 +000586 2558 MOVS r5,#0x58 ;420 +000588 9586 STR r5,[sp,#0x218] ;420 +00058a 2668 MOVS r6,#0x68 ;420 +00058c 9685 STR r6,[sp,#0x214] ;420 +00058e 236e MOVS r3,#0x6e ;420 +000590 256c MOVS r5,#0x6c ;420 +000592 9387 STR r3,[sp,#0x21c] ;420 +000594 9583 STR r5,[sp,#0x20c] ;420 +000596 2776 MOVS r7,#0x76 ;420 +000598 2372 MOVS r3,#0x72 ;420 +00059a 9789 STR r7,[sp,#0x224] ;420 +00059c 9380 STR r3,[sp,#0x200] ;420 +00059e 927e STR r2,[sp,#0x1f8] ;420 +0005a0 9784 STR r7,[sp,#0x210] ;420 +0005a2 2678 MOVS r6,#0x78 ;420 +0005a4 9082 STR r0,[sp,#0x208] ;420 +0005a6 2575 MOVS r5,#0x75 ;420 +0005a8 937d STR r3,[sp,#0x1f4] ;420 +0005aa 957f STR r5,[sp,#0x1fc] ;420 +0005ac 2279 MOVS r2,#0x79 ;420 +0005ae 237c MOVS r3,#0x7c ;420 +0005b0 9681 STR r6,[sp,#0x204] ;420 +0005b2 957a STR r5,[sp,#0x1e8] ;420 +0005b4 9378 STR r3,[sp,#0x1e0] ;420 +0005b6 977c STR r7,[sp,#0x1f0] ;420 +0005b8 9679 STR r6,[sp,#0x1e4] ;420 +0005ba 927b STR r2,[sp,#0x1ec] ;420 +0005bc 4615 MOV r5,r2 ;420 +0005be 237a MOVS r3,#0x7a ;420 +0005c0 227b MOVS r2,#0x7b ;420 +0005c2 af75 ADD r7,sp,#0x1d4 ;420 +0005c4 9374 STR r3,[sp,#0x1d0] ;420 +0005c6 c72c STM r7!,{r2,r3,r5} ;420 +0005c8 23b1 MOVS r3,#0xb1 ;420 +0005ca 25b0 MOVS r5,#0xb0 ;420 +0005cc 9572 STR r5,[sp,#0x1c8] ;420 +0005ce 9273 STR r2,[sp,#0x1cc] ;420 +0005d0 9371 STR r3,[sp,#0x1c4] ;420 +0005d2 916d STR r1,[sp,#0x1b4] ;420 +0005d4 9370 STR r3,[sp,#0x1c0] ;420 +0005d6 916c STR r1,[sp,#0x1b0] ;420 +0005d8 916e STR r1,[sp,#0x1b8] ;420 +0005da 9168 STR r1,[sp,#0x1a0] ;420 +0005dc 9169 STR r1,[sp,#0x1a4] ;420 +0005de 916a STR r1,[sp,#0x1a8] ;420 +0005e0 916b STR r1,[sp,#0x1ac] ;420 +0005e2 9167 STR r1,[sp,#0x19c] ;420 +0005e4 9163 STR r1,[sp,#0x18c] ;420 +0005e6 9164 STR r1,[sp,#0x190] ;420 +0005e8 9165 STR r1,[sp,#0x194] ;420 +0005ea 9166 STR r1,[sp,#0x198] ;420 +0005ec 9162 STR r1,[sp,#0x188] ;420 +0005ee 915e STR r1,[sp,#0x178] ;420 +0005f0 9160 STR r1,[sp,#0x180] ;420 +0005f2 9161 STR r1,[sp,#0x184] ;420 +0005f4 915d STR r1,[sp,#0x174] ;420 +0005f6 915f STR r1,[sp,#0x17c] ;420 +0005f8 9159 STR r1,[sp,#0x164] ;420 +0005fa 2215 MOVS r2,#0x15 ;420 +0005fc 915c STR r1,[sp,#0x170] ;420 +0005fe 9158 STR r1,[sp,#0x160] ;420 +000600 915a STR r1,[sp,#0x168] ;420 +000602 915b STR r1,[sp,#0x16c] ;420 +000604 9154 STR r1,[sp,#0x150] ;420 +000606 9157 STR r1,[sp,#0x15c] ;420 +000608 9156 STR r1,[sp,#0x158] ;420 +00060a 9152 STR r1,[sp,#0x148] ;420 +00060c 9153 STR r1,[sp,#0x14c] ;420 +00060e 9155 STR r1,[sp,#0x154] ;420 +000610 9151 STR r1,[sp,#0x144] ;420 +000612 914d STR r1,[sp,#0x134] ;420 +000614 914e STR r1,[sp,#0x138] ;420 +000616 914f STR r1,[sp,#0x13c] ;420 +000618 9150 STR r1,[sp,#0x140] ;420 +00061a 914c STR r1,[sp,#0x130] ;420 +00061c 9148 STR r1,[sp,#0x120] ;420 +00061e 9149 STR r1,[sp,#0x124] ;420 +000620 914a STR r1,[sp,#0x128] ;420 +000622 914b STR r1,[sp,#0x12c] ;420 +000624 9144 STR r1,[sp,#0x110] ;420 +000626 9145 STR r1,[sp,#0x114] ;420 +000628 9147 STR r1,[sp,#0x11c] ;420 +00062a 9143 STR r1,[sp,#0x10c] ;420 +00062c 9146 STR r1,[sp,#0x118] ;420 +00062e 9140 STR r1,[sp,#0x100] ;420 +000630 9142 STR r1,[sp,#0x108] ;420 +000632 913e STR r1,[sp,#0xf8] ;420 +000634 913f STR r1,[sp,#0xfc] ;420 +000636 9141 STR r1,[sp,#0x104] ;420 +000638 913d STR r1,[sp,#0xf4] ;420 +00063a 9139 STR r1,[sp,#0xe4] ;420 +00063c 913a STR r1,[sp,#0xe8] ;420 +00063e 913b STR r1,[sp,#0xec] ;420 +000640 913c STR r1,[sp,#0xf0] ;420 +000642 9138 STR r1,[sp,#0xe0] ;420 +000644 9134 STR r1,[sp,#0xd0] ;420 +000646 9135 STR r1,[sp,#0xd4] ;420 +000648 9136 STR r1,[sp,#0xd8] ;420 +00064a e002 B |L2.1618| + |L2.1612| +00064c e054 B |L2.1784| + |L2.1614| +00064e e091 B |L2.1908| + |L2.1616| +000650 e105 B |L2.2142| + |L2.1618| +000652 9133 STR r1,[sp,#0xcc] ;420 +000654 912e STR r1,[sp,#0xb8] ;420 +000656 9129 STR r1,[sp,#0xa4] ;420 +000658 9130 STR r1,[sp,#0xc0] ;420 +00065a 9124 STR r1,[sp,#0x90] ;420 +00065c 912b STR r1,[sp,#0xac] ;420 +00065e 926f STR r2,[sp,#0x1bc] ;420 +000660 9126 STR r1,[sp,#0x98] ;420 +000662 2243 MOVS r2,#0x43 ;420 +000664 912f STR r1,[sp,#0xbc] ;420 +000666 9221 STR r2,[sp,#0x84] ;420 +000668 912a STR r1,[sp,#0xa8] ;420 +00066a 2266 MOVS r2,#0x66 ;420 +00066c 9131 STR r1,[sp,#0xc4] ;420 +00066e 9125 STR r1,[sp,#0x94] ;420 +000670 2363 MOVS r3,#0x63 ;420 +000672 9137 STR r1,[sp,#0xdc] ;420 +000674 912c STR r1,[sp,#0xb0] ;420 +000676 9320 STR r3,[sp,#0x80] ;420 +000678 9132 STR r1,[sp,#0xc8] ;420 +00067a 9127 STR r1,[sp,#0x9c] ;420 +00067c 276a MOVS r7,#0x6a ;420 +00067e 912d STR r1,[sp,#0xb4] ;420 +000680 9122 STR r1,[sp,#0x88] ;420 +000682 253d MOVS r5,#0x3d ;420 +000684 9128 STR r1,[sp,#0xa0] ;420 +000686 9518 STR r5,[sp,#0x60] ;420 +000688 9123 STR r1,[sp,#0x8c] ;420 +00068a 2361 MOVS r3,#0x61 ;420 +00068c 971e STR r7,[sp,#0x78] ;420 +00068e 921f STR r2,[sp,#0x7c] ;420 +000690 921c STR r2,[sp,#0x70] ;420 +000692 9319 STR r3,[sp,#0x64] ;420 +000694 921b STR r2,[sp,#0x6c] ;420 +000696 901d STR r0,[sp,#0x74] ;420 +000698 971a STR r7,[sp,#0x68] ;420 +00069a 232f MOVS r3,#0x2f ;420 +00069c 2535 MOVS r5,#0x35 ;420 +00069e 2059 MOVS r0,#0x59 ;420 +0006a0 2250 MOVS r2,#0x50 ;420 +0006a2 9516 STR r5,[sp,#0x58] ;420 +0006a4 9317 STR r3,[sp,#0x5c] ;420 +0006a6 9015 STR r0,[sp,#0x54] ;420 +0006a8 9214 STR r2,[sp,#0x50] ;420 +0006aa 2356 MOVS r3,#0x56 ;420 +0006ac 255e MOVS r5,#0x5e ;420 +0006ae 205c MOVS r0,#0x5c ;420 +0006b0 ae10 ADD r6,sp,#0x40 ;420 +0006b2 c629 STM r6!,{r0,r3,r5} ;420 +0006b4 9313 STR r3,[sp,#0x4c] ;420 +0006b6 234c MOVS r3,#0x4c ;420 +0006b8 920f STR r2,[sp,#0x3c] ;420 +0006ba 2646 MOVS r6,#0x46 ;420 +0006bc 254b MOVS r5,#0x4b ;420 +0006be 930d STR r3,[sp,#0x34] ;420 +0006c0 960e STR r6,[sp,#0x38] ;420 +0006c2 950c STR r5,[sp,#0x30] ;420 +0006c4 2244 MOVS r2,#0x44 ;420 +0006c6 2349 MOVS r3,#0x49 ;420 +0006c8 255f MOVS r5,#0x5f ;420 +0006ca 9509 STR r5,[sp,#0x24] ;420 +0006cc 930a STR r3,[sp,#0x28] ;420 +0006ce 920b STR r2,[sp,#0x2c] ;420 +0006d0 9008 STR r0,[sp,#0x20] ;420 +0006d2 255d MOVS r5,#0x5d ;420 +0006d4 235a MOVS r3,#0x5a ;420 +0006d6 ae04 ADD r6,sp,#0x10 ;420 +0006d8 c629 STM r6!,{r0,r3,r5} ;420 +0006da 225e MOVS r2,#0x5e ;420 +0006dc 23af MOVS r3,#0xaf ;420 +0006de 9207 STR r2,[sp,#0x1c] ;420 +0006e0 2020 MOVS r0,#0x20 ;420 +0006e2 9701 STR r7,[sp,#4] ;420 +0006e4 9303 STR r3,[sp,#0xc] ;420 +0006e6 9100 STR r1,[sp,#0] ;420 +0006e8 9002 STR r0,[sp,#8] ;420 +0006ea 2390 MOVS r3,#0x90 ;420 +0006ec 2200 MOVS r2,#0 ;420 +0006ee 211c MOVS r1,#0x1c ;420 +0006f0 6aa0 LDR r0,[r4,#0x28] ;420 ; g_rx_ctrl_handle +0006f2 f7fffffe BL hal_dsi_rx_ctrl_send_ack_cmd + |L2.1782| +0006f6 e4d5 B |L2.164| + |L2.1784| +0006f8 2563 MOVS r5,#0x63 ;434 +0006fa 2066 MOVS r0,#0x66 ;434 +0006fc 2343 MOVS r3,#0x43 ;434 +0006fe 9520 STR r5,[sp,#0x80] ;434 +000700 276a MOVS r7,#0x6a ;434 +000702 901f STR r0,[sp,#0x7c] ;434 +000704 9321 STR r3,[sp,#0x84] ;434 +000706 2274 MOVS r2,#0x74 ;434 +000708 ae1c ADD r6,sp,#0x70 ;434 +00070a 971a STR r7,[sp,#0x68] ;434 +00070c 901b STR r0,[sp,#0x6c] ;434 +00070e c685 STM r6!,{r0,r2,r7} ;434 +000710 2561 MOVS r5,#0x61 ;434 +000712 233d MOVS r3,#0x3d ;434 +000714 222f MOVS r2,#0x2f ;434 +000716 2035 MOVS r0,#0x35 ;434 +000718 ae16 ADD r6,sp,#0x58 ;434 +00071a c62d STM r6!,{r0,r2,r3,r5} ;434 +00071c 235e MOVS r3,#0x5e ;434 +00071e 9312 STR r3,[sp,#0x48] ;434 +000720 2559 MOVS r5,#0x59 ;434 +000722 2250 MOVS r2,#0x50 ;434 +000724 2056 MOVS r0,#0x56 ;434 +000726 ae13 ADD r6,sp,#0x4c ;434 +000728 c625 STM r6!,{r0,r2,r5} ;434 +00072a 9011 STR r0,[sp,#0x44] ;434 +00072c 920f STR r2,[sp,#0x3c] ;434 +00072e 224b MOVS r2,#0x4b ;434 +000730 920c STR r2,[sp,#0x30] ;434 +000732 204c MOVS r0,#0x4c ;434 +000734 2546 MOVS r5,#0x46 ;434 +000736 900d STR r0,[sp,#0x34] ;434 +000738 950e STR r5,[sp,#0x38] ;434 +00073a 235c MOVS r3,#0x5c ;434 +00073c 205e MOVS r0,#0x5e ;434 +00073e 2649 MOVS r6,#0x49 ;434 +000740 9007 STR r0,[sp,#0x1c] ;434 +000742 9310 STR r3,[sp,#0x40] ;434 +000744 960a STR r6,[sp,#0x28] ;434 +000746 205a MOVS r0,#0x5a ;434 +000748 2544 MOVS r5,#0x44 ;434 +00074a 225f MOVS r2,#0x5f ;434 +00074c 9005 STR r0,[sp,#0x14] ;434 +00074e 950b STR r5,[sp,#0x2c] ;434 +000750 9209 STR r2,[sp,#0x24] ;434 +000752 255d MOVS r5,#0x5d ;434 +000754 9506 STR r5,[sp,#0x18] ;434 +000756 9308 STR r3,[sp,#0x20] ;434 +000758 9304 STR r3,[sp,#0x10] ;434 +00075a 4638 MOV r0,r7 ;434 +00075c 9100 STR r1,[sp,#0] ;434 +00075e 25af MOVS r5,#0xaf ;434 +000760 2220 MOVS r2,#0x20 ;434 +000762 af01 ADD r7,sp,#4 ;434 +000764 c725 STM r7!,{r0,r2,r5} ;434 +000766 2322 MOVS r3,#0x22 ;434 +000768 2200 MOVS r2,#0 ;434 +00076a 211c MOVS r1,#0x1c ;434 +00076c 6aa0 LDR r0,[r4,#0x28] ;434 ; g_rx_ctrl_handle +00076e f7fffffe BL hal_dsi_rx_ctrl_send_ack_cmd + |L2.1906| +000772 e497 B |L2.164| + |L2.1908| +000774 7c60 LDRB r0,[r4,#0x11] ;443 ; c8_read_flag +000776 0903 LSRS r3,r0,#4 ;443 +000778 2b01 CMP r3,#1 ;443 +00077a d013 BEQ |L2.1956| +00077c 0701 LSLS r1,r0,#28 ;478 +00077e d04d BEQ |L2.2076| +000780 0701 LSLS r1,r0,#28 ;488 +000782 0f09 LSRS r1,r1,#28 ;488 +000784 2901 CMP r1,#1 ;488 +000786 d05a BEQ |L2.2110| +000788 0900 LSRS r0,r0,#4 ;500 +00078a 0100 LSLS r0,r0,#4 ;500 +00078c 7460 STRB r0,[r4,#0x11] ;500 +00078e 2569 MOVS r5,#0x69 ;501 +000790 235a MOVS r3,#0x5a ;501 +000792 2179 MOVS r1,#0x79 ;501 +000794 2075 MOVS r0,#0x75 ;501 +000796 ae06 ADD r6,sp,#0x18 ;501 +000798 c62b STM r6!,{r0,r1,r3,r5} ;501 +00079a 2178 MOVS r1,#0x78 ;501 +00079c 206e MOVS r0,#0x6e ;501 +00079e 2359 MOVS r3,#0x59 ;501 +0007a0 2565 MOVS r5,#0x65 ;501 +0007a2 e313 B |L2.3532| + |L2.1956| +0007a4 0702 LSLS r2,r0,#28 ;445 +0007a6 d015 BEQ |L2.2004| +0007a8 0701 LSLS r1,r0,#28 ;455 +0007aa 0f09 LSRS r1,r1,#28 ;455 +0007ac 2901 CMP r1,#1 ;455 +0007ae d023 BEQ |L2.2040| +0007b0 0900 LSRS r0,r0,#4 ;467 +0007b2 0100 LSLS r0,r0,#4 ;467 +0007b4 7460 STRB r0,[r4,#0x11] ;467 +0007b6 2370 MOVS r3,#0x70 ;468 +0007b8 2263 MOVS r2,#0x63 ;468 +0007ba 2166 MOVS r1,#0x66 ;468 +0007bc 2068 MOVS r0,#0x68 ;468 +0007be ad06 ADD r5,sp,#0x18 ;468 +0007c0 c50f STM r5!,{r0-r3} ;468 +0007c2 235f MOVS r3,#0x5f ;468 +0007c4 2241 MOVS r2,#0x41 ;468 +0007c6 2135 MOVS r1,#0x35 ;468 +0007c8 203c MOVS r0,#0x3c ;468 +0007ca ad02 ADD r5,sp,#8 ;468 +0007cc c50f STM r5!,{r0-r3} ;468 +0007ce 215a MOVS r1,#0x5a ;468 +0007d0 2051 MOVS r0,#0x51 ;468 + |L2.2002| +0007d2 e2b9 B |L2.3400| + |L2.2004| +0007d4 4328 ORRS r0,r0,r5 ;447 +0007d6 7460 STRB r0,[r4,#0x11] ;447 +0007d8 225d MOVS r2,#0x5d ;448 +0007da 255c MOVS r5,#0x5c ;448 +0007dc 2359 MOVS r3,#0x59 ;448 +0007de 205b MOVS r0,#0x5b ;448 +0007e0 ae07 ADD r6,sp,#0x1c ;448 +0007e2 9206 STR r2,[sp,#0x18] ;448 +0007e4 c629 STM r6!,{r0,r3,r5} ;448 +0007e6 9005 STR r0,[sp,#0x14] ;448 +0007e8 25b9 MOVS r5,#0xb9 ;448 +0007ea 231a MOVS r3,#0x1a ;448 +0007ec 9204 STR r2,[sp,#0x10] ;448 +0007ee 206a MOVS r0,#0x6a ;448 +0007f0 ae01 ADD r6,sp,#4 ;448 +0007f2 9100 STR r1,[sp,#0] ;448 +0007f4 c629 STM r6!,{r0,r3,r5} ;448 + |L2.2038| +0007f6 e4db B |L2.432| + |L2.2040| +0007f8 2102 MOVS r1,#2 ;457 +0007fa 4308 ORRS r0,r0,r1 ;457 +0007fc 7460 STRB r0,[r4,#0x11] ;457 +0007fe 2358 MOVS r3,#0x58 ;458 +000800 225e MOVS r2,#0x5e ;458 +000802 2156 MOVS r1,#0x56 ;458 +000804 205b MOVS r0,#0x5b ;458 +000806 ad06 ADD r5,sp,#0x18 ;458 +000808 c50f STM r5!,{r0-r3} ;458 +00080a 2351 MOVS r3,#0x51 ;458 +00080c 2248 MOVS r2,#0x48 ;458 +00080e 214e MOVS r1,#0x4e ;458 +000810 204c MOVS r0,#0x4c ;458 +000812 ad02 ADD r5,sp,#8 ;458 +000814 c50f STM r5!,{r0-r3} ;458 +000816 2146 MOVS r1,#0x46 ;458 +000818 204a MOVS r0,#0x4a ;458 +00081a e295 B |L2.3400| + |L2.2076| +00081c 4328 ORRS r0,r0,r5 ;480 +00081e 7460 STRB r0,[r4,#0x11] ;480 +000820 207a MOVS r0,#0x7a ;481 +000822 217c MOVS r1,#0x7c ;481 +000824 9008 STR r0,[sp,#0x20] ;481 +000826 9006 STR r0,[sp,#0x18] ;481 +000828 9109 STR r1,[sp,#0x24] ;481 +00082a 9107 STR r1,[sp,#0x1c] ;481 +00082c 2079 MOVS r0,#0x79 ;481 +00082e 22b1 MOVS r2,#0xb1 ;481 +000830 21b2 MOVS r1,#0xb2 ;481 +000832 9004 STR r0,[sp,#0x10] ;481 +000834 9005 STR r0,[sp,#0x14] ;481 +000836 9203 STR r2,[sp,#0xc] ;481 +000838 9102 STR r1,[sp,#8] ;481 +00083a 2015 MOVS r0,#0x15 ;481 +00083c e3fb B |L2.4150| + |L2.2110| +00083e 2102 MOVS r1,#2 ;490 +000840 4308 ORRS r0,r0,r1 ;490 +000842 7460 STRB r0,[r4,#0x11] ;490 +000844 2179 MOVS r1,#0x79 ;491 +000846 2075 MOVS r0,#0x75 ;491 +000848 2573 MOVS r5,#0x73 ;491 +00084a 2378 MOVS r3,#0x78 ;491 +00084c 9306 STR r3,[sp,#0x18] ;491 +00084e 9507 STR r5,[sp,#0x1c] ;491 +000850 9108 STR r1,[sp,#0x20] ;491 +000852 9009 STR r0,[sp,#0x24] ;491 +000854 2371 MOVS r3,#0x71 ;491 +000856 9304 STR r3,[sp,#0x10] ;491 +000858 9102 STR r1,[sp,#8] ;491 +00085a 9003 STR r0,[sp,#0xc] ;491 +00085c e2e4 B |L2.3624| + |L2.2142| +00085e 2343 MOVS r3,#0x43 ;517 +000860 2263 MOVS r2,#0x63 ;517 +000862 2166 MOVS r1,#0x66 ;517 +000864 2068 MOVS r0,#0x68 ;517 +000866 466d MOV r5,sp ;517 +000868 c50f STM r5!,{r0-r3} ;517 + |L2.2154| +00086a e378 B |L2.3934| + |L2.2156| +00086c 288e CMP r0,#0x8e ;546 +00086e d014 BEQ |L2.2202| +000870 2869 CMP r0,#0x69 ;560 +000872 d072 BEQ |L2.2394| +000874 2846 CMP r0,#0x46 ;572 +000876 d071 BEQ |L2.2396| +000878 2815 CMP r0,#0x15 ;583 +00087a d070 BEQ |L2.2398| +00087c 280a CMP r0,#0xa ;591 +00087e d06f BEQ |L2.2400| +000880 2804 CMP r0,#4 ;724 +000882 d06e BEQ |L2.2402| +000884 2801 CMP r0,#1 ;747 +000886 d000 BEQ |L2.2186| + |L2.2184| +000888 e40c B |L2.164| + |L2.2186| +00088a 2020 MOVS r0,#0x20 ;749 +00088c 7460 STRB r0,[r4,#0x11] ;749 +00088e 7ca0 LDRB r0,[r4,#0x12] ;751 ; c9_read_flag +000890 0900 LSRS r0,r0,#4 ;751 +000892 2802 CMP r0,#2 ;751 +000894 d066 BEQ |L2.2404| +000896 2051 MOVS r0,#0x51 ;778 + |L2.2200| +000898 e415 B |L2.198| + |L2.2202| +00089a 275a MOVS r7,#0x5a ;548 +00089c 978d STR r7,[sp,#0x234] ;548 +00089e 265b MOVS r6,#0x5b ;548 +0008a0 233e MOVS r3,#0x3e ;548 +0008a2 2076 MOVS r0,#0x76 ;548 +0008a4 af8a ADD r7,sp,#0x228 ;548 +0008a6 c749 STM r7!,{r0,r3,r6} ;548 +0008a8 2770 MOVS r7,#0x70 ;548 +0008aa 9789 STR r7,[sp,#0x224] ;548 +0008ac 2673 MOVS r6,#0x73 ;548 +0008ae 2369 MOVS r3,#0x69 ;548 +0008b0 204b MOVS r0,#0x4b ;548 +0008b2 af86 ADD r7,sp,#0x218 ;548 +0008b4 c749 STM r7!,{r0,r3,r6} ;548 +0008b6 2762 MOVS r7,#0x62 ;548 +0008b8 236b MOVS r3,#0x6b ;548 +0008ba 9785 STR r7,[sp,#0x214] ;548 +0008bc 9383 STR r3,[sp,#0x20c] ;548 +0008be 2075 MOVS r0,#0x75 ;548 +0008c0 2370 MOVS r3,#0x70 ;548 +0008c2 9281 STR r2,[sp,#0x204] ;548 +0008c4 9380 STR r3,[sp,#0x200] ;548 +0008c6 9682 STR r6,[sp,#0x208] ;548 +0008c8 2674 MOVS r6,#0x74 ;548 +0008ca 9084 STR r0,[sp,#0x210] ;548 +0008cc 226f MOVS r2,#0x6f ;548 +0008ce 967f STR r6,[sp,#0x1fc] ;548 +0008d0 2372 MOVS r3,#0x72 ;548 +0008d2 927d STR r2,[sp,#0x1f4] ;548 +0008d4 2773 MOVS r7,#0x73 ;548 +0008d6 977e STR r7,[sp,#0x1f8] ;548 +0008d8 927a STR r2,[sp,#0x1e8] ;548 +0008da 967b STR r6,[sp,#0x1ec] ;548 +0008dc 937c STR r3,[sp,#0x1f0] ;548 +0008de 461a MOV r2,r3 ;548 +0008e0 9279 STR r2,[sp,#0x1e4] ;548 +0008e2 2376 MOVS r3,#0x76 ;548 +0008e4 9376 STR r3,[sp,#0x1d8] ;548 +0008e6 2271 MOVS r2,#0x71 ;548 +0008e8 9275 STR r2,[sp,#0x1d4] ;548 +0008ea 236f MOVS r3,#0x6f ;548 +0008ec 9374 STR r3,[sp,#0x1d0] ;548 +0008ee 9078 STR r0,[sp,#0x1e0] ;548 +0008f0 2670 MOVS r6,#0x70 ;548 +0008f2 9673 STR r6,[sp,#0x1cc] ;548 +0008f4 2312 MOVS r3,#0x12 ;548 +0008f6 916b STR r1,[sp,#0x1ac] ;548 +0008f8 9077 STR r0,[sp,#0x1dc] ;548 +0008fa 2716 MOVS r7,#0x16 ;548 +0008fc 9370 STR r3,[sp,#0x1c0] ;548 +0008fe 9772 STR r7,[sp,#0x1c8] ;548 +000900 2208 MOVS r2,#8 ;548 +000902 262a MOVS r6,#0x2a ;548 +000904 916a STR r1,[sp,#0x1a8] ;548 +000906 916c STR r1,[sp,#0x1b0] ;548 +000908 966f STR r6,[sp,#0x1bc] ;548 +00090a 9271 STR r2,[sp,#0x1c4] ;548 +00090c 2273 MOVS r2,#0x73 ;548 +00090e 916d STR r1,[sp,#0x1b4] ;548 +000910 2368 MOVS r3,#0x68 ;548 +000912 2664 MOVS r6,#0x64 ;548 +000914 9267 STR r2,[sp,#0x19c] ;548 +000916 9666 STR r6,[sp,#0x198] ;548 +000918 9368 STR r3,[sp,#0x1a0] ;548 +00091a 916e STR r1,[sp,#0x1b8] ;548 +00091c 227b MOVS r2,#0x7b ;548 +00091e 277e MOVS r7,#0x7e ;548 +000920 237c MOVS r3,#0x7c ;548 +000922 266f MOVS r6,#0x6f ;548 +000924 9169 STR r1,[sp,#0x1a4] ;548 +000926 9363 STR r3,[sp,#0x18c] ;548 +000928 9764 STR r7,[sp,#0x190] ;548 +00092a 9662 STR r6,[sp,#0x188] ;548 +00092c 9265 STR r2,[sp,#0x194] ;548 +00092e 235c MOVS r3,#0x5c ;548 +000930 226d MOVS r2,#0x6d ;548 +000932 2669 MOVS r6,#0x69 ;548 +000934 925e STR r2,[sp,#0x178] ;548 +000936 9660 STR r6,[sp,#0x180] ;548 +000938 9361 STR r3,[sp,#0x184] ;548 +00093a 2274 MOVS r2,#0x74 ;548 +00093c 2378 MOVS r3,#0x78 ;548 +00093e 2673 MOVS r6,#0x73 ;548 +000940 965b STR r6,[sp,#0x16c] ;548 +000942 935c STR r3,[sp,#0x170] ;548 +000944 2776 MOVS r7,#0x76 ;548 +000946 925d STR r2,[sp,#0x174] ;548 +000948 4616 MOV r6,r2 ;548 +00094a 2371 MOVS r3,#0x71 ;548 +00094c 905f STR r0,[sp,#0x17c] ;548 +00094e 975a STR r7,[sp,#0x168] ;548 +000950 2272 MOVS r2,#0x72 ;548 +000952 9659 STR r6,[sp,#0x164] ;548 +000954 9358 STR r3,[sp,#0x160] ;548 +000956 e006 B |L2.2406| + |L2.2392| +000958 e2f2 B |L2.3904| + |L2.2394| +00095a e094 B |L2.2694| + |L2.2396| +00095c e13c B |L2.3032| + |L2.2398| +00095e e1a8 B |L2.3250| + |L2.2400| +000960 e1cf B |L2.3330| + |L2.2402| +000962 e2d2 B |L2.3850| + |L2.2404| +000964 e2dd B |L2.3874| + |L2.2406| +000966 463e MOV r6,r7 ;548 +000968 9256 STR r2,[sp,#0x158] ;548 +00096a 226f MOVS r2,#0x6f ;548 +00096c 9255 STR r2,[sp,#0x154] ;548 +00096e 2370 MOVS r3,#0x70 ;548 +000970 9653 STR r6,[sp,#0x14c] ;548 +000972 2273 MOVS r2,#0x73 ;548 +000974 9057 STR r0,[sp,#0x15c] ;548 +000976 2774 MOVS r7,#0x74 ;548 +000978 9354 STR r3,[sp,#0x150] ;548 +00097a 2671 MOVS r6,#0x71 ;548 +00097c 9250 STR r2,[sp,#0x140] ;548 +00097e 9752 STR r7,[sp,#0x148] ;548 +000980 236e MOVS r3,#0x6e ;548 +000982 964e STR r6,[sp,#0x138] ;548 +000984 934f STR r3,[sp,#0x13c] ;548 +000986 9051 STR r0,[sp,#0x144] ;548 +000988 2612 MOVS r6,#0x12 ;548 +00098a 230f MOVS r3,#0xf ;548 +00098c 9146 STR r1,[sp,#0x118] ;548 +00098e 9148 STR r1,[sp,#0x120] ;548 +000990 2205 MOVS r2,#5 ;548 +000992 9147 STR r1,[sp,#0x11c] ;548 +000994 964d STR r6,[sp,#0x134] ;548 +000996 934b STR r3,[sp,#0x12c] ;548 +000998 272a MOVS r7,#0x2a ;548 +00099a 924c STR r2,[sp,#0x130] ;548 +00099c 2344 MOVS r3,#0x44 ;548 +00099e 266f MOVS r6,#0x6f ;548 +0009a0 974a STR r7,[sp,#0x128] ;548 +0009a2 2240 MOVS r2,#0x40 ;548 +0009a4 9149 STR r1,[sp,#0x124] ;548 +0009a6 277b MOVS r7,#0x7b ;548 +0009a8 9742 STR r7,[sp,#0x108] ;548 +0009aa 9643 STR r6,[sp,#0x10c] ;548 +0009ac 9344 STR r3,[sp,#0x110] ;548 +0009ae e001 B |L2.2484| + |L2.2480| +0009b0 e212 B |L2.3544| + |L2.2482| +0009b2 e23b B |L2.3628| + |L2.2484| +0009b4 9245 STR r2,[sp,#0x114] ;548 +0009b6 227f MOVS r2,#0x7f ;548 +0009b8 2383 MOVS r3,#0x83 ;548 +0009ba 2682 MOVS r6,#0x82 ;548 +0009bc 933f STR r3,[sp,#0xfc] ;548 +0009be 9240 STR r2,[sp,#0x100] ;548 +0009c0 2767 MOVS r7,#0x67 ;548 +0009c2 963e STR r6,[sp,#0xf8] ;548 +0009c4 9741 STR r7,[sp,#0x104] ;548 +0009c6 2673 MOVS r6,#0x73 ;548 +0009c8 2272 MOVS r2,#0x72 ;548 +0009ca 923c STR r2,[sp,#0xf0] ;548 +0009cc 2277 MOVS r2,#0x77 ;548 +0009ce 2778 MOVS r7,#0x78 ;548 +0009d0 973a STR r7,[sp,#0xe8] ;548 +0009d2 963b STR r6,[sp,#0xec] ;548 +0009d4 9232 STR r2,[sp,#0xc8] ;548 +0009d6 2376 MOVS r3,#0x76 ;548 +0009d8 933d STR r3,[sp,#0xf4] ;548 +0009da 9639 STR r6,[sp,#0xe4] ;548 +0009dc 9633 STR r6,[sp,#0xcc] ;548 +0009de 9234 STR r2,[sp,#0xd0] ;548 +0009e0 9235 STR r2,[sp,#0xd4] ;548 +0009e2 9338 STR r3,[sp,#0xe0] ;548 +0009e4 2276 MOVS r2,#0x76 ;548 +0009e6 237b MOVS r3,#0x7b ;548 +0009e8 9230 STR r2,[sp,#0xc0] ;548 +0009ea 461a MOV r2,r3 ;548 +0009ec 2779 MOVS r7,#0x79 ;548 +0009ee 2677 MOVS r6,#0x77 ;548 +0009f0 9036 STR r0,[sp,#0xd8] ;548 +0009f2 962f STR r6,[sp,#0xbc] ;548 +0009f4 932e STR r3,[sp,#0xb8] ;548 +0009f6 9731 STR r7,[sp,#0xc4] ;548 +0009f8 237a MOVS r3,#0x7a ;548 +0009fa 932a STR r3,[sp,#0xa8] ;548 +0009fc 922c STR r2,[sp,#0xb0] ;548 +0009fe 22ae MOVS r2,#0xae ;548 +000a00 267c MOVS r6,#0x7c ;548 +000a02 9737 STR r7,[sp,#0xdc] ;548 +000a04 962b STR r6,[sp,#0xac] ;548 +000a06 972d STR r7,[sp,#0xb4] ;548 +000a08 20ad MOVS r0,#0xad ;548 +000a0a 9226 STR r2,[sp,#0x98] ;548 +000a0c 9227 STR r2,[sp,#0x9c] ;548 +000a0e 237b MOVS r3,#0x7b ;548 +000a10 9028 STR r0,[sp,#0xa0] ;548 +000a12 9329 STR r3,[sp,#0xa4] ;548 +000a14 9122 STR r1,[sp,#0x88] ;548 +000a16 9120 STR r1,[sp,#0x80] ;548 +000a18 9121 STR r1,[sp,#0x84] ;548 +000a1a 911b STR r1,[sp,#0x6c] ;548 +000a1c 911c STR r1,[sp,#0x70] ;548 +000a1e 911d STR r1,[sp,#0x74] ;548 +000a20 2232 MOVS r2,#0x32 ;548 +000a22 2015 MOVS r0,#0x15 ;548 +000a24 9123 STR r1,[sp,#0x8c] ;548 +000a26 9124 STR r1,[sp,#0x90] ;548 +000a28 9116 STR r1,[sp,#0x58] ;548 +000a2a 9117 STR r1,[sp,#0x5c] ;548 +000a2c 9118 STR r1,[sp,#0x60] ;548 +000a2e 911e STR r1,[sp,#0x78] ;548 +000a30 911f STR r1,[sp,#0x7c] ;548 +000a32 9025 STR r0,[sp,#0x94] ;548 +000a34 9212 STR r2,[sp,#0x48] ;548 +000a36 9213 STR r2,[sp,#0x4c] ;548 +000a38 911a STR r1,[sp,#0x68] ;548 +000a3a 9119 STR r1,[sp,#0x64] ;548 +000a3c 2035 MOVS r0,#0x35 ;548 +000a3e 2242 MOVS r2,#0x42 ;548 +000a40 9115 STR r1,[sp,#0x54] ;548 +000a42 9014 STR r0,[sp,#0x50] ;548 +000a44 2338 MOVS r3,#0x38 ;548 +000a46 2031 MOVS r0,#0x31 ;548 +000a48 9210 STR r2,[sp,#0x40] ;548 +000a4a 9211 STR r2,[sp,#0x44] ;548 +000a4c 2230 MOVS r2,#0x30 ;548 +000a4e 930f STR r3,[sp,#0x3c] ;548 +000a50 920d STR r2,[sp,#0x34] ;548 +000a52 2353 MOVS r3,#0x53 ;548 +000a54 2639 MOVS r6,#0x39 ;548 +000a56 920b STR r2,[sp,#0x2c] ;548 +000a58 960c STR r6,[sp,#0x30] ;548 +000a5a 930a STR r3,[sp,#0x28] ;548 +000a5c 2254 MOVS r2,#0x54 ;548 +000a5e 9308 STR r3,[sp,#0x20] ;548 +000a60 9207 STR r2,[sp,#0x1c] ;548 +000a62 900e STR r0,[sp,#0x38] ;548 +000a64 9100 STR r1,[sp,#0] ;548 +000a66 2633 MOVS r6,#0x33 ;548 +000a68 9009 STR r0,[sp,#0x24] ;548 +000a6a 2341 MOVS r3,#0x41 ;548 +000a6c 229e MOVS r2,#0x9e ;548 +000a6e 9502 STR r5,[sp,#8] ;548 +000a70 af04 ADD r7,sp,#0x10 ;548 +000a72 9503 STR r5,[sp,#0xc] ;548 +000a74 9001 STR r0,[sp,#4] ;548 +000a76 c74c STM r7!,{r2,r3,r6} ;548 +000a78 238e MOVS r3,#0x8e ;548 +000a7a 2200 MOVS r2,#0 ;548 +000a7c 211c MOVS r1,#0x1c ;548 +000a7e 6aa0 LDR r0,[r4,#0x28] ;548 ; g_rx_ctrl_handle +000a80 f7fffffe BL hal_dsi_rx_ctrl_send_ack_cmd +000a84 e41a B |L2.700| + |L2.2694| +000a86 2768 MOVS r7,#0x68 ;562 +000a88 9768 STR r7,[sp,#0x1a0] ;562 +000a8a 2673 MOVS r6,#0x73 ;562 +000a8c 2364 MOVS r3,#0x64 ;562 +000a8e 207b MOVS r0,#0x7b ;562 +000a90 af65 ADD r7,sp,#0x194 ;562 +000a92 c749 STM r7!,{r0,r3,r6} ;562 +000a94 277e MOVS r7,#0x7e ;562 +000a96 9764 STR r7,[sp,#0x190] ;562 +000a98 267c MOVS r6,#0x7c ;562 +000a9a 236f MOVS r3,#0x6f ;562 +000a9c 205c MOVS r0,#0x5c ;562 +000a9e af61 ADD r7,sp,#0x184 ;562 +000aa0 c749 STM r7!,{r0,r3,r6} ;562 +000aa2 2769 MOVS r7,#0x69 ;562 +000aa4 9760 STR r7,[sp,#0x180] ;562 +000aa6 2675 MOVS r6,#0x75 ;562 +000aa8 236d MOVS r3,#0x6d ;562 +000aaa 2074 MOVS r0,#0x74 ;562 +000aac af5d ADD r7,sp,#0x174 ;562 +000aae c749 STM r7!,{r0,r3,r6} ;562 +000ab0 2778 MOVS r7,#0x78 ;562 +000ab2 975c STR r7,[sp,#0x170] ;562 +000ab4 2673 MOVS r6,#0x73 ;562 +000ab6 2376 MOVS r3,#0x76 ;562 +000ab8 af59 ADD r7,sp,#0x164 ;562 +000aba c749 STM r7!,{r0,r3,r6} ;562 +000abc 2771 MOVS r7,#0x71 ;562 +000abe 9758 STR r7,[sp,#0x160] ;562 +000ac0 2675 MOVS r6,#0x75 ;562 +000ac2 2372 MOVS r3,#0x72 ;562 +000ac4 206f MOVS r0,#0x6f ;562 +000ac6 af55 ADD r7,sp,#0x154 ;562 +000ac8 c749 STM r7!,{r0,r3,r6} ;562 +000aca 2770 MOVS r7,#0x70 ;562 +000acc 9754 STR r7,[sp,#0x150] ;562 +000ace 2676 MOVS r6,#0x76 ;562 +000ad0 2374 MOVS r3,#0x74 ;562 +000ad2 2075 MOVS r0,#0x75 ;562 +000ad4 af51 ADD r7,sp,#0x144 ;562 +000ad6 c749 STM r7!,{r0,r3,r6} ;562 +000ad8 2773 MOVS r7,#0x73 ;562 +000ada 9750 STR r7,[sp,#0x140] ;562 +000adc 266e MOVS r6,#0x6e ;562 +000ade 2371 MOVS r3,#0x71 ;562 +000ae0 2012 MOVS r0,#0x12 ;562 +000ae2 af4d ADD r7,sp,#0x134 ;562 +000ae4 c749 STM r7!,{r0,r3,r6} ;562 +000ae6 2005 MOVS r0,#5 ;562 +000ae8 262a MOVS r6,#0x2a ;562 +000aea 964a STR r6,[sp,#0x128] ;562 +000aec 904c STR r0,[sp,#0x130] ;562 +000aee 230f MOVS r3,#0xf ;562 +000af0 934b STR r3,[sp,#0x12c] ;562 +000af2 2040 MOVS r0,#0x40 ;562 +000af4 9045 STR r0,[sp,#0x114] ;562 +000af6 9149 STR r1,[sp,#0x124] ;562 +000af8 9147 STR r1,[sp,#0x11c] ;562 +000afa 9148 STR r1,[sp,#0x120] ;562 +000afc 2044 MOVS r0,#0x44 ;562 +000afe 266f MOVS r6,#0x6f ;562 +000b00 237b MOVS r3,#0x7b ;562 +000b02 9643 STR r6,[sp,#0x10c] ;562 +000b04 9342 STR r3,[sp,#0x108] ;562 +000b06 9044 STR r0,[sp,#0x110] ;562 +000b08 9146 STR r1,[sp,#0x118] ;562 +000b0a 2767 MOVS r7,#0x67 ;562 +000b0c 2383 MOVS r3,#0x83 ;562 +000b0e 2682 MOVS r6,#0x82 ;562 +000b10 9741 STR r7,[sp,#0x104] ;562 +000b12 207f MOVS r0,#0x7f ;562 +000b14 2776 MOVS r7,#0x76 ;562 +000b16 973d STR r7,[sp,#0xf4] ;562 +000b18 963e STR r6,[sp,#0xf8] ;562 +000b1a 933f STR r3,[sp,#0xfc] ;562 +000b1c 9040 STR r0,[sp,#0x100] ;562 +000b1e 2673 MOVS r6,#0x73 ;562 +000b20 2378 MOVS r3,#0x78 ;562 +000b22 9639 STR r6,[sp,#0xe4] ;562 +000b24 933a STR r3,[sp,#0xe8] ;562 +000b26 2072 MOVS r0,#0x72 ;562 +000b28 963b STR r6,[sp,#0xec] ;562 +000b2a 903c STR r0,[sp,#0xf0] ;562 +000b2c 2079 MOVS r0,#0x79 ;562 +000b2e 2675 MOVS r6,#0x75 ;562 +000b30 9636 STR r6,[sp,#0xd8] ;562 +000b32 2373 MOVS r3,#0x73 ;562 +000b34 9037 STR r0,[sp,#0xdc] ;562 +000b36 9738 STR r7,[sp,#0xe0] ;562 +000b38 9235 STR r2,[sp,#0xd4] ;562 +000b3a 9232 STR r2,[sp,#0xc8] ;562 +000b3c 9333 STR r3,[sp,#0xcc] ;562 +000b3e 9234 STR r2,[sp,#0xd0] ;562 +000b40 2676 MOVS r6,#0x76 ;562 +000b42 237b MOVS r3,#0x7b ;562 +000b44 9031 STR r0,[sp,#0xc4] ;562 +000b46 9630 STR r6,[sp,#0xc0] ;562 +000b48 932e STR r3,[sp,#0xb8] ;562 +000b4a 922f STR r2,[sp,#0xbc] ;562 +000b4c 902d STR r0,[sp,#0xb4] ;562 +000b4e 237c MOVS r3,#0x7c ;562 +000b50 227a MOVS r2,#0x7a ;562 +000b52 207b MOVS r0,#0x7b ;562 +000b54 ae29 ADD r6,sp,#0xa4 ;562 +000b56 c60d STM r6!,{r0,r2,r3} ;562 +000b58 902c STR r0,[sp,#0xb0] ;562 +000b5a 20ae MOVS r0,#0xae ;562 +000b5c 9123 STR r1,[sp,#0x8c] ;562 +000b5e 911e STR r1,[sp,#0x78] ;562 +000b60 22ad MOVS r2,#0xad ;562 +000b62 9026 STR r0,[sp,#0x98] ;562 +000b64 9122 STR r1,[sp,#0x88] ;562 +000b66 9120 STR r1,[sp,#0x80] ;562 +000b68 9119 STR r1,[sp,#0x64] ;562 +000b6a 911d STR r1,[sp,#0x74] ;562 +000b6c 911b STR r1,[sp,#0x6c] ;562 +000b6e 9228 STR r2,[sp,#0xa0] ;562 +000b70 2315 MOVS r3,#0x15 ;562 +000b72 9116 STR r1,[sp,#0x58] ;562 +000b74 9118 STR r1,[sp,#0x60] ;562 +000b76 2235 MOVS r2,#0x35 ;562 +000b78 9121 STR r1,[sp,#0x84] ;562 +000b7a 9124 STR r1,[sp,#0x90] ;562 +000b7c 9325 STR r3,[sp,#0x94] ;562 +000b7e 9027 STR r0,[sp,#0x9c] ;562 +000b80 9214 STR r2,[sp,#0x50] ;562 +000b82 911f STR r1,[sp,#0x7c] ;562 +000b84 911c STR r1,[sp,#0x70] ;562 +000b86 2032 MOVS r0,#0x32 ;562 +000b88 2342 MOVS r3,#0x42 ;562 +000b8a 911a STR r1,[sp,#0x68] ;562 +000b8c 9117 STR r1,[sp,#0x5c] ;562 +000b8e 9115 STR r1,[sp,#0x54] ;562 +000b90 9012 STR r0,[sp,#0x48] ;562 +000b92 2638 MOVS r6,#0x38 ;562 +000b94 9311 STR r3,[sp,#0x44] ;562 +000b96 9013 STR r0,[sp,#0x4c] ;562 +000b98 960f STR r6,[sp,#0x3c] ;562 +000b9a 9310 STR r3,[sp,#0x40] ;562 +000b9c 2031 MOVS r0,#0x31 ;562 +000b9e 2230 MOVS r2,#0x30 ;562 +000ba0 2639 MOVS r6,#0x39 ;562 +000ba2 2353 MOVS r3,#0x53 ;562 +000ba4 920d STR r2,[sp,#0x34] ;562 +000ba6 900e STR r0,[sp,#0x38] ;562 +000ba8 920b STR r2,[sp,#0x2c] ;562 +000baa 960c STR r6,[sp,#0x30] ;562 +000bac 930a STR r3,[sp,#0x28] ;562 +000bae 9009 STR r0,[sp,#0x24] ;562 +000bb0 2254 MOVS r2,#0x54 ;562 +000bb2 9207 STR r2,[sp,#0x1c] ;562 +000bb4 2741 MOVS r7,#0x41 ;562 +000bb6 2633 MOVS r6,#0x33 ;562 +000bb8 9705 STR r7,[sp,#0x14] ;562 +000bba 9308 STR r3,[sp,#0x20] ;562 +000bbc 229e MOVS r2,#0x9e ;562 +000bbe 9606 STR r6,[sp,#0x18] ;562 +000bc0 9204 STR r2,[sp,#0x10] ;562 +000bc2 9100 STR r1,[sp,#0] ;562 +000bc4 9502 STR r5,[sp,#8] ;562 +000bc6 9503 STR r5,[sp,#0xc] ;562 +000bc8 9001 STR r0,[sp,#4] ;562 +000bca 2369 MOVS r3,#0x69 ;562 +000bcc 2200 MOVS r2,#0 ;562 +000bce 211c MOVS r1,#0x1c ;562 +000bd0 6aa0 LDR r0,[r4,#0x28] ;562 ; g_rx_ctrl_handle +000bd2 f7fffffe BL hal_dsi_rx_ctrl_send_ack_cmd +000bd6 e48a B |L2.1262| + |L2.3032| +000bd8 2740 MOVS r7,#0x40 ;574 +000bda 9745 STR r7,[sp,#0x114] ;574 +000bdc 2644 MOVS r6,#0x44 ;574 +000bde 236f MOVS r3,#0x6f ;574 +000be0 207b MOVS r0,#0x7b ;574 +000be2 af42 ADD r7,sp,#0x108 ;574 +000be4 c749 STM r7!,{r0,r3,r6} ;574 +000be6 2767 MOVS r7,#0x67 ;574 +000be8 9741 STR r7,[sp,#0x104] ;574 +000bea 267f MOVS r6,#0x7f ;574 +000bec 2383 MOVS r3,#0x83 ;574 +000bee 2082 MOVS r0,#0x82 ;574 +000bf0 af3e ADD r7,sp,#0xf8 ;574 +000bf2 c749 STM r7!,{r0,r3,r6} ;574 +000bf4 2673 MOVS r6,#0x73 ;574 +000bf6 2778 MOVS r7,#0x78 ;574 +000bf8 973a STR r7,[sp,#0xe8] ;574 +000bfa 2076 MOVS r0,#0x76 ;574 +000bfc 2372 MOVS r3,#0x72 ;574 +000bfe 933c STR r3,[sp,#0xf0] ;574 +000c00 903d STR r0,[sp,#0xf4] ;574 +000c02 963b STR r6,[sp,#0xec] ;574 +000c04 9639 STR r6,[sp,#0xe4] ;574 +000c06 9633 STR r6,[sp,#0xcc] ;574 +000c08 9232 STR r2,[sp,#0xc8] ;574 +000c0a 9235 STR r2,[sp,#0xd4] ;574 +000c0c 9234 STR r2,[sp,#0xd0] ;574 +000c0e 922f STR r2,[sp,#0xbc] ;574 +000c10 9038 STR r0,[sp,#0xe0] ;574 +000c12 2379 MOVS r3,#0x79 ;574 +000c14 267b MOVS r6,#0x7b ;574 +000c16 2775 MOVS r7,#0x75 ;574 +000c18 9736 STR r7,[sp,#0xd8] ;574 +000c1a 4632 MOV r2,r6 ;574 +000c1c 9331 STR r3,[sp,#0xc4] ;574 +000c1e 9030 STR r0,[sp,#0xc0] ;574 +000c20 962e STR r6,[sp,#0xb8] ;574 +000c22 207a MOVS r0,#0x7a ;574 +000c24 922c STR r2,[sp,#0xb0] ;574 +000c26 902a STR r0,[sp,#0xa8] ;574 +000c28 20ae MOVS r0,#0xae ;574 +000c2a 267c MOVS r6,#0x7c ;574 +000c2c 962b STR r6,[sp,#0xac] ;574 +000c2e 9026 STR r0,[sp,#0x98] ;574 +000c30 9027 STR r0,[sp,#0x9c] ;574 +000c32 9337 STR r3,[sp,#0xdc] ;574 +000c34 227b MOVS r2,#0x7b ;574 +000c36 932d STR r3,[sp,#0xb4] ;574 +000c38 9229 STR r2,[sp,#0xa4] ;574 +000c3a 9120 STR r1,[sp,#0x80] ;574 +000c3c 23ad MOVS r3,#0xad ;574 +000c3e 911b STR r1,[sp,#0x6c] ;574 +000c40 9328 STR r3,[sp,#0xa0] ;574 +000c42 2015 MOVS r0,#0x15 ;574 +000c44 9116 STR r1,[sp,#0x58] ;574 +000c46 9123 STR r1,[sp,#0x8c] ;574 +000c48 9025 STR r0,[sp,#0x94] ;574 +000c4a 9122 STR r1,[sp,#0x88] ;574 +000c4c 9124 STR r1,[sp,#0x90] ;574 +000c4e 911e STR r1,[sp,#0x78] ;574 +000c50 9121 STR r1,[sp,#0x84] ;574 +000c52 2032 MOVS r0,#0x32 ;574 +000c54 911f STR r1,[sp,#0x7c] ;574 +000c56 911c STR r1,[sp,#0x70] ;574 +000c58 911d STR r1,[sp,#0x74] ;574 +000c5a 2235 MOVS r2,#0x35 ;574 +000c5c 9119 STR r1,[sp,#0x64] ;574 +000c5e 911a STR r1,[sp,#0x68] ;574 +000c60 9117 STR r1,[sp,#0x5c] ;574 +000c62 9118 STR r1,[sp,#0x60] ;574 +000c64 9214 STR r2,[sp,#0x50] ;574 +000c66 9012 STR r0,[sp,#0x48] ;574 +000c68 9115 STR r1,[sp,#0x54] ;574 +000c6a 9013 STR r0,[sp,#0x4c] ;574 +000c6c 2242 MOVS r2,#0x42 ;574 +000c6e 9211 STR r2,[sp,#0x44] ;574 +000c70 9210 STR r2,[sp,#0x40] ;574 +000c72 2230 MOVS r2,#0x30 ;574 +000c74 920d STR r2,[sp,#0x34] ;574 +000c76 2338 MOVS r3,#0x38 ;574 +000c78 930f STR r3,[sp,#0x3c] ;574 +000c7a 2639 MOVS r6,#0x39 ;574 +000c7c 2353 MOVS r3,#0x53 ;574 +000c7e 920b STR r2,[sp,#0x2c] ;574 +000c80 960c STR r6,[sp,#0x30] ;574 +000c82 9308 STR r3,[sp,#0x20] ;574 +000c84 2031 MOVS r0,#0x31 ;574 +000c86 930a STR r3,[sp,#0x28] ;574 +000c88 2254 MOVS r2,#0x54 ;574 +000c8a 9207 STR r2,[sp,#0x1c] ;574 +000c8c 2341 MOVS r3,#0x41 ;574 +000c8e 900e STR r0,[sp,#0x38] ;574 +000c90 9305 STR r3,[sp,#0x14] ;574 +000c92 2633 MOVS r6,#0x33 ;574 +000c94 9009 STR r0,[sp,#0x24] ;574 +000c96 229e MOVS r2,#0x9e ;574 +000c98 9606 STR r6,[sp,#0x18] ;574 +000c9a 9204 STR r2,[sp,#0x10] ;574 +000c9c 9100 STR r1,[sp,#0] ;574 +000c9e 9502 STR r5,[sp,#8] ;574 +000ca0 9503 STR r5,[sp,#0xc] ;574 +000ca2 9001 STR r0,[sp,#4] ;574 +000ca4 2346 MOVS r3,#0x46 ;574 +000ca6 2200 MOVS r2,#0 ;574 +000ca8 211c MOVS r1,#0x1c ;574 +000caa 6aa0 LDR r0,[r4,#0x28] ;574 ; g_rx_ctrl_handle +000cac f7fffffe BL hal_dsi_rx_ctrl_send_ack_cmd +000cb0 e41d B |L2.1262| + |L2.3250| +000cb2 2235 MOVS r2,#0x35 ;585 +000cb4 9214 STR r2,[sp,#0x50] ;585 +000cb6 2342 MOVS r3,#0x42 ;585 +000cb8 9311 STR r3,[sp,#0x44] ;585 +000cba 9310 STR r3,[sp,#0x40] ;585 +000cbc 2032 MOVS r0,#0x32 ;585 +000cbe 2638 MOVS r6,#0x38 ;585 +000cc0 960f STR r6,[sp,#0x3c] ;585 +000cc2 9012 STR r0,[sp,#0x48] ;585 +000cc4 2230 MOVS r2,#0x30 ;585 +000cc6 920d STR r2,[sp,#0x34] ;585 +000cc8 2639 MOVS r6,#0x39 ;585 +000cca 960c STR r6,[sp,#0x30] ;585 +000ccc 920b STR r2,[sp,#0x2c] ;585 +000cce 2353 MOVS r3,#0x53 ;585 +000cd0 9013 STR r0,[sp,#0x4c] ;585 +000cd2 2031 MOVS r0,#0x31 ;585 +000cd4 2254 MOVS r2,#0x54 ;585 +000cd6 930a STR r3,[sp,#0x28] ;585 +000cd8 9207 STR r2,[sp,#0x1c] ;585 +000cda 900e STR r0,[sp,#0x38] ;585 +000cdc 2741 MOVS r7,#0x41 ;585 +000cde 9009 STR r0,[sp,#0x24] ;585 +000ce0 2633 MOVS r6,#0x33 ;585 +000ce2 9705 STR r7,[sp,#0x14] ;585 +000ce4 9308 STR r3,[sp,#0x20] ;585 +000ce6 229e MOVS r2,#0x9e ;585 +000ce8 9606 STR r6,[sp,#0x18] ;585 +000cea 9204 STR r2,[sp,#0x10] ;585 +000cec 9100 STR r1,[sp,#0] ;585 +000cee 9502 STR r5,[sp,#8] ;585 +000cf0 9503 STR r5,[sp,#0xc] ;585 +000cf2 9001 STR r0,[sp,#4] ;585 +000cf4 2315 MOVS r3,#0x15 ;585 +000cf6 2200 MOVS r2,#0 ;585 +000cf8 211c MOVS r1,#0x1c ;585 +000cfa 6aa0 LDR r0,[r4,#0x28] ;585 ; g_rx_ctrl_handle +000cfc f7fffffe BL hal_dsi_rx_ctrl_send_ack_cmd +000d00 e420 B |L2.1348| + |L2.3330| +000d02 7ca0 LDRB r0,[r4,#0x12] ;593 ; c9_read_flag +000d04 0906 LSRS r6,r0,#4 ;593 +000d06 d020 BEQ |L2.3402| +000d08 0906 LSRS r6,r0,#4 ;616 +000d0a 2e01 CMP r6,#1 ;616 +000d0c d04a BEQ |L2.3492| +000d0e 0703 LSLS r3,r0,#28 ;653 +000d10 d076 BEQ |L2.3584| +000d12 0701 LSLS r1,r0,#28 ;679 +000d14 0f09 LSRS r1,r1,#28 ;679 +000d16 2901 CMP r1,#1 ;679 +000d18 d073 BEQ |L2.3586| +000d1a 0900 LSRS r0,r0,#4 ;702 +000d1c 0100 LSLS r0,r0,#4 ;702 +000d1e 74a0 STRB r0,[r4,#0x12] ;702 +000d20 7ce0 LDRB r0,[r4,#0x13] ;703 ; c9_read_flag2 +000d22 2152 MOVS r1,#0x52 ;705 +000d24 2802 CMP r0,#2 ;703 +000d26 d96d BLS |L2.3588| +000d28 9109 STR r1,[sp,#0x24] ;705 +000d2a 2340 MOVS r3,#0x40 ;705 +000d2c 2274 MOVS r2,#0x74 ;705 +000d2e 206c MOVS r0,#0x6c ;705 +000d30 ad06 ADD r5,sp,#0x18 ;705 +000d32 c50d STM r5!,{r0,r2,r3} ;705 +000d34 2173 MOVS r1,#0x73 ;705 +000d36 225b MOVS r2,#0x5b ;705 +000d38 233c MOVS r3,#0x3c ;705 +000d3a 2050 MOVS r0,#0x50 ;705 +000d3c 9105 STR r1,[sp,#0x14] ;705 +000d3e 9002 STR r0,[sp,#8] ;705 +000d40 2176 MOVS r1,#0x76 ;705 +000d42 9303 STR r3,[sp,#0xc] ;705 +000d44 9204 STR r2,[sp,#0x10] ;705 +000d46 206d MOVS r0,#0x6d ;705 + |L2.3400| +000d48 e175 B |L2.4150| + |L2.3402| +000d4a 0701 LSLS r1,r0,#28 ;595 +000d4c d017 BEQ |L2.3454| +000d4e 0900 LSRS r0,r0,#4 ;607 +000d50 0100 LSLS r0,r0,#4 ;607 +000d52 74a0 STRB r0,[r4,#0x12] ;607 +000d54 2139 MOVS r1,#0x39 ;608 +000d56 2336 MOVS r3,#0x36 ;608 +000d58 2030 MOVS r0,#0x30 ;608 +000d5a 2245 MOVS r2,#0x45 ;608 +000d5c 9109 STR r1,[sp,#0x24] ;608 +000d5e 9206 STR r2,[sp,#0x18] ;608 +000d60 2142 MOVS r1,#0x42 ;608 +000d62 254e MOVS r5,#0x4e ;608 +000d64 9308 STR r3,[sp,#0x20] ;608 +000d66 9007 STR r0,[sp,#0x1c] ;608 +000d68 2244 MOVS r2,#0x44 ;608 +000d6a e000 B |L2.3438| + |L2.3436| +000d6c e0d5 B |L2.3866| + |L2.3438| +000d6e 9105 STR r1,[sp,#0x14] ;608 +000d70 2343 MOVS r3,#0x43 ;608 +000d72 2131 MOVS r1,#0x31 ;608 +000d74 466e MOV r6,sp ;608 +000d76 c60b STM r6!,{r0,r1,r3} ;608 +000d78 c624 STM r6!,{r2,r5} ;608 +000d7a 230a MOVS r3,#0xa ;608 +000d7c e0bf B |L2.3838| + |L2.3454| +000d7e 4328 ORRS r0,r0,r5 ;597 +000d80 74a0 STRB r0,[r4,#0x12] ;597 +000d82 2353 MOVS r3,#0x53 ;598 +000d84 2231 MOVS r2,#0x31 ;598 +000d86 215a MOVS r1,#0x5a ;598 +000d88 2054 MOVS r0,#0x54 ;598 +000d8a ae06 ADD r6,sp,#0x18 ;598 +000d8c c60f STM r6!,{r0-r3} ;598 +000d8e 2033 MOVS r0,#0x33 ;598 +000d90 2141 MOVS r1,#0x41 ;598 +000d92 22a0 MOVS r2,#0xa0 ;598 +000d94 9005 STR r0,[sp,#0x14] ;598 +000d96 2040 MOVS r0,#0x40 ;598 +000d98 9502 STR r5,[sp,#8] ;598 +000d9a 9203 STR r2,[sp,#0xc] ;598 +000d9c 9104 STR r1,[sp,#0x10] ;598 +000d9e 9501 STR r5,[sp,#4] ;598 +000da0 9000 STR r0,[sp,#0] ;598 + |L2.3490| +000da2 e528 B |L2.2038| + |L2.3492| +000da4 0701 LSLS r1,r0,#28 ;618 +000da6 d018 BEQ |L2.3546| +000da8 0701 LSLS r1,r0,#28 ;629 +000daa 0f09 LSRS r1,r1,#28 ;629 +000dac 2901 CMP r1,#1 ;629 +000dae d02a BEQ |L2.3590| +000db0 0900 LSRS r0,r0,#4 ;642 +000db2 0100 LSLS r0,r0,#4 ;642 +000db4 74a0 STRB r0,[r4,#0x12] ;642 +000db6 2078 MOVS r0,#0x78 ;643 +000db8 216a MOVS r1,#0x6a ;643 +000dba 2585 MOVS r5,#0x85 ;643 +000dbc 9307 STR r3,[sp,#0x1c] ;643 +000dbe 9108 STR r1,[sp,#0x20] ;643 +000dc0 9009 STR r0,[sp,#0x24] ;643 +000dc2 9506 STR r5,[sp,#0x18] ;643 +000dc4 2182 MOVS r1,#0x82 ;643 +000dc6 2073 MOVS r0,#0x73 ;643 +000dc8 236b MOVS r3,#0x6b ;643 +000dca 256d MOVS r5,#0x6d ;643 + |L2.3532| +000dcc 9303 STR r3,[sp,#0xc] ;501 +000dce 9105 STR r1,[sp,#0x14] ;501 +000dd0 9004 STR r0,[sp,#0x10] ;501 +000dd2 466e MOV r6,sp ;501 +000dd4 c625 STM r6!,{r0,r2,r5} ;501 +000dd6 230a MOVS r3,#0xa ;501 + |L2.3544| +000dd8 e091 B |L2.3838| + |L2.3546| +000dda 0900 LSRS r0,r0,#4 ;620 +000ddc 0100 LSLS r0,r0,#4 ;620 +000dde 4328 ORRS r0,r0,r5 ;621 +000de0 74a0 STRB r0,[r4,#0x12] ;621 +000de2 207b MOVS r0,#0x7b ;622 +000de4 227c MOVS r2,#0x7c ;622 +000de6 217a MOVS r1,#0x7a ;622 +000de8 ab07 ADD r3,sp,#0x1c ;622 +000dea 9006 STR r0,[sp,#0x18] ;622 +000dec c307 STM r3!,{r0-r2} ;622 +000dee 22ae MOVS r2,#0xae ;622 +000df0 23af MOVS r3,#0xaf ;622 +000df2 9004 STR r0,[sp,#0x10] ;622 +000df4 9203 STR r2,[sp,#0xc] ;622 +000df6 9105 STR r1,[sp,#0x14] ;622 +000df8 2015 MOVS r0,#0x15 ;622 +000dfa 466e MOV r6,sp ;622 +000dfc c60d STM r6!,{r0,r2,r3} ;622 +000dfe e4fa B |L2.2038| + |L2.3584| +000e00 e016 B |L2.3632| + |L2.3586| +000e02 e046 B |L2.3730| + |L2.3588| +000e04 e06a B |L2.3804| + |L2.3590| +000e06 0900 LSRS r0,r0,#4 ;631 +000e08 0100 LSLS r0,r0,#4 ;631 +000e0a 2102 MOVS r1,#2 ;632 +000e0c 4308 ORRS r0,r0,r1 ;632 +000e0e 74a0 STRB r0,[r4,#0x12] ;632 +000e10 2378 MOVS r3,#0x78 ;633 +000e12 217a MOVS r1,#0x7a ;633 +000e14 2075 MOVS r0,#0x75 ;633 +000e16 ae07 ADD r6,sp,#0x1c ;633 +000e18 9306 STR r3,[sp,#0x18] ;633 +000e1a c607 STM r6!,{r0-r2} ;633 +000e1c 2573 MOVS r5,#0x73 ;633 +000e1e 2176 MOVS r1,#0x76 ;633 +000e20 2379 MOVS r3,#0x79 ;633 +000e22 9504 STR r5,[sp,#0x10] ;633 +000e24 9302 STR r3,[sp,#8] ;633 +000e26 9103 STR r1,[sp,#0xc] ;633 + |L2.3624| +000e28 9205 STR r2,[sp,#0x14] ;491 +000e2a 9200 STR r2,[sp,#0] ;491 + |L2.3628| +000e2c 9001 STR r0,[sp,#4] ;693 +000e2e e4e2 B |L2.2038| + |L2.3632| +000e30 4328 ORRS r0,r0,r5 ;655 +000e32 74a0 STRB r0,[r4,#0x12] ;655 +000e34 7ce0 LDRB r0,[r4,#0x13] ;656 ; c9_read_flag2 +000e36 2802 CMP r0,#2 ;656 +000e38 d901 BLS |L2.3646| +000e3a 74e1 STRB r1,[r4,#0x13] ;657 +000e3c e00f B |L2.3678| + |L2.3646| +000e3e 2802 CMP r0,#2 ;659 +000e40 d30d BCC |L2.3678| +000e42 2076 MOVS r0,#0x76 ;661 +000e44 216f MOVS r1,#0x6f ;661 +000e46 9007 STR r0,[sp,#0x1c] ;661 +000e48 9209 STR r2,[sp,#0x24] ;661 +000e4a 9106 STR r1,[sp,#0x18] ;661 +000e4c 9008 STR r0,[sp,#0x20] ;661 +000e4e 236b MOVS r3,#0x6b ;661 +000e50 226e MOVS r2,#0x6e ;661 +000e52 2124 MOVS r1,#0x24 ;661 +000e54 2011 MOVS r0,#0x11 ;661 +000e56 ad02 ADD r5,sp,#8 ;661 +000e58 c50f STM r5!,{r0-r3} ;661 +000e5a 211c MOVS r1,#0x1c ;661 +000e5c e00c B |L2.3704| + |L2.3678| +000e5e 2078 MOVS r0,#0x78 ;670 +000e60 2172 MOVS r1,#0x72 ;670 +000e62 9007 STR r0,[sp,#0x1c] ;670 +000e64 9008 STR r0,[sp,#0x20] ;670 +000e66 9106 STR r1,[sp,#0x18] ;670 +000e68 9009 STR r0,[sp,#0x24] ;670 +000e6a 236e MOVS r3,#0x6e ;670 +000e6c 2270 MOVS r2,#0x70 ;670 +000e6e 211e MOVS r1,#0x1e ;670 +000e70 200b MOVS r0,#0xb ;670 +000e72 ad02 ADD r5,sp,#8 ;670 +000e74 c50f STM r5!,{r0-r3} ;670 +000e76 2116 MOVS r1,#0x16 ;670 + |L2.3704| +000e78 202a MOVS r0,#0x2a ;670 +000e7a 9101 STR r1,[sp,#4] ;670 +000e7c 9000 STR r0,[sp,#0] ;670 +000e7e 230a MOVS r3,#0xa ;670 +000e80 2200 MOVS r2,#0 ;670 +000e82 211c MOVS r1,#0x1c ;670 +000e84 6aa0 LDR r0,[r4,#0x28] ;670 ; g_rx_ctrl_handle +000e86 f7fffffe BL hal_dsi_rx_ctrl_send_ack_cmd +000e8a 7ce0 LDRB r0,[r4,#0x13] ;677 ; c9_read_flag2 +000e8c 1c40 ADDS r0,r0,#1 ;677 +000e8e 74e0 STRB r0,[r4,#0x13] ;677 + |L2.3728| +000e90 e431 B |L2.1782| + |L2.3730| +000e92 2102 MOVS r1,#2 ;681 +000e94 4308 ORRS r0,r0,r1 ;681 +000e96 74a0 STRB r0,[r4,#0x12] ;681 +000e98 7ce0 LDRB r0,[r4,#0x13] ;682 ; c9_read_flag2 +000e9a 2802 CMP r0,#2 ;682 +000e9c d90d BLS |L2.3770| +000e9e 2174 MOVS r1,#0x74 ;684 +000ea0 2071 MOVS r0,#0x71 ;684 +000ea2 9208 STR r2,[sp,#0x20] ;684 +000ea4 9109 STR r1,[sp,#0x24] ;684 +000ea6 9007 STR r0,[sp,#0x1c] ;684 +000ea8 2273 MOVS r2,#0x73 ;684 +000eaa 2375 MOVS r3,#0x75 ;684 +000eac 2176 MOVS r1,#0x76 ;684 +000eae ad04 ADD r5,sp,#0x10 ;684 +000eb0 9203 STR r2,[sp,#0xc] ;684 +000eb2 9002 STR r0,[sp,#8] ;684 +000eb4 c50b STM r5!,{r0,r1,r3} ;684 +000eb6 216f MOVS r1,#0x6f ;684 +000eb8 e0bd B |L2.4150| + |L2.3770| +000eba 2075 MOVS r0,#0x75 ;693 +000ebc 2178 MOVS r1,#0x78 ;693 +000ebe 2373 MOVS r3,#0x73 ;693 +000ec0 9307 STR r3,[sp,#0x1c] ;693 +000ec2 9206 STR r2,[sp,#0x18] ;693 +000ec4 9108 STR r1,[sp,#0x20] ;693 +000ec6 9009 STR r0,[sp,#0x24] ;693 +000ec8 9005 STR r0,[sp,#0x14] ;693 +000eca 2372 MOVS r3,#0x72 ;693 +000ecc 2274 MOVS r2,#0x74 ;693 +000ece 2171 MOVS r1,#0x71 ;693 +000ed0 ad02 ADD r5,sp,#8 ;693 +000ed2 c50e STM r5!,{r1-r3} ;693 +000ed4 206d MOVS r0,#0x6d ;693 +000ed6 216f MOVS r1,#0x6f ;693 +000ed8 f7fff977 BL |L2.458| + |L2.3804| +000edc 236f MOVS r3,#0x6f ;714 +000ede 207a MOVS r0,#0x7a ;714 +000ee0 265d MOVS r6,#0x5d ;714 +000ee2 2579 MOVS r5,#0x79 ;714 +000ee4 9309 STR r3,[sp,#0x24] ;714 +000ee6 9506 STR r5,[sp,#0x18] ;714 +000ee8 9007 STR r0,[sp,#0x1c] ;714 +000eea 2363 MOVS r3,#0x63 ;714 +000eec 9005 STR r0,[sp,#0x14] ;714 +000eee 9608 STR r6,[sp,#0x20] ;714 +000ef0 255a MOVS r5,#0x5a ;714 +000ef2 9304 STR r3,[sp,#0x10] ;714 +000ef4 2070 MOVS r0,#0x70 ;714 +000ef6 9103 STR r1,[sp,#0xc] ;714 +000ef8 466f MOV r7,sp ;714 +000efa c725 STM r7!,{r0,r2,r5} ;714 +000efc 230a MOVS r3,#0xa ;714 + |L2.3838| +000efe 2200 MOVS r2,#0 ;816 +000f00 211c MOVS r1,#0x1c ;816 +000f02 6aa0 LDR r0,[r4,#0x28] ;816 ; g_rx_ctrl_handle +000f04 f7fffffe BL hal_dsi_rx_ctrl_send_ack_cmd +000f08 e433 B |L2.1906| + |L2.3850| +000f0a 7467 STRB r7,[r4,#0x11] ;726 +000f0c 7ca0 LDRB r0,[r4,#0x12] ;728 ; c9_read_flag +000f0e 2244 MOVS r2,#0x44 ;731 +000f10 0900 LSRS r0,r0,#4 ;728 +000f12 0100 LSLS r0,r0,#4 ;728 +000f14 74a0 STRB r0,[r4,#0x12] ;728 +000f16 2040 MOVS r0,#0x40 ;731 +000f18 236d MOVS r3,#0x6d ;731 + |L2.3866| +000f1a 9300 STR r3,[sp,#0] ;529 +000f1c 9201 STR r2,[sp,#4] ;529 +000f1e 9002 STR r0,[sp,#8] ;529 +000f20 e01c B |L2.3932| + |L2.3874| +000f22 7ce0 LDRB r0,[r4,#0x13] ;753 ; c9_read_flag2 +000f24 2802 CMP r0,#2 ;753 +000f26 d908 BLS |L2.3898| +000f28 7d20 LDRB r0,[r4,#0x14] ;755 ; c9_read_flag3 +000f2a 2800 CMP r0,#0 ;755 +000f2c d001 BEQ |L2.3890| +000f2e 7521 STRB r1,[r4,#0x14] ;756 +000f30 e001 B |L2.3894| + |L2.3890| +000f32 7525 STRB r5,[r4,#0x14] ;758 +000f34 7467 STRB r7,[r4,#0x11] ;761 + |L2.3894| +000f36 2058 MOVS r0,#0x58 ;762 +000f38 e4ae B |L2.2200| + |L2.3898| +000f3a 74a7 STRB r7,[r4,#0x12] ;769 +000f3c 2069 MOVS r0,#0x69 ;770 +000f3e e4ab B |L2.2200| + |L2.3904| +000f40 2827 CMP r0,#0x27 ;792 +000f42 d013 BEQ |L2.3948| +000f44 280a CMP r0,#0xa ;801 +000f46 d050 BEQ |L2.4074| +000f48 2804 CMP r0,#4 ;835 +000f4a d1a1 BNE |L2.3728| +000f4c 2020 MOVS r0,#0x20 ;837 +000f4e 74a0 STRB r0,[r4,#0x12] ;837 +000f50 7467 STRB r7,[r4,#0x11] ;838 +000f52 7421 STRB r1,[r4,#0x10] ;840 +000f54 206b MOVS r0,#0x6b ;841 +000f56 9101 STR r1,[sp,#4] ;841 +000f58 9102 STR r1,[sp,#8] ;841 +000f5a 9000 STR r0,[sp,#0] ;841 + |L2.3932| +000f5c 9103 STR r1,[sp,#0xc] ;841 + |L2.3934| +000f5e 2304 MOVS r3,#4 ;841 +000f60 2200 MOVS r2,#0 ;841 +000f62 211c MOVS r1,#0x1c ;841 +000f64 6aa0 LDR r0,[r4,#0x28] ;841 ; g_rx_ctrl_handle +000f66 f7fffffe BL hal_dsi_rx_ctrl_send_ack_cmd +000f6a e48d B |L2.2184| + |L2.3948| +000f6c 2061 MOVS r0,#0x61 ;794 +000f6e 9023 STR r0,[sp,#0x8c] ;794 +000f70 9124 STR r1,[sp,#0x90] ;794 +000f72 2676 MOVS r6,#0x76 ;794 +000f74 961f STR r6,[sp,#0x7c] ;794 +000f76 207a MOVS r0,#0x7a ;794 +000f78 236c MOVS r3,#0x6c ;794 +000f7a 2554 MOVS r5,#0x54 ;794 +000f7c 9126 STR r1,[sp,#0x98] ;794 +000f7e 9521 STR r5,[sp,#0x84] ;794 +000f80 9322 STR r3,[sp,#0x88] ;794 +000f82 2380 MOVS r3,#0x80 ;794 +000f84 267e MOVS r6,#0x7e ;794 +000f86 931d STR r3,[sp,#0x74] ;794 +000f88 277b MOVS r7,#0x7b ;794 +000f8a 257f MOVS r5,#0x7f ;794 +000f8c 237d MOVS r3,#0x7d ;794 +000f8e 971e STR r7,[sp,#0x78] ;794 +000f90 9619 STR r6,[sp,#0x64] ;794 +000f92 9010 STR r0,[sp,#0x40] ;794 +000f94 9314 STR r3,[sp,#0x50] ;794 +000f96 901c STR r0,[sp,#0x70] ;794 +000f98 9617 STR r6,[sp,#0x5c] ;794 +000f9a 9318 STR r3,[sp,#0x60] ;794 +000f9c 951a STR r5,[sp,#0x68] ;794 +000f9e 9512 STR r5,[sp,#0x48] ;794 +000fa0 9125 STR r1,[sp,#0x94] ;794 +000fa2 900f STR r0,[sp,#0x3c] ;794 +000fa4 9315 STR r3,[sp,#0x54] ;794 +000fa6 900d STR r0,[sp,#0x34] ;794 +000fa8 9020 STR r0,[sp,#0x80] ;794 +000faa 951b STR r5,[sp,#0x6c] ;794 +000fac 9613 STR r6,[sp,#0x4c] ;794 +000fae 9011 STR r0,[sp,#0x44] ;794 +000fb0 970e STR r7,[sp,#0x38] ;794 +000fb2 920a STR r2,[sp,#0x28] ;794 +000fb4 9209 STR r2,[sp,#0x24] ;794 +000fb6 970c STR r7,[sp,#0x30] ;794 +000fb8 9616 STR r6,[sp,#0x58] ;794 +000fba 920b STR r2,[sp,#0x2c] ;794 +000fbc 2058 MOVS r0,#0x58 ;794 +000fbe 2369 MOVS r3,#0x69 ;794 +000fc0 9007 STR r0,[sp,#0x1c] ;794 +000fc2 2264 MOVS r2,#0x64 ;794 +000fc4 9308 STR r3,[sp,#0x20] ;794 +000fc6 202a MOVS r0,#0x2a ;794 +000fc8 9206 STR r2,[sp,#0x18] ;794 +000fca 9005 STR r0,[sp,#0x14] ;794 +000fcc 2328 MOVS r3,#0x28 ;794 +000fce 2221 MOVS r2,#0x21 ;794 +000fd0 9304 STR r3,[sp,#0x10] ;794 +000fd2 9103 STR r1,[sp,#0xc] ;794 +000fd4 2050 MOVS r0,#0x50 ;794 +000fd6 9200 STR r2,[sp,#0] ;794 +000fd8 9101 STR r1,[sp,#4] ;794 +000fda 9002 STR r0,[sp,#8] ;794 +000fdc 2327 MOVS r3,#0x27 ;794 +000fde 2200 MOVS r2,#0 ;794 +000fe0 211c MOVS r1,#0x1c ;794 +000fe2 6aa0 LDR r0,[r4,#0x28] ;794 ; g_rx_ctrl_handle +000fe4 f7fffffe BL hal_dsi_rx_ctrl_send_ack_cmd +000fe8 e44e B |L2.2184| + |L2.4074| +000fea 7c20 LDRB r0,[r4,#0x10] ;803 ; b3_read_flag +000fec 2800 CMP r0,#0 ;803 +000fee d013 BEQ |L2.4120| +000ff0 2801 CMP r0,#1 ;813 +000ff2 d023 BEQ |L2.4156| +000ff4 7421 STRB r1,[r4,#0x10] ;825 +000ff6 2370 MOVS r3,#0x70 ;826 +000ff8 2260 MOVS r2,#0x60 ;826 +000ffa 217c MOVS r1,#0x7c ;826 +000ffc 207a MOVS r0,#0x7a ;826 +000ffe ad06 ADD r5,sp,#0x18 ;826 +001000 c50f STM r5!,{r0-r3} ;826 +001002 207e MOVS r0,#0x7e ;826 +001004 2172 MOVS r1,#0x72 ;826 +001006 226c MOVS r2,#0x6c ;826 +001008 236f MOVS r3,#0x6f ;826 +00100a 9104 STR r1,[sp,#0x10] ;826 +00100c 9203 STR r2,[sp,#0xc] ;826 +00100e 9005 STR r0,[sp,#0x14] ;826 +001010 2180 MOVS r1,#0x80 ;826 +001012 466d MOV r5,sp ;826 +001014 c50b STM r5!,{r0,r1,r3} ;826 +001016 e6c4 B |L2.3490| + |L2.4120| +001018 7425 STRB r5,[r4,#0x10] ;805 +00101a 207d MOVS r0,#0x7d ;806 +00101c 217e MOVS r1,#0x7e ;806 +00101e 9007 STR r0,[sp,#0x1c] ;806 +001020 9206 STR r2,[sp,#0x18] ;806 +001022 9108 STR r1,[sp,#0x20] ;806 +001024 9009 STR r0,[sp,#0x24] ;806 +001026 2374 MOVS r3,#0x74 ;806 +001028 2276 MOVS r2,#0x76 ;806 +00102a 2173 MOVS r1,#0x73 ;806 +00102c 205f MOVS r0,#0x5f ;806 +00102e ae02 ADD r6,sp,#8 ;806 +001030 c60f STM r6!,{r0-r3} ;806 +001032 216a MOVS r1,#0x6a ;806 +001034 202a MOVS r0,#0x2a ;806 + |L2.4150| +001036 9101 STR r1,[sp,#4] ;705 +001038 9000 STR r0,[sp,#0] ;705 +00103a e6b2 B |L2.3490| + |L2.4156| +00103c 2002 MOVS r0,#2 ;815 +00103e 7420 STRB r0,[r4,#0x10] ;815 +001040 217f MOVS r1,#0x7f ;816 +001042 2080 MOVS r0,#0x80 ;816 +001044 9006 STR r0,[sp,#0x18] ;816 +001046 9108 STR r1,[sp,#0x20] ;816 +001048 9109 STR r1,[sp,#0x24] ;816 +00104a 9007 STR r0,[sp,#0x1c] ;816 +00104c 217c MOVS r1,#0x7c ;816 +00104e 227d MOVS r2,#0x7d ;816 +001050 207a MOVS r0,#0x7a ;816 +001052 ab02 ADD r3,sp,#8 ;816 +001054 c307 STM r3!,{r0-r2} ;816 +001056 9105 STR r1,[sp,#0x14] ;816 +001058 217b MOVS r1,#0x7b ;816 +00105a e7ec B |L2.4150| +;;;866 + ENDP + + + AREA ||i.ap_demo||, CODE, READONLY, ALIGN=2 + + ap_demo PROC +;;;3126 //static uint32_t loop_count=1; +;;;3127 void ap_demo(void) +000000 b51c PUSH {r2-r4,lr} +;;;3128 { +;;;3129 hal_gpio_init_output(IO_PAD_TD_LEDPWM, IO_LVL_LOW); +000002 2100 MOVS r1,#0 +000004 200a MOVS r0,#0xa +000006 f7fffffe BL hal_gpio_init_output +;;;3130 hal_gpio_init_output(IO_PAD_PWMEN, IO_LVL_LOW);//LED_ON +00000a 2100 MOVS r1,#0 +00000c 2013 MOVS r0,#0x13 +00000e f7fffffe BL hal_gpio_init_output +;;;3131 hal_gpio_init_output(IO_PAD_AP_SWIRE, IO_LVL_LOW);//IO_LVL_LOW +000012 2100 MOVS r1,#0 +000014 2004 MOVS r0,#4 +000016 f7fffffe BL hal_gpio_init_output +;;;3132 hal_gpio_init_output(IO_PAD_ADCIN, IO_LVL_LOW);//IO_LVL_LOW +00001a 2100 MOVS r1,#0 +00001c 2014 MOVS r0,#0x14 +00001e f7fffffe BL hal_gpio_init_output +;;;3133 +;;;3134 /* mipi rxʼ */ +;;;3135 app_tp_I2C_init(); +000022 f7fffffe BL app_tp_I2C_init +;;;3136 open_mipi_rx(); +000026 f7fffffe BL open_mipi_rx +;;;3137 +;;;3138 // TAU_LOGD("S20u 568 [%s %s]", __DATE__, __TIME__); +;;;3139 TAU_LOGD("S20U 568 V100 20230713"); +;;;3140 +;;;3141 /* mipi tx ʼ*/ +;;;3142 init_mipi_tx(); +00002a f7fffffe BL init_mipi_tx +;;;3143 +;;;3144 /* touch ģʼ */ +;;;3145 #ifndef DISPLAY_ONLY +;;;3146 app_tp_init(); +00002e f7fffffe BL app_tp_init +;;;3147 phone_86_flag=1; +000032 4c3c LDR r4,|L3.292| +000034 2501 MOVS r5,#1 +000036 71e5 STRB r5,[r4,#7] +;;;3148 phone_A6_flag=1; +000038 7225 STRB r5,[r4,#8] +;;;3149 phone_start_flag=0; +00003a 2600 MOVS r6,#0 +;;;3150 #endif +;;;3151 +;;;3152 #ifdef ADD_TIMER3_FUNCTION +;;;3153 tp_sleep_count=0; +00003c 483a LDR r0,|L3.296| +00003e 7266 STRB r6,[r4,#9] ;3149 +000040 7006 STRB r6,[r0,#0] +;;;3154 phone_DisplayOFF_count=1; +000042 8325 STRH r5,[r4,#0x18] +;;;3155 hal_timer_init(TIMER_NUM3); +000044 2003 MOVS r0,#3 +000046 f7fffffe BL hal_timer_init +;;;3156 hal_timer_start(TIMER_NUM3, 10, soft_timer3_cb, NULL); +00004a 2300 MOVS r3,#0 +00004c 4a37 LDR r2,|L3.300| +00004e 210a MOVS r1,#0xa +000050 2003 MOVS r0,#3 +000052 f7fffffe BL hal_timer_start +000056 f7fffffe BL init_panel +00005a 6ae0 LDR r0,[r4,#0x2c] ; g_tx_ctrl_handle +00005c f7fffffe BL hal_dsi_tx_ctrl_start +000060 2087 MOVS r0,#0x87 +000062 f7fffffe BL delayMs +000066 2351 MOVS r3,#0x51 +000068 2203 MOVS r2,#3 +00006a 2100 MOVS r1,#0 +00006c 2039 MOVS r0,#0x39 +00006e 9600 STR r6,[sp,#0] +000070 9501 STR r5,[sp,#4] +000072 f7fffffe BL hal_dsi_tx_ctrl_write_cmd +000076 2329 MOVS r3,#0x29 +000078 2201 MOVS r2,#1 +00007a 2100 MOVS r1,#0 +00007c 2005 MOVS r0,#5 +00007e f7fffffe BL hal_dsi_tx_ctrl_write_cmd +000082 2128 MOVS r1,#0x28 +000084 2002 MOVS r0,#2 +000086 f7fffffe BL Gpio_swire_output +;;;3157 #endif +;;;3158 +;;;3159 /* ʼ */ +;;;3160 tx_display_on(); +;;;3161 start_display_on = false; +00008a 7026 STRB r6,[r4,#0] +;;;3162 panel_display_done = true; +00008c 7165 STRB r5,[r4,#5] +;;;3163 +;;;3164 hal_gpio_set_ap_reset_int(ENABLE, ap_reset_cb, DETECT_RISING_EDGE); +00008e 2202 MOVS r2,#2 +000090 4927 LDR r1,|L3.304| +000092 2001 MOVS r0,#1 +000094 f7fffffe BL hal_gpio_set_ap_reset_int +;;;3165 #ifndef DISPLAY_ONLY +;;;3166 app_tp_phone_clear_reset_on(); +000098 f7fffffe BL app_tp_phone_clear_reset_on +;;;3167 #ifndef DISABLE_TDDI_I2C_FUNCTION +;;;3168 /* TP ģͨѶʼ */ +;;;3169 delayMs(50); +00009c 2032 MOVS r0,#0x32 +00009e f7fffffe BL delayMs +;;;3170 // printf("tp start begin\n"); +;;;3171 app_tp_transfer_screen_start(); +0000a2 f7fffffe BL app_tp_transfer_screen_start +;;;3172 // printf("tp start end\n"); +;;;3173 #endif +;;;3174 #endif +;;;3175 while (1) +;;;3176 { +;;;3177 if(g_mipi_path_off == false){ +;;;3178 while (hal_dsi_rx_ctrl_dsc_async_handler(g_rx_ctrl_handle)); +;;;3179 +;;;3180 #if ADD_TP_CALIBRATION +;;;3181 tp_heartbeat_exec(); +;;;3182 app_tp_calibration_exec(); +;;;3183 ap_tp_st_touch_scan_point_record_event_exec(); +;;;3184 #endif +;;;3185 +;;;3186 +;;;3187 #if 1//绰Ϩ +;;;3188 if (phone_off_flag==0) +;;;3189 { +;;;3190 if(Flag_blacklight_EN) +0000a6 4f23 LDR r7,|L3.308| + |L3.168| +0000a8 78a0 LDRB r0,[r4,#2] ;3177 ; g_mipi_path_off +0000aa 2800 CMP r0,#0 ;3177 +0000ac d11f BNE |L3.238| + |L3.174| +0000ae 6aa0 LDR r0,[r4,#0x28] ;3178 ; g_rx_ctrl_handle +0000b0 f7fffffe BL hal_dsi_rx_ctrl_dsc_async_handler +0000b4 2800 CMP r0,#0 ;3178 +0000b6 d1fa BNE |L3.174| +0000b8 f7fffffe BL tp_heartbeat_exec +0000bc f7fffffe BL app_tp_calibration_exec +0000c0 f7fffffe BL ap_tp_st_touch_scan_point_record_event_exec +0000c4 78e0 LDRB r0,[r4,#3] ;3188 ; phone_off_flag +0000c6 2800 CMP r0,#0 ;3188 +;;;3191 { +;;;3192 phone_off_flag =1; +;;;3193 hal_dsi_tx_ctrl_write_cmd(0x39, 0, 2, 0x28, 0x00); +;;;3194 } +;;;3195 } +;;;3196 else +;;;3197 { +;;;3198 if(Flag_blacklight_EN ==0) +0000c8 7838 LDRB r0,[r7,#0] ; Flag_blacklight_EN +0000ca d002 BEQ |L3.210| +0000cc 2800 CMP r0,#0 +0000ce d006 BEQ |L3.222| +0000d0 e00d B |L3.238| + |L3.210| +0000d2 2800 CMP r0,#0 ;3190 +0000d4 d00b BEQ |L3.238| +0000d6 70e5 STRB r5,[r4,#3] ;3192 +0000d8 2328 MOVS r3,#0x28 ;3193 +0000da 9600 STR r6,[sp,#0] ;3193 +0000dc e002 B |L3.228| + |L3.222| +;;;3199 { +;;;3200 phone_off_flag =0; +0000de 70e6 STRB r6,[r4,#3] +;;;3201 hal_dsi_tx_ctrl_write_cmd(0x39, 0, 2, 0x29, 0x00); +0000e0 2329 MOVS r3,#0x29 +0000e2 9600 STR r6,[sp,#0] + |L3.228| +0000e4 2202 MOVS r2,#2 +0000e6 2100 MOVS r1,#0 +0000e8 2039 MOVS r0,#0x39 +0000ea f7fffffe BL hal_dsi_tx_ctrl_write_cmd + |L3.238| +;;;3202 } +;;;3203 } +;;;3204 #endif +;;;3205 } +;;;3206 +;;;3207 if(phone_DisplayOFF_flag==1) +0000ee 7aa0 LDRB r0,[r4,#0xa] ; phone_DisplayOFF_flag +0000f0 2801 CMP r0,#1 +;;;3208 { +;;;3209 if(phone_DisplayOFF_count>800) +;;;3210 { +;;;3211 phone_DisplayOFF_count=0; +;;;3212 phone_start_flag=1; +;;;3213 } +;;;3214 } +;;;3215 else +;;;3216 { +;;;3217 if(phone_DisplayOFF_count>20) +0000f2 8b20 LDRH r0,[r4,#0x18] ; phone_DisplayOFF_count +0000f4 d00f BEQ |L3.278| +0000f6 2814 CMP r0,#0x14 +0000f8 d905 BLS |L3.262| +;;;3218 { +;;;3219 phone_DisplayOFF_count=0; +0000fa 8326 STRH r6,[r4,#0x18] +;;;3220 phone_start_flag=1; +0000fc 7265 STRB r5,[r4,#9] +;;;3221 hal_gpio_set_output_data(IO_PAD_AP_INT, IO_LVL_LOW);//ͣ˫2~3s޴.jason_su +0000fe 2100 MOVS r1,#0 +000100 2002 MOVS r0,#2 +000102 f7fffffe BL hal_gpio_set_output_data + |L3.262| +;;;3222 } +;;;3223 } +;;;3224 app_tp_transfer_screen_int(); +000106 f7fffffe BL app_tp_transfer_screen_int +;;;3225 +;;;3226 #ifdef USE_FOR_SUMSUNG_S20U +;;;3227 if(phone_start_flag==2) +00010a 7a60 LDRB r0,[r4,#9] ; phone_start_flag +00010c 2802 CMP r0,#2 +00010e d1cb BNE |L3.168| +;;;3228 { +;;;3229 +;;;3230 S20_Start_init(); +000110 f7fffffe BL S20_Start_init +000114 e7c8 B |L3.168| + |L3.278| +000116 2119 MOVS r1,#0x19 ;3209 +000118 0149 LSLS r1,r1,#5 ;3209 +00011a 4288 CMP r0,r1 ;3209 +00011c d9f3 BLS |L3.262| +00011e 8326 STRH r6,[r4,#0x18] ;3211 +000120 7265 STRB r5,[r4,#9] ;3212 +000122 e7f0 B |L3.262| +;;;3231 } +;;;3232 #endif +;;;3233 } +;;;3234 } + ENDP + + |L3.292| + DCD ||.data|| + |L3.296| + DCD tp_sleep_count + |L3.300| + DCD soft_timer3_cb + |L3.304| + DCD ap_reset_cb + |L3.308| + DCD Flag_blacklight_EN + + AREA ||i.ap_get_reg_ca||, CODE, READONLY, ALIGN=2 + + ap_get_reg_ca PROC +;;;1584 +;;;1585 static bool ap_get_reg_ca(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +000000 4808 LDR r0,|L4.36| +;;;1586 { +;;;1587 bl_adj_flag =0; +000002 2200 MOVS r2,#0 +000004 7382 STRB r2,[r0,#0xe] +;;;1588 value_reg_ca = (dcs_packet->packet_param[0] << 8)+ dcs_packet->packet_param[1]; +000006 68c9 LDR r1,[r1,#0xc] +000008 780a LDRB r2,[r1,#0] +00000a 784b LDRB r3,[r1,#1] +00000c 0212 LSLS r2,r2,#8 +00000e 18d2 ADDS r2,r2,r3 +000010 6342 STR r2,[r0,#0x34] ;1586 ; value_reg_ca +000012 d103 BNE |L4.28| +;;;1589 if (value_reg_ca ==0) +;;;1590 { +;;;1591 bl_adj_flag =1; +000014 2201 MOVS r2,#1 +000016 7382 STRB r2,[r0,#0xe] +;;;1592 value_reg_ca = dcs_packet->packet_param[5]; +000018 7949 LDRB r1,[r1,#5] +00001a 6341 STR r1,[r0,#0x34] ; value_reg_ca + |L4.28| +;;;1593 } +;;;1594 value_reg_b1_bak = value_reg_b1; +00001c 8b41 LDRH r1,[r0,#0x1a] ; value_reg_b1 +00001e 8381 STRH r1,[r0,#0x1c] +;;;1595 return true; +000020 2001 MOVS r0,#1 +;;;1596 } +000022 4770 BX lr +;;;1597 + ENDP + + |L4.36| + DCD ||.data|| + + AREA ||i.ap_get_reg_df||, CODE, READONLY, ALIGN=2 + + ap_get_reg_df PROC +;;;1620 +;;;1621 static bool ap_get_reg_df(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +000000 b570 PUSH {r4-r6,lr} +;;;1622 { +000002 b08e SUB sp,sp,#0x38 +;;;1623 ccm_coef_t ccm; +;;;1624 ccm.coef_c00 = 255; +;;;1625 ccm.coef_c01 = 0; +000004 2200 MOVS r2,#0 +000006 20ff MOVS r0,#0xff ;1624 +;;;1626 ccm.coef_c02 = 0; +000008 9206 STR r2,[sp,#0x18] +;;;1627 ccm.coef_c10 = 0; +00000a 9207 STR r2,[sp,#0x1c] +;;;1628 ccm.coef_c11 = 255; +00000c 9005 STR r0,[sp,#0x14] +;;;1629 ccm.coef_c12 = 0; +00000e 9208 STR r2,[sp,#0x20] +;;;1630 ccm.coef_c20 = 0; +000010 920a STR r2,[sp,#0x28] +;;;1631 ccm.coef_c21 = 0; +000012 920b STR r2,[sp,#0x2c] +;;;1632 ccm.coef_c22 = 255; +000014 9009 STR r0,[sp,#0x24] +;;;1633 +;;;1634 #ifdef ADD_PANEL_DISPLAY_MODE +;;;1635 value_reg_df = (dcs_packet->packet_param[35] << 8) + dcs_packet->packet_param[33]; +000016 920c STR r2,[sp,#0x30] +000018 900d STR r0,[sp,#0x34] +00001a 68cb LDR r3,[r1,#0xc] +00001c 4619 MOV r1,r3 +00001e 3120 ADDS r1,r1,#0x20 +000020 78ca LDRB r2,[r1,#3] +000022 784c LDRB r4,[r1,#1] +000024 0212 LSLS r2,r2,#8 +000026 1914 ADDS r4,r2,r4 +000028 4a20 LDR r2,|L5.172| +;;;1636 panel_mode = dcs_packet->packet_param[0]; +00002a 6394 STR r4,[r2,#0x38] ; value_reg_df +00002c 781d LDRB r5,[r3,#0] +00002e 73d5 STRB r5,[r2,#0xf] +;;;1637 panel_r =dcs_packet->packet_param[49]; +000030 7c4c LDRB r4,[r1,#0x11] +000032 8454 STRH r4,[r2,#0x22] +;;;1638 panel_g =dcs_packet->packet_param[51]; +000034 7ccb LDRB r3,[r1,#0x13] +000036 8493 STRH r3,[r2,#0x24] +;;;1639 panel_b =dcs_packet->packet_param[53]; +000038 7d4e LDRB r6,[r1,#0x15] +00003a 84d6 STRH r6,[r2,#0x26] +00003c a909 ADD r1,sp,#0x24 ;1623 +;;;1640 // TAU_LOGD("value_reg_df[%4x],panel_mode[%4x],panel_r[%4x],panel_g[%4x],panel_b[%4x]", value_reg_df,panel_mode,panel_r,panel_g,panel_b); +;;;1641 +;;;1642 if (panel_mode ==00) +00003e 2d00 CMP r5,#0 +000040 d01e BEQ |L5.128| +;;;1643 { +;;;1644 //ģʽ +;;;1645 +;;;1646 #ifdef USE_FOR_S10_BLUE_MODE +;;;1647 //panel_r =256-RATIO_VALUE*(0xFF-panel_r); +;;;1648 //panel_g =256-RATIO_VALUE*(0xFF-panel_g); +;;;1649 //panel_b =256-RATIO_VALUE*(0xFF-panel_b); +;;;1650 // hal_dsi_rx_ctrl_set_cus_pq_gain(g_rx_ctrl_handle,panel_r,panel_g,panel_b); +;;;1651 ccm.coef_c00 = panel_r; +;;;1652 ccm.coef_c11 = panel_g; +;;;1653 ccm.coef_c22 = panel_b; +;;;1654 hal_dsi_tx_ctrl_set_ccm(ccm); +;;;1655 +;;;1656 #else +;;;1657 +;;;1658 value_reg_df =value_reg_df&0xFF; +;;;1659 switch(value_reg_df) +;;;1660 { +;;;1661 case 0xC1: +;;;1662 case 0xC3: +;;;1663 value_blue = BLUE_MIN; +;;;1664 break; +;;;1665 +;;;1666 case 0xCF: +;;;1667 case 0xD0: +;;;1668 value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)/BLUE_STEP; +;;;1669 break; +;;;1670 +;;;1671 case 0xD8: +;;;1672 value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*2/BLUE_STEP; +;;;1673 break; +;;;1674 +;;;1675 case 0xDE: +;;;1676 value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*3/BLUE_STEP; +;;;1677 break; +;;;1678 +;;;1679 case 0xE4: +;;;1680 case 0xE5: +;;;1681 value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*4/BLUE_STEP; +;;;1682 break; +;;;1683 +;;;1684 case 0xE9: +;;;1685 case 0xEA: +;;;1686 value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*5/BLUE_STEP; +;;;1687 break; +;;;1688 +;;;1689 case 0xED: +;;;1690 case 0xEE: +;;;1691 value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*6/BLUE_STEP; +;;;1692 break; +;;;1693 +;;;1694 case 0xF1: +;;;1695 case 0xF2: +;;;1696 value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*7/BLUE_STEP; +;;;1697 break; +;;;1698 +;;;1699 case 0xF4: +;;;1700 case 0xF5: +;;;1701 value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*8/BLUE_STEP; +;;;1702 break; +;;;1703 +;;;1704 case 0xF7: +;;;1705 case 0xF8: +;;;1706 value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*9/BLUE_STEP; +;;;1707 break; +;;;1708 +;;;1709 case 0xFA: +;;;1710 value_blue = BLUE_MAX; +;;;1711 break; +;;;1712 +;;;1713 default: +;;;1714 case 0xFF: +;;;1715 value_blue = 0; +;;;1716 break; +;;;1717 +;;;1718 } +;;;1719 hal_dsi_rx_ctrl_set_cus_pq_gain(g_rx_ctrl_handle,256,256,256); +;;;1720 hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0x84, value_blue); +;;;1721 +;;;1722 #endif +;;;1723 +;;;1724 } +;;;1725 else +;;;1726 { +;;;1727 #ifndef USE_FOR_S10_BLUE_MODE +;;;1728 value_blue =0; +;;;1729 hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0x84, value_blue); //ģʽs8+/s9+ +;;;1730 #endif +;;;1731 +;;;1732 //һ㣬ЧԡҪݿͻҪϸ +;;;1733 panel_r =208-RATIO_VALUE*(0xFF-panel_r); //230 +000042 1b04 SUBS r4,r0,r4 +000044 0064 LSLS r4,r4,#1 +000046 25d0 MOVS r5,#0xd0 +000048 1b2c SUBS r4,r5,r4 +;;;1734 panel_g =218-RATIO_VALUE*(0xFF-panel_g); //235 +00004a 1ac3 SUBS r3,r0,r3 +00004c 25da MOVS r5,#0xda +00004e 005b LSLS r3,r3,#1 +;;;1735 panel_b =218-RATIO_VALUE*(0xFF-panel_b); //235 +000050 1b80 SUBS r0,r0,r6 +000052 b2a4 UXTH r4,r4 ;1733 +000054 1aeb SUBS r3,r5,r3 ;1734 +000056 0040 LSLS r0,r0,#1 +000058 8454 STRH r4,[r2,#0x22] ;1733 +00005a b29b UXTH r3,r3 ;1734 +00005c 1a28 SUBS r0,r5,r0 +00005e 8493 STRH r3,[r2,#0x24] ;1734 +000060 b280 UXTH r0,r0 +000062 84d0 STRH r0,[r2,#0x26] +;;;1736 // hal_dsi_rx_ctrl_set_cus_pq_gain(g_rx_ctrl_handle,panel_r,panel_g,panel_b); +;;;1737 +;;;1738 ccm.coef_c00 = panel_r; +;;;1739 ccm.coef_c11 = panel_g; +;;;1740 ccm.coef_c22 = panel_b; +;;;1741 if((panel_r == 256)&&(panel_g == 256)&&(panel_b == 256)) +000064 22ff MOVS r2,#0xff +000066 3201 ADDS r2,#1 +000068 9405 STR r4,[sp,#0x14] +00006a 9309 STR r3,[sp,#0x24] +00006c 900d STR r0,[sp,#0x34] +00006e 4294 CMP r4,r2 +000070 d110 BNE |L5.148| +000072 4293 CMP r3,r2 +000074 d10e BNE |L5.148| +000076 4290 CMP r0,r2 +000078 d10c BNE |L5.148| +;;;1742 { +;;;1743 blue_change_ccm(); +00007a f7fffffe BL blue_change_ccm +00007e e011 B |L5.164| + |L5.128| +000080 2214 MOVS r2,#0x14 ;1654 +000082 4668 MOV r0,sp ;1654 +000084 960d STR r6,[sp,#0x34] ;1654 +000086 9405 STR r4,[sp,#0x14] ;1654 +000088 9309 STR r3,[sp,#0x24] ;1654 +00008a f7fffffe BL __aeabi_memcpy4 +00008e ad05 ADD r5,sp,#0x14 ;1654 +000090 cd0f LDM r5!,{r0-r3} ;1654 +000092 e005 B |L5.160| + |L5.148| +;;;1744 } +;;;1745 else +;;;1746 hal_dsi_tx_ctrl_set_ccm(ccm); +000094 2214 MOVS r2,#0x14 +000096 4668 MOV r0,sp +000098 f7fffffe BL __aeabi_memcpy4 +00009c ac05 ADD r4,sp,#0x14 +00009e cc0f LDM r4!,{r0-r3} + |L5.160| +0000a0 f7fffffe BL hal_dsi_tx_ctrl_set_ccm + |L5.164| +;;;1747 } +;;;1748 +;;;1749 #ifndef USE_FOR_S10_BLUE_MODE +;;;1750 if (blue_flag==0) +;;;1751 { +;;;1752 blue_flag =1; +;;;1753 delayMs(20); +;;;1754 hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0x84, value_blue); +;;;1755 } +;;;1756 #endif +;;;1757 +;;;1758 #else +;;;1759 value_reg_df = (dcs_packet->packet_param[35] << 8) + dcs_packet->packet_param[33]; +;;;1760 +;;;1761 value_reg_df =value_reg_df&0xFF; +;;;1762 switch(value_reg_df) +;;;1763 { +;;;1764 case 0xC1: +;;;1765 case 0xC3: +;;;1766 value_blue = BLUE_MIN; +;;;1767 break; +;;;1768 +;;;1769 case 0xCF: +;;;1770 case 0xD0: +;;;1771 value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)/BLUE_STEP; +;;;1772 break; +;;;1773 +;;;1774 case 0xD8: +;;;1775 value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*2/BLUE_STEP; +;;;1776 break; +;;;1777 +;;;1778 case 0xDE: +;;;1779 value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*3/BLUE_STEP; +;;;1780 break; +;;;1781 +;;;1782 case 0xE4: +;;;1783 case 0xE5: +;;;1784 value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*4/BLUE_STEP; +;;;1785 break; +;;;1786 +;;;1787 case 0xE9: +;;;1788 case 0xEA: +;;;1789 value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*5/BLUE_STEP; +;;;1790 break; +;;;1791 +;;;1792 case 0xED: +;;;1793 case 0xEE: +;;;1794 value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*6/BLUE_STEP; +;;;1795 break; +;;;1796 +;;;1797 case 0xF1: +;;;1798 case 0xF2: +;;;1799 value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*7/BLUE_STEP; +;;;1800 break; +;;;1801 +;;;1802 case 0xF4: +;;;1803 case 0xF5: +;;;1804 value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*8/BLUE_STEP; +;;;1805 break; +;;;1806 +;;;1807 case 0xF7: +;;;1808 case 0xF8: +;;;1809 value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*9/BLUE_STEP; +;;;1810 break; +;;;1811 +;;;1812 case 0xFA: +;;;1813 value_blue = BLUE_MAX; +;;;1814 break; +;;;1815 +;;;1816 default: +;;;1817 case 0xFF: +;;;1818 value_blue = 0; +;;;1819 break; +;;;1820 +;;;1821 } +;;;1822 +;;;1823 TAU_LOGD("df[%4x]", value_reg_df); +;;;1824 hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0x84, value_blue); +;;;1825 if (blue_flag==0) +;;;1826 { +;;;1827 blue_flag =1; +;;;1828 delayMs(20); +;;;1829 hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0x84, value_blue); +;;;1830 } +;;;1831 #endif +;;;1832 +;;;1833 return true; +0000a4 2001 MOVS r0,#1 +;;;1834 } +0000a6 b00e ADD sp,sp,#0x38 +0000a8 bd70 POP {r4-r6,pc} +;;;1835 + ENDP + +0000aa 0000 DCW 0x0000 + |L5.172| + DCD ||.data|| + + AREA ||i.ap_reset_cb||, CODE, READONLY, ALIGN=2 + + ap_reset_cb PROC +;;;3089 #endif +;;;3090 static void ap_reset_cb(void *data) +000000 2001 MOVS r0,#1 +;;;3091 { +;;;3092 /* лԴ */ +;;;3093 // hal_gpio_set_output_data_ex(POWER_IO_B, IO_LVL_HIGH, POWER_IO_A, IO_LVL_LOW); +;;;3094 /* VCC */ +;;;3095 TAU_LOGD("aprst................................................\n"); +;;;3096 hal_system_set_pvd(true); +000002 f7fffffe BL hal_system_set_pvd +;;;3097 hal_system_set_vcc(true); +000006 2001 MOVS r0,#1 +000008 f7fffffe BL hal_system_set_vcc +00000c f3bf8f4f DSB +000010 4904 LDR r1,|L6.36| +000012 4803 LDR r0,|L6.32| +000014 60c8 STR r0,[r1,#0xc] +000016 f3bf8f4f DSB + |L6.26| +00001a bf00 NOP +00001c e7fd B |L6.26| +;;;3098 NVIC_SystemReset(); +;;;3099 } +;;;3100 #endif + ENDP + +00001e 0000 DCW 0x0000 + |L6.32| + DCD 0x05fa0004 + |L6.36| + DCD 0xe000ed00 + + AREA ||i.ap_set_backlight||, CODE, READONLY, ALIGN=2 + + ap_set_backlight PROC +;;;1139 #if 1 // +;;;1140 static bool ap_set_backlight(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +000000 b5fe PUSH {r1-r7,lr} +;;;1141 { +;;;1142 /* AP 0xC 0xb8d , ʱ0xC,ƽҪһŻ */ +;;;1143 uint16_t temp_u16,temp_min,temp_max; +;;;1144 uint16_t temp51_min,temp51_max; +;;;1145 +;;;1146 value_reg_b1 = (dcs_packet->packet_param[0] << 8) + dcs_packet->packet_param[1]; +000002 68cb LDR r3,[r1,#0xc] +000004 4ca6 LDR r4,|L7.672| +000006 7818 LDRB r0,[r3,#0] +000008 785a LDRB r2,[r3,#1] +00000a 0200 LSLS r0,r0,#8 +00000c 1880 ADDS r0,r0,r2 +00000e 8360 STRH r0,[r4,#0x1a] +;;;1147 // printf("B1[%4x],CA[%4x] \n", value_reg_b1, value_reg_ca); +;;;1148 // TAU_LOGD("B1[%x]", value_reg_b1); +;;;1149 +;;;1150 #ifdef USE_BL_ADJ7 +;;;1151 +;;;1152 #if 0//def ADD_PWM_OUTPUT_FOR_BL +;;;1153 if (value_reg_b1 &0x8000) +;;;1154 { +;;;1155 // 60Hz +;;;1156 if(value_reg_ca >0x15FE) +;;;1157 { +;;;1158 read_bl_data = 0xFF; +;;;1159 } +;;;1160 else if(value_reg_ca >=0x1550) +;;;1161 { +;;;1162 // value_reg_ca =0x1550Ӧ105(ǵ⼶Ϊ256) +;;;1163 read_bl_data = 105+(value_reg_ca-0x1550)*150/175; +;;;1164 } +;;;1165 else +;;;1166 { +;;;1167 //value_reg_b1_bak=0xC65~0x1E4Ӧ1~104 +;;;1168 if (value_reg_b1_bak>0xC65) +;;;1169 read_bl_data =1; +;;;1170 else if (value_reg_b1_bak<0x1E4) +;;;1171 read_bl_data =104; +;;;1172 else +;;;1173 read_bl_data = 1+(0xC65-value_reg_b1_bak)*103/2689; +;;;1174 } +;;;1175 } +;;;1176 else if (value_reg_b1 &0x4000) +;;;1177 { +;;;1178 // 120Hz +;;;1179 if(value_reg_ca >0x15AD) +;;;1180 { +;;;1181 read_bl_data = 0xFF; +;;;1182 } +;;;1183 else if(value_reg_ca >=0x150F) +;;;1184 { +;;;1185 // value_reg_ca =0x15AD~0x150FӦ256~109(ǵ⼶Ϊ256) +;;;1186 read_bl_data = 109+(value_reg_ca-0x150F)*146/158; +;;;1187 } +;;;1188 else +;;;1189 { +;;;1190 //value_reg_b1_bak=0xC54~0x1E4Ӧ1~108 +;;;1191 if (value_reg_b1_bak>0xC54) +;;;1192 read_bl_data =1; +;;;1193 else if (value_reg_b1_bak<0x1E4) +;;;1194 read_bl_data =108; +;;;1195 else +;;;1196 read_bl_data = 1+(0xC54-value_reg_b1_bak)*107/2672; +;;;1197 } +;;;1198 } +;;;1199 else +;;;1200 { +;;;1201 value_reg_b1_bak = value_reg_b1; +;;;1202 if ((value_reg_ca ==0x2A00) &&(value_reg_b1 >0x500)) +;;;1203 s20_power_on_flag =1; +;;;1204 else +;;;1205 s20_power_on_flag =0; +;;;1206 } +;;;1207 +;;;1208 +;;;1209 #else +;;;1210 if (dcs_packet->param_length ==1) +000010 6888 LDR r0,[r1,#8] +000012 2801 CMP r0,#1 +000014 d17e BNE |L7.276| +000016 4620 MOV r0,r4 ;1146 +;;;1211 { +;;;1212 if (bl_adj_flag) +000018 7ba6 LDRB r6,[r4,#0xe] ; bl_adj_flag +;;;1213 { +;;;1214 // ֻ120Hzģʽ¡CAΪ0 +;;;1215 if(value_reg_b1_bak <=0x222) +00001a 6b41 LDR r1,[r0,#0x34] +;;;1216 { +;;;1217 switch(value_reg_ca) +;;;1218 { +;;;1219 case 0: +;;;1220 case 1: +;;;1221 value_reg51 = 255; //255 +00001c 25ff MOVS r5,#0xff +;;;1222 break; +;;;1223 +;;;1224 case 2: +;;;1225 value_reg51 = 252; +;;;1226 break; +;;;1227 +;;;1228 case 3: +;;;1229 value_reg51 = 249; +;;;1230 break; +;;;1231 +;;;1232 case 4: +;;;1233 value_reg51 = 245; +;;;1234 break; +;;;1235 +;;;1236 case 5: +;;;1237 value_reg51 = 239; +;;;1238 break; +;;;1239 +;;;1240 case 6: +;;;1241 value_reg51 = 235; +;;;1242 break; +;;;1243 +;;;1244 case 7: +;;;1245 case 8: +;;;1246 value_reg51 = 229; +;;;1247 break; +;;;1248 +;;;1249 case 9: +;;;1250 value_reg51 = 222; +;;;1251 break; +;;;1252 +;;;1253 case 10: +;;;1254 value_reg51 = 212; +;;;1255 break; +;;;1256 +;;;1257 case 11: +;;;1258 value_reg51 = 207; +;;;1259 break; +;;;1260 +;;;1261 case 12: +;;;1262 value_reg51 = 203; +;;;1263 break; +;;;1264 +;;;1265 case 13: +;;;1266 value_reg51 = 200; +;;;1267 break; +;;;1268 +;;;1269 case 14: +;;;1270 value_reg51 = 198; +;;;1271 break; +;;;1272 +;;;1273 case 15: +;;;1274 value_reg51 = 195; +;;;1275 break; +;;;1276 +;;;1277 case 16: +;;;1278 value_reg51 = 189; +;;;1279 break; +;;;1280 +;;;1281 case 17: +;;;1282 value_reg51 = 182; +;;;1283 break; +;;;1284 +;;;1285 case 18: +;;;1286 value_reg51 = 178; +;;;1287 break; +;;;1288 +;;;1289 case 19: +;;;1290 value_reg51 = 175; +;;;1291 break; +;;;1292 +;;;1293 case 20: +;;;1294 value_reg51 = 171; +;;;1295 break; +;;;1296 +;;;1297 default: +;;;1298 case 21: +;;;1299 value_reg51 = 168; +;;;1300 break; +;;;1301 } +;;;1302 } +;;;1303 else if(value_reg_b1_bak <=0x55B) +;;;1304 { +;;;1305 // value_reg_b1_bak =0x55B ~ 0x22BӦ130 ~ 167(ǵ⼶Ϊ256) +;;;1306 temp_max = 0x55B; +;;;1307 temp_min = 0x22B; +;;;1308 +;;;1309 temp51_max =167; +;;;1310 temp51_min =130; +;;;1311 if(value_reg_b1_bak<=temp_min) +;;;1312 value_reg51 =temp51_max; +;;;1313 else if(value_reg_b1_bak>=temp_max) +;;;1314 value_reg51 =temp51_min; +;;;1315 else +;;;1316 value_reg51 = temp51_max - (value_reg_b1_bak-temp_min)*(temp51_max-temp51_min)/(temp_max-temp_min); +;;;1317 } +;;;1318 else if(value_reg_b1_bak ==0x56F) +00001e 4aa1 LDR r2,|L7.676| +;;;1319 { +;;;1320 if(value_reg_ca <0x27) +;;;1321 { +;;;1322 value_reg51 = 122; +;;;1323 } +;;;1324 else if(value_reg_ca <0x2D) +;;;1325 { +;;;1326 value_reg51 = 116; +;;;1327 } +;;;1328 else if(value_reg_ca <0x30) +;;;1329 { +;;;1330 value_reg51 = 112; +;;;1331 } +;;;1332 else if(value_reg_ca <0x3B) +;;;1333 { +;;;1334 value_reg51 = 108; +;;;1335 } +;;;1336 else if(value_reg_ca <0x40) +;;;1337 { +;;;1338 value_reg51 = 105; +;;;1339 } +;;;1340 else if(value_reg_ca <0x50) +;;;1341 { +;;;1342 value_reg51 = 103; +;;;1343 } +;;;1344 else +;;;1345 { +;;;1346 value_reg51 = 101; +;;;1347 } +;;;1348 } +;;;1349 else if(value_reg_b1_bak <=0xB3B) +;;;1350 { +;;;1351 // value_reg_b1_bak =0xB3B ~ 0x589Ӧ55~ 100(ǵ⼶Ϊ256) +;;;1352 temp_max = 0xB3B; +;;;1353 temp_min = 0x589; +;;;1354 +;;;1355 temp51_max =100; +;;;1356 temp51_min =55; +;;;1357 if(value_reg_b1_bak<=temp_min) +;;;1358 value_reg51 =temp51_max; +;;;1359 else if(value_reg_b1_bak>=temp_max) +;;;1360 value_reg51 =temp51_min; +;;;1361 else +;;;1362 value_reg51 = temp51_max - (value_reg_b1_bak-temp_min)*(temp51_max-temp51_min)/(temp_max-temp_min); +;;;1363 } +;;;1364 else if(value_reg_b1_bak <=0xBF9) +;;;1365 { +;;;1366 // value_reg_b1_bak =0xB44 ~ 0xBF9Ӧ54~ 37(ǵ⼶Ϊ256) +;;;1367 temp_max = 0xBF9; +;;;1368 temp_min = 0xB44; +;;;1369 +;;;1370 temp51_max =54; +;;;1371 temp51_min =37; +;;;1372 if(value_reg_b1_bak<=temp_min) +;;;1373 value_reg51 =temp51_max; +;;;1374 else if(value_reg_b1_bak>=temp_max) +;;;1375 value_reg51 =temp51_min; +;;;1376 else +;;;1377 value_reg51 = temp51_max - (value_reg_b1_bak-temp_min)*(temp51_max-temp51_min)/(temp_max-temp_min); +;;;1378 } +;;;1379 else +;;;1380 { +;;;1381 // value_reg_b1_bak =0xC0B ~ 0xC71Ӧ36 ~ 1(ǵ⼶Ϊ256) +;;;1382 temp_max = 0xC71; +000020 4fa1 LDR r7,|L7.680| +000022 8b80 LDRH r0,[r0,#0x1c] ;1215 +000024 2e00 CMP r6,#0 ;1212 +000026 d076 BEQ |L7.278| +000028 4ba0 LDR r3,|L7.684| +00002a 4298 CMP r0,r3 ;1215 +00002c d834 BHI |L7.152| +00002e 000b MOVS r3,r1 ;1217 +000030 f7fffffe BL __ARM_common_switch8 +000034 15b8b80c DCB 0x15,0xb8,0xb8,0x0c +000038 0e101214 DCB 0x0e,0x10,0x12,0x14 +00003c 1616181a DCB 0x16,0x16,0x18,0x1a +000040 1c1e2022 DCB 0x1c,0x1e,0x20,0x22 +000044 2426282a DCB 0x24,0x26,0x28,0x2a +000048 2c2e3000 DCB 0x2c,0x2e,0x30,0x00 +00004c 20fc MOVS r0,#0xfc ;1225 +00004e e0bb B |L7.456| +000050 20f9 MOVS r0,#0xf9 ;1229 +000052 e0b9 B |L7.456| +000054 20f5 MOVS r0,#0xf5 ;1233 +000056 e0b7 B |L7.456| +000058 20ef MOVS r0,#0xef ;1237 +00005a e0b5 B |L7.456| +00005c 20eb MOVS r0,#0xeb ;1241 +00005e e0b3 B |L7.456| +000060 20e5 MOVS r0,#0xe5 ;1246 +000062 e0b1 B |L7.456| +000064 20de MOVS r0,#0xde ;1250 +000066 e0af B |L7.456| +000068 20d4 MOVS r0,#0xd4 ;1254 +00006a e0ad B |L7.456| +00006c 20cf MOVS r0,#0xcf ;1258 +00006e e0ab B |L7.456| +000070 20cb MOVS r0,#0xcb ;1262 +000072 e0a9 B |L7.456| +000074 20c8 MOVS r0,#0xc8 ;1266 +000076 e0a7 B |L7.456| +000078 20c6 MOVS r0,#0xc6 ;1270 +00007a e0a5 B |L7.456| +00007c 20c3 MOVS r0,#0xc3 ;1274 +00007e e0a3 B |L7.456| +000080 20bd MOVS r0,#0xbd ;1278 +000082 e0a1 B |L7.456| +000084 20b6 MOVS r0,#0xb6 ;1282 +000086 e09f B |L7.456| +000088 20b2 MOVS r0,#0xb2 ;1286 +00008a e09d B |L7.456| +00008c 20af MOVS r0,#0xaf ;1290 +00008e e09b B |L7.456| +000090 20ab MOVS r0,#0xab ;1294 +000092 e099 B |L7.456| +000094 20a8 MOVS r0,#0xa8 ;1299 +000096 e097 B |L7.456| + |L7.152| +000098 4b82 LDR r3,|L7.676| +00009a 3b14 SUBS r3,r3,#0x14 ;1303 +00009c 4298 CMP r0,r3 ;1303 +00009e d80d BHI |L7.188| +0000a0 4982 LDR r1,|L7.684| +0000a2 25a7 MOVS r5,#0xa7 ;1309 +0000a4 3109 ADDS r1,r1,#9 ;1307 +0000a6 2282 MOVS r2,#0x82 ;1310 +0000a8 4288 CMP r0,r1 ;1311 +0000aa d97b BLS |L7.420| +0000ac 4298 CMP r0,r3 ;1313 +0000ae d27a BCS |L7.422| +0000b0 1a40 SUBS r0,r0,r1 ;1316 +0000b2 2125 MOVS r1,#0x25 ;1316 +0000b4 4348 MULS r0,r1,r0 ;1316 +0000b6 2133 MOVS r1,#0x33 ;1316 +0000b8 0109 LSLS r1,r1,#4 ;1316 +0000ba e02e B |L7.282| + |L7.188| +0000bc 4290 CMP r0,r2 ;1318 +0000be d119 BNE |L7.244| +0000c0 2927 CMP r1,#0x27 ;1320 +0000c2 d201 BCS |L7.200| +0000c4 207a MOVS r0,#0x7a ;1322 +0000c6 e07f B |L7.456| + |L7.200| +0000c8 292d CMP r1,#0x2d ;1324 +0000ca d201 BCS |L7.208| +0000cc 2074 MOVS r0,#0x74 ;1326 +0000ce e07b B |L7.456| + |L7.208| +0000d0 2930 CMP r1,#0x30 ;1328 +0000d2 d201 BCS |L7.216| + |L7.212| +0000d4 2070 MOVS r0,#0x70 ;1330 +0000d6 e077 B |L7.456| + |L7.216| +0000d8 293b CMP r1,#0x3b ;1332 +0000da d201 BCS |L7.224| +0000dc 206c MOVS r0,#0x6c ;1334 +0000de e073 B |L7.456| + |L7.224| +0000e0 2940 CMP r1,#0x40 ;1336 +0000e2 d201 BCS |L7.232| +0000e4 2069 MOVS r0,#0x69 ;1338 +0000e6 e06f B |L7.456| + |L7.232| +0000e8 2950 CMP r1,#0x50 ;1340 +0000ea d201 BCS |L7.240| +0000ec 2067 MOVS r0,#0x67 ;1342 +0000ee e06b B |L7.456| + |L7.240| +0000f0 2065 MOVS r0,#0x65 ;1346 +0000f2 e069 B |L7.456| + |L7.244| +0000f4 496e LDR r1,|L7.688| +0000f6 4288 CMP r0,r1 ;1349 +0000f8 d813 BHI |L7.290| +0000fa 4a6a LDR r2,|L7.676| +0000fc 2564 MOVS r5,#0x64 ;1355 +0000fe 321a ADDS r2,r2,#0x1a ;1353 +000100 2337 MOVS r3,#0x37 ;1356 +000102 4290 CMP r0,r2 ;1357 +000104 d94e BLS |L7.420| +000106 4288 CMP r0,r1 ;1359 +000108 d237 BCS |L7.378| +00010a 1a80 SUBS r0,r0,r2 ;1362 +00010c 212d MOVS r1,#0x2d ;1362 +00010e 4348 MULS r0,r1,r0 ;1362 +000110 4964 LDR r1,|L7.676| +000112 e001 B |L7.280| + |L7.276| +000114 e0c2 B |L7.668| + |L7.278| +000116 e022 B |L7.350| + |L7.280| +000118 3143 ADDS r1,r1,#0x43 ;1362 + |L7.282| +00011a f7fffffe BL __aeabi_idivmod +00011e 1a28 SUBS r0,r5,r0 ;1316 +000120 e052 B |L7.456| + |L7.290| +000122 4961 LDR r1,|L7.680| +000124 3978 SUBS r1,r1,#0x78 ;1364 +000126 4288 CMP r0,r1 ;1364 +000128 d80c BHI |L7.324| +00012a 4a61 LDR r2,|L7.688| +00012c 2536 MOVS r5,#0x36 ;1370 +00012e 3209 ADDS r2,r2,#9 ;1368 +000130 2325 MOVS r3,#0x25 ;1371 +000132 4290 CMP r0,r2 ;1372 +000134 d936 BLS |L7.420| +000136 4288 CMP r0,r1 ;1374 +000138 d21f BCS |L7.378| +00013a 1a80 SUBS r0,r0,r2 ;1377 +00013c 0101 LSLS r1,r0,#4 ;1377 +00013e 1840 ADDS r0,r0,r1 ;1377 +000140 21b5 MOVS r1,#0xb5 ;1377 +000142 e7ea B |L7.282| + |L7.324| +;;;1383 temp_min = 0xC0B; +000144 4958 LDR r1,|L7.680| +;;;1384 +;;;1385 temp51_max =36; +000146 2524 MOVS r5,#0x24 +000148 3966 SUBS r1,r1,#0x66 ;1383 +;;;1386 temp51_min =1; +00014a 2201 MOVS r2,#1 +;;;1387 if(value_reg_b1_bak<=temp_min) +00014c 4288 CMP r0,r1 +00014e d929 BLS |L7.420| +;;;1388 value_reg51 =temp51_max; +;;;1389 else if(value_reg_b1_bak>=temp_max) +000150 42b8 CMP r0,r7 +000152 d228 BCS |L7.422| +;;;1390 value_reg51 =temp51_min; +;;;1391 else +;;;1392 value_reg51 = temp51_max - (value_reg_b1_bak-temp_min)*(temp51_max-temp51_min)/(temp_max-temp_min); +000154 1a40 SUBS r0,r0,r1 +000156 2123 MOVS r1,#0x23 +000158 4348 MULS r0,r1,r0 +00015a 2166 MOVS r1,#0x66 +00015c e7dd B |L7.282| + |L7.350| +;;;1393 } +;;;1394 } +;;;1395 else if (dcs_packet->packet_param[0] &0x80) +00015e 781b LDRB r3,[r3,#0] +000160 061e LSLS r6,r3,#24 +000162 4b4f LDR r3,|L7.672| +000164 2e00 CMP r6,#0 +000166 8e9b LDRH r3,[r3,#0x34] ;1217 +;;;1396 { +;;;1397 //Ϊ60Hz +;;;1398 if(value_reg_ca >=0x15C0) +;;;1399 { +;;;1400 // value_reg51 = 0xC0~ 0xFF +;;;1401 if(value_reg_ca >=0x15FF) +;;;1402 value_reg51 = 0xFF; +;;;1403 else +;;;1404 value_reg51 = value_reg_ca&0xFF; +000168 b2db UXTB r3,r3 +00016a da56 BGE |L7.538| +00016c 2257 MOVS r2,#0x57 ;1398 +00016e 0192 LSLS r2,r2,#6 ;1398 +000170 4291 CMP r1,r2 ;1398 +000172 d304 BCC |L7.382| +000174 484f LDR r0,|L7.692| +000176 4281 CMP r1,r0 ;1401 +000178 d279 BCS |L7.622| + |L7.378| +00017a 83e3 STRH r3,[r4,#0x1e] +00017c e025 B |L7.458| + |L7.382| +;;;1405 } +;;;1406 else if(value_reg_ca >0x15B8) +00017e 4b4d LDR r3,|L7.692| +000180 3b47 SUBS r3,r3,#0x47 +000182 4299 CMP r1,r3 +000184 d910 BLS |L7.424| +;;;1407 { +;;;1408 // value_reg51 = 0x90~ 0xC0 +;;;1409 temp_max = 0x573; +000186 4947 LDR r1,|L7.676| +;;;1410 temp_min = 0x1EE; +000188 23ff MOVS r3,#0xff +00018a 1d09 ADDS r1,r1,#4 ;1409 +00018c 33ef ADDS r3,r3,#0xef +;;;1411 +;;;1412 temp51_max =0xC0; +00018e 25c0 MOVS r5,#0xc0 +;;;1413 temp51_min =0x90; +000190 2290 MOVS r2,#0x90 +;;;1414 if(value_reg_b1_bak<=temp_min) +000192 4298 CMP r0,r3 +000194 d96b BLS |L7.622| +;;;1415 value_reg51 =temp51_max; +;;;1416 else if(value_reg_b1_bak>=temp_max) +000196 4288 CMP r0,r1 +000198 d26d BCS |L7.630| +;;;1417 value_reg51 =temp51_min; +;;;1418 else +;;;1419 value_reg51 = temp51_max - (value_reg_b1_bak-temp_min)*(temp51_max-temp51_min)/(temp_max-temp_min); +00019a 2130 MOVS r1,#0x30 +00019c 1ac0 SUBS r0,r0,r3 +00019e 4348 MULS r0,r1,r0 +0001a0 4945 LDR r1,|L7.696| +0001a2 e7ba B |L7.282| + |L7.420| +0001a4 e063 B |L7.622| + |L7.422| +0001a6 e066 B |L7.630| + |L7.424| +;;;1420 } +;;;1421 else if(value_reg_ca >=0x156D) +0001a8 4a42 LDR r2,|L7.692| +0001aa 3a92 SUBS r2,r2,#0x92 +0001ac 4291 CMP r1,r2 +0001ae d325 BCC |L7.508| +;;;1422 { +;;;1423 // value_reg51 = 0x70~ 0x90 +;;;1424 temp_max = 0x15B8; +;;;1425 temp_min = 0x156D; +;;;1426 +;;;1427 temp51_max =0x90; +0001b0 2090 MOVS r0,#0x90 +;;;1428 temp51_min =0x70; +0001b2 2570 MOVS r5,#0x70 +;;;1429 if(value_reg_ca <=temp_min) +0001b4 4291 CMP r1,r2 +0001b6 d95a BLS |L7.622| +;;;1430 value_reg51 =temp51_min; +;;;1431 else if(value_reg_ca>=temp_max) +0001b8 4299 CMP r1,r3 +0001ba d205 BCS |L7.456| +;;;1432 value_reg51 =temp51_max; +;;;1433 else +;;;1434 value_reg51 = temp51_min + (value_reg_ca-temp_min)*(temp51_max-temp51_min)/(temp_max-temp_min); +0001bc 1a88 SUBS r0,r1,r2 +0001be 0140 LSLS r0,r0,#5 +0001c0 214b MOVS r1,#0x4b +0001c2 f7fffffe BL __aeabi_uidivmod +0001c6 3070 ADDS r0,r0,#0x70 + |L7.456| +;;;1435 } +;;;1436 else +;;;1437 { +;;;1438 // value_reg51 = 0x10~ 0x70 +;;;1439 temp_max = 0xC77; +;;;1440 temp_min = 0x587; +;;;1441 +;;;1442 temp51_max =0x70; +;;;1443 temp51_min =1; +;;;1444 if(value_reg_b1_bak<=temp_min) +;;;1445 value_reg51 =temp51_max; +;;;1446 else if(value_reg_b1_bak>=temp_max) +;;;1447 value_reg51 =temp51_min; +;;;1448 else +;;;1449 value_reg51 = temp51_max - (value_reg_b1_bak-temp_min)*(temp51_max-temp51_min)/(temp_max-temp_min); +;;;1450 +;;;1451 } +;;;1452 } +;;;1453 else //if (dcs_packet->packet_param[0] &0x40) +;;;1454 { +;;;1455 //Ϊ120Hz +;;;1456 if(value_reg_ca >=0x156D) +;;;1457 { +;;;1458 // value_reg51 = 0xBE~ 0xFF +;;;1459 if(value_reg_ca >=0x15AE) +;;;1460 value_reg51 = 0xFF; +;;;1461 else +;;;1462 value_reg51 = (value_reg_ca&0xFF)+0x51; +;;;1463 } +;;;1464 else if(value_reg_ca >0x1564) +;;;1465 { +;;;1466 // value_reg51 = 0x90~ 0xBE +;;;1467 temp_max = 0x56F; +;;;1468 temp_min = 0x1ED; +;;;1469 +;;;1470 temp51_max =0xBE; +;;;1471 temp51_min =0x90; +;;;1472 if(value_reg_b1_bak<=temp_min) +;;;1473 value_reg51 =temp51_max; +;;;1474 else if(value_reg_b1_bak>=temp_max) +;;;1475 value_reg51 =temp51_min; +;;;1476 else +;;;1477 value_reg51 = temp51_max - (value_reg_b1_bak-temp_min)*(temp51_max-temp51_min)/(temp_max-temp_min); +;;;1478 } +;;;1479 else if(value_reg_ca >=0x1518) +;;;1480 { +;;;1481 // value_reg51 = 0x70~ 0x90 +;;;1482 temp_max = 0x1518; +;;;1483 temp_min = 0x1564; +;;;1484 +;;;1485 temp51_max =0x90; +;;;1486 temp51_min =0x70; +;;;1487 if(value_reg_ca <=temp_min) +;;;1488 value_reg51 =temp51_min; +0001c8 83e0 STRH r0,[r4,#0x1e] + |L7.458| +;;;1489 else if(value_reg_ca>=temp_max) +;;;1490 value_reg51 =temp51_max; +;;;1491 else +;;;1492 value_reg51 = temp51_min + (value_reg_ca-temp_min)*(temp51_max-temp51_min)/(temp_max-temp_min); +;;;1493 } +;;;1494 else +;;;1495 { +;;;1496 // value_reg51 = 0x01~ 0x70 +;;;1497 temp_max = 0xC71; +;;;1498 temp_min = 0x5A2; +;;;1499 +;;;1500 temp51_max =0x70; +;;;1501 temp51_min =0x01; +;;;1502 if(value_reg_b1_bak<=temp_min) +;;;1503 value_reg51 =temp51_max; +;;;1504 else if(value_reg_b1_bak>=temp_max) +;;;1505 value_reg51 =temp51_min; +;;;1506 else +;;;1507 value_reg51 = temp51_max - (value_reg_b1_bak-temp_min)*(temp51_max-temp51_min)/(temp_max-temp_min); +;;;1508 +;;;1509 } +;;;1510 } +;;;1511 +;;;1512 if (value_reg51 != value_reg51_bak) +0001ca 8be0 LDRH r0,[r4,#0x1e] ; value_reg51 +0001cc 8c21 LDRH r1,[r4,#0x20] ; value_reg51_bak +0001ce 4288 CMP r0,r1 +0001d0 d064 BEQ |L7.668| +0001d2 0101 LSLS r1,r0,#4 +;;;1513 { +;;;1514 #if 0// 1: ƽһ +;;;1515 if (value_reg51 <0x41) +;;;1516 { +;;;1517 temp_max = 0x40; +;;;1518 temp_min = 1; +;;;1519 +;;;1520 temp51_max =0x100; +;;;1521 temp51_min =0x10; +;;;1522 +;;;1523 temp_u16 = temp51_min + (value_reg51-temp_min)*(temp51_max-temp51_min)/(temp_max-temp_min); +;;;1524 } +;;;1525 else if (value_reg51 <0x81) +;;;1526 { +;;;1527 temp_max = 0x80; +;;;1528 temp_min = 41; +;;;1529 +;;;1530 temp51_max =0x400; +;;;1531 temp51_min =0x101; +;;;1532 +;;;1533 temp_u16 = temp51_min + (value_reg51-temp_min)*(temp51_max-temp51_min)/(temp_max-temp_min); +;;;1534 } +;;;1535 else +;;;1536 { +;;;1537 temp_max = 0xFF; +;;;1538 temp_min = 0x81; +;;;1539 +;;;1540 temp51_max =0xDBB; +;;;1541 temp51_min =0x401; +;;;1542 +;;;1543 temp_u16 = temp51_min + (value_reg51-temp_min)*(temp51_max-temp51_min)/(temp_max-temp_min); +;;;1544 } +;;;1545 +;;;1546 #else +;;;1547 temp_u16=(value_reg51-0x01)*15+0xB0; +0001d4 1a08 SUBS r0,r1,r0 +0001d6 30a1 ADDS r0,r0,#0xa1 +0001d8 b280 UXTH r0,r0 +;;;1548 // temp_u16 = value_reg51*0xFFF/0xFF; +;;;1549 #endif +;;;1550 //temp_u16 = value_reg51; +;;;1551 +;;;1552 // +;;;1553 // if (temp_u16 <0x3F) +;;;1554 // temp_u16 = 0X3F; +;;;1555 if(temp_u16 == 0x1be) +0001da 4601 MOV r1,r0 +0001dc 39ff SUBS r1,r1,#0xff +0001de 39bf SUBS r1,r1,#0xbf +0001e0 d101 BNE |L7.486| +;;;1556 { +;;;1557 temp_u16 = 0x1cd; +0001e2 20ff MOVS r0,#0xff +0001e4 30ce ADDS r0,r0,#0xce + |L7.486| +;;;1558 } +;;;1559 //Ϣѱ +;;;1560 if(phone_power_on == true||g_enter_display_ON == true) +0001e6 79a1 LDRB r1,[r4,#6] ; phone_power_on +0001e8 7b62 LDRB r2,[r4,#0xd] ; g_enter_display_ON +0001ea 2500 MOVS r5,#0 +0001ec 4311 ORRS r1,r1,r2 +0001ee 2900 CMP r1,#0 +0001f0 d048 BEQ |L7.644| +;;;1561 { +;;;1562 hal_dsi_tx_ctrl_write_cmd(0x39, 0, 3, 0x51, temp_u16>>8, temp_u16&0xFF); +0001f2 b2c1 UXTB r1,r0 +0001f4 0a00 LSRS r0,r0,#8 +0001f6 9101 STR r1,[sp,#4] +0001f8 9000 STR r0,[sp,#0] +0001fa e046 B |L7.650| + |L7.508| +0001fc 4a2a LDR r2,|L7.680| +0001fe 4929 LDR r1,|L7.676| +000200 1d92 ADDS r2,r2,#6 ;1439 +000202 3118 ADDS r1,r1,#0x18 ;1440 +000204 2570 MOVS r5,#0x70 ;1442 +000206 2301 MOVS r3,#1 ;1443 +000208 4288 CMP r0,r1 ;1444 +00020a d930 BLS |L7.622| +00020c 4290 CMP r0,r2 ;1446 +00020e d2b4 BCS |L7.378| +000210 1a40 SUBS r0,r0,r1 ;1449 +000212 216f MOVS r1,#0x6f ;1449 +000214 4348 MULS r0,r1,r0 ;1449 +000216 0109 LSLS r1,r1,#4 ;1449 +000218 e77f B |L7.282| + |L7.538| +00021a 4e26 LDR r6,|L7.692| +00021c 3e92 SUBS r6,r6,#0x92 ;1456 +00021e 42b1 CMP r1,r6 ;1456 +000220 d305 BCC |L7.558| +000222 4824 LDR r0,|L7.692| +000224 3851 SUBS r0,r0,#0x51 ;1459 +000226 4281 CMP r1,r0 ;1459 +000228 d221 BCS |L7.622| +00022a 3351 ADDS r3,r3,#0x51 ;1459 +00022c e7a5 B |L7.378| + |L7.558| +00022e 4b21 LDR r3,|L7.692| +000230 3b9b SUBS r3,r3,#0x9b ;1464 +000232 4299 CMP r1,r3 ;1464 +000234 d910 BLS |L7.600| +000236 23ff MOVS r3,#0xff ;1468 +000238 33ee ADDS r3,r3,#0xee ;1468 +00023a 25be MOVS r5,#0xbe ;1470 +00023c 2190 MOVS r1,#0x90 ;1471 +00023e 4298 CMP r0,r3 ;1472 +000240 d915 BLS |L7.622| +000242 4290 CMP r0,r2 ;1474 +000244 d301 BCC |L7.586| +000246 83e1 STRH r1,[r4,#0x1e] ;1475 +000248 e7bf B |L7.458| + |L7.586| +00024a 38ff SUBS r0,r0,#0xff ;1477 +00024c 212e MOVS r1,#0x2e ;1477 +00024e 38ee SUBS r0,r0,#0xee ;1477 +000250 4348 MULS r0,r1,r0 ;1477 +000252 4919 LDR r1,|L7.696| +000254 1ec9 SUBS r1,r1,#3 ;1477 +000256 e760 B |L7.282| + |L7.600| +000258 4a16 LDR r2,|L7.692| +00025a 3ae7 SUBS r2,r2,#0xe7 ;1479 +00025c 4291 CMP r1,r2 ;1479 +00025e d300 BCC |L7.610| +000260 e738 B |L7.212| + |L7.610| +000262 4910 LDR r1,|L7.676| +000264 2570 MOVS r5,#0x70 ;1500 +000266 3133 ADDS r1,r1,#0x33 ;1498 +000268 2201 MOVS r2,#1 ;1501 +00026a 4288 CMP r0,r1 ;1502 +00026c d801 BHI |L7.626| + |L7.622| +00026e 83e5 STRH r5,[r4,#0x1e] ;1503 +000270 e7ab B |L7.458| + |L7.626| +000272 42b8 CMP r0,r7 ;1504 +000274 d301 BCC |L7.634| + |L7.630| +000276 83e2 STRH r2,[r4,#0x1e] ;1505 +000278 e7a7 B |L7.458| + |L7.634| +00027a 1a40 SUBS r0,r0,r1 ;1507 +00027c 216f MOVS r1,#0x6f ;1507 +00027e 4348 MULS r0,r1,r0 ;1507 +000280 490e LDR r1,|L7.700| +000282 e74a B |L7.282| + |L7.644| +;;;1563 } +;;;1564 // if(g_enter_display_ON == false) +;;;1565 else { +;;;1566 +;;;1567 hal_dsi_tx_ctrl_write_cmd(0x39, 0, 3, 0x51, 0, 0x01); //0x001F +000284 2001 MOVS r0,#1 +000286 9500 STR r5,[sp,#0] +000288 9001 STR r0,[sp,#4] + |L7.650| +00028a 2351 MOVS r3,#0x51 +00028c 2203 MOVS r2,#3 +00028e 2100 MOVS r1,#0 +000290 2039 MOVS r0,#0x39 +000292 f7fffffe BL hal_dsi_tx_ctrl_write_cmd +;;;1568 } +;;;1569 phone_power_on = false; +000296 71a5 STRB r5,[r4,#6] +;;;1570 //hal_dsi_tx_ctrl_write_cmd(0x39, 0, 3, 0x51, 0, 0xF4); +;;;1571 value_reg51_bak = value_reg51; +000298 8be0 LDRH r0,[r4,#0x1e] ; value_reg51 +00029a 8420 STRH r0,[r4,#0x20] + |L7.668| +;;;1572 // printf("B1[%4x],CA[%4x] \n", value_reg_b1, value_reg_ca); +;;;1573 // TAU_LOGD("B1[%4x],CA[%4x],51[%02x], value_reg51[%02x]", value_reg_b1, value_reg_ca, value_reg51 , temp_u16); +;;;1574 } +;;;1575 } +;;;1576 +;;;1577 #endif +;;;1578 +;;;1579 #endif // // USE_BL_ADJ7 +;;;1580 +;;;1581 return true; +00029c 2001 MOVS r0,#1 +;;;1582 } +00029e bdfe POP {r1-r7,pc} +;;;1583 #endif + ENDP + + |L7.672| + DCD ||.data|| + |L7.676| + DCD 0x0000056f + |L7.680| + DCD 0x00000c71 + |L7.684| + DCD 0x00000222 + |L7.688| + DCD 0x00000b3b + |L7.692| + DCD 0x000015ff + |L7.696| + DCD 0x00000385 + |L7.700| + DCD 0x000006cf + + AREA ||i.ap_set_display_off||, CODE, READONLY, ALIGN=2 + + ap_set_display_off PROC +;;;934 +;;;935 static bool ap_set_display_off(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +000000 b510 PUSH {r4,lr} +;;;936 { +;;;937 Gpio_swire_output(0, 0); +000002 2100 MOVS r1,#0 +000004 4608 MOV r0,r1 +000006 f7fffffe BL Gpio_swire_output +;;;938 +;;;939 TAU_LOGD("disp off"); +;;;940 g_enter_display_off = true; +00000a 4905 LDR r1,|L8.32| +00000c 2001 MOVS r0,#1 +00000e 7308 STRB r0,[r1,#0xc] +;;;941 hal_dsi_tx_ctrl_write_cmd(0x05, 0, 2, 0x28); +000010 2328 MOVS r3,#0x28 +000012 2202 MOVS r2,#2 +000014 2100 MOVS r1,#0 +000016 2005 MOVS r0,#5 +000018 f7fffffe BL hal_dsi_tx_ctrl_write_cmd +;;;942 // hal_gpio_set_output_data(IO_PAD_PWMEN, IO_LVL_LOW); +;;;943 return true; +00001c 2001 MOVS r0,#1 +;;;944 } +00001e bd10 POP {r4,pc} +;;;945 + ENDP + + |L8.32| + DCD ||.data|| + + AREA ||i.ap_set_display_on||, CODE, READONLY, ALIGN=2 + + ap_set_display_on PROC +;;;921 +;;;922 static bool ap_set_display_on(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +000000 4901 LDR r1,|L9.8| +;;;923 { +;;;924 // if(g_enter_display_off == true) +;;;925 { +;;;926 // Gpio_swire_output(2,38); +;;;927 g_enter_display_ON = true; +000002 2001 MOVS r0,#1 +000004 7348 STRB r0,[r1,#0xd] +;;;928 } +;;;929 // hal_dsi_tx_ctrl_write_cmd(0x39, 0, 3, 0x51, 0, 0x1F); +;;;930 // hal_dsi_tx_ctrl_write_cmd(0x05, 0, 2, 0x29); +;;;931 // TAU_LOGD("disp on"); +;;;932 return true; +;;;933 } +000006 4770 BX lr +;;;934 + ENDP + + |L9.8| + DCD ||.data|| + + AREA ||i.ap_set_enter_sleep_mode||, CODE, READONLY, ALIGN=2 + + ap_set_enter_sleep_mode PROC +;;;945 +;;;946 static bool ap_set_enter_sleep_mode(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +000000 b510 PUSH {r4,lr} +;;;947 { +;;;948 hal_dsi_tx_ctrl_write_cmd(0x05, 0, 2, 0x10); +000002 2310 MOVS r3,#0x10 +000004 2202 MOVS r2,#2 +000006 2100 MOVS r1,#0 +000008 2005 MOVS r0,#5 +00000a f7fffffe BL hal_dsi_tx_ctrl_write_cmd +;;;949 #if ENABLE_TP_WAKE_UP +;;;950 g_need_enter_sleep_mode = true; +00000e 4808 LDR r0,|L10.48| +000010 2101 MOVS r1,#1 +000012 7041 STRB r1,[r0,#1] +;;;951 #endif +;;;952 g_exit_sleep_mode = false; +000014 2100 MOVS r1,#0 +000016 7101 STRB r1,[r0,#4] +000018 2002 MOVS r0,#2 +00001a f7fffffe BL hal_timer_init +00001e 2300 MOVS r3,#0 +000020 4a04 LDR r2,|L10.52| +000022 2114 MOVS r1,#0x14 +000024 2002 MOVS r0,#2 +000026 f7fffffe BL hal_timer_start +;;;953 // TAU_LOGD("enter sleep mode"); +;;;954 soft_disable_mipi_timer_init(); +;;;955 return true; +00002a 2001 MOVS r0,#1 +;;;956 } +00002c bd10 POP {r4,pc} +;;;957 + ENDP + +00002e 0000 DCW 0x0000 + |L10.48| + DCD ||.data|| + |L10.52| + DCD disable_mipi_timer_cb + + AREA ||i.ap_set_exit_sleep_mode||, CODE, READONLY, ALIGN=2 + + ap_set_exit_sleep_mode PROC +;;;957 +;;;958 static bool ap_set_exit_sleep_mode(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +000000 4901 LDR r1,|L11.8| +;;;959 { +;;;960 TAU_LOGD("exit sleep mode"); +;;;961 /* AVDD ϵ, ڽϢPPS */ +;;;962 //hal_gpio_set_output_data(IO_PAD_PWMEN, IO_LVL_HIGH); //leo +;;;963 g_exit_sleep_mode = true; +000002 2001 MOVS r0,#1 +000004 7108 STRB r0,[r1,#4] +;;;964 +;;;965 return true; +;;;966 } +000006 4770 BX lr +;;;967 + ENDP + + |L11.8| + DCD ||.data|| + + AREA ||i.ap_update_frame_rate||, CODE, READONLY, ALIGN=2 + + ap_update_frame_rate PROC +;;;896 +;;;897 static bool ap_update_frame_rate(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +000000 b510 PUSH {r4,lr} +;;;898 { +;;;899 static uint8_t frame_rate = 0; //ÿλʱĻʾ60hzǶȡframe_rateȴ +;;;900 //TAU_LOGD("frame_rate:[%02X], %d", dcs_packet->packet_param[0], dcs_packet->param_length); +;;;901 if (frame_rate != dcs_packet->packet_param[0]) +000002 68c8 LDR r0,[r1,#0xc] +000004 7802 LDRB r2,[r0,#0] +000006 4808 LDR r0,|L12.40| +000008 7d81 LDRB r1,[r0,#0x16] ; frame_rate +00000a 428a CMP r2,r1 +00000c d008 BEQ |L12.32| +;;;902 { +;;;903 frame_rate = dcs_packet->packet_param[0]; +00000e 7582 STRB r2,[r0,#0x16] +;;;904 if (frame_rate == 0x00) //120hz +;;;905 { +;;;906 hal_dsi_rx_ctrl_set_tear_mode_ex(g_rx_ctrl_handle, SYNC_LIN_NUMBER, TE_SOFT_120HZ_MODE); +000010 214b MOVS r1,#0x4b +000012 0149 LSLS r1,r1,#5 +000014 6a80 LDR r0,[r0,#0x28] +000016 2a00 CMP r2,#0 ;904 +000018 d004 BEQ |L12.36| +;;;907 // TAU_LOGD("120HZ"); +;;;908 } +;;;909 else +;;;910 { +;;;911 hal_dsi_rx_ctrl_set_tear_mode_ex(g_rx_ctrl_handle, SYNC_LIN_NUMBER, TE_HW_MODE); +00001a 2200 MOVS r2,#0 + |L12.28| +00001c f7fffffe BL hal_dsi_rx_ctrl_set_tear_mode_ex + |L12.32| +;;;912 // TAU_LOGD("60HZ"); +;;;913 } +;;;914 //TAU_LOGD("frame_rate:%x",frame_rate); +;;;915 } +;;;916 return true; +000020 2001 MOVS r0,#1 +;;;917 } +000022 bd10 POP {r4,pc} + |L12.36| +000024 2205 MOVS r2,#5 ;906 +000026 e7f9 B |L12.28| +;;;918 + ENDP + + |L12.40| + DCD ||.data|| + + AREA ||i.blue_change_ccm||, CODE, READONLY, ALIGN=1 + + blue_change_ccm PROC +;;;161 +;;;162 void blue_change_ccm(void) +000000 b530 PUSH {r4,r5,lr} +;;;163 { +000002 b08f SUB sp,sp,#0x3c +;;;164 ccm_coef_t ccm; +;;;165 ccm.coef_c00 = 250; // 260 +;;;166 ccm.coef_c01 = 0; +000004 2400 MOVS r4,#0 +000006 25fa MOVS r5,#0xfa ;165 +;;;167 ccm.coef_c02 = 0; +;;;168 ccm.coef_c10 = 0; +;;;169 ccm.coef_c11 = 256; // 250 +000008 1da8 ADDS r0,r5,#6 +;;;170 ccm.coef_c12 = 0; +00000a 9408 STR r4,[sp,#0x20] +00000c 9406 STR r4,[sp,#0x18] ;167 +00000e 9407 STR r4,[sp,#0x1c] ;168 +;;;171 ccm.coef_c20 = 0; +000010 940a STR r4,[sp,#0x28] +;;;172 ccm.coef_c21 = 0; +;;;173 ccm.coef_c22 = 256; //260 +000012 9009 STR r0,[sp,#0x24] +;;;174 +;;;175 hal_dsi_tx_ctrl_set_ccm(ccm); +000014 900d STR r0,[sp,#0x34] +000016 940b STR r4,[sp,#0x2c] ;172 +000018 2214 MOVS r2,#0x14 +00001a a909 ADD r1,sp,#0x24 +00001c 9505 STR r5,[sp,#0x14] +00001e 940c STR r4,[sp,#0x30] +000020 4668 MOV r0,sp +000022 f7fffffe BL __aeabi_memcpy4 +000026 4623 MOV r3,r4 +000028 461a MOV r2,r3 +00002a 4611 MOV r1,r2 +00002c 4628 MOV r0,r5 +00002e f7fffffe BL hal_dsi_tx_ctrl_set_ccm +;;;176 } +000032 b00f ADD sp,sp,#0x3c +000034 bd30 POP {r4,r5,pc} +;;;177 + ENDP + + + AREA ||i.disable_mipi_timer_cb||, CODE, READONLY, ALIGN=2 + + disable_mipi_timer_cb PROC +;;;3012 +;;;3013 static void disable_mipi_timer_cb(void *data) +000000 b570 PUSH {r4-r6,lr} +;;;3014 { +;;;3015 #if ENABLE_TP_WAKE_UP +;;;3016 g_mipi_path_off = true; +000002 2501 MOVS r5,#1 +000004 4c12 LDR r4,|L14.80| +;;;3017 hal_gpio_init_output(IO_PAD_TD_LEDPWM, IO_LVL_HIGH); +000006 4629 MOV r1,r5 +000008 70a5 STRB r5,[r4,#2] ;3016 +00000a 200a MOVS r0,#0xa +00000c f7fffffe BL hal_gpio_init_output +;;;3018 /* FIXME stop more model */ +;;;3019 hal_dsi_tx_ctrl_stop(g_tx_ctrl_handle); +000010 6ae0 LDR r0,[r4,#0x2c] ; g_tx_ctrl_handle +000012 f7fffffe BL hal_dsi_tx_ctrl_stop +;;;3020 hal_dsi_tx_ctrl_deinit(g_tx_ctrl_handle); +000016 6ae0 LDR r0,[r4,#0x2c] ; g_tx_ctrl_handle +000018 f7fffffe BL hal_dsi_tx_ctrl_deinit +;;;3021 hal_dsi_rx_ctrl_stop(g_rx_ctrl_handle); +00001c 6aa0 LDR r0,[r4,#0x28] ; g_rx_ctrl_handle +00001e f7fffffe BL hal_dsi_rx_ctrl_stop +;;;3022 hal_dsi_rx_ctrl_deinit(g_rx_ctrl_handle); +000022 6aa0 LDR r0,[r4,#0x28] ; g_rx_ctrl_handle +000024 f7fffffe BL hal_dsi_rx_ctrl_deinit +;;;3023 hal_swire_open(DISABLE); +000028 2000 MOVS r0,#0 +00002a f7fffffe BL hal_swire_open +;;;3024 hal_timer_stop(SWIRE_TIMER); +00002e 2001 MOVS r0,#1 +000030 f7fffffe BL hal_timer_stop +;;;3025 hal_gpio_set_output_data(IO_PAD_PWMEN, IO_LVL_LOW); +000034 2100 MOVS r1,#0 +000036 2013 MOVS r0,#0x13 +000038 f7fffffe BL hal_gpio_set_output_data +;;;3026 hal_dsi_tx_ctrl_panel_reset_pin(IO_LVL_LOW); +00003c 2000 MOVS r0,#0 +00003e f7fffffe BL hal_dsi_tx_ctrl_panel_reset_pin +;;;3027 hal_system_set_vcc(false); +000042 2000 MOVS r0,#0 +000044 f7fffffe BL hal_system_set_vcc +;;;3028 tp_sleep_in=1; +000048 4802 LDR r0,|L14.84| +00004a 7005 STRB r5,[r0,#0] +;;;3029 TAU_LOGD("disable video path \n"); +;;;3030 #endif +;;;3031 } +00004c bd70 POP {r4-r6,pc} +;;;3032 + ENDP + +00004e 0000 DCW 0x0000 + |L14.80| + DCD ||.data|| + |L14.84| + DCD tp_sleep_in + + AREA ||i.init_mipi_tx||, CODE, READONLY, ALIGN=2 + + init_mipi_tx PROC +;;;2944 +;;;2945 static void init_mipi_tx(void) +000000 b510 PUSH {r4,lr} +;;;2946 { +;;;2947 if (g_tx_ctrl_handle == NULL) +000002 4c17 LDR r4,|L15.96| +000004 6ae0 LDR r0,[r4,#0x2c] ; g_tx_ctrl_handle +000006 2800 CMP r0,#0 +000008 d102 BNE |L15.16| +;;;2948 { +;;;2949 g_tx_ctrl_handle = hal_dsi_tx_ctrl_create_handle(); +00000a f7fffffe BL hal_dsi_tx_ctrl_create_handle +00000e 62e0 STR r0,[r4,#0x2c] ; g_tx_ctrl_handle + |L15.16| +;;;2950 } +;;;2951 g_tx_ctrl_handle->channel_id = OUTPUT_VC; +000010 2100 MOVS r1,#0 +000012 7081 STRB r1,[r0,#2] +;;;2952 g_tx_ctrl_handle->lane_num = OUTPUT_LANE_NUMBER; +000014 2104 MOVS r1,#4 +000016 7041 STRB r1,[r0,#1] +;;;2953 g_tx_ctrl_handle->vid_mode = OUTPUT_VIDEO_MODEL; +000018 2302 MOVS r3,#2 +00001a 70c3 STRB r3,[r0,#3] +;;;2954 g_tx_ctrl_handle->cmd_tx_type = _CMD_TYPE; +00001c 2201 MOVS r2,#1 +00001e 7102 STRB r2,[r0,#4] +;;;2955 g_tx_ctrl_handle->dpi_vsa = OUTPUT_VSA; +000020 2408 MOVS r4,#8 +;;;2956 g_tx_ctrl_handle->dpi_vbp = OUTPUT_VBP; +000022 6084 STR r4,[r0,#8] +;;;2957 g_tx_ctrl_handle->dpi_vfp = OUTPUT_VFP; +;;;2958 g_tx_ctrl_handle->dpi_hsa = OUTPUT_HSA; +000024 60c4 STR r4,[r0,#0xc] +;;;2959 g_tx_ctrl_handle->dpi_hbp = OUTPUT_HBP; +000026 6144 STR r4,[r0,#0x14] +000028 2138 MOVS r1,#0x38 ;2957 +00002a 6101 STR r1,[r0,#0x10] +00002c 210c MOVS r1,#0xc +;;;2960 g_tx_ctrl_handle->dpi_hfp = OUTPUT_HFP; +00002e 6181 STR r1,[r0,#0x18] +000030 2178 MOVS r1,#0x78 +;;;2961 g_tx_ctrl_handle->base_info.src_w = INPUT_WIDTH; +000032 61c1 STR r1,[r0,#0x1c] +000034 2187 MOVS r1,#0x87 +000036 00c9 LSLS r1,r1,#3 +;;;2962 g_tx_ctrl_handle->base_info.src_h = INPUT_HEIGHT; +000038 244b MOVS r4,#0x4b +00003a 0164 LSLS r4,r4,#5 +;;;2963 g_tx_ctrl_handle->base_info.dst_w = OUTPUT_WIDTH; +00003c 6201 STR r1,[r0,#0x20] +;;;2964 g_tx_ctrl_handle->base_info.dst_h = OUTPUT_HEIGHT; +00003e 6244 STR r4,[r0,#0x24] +;;;2965 g_tx_ctrl_handle->base_info.src_frate = INPUT_FRAME_RATE; +000040 62c4 STR r4,[r0,#0x2c] +000042 6281 STR r1,[r0,#0x28] +000044 4601 MOV r1,r0 +000046 3120 ADDS r1,r1,#0x20 +000048 740b STRB r3,[r1,#0x10] +;;;2966 g_tx_ctrl_handle->base_info.src_mode = INPUT_DATA_MODE; +00004a 744a STRB r2,[r1,#0x11] +;;;2967 // g_tx_ctrl_handle->tx_frame_rate = 60; //61-62 +;;;2968 // g_tx_ctrl_handle->lp_exit_lpdt = true; +;;;2969 g_tx_ctrl_handle->tx_line_delay = 100; //100 do800 works; +00004c 2164 MOVS r1,#0x64 +;;;2970 +;;;2971 hal_dsi_tx_ctrl_init(g_tx_ctrl_handle); +00004e 63c1 STR r1,[r0,#0x3c] +000050 f7fffffe BL hal_dsi_tx_ctrl_init +;;;2972 /* AP ûзʱĬϵʾɫ, Ϊ0 0 0(ɫ), ɫΪdebugʹ */ +;;;2973 #ifndef DISPLAY_ONLY +;;;2974 hal_dsi_tx_ctrl_set_overwrite_rgb(0x00, 0x00, 0x00); +000054 2200 MOVS r2,#0 +000056 4611 MOV r1,r2 +000058 4610 MOV r0,r2 +00005a f7fffffe BL hal_dsi_tx_ctrl_set_overwrite_rgb +;;;2975 #else +;;;2976 hal_dsi_tx_ctrl_set_overwrite_rgb(0x00, 0x00, 0x00); +;;;2977 #endif +;;;2978 } +00005e bd10 POP {r4,pc} +;;;2979 + ENDP + + |L15.96| + DCD ||.data|| + + AREA ||i.init_panel||, CODE, READONLY, ALIGN=2 + + init_panel PROC +;;;2836 +;;;2837 static void init_panel(void) +000000 b5f8 PUSH {r3-r7,lr} +000002 2001 MOVS r0,#1 +000004 f7fffffe BL hal_dsi_tx_ctrl_panel_reset_pin +000008 200a MOVS r0,#0xa +00000a f7fffffe BL delayMs +00000e 2000 MOVS r0,#0 +000010 f7fffffe BL hal_dsi_tx_ctrl_panel_reset_pin +000014 200a MOVS r0,#0xa +000016 f7fffffe BL delayMs +00001a 2001 MOVS r0,#1 +00001c f7fffffe BL hal_dsi_tx_ctrl_panel_reset_pin +000020 200a MOVS r0,#0xa +000022 f7fffffe BL delayMs +;;;2838 { +;;;2839 // uint8_t data[20] = {0}; +;;;2840 +;;;2841 /* reset panel*/ +;;;2842 tx_panel_reset(); +;;;2843 +;;;2844 // hal_gpio_init_output(IO_PAD_TD_LEDPWM, IO_LVL_HIGH); +;;;2845 /* enter send initial code mode*/ +;;;2846 hal_dsi_tx_ctrl_enter_init_panel_mode(); +000026 f7fffffe BL hal_dsi_tx_ctrl_enter_init_panel_mode +;;;2847 +;;;2848 #if PANEL_INIT_CODE_ARRAY +;;;2849 send_panel_init_code(sizeof(panel_init_code), panel_init_code); +00002a 4f15 LDR r7,|L16.128| +00002c 4d15 LDR r5,|L16.132| +00002e 2400 MOVS r4,#0 + |L16.48| +000030 192b ADDS r3,r5,r4 +000032 789e LDRB r6,[r3,#2] +000034 7859 LDRB r1,[r3,#1] +000036 5d28 LDRB r0,[r5,r4] +000038 4632 MOV r2,r6 +00003a 1cdb ADDS r3,r3,#3 +00003c f7fffffe BL hal_dsi_tx_ctrl_write_array_cmd +000040 19a4 ADDS r4,r4,r6 +000042 2032 MOVS r0,#0x32 +000044 1ce4 ADDS r4,r4,#3 +000046 f7fffffe BL delayUs +00004a 42bc CMP r4,r7 +00004c d3f0 BCC |L16.48| +;;;2850 TAU_LOGD("panel init done"); +;;;2851 +;;;2852 // hal_dsi_tx_ctrl_write_cmd(0x39, 0, 3, 0x51, 0x00, 0x01); //01 +;;;2853 +;;;2854 #if USE_FIRST_CODE +;;;2855 hal_gpio_set_output_data(IO_PAD_PWMEN, IO_LVL_HIGH); //LED_ON +00004e 2101 MOVS r1,#1 +000050 2013 MOVS r0,#0x13 +000052 f7fffffe BL hal_gpio_set_output_data +;;;2856 hal_dsi_rx_ctrl_set_hw_tear_mode(g_rx_ctrl_handle); +000056 480b LDR r0,|L16.132| +000058 383c SUBS r0,r0,#0x3c +00005a 6a80 LDR r0,[r0,#0x28] ; g_rx_ctrl_handle +00005c f7fffffe BL hal_dsi_rx_ctrl_set_hw_tear_mode +;;;2857 hal_dsi_tx_ctrl_write_cmd(0x05, 0, 1, 0x11); +000060 2311 MOVS r3,#0x11 +000062 2201 MOVS r2,#1 +000064 2100 MOVS r1,#0 +000066 2005 MOVS r0,#5 +000068 f7fffffe BL hal_dsi_tx_ctrl_write_cmd +;;;2858 // hal_gpio_set_output_data(IO_PAD_PWMEN, IO_LVL_HIGH); //LED_ON +;;;2859 delayMs(10); //90 +00006c 200a MOVS r0,#0xa +00006e f7fffffe BL delayMs +;;;2860 // Gpio_swire_output(2, 40); +;;;2861 // delayMs(20); +;;;2862 // hal_dsi_tx_ctrl_write_cmd(0x05, 0, 1, 0x29); +;;;2863 // delayMs(20); +;;;2864 +;;;2865 #else +;;;2866 hal_dsi_rx_ctrl_set_hw_tear_mode(g_rx_ctrl_handle); +;;;2867 hal_dsi_tx_ctrl_write_cmd(0x05, 0, 1, 0x11); +;;;2868 hal_gpio_set_output_data(IO_PAD_PWMEN, IO_LVL_HIGH); //LED_ON +;;;2869 delayMs(50); // 28msʱʱЩ΢50ʧ +;;;2870 //delayMs(41); // 28msʱ2650ֻ40 +;;;2871 Gpio_swire_output(2,58); //58 +;;;2872 delayMs(100); //100 +;;;2873 hal_dsi_tx_ctrl_write_cmd(0x05, 0, 1, 0x29); +;;;2874 Gpio_swire_output(2,38);//30 +;;;2875 delayMs(20); +;;;2876 #endif +;;;2877 +;;;2878 #endif +;;;2879 +;;;2880 /* exit send initial code mode*/ +;;;2881 hal_dsi_tx_ctrl_exit_init_panel_mode(); +000072 f7fffffe BL hal_dsi_tx_ctrl_exit_init_panel_mode +;;;2882 delayMs(20); //10 +000076 2014 MOVS r0,#0x14 +000078 f7fffffe BL delayMs +;;;2883 } +00007c bdf8 POP {r3-r7,pc} +;;;2884 + ENDP + +00007e 0000 DCW 0x0000 + |L16.128| + DCD 0x00001d2a + |L16.132| + DCD ||.data||+0x3c + + AREA ||i.open_mipi_rx||, CODE, READONLY, ALIGN=2 + + open_mipi_rx PROC +;;;2886 +;;;2887 static void open_mipi_rx(void) +000000 b570 PUSH {r4-r6,lr} +;;;2888 { +000002 b0a0 SUB sp,sp,#0x80 +;;;2889 /* TE */ +;;;2890 hal_gpio_set_mode(IO_PAD_AP_TE, IO_MODE_TEAR); +000004 2100 MOVS r1,#0 +000006 2003 MOVS r0,#3 +000008 f7fffffe BL hal_gpio_set_mode +;;;2891 +;;;2892 if (g_rx_ctrl_handle == NULL) +00000c 4d1f LDR r5,|L17.140| +00000e 6aa8 LDR r0,[r5,#0x28] ; g_rx_ctrl_handle +000010 2800 CMP r0,#0 +000012 d102 BNE |L17.26| +;;;2893 { +;;;2894 /* rx ctrl handle */ +;;;2895 g_rx_ctrl_handle = hal_dsi_rx_ctrl_create_handle(); +000014 f7fffffe BL hal_dsi_rx_ctrl_create_handle +000018 62a8 STR r0,[r5,#0x28] ; g_rx_ctrl_handle + |L17.26| +;;;2896 } +;;;2897 /* ò */ +;;;2898 g_rx_ctrl_handle->base_info.src_w = INPUT_WIDTH; +00001a 2087 MOVS r0,#0x87 +;;;2899 g_rx_ctrl_handle->base_info.src_h = INPUT_HEIGHT; +00001c 264b MOVS r6,#0x4b +00001e 6aac LDR r4,[r5,#0x28] ; g_rx_ctrl_handle +000020 00c0 LSLS r0,r0,#3 ;2898 +000022 0176 LSLS r6,r6,#5 +000024 c441 STM r4!,{r0,r6} +;;;2900 g_rx_ctrl_handle->base_info.dst_w = OUTPUT_WIDTH; +;;;2901 g_rx_ctrl_handle->base_info.dst_h = OUTPUT_HEIGHT; +;;;2902 g_rx_ctrl_handle->base_info.src_frate = INPUT_FRAME_RATE; +000026 6066 STR r6,[r4,#4] +000028 6020 STR r0,[r4,#0] +00002a 2002 MOVS r0,#2 +00002c 7220 STRB r0,[r4,#8] +;;;2903 g_rx_ctrl_handle->base_info.src_mode = INPUT_DATA_MODE; +00002e 2001 MOVS r0,#1 +000030 7260 STRB r0,[r4,#9] +;;;2904 g_rx_ctrl_handle->rx_color_mode = INPUT_COLOR_MODE; +000032 2104 MOVS r1,#4 +000034 7521 STRB r1,[r4,#0x14] +;;;2905 g_rx_ctrl_handle->rx_lanes = INPUT_MIPI_LANE_NUM; +000036 7561 STRB r1,[r4,#0x15] +;;;2906 g_rx_ctrl_handle->rx_nonburst_models = INPUT_VIDEO_MODEL; /* ɲ */ +000038 75a0 STRB r0,[r4,#0x16] +;;;2907 g_rx_ctrl_handle->rx_vc = INPUT_VC; +00003a 2100 MOVS r1,#0 +00003c 75e1 STRB r1,[r4,#0x17] +;;;2908 g_rx_ctrl_handle->compress_en = INPUT_COMPRESS; +00003e 7620 STRB r0,[r4,#0x18] +;;;2909 g_rx_ctrl_handle->rx_hsclk_rate = INPUT_MIPI_LANE_RATE; +000040 4813 LDR r0,|L17.144| +;;;2910 g_rx_ctrl_handle->cus_dcs_entry_table = g_cus_rx_dcs_execute_table; /* ע DCSб */ +000042 61e0 STR r0,[r4,#0x1c] +000044 4620 MOV r0,r4 +000046 4913 LDR r1,|L17.148| +000048 3078 ADDS r0,r0,#0x78 +;;;2911 g_rx_ctrl_handle->rx_dcs_read_entry = ap_dcs_read; /* עdsc read ص,ѡ,˺Ϊʱcus_dcs_entry_tableִ */ +00004a 6281 STR r1,[r0,#0x28] +00004c 4912 LDR r1,|L17.152| +;;;2912 g_rx_ctrl_handle->pps_update_entry = pps_update_handle; +00004e 62c1 STR r1,[r0,#0x2c] +000050 4912 LDR r1,|L17.156| +;;;2913 #if 1//򿪻ᵼ¿ӡϢTX +;;;2914 // g_rx_ctrl_handle->pq_marginal = PQ_TYPE_5; +;;;2915 // g_rx_ctrl_handle->err_handler_level = ERR_HANDLE_L1; +;;;2916 #endif +;;;2917 /* ǰԤPPS, AP PPS cmdҲ */ +;;;2918 if (g_rx_ctrl_handle->compress_en == true) +;;;2919 { +;;;2920 uint8_t pps[128] = {0x11,0x00,0x00,0x89,0x30,0x80,0x09,0x60,0x04,0x38,0x00,0x1E,0x02,0x1C,0x02,0x1C, +000052 6301 STR r1,[r0,#0x30] +000054 490f LDR r1,|L17.148| +000056 2280 MOVS r2,#0x80 +000058 3178 ADDS r1,r1,#0x78 +00005a 4668 MOV r0,sp +00005c 3c08 SUBS r4,r4,#8 +00005e f7fffffe BL __aeabi_memcpy4 +;;;2921 0x02,0x00,0x02,0x0E,0x00,0x20,0x02,0xE3,0x00,0x07,0x00,0x0C,0x03,0x50,0x03,0x64, +;;;2922 0x18,0x00,0x10,0xF0,0x03,0x0C,0x20,0x00,0x06,0x0B,0x0B,0x33,0x0E,0x1C,0x2A,0x38, +;;;2923 0x46,0x54,0x62,0x69,0x70,0x77,0x79,0x7B,0x7D,0x7E,0x01,0x02,0x01,0x00,0x09,0x40, +;;;2924 0x09,0xBE,0x19,0xFC,0x19,0xFA,0x19,0xF8,0x1A,0x38,0x1A,0x78,0x1A,0xB6,0x2A,0xF6, +;;;2925 0x2B,0x34,0x2B,0x74,0x3B,0x74,0x63,0xF4,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +;;;2926 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +;;;2927 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}; +;;;2928 +;;;2929 hal_dsi_rx_ctrl_pre_init_pps(g_rx_ctrl_handle, pps, 128); +000062 2280 MOVS r2,#0x80 +000064 4669 MOV r1,sp +000066 4620 MOV r0,r4 +000068 f7fffffe BL hal_dsi_rx_ctrl_pre_init_pps +;;;2930 } +;;;2931 +;;;2932 /* ʼrx ctrl */ +;;;2933 hal_dsi_rx_ctrl_init(g_rx_ctrl_handle); +00006c 6aa8 LDR r0,[r5,#0x28] ; g_rx_ctrl_handle +00006e f7fffffe BL hal_dsi_rx_ctrl_init +;;;2934 //*((uint32_t *)(0x40002B04)) = 1; +;;;2935 +;;;2936 #ifdef USE_FOR_SUMSUNG_S20U +;;;2937 hal_dsi_rx_ctrl_set_cus_sync_line(g_rx_ctrl_handle, 2400);// lss add, ˺SYNC_LIN_NUMBER +000072 4631 MOV r1,r6 +000074 6aa8 LDR r0,[r5,#0x28] ; g_rx_ctrl_handle +000076 f7fffffe BL hal_dsi_rx_ctrl_set_cus_sync_line +;;;2938 #endif +;;;2939 hal_dsi_rx_ctrl_hight_performan_mode(g_rx_ctrl_handle); +00007a 6aa8 LDR r0,[r5,#0x28] ; g_rx_ctrl_handle +00007c f7fffffe BL hal_dsi_rx_ctrl_hight_performan_mode +;;;2940 //hal_dsi_rx_ctrl_set_sw_tear_mode(g_rx_ctrl_handle); +;;;2941 /* rx ctrl */ +;;;2942 hal_dsi_rx_ctrl_start(g_rx_ctrl_handle); +000080 6aa8 LDR r0,[r5,#0x28] ; g_rx_ctrl_handle +000082 f7fffffe BL hal_dsi_rx_ctrl_start +;;;2943 } +000086 b020 ADD sp,sp,#0x80 +000088 bd70 POP {r4-r6,pc} +;;;2944 + ENDP + +00008a 0000 DCW 0x0000 + |L17.140| + DCD ||.data|| + |L17.144| + DCD 0x47868c00 + |L17.148| + DCD ||.constdata|| + |L17.152| + DCD ap_dcs_read + |L17.156| + DCD pps_update_handle + + AREA ||i.pps_update_handle||, CODE, READONLY, ALIGN=2 + + pps_update_handle PROC +;;;868 /* PPS update callback ڷֱлcase */ +;;;869 static bool pps_update_handle(uint8_t *pps, uint8_t size, uint32_t pic_width, uint32_t pic_height) +000000 b570 PUSH {r4-r6,lr} +;;;870 { +;;;871 //hal_gpio_set_output_data(IO_PAD_PWMEN, IO_LVL_HIGH); +;;;872 if (pic_width != g_rx_ctrl_handle->base_info.src_w || pic_height != g_rx_ctrl_handle->base_info.src_h) +000002 4c13 LDR r4,|L18.80| +000004 4615 MOV r5,r2 ;870 +000006 6aa0 LDR r0,[r4,#0x28] ; g_rx_ctrl_handle +000008 461e MOV r6,r3 ;870 +00000a 6801 LDR r1,[r0,#0] +00000c 42a9 CMP r1,r5 +00000e d102 BNE |L18.22| +000010 6841 LDR r1,[r0,#4] +000012 42b1 CMP r1,r6 +000014 d01a BEQ |L18.76| + |L18.22| +;;;873 { +;;;874 /* PPS Update ҷֱʷ仯 */ +;;;875 hal_dsi_rx_ctrl_set_sw_tear_mode(g_rx_ctrl_handle); +000016 f7fffffe BL hal_dsi_rx_ctrl_set_sw_tear_mode +;;;876 g_rx_ctrl_handle->base_info.src_w = pic_width; +;;;877 g_rx_ctrl_handle->base_info.src_h = pic_height; +;;;878 /* עⲿֻPPSǰ Compression Mode Command */ +;;;879 g_rx_ctrl_handle->compress_en = true; //hal_dsi_rx_ctrl_get_compressen_en(g_rx_ctrl_handle); +00001a 6aa0 LDR r0,[r4,#0x28] ; g_rx_ctrl_handle +00001c 2201 MOVS r2,#1 +00001e 4601 MOV r1,r0 +000020 c060 STM r0!,{r5,r6} +000022 3120 ADDS r1,r1,#0x20 +000024 700a STRB r2,[r1,#0] +;;;880 // g_rx_ctrl_handle->compress_en = hal_dsi_rx_ctrl_get_compressen_en(g_rx_ctrl_handle); +;;;881 if(pic_width > 720) +000026 212d MOVS r1,#0x2d +000028 0109 LSLS r1,r1,#4 +00002a 3808 SUBS r0,r0,#8 +00002c 428d CMP r5,r1 +00002e d902 BLS |L18.54| +;;;882 { +;;;883 g_tx_ctrl_handle->base_info.src_w = pic_width; +000030 6ae1 LDR r1,[r4,#0x2c] ; g_tx_ctrl_handle +;;;884 g_tx_ctrl_handle->base_info.src_h = pic_height; +000032 624e STR r6,[r1,#0x24] +000034 620d STR r5,[r1,#0x20] + |L18.54| +;;;885 } +;;;886 hal_dsi_rx_ctrl_toggle_resolution(g_rx_ctrl_handle); +000036 f7fffffe BL hal_dsi_rx_ctrl_toggle_resolution +;;;887 //*((uint32_t *)(0x40002B04)) = 1; +;;;888 if(ap_tear_flag){ +00003a 7ae0 LDRB r0,[r4,#0xb] ; ap_tear_flag +00003c 2800 CMP r0,#0 +00003e 6aa0 LDR r0,[r4,#0x28] ; g_rx_ctrl_handle +000040 d002 BEQ |L18.72| +;;;889 hal_dsi_rx_ctrl_set_hw_tear_mode(g_rx_ctrl_handle); +000042 f7fffffe BL hal_dsi_rx_ctrl_set_hw_tear_mode +000046 e001 B |L18.76| + |L18.72| +;;;890 }else{ +;;;891 hal_dsi_rx_ctrl_set_sw_tear_mode(g_rx_ctrl_handle); +000048 f7fffffe BL hal_dsi_rx_ctrl_set_sw_tear_mode + |L18.76| +;;;892 } +;;;893 } +;;;894 return true; +00004c 2001 MOVS r0,#1 +;;;895 } +00004e bd70 POP {r4-r6,pc} +;;;896 + ENDP + + |L18.80| + DCD ||.data|| + + AREA ||i.soft_timer3_cb||, CODE, READONLY, ALIGN=2 + + soft_timer3_cb PROC +;;;3040 #ifdef ADD_TIMER3_FUNCTION +;;;3041 static void soft_timer3_cb(void *data) +000000 b510 PUSH {r4,lr} +;;;3042 { +;;;3043 hal_timer_start(TIMER_NUM3, 10, soft_timer3_cb, NULL); +000002 2300 MOVS r3,#0 +000004 4a07 LDR r2,|L19.36| +000006 210a MOVS r1,#0xa +000008 2003 MOVS r0,#3 +00000a f7fffffe BL hal_timer_start +;;;3044 tp_sleep_count++; +00000e 4906 LDR r1,|L19.40| +000010 7808 LDRB r0,[r1,#0] ; tp_sleep_count +000012 1c40 ADDS r0,r0,#1 +000014 7008 STRB r0,[r1,#0] +;;;3045 if(phone_DisplayOFF_count>0) +000016 4905 LDR r1,|L19.44| +000018 8b08 LDRH r0,[r1,#0x18] ; phone_DisplayOFF_count +00001a 2800 CMP r0,#0 +00001c d001 BEQ |L19.34| +00001e 1c40 ADDS r0,r0,#1 +;;;3046 { +;;;3047 phone_DisplayOFF_count++; +000020 8308 STRH r0,[r1,#0x18] + |L19.34| +;;;3048 } +;;;3049 +;;;3050 #if 0// test +;;;3051 if (test_count) +;;;3052 { +;;;3053 test_count++; +;;;3054 } +;;;3055 #endif +;;;3056 +;;;3057 #if AUTO_CAL_TP +;;;3058 if (g_exit_sleep_mode) +;;;3059 { +;;;3060 if (g_cal_cnt > 0) +;;;3061 { +;;;3062 g_cal_cnt--; +;;;3063 if (g_cal_cnt == 0) +;;;3064 { +;;;3065 g_calibration_flag = true; +;;;3066 TAU_LOGD("Start cal tp!\n"); +;;;3067 } +;;;3068 } +;;;3069 } +;;;3070 #endif +;;;3071 } +000022 bd10 POP {r4,pc} +;;;3072 #endif + ENDP + + |L19.36| + DCD soft_timer3_cb + |L19.40| + DCD tp_sleep_count + |L19.44| + DCD ||.data|| + + AREA ||i.tp_heartbeat_exec||, CODE, READONLY, ALIGN=2 + + tp_heartbeat_exec PROC +;;;3102 +;;;3103 void tp_heartbeat_exec(void) +000000 b510 PUSH {r4,lr} +;;;3104 { +;;;3105 if (s_screen_init_complate) +000002 480c LDR r0,|L20.52| +000004 7800 LDRB r0,[r0,#0] ; s_screen_init_complate +000006 2800 CMP r0,#0 +000008 d007 BEQ |L20.26| +;;;3106 { +;;;3107 if(hal_gpio_get_input_data(IO_PAD_TD_INT)) +00000a 2009 MOVS r0,#9 +00000c f7fffffe BL hal_gpio_get_input_data +000010 2200 MOVS r2,#0 +;;;3108 { +;;;3109 s_heartbeat = 0; +000012 4909 LDR r1,|L20.56| +000014 2800 CMP r0,#0 ;3107 +000016 d001 BEQ |L20.28| +000018 630a STR r2,[r1,#0x30] ; s_heartbeat + |L20.26| +;;;3110 } +;;;3111 else +;;;3112 { +;;;3113 if(s_heartbeat < (65536/50)) // 65536*3 = 900ms 65536/50 = 6ms +;;;3114 { +;;;3115 s_heartbeat ++; +;;;3116 }else +;;;3117 { +;;;3118 TAU_LOGD("hb..."); +;;;3119 s_heartbeat = 0; +;;;3120 // ap_tp_st_touch_software_reset(); +;;;3121 ap_tp_st_touch_hardware_reset(); +;;;3122 } +;;;3123 } +;;;3124 } +;;;3125 } +00001a bd10 POP {r4,pc} + |L20.28| +00001c 4b07 LDR r3,|L20.60| +00001e 6b08 LDR r0,[r1,#0x30] ;3113 ; s_heartbeat +000020 4298 CMP r0,r3 ;3113 +000022 d202 BCS |L20.42| +000024 1c40 ADDS r0,r0,#1 ;3113 +000026 6308 STR r0,[r1,#0x30] ;3115 ; s_heartbeat +000028 bd10 POP {r4,pc} + |L20.42| +00002a 630a STR r2,[r1,#0x30] ;3121 ; s_heartbeat +00002c f7fffffe BL ap_tp_st_touch_hardware_reset +000030 bd10 POP {r4,pc} +;;;3126 //static uint32_t loop_count=1; + ENDP + +000032 0000 DCW 0x0000 + |L20.52| + DCD s_screen_init_complate + |L20.56| + DCD ||.data|| + |L20.60| + DCD 0x0000051e + + AREA ||.constdata||, DATA, READONLY, ALIGN=2 + + g_cus_rx_dcs_execute_table + DCD 0x00000029 + DCD ap_set_display_on +000008 01000000 DCB 0x01,0x00,0x00,0x00 + DCD 0x00000028 + DCD ap_set_display_off +000014 01000000 DCB 0x01,0x00,0x00,0x00 + DCD 0x000000df + DCD ap_get_reg_df +000020 00000000 DCB 0x00,0x00,0x00,0x00 + DCD 0x000000ca + DCD ap_get_reg_ca +00002c 00000000 DCB 0x00,0x00,0x00,0x00 + DCD 0x000000b1 + DCD ap_set_backlight +000038 00000000 DCB 0x00,0x00,0x00,0x00 + DCD 0x00000060 + DCD ap_update_frame_rate +000044 01000000 DCB 0x01,0x00,0x00,0x00 + DCD 0x00000010 + DCD ap_set_enter_sleep_mode +000050 01000000 DCB 0x01,0x00,0x00,0x00 + DCD 0x00000011 + DCD ap_set_exit_sleep_mode +00005c 01000000 DCB 0x01,0x00,0x00,0x00 + DCD 0x00000004 + DCD ap_set_tp_calibration_04 +000068 01000000 DCB 0x01,0x00,0x00,0x00 + DCD 0x00000000 + DCD 0x00000000 +000074 00000000 DCB 0x00,0x00,0x00,0x00 +000078 11000089 DCB 0x11,0x00,0x00,0x89 +00007c 30800960 DCB 0x30,0x80,0x09,0x60 +000080 0438001e DCB 0x04,0x38,0x00,0x1e +000084 021c021c DCB 0x02,0x1c,0x02,0x1c +000088 0200020e DCB 0x02,0x00,0x02,0x0e +00008c 002002e3 DCB 0x00,0x20,0x02,0xe3 +000090 0007000c DCB 0x00,0x07,0x00,0x0c +000094 03500364 DCB 0x03,0x50,0x03,0x64 +000098 180010f0 DCB 0x18,0x00,0x10,0xf0 +00009c 030c2000 DCB 0x03,0x0c,0x20,0x00 +0000a0 060b0b33 DCB 0x06,0x0b,0x0b,0x33 +0000a4 0e1c2a38 DCB 0x0e,0x1c,0x2a,0x38 +0000a8 46546269 DCB 0x46,0x54,0x62,0x69 +0000ac 7077797b DCB 0x70,0x77,0x79,0x7b +0000b0 7d7e0102 DCB 0x7d,0x7e,0x01,0x02 +0000b4 01000940 DCB 0x01,0x00,0x09,0x40 +0000b8 09be19fc DCB 0x09,0xbe,0x19,0xfc +0000bc 19fa19f8 DCB 0x19,0xfa,0x19,0xf8 +0000c0 1a381a78 DCB 0x1a,0x38,0x1a,0x78 +0000c4 1ab62af6 DCB 0x1a,0xb6,0x2a,0xf6 +0000c8 2b342b74 DCB 0x2b,0x34,0x2b,0x74 +0000cc 3b7463f4 DCB 0x3b,0x74,0x63,0xf4 +0000d0 00000000 DCB 0x00,0x00,0x00,0x00 +0000d4 00000000 DCB 0x00,0x00,0x00,0x00 +0000d8 00000000 DCB 0x00,0x00,0x00,0x00 +0000dc 00000000 DCB 0x00,0x00,0x00,0x00 +0000e0 00000000 DCB 0x00,0x00,0x00,0x00 +0000e4 00000000 DCB 0x00,0x00,0x00,0x00 +0000e8 00000000 DCB 0x00,0x00,0x00,0x00 +0000ec 00000000 DCB 0x00,0x00,0x00,0x00 +0000f0 00000000 DCB 0x00,0x00,0x00,0x00 +0000f4 00000000 DCB 0x00,0x00,0x00,0x00 + + AREA ||.data||, DATA, ALIGN=2 + + start_display_on +000000 01 DCB 0x01 + g_need_enter_sleep_mode +000001 00 DCB 0x00 + g_mipi_path_off +000002 00 DCB 0x00 + phone_off_flag +000003 00 DCB 0x00 + g_exit_sleep_mode +000004 00 DCB 0x00 + panel_display_done +000005 00 DCB 0x00 + phone_power_on +000006 00 DCB 0x00 + phone_86_flag +000007 00 DCB 0x00 + phone_A6_flag +000008 00 DCB 0x00 + phone_start_flag +000009 00 DCB 0x00 + phone_DisplayOFF_flag +00000a 00 DCB 0x00 + ap_tear_flag +00000b 01 DCB 0x01 + g_enter_display_off +00000c 00 DCB 0x00 + g_enter_display_ON +00000d 00 DCB 0x00 + bl_adj_flag +00000e 00 DCB 0x00 + panel_mode +00000f 01 DCB 0x01 + b3_read_flag +000010 00 DCB 0x00 + c8_read_flag +000011 00 DCB 0x00 + c9_read_flag +000012 00 DCB 0x00 + c9_read_flag2 +000013 00 DCB 0x00 + c9_read_flag3 +000014 00 DCB 0x00 + flag_5a +000015 00 DCB 0x00 + frame_rate +000016 0000 DCB 0x00,0x00 + phone_DisplayOFF_count +000018 0000 DCW 0x0000 + value_reg_b1 +00001a 0000 DCW 0x0000 + value_reg_b1_bak +00001c 0000 DCW 0x0000 + value_reg51 +00001e 0000 DCW 0x0000 + value_reg51_bak +000020 0000 DCW 0x0000 + panel_r +000022 0000 DCB 0x00,0x00 + panel_g +000024 0000 DCB 0x00,0x00 + panel_b +000026 0000 DCB 0x00,0x00 + g_rx_ctrl_handle + DCD 0x00000000 + g_tx_ctrl_handle + DCD 0x00000000 + s_heartbeat + DCD 0x00000000 + value_reg_ca + DCD 0x00000000 + value_reg_df + DCD 0x00000000 + panel_init_code +00003c 390006f0 DCB 0x39,0x00,0x06,0xf0 +000040 55aa5208 DCB 0x55,0xaa,0x52,0x08 +000044 00390009 DCB 0x00,0x39,0x00,0x09 +000048 ba027900 DCB 0xba,0x02,0x79,0x00 +00004c 14039c00 DCB 0x14,0x03,0x9c,0x00 +000050 01390002 DCB 0x01,0x39,0x00,0x02 +000054 6f083900 DCB 0x6f,0x08,0x39,0x00 +000058 09ba01af DCB 0x09,0xba,0x01,0xaf +00005c 0014001c DCB 0x00,0x14,0x00,0x1c +000060 00003900 DCB 0x00,0x00,0x39,0x00 +000064 026f1039 DCB 0x02,0x6f,0x10,0x39 +000068 0008ba01 DCB 0x00,0x08,0xba,0x01 +00006c 66001400 DCB 0x66,0x00,0x14,0x00 +000070 1c003900 DCB 0x1c,0x00,0x39,0x00 +000074 09bb0279 DCB 0x09,0xbb,0x02,0x79 +000078 0014039c DCB 0x00,0x14,0x03,0x9c +00007c 00213900 DCB 0x00,0x21,0x39,0x00 +000080 02b58439 DCB 0x02,0xb5,0x84,0x39 +000084 00026f06 DCB 0x00,0x02,0x6f,0x06 +000088 390004b5 DCB 0x39,0x00,0x04,0xb5 +00008c 2b0c3339 DCB 0x2b,0x0c,0x33,0x39 +000090 00026f0b DCB 0x00,0x02,0x6f,0x0b +000094 390004b5 DCB 0x39,0x00,0x04,0xb5 +000098 2b233339 DCB 0x2b,0x23,0x33,0x39 +00009c 00026f10 DCB 0x00,0x02,0x6f,0x10 +0000a0 390006b5 DCB 0x39,0x00,0x06,0xb5 +0000a4 0c0c0c0c DCB 0x0c,0x0c,0x0c,0x0c +0000a8 0c390002 DCB 0x0c,0x39,0x00,0x02 +0000ac 6f013900 DCB 0x6f,0x01,0x39,0x00 +0000b0 02b61939 DCB 0x02,0xb6,0x19,0x39 +0000b4 0013b799 DCB 0x00,0x13,0xb7,0x99 +0000b8 99999999 DCB 0x99,0x99,0x99,0x99 +0000bc 99876543 DCB 0x99,0x87,0x65,0x43 +0000c0 32100000 DCB 0x32,0x10,0x00,0x00 +0000c4 00000000 DCB 0x00,0x00,0x00,0x00 +0000c8 00390002 DCB 0x00,0x39,0x00,0x02 +0000cc 6f133900 DCB 0x6f,0x13,0x39,0x00 +0000d0 0db70000 DCB 0x0d,0xb7,0x00,0x00 +0000d4 01137889 DCB 0x01,0x13,0x78,0x89 +0000d8 9aabbccd DCB 0x9a,0xab,0xbc,0xcd +0000dc deef3900 DCB 0xde,0xef,0x39,0x00 +0000e0 026f1f39 DCB 0x02,0x6f,0x1f,0x39 +0000e4 0019b708 DCB 0x00,0x19,0xb7,0x08 +0000e8 31668ff5 DCB 0x31,0x66,0x8f,0xf5 +0000ec c1c233ff DCB 0xc1,0xc2,0x33,0xff +0000f0 7fff7fff DCB 0x7f,0xff,0x7f,0xff +0000f4 7fff7fff DCB 0x7f,0xff,0x7f,0xff +0000f8 7fff7fff DCB 0x7f,0xff,0x7f,0xff +0000fc 7fffff39 DCB 0x7f,0xff,0xff,0x39 +000100 0003b298 DCB 0x00,0x03,0xb2,0x98 +000104 60390002 DCB 0x60,0x39,0x00,0x02 +000108 6f093900 DCB 0x6f,0x09,0x39,0x00 +00010c 02b24039 DCB 0x02,0xb2,0x40,0x39 +000110 00026f0f DCB 0x00,0x02,0x6f,0x0f +000114 390009b2 DCB 0x39,0x00,0x09,0xb2 +000118 202021c2 DCB 0x20,0x20,0x21,0xc2 +00011c 21c22fff DCB 0x21,0xc2,0x2f,0xff +000120 39000db3 DCB 0x39,0x00,0x0d,0xb3 +000124 0008001c DCB 0x00,0x08,0x00,0x1c +000128 001c003c DCB 0x00,0x1c,0x00,0x3c +00012c 003c0070 DCB 0x00,0x3c,0x00,0x70 +000130 3900026f DCB 0x39,0x00,0x02,0x6f +000134 0c39000d DCB 0x0c,0x39,0x00,0x0d +000138 b3007000 DCB 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0x39,0x00,0x02,0x6f +00145c 24390008 DCB 0x24,0x39,0x00,0x08 +001460 ca000000 DCB 0xca,0x00,0x00,0x00 +001464 00000000 DCB 0x00,0x00,0x00,0x00 +001468 3900026f DCB 0x39,0x00,0x02,0x6f +00146c 00390016 DCB 0x00,0x39,0x00,0x16 +001470 cb000000 DCB 0xcb,0x00,0x00,0x00 +001474 00000000 DCB 0x00,0x00,0x00,0x00 +001478 00000000 DCB 0x00,0x00,0x00,0x00 +00147c 00000000 DCB 0x00,0x00,0x00,0x00 +001480 00000000 DCB 0x00,0x00,0x00,0x00 +001484 00003900 DCB 0x00,0x00,0x39,0x00 +001488 026f1539 DCB 0x02,0x6f,0x15,0x39 +00148c 0010cb00 DCB 0x00,0x10,0xcb,0x00 +001490 00000000 DCB 0x00,0x00,0x00,0x00 +001494 00000000 DCB 0x00,0x00,0x00,0x00 +001498 00000000 DCB 0x00,0x00,0x00,0x00 +00149c 00003900 DCB 0x00,0x00,0x39,0x00 +0014a0 026f2439 DCB 0x02,0x6f,0x24,0x39 +0014a4 0008cb00 DCB 0x00,0x08,0xcb,0x00 +0014a8 00000000 DCB 0x00,0x00,0x00,0x00 +0014ac 00003900 DCB 0x00,0x00,0x39,0x00 +0014b0 026f0039 DCB 0x02,0x6f,0x00,0x39 +0014b4 0016cc00 DCB 0x00,0x16,0xcc,0x00 +0014b8 00000000 DCB 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0xce,0x00,0x00,0x00 +00157c 00000000 DCB 0x00,0x00,0x00,0x00 +001580 3900026f DCB 0x39,0x00,0x02,0x6f +001584 00390016 DCB 0x00,0x39,0x00,0x16 +001588 cf000000 DCB 0xcf,0x00,0x00,0x00 +00158c 00000000 DCB 0x00,0x00,0x00,0x00 +001590 00000000 DCB 0x00,0x00,0x00,0x00 +001594 00000000 DCB 0x00,0x00,0x00,0x00 +001598 00000000 DCB 0x00,0x00,0x00,0x00 +00159c 00003900 DCB 0x00,0x00,0x39,0x00 +0015a0 026f1539 DCB 0x02,0x6f,0x15,0x39 +0015a4 0010cf00 DCB 0x00,0x10,0xcf,0x00 +0015a8 00000000 DCB 0x00,0x00,0x00,0x00 +0015ac 00000000 DCB 0x00,0x00,0x00,0x00 +0015b0 00000000 DCB 0x00,0x00,0x00,0x00 +0015b4 00003900 DCB 0x00,0x00,0x39,0x00 +0015b8 026f2439 DCB 0x02,0x6f,0x24,0x39 +0015bc 0008cf00 DCB 0x00,0x08,0xcf,0x00 +0015c0 00000000 DCB 0x00,0x00,0x00,0x00 +0015c4 00003900 DCB 0x00,0x00,0x39,0x00 +0015c8 026f0039 DCB 0x02,0x6f,0x00,0x39 +0015cc 0016d000 DCB 0x00,0x16,0xd0,0x00 +0015d0 00000000 DCB 0x00,0x00,0x00,0x00 +0015d4 00000000 DCB 0x00,0x00,0x00,0x00 +0015d8 00000000 DCB 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0x00,0x11,0xba,0x02 +001b1c 00020002 DCB 0x00,0x02,0x00,0x02 +001b20 00020005 DCB 0x00,0x02,0x00,0x05 +001b24 d1080008 DCB 0xd1,0x08,0x00,0x08 +001b28 00080039 DCB 0x00,0x08,0x00,0x39 +001b2c 00026f70 DCB 0x00,0x02,0x6f,0x70 +001b30 390011ba DCB 0x39,0x00,0x11,0xba +001b34 08000800 DCB 0x08,0x00,0x08,0x00 +001b38 08000800 DCB 0x08,0x00,0x08,0x00 +001b3c 08000800 DCB 0x08,0x00,0x08,0x00 +001b40 08000800 DCB 0x08,0x00,0x08,0x00 +001b44 3900026f DCB 0x39,0x00,0x02,0x6f +001b48 80390011 DCB 0x80,0x39,0x00,0x11 +001b4c ba080005 DCB 0xba,0x08,0x00,0x05 +001b50 3e073607 DCB 0x3e,0x07,0x36,0x07 +001b54 36073607 DCB 0x36,0x07,0x36,0x07 +001b58 36073607 DCB 0x36,0x07,0x36,0x07 +001b5c 36390002 DCB 0x36,0x39,0x00,0x02 +001b60 6f903900 DCB 0x6f,0x90,0x39,0x00 +001b64 11ba0736 DCB 0x11,0xba,0x07,0x36 +001b68 07360800 DCB 0x07,0x36,0x08,0x00 +001b6c 08000800 DCB 0x08,0x00,0x08,0x00 +001b70 0800053e DCB 0x08,0x00,0x05,0x3e +001b74 07363900 DCB 0x07,0x36,0x39,0x00 +001b78 026fa039 DCB 0x02,0x6f,0xa0,0x39 +001b7c 0011ba07 DCB 0x00,0x11,0xba,0x07 +001b80 36073607 DCB 0x36,0x07,0x36,0x07 +001b84 36073607 DCB 0x36,0x07,0x36,0x07 +001b88 36073607 DCB 0x36,0x07,0x36,0x07 +001b8c 36080039 DCB 0x36,0x08,0x00,0x39 +001b90 00026fb0 DCB 0x00,0x02,0x6f,0xb0 +001b94 390011ba DCB 0x39,0x00,0x11,0xba +001b98 08000800 DCB 0x08,0x00,0x08,0x00 +001b9c 080005d1 DCB 0x08,0x00,0x05,0xd1 +001ba0 08000800 DCB 0x08,0x00,0x08,0x00 +001ba4 08000800 DCB 0x08,0x00,0x08,0x00 +001ba8 3900026f DCB 0x39,0x00,0x02,0x6f +001bac c0390011 DCB 0xc0,0x39,0x00,0x11 +001bb0 ba080008 DCB 0xba,0x08,0x00,0x08 +001bb4 00080008 DCB 0x00,0x08,0x00,0x08 +001bb8 00080008 DCB 0x00,0x08,0x00,0x08 +001bbc 00080008 DCB 0x00,0x08,0x00,0x08 +001bc0 00390002 DCB 0x00,0x39,0x00,0x02 +001bc4 6fd03900 DCB 0x6f,0xd0,0x39,0x00 +001bc8 11ba0800 DCB 0x11,0xba,0x08,0x00 +001bcc 08000800 DCB 0x08,0x00,0x08,0x00 +001bd0 08000800 DCB 0x08,0x00,0x08,0x00 +001bd4 08000800 DCB 0x08,0x00,0x08,0x00 +001bd8 08003900 DCB 0x08,0x00,0x39,0x00 +001bdc 026fe039 DCB 0x02,0x6f,0xe0,0x39 +001be0 000bba08 DCB 0x00,0x0b,0xba,0x08 +001be4 00080008 DCB 0x00,0x08,0x00,0x08 +001be8 00080008 DCB 0x00,0x08,0x00,0x08 +001bec 00390011 DCB 0x00,0x39,0x00,0x11 +001bf0 bb012c01 DCB 0xbb,0x01,0x2c,0x01 +001bf4 2c012c01 DCB 0x2c,0x01,0x2c,0x01 +001bf8 2c012c01 DCB 0x2c,0x01,0x2c,0x01 +001bfc 2c012c01 DCB 0x2c,0x01,0x2c,0x01 +001c00 2c390002 DCB 0x2c,0x39,0x00,0x02 +001c04 6f103900 DCB 0x6f,0x10,0x39,0x00 +001c08 11bb012c DCB 0x11,0xbb,0x01,0x2c +001c0c 01000100 DCB 0x01,0x00,0x01,0x00 +001c10 01000100 DCB 0x01,0x00,0x01,0x00 +001c14 012c012c DCB 0x01,0x2c,0x01,0x2c +001c18 012c3900 DCB 0x01,0x2c,0x39,0x00 +001c1c 026f2039 DCB 0x02,0x6f,0x20,0x39 +001c20 0011bb01 DCB 0x00,0x11,0xbb,0x01 +001c24 2c012c01 DCB 0x2c,0x01,0x2c,0x01 +001c28 2c012c01 DCB 0x2c,0x01,0x2c,0x01 +001c2c 2c012c01 DCB 0x2c,0x01,0x2c,0x01 +001c30 00010039 DCB 0x00,0x01,0x00,0x39 +001c34 00026f30 DCB 0x00,0x02,0x6f,0x30 +001c38 390011bb DCB 0x39,0x00,0x11,0xbb +001c3c 01000100 DCB 0x01,0x00,0x01,0x00 +001c40 012c012c DCB 0x01,0x2c,0x01,0x2c +001c44 012c012c DCB 0x01,0x2c,0x01,0x2c +001c48 012c012c DCB 0x01,0x2c,0x01,0x2c +001c4c 3900026f DCB 0x39,0x00,0x02,0x6f +001c50 40390011 DCB 0x40,0x39,0x00,0x11 +001c54 bb012c01 DCB 0xbb,0x01,0x2c,0x01 +001c58 2c012c01 DCB 0x2c,0x01,0x2c,0x01 +001c5c 00010001 DCB 0x00,0x01,0x00,0x01 +001c60 00010001 DCB 0x00,0x01,0x00,0x01 +001c64 2c390002 DCB 0x2c,0x39,0x00,0x02 +001c68 6f503900 DCB 0x6f,0x50,0x39,0x00 +001c6c 11bb012c DCB 0x11,0xbb,0x01,0x2c +001c70 012c012c DCB 0x01,0x2c,0x01,0x2c +001c74 012c012c DCB 0x01,0x2c,0x01,0x2c +001c78 012c012c DCB 0x01,0x2c,0x01,0x2c +001c7c 012c3900 DCB 0x01,0x2c,0x39,0x00 +001c80 026f6039 DCB 0x02,0x6f,0x60,0x39 +001c84 0011bb01 DCB 0x00,0x11,0xbb,0x01 +001c88 00010001 DCB 0x00,0x01,0x00,0x01 +001c8c 00010001 DCB 0x00,0x01,0x00,0x01 +001c90 00010001 DCB 0x00,0x01,0x00,0x01 +001c94 00010039 DCB 0x00,0x01,0x00,0x39 +001c98 00026f70 DCB 0x00,0x02,0x6f,0x70 +001c9c 390011bb DCB 0x39,0x00,0x11,0xbb +001ca0 01000100 DCB 0x01,0x00,0x01,0x00 +001ca4 01000100 DCB 0x01,0x00,0x01,0x00 +001ca8 01000100 DCB 0x01,0x00,0x01,0x00 +001cac 01000100 DCB 0x01,0x00,0x01,0x00 +001cb0 3900026f DCB 0x39,0x00,0x02,0x6f +001cb4 80390011 DCB 0x80,0x39,0x00,0x11 +001cb8 bb010008 DCB 0xbb,0x01,0x00,0x08 +001cbc 00000000 DCB 0x00,0x00,0x00,0x00 +001cc0 00000000 DCB 0x00,0x00,0x00,0x00 +001cc4 00000000 DCB 0x00,0x00,0x00,0x00 +001cc8 00390002 DCB 0x00,0x39,0x00,0x02 +001ccc 6f903900 DCB 0x6f,0x90,0x39,0x00 +001cd0 11bb0000 DCB 0x11,0xbb,0x00,0x00 +001cd4 00000000 DCB 0x00,0x00,0x00,0x00 +001cd8 00000000 DCB 0x00,0x00,0x00,0x00 +001cdc 00000010 DCB 0x00,0x00,0x00,0x10 +001ce0 10103900 DCB 0x10,0x10,0x39,0x00 +001ce4 026fa039 DCB 0x02,0x6f,0xa0,0x39 +001ce8 0005bb80 DCB 0x00,0x05,0xbb,0x80 +001cec 80800039 DCB 0x80,0x80,0x00,0x39 +001cf0 0002ee05 DCB 0x00,0x02,0xee,0x05 +001cf4 390005ff DCB 0x39,0x00,0x05,0xff +001cf8 aa55a580 DCB 0xaa,0x55,0xa5,0x80 +001cfc 3900026f DCB 0x39,0x00,0x02,0x6f +001d00 1d390002 DCB 0x1d,0x39,0x00,0x02 +001d04 f2053900 DCB 0xf2,0x05,0x39,0x00 +001d08 053b0014 DCB 0x05,0x3b,0x00,0x14 +001d0c 00123900 DCB 0x00,0x12,0x39,0x00 +001d10 02030139 DCB 0x02,0x03,0x01,0x39 +001d14 00029002 DCB 0x00,0x02,0x90,0x02 +001d18 39001391 DCB 0x39,0x00,0x13,0x91 +001d1c 8928000c DCB 0x89,0x28,0x00,0x0c +001d20 c200031c DCB 0xc2,0x00,0x03,0x1c +001d24 017e000f DCB 0x01,0x7e,0x00,0x0f +001d28 08bb043d DCB 0x08,0xbb,0x04,0x3d +001d2c 10f03900 DCB 0x10,0xf0,0x39,0x00 +001d30 012c3900 DCB 0x01,0x2c,0x39,0x00 +001d34 055107ff DCB 0x05,0x51,0x07,0xff +001d38 0fff3900 DCB 0x0f,0xff,0x39,0x00 +001d3c 02532039 DCB 0x02,0x53,0x20,0x39 +001d40 00013539 DCB 0x00,0x01,0x35,0x39 +001d44 00052a00 DCB 0x00,0x05,0x2a,0x00 +001d48 00043739 DCB 0x00,0x04,0x37,0x39 +001d4c 00052b00 DCB 0x00,0x05,0x2b,0x00 +001d50 00095f39 DCB 0x00,0x09,0x5f,0x39 +001d54 00022f01 DCB 0x00,0x02,0x2f,0x01 +001d58 390006f0 DCB 0x39,0x00,0x06,0xf0 +001d5c 55aa5208 DCB 0x55,0xaa,0x52,0x08 +001d60 00390002 DCB 0x00,0x39,0x00,0x02 +001d64 c077 DCB 0xc0,0x77 + + AREA ||area_number.25||, DATA, ALIGN=0 + + EXPORTAS ||area_number.25||, ||.data|| + phone_DoubleDlick_flag +000000 00 DCB 0x00 + + AREA ||area_number.26||, DATA, ALIGN=2 + + EXPORTAS ||area_number.26||, ||.data|| + value_reg_ca_bak + DCD 0x00000000 + + AREA ||i.__ARM_common_switch8||, COMGROUP=__ARM_common_switch8, CODE, READONLY, ALIGN=1 + + __ARM_common_switch8 PROC +000000 b430 PUSH {r4,r5} +000002 4674 MOV r4,lr +000004 1e64 SUBS r4,r4,#1 +000006 7825 LDRB r5,[r4,#0] +000008 1c64 ADDS r4,r4,#1 +00000a 42ab CMP r3,r5 +00000c d200 BCS |L117.16| +00000e 461d MOV r5,r3 + |L117.16| +000010 5d63 LDRB r3,[r4,r5] +000012 005b LSLS r3,r3,#1 +000014 18e3 ADDS r3,r4,r3 +000016 bc30 POP {r4,r5} +000018 4718 BX r3 + ENDP + + +;*** Start embedded assembler *** + +#line 1 "..\\..\\src\\app\\demo\\ap_demo.c" + AREA ||.rev16_text||, CODE + THUMB + EXPORT |__asm___9_ap_demo_c_b6677fcd____REV16| +#line 467 "C:\\Keil_v5\\ARM\\PACK\\ARM\\CMSIS\\5.5.1\\CMSIS\\Core\\Include\\cmsis_armcc.h" +|__asm___9_ap_demo_c_b6677fcd____REV16| PROC +#line 468 + + rev16 r0, r0 + bx lr + ENDP + AREA ||.revsh_text||, CODE + THUMB + EXPORT |__asm___9_ap_demo_c_b6677fcd____REVSH| +#line 482 +|__asm___9_ap_demo_c_b6677fcd____REVSH| PROC +#line 483 + + revsh r0, r0 + bx lr + ENDP + +;*** End embedded assembler *** diff --git a/project/ISP_568/Listings/app_tp_for_custom_s8.txt b/project/ISP_568/Listings/app_tp_for_custom_s8.txt new file mode 100644 index 0000000..863effd --- /dev/null +++ b/project/ISP_568/Listings/app_tp_for_custom_s8.txt @@ -0,0 +1,4194 @@ +; generated by Component: ARM Compiler 5.06 update 6 (build 750) Tool: ArmCC [4d3637] +; commandline ArmCC [--c99 --list --split_sections --debug -c --asm --interleave --gnu -o.\objects\app_tp_for_custom_s8.o --asm_dir=.\Listings\ --list_dir=.\Listings\ --depend=.\objects\app_tp_for_custom_s8.d --cpu=Cortex-M0 --apcs=interwork -O1 --diag_suppress=9931 -I..\..\src -I..\..\src\board -I..\..\src\common -I..\..\src\sdk\include -I..\..\src\app\demo -I..\..\src\sdk\include\M0 -I..\..\src\app -I..\..\src\app\module_demo -I..\..\src\app\touch -I..\..\src\app\S8 -I..\..\src\app\S9 -I..\CVWL568 -I.\RTE\_ISP_568 -IC:\Users\ASUS\AppData\Local\Arm\Packs\ARM\CMSIS\5.5.1\CMSIS\Core\Include -IC:\Users\ASUS\AppData\Local\Arm\Packs\ARM\CMSIS\5.5.1\Device\ARM\ARMCM0\Include -D__MICROLIB -D__UVISION_VERSION=528 -D_RTE_ -DARMCM0 -DISP_568 --omf_browse=.\objects\app_tp_for_custom_s8.crf ..\..\src\app\demo\app_tp_for_custom_s8.c] + THUMB + + AREA ||i.app_tp_phone_analysis_data||, CODE, READONLY, ALIGN=2 + + app_tp_phone_analysis_data PROC +;;;427 **************************************************************************/ +;;;428 void app_tp_phone_analysis_data(uint8_t *rxbuffer, size_t rxbuffer_size, const uint8_t **txbuffer, size_t *txbuffer_size) +000000 b5f8 PUSH {r3-r7,lr} +;;;429 { +000002 4606 MOV r6,r0 +000004 460f MOV r7,r1 +000006 4614 MOV r4,r2 +000008 461d MOV r5,r3 +;;;430 #ifdef USE_FOR_SUMSUNG_S20U +;;;431 static uint8_t phone_60_flag =0; +;;;432 static uint8_t phone_85_flag =0; +;;;433 static uint8_t phone_F6_flag =0; +;;;434 static uint8_t phone_E4_flag =0; +;;;435 static uint8_t phone_72_flag =0; +;;;436 static uint8_t phone_75_flag =0; +;;;437 static uint8_t phone_92_flag =0; +;;;438 static uint8_t phone_74_flag =0; +;;;439 +;;;440 if( (rxbuffer_size ==2) &&(rxbuffer[0] ==0xE4)) +00000a 2f02 CMP r7,#2 +00000c d10b BNE |L1.38| +00000e 7830 LDRB r0,[r6,#0] +000010 28e4 CMP r0,#0xe4 +000012 d108 BNE |L1.38| +;;;441 { +;;;442 phone_E4_flag++; +000014 48f2 LDR r0,|L1.992| +000016 7b41 LDRB r1,[r0,#0xd] ; phone_E4_flag +000018 1c49 ADDS r1,r1,#1 +00001a 7341 STRB r1,[r0,#0xd] +;;;443 phone_data_E4[0] =rxbuffer[1]; +00001c 7872 LDRB r2,[r6,#1] +00001e 4601 MOV r1,r0 +000020 700a STRB r2,[r1,#0] +;;;444 tp_sleep_in=0; +000022 2100 MOVS r1,#0 +000024 70c1 STRB r1,[r0,#3] + |L1.38| +;;;445 if(rxbuffer[1]==0x00) +;;;446 { +;;;447 // phone_start_flag=1; +;;;448 // hal_gpio_set_output_data(g_phone_output_int_pad, IO_LVL_LOW); +;;;449 } +;;;450 } +;;;451 if( (rxbuffer_size ==3) &&(rxbuffer[0] ==0x85)) +000026 2f03 CMP r7,#3 +000028 d105 BNE |L1.54| +00002a 7830 LDRB r0,[r6,#0] +00002c 2885 CMP r0,#0x85 +00002e d102 BNE |L1.54| +;;;452 { +;;;453 phone_85_flag=rxbuffer[1]; +000030 48eb LDR r0,|L1.992| +000032 7871 LDRB r1,[r6,#1] +000034 72c1 STRB r1,[r0,#0xb] + |L1.54| +;;;454 } +;;;455 if( (rxbuffer_size ==3) &&(rxbuffer[0] ==0xAE)&&(rxbuffer[1] ==0xA3)) +000036 2f03 CMP r7,#3 +000038 d10a BNE |L1.80| +00003a 7830 LDRB r0,[r6,#0] +00003c 28ae CMP r0,#0xae +00003e d107 BNE |L1.80| +000040 7870 LDRB r0,[r6,#1] +000042 28a3 CMP r0,#0xa3 +000044 d104 BNE |L1.80| +;;;456 { +;;;457 hal_gpio_set_output_data(g_phone_output_int_pad, IO_LVL_LOW); +000046 48e6 LDR r0,|L1.992| +000048 2100 MOVS r1,#0 +00004a 7880 LDRB r0,[r0,#2] ; g_phone_output_int_pad +00004c f7fffffe BL hal_gpio_set_output_data + |L1.80| +;;;458 } +;;;459 if( (rxbuffer_size ==2) &&(rxbuffer[0] ==0x70)) +000050 2f02 CMP r7,#2 +000052 d105 BNE |L1.96| +000054 7830 LDRB r0,[r6,#0] +000056 2870 CMP r0,#0x70 +000058 d102 BNE |L1.96| +;;;460 { +;;;461 phone_72_flag=rxbuffer[1]; +00005a 48e1 LDR r0,|L1.992| +00005c 7871 LDRB r1,[r6,#1] +00005e 7381 STRB r1,[r0,#0xe] + |L1.96| +;;;462 } +;;;463 if( (rxbuffer_size ==2) &&(rxbuffer[0] ==0x7D)) +;;;464 { +;;;465 phone_75_flag=rxbuffer[1]; +;;;466 if((phone_74_flag==0x03)&&(phone_75_flag==0x01)) +;;;467 { +;;;468 phone_75_flag=0x06; +000060 2206 MOVS r2,#6 +000062 2f02 CMP r7,#2 ;463 +000064 d12b BNE |L1.190| +000066 7830 LDRB r0,[r6,#0] ;463 +000068 287d CMP r0,#0x7d ;463 +00006a d128 BNE |L1.190| +00006c 4bdc LDR r3,|L1.992| +00006e 7870 LDRB r0,[r6,#1] ;465 +000070 73d8 STRB r0,[r3,#0xf] ;465 +000072 7c59 LDRB r1,[r3,#0x11] ;466 ; phone_74_flag +000074 2903 CMP r1,#3 ;466 +000076 d101 BNE |L1.124| +000078 2801 CMP r0,#1 ;466 +00007a d002 BEQ |L1.130| + |L1.124| +;;;469 } +;;;470 else if((phone_74_flag==0x03)&&(phone_75_flag==0x03)) +00007c 2903 CMP r1,#3 +00007e d002 BEQ |L1.134| +000080 e003 B |L1.138| + |L1.130| +000082 73da STRB r2,[r3,#0xf] ;468 +000084 e01b B |L1.190| + |L1.134| +000086 2803 CMP r0,#3 +000088 d002 BEQ |L1.144| + |L1.138| +;;;471 { +;;;472 phone_75_flag=0x07; +;;;473 } +;;;474 else if((phone_74_flag==0x01)&&(phone_75_flag==0x07)) +00008a 2901 CMP r1,#1 +00008c d003 BEQ |L1.150| +00008e e004 B |L1.154| + |L1.144| +000090 2007 MOVS r0,#7 ;472 +000092 73d8 STRB r0,[r3,#0xf] ;472 +000094 e013 B |L1.190| + |L1.150| +000096 2807 CMP r0,#7 +000098 d002 BEQ |L1.160| + |L1.154| +;;;475 { +;;;476 phone_75_flag=0x09; +;;;477 } +;;;478 else if((phone_74_flag==0x02)&&(phone_75_flag==0x07)) +00009a 2902 CMP r1,#2 +00009c d003 BEQ |L1.166| +00009e e004 B |L1.170| + |L1.160| +0000a0 2009 MOVS r0,#9 ;476 +0000a2 73d8 STRB r0,[r3,#0xf] ;476 +0000a4 e00b B |L1.190| + |L1.166| +0000a6 2807 CMP r0,#7 +0000a8 d002 BEQ |L1.176| + |L1.170| +;;;479 { +;;;480 phone_75_flag=0x08; +;;;481 } +;;;482 else if((phone_74_flag==0x03)&&(phone_75_flag==0x07)) +0000aa 2903 CMP r1,#3 +0000ac d003 BEQ |L1.182| +0000ae e006 B |L1.190| + |L1.176| +0000b0 2008 MOVS r0,#8 ;480 +0000b2 73d8 STRB r0,[r3,#0xf] ;480 +0000b4 e003 B |L1.190| + |L1.182| +0000b6 2807 CMP r0,#7 +0000b8 d101 BNE |L1.190| +;;;483 { +;;;484 phone_75_flag=0x09; +0000ba 2009 MOVS r0,#9 +0000bc 73d8 STRB r0,[r3,#0xf] + |L1.190| +;;;485 } +;;;486 } +;;;487 if( (rxbuffer_size ==2) &&(rxbuffer[0] ==0x74)) +0000be 2f02 CMP r7,#2 +0000c0 d105 BNE |L1.206| +0000c2 7830 LDRB r0,[r6,#0] +0000c4 2874 CMP r0,#0x74 +0000c6 d102 BNE |L1.206| +;;;488 { +;;;489 phone_74_flag=rxbuffer[1]; +0000c8 48c5 LDR r0,|L1.992| +0000ca 7871 LDRB r1,[r6,#1] +0000cc 7441 STRB r1,[r0,#0x11] + |L1.206| +;;;490 } +;;;491 if( (rxbuffer_size ==2) &&(rxbuffer[0] ==0xEA)) +0000ce 2f02 CMP r7,#2 +0000d0 d105 BNE |L1.222| +0000d2 7830 LDRB r0,[r6,#0] +0000d4 28ea CMP r0,#0xea +0000d6 d102 BNE |L1.222| +;;;492 { +;;;493 Flag_EA_EN=rxbuffer[1]; +0000d8 48c1 LDR r0,|L1.992| +0000da 7871 LDRB r1,[r6,#1] +0000dc 7181 STRB r1,[r0,#6] + |L1.222| +;;;494 } +;;;495 if( (rxbuffer_size ==3) &&(rxbuffer[0] ==0x92)) +0000de 2f03 CMP r7,#3 +0000e0 d105 BNE |L1.238| +0000e2 7830 LDRB r0,[r6,#0] +0000e4 2892 CMP r0,#0x92 +0000e6 d102 BNE |L1.238| +;;;496 { +;;;497 phone_92_flag=rxbuffer[1]; +0000e8 48bd LDR r0,|L1.992| +0000ea 7871 LDRB r1,[r6,#1] +0000ec 7401 STRB r1,[r0,#0x10] + |L1.238| +;;;498 } +;;;499 if(rxbuffer_size ==1) +0000ee 2f01 CMP r7,#1 +0000f0 d145 BNE |L1.382| +;;;500 { +;;;501 switch(rxbuffer[0]) +0000f2 7830 LDRB r0,[r6,#0] +0000f4 2702 MOVS r7,#2 ;429 +0000f6 2603 MOVS r6,#3 ;429 +0000f8 2101 MOVS r1,#1 ;443 +0000fa 2885 CMP r0,#0x85 +0000fc d07b BEQ |L1.502| +0000fe dc1c BGT |L1.314| +000100 2855 CMP r0,#0x55 +000102 d079 BEQ |L1.504| +000104 dc0c BGT |L1.288| +000106 2823 CMP r0,#0x23 +000108 d077 BEQ |L1.506| +00010a dc04 BGT |L1.278| +00010c 2821 CMP r0,#0x21 +00010e d013 BEQ |L1.312| +000110 2822 CMP r0,#0x22 +000112 d12f BNE |L1.372| +000114 e0c1 B |L1.666| + |L1.278| +000116 2830 CMP r0,#0x30 +000118 d070 BEQ |L1.508| +00011a 2852 CMP r0,#0x52 +00011c d12a BNE |L1.372| +00011e e0cd B |L1.700| + |L1.288| +000120 2872 CMP r0,#0x72 +000122 d059 BEQ |L1.472| +000124 dc04 BGT |L1.304| +000126 2860 CMP r0,#0x60 +000128 d02a BEQ |L1.384| +00012a 2861 CMP r0,#0x61 +00012c d122 BNE |L1.372| +00012e e048 B |L1.450| + |L1.304| +000130 2875 CMP r0,#0x75 +000132 d06d BEQ |L1.528| +000134 2880 CMP r0,#0x80 +000136 d11d BNE |L1.372| + |L1.312| +000138 e0aa B |L1.656| + |L1.314| +;;;502 { +;;;503 #if 1 +;;;504 case 0x60: +;;;505 hal_gpio_set_output_data(g_phone_output_int_pad, IO_LVL_HIGH); +;;;506 if (sleep_double_EN) +;;;507 { +;;;508 tp_flag =false; +;;;509 sleep_double_EN=0; +;;;510 *txbuffer = sleep_on; +;;;511 *txbuffer_size = sizeof(sleep_on); +;;;512 } +;;;513 else +;;;514 { +;;;515 if (tp_flag) +;;;516 { +;;;517 tp_flag =false; +;;;518 *txbuffer = phone_reg_coord_back; +;;;519 *txbuffer_size = sizeof(phone_reg_coord_back); +;;;520 } +;;;521 else +;;;522 { +;;;523 tp_flag =false; +;;;524 *txbuffer = phone_data_60_1; +;;;525 *txbuffer_size = sizeof(phone_data_60_1); +;;;526 } +;;;527 } +;;;528 break; +;;;529 +;;;530 case 0x61: +;;;531 *txbuffer = &phone_reg_coord_back[16]; +;;;532 *txbuffer_size = sizeof(phone_reg_coord_back)-16; +;;;533 break; +;;;534 +;;;535 case 0xB1: +;;;536 *txbuffer = phone_data_B1; +;;;537 *txbuffer_size = sizeof(phone_data_B1); +;;;538 break; +;;;539 #endif +;;;540 +;;;541 #if 1 +;;;542 case 0x72: +;;;543 if (phone_72_flag ==0x03)//0x70,0x03 +;;;544 { +;;;545 *txbuffer = phone_data_72_0; +;;;546 *txbuffer_size = sizeof(phone_data_72_0); +;;;547 } +;;;548 else if (phone_72_flag ==0x05)//0x70,0x05 +;;;549 { +;;;550 *txbuffer = phone_data_72_5;//ռ䲻phone_data_72_0ԣphone_data_72_1 +;;;551 *txbuffer_size = sizeof(phone_data_72_5);//phone_data_72_1 +;;;552 } +;;;553 else if (phone_72_flag ==0x1D)//0x70,0x1D +;;;554 { +;;;555 // *txbuffer = phone_data_72_2; +;;;556 // *txbuffer_size = sizeof(phone_data_72_2); +;;;557 } +;;;558 else if (phone_72_flag ==0x13)//0x70,0x13 +;;;559 { +;;;560 *txbuffer = phone_data_72_13; +;;;561 *txbuffer_size = sizeof(phone_data_72_13); +;;;562 } +;;;563 break; +;;;564 +;;;565 case 0x75: +;;;566 if (phone_75_flag ==0x01)//0x7D,0x01 +;;;567 { +;;;568 *txbuffer = phone_data_75_01; +;;;569 *txbuffer_size = sizeof(phone_data_75_01); +;;;570 } +;;;571 else if (phone_75_flag ==0x02)//0x7D,0x02 +;;;572 { +;;;573 *txbuffer = phone_data_75_02; +;;;574 *txbuffer_size = sizeof(phone_data_75_02); +;;;575 } +;;;576 else if (phone_75_flag ==0x03)//0x7D,0x03 +;;;577 { +;;;578 *txbuffer = phone_data_75_03; +;;;579 *txbuffer_size = sizeof(phone_data_75_03); +;;;580 } +;;;581 else if (phone_75_flag ==0x05)//0x7D,0x05 +;;;582 { +;;;583 *txbuffer = phone_data_75_05; +;;;584 *txbuffer_size = sizeof(phone_data_75_05); +;;;585 } +;;;586 else if (phone_75_flag ==0x06)//0x7D,0x01&&74 03//ռ䲻phone_data_72_0ԣ +;;;587 { +;;;588 *txbuffer = phone_data_75_06; +;;;589 *txbuffer_size = sizeof(phone_data_75_06); +;;;590 } +;;;591 else if (phone_75_flag ==0x07)//0x7D,0x03&&74 03//ռ䲻phone_data_72_0ԣ +;;;592 { +;;;593 *txbuffer = phone_data_75_07; +;;;594 *txbuffer_size = sizeof(phone_data_75_07); +;;;595 } +;;;596 +;;;597 else if (phone_75_flag ==0x08)//0x7D,0x07&&74 02 +;;;598 { +;;;599 *txbuffer = phone_data_75_00; +;;;600 *txbuffer_size = sizeof(phone_data_75_00); +;;;601 } +;;;602 else if (phone_75_flag ==0x09)//0x7D,0x07&&74 03//74 01 +;;;603 { +;;;604 *txbuffer = phone_data_75_FF; +;;;605 *txbuffer_size = sizeof(phone_data_75_FF); +;;;606 } +;;;607 else +;;;608 { +;;;609 *txbuffer = phone_data_75_FF; +;;;610 *txbuffer_size = sizeof(phone_data_75_FF); +;;;611 } +;;;612 break; +;;;613 #endif +;;;614 case 0x80: +;;;615 // *txbuffer = phone_data_80; +;;;616 // *txbuffer_size = sizeof(phone_data_80); +;;;617 // break; +;;;618 case 0x21: +;;;619 *txbuffer = phone_data_21; +;;;620 *txbuffer_size = sizeof(phone_data_21); +;;;621 break; +;;;622 case 0x22: +;;;623 *txbuffer = phone_data_22; +;;;624 *txbuffer_size = sizeof(phone_data_22); +;;;625 break; +;;;626 case 0x23: +;;;627 *txbuffer = phone_data_23; +;;;628 *txbuffer_size = sizeof(phone_data_23); +;;;629 break; +;;;630 case 0x30: +;;;631 *txbuffer = phone_data_30; +;;;632 *txbuffer_size = sizeof(phone_data_30); +;;;633 break; +;;;634 case 0x52: +;;;635 *txbuffer = phone_data_52; +;;;636 *txbuffer_size = sizeof(phone_data_52); +;;;637 break; +;;;638 case 0x55: +;;;639 *txbuffer = phone_data_55; +;;;640 *txbuffer_size = sizeof(phone_data_55); +;;;641 break; +;;;642 case 0x85: +;;;643 if(phone_85_flag==0) +;;;644 { +;;;645 *txbuffer = phone_data_85_1; +;;;646 *txbuffer_size = sizeof(phone_data_85_1); +;;;647 } +;;;648 else if(phone_85_flag==0x02) +;;;649 { +;;;650 *txbuffer = phone_data_85_2; +;;;651 *txbuffer_size = sizeof(phone_data_85_2); +;;;652 } +;;;653 break; +;;;654 case 0x90: +;;;655 *txbuffer = phone_data_90; +;;;656 *txbuffer_size = sizeof(phone_data_90); +;;;657 break; +;;;658 case 0x92: +;;;659 if(phone_92_flag==0x0A) +;;;660 { +;;;661 *txbuffer = phone_data_92_2; +;;;662 *txbuffer_size = sizeof(phone_data_92_2); +;;;663 } +;;;664 else if(phone_92_flag==0x15) +;;;665 { +;;;666 *txbuffer = phone_data_92_3; +;;;667 *txbuffer_size = sizeof(phone_data_92_3); +;;;668 } +;;;669 else +;;;670 { +;;;671 *txbuffer = phone_data_92_1; +;;;672 *txbuffer_size = sizeof(phone_data_92_1); +;;;673 } +;;;674 break; +;;;675 case 0xA3: +;;;676 *txbuffer = phone_data_A3; +;;;677 *txbuffer_size = sizeof(phone_data_A3); +00013a 2304 MOVS r3,#4 +00013c 28af CMP r0,#0xaf ;501 +00013e d07d BEQ |L1.572| +000140 dc0c BGT |L1.348| +000142 28a3 CMP r0,#0xa3 ;501 +000144 d07b BEQ |L1.574| +000146 dc04 BGT |L1.338| +000148 2890 CMP r0,#0x90 ;501 +00014a d079 BEQ |L1.576| +00014c 2892 CMP r0,#0x92 ;501 +00014e d111 BNE |L1.372| +000150 e0d5 B |L1.766| + |L1.338| +000152 28a4 CMP r0,#0xa4 ;501 +000154 d075 BEQ |L1.578| +000156 28a5 CMP r0,#0xa5 ;501 +000158 d10c BNE |L1.372| +00015a e0ef B |L1.828| + |L1.348| +00015c 28f1 CMP r0,#0xf1 ;501 +00015e d071 BEQ |L1.580| +000160 dc04 BGT |L1.364| +000162 28b1 CMP r0,#0xb1 ;501 +000164 d033 BEQ |L1.462| +000166 28e4 CMP r0,#0xe4 ;501 +000168 d104 BNE |L1.372| +00016a e0f1 B |L1.848| + |L1.364| +00016c 28f5 CMP r0,#0xf5 ;501 +00016e d06a BEQ |L1.582| +000170 28f6 CMP r0,#0xf6 ;501 +000172 d069 BEQ |L1.584| + |L1.372| +;;;678 break; +;;;679 case 0xA4: +;;;680 *txbuffer = phone_data_A4; +;;;681 *txbuffer_size = sizeof(phone_data_A4); +;;;682 break; +;;;683 case 0xA5: +;;;684 *txbuffer = phone_data_A5; +;;;685 *txbuffer_size = sizeof(phone_data_A5); +;;;686 break; +;;;687 case 0xAF: +;;;688 *txbuffer = phone_data_AF; +;;;689 *txbuffer_size = sizeof(phone_data_AF); +;;;690 break; +;;;691 case 0xE4: +;;;692 *txbuffer = phone_data_E4; +;;;693 *txbuffer_size = sizeof(phone_data_E4); +;;;694 break; +;;;695 case 0xF1: +;;;696 *txbuffer = phone_data_F1; +;;;697 *txbuffer_size = sizeof(phone_data_F1); +;;;698 break; +;;;699 case 0xF5: +;;;700 if (phone_F6_flag ==0) +;;;701 { +;;;702 *txbuffer = phone_data_F5_1; +;;;703 *txbuffer_size = sizeof(phone_data_F5_1); +;;;704 } +;;;705 else if (phone_F6_flag ==1) +;;;706 { +;;;707 *txbuffer = phone_data_F5_2; +;;;708 *txbuffer_size = sizeof(phone_data_F5_2); +;;;709 } +;;;710 else if (phone_F6_flag ==2) +;;;711 { +;;;712 *txbuffer = phone_data_F5_3; +;;;713 *txbuffer_size = sizeof(phone_data_F5_3); +;;;714 } +;;;715 else //if (phone_F6_flag ==0) +;;;716 { +;;;717 *txbuffer = phone_data_F5_4; +;;;718 *txbuffer_size = sizeof(phone_data_F5_4); +;;;719 } +;;;720 break; +;;;721 case 0xF6: +;;;722 if (phone_F6_flag ==0) +;;;723 { +;;;724 *txbuffer = phone_data_F6_1; +;;;725 *txbuffer_size = sizeof(phone_data_F6_1); +;;;726 } +;;;727 else if (phone_F6_flag ==1) +;;;728 { +;;;729 *txbuffer = phone_data_F6_2; +;;;730 *txbuffer_size = sizeof(phone_data_F6_2); +;;;731 } +;;;732 else if (phone_F6_flag ==2) +;;;733 { +;;;734 *txbuffer = phone_data_F6_3; +;;;735 *txbuffer_size = sizeof(phone_data_F6_3); +;;;736 } +;;;737 else //if (phone_F6_flag ==0) +;;;738 { +;;;739 *txbuffer = phone_data_F6_4; +;;;740 *txbuffer_size = sizeof(phone_data_F6_4); +;;;741 } +;;;742 phone_F6_flag++; +;;;743 if (phone_F6_flag >3) +;;;744 phone_F6_flag =0; +;;;745 break; +;;;746 default: +;;;747 *txbuffer = phone_reg_coord_back; +000174 489a LDR r0,|L1.992| +000176 301c ADDS r0,r0,#0x1c +000178 6020 STR r0,[r4,#0] +;;;748 *txbuffer_size = sizeof(phone_reg_coord_back); +00017a 20c8 MOVS r0,#0xc8 +00017c 6028 STR r0,[r5,#0] + |L1.382| +;;;749 break; +;;;750 } +;;;751 } +;;;752 #endif +;;;753 +;;;754 } +00017e bdf8 POP {r3-r7,pc} + |L1.384| +000180 4e97 LDR r6,|L1.992| +000182 2101 MOVS r1,#1 ;505 +000184 78b0 LDRB r0,[r6,#2] ;505 ; g_phone_output_int_pad +000186 f7fffffe BL hal_gpio_set_output_data +00018a 7970 LDRB r0,[r6,#5] ;506 ; sleep_double_EN +00018c 2110 MOVS r1,#0x10 ;511 +00018e 2800 CMP r0,#0 ;506 +000190 d006 BEQ |L1.416| +000192 2000 MOVS r0,#0 ;508 +000194 7070 STRB r0,[r6,#1] ;508 +000196 7170 STRB r0,[r6,#5] ;509 +000198 4892 LDR r0,|L1.996| +00019a 6020 STR r0,[r4,#0] ;510 +00019c 6029 STR r1,[r5,#0] ;511 +00019e bdf8 POP {r3-r7,pc} + |L1.416| +0001a0 7870 LDRB r0,[r6,#1] ;515 ; tp_flag +0001a2 2800 CMP r0,#0 ;515 +0001a4 d007 BEQ |L1.438| +0001a6 2000 MOVS r0,#0 ;517 +0001a8 7070 STRB r0,[r6,#1] ;517 +0001aa 488d LDR r0,|L1.992| +0001ac 301c ADDS r0,r0,#0x1c ;518 +0001ae 6020 STR r0,[r4,#0] ;518 +0001b0 20c8 MOVS r0,#0xc8 ;519 +0001b2 6028 STR r0,[r5,#0] ;519 +0001b4 bdf8 POP {r3-r7,pc} + |L1.438| +0001b6 2000 MOVS r0,#0 ;523 +0001b8 7070 STRB r0,[r6,#1] ;523 +0001ba 488b LDR r0,|L1.1000| +0001bc 6020 STR r0,[r4,#0] ;524 +0001be 6029 STR r1,[r5,#0] ;525 +0001c0 bdf8 POP {r3-r7,pc} + |L1.450| +0001c2 4887 LDR r0,|L1.992| +0001c4 302c ADDS r0,r0,#0x2c ;531 +0001c6 6020 STR r0,[r4,#0] ;531 +0001c8 20b8 MOVS r0,#0xb8 ;532 +0001ca 6028 STR r0,[r5,#0] ;532 +0001cc bdf8 POP {r3-r7,pc} + |L1.462| +0001ce 4884 LDR r0,|L1.992| +0001d0 3012 ADDS r0,r0,#0x12 ;536 +0001d2 6020 STR r0,[r4,#0] ;536 +0001d4 602f STR r7,[r5,#0] ;537 + |L1.470| +0001d6 bdf8 POP {r3-r7,pc} + |L1.472| +0001d8 4881 LDR r0,|L1.992| +0001da 4984 LDR r1,|L1.1004| +0001dc 7b80 LDRB r0,[r0,#0xe] ;543 ; phone_72_flag +0001de 2803 CMP r0,#3 ;543 +0001e0 d00d BEQ |L1.510| +0001e2 2805 CMP r0,#5 ;548 +0001e4 d010 BEQ |L1.520| +0001e6 281d CMP r0,#0x1d ;553 +0001e8 d0f5 BEQ |L1.470| +0001ea 2813 CMP r0,#0x13 ;558 +0001ec d1f3 BNE |L1.470| +0001ee 4880 LDR r0,|L1.1008| +0001f0 6020 STR r0,[r4,#0] ;560 +0001f2 6029 STR r1,[r5,#0] ;561 + |L1.500| +0001f4 bdf8 POP {r3-r7,pc} + |L1.502| +0001f6 e06b B |L1.720| + |L1.504| +0001f8 e065 B |L1.710| + |L1.506| +0001fa e054 B |L1.678| + |L1.508| +0001fc e059 B |L1.690| + |L1.510| +0001fe 487a LDR r0,|L1.1000| +000200 3041 ADDS r0,r0,#0x41 ;545 +000202 6020 STR r0,[r4,#0] ;545 +000204 6029 STR r1,[r5,#0] ;546 +000206 e7f5 B |L1.500| + |L1.520| +000208 487a LDR r0,|L1.1012| +00020a 6020 STR r0,[r4,#0] ;550 +00020c 6029 STR r1,[r5,#0] ;551 +00020e e7f1 B |L1.500| + |L1.528| +000210 4873 LDR r0,|L1.992| +000212 4979 LDR r1,|L1.1016| +000214 7bc0 LDRB r0,[r0,#0xf] ;566 ; phone_75_flag +000216 2801 CMP r0,#1 ;566 +000218 d01b BEQ |L1.594| +00021a 2802 CMP r0,#2 ;571 +00021c d01d BEQ |L1.602| +00021e 2803 CMP r0,#3 ;576 +000220 d01f BEQ |L1.610| +000222 2805 CMP r0,#5 ;581 +000224 d021 BEQ |L1.618| +000226 2806 CMP r0,#6 ;586 +000228 d023 BEQ |L1.626| +00022a 2807 CMP r0,#7 ;591 +00022c d025 BEQ |L1.634| +00022e 21ff MOVS r1,#0xff ;600 +000230 3121 ADDS r1,r1,#0x21 ;600 +000232 2808 CMP r0,#8 ;597 +000234 d025 BEQ |L1.642| +000236 4a71 LDR r2,|L1.1020| +000238 2809 CMP r0,#9 ;602 +00023a e006 B |L1.586| + |L1.572| +00023c e083 B |L1.838| + |L1.574| +00023e e073 B |L1.808| + |L1.576| +000240 e057 B |L1.754| + |L1.578| +000242 e076 B |L1.818| + |L1.580| +000244 e088 B |L1.856| + |L1.582| +000246 e08c B |L1.866| + |L1.584| +000248 e0a7 B |L1.922| + |L1.586| +00024a d01e BEQ |L1.650| +00024c 6022 STR r2,[r4,#0] ;609 +00024e 6029 STR r1,[r5,#0] ;610 +000250 e7d0 B |L1.500| + |L1.594| +000252 486b LDR r0,|L1.1024| +000254 6020 STR r0,[r4,#0] ;568 +000256 6029 STR r1,[r5,#0] ;569 +000258 e7cc B |L1.500| + |L1.602| +00025a 486a LDR r0,|L1.1028| +00025c 6020 STR r0,[r4,#0] ;573 +00025e 6029 STR r1,[r5,#0] ;574 +000260 e7c8 B |L1.500| + |L1.610| +000262 4869 LDR r0,|L1.1032| +000264 6020 STR r0,[r4,#0] ;578 +000266 6029 STR r1,[r5,#0] ;579 +000268 e7c4 B |L1.500| + |L1.618| +00026a 4868 LDR r0,|L1.1036| +00026c 6020 STR r0,[r4,#0] ;583 +00026e 6029 STR r1,[r5,#0] ;584 +000270 e7c0 B |L1.500| + |L1.626| +000272 4867 LDR r0,|L1.1040| +000274 6020 STR r0,[r4,#0] ;588 +000276 6029 STR r1,[r5,#0] ;589 +000278 e7bc B |L1.500| + |L1.634| +00027a 4866 LDR r0,|L1.1044| +00027c 6020 STR r0,[r4,#0] ;593 +00027e 6029 STR r1,[r5,#0] ;594 +000280 e7b8 B |L1.500| + |L1.642| +000282 4865 LDR r0,|L1.1048| +000284 6020 STR r0,[r4,#0] ;599 +000286 6029 STR r1,[r5,#0] ;600 +000288 e7b4 B |L1.500| + |L1.650| +00028a 6022 STR r2,[r4,#0] ;604 +00028c 6029 STR r1,[r5,#0] ;605 +00028e e7b1 B |L1.500| + |L1.656| +000290 4855 LDR r0,|L1.1000| +000292 3847 SUBS r0,r0,#0x47 ;619 +000294 6020 STR r0,[r4,#0] ;619 +000296 6029 STR r1,[r5,#0] ;620 +000298 e7ac B |L1.500| + |L1.666| +00029a 4853 LDR r0,|L1.1000| +00029c 3823 SUBS r0,r0,#0x23 ;623 +00029e 6020 STR r0,[r4,#0] ;623 +0002a0 2005 MOVS r0,#5 ;624 +0002a2 6028 STR r0,[r5,#0] ;624 +0002a4 e7a6 B |L1.500| + |L1.678| +0002a6 4850 LDR r0,|L1.1000| +0002a8 3010 ADDS r0,r0,#0x10 ;627 +0002aa 6020 STR r0,[r4,#0] ;627 +0002ac 200b MOVS r0,#0xb ;628 +0002ae 6028 STR r0,[r5,#0] ;628 +0002b0 e7a0 B |L1.500| + |L1.690| +0002b2 484d LDR r0,|L1.1000| +0002b4 383f SUBS r0,r0,#0x3f ;631 +0002b6 6020 STR r0,[r4,#0] ;631 +0002b8 602f STR r7,[r5,#0] ;632 +0002ba e79b B |L1.500| + |L1.700| +0002bc 484a LDR r0,|L1.1000| +0002be 383d SUBS r0,r0,#0x3d ;635 +0002c0 6020 STR r0,[r4,#0] ;635 +0002c2 602e STR r6,[r5,#0] ;636 +0002c4 e796 B |L1.500| + |L1.710| +0002c6 4848 LDR r0,|L1.1000| +0002c8 3846 SUBS r0,r0,#0x46 ;639 +0002ca 6020 STR r0,[r4,#0] ;639 +0002cc 6029 STR r1,[r5,#0] ;640 + |L1.718| +0002ce e791 B |L1.500| + |L1.720| +0002d0 4843 LDR r0,|L1.992| +0002d2 7ac0 LDRB r0,[r0,#0xb] ;643 ; phone_85_flag +0002d4 2800 CMP r0,#0 ;643 +0002d6 d007 BEQ |L1.744| +0002d8 2802 CMP r0,#2 ;648 +0002da d18b BNE |L1.500| +0002dc 4842 LDR r0,|L1.1000| +0002de 301b ADDS r0,r0,#0x1b ;650 +0002e0 6020 STR r0,[r4,#0] ;650 +0002e2 201c MOVS r0,#0x1c ;651 +0002e4 6028 STR r0,[r5,#0] ;651 +0002e6 e785 B |L1.500| + |L1.744| +0002e8 483f LDR r0,|L1.1000| +0002ea 3845 SUBS r0,r0,#0x45 ;645 +0002ec 6020 STR r0,[r4,#0] ;645 +0002ee 6029 STR r1,[r5,#0] ;646 +0002f0 e780 B |L1.500| + |L1.754| +0002f2 483d LDR r0,|L1.1000| +0002f4 3037 ADDS r0,r0,#0x37 ;655 +0002f6 6020 STR r0,[r4,#0] ;655 +0002f8 200a MOVS r0,#0xa ;656 +0002fa 6028 STR r0,[r5,#0] ;656 +0002fc e77a B |L1.500| + |L1.766| +0002fe 4838 LDR r0,|L1.992| +000300 7c00 LDRB r0,[r0,#0x10] ;659 ; phone_92_flag +000302 280a CMP r0,#0xa ;659 +000304 d006 BEQ |L1.788| +000306 2815 CMP r0,#0x15 ;664 +000308 d009 BEQ |L1.798| +00030a 4837 LDR r0,|L1.1000| +00030c 3844 SUBS r0,r0,#0x44 ;671 +00030e 6020 STR r0,[r4,#0] ;671 +000310 6029 STR r1,[r5,#0] ;672 +000312 e76f B |L1.500| + |L1.788| +000314 4834 LDR r0,|L1.1000| +000316 381e SUBS r0,r0,#0x1e ;661 +000318 6020 STR r0,[r4,#0] ;661 +00031a 602a STR r2,[r5,#0] ;662 +00031c e76a B |L1.500| + |L1.798| +00031e 4832 LDR r0,|L1.1000| +000320 383a SUBS r0,r0,#0x3a ;666 +000322 6020 STR r0,[r4,#0] ;666 +000324 602e STR r6,[r5,#0] ;667 +000326 e765 B |L1.500| + |L1.808| +000328 482f LDR r0,|L1.1000| +00032a 3837 SUBS r0,r0,#0x37 ;676 +00032c 6020 STR r0,[r4,#0] ;676 +00032e 602b STR r3,[r5,#0] ;677 +000330 e760 B |L1.500| + |L1.818| +000332 482d LDR r0,|L1.1000| +000334 3833 SUBS r0,r0,#0x33 ;680 +000336 6020 STR r0,[r4,#0] ;680 +000338 602b STR r3,[r5,#0] ;681 +00033a e75b B |L1.500| + |L1.828| +00033c 482a LDR r0,|L1.1000| +00033e 382f SUBS r0,r0,#0x2f ;684 +000340 6020 STR r0,[r4,#0] ;684 +000342 602b STR r3,[r5,#0] ;685 +000344 e756 B |L1.500| + |L1.838| +000346 4828 LDR r0,|L1.1000| +000348 382b SUBS r0,r0,#0x2b ;688 +00034a 6020 STR r0,[r4,#0] ;688 +00034c 602b STR r3,[r5,#0] ;689 +00034e e751 B |L1.500| + |L1.848| +000350 4823 LDR r0,|L1.992| +000352 6020 STR r0,[r4,#0] ;692 +000354 6029 STR r1,[r5,#0] ;693 +000356 e74d B |L1.500| + |L1.856| +000358 4823 LDR r0,|L1.1000| +00035a 3827 SUBS r0,r0,#0x27 ;696 +00035c 6020 STR r0,[r4,#0] ;696 +00035e 602b STR r3,[r5,#0] ;697 +000360 e748 B |L1.500| + |L1.866| +000362 481f LDR r0,|L1.992| +000364 7b00 LDRB r0,[r0,#0xc] ;700 ; phone_F6_flag +000366 2800 CMP r0,#0 ;700 +000368 d008 BEQ |L1.892| +00036a 2801 CMP r0,#1 ;705 +00036c d00b BEQ |L1.902| +00036e 2802 CMP r0,#2 ;710 +000370 d00e BEQ |L1.912| +000372 481d LDR r0,|L1.1000| +000374 3840 SUBS r0,r0,#0x40 ;717 +000376 6020 STR r0,[r4,#0] ;717 +000378 6029 STR r1,[r5,#0] ;718 +00037a e73b B |L1.500| + |L1.892| +00037c 481a LDR r0,|L1.1000| +00037e 3843 SUBS r0,r0,#0x43 ;702 +000380 6020 STR r0,[r4,#0] ;702 +000382 6029 STR r1,[r5,#0] ;703 +000384 e736 B |L1.500| + |L1.902| +000386 4818 LDR r0,|L1.1000| +000388 3842 SUBS r0,r0,#0x42 ;707 +00038a 6020 STR r0,[r4,#0] ;707 +00038c 6029 STR r1,[r5,#0] ;708 +00038e e731 B |L1.500| + |L1.912| +000390 4815 LDR r0,|L1.1000| +000392 3841 SUBS r0,r0,#0x41 ;712 +000394 6020 STR r0,[r4,#0] ;712 +000396 6029 STR r1,[r5,#0] ;713 +000398 e72c B |L1.500| + |L1.922| +00039a 4911 LDR r1,|L1.992| +00039c 7b08 LDRB r0,[r1,#0xc] ;722 ; phone_F6_flag +00039e 2800 CMP r0,#0 ;722 +0003a0 d00f BEQ |L1.962| +0003a2 2801 CMP r0,#1 ;727 +0003a4 d012 BEQ |L1.972| +0003a6 2802 CMP r0,#2 ;732 +0003a8 d015 BEQ |L1.982| +0003aa 4b0f LDR r3,|L1.1000| +0003ac 1f9b SUBS r3,r3,#6 ;739 +0003ae 6023 STR r3,[r4,#0] ;739 +0003b0 602a STR r2,[r5,#0] ;740 + |L1.946| +0003b2 1c40 ADDS r0,r0,#1 ;742 +0003b4 b2c0 UXTB r0,r0 ;742 +0003b6 7308 STRB r0,[r1,#0xc] ;742 +0003b8 2803 CMP r0,#3 ;743 +0003ba d988 BLS |L1.718| +0003bc 2000 MOVS r0,#0 ;744 +0003be 7308 STRB r0,[r1,#0xc] ;744 +0003c0 e718 B |L1.500| + |L1.962| +0003c2 4b09 LDR r3,|L1.1000| +0003c4 3b18 SUBS r3,r3,#0x18 ;724 +0003c6 6023 STR r3,[r4,#0] ;724 +0003c8 602a STR r2,[r5,#0] ;725 +0003ca e7f2 B |L1.946| + |L1.972| +0003cc 4b06 LDR r3,|L1.1000| +0003ce 3b12 SUBS r3,r3,#0x12 ;729 +0003d0 6023 STR r3,[r4,#0] ;729 +0003d2 602a STR r2,[r5,#0] ;730 +0003d4 e7ed B |L1.946| + |L1.982| +0003d6 4b04 LDR r3,|L1.1000| +0003d8 3b0c SUBS r3,r3,#0xc ;734 +0003da 6023 STR r3,[r4,#0] ;734 +0003dc 602a STR r2,[r5,#0] ;735 +0003de e7e8 B |L1.946| +;;;755 + ENDP + + |L1.992| + DCD ||.data|| + |L1.996| + DCD ||.constdata||+0x2140 + |L1.1000| + DCD ||.constdata||+0x47 + |L1.1004| + DCD 0x0000050c + |L1.1008| + DCD ||.constdata||+0xaa0 + |L1.1012| + DCD ||.constdata||+0x594 + |L1.1016| + DCD 0x0000028e + |L1.1020| + DCD ||.constdata||+0x2020 + |L1.1024| + DCD ||.constdata||+0xfac + |L1.1028| + DCD ||.constdata||+0x123a + |L1.1032| + DCD ||.constdata||+0x14c8 + |L1.1036| + DCD ||.constdata||+0x1c72 + |L1.1040| + DCD ||.constdata||+0x1756 + |L1.1044| + DCD ||.constdata||+0x19e4 + |L1.1048| + DCD ||.constdata||+0x1f00 + + AREA ||i.app_tp_screen_analysis_const||, CODE, READONLY, ALIGN=2 + + app_tp_screen_analysis_const PROC +;;;188 **************************************************************************/ +;;;189 uint8_t app_tp_screen_analysis_const(uint8_t transfer_now, uint8_t *rxbuffer, size_t data_size) +000000 b510 PUSH {r4,lr} +;;;190 { +;;;191 static uint8_t app_tp_count = 0; +;;;192 +;;;193 app_tp_count++; +000002 4b0c LDR r3,|L2.52| +000004 7a9a LDRB r2,[r3,#0xa] ; app_tp_count +000006 1c52 ADDS r2,r2,#1 +000008 b2d2 UXTB r2,r2 +00000a 729a STRB r2,[r3,#0xa] +;;;194 if (app_tp_count > 20) //ʼɹreset screen +00000c 2a14 CMP r2,#0x14 +00000e d905 BLS |L2.28| +;;;195 { +;;;196 app_tp_count = 0; +000010 2000 MOVS r0,#0 +000012 7298 STRB r0,[r3,#0xa] +;;;197 app_tp_screen_init(); +000014 f7fffffe BL app_tp_screen_init +;;;198 return 0; +000018 2000 MOVS r0,#0 +;;;199 } +;;;200 +;;;201 if (transfer_now == 0) +;;;202 { +;;;203 if (rxbuffer[2] == 0x03) +;;;204 { +;;;205 // TAU_LOGD("TD TP init done\n"); +;;;206 return 1; +;;;207 } +;;;208 else +;;;209 { +;;;210 // TAU_LOGD("TD TP return false [%d]\n", rxbuffer[2]); +;;;211 return 0; +;;;212 } +;;;213 } +;;;214 +;;;215 return transfer_now + 1; +;;;216 } +00001a bd10 POP {r4,pc} + |L2.28| +00001c 2800 CMP r0,#0 ;201 +00001e d002 BEQ |L2.38| +000020 1c40 ADDS r0,r0,#1 ;215 +000022 b2c0 UXTB r0,r0 ;215 +000024 bd10 POP {r4,pc} + |L2.38| +000026 7888 LDRB r0,[r1,#2] ;203 +000028 2803 CMP r0,#3 ;203 +00002a d001 BEQ |L2.48| +00002c 2000 MOVS r0,#0 ;211 +00002e bd10 POP {r4,pc} + |L2.48| +000030 2001 MOVS r0,#1 ;206 +000032 bd10 POP {r4,pc} +;;;217 + ENDP + + |L2.52| + DCD ||.data|| + + AREA ||i.app_tp_screen_analysis_int||, CODE, READONLY, ALIGN=2 + + app_tp_screen_analysis_int PROC +;;;226 **************************************************************************/ +;;;227 uint8_t app_tp_screen_analysis_int(uint8_t transfer_now, uint8_t *rxbuffer, size_t data_size) +000000 b5f0 PUSH {r4-r7,lr} +;;;228 { +000002 b087 SUB sp,sp,#0x1c +000004 460e MOV r6,r1 +;;;229 #ifdef USE_FOR_SUMSUNG_S20U +;;;230 uint8_t ii,i,j,k,temp_len; +;;;231 uint8_t temp_flag,temp,touchnum; +;;;232 uint8_t temp_8,touch_id; +;;;233 uint16_t temp16; +;;;234 uint32_t xx, yy, zz; +;;;235 uint8_t send_point =0; // ǰҪ͵ı̧ʱҲҪ +000006 2700 MOVS r7,#0 +;;;236 +;;;237 send_point =0; +;;;238 phone_reg_coord_back[7]=0; +000008 49b1 LDR r1,|L3.720| +00000a 2000 MOVS r0,#0 +00000c 71c8 STRB r0,[r1,#7] +;;;239 +;;;240 #if 1 +;;;241 temp_8= 0; +;;;242 temp_len=0; +00000e 2400 MOVS r4,#0 +;;;243 touchnum=0; +;;;244 touchnum=rxbuffer[7]; +000010 79f0 LDRB r0,[r6,#7] +;;;245 +;;;246 if(touchnum>0x10) +000012 2810 CMP r0,#0x10 +000014 d900 BLS |L3.24| +;;;247 touchnum=0; +000016 2000 MOVS r0,#0 + |L3.24| +;;;248 #if EncryptCheck_EN +;;;249 touchnum = EncryptCheck(touchnum+1); +000018 1c40 ADDS r0,r0,#1 +00001a b2c0 UXTB r0,r0 +00001c f7fffffe BL EncryptCheck +;;;250 touchnum--; +000020 1e40 SUBS r0,r0,#1 +000022 b2c1 UXTB r1,r0 +;;;251 #endif +;;;252 +;;;253 +;;;254 for(ii =0; ii<(touchnum+1); ii++) +000024 2000 MOVS r0,#0 +000026 1c49 ADDS r1,r1,#1 ;249 +000028 9106 STR r1,[sp,#0x18] +00002a e011 B |L3.80| + |L3.44| +;;;255 { +;;;256 temp_8= rxbuffer[ii*8+0]&0xf0; +00002c 00c1 LSLS r1,r0,#3 +00002e 5c71 LDRB r1,[r6,r1] +000030 0909 LSRS r1,r1,#4 +000032 0109 LSLS r1,r1,#4 +;;;257 if((temp_8==0x20)||(temp_8==0x10)) +000034 2920 CMP r1,#0x20 +000036 d001 BEQ |L3.60| +000038 2910 CMP r1,#0x10 +00003a d103 BNE |L3.68| + |L3.60| +;;;258 { +;;;259 temp_len++; +00003c 1c64 ADDS r4,r4,#1 +00003e b2e4 UXTB r4,r4 +;;;260 send_point++; +000040 1c7f ADDS r7,r7,#1 +000042 b2ff UXTB r7,r7 + |L3.68| +;;;261 } +;;;262 if(temp_8==0x30) +000044 2930 CMP r1,#0x30 +000046 d101 BNE |L3.76| +;;;263 { +;;;264 temp_len++; +000048 1c64 ADDS r4,r4,#1 +00004a b2e4 UXTB r4,r4 + |L3.76| +00004c 1c40 ADDS r0,r0,#1 ;254 +00004e b2c0 UXTB r0,r0 ;254 + |L3.80| +000050 9906 LDR r1,[sp,#0x18] ;254 +000052 4288 CMP r0,r1 ;254 +000054 d3ea BCC |L3.44| +;;;265 } +;;;266 } +;;;267 +;;;268 if(temp_len>0) +000056 2c00 CMP r4,#0 +000058 d001 BEQ |L3.94| +;;;269 { +;;;270 temp_len--; +00005a 1e64 SUBS r4,r4,#1 +00005c b2e4 UXTB r4,r4 + |L3.94| +;;;271 } +;;;272 +;;;273 k=0; +00005e 2500 MOVS r5,#0 +;;;274 for(ii =0; ii<(touchnum+1); ii++) +000060 2000 MOVS r0,#0 +000062 9004 STR r0,[sp,#0x10] +000064 e0bc B |L3.480| + |L3.102| +;;;275 { +;;;276 temp= (rxbuffer[ii*8+0]&0xf0); +000066 9804 LDR r0,[sp,#0x10] +000068 00c0 LSLS r0,r0,#3 +00006a 5c31 LDRB r1,[r6,r0] +00006c 0909 LSRS r1,r1,#4 +00006e 0109 LSLS r1,r1,#4 +000070 9103 STR r1,[sp,#0xc] +;;;277 if((temp==0x20)||(temp==0x10)) +000072 9903 LDR r1,[sp,#0xc] +000074 2920 CMP r1,#0x20 +000076 d006 BEQ |L3.134| +000078 9903 LDR r1,[sp,#0xc] +00007a 2910 CMP r1,#0x10 +00007c d003 BEQ |L3.134| +;;;278 { +;;;279 xx = ((rxbuffer[8*ii+3]&0x0f) << 8) | (rxbuffer[8*ii+2]); +;;;280 yy = (rxbuffer[8*ii+4] << 4) | ((rxbuffer[8*ii+3]>>4)&0x0f); +;;;281 zz = rxbuffer[8*ii+5]; +;;;282 touch_id=rxbuffer[8*ii+1]>>4; +;;;283 xx = xx * 4096 / OUTPUT_WIDTH_VALUE; +;;;284 if(xx >4095) +;;;285 xx =4095; +;;;286 yy = yy * 4096 / OUTPUT_HEIGHT_VALUE; +;;;287 if(yy >4095) +;;;288 yy =4095; +;;;289 //phone_reg_coord_back[16*k+0] = 0x80+((touch_id+1)*4);//(temp*4)+((touch_id+1)*4); //44 press C4 leave 84 move +;;;290 if(temp == 0x10) //ϷTP +;;;291 { +;;;292 phone_reg_coord_back[16 * k + 0] = 0x40 + ((touch_id + 1) * 4); //(temp*4)+((touch_id+1)*4); //44 press C4 leave 84 move +;;;293 } +;;;294 else +;;;295 { +;;;296 phone_reg_coord_back[16 * k + 0] = 0x80 + ((touch_id + 1) * 4); //(temp*4)+((touch_id+1)*4); //44 press C4 leave 84 move +;;;297 } +;;;298 phone_reg_coord_back[16*k+1] = (uint8_t)((xx>>4) & 0xFF); //x ߰λ +;;;299 phone_reg_coord_back[16*k+2] = (uint8_t)((yy>>4) & 0xFF); //y ߰λ +;;;300 phone_reg_coord_back[16*k+3] = ((xx & 0x0F) << 4) | (yy & 0x0F); //bit0-bit3:yλ;bit4-bit7:xλ; +;;;301 phone_reg_coord_back[16*k+4] = 0x8; //major +;;;302 phone_reg_coord_back[16*k+5] = 0x8; //minor +;;;303 //touch type0:ָͨ1:2:ף3:;4:;5:;6:ʪ;7:ӽ;8:ҡ +;;;304 phone_reg_coord_back[16*k+6] = 0x20; //bit0-bit5:zֻ6λ;bit6-bit7:touch typeĸλ +;;;305 phone_reg_coord_back[16*k+7] = temp_len--;//rxbuffer[8*ii+7]; //bit0-bit5:bufferʣٸ¼;bit6-bit7touch type λ +;;;306 phone_reg_coord_back[16*k+8] = 0x04; +;;;307 phone_reg_coord_back[16*k+9] = 0x83; +;;;308 phone_reg_coord_back[16*k+10] = 0x02; +;;;309 phone_reg_coord_back[16*k+11] = 0x00; +;;;310 phone_reg_coord_back[16*k+12] = 0x00; +;;;311 phone_reg_coord_back[16*k+13] = 0x00; +;;;312 phone_reg_coord_back[16*k+14] = 0x00; +;;;313 phone_reg_coord_back[16*k+15] = 0x00; +;;;314 k++; +;;;315 } +;;;316 else if(temp==0x30) +00007e 9903 LDR r1,[sp,#0xc] +000080 2930 CMP r1,#0x30 +000082 d05a BEQ |L3.314| +000084 e0a8 B |L3.472| + |L3.134| +000086 1980 ADDS r0,r0,r6 ;279 +000088 78c2 LDRB r2,[r0,#3] ;279 +00008a 7883 LDRB r3,[r0,#2] ;279 +00008c 0711 LSLS r1,r2,#28 ;279 +00008e 0d09 LSRS r1,r1,#20 ;279 +000090 4319 ORRS r1,r1,r3 ;279 +000092 7903 LDRB r3,[r0,#4] ;280 +000094 011b LSLS r3,r3,#4 ;280 +000096 0912 LSRS r2,r2,#4 ;280 +000098 4313 ORRS r3,r3,r2 ;280 +00009a 9300 STR r3,[sp,#0] ;280 +00009c 7840 LDRB r0,[r0,#1] ;282 +00009e 0900 LSRS r0,r0,#4 ;282 +0000a0 9002 STR r0,[sp,#8] ;282 +0000a2 0308 LSLS r0,r1,#12 ;283 +0000a4 2187 MOVS r1,#0x87 ;283 +0000a6 00c9 LSLS r1,r1,#3 ;283 +0000a8 f7fffffe BL __aeabi_uidivmod +0000ac 9001 STR r0,[sp,#4] ;283 +0000ae 4989 LDR r1,|L3.724| +0000b0 9801 LDR r0,[sp,#4] ;284 +0000b2 4288 CMP r0,r1 ;284 +0000b4 d901 BLS |L3.186| +0000b6 4608 MOV r0,r1 ;285 +0000b8 9001 STR r0,[sp,#4] ;285 + |L3.186| +0000ba 9800 LDR r0,[sp,#0] ;286 +0000bc 4986 LDR r1,|L3.728| +0000be 0300 LSLS r0,r0,#12 ;286 +0000c0 f7fffffe BL __aeabi_uidivmod +0000c4 4983 LDR r1,|L3.724| +0000c6 4288 CMP r0,r1 ;287 +0000c8 d900 BLS |L3.204| +0000ca 4608 MOV r0,r1 ;288 + |L3.204| +0000cc 9903 LDR r1,[sp,#0xc] ;290 +0000ce 2910 CMP r1,#0x10 ;290 +0000d0 d02b BEQ |L3.298| +0000d2 9902 LDR r1,[sp,#8] ;296 +0000d4 4a7e LDR r2,|L3.720| +0000d6 1c49 ADDS r1,r1,#1 ;296 +0000d8 0089 LSLS r1,r1,#2 ;296 +0000da 3180 ADDS r1,r1,#0x80 ;296 +0000dc 012b LSLS r3,r5,#4 ;296 +0000de 54d1 STRB r1,[r2,r3] ;296 + |L3.224| +0000e0 9901 LDR r1,[sp,#4] ;298 +0000e2 012b LSLS r3,r5,#4 ;298 +0000e4 090a LSRS r2,r1,#4 ;298 +0000e6 497a LDR r1,|L3.720| +0000e8 1859 ADDS r1,r3,r1 ;298 +0000ea 704a STRB r2,[r1,#1] ;298 +0000ec 0902 LSRS r2,r0,#4 ;299 +0000ee 708a STRB r2,[r1,#2] ;299 +0000f0 9a01 LDR r2,[sp,#4] ;300 +0000f2 0700 LSLS r0,r0,#28 ;300 +0000f4 0112 LSLS r2,r2,#4 ;300 +0000f6 0f00 LSRS r0,r0,#28 ;300 +0000f8 4302 ORRS r2,r2,r0 ;300 +0000fa 70ca STRB r2,[r1,#3] ;300 +0000fc 2008 MOVS r0,#8 ;301 +0000fe 7108 STRB r0,[r1,#4] ;301 +000100 7148 STRB r0,[r1,#5] ;302 +000102 2020 MOVS r0,#0x20 ;304 +000104 7188 STRB r0,[r1,#6] ;304 +000106 71cc STRB r4,[r1,#7] ;305 +000108 1e64 SUBS r4,r4,#1 ;305 +00010a b2e4 UXTB r4,r4 ;305 +00010c 2004 MOVS r0,#4 ;306 +00010e 7208 STRB r0,[r1,#8] ;306 +000110 2083 MOVS r0,#0x83 ;307 +000112 7248 STRB r0,[r1,#9] ;307 +000114 2002 MOVS r0,#2 ;308 +000116 7288 STRB r0,[r1,#0xa] ;308 +000118 2000 MOVS r0,#0 ;309 +00011a 72c8 STRB r0,[r1,#0xb] ;309 +00011c 7308 STRB r0,[r1,#0xc] ;310 +00011e 7348 STRB r0,[r1,#0xd] ;311 +000120 7388 STRB r0,[r1,#0xe] ;312 +000122 73c8 STRB r0,[r1,#0xf] ;313 +000124 1c6d ADDS r5,r5,#1 ;314 +000126 b2ed UXTB r5,r5 ;314 +000128 e056 B |L3.472| + |L3.298| +00012a 9902 LDR r1,[sp,#8] ;292 +00012c 4a68 LDR r2,|L3.720| +00012e 1c49 ADDS r1,r1,#1 ;292 +000130 0089 LSLS r1,r1,#2 ;292 +000132 3140 ADDS r1,r1,#0x40 ;292 +000134 012b LSLS r3,r5,#4 ;292 +000136 54d1 STRB r1,[r2,r3] ;292 +000138 e7d2 B |L3.224| + |L3.314| +;;;317 { +;;;318 xx = ((rxbuffer[8*ii+3]&0x0f) << 8) | (rxbuffer[8*ii+2]); +00013a 1980 ADDS r0,r0,r6 +00013c 9005 STR r0,[sp,#0x14] +00013e 78c2 LDRB r2,[r0,#3] +000140 7883 LDRB r3,[r0,#2] +000142 0711 LSLS r1,r2,#28 +000144 0d09 LSRS r1,r1,#20 +000146 4319 ORRS r1,r1,r3 +;;;319 yy = (rxbuffer[8*ii+4] << 4) | ((rxbuffer[8*ii+3]>>4)&0x0f); +000148 7903 LDRB r3,[r0,#4] +00014a 011b LSLS r3,r3,#4 +00014c 0912 LSRS r2,r2,#4 +00014e 4313 ORRS r3,r3,r2 +000150 9300 STR r3,[sp,#0] +;;;320 zz = rxbuffer[8*ii+5]; +;;;321 touch_id=rxbuffer[8*ii+1]>>4; +000152 7840 LDRB r0,[r0,#1] +000154 0900 LSRS r0,r0,#4 +000156 9002 STR r0,[sp,#8] +;;;322 xx = xx * 4096 / OUTPUT_WIDTH_VALUE; +000158 0308 LSLS r0,r1,#12 +00015a 2187 MOVS r1,#0x87 +00015c 00c9 LSLS r1,r1,#3 +00015e f7fffffe BL __aeabi_uidivmod +000162 9001 STR r0,[sp,#4] +;;;323 if(xx >4095) +000164 495b LDR r1,|L3.724| +000166 9801 LDR r0,[sp,#4] +000168 4288 CMP r0,r1 +00016a d901 BLS |L3.368| +;;;324 xx =4095; +00016c 4608 MOV r0,r1 +00016e 9001 STR r0,[sp,#4] + |L3.368| +;;;325 yy = yy * 4096 / OUTPUT_HEIGHT_VALUE; +000170 9800 LDR r0,[sp,#0] +000172 4959 LDR r1,|L3.728| +000174 0300 LSLS r0,r0,#12 +000176 f7fffffe BL __aeabi_uidivmod +;;;326 if(yy >4095) +00017a 4956 LDR r1,|L3.724| +00017c 4288 CMP r0,r1 +00017e d900 BLS |L3.386| +;;;327 yy =4095; +000180 4608 MOV r0,r1 + |L3.386| +;;;328 phone_reg_coord_back[16*k+0] = 0xC0+((touch_id+1)*4); +000182 9902 LDR r1,[sp,#8] +000184 4a52 LDR r2,|L3.720| +000186 1c49 ADDS r1,r1,#1 +000188 008b LSLS r3,r1,#2 +00018a 33c0 ADDS r3,r3,#0xc0 +00018c 0129 LSLS r1,r5,#4 +00018e 5453 STRB r3,[r2,r1] +;;;329 phone_reg_coord_back[16*k+1] = (uint8_t)((xx>>4) & 0xFF); //x ߰λ +000190 9b01 LDR r3,[sp,#4] +000192 091b LSRS r3,r3,#4 +000194 1889 ADDS r1,r1,r2 +000196 704b STRB r3,[r1,#1] +;;;330 phone_reg_coord_back[16*k+2] = (uint8_t)((yy>>4) & 0xFF); //y ߰λ +000198 0903 LSRS r3,r0,#4 +00019a 708b STRB r3,[r1,#2] +;;;331 phone_reg_coord_back[16*k+3] = ((xx & 0x0F) << 4) | (yy & 0x0F); //bit0-bit3:yλ;bit4-bit7:xλ; +00019c 9b01 LDR r3,[sp,#4] +00019e 0700 LSLS r0,r0,#28 +0001a0 011b LSLS r3,r3,#4 +0001a2 0f00 LSRS r0,r0,#28 +0001a4 4303 ORRS r3,r3,r0 +0001a6 70cb STRB r3,[r1,#3] +;;;332 phone_reg_coord_back[16*k+4] = 0x8; //major +0001a8 2008 MOVS r0,#8 +0001aa 7108 STRB r0,[r1,#4] +;;;333 phone_reg_coord_back[16*k+5] = 0x8; //minor +0001ac 7148 STRB r0,[r1,#5] +;;;334 //touch type0:ָͨ1:2:ף3:;4:;5:;6:ʪ;7:ӽ;8:ҡ +;;;335 phone_reg_coord_back[16*k+6] = 0x20; //bit0-bit5:zֻ6λ;bit6-bit7:touch typeĸλ +0001ae 2020 MOVS r0,#0x20 +0001b0 7188 STRB r0,[r1,#6] +;;;336 phone_reg_coord_back[16*k+7] = rxbuffer[8*ii+7]; //bit0-bit5:bufferʣٸ¼;bit6-bit7touch type λ +0001b2 9805 LDR r0,[sp,#0x14] +0001b4 79c0 LDRB r0,[r0,#7] +0001b6 71c8 STRB r0,[r1,#7] +;;;337 phone_reg_coord_back[16*k+8] = 0x04; +0001b8 2004 MOVS r0,#4 +0001ba 7208 STRB r0,[r1,#8] +;;;338 phone_reg_coord_back[16*k+9] = 0x83; +0001bc 2083 MOVS r0,#0x83 +0001be 7248 STRB r0,[r1,#9] +;;;339 phone_reg_coord_back[16*k+10] = 0x00; +0001c0 2000 MOVS r0,#0 +0001c2 7288 STRB r0,[r1,#0xa] +;;;340 phone_reg_coord_back[16*k+11] = 0x00; +0001c4 72c8 STRB r0,[r1,#0xb] +;;;341 phone_reg_coord_back[16*k+12] = 0x00; +0001c6 7308 STRB r0,[r1,#0xc] +;;;342 phone_reg_coord_back[16*k+13] = 0x00; +0001c8 7348 STRB r0,[r1,#0xd] +;;;343 phone_reg_coord_back[16*k+14] = 0x00; +0001ca 7388 STRB r0,[r1,#0xe] +;;;344 phone_reg_coord_back[16*ii+15] = 0x00; +0001cc 9904 LDR r1,[sp,#0x10] +0001ce 0109 LSLS r1,r1,#4 +0001d0 1889 ADDS r1,r1,r2 +0001d2 73c8 STRB r0,[r1,#0xf] +;;;345 k++; +0001d4 1c6d ADDS r5,r5,#1 +0001d6 b2ed UXTB r5,r5 + |L3.472| +0001d8 9804 LDR r0,[sp,#0x10] ;274 +0001da 1c40 ADDS r0,r0,#1 ;274 +0001dc b2c0 UXTB r0,r0 ;274 +0001de 9004 STR r0,[sp,#0x10] ;274 + |L3.480| +0001e0 9906 LDR r1,[sp,#0x18] ;274 +0001e2 9804 LDR r0,[sp,#0x10] ;274 +0001e4 4288 CMP r0,r1 ;274 +0001e6 d200 BCS |L3.490| +0001e8 e73d B |L3.102| + |L3.490| +;;;346 } +;;;347 +;;;348 } +;;;349 #endif +;;;350 +;;;351 if((send_point>1)&&(Flag_EA_EN)) +0001ea 4c39 LDR r4,|L3.720| +;;;352 { +;;;353 for(ii =0; ii>4)&0x0f); +;;;356 if(yy<500) +;;;357 { +;;;358 Flag_touch_count++; +;;;359 } +;;;360 } +;;;361 if((Flag_touch_count>1)&&(Flag_blacklight_EN==0)) +;;;362 { +;;;363 Flag_blacklight_EN=1; +0001ec 2501 MOVS r5,#1 +0001ee 3c1c SUBS r4,r4,#0x1c ;351 +0001f0 2f01 CMP r7,#1 ;351 +0001f2 d91d BLS |L3.560| +0001f4 79a0 LDRB r0,[r4,#6] ;351 ; Flag_EA_EN +0001f6 2800 CMP r0,#0 ;351 +0001f8 d01a BEQ |L3.560| +0001fa 2000 MOVS r0,#0 ;353 +0001fc 23ff MOVS r3,#0xff ;356 +0001fe 33f5 ADDS r3,r3,#0xf5 ;356 +000200 e00d B |L3.542| + |L3.514| +000202 00c1 LSLS r1,r0,#3 ;355 +000204 1989 ADDS r1,r1,r6 ;355 +000206 790a LDRB r2,[r1,#4] ;355 +000208 78c9 LDRB r1,[r1,#3] ;355 +00020a 0112 LSLS r2,r2,#4 ;355 +00020c 0909 LSRS r1,r1,#4 ;355 +00020e 430a ORRS r2,r2,r1 ;355 +000210 429a CMP r2,r3 ;356 +000212 d202 BCS |L3.538| +000214 79e1 LDRB r1,[r4,#7] ;358 ; Flag_touch_count +000216 1c49 ADDS r1,r1,#1 ;358 +000218 71e1 STRB r1,[r4,#7] ;358 + |L3.538| +00021a 1c40 ADDS r0,r0,#1 ;353 +00021c b2c0 UXTB r0,r0 ;353 + |L3.542| +00021e 42b8 CMP r0,r7 ;353 +000220 d3ef BCC |L3.514| +000222 79e0 LDRB r0,[r4,#7] ;361 ; Flag_touch_count +000224 2801 CMP r0,#1 ;361 +000226 d903 BLS |L3.560| +000228 7a60 LDRB r0,[r4,#9] ;361 ; Flag_blacklight_EN +00022a 2800 CMP r0,#0 ;361 +00022c d100 BNE |L3.560| +00022e 7265 STRB r5,[r4,#9] + |L3.560| +;;;364 } +;;;365 } +;;;366 +;;;367 #ifdef ENABLE_TP_SLEEP +;;;368 if(tp_sleep_in) +000230 78e0 LDRB r0,[r4,#3] ; tp_sleep_in +000232 2800 CMP r0,#0 +000234 d039 BEQ |L3.682| +;;;369 { +;;;370 if(send_point==0) +000236 2f00 CMP r7,#0 +000238 d137 BNE |L3.682| +;;;371 { +;;;372 u16CoordX = (phone_reg_coord_back[1]<<4)+((phone_reg_coord_back[3]>>4)&0x0f); +00023a 4a25 LDR r2,|L3.720| +00023c 7850 LDRB r0,[r2,#1] ; phone_reg_coord_back +00023e 78d1 LDRB r1,[r2,#3] ; phone_reg_coord_back +000240 0100 LSLS r0,r0,#4 +000242 090b LSRS r3,r1,#4 +000244 18c0 ADDS r0,r0,r3 +000246 82e0 STRH r0,[r4,#0x16] +;;;373 u16CoordY = (phone_reg_coord_back[2]<<4)+(phone_reg_coord_back[3]&0x0f); +000248 7892 LDRB r2,[r2,#2] ; phone_reg_coord_back +00024a 0709 LSLS r1,r1,#28 +00024c 0112 LSLS r2,r2,#4 +00024e 0f09 LSRS r1,r1,#28 +000250 1851 ADDS r1,r2,r1 +000252 82a1 STRH r1,[r4,#0x14] +;;;374 //if((tp_sleep_count>5)&&(tp_sleep_count<60)) +;;;375 if((tp_sleep_count>5)&&(tp_sleep_count<100)&&((rxbuffer[0]&0xf0)==0x30)) //leo, 練 +000254 7922 LDRB r2,[r4,#4] ; tp_sleep_count +000256 1f92 SUBS r2,r2,#6 +000258 2a5e CMP r2,#0x5e +00025a d220 BCS |L3.670| +00025c 7832 LDRB r2,[r6,#0] +00025e 0912 LSRS r2,r2,#4 +000260 2a03 CMP r2,#3 +000262 d11c BNE |L3.670| +;;;376 { +;;;377 if (u16CoordX > u16CoordX_back) +000264 8b62 LDRH r2,[r4,#0x1a] ; u16CoordX_back +000266 4290 CMP r0,r2 +000268 d902 BLS |L3.624| +;;;378 u16CoordX_back = u16CoordX-u16CoordX_back; +00026a 1a80 SUBS r0,r0,r2 +00026c 8360 STRH r0,[r4,#0x1a] +00026e e001 B |L3.628| + |L3.624| +;;;379 else +;;;380 u16CoordX_back = u16CoordX_back-u16CoordX; +000270 1a10 SUBS r0,r2,r0 +000272 8360 STRH r0,[r4,#0x1a] + |L3.628| +;;;381 +;;;382 if (u16CoordY > u16CoordY_back) +000274 8b20 LDRH r0,[r4,#0x18] ; u16CoordY_back +000276 4281 CMP r1,r0 +000278 d902 BLS |L3.640| +;;;383 u16CoordY_back = u16CoordY-u16CoordY_back; +00027a 1a08 SUBS r0,r1,r0 +00027c 8320 STRH r0,[r4,#0x18] +00027e e001 B |L3.644| + |L3.640| +;;;384 else +;;;385 u16CoordY_back = u16CoordY_back-u16CoordY; +000280 1a40 SUBS r0,r0,r1 +000282 8320 STRH r0,[r4,#0x18] + |L3.644| +;;;386 +;;;387 if ( (u16CoordX_back < 360) && (u16CoordY_back < 360)) //δķΧ +000284 8b61 LDRH r1,[r4,#0x1a] ; u16CoordX_back +000286 20ff MOVS r0,#0xff +000288 3069 ADDS r0,r0,#0x69 +00028a 4281 CMP r1,r0 +00028c d207 BCS |L3.670| +00028e 8b21 LDRH r1,[r4,#0x18] ; u16CoordY_back +000290 4281 CMP r1,r0 +000292 d204 BCS |L3.670| +;;;388 { +;;;389 //TAU_LOGD("tp_sleep_in!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! \n"); +;;;390 sleep_double_EN=1; +000294 7165 STRB r5,[r4,#5] +;;;391 hal_gpio_set_output_data(g_phone_output_int_pad, IO_LVL_LOW); +000296 2100 MOVS r1,#0 +000298 78a0 LDRB r0,[r4,#2] ; g_phone_output_int_pad +00029a f7fffffe BL hal_gpio_set_output_data + |L3.670| +;;;392 } +;;;393 } +;;;394 +;;;395 u16CoordX_back = u16CoordX; +00029e 8ae0 LDRH r0,[r4,#0x16] ; u16CoordX +0002a0 8360 STRH r0,[r4,#0x1a] +;;;396 u16CoordY_back = u16CoordY; +0002a2 8aa0 LDRH r0,[r4,#0x14] ; u16CoordY +0002a4 8320 STRH r0,[r4,#0x18] +;;;397 tp_sleep_count=0; +0002a6 2000 MOVS r0,#0 +0002a8 7120 STRB r0,[r4,#4] + |L3.682| +;;;398 } +;;;399 } +;;;400 #endif +;;;401 +;;;402 if(send_point==0) +0002aa 2f00 CMP r7,#0 +0002ac d102 BNE |L3.692| +;;;403 { +;;;404 Flag_blacklight_EN=0; +0002ae 2000 MOVS r0,#0 +0002b0 7260 STRB r0,[r4,#9] +;;;405 Flag_touch_count=0; +0002b2 71e0 STRB r0,[r4,#7] + |L3.692| +;;;406 } +;;;407 touchnum_bak=send_point; +0002b4 7227 STRB r7,[r4,#8] +;;;408 if(tp_sleep_in==0) +0002b6 78e0 LDRB r0,[r4,#3] ; tp_sleep_in +0002b8 2800 CMP r0,#0 +0002ba d105 BNE |L3.712| +;;;409 { +;;;410 tp_flag =true; +0002bc 7065 STRB r5,[r4,#1] +;;;411 sleep_double_EN=0; +0002be 7160 STRB r0,[r4,#5] +;;;412 hal_gpio_set_output_data(g_phone_output_int_pad, IO_LVL_LOW); //TPжϽ,֪ͨAPȡTP +0002c0 2100 MOVS r1,#0 +0002c2 78a0 LDRB r0,[r4,#2] ; g_phone_output_int_pad +0002c4 f7fffffe BL hal_gpio_set_output_data + |L3.712| +;;;413 } +;;;414 return screen_reg_int_data_size+1; +0002c8 2004 MOVS r0,#4 +;;;415 +;;;416 #endif +;;;417 +;;;418 } +0002ca b007 ADD sp,sp,#0x1c +0002cc bdf0 POP {r4-r7,pc} +;;;419 + ENDP + +0002ce 0000 DCW 0x0000 + |L3.720| + DCD ||.data||+0x1c + |L3.724| + DCD 0x00000fff + |L3.728| + DCD 0x00000924 + + AREA ||.bss||, DATA, NOINIT, ALIGN=0 + + phone_reg_coord_back_bak + % 200 + + AREA ||.constdata||, DATA, READONLY, ALIGN=0 + + phone_data_21 +000000 80 DCB 0x80 + phone_data_55 +000001 20 DCB 0x20 + phone_data_85_1 +000002 00 DCB 0x00 + phone_data_92_1 +000003 03 DCB 0x03 + phone_data_F5_1 +000004 ff DCB 0xff + phone_data_F5_2 +000005 13 DCB 0x13 + phone_data_F5_3 +000006 00 DCB 0x00 + phone_data_F5_4 +000007 06 DCB 0x06 + phone_data_30 +000008 6100 DCB 0x61,0x00 + phone_data_52 +00000a ac37 DCB 0xac,0x37 +00000c 91 DCB 0x91 + phone_data_92_3 +00000d 111125 DCB 0x11,0x11,0x25 + phone_data_A3 +000010 23770101 DCB 0x23,0x77,0x01,0x01 + phone_data_A4 +000014 23770102 DCB 0x23,0x77,0x01,0x02 + phone_data_A5 +000018 23770128 DCB 0x23,0x77,0x01,0x28 + phone_data_AF +00001c 00030100 DCB 0x00,0x03,0x01,0x00 + phone_data_F1 +000020 070700a2 DCB 0x07,0x07,0x00,0xa2 + phone_data_22 +000024 53453791 DCB 0x53,0x45,0x37,0x91 +000028 00 DCB 0x00 + phone_data_92_2 +000029 e600c7 DCB 0xe6,0x00,0xc7 +00002c 00d700 DCB 0x00,0xd7,0x00 + phone_data_F6_1 +00002f fa DCB 0xfa +000030 f4fb09fb DCB 0xf4,0xfb,0x09,0xfb +000034 09 DCB 0x09 + phone_data_F6_2 +000035 252323 DCB 0x25,0x23,0x23 +000038 e12186 DCB 0xe1,0x21,0x86 + phone_data_F6_3 +00003b 00 DCB 0x00 +00003c 01000100 DCB 0x01,0x00,0x01,0x00 +000040 00 DCB 0x00 + phone_data_F6_4 +000041 000200 DCB 0x00,0x02,0x00 +000044 000000 DCB 0x00,0x00,0x00 + phone_data_60_1 +000047 09 DCB 0x09 +000048 00100000 DCB 0x00,0x10,0x00,0x00 +00004c 00000000 DCB 0x00,0x00,0x00,0x00 +000050 00000000 DCB 0x00,0x00,0x00,0x00 +000054 000000 DCB 0x00,0x00,0x00 + phone_data_23 +000057 10 DCB 0x10 +000058 00100005 DCB 0x00,0x10,0x00,0x05 +00005c a00c8011 DCB 0xa0,0x0c,0x80,0x11 +000060 2600 DCB 0x26,0x00 + phone_data_85_2 +000062 0120 DCB 0x01,0x20 +000064 01040100 DCB 0x01,0x04,0x01,0x00 +000068 03040000 DCB 0x03,0x04,0x00,0x00 +00006c 00000000 DCB 0x00,0x00,0x00,0x00 +000070 00000000 DCB 0x00,0x00,0x00,0x00 +000074 00000000 DCB 0x00,0x00,0x00,0x00 +000078 00000000 DCB 0x00,0x00,0x00,0x00 +00007c 0100 DCB 0x01,0x00 + phone_data_90 +00007e 4739 DCB 0x47,0x39 +000080 38360004 DCB 0x38,0x36,0x00,0x04 +000084 00072001 DCB 0x00,0x07,0x20,0x01 + phone_data_72_0 +000088 ffd1ffdb DCB 0xff,0xd1,0xff,0xdb +00008c ffdaffe1 DCB 0xff,0xda,0xff,0xe1 +000090 ffdfffde DCB 0xff,0xdf,0xff,0xde +000094 ffdbffdc DCB 0xff,0xdb,0xff,0xdc +000098 ffdeffd8 DCB 0xff,0xde,0xff,0xd8 +00009c ffcfffd4 DCB 0xff,0xcf,0xff,0xd4 +0000a0 ffccffca DCB 0xff,0xcc,0xff,0xca +0000a4 ffc5ffbd DCB 0xff,0xc5,0xff,0xbd +0000a8 ffbeffc4 DCB 0xff,0xbe,0xff,0xc4 +0000ac ffb7ffbe DCB 0xff,0xb7,0xff,0xbe +0000b0 ffbdffc3 DCB 0xff,0xbd,0xff,0xc3 +0000b4 ffc3ffcb DCB 0xff,0xc3,0xff,0xcb +0000b8 ffd3ffcf DCB 0xff,0xd3,0xff,0xcf +0000bc ffccffbf DCB 0xff,0xcc,0xff,0xbf +0000c0 ffbbffba DCB 0xff,0xbb,0xff,0xba +0000c4 ffbcffc3 DCB 0xff,0xbc,0xff,0xc3 +0000c8 ffbeffba DCB 0xff,0xbe,0xff,0xba +0000cc 0025ffb6 DCB 0x00,0x25,0xff,0xb6 +0000d0 ffc1ffc0 DCB 0xff,0xc1,0xff,0xc0 +0000d4 ffe5ffe7 DCB 0xff,0xe5,0xff,0xe7 +0000d8 ffe8ffe9 DCB 0xff,0xe8,0xff,0xe9 +0000dc ffebffe6 DCB 0xff,0xeb,0xff,0xe6 +0000e0 ffe7ffea DCB 0xff,0xe7,0xff,0xea +0000e4 ffe8ffe4 DCB 0xff,0xe8,0xff,0xe4 +0000e8 ffdfffe2 DCB 0xff,0xdf,0xff,0xe2 +0000ec ffd8ffd7 DCB 0xff,0xd8,0xff,0xd7 +0000f0 ffd5ffc9 DCB 0xff,0xd5,0xff,0xc9 +0000f4 ffc3ffc2 DCB 0xff,0xc3,0xff,0xc2 +0000f8 ffb8ffb9 DCB 0xff,0xb8,0xff,0xb9 +0000fc ffb7ffbf DCB 0xff,0xb7,0xff,0xbf +000100 ffbfffc9 DCB 0xff,0xbf,0xff,0xc9 +000104 ffd1ffd1 DCB 0xff,0xd1,0xff,0xd1 +000108 ffc9ffbe DCB 0xff,0xc9,0xff,0xbe +00010c ffb5ffb2 DCB 0xff,0xb5,0xff,0xb2 +000110 ffbaffc1 DCB 0xff,0xba,0xff,0xc1 +000114 ffbbffb6 DCB 0xff,0xbb,0xff,0xb6 +000118 00cfffc3 DCB 0x00,0xcf,0xff,0xc3 +00011c ffbdffc2 DCB 0xff,0xbd,0xff,0xc2 +000120 fff1fff5 DCB 0xff,0xf1,0xff,0xf5 +000124 fff5fffa DCB 0xff,0xf5,0xff,0xfa +000128 fffafff8 DCB 0xff,0xfa,0xff,0xf8 +00012c fff9fffb DCB 0xff,0xf9,0xff,0xfb +000130 fff8fff4 DCB 0xff,0xf8,0xff,0xf4 +000134 ffeffff4 DCB 0xff,0xef,0xff,0xf4 +000138 ffeaffec DCB 0xff,0xea,0xff,0xec +00013c ffe7ffdd DCB 0xff,0xe7,0xff,0xdd +000140 ffd1ffd0 DCB 0xff,0xd1,0xff,0xd0 +000144 ffc0ffbb DCB 0xff,0xc0,0xff,0xbb +000148 ffb6ffbb DCB 0xff,0xb6,0xff,0xbb +00014c ffbaffc3 DCB 0xff,0xba,0xff,0xc3 +000150 ffd3ffd9 DCB 0xff,0xd3,0xff,0xd9 +000154 ffd6ffc8 DCB 0xff,0xd6,0xff,0xc8 +000158 ffc1ffb3 DCB 0xff,0xc1,0xff,0xb3 +00015c ffb6ffbd DCB 0xff,0xb6,0xff,0xbd +000160 ffb7ffa9 DCB 0xff,0xb7,0xff,0xa9 +000164 00c7ffc2 DCB 0x00,0xc7,0xff,0xc2 +000168 ffc5ffd0 DCB 0xff,0xc5,0xff,0xd0 +00016c ffedffef DCB 0xff,0xed,0xff,0xef +000170 fff5fff7 DCB 0xff,0xf5,0xff,0xf7 +000174 fffbfff8 DCB 0xff,0xfb,0xff,0xf8 +000178 fff9fff9 DCB 0xff,0xf9,0xff,0xf9 +00017c fff8fff8 DCB 0xff,0xf8,0xff,0xf8 +000180 fff5fffa DCB 0xff,0xf5,0xff,0xfa +000184 fff0ffee DCB 0xff,0xf0,0xff,0xee +000188 ffefffe5 DCB 0xff,0xef,0xff,0xe5 +00018c ffdeffdc DCB 0xff,0xde,0xff,0xdc +000190 ffccffc1 DCB 0xff,0xcc,0xff,0xc1 +000194 ffbaffb9 DCB 0xff,0xba,0xff,0xb9 +000198 ffb7ffbf DCB 0xff,0xb7,0xff,0xbf +00019c ffcdffd5 DCB 0xff,0xcd,0xff,0xd5 +0001a0 ffd5ffcc DCB 0xff,0xd5,0xff,0xcc +0001a4 ffc7ffba DCB 0xff,0xc7,0xff,0xba +0001a8 ffb6ffbb DCB 0xff,0xb6,0xff,0xbb +0001ac ffb5ffbc DCB 0xff,0xb5,0xff,0xbc +0001b0 ffbbffba DCB 0xff,0xbb,0xff,0xba +0001b4 ffb9ffbe DCB 0xff,0xb9,0xff,0xbe +0001b8 fff8fffa DCB 0xff,0xf8,0xff,0xfa +0001bc fffd0001 DCB 0xff,0xfd,0x00,0x01 +0001c0 00060005 DCB 0x00,0x06,0x00,0x05 +0001c4 00040008 DCB 0x00,0x04,0x00,0x08 +0001c8 00080004 DCB 0x00,0x08,0x00,0x04 +0001cc fffe0001 DCB 0xff,0xfe,0x00,0x01 +0001d0 fffbfffd DCB 0xff,0xfb,0xff,0xfd +0001d4 fffdfff1 DCB 0xff,0xfd,0xff,0xf1 +0001d8 ffecffeb DCB 0xff,0xec,0xff,0xeb +0001dc ffddffd4 DCB 0xff,0xdd,0xff,0xd4 +0001e0 ffc9ffc3 DCB 0xff,0xc9,0xff,0xc3 +0001e4 ffbbffc1 DCB 0xff,0xbb,0xff,0xc1 +0001e8 ffceffd2 DCB 0xff,0xce,0xff,0xd2 +0001ec ffd1ffd2 DCB 0xff,0xd1,0xff,0xd2 +0001f0 ffc8ffc0 DCB 0xff,0xc8,0xff,0xc0 +0001f4 ffbdffba DCB 0xff,0xbd,0xff,0xba +0001f8 ffb4ffbc DCB 0xff,0xb4,0xff,0xbc +0001fc ffbcffb8 DCB 0xff,0xbc,0xff,0xb8 +000200 ffbfffc1 DCB 0xff,0xbf,0xff,0xc1 +000204 fff3fff9 DCB 0xff,0xf3,0xff,0xf9 +000208 fff8ffff DCB 0xff,0xf8,0xff,0xff +00020c 0001ffff DCB 0x00,0x01,0xff,0xff +000210 00030000 DCB 0x00,0x03,0x00,0x00 +000214 00010003 DCB 0x00,0x01,0x00,0x03 +000218 fffe0001 DCB 0xff,0xfe,0x00,0x01 +00021c fffbfffd DCB 0xff,0xfb,0xff,0xfd +000220 fffcfff1 DCB 0xff,0xfc,0xff,0xf1 +000224 ffeaffee DCB 0xff,0xea,0xff,0xee +000228 ffe0ffde DCB 0xff,0xe0,0xff,0xde +00022c ffd0ffc7 DCB 0xff,0xd0,0xff,0xc7 +000230 ffbeffc2 DCB 0xff,0xbe,0xff,0xc2 +000234 ffc8ffc9 DCB 0xff,0xc8,0xff,0xc9 +000238 ffc6ffc1 DCB 0xff,0xc6,0xff,0xc1 +00023c ffbfffb8 DCB 0xff,0xbf,0xff,0xb8 +000240 ffb4ffb3 DCB 0xff,0xb4,0xff,0xb3 +000244 ffb1ffb5 DCB 0xff,0xb1,0xff,0xb5 +000248 ffb9ffab DCB 0xff,0xb9,0xff,0xab +00024c ffb1ffb6 DCB 0xff,0xb1,0xff,0xb6 +000250 fff3fff6 DCB 0xff,0xf3,0xff,0xf6 +000254 fffbfffd DCB 0xff,0xfb,0xff,0xfd +000258 00020001 DCB 0x00,0x02,0x00,0x01 +00025c 00000006 DCB 0x00,0x00,0x00,0x06 +000260 00040002 DCB 0x00,0x04,0x00,0x02 +000264 fffc0003 DCB 0xff,0xfc,0x00,0x03 +000268 fffdffff DCB 0xff,0xfd,0xff,0xff +00026c fffffff5 DCB 0xff,0xff,0xff,0xf5 +000270 ffeefff0 DCB 0xff,0xee,0xff,0xf0 +000274 ffe6ffe2 DCB 0xff,0xe6,0xff,0xe2 +000278 ffdbffd1 DCB 0xff,0xdb,0xff,0xd1 +00027c ffc1ffc3 DCB 0xff,0xc1,0xff,0xc3 +000280 ffc6ffc2 DCB 0xff,0xc6,0xff,0xc2 +000284 ffc1ffbf DCB 0xff,0xc1,0xff,0xbf +000288 ffc0ffb6 DCB 0xff,0xc0,0xff,0xb6 +00028c ffb6ffb8 DCB 0xff,0xb6,0xff,0xb8 +000290 ffb4ffb2 DCB 0xff,0xb4,0xff,0xb2 +000294 ffb6ffad DCB 0xff,0xb6,0xff,0xad +000298 ffadffb4 DCB 0xff,0xad,0xff,0xb4 +00029c fff3fff7 DCB 0xff,0xf3,0xff,0xf7 +0002a0 fff7fffd DCB 0xff,0xf7,0xff,0xfd +0002a4 00010000 DCB 0x00,0x01,0x00,0x00 +0002a8 00010004 DCB 0x00,0x01,0x00,0x04 +0002ac 0003fffd DCB 0x00,0x03,0xff,0xfd +0002b0 fffe0003 DCB 0xff,0xfe,0x00,0x03 +0002b4 fffefffe DCB 0xff,0xfe,0xff,0xfe +0002b8 0000fff3 DCB 0x00,0x00,0xff,0xf3 +0002bc fff0ffef DCB 0xff,0xf0,0xff,0xef +0002c0 ffeaffe3 DCB 0xff,0xea,0xff,0xe3 +0002c4 ffdcffd6 DCB 0xff,0xdc,0xff,0xd6 +0002c8 ffc2ffbe DCB 0xff,0xc2,0xff,0xbe +0002cc ffc2ffbd DCB 0xff,0xc2,0xff,0xbd +0002d0 ffbdffc0 DCB 0xff,0xbd,0xff,0xc0 +0002d4 ffbeffba DCB 0xff,0xbe,0xff,0xba +0002d8 ffb8ffb9 DCB 0xff,0xb8,0xff,0xb9 +0002dc ffb1ffb1 DCB 0xff,0xb1,0xff,0xb1 +0002e0 ffb6ffab DCB 0xff,0xb6,0xff,0xab +0002e4 ffafffb6 DCB 0xff,0xaf,0xff,0xb6 +0002e8 fffbffff DCB 0xff,0xfb,0xff,0xff +0002ec 00030005 DCB 0x00,0x03,0x00,0x05 +0002f0 000c0008 DCB 0x00,0x0c,0x00,0x08 +0002f4 0008000b DCB 0x00,0x08,0x00,0x0b +0002f8 000c000a DCB 0x00,0x0c,0x00,0x0a +0002fc 0008000e DCB 0x00,0x08,0x00,0x0e +000300 00090009 DCB 0x00,0x09,0x00,0x09 +000304 0007fffd DCB 0x00,0x07,0xff,0xfd +000308 fff7fffa DCB 0xff,0xf7,0xff,0xfa +00030c fff1fff2 DCB 0xff,0xf1,0xff,0xf2 +000310 ffe8ffe1 DCB 0xff,0xe8,0xff,0xe1 +000314 ffcfffc4 DCB 0xff,0xcf,0xff,0xc4 +000318 ffc7ffc6 DCB 0xff,0xc7,0xff,0xc6 +00031c ffc6ffc7 DCB 0xff,0xc6,0xff,0xc7 +000320 ffcaffca DCB 0xff,0xca,0xff,0xca +000324 ffcbffcc DCB 0xff,0xcb,0xff,0xcc +000328 ffc6ffc2 DCB 0xff,0xc6,0xff,0xc2 +00032c ffc0ffb2 DCB 0xff,0xc0,0xff,0xb2 +000330 ffbdffbe DCB 0xff,0xbd,0xff,0xbe +000334 fffafffe DCB 0xff,0xfa,0xff,0xfe +000338 00030005 DCB 0x00,0x03,0x00,0x05 +00033c 00090007 DCB 0x00,0x09,0x00,0x07 +000340 0007000a DCB 0x00,0x07,0x00,0x0a +000344 000a0007 DCB 0x00,0x0a,0x00,0x07 +000348 00040009 DCB 0x00,0x04,0x00,0x09 +00034c 00040005 DCB 0x00,0x04,0x00,0x05 +000350 0004fffa DCB 0x00,0x04,0xff,0xfa +000354 fff9fffb DCB 0xff,0xf9,0xff,0xfb +000358 fff2ffef DCB 0xff,0xf2,0xff,0xef +00035c ffeaffe3 DCB 0xff,0xea,0xff,0xe3 +000360 ffd3ffcc DCB 0xff,0xd3,0xff,0xcc +000364 ffc7ffc8 DCB 0xff,0xc7,0xff,0xc8 +000368 ffc9ffc5 DCB 0xff,0xc9,0xff,0xc5 +00036c ffccffcf DCB 0xff,0xcc,0xff,0xcf +000370 ffcfffd6 DCB 0xff,0xcf,0xff,0xd6 +000374 ffcfffc9 DCB 0xff,0xcf,0xff,0xc9 +000378 ffc7ffb0 DCB 0xff,0xc7,0xff,0xb0 +00037c ffb5ffbc DCB 0xff,0xb5,0xff,0xbc +000380 fff5fff9 DCB 0xff,0xf5,0xff,0xf9 +000384 fffd0002 DCB 0xff,0xfd,0x00,0x02 +000388 00050003 DCB 0x00,0x05,0x00,0x03 +00038c 00060007 DCB 0x00,0x06,0x00,0x07 +000390 00080002 DCB 0x00,0x08,0x00,0x02 +000394 0000000a DCB 0x00,0x00,0x00,0x0a +000398 00010003 DCB 0x00,0x01,0x00,0x03 +00039c 0001fff9 DCB 0x00,0x01,0xff,0xf9 +0003a0 fff3fff8 DCB 0xff,0xf3,0xff,0xf8 +0003a4 fff1fff1 DCB 0xff,0xf1,0xff,0xf1 +0003a8 ffeaffe9 DCB 0xff,0xea,0xff,0xe9 +0003ac ffdbffd0 DCB 0xff,0xdb,0xff,0xd0 +0003b0 ffc9ffc8 DCB 0xff,0xc9,0xff,0xc8 +0003b4 ffccffc5 DCB 0xff,0xcc,0xff,0xc5 +0003b8 ffc5ffca DCB 0xff,0xc5,0xff,0xca +0003bc ffd1ffd8 DCB 0xff,0xd1,0xff,0xd8 +0003c0 ffd3ffd2 DCB 0xff,0xd3,0xff,0xd2 +0003c4 ffccffb2 DCB 0xff,0xcc,0xff,0xb2 +0003c8 ffb1ffb8 DCB 0xff,0xb1,0xff,0xb8 +0003cc ffeffff6 DCB 0xff,0xef,0xff,0xf6 +0003d0 fffafffd DCB 0xff,0xfa,0xff,0xfd +0003d4 0000fffe DCB 0x00,0x00,0xff,0xfe +0003d8 00020003 DCB 0x00,0x02,0x00,0x03 +0003dc 0002fffd DCB 0x00,0x02,0xff,0xfd +0003e0 fffd0004 DCB 0xff,0xfd,0x00,0x04 +0003e4 fffbffff DCB 0xff,0xfb,0xff,0xff +0003e8 fffffff3 DCB 0xff,0xff,0xff,0xf3 +0003ec ffeefff5 DCB 0xff,0xee,0xff,0xf5 +0003f0 ffecffec DCB 0xff,0xec,0xff,0xec +0003f4 ffe8ffe5 DCB 0xff,0xe8,0xff,0xe5 +0003f8 ffd9ffd4 DCB 0xff,0xd9,0xff,0xd4 +0003fc ffceffc7 DCB 0xff,0xce,0xff,0xc7 +000400 ffc7ffc1 DCB 0xff,0xc7,0xff,0xc1 +000404 ffc1ffc2 DCB 0xff,0xc1,0xff,0xc2 +000408 ffcaffd4 DCB 0xff,0xca,0xff,0xd4 +00040c ffcbffce DCB 0xff,0xcb,0xff,0xce +000410 ffd1ffb8 DCB 0xff,0xd1,0xff,0xb8 +000414 ffb1ffb2 DCB 0xff,0xb1,0xff,0xb2 +000418 fffcffff DCB 0xff,0xfc,0xff,0xff +00041c 00020004 DCB 0x00,0x02,0x00,0x04 +000420 00060005 DCB 0x00,0x06,0x00,0x05 +000424 0008000a DCB 0x00,0x08,0x00,0x0a +000428 00090004 DCB 0x00,0x09,0x00,0x04 +00042c 00020009 DCB 0x00,0x02,0x00,0x09 +000430 00010004 DCB 0x00,0x01,0x00,0x04 +000434 0002fffb DCB 0x00,0x02,0xff,0xfb +000438 fff6fffd DCB 0xff,0xf6,0xff,0xfd +00043c fff5fff5 DCB 0xff,0xf5,0xff,0xf5 +000440 fff2fff1 DCB 0xff,0xf2,0xff,0xf1 +000444 ffe4ffe2 DCB 0xff,0xe4,0xff,0xe2 +000448 ffdeffd0 DCB 0xff,0xde,0xff,0xd0 +00044c ffccffc2 DCB 0xff,0xcc,0xff,0xc2 +000450 ffc4ffc5 DCB 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0x00,0x00,0x00,0x00 +001fb4 00000000 DCB 0x00,0x00,0x00,0x00 +001fb8 00000000 DCB 0x00,0x00,0x00,0x00 +001fbc 00000000 DCB 0x00,0x00,0x00,0x00 +001fc0 00000000 DCB 0x00,0x00,0x00,0x00 +001fc4 00000000 DCB 0x00,0x00,0x00,0x00 +001fc8 00000000 DCB 0x00,0x00,0x00,0x00 +001fcc 00000000 DCB 0x00,0x00,0x00,0x00 +001fd0 00000000 DCB 0x00,0x00,0x00,0x00 +001fd4 00000000 DCB 0x00,0x00,0x00,0x00 +001fd8 00000000 DCB 0x00,0x00,0x00,0x00 +001fdc 00000000 DCB 0x00,0x00,0x00,0x00 +001fe0 00000000 DCB 0x00,0x00,0x00,0x00 +001fe4 00000000 DCB 0x00,0x00,0x00,0x00 +001fe8 00000000 DCB 0x00,0x00,0x00,0x00 +001fec 00000000 DCB 0x00,0x00,0x00,0x00 +001ff0 00000000 DCB 0x00,0x00,0x00,0x00 +001ff4 00000000 DCB 0x00,0x00,0x00,0x00 +001ff8 00000000 DCB 0x00,0x00,0x00,0x00 +001ffc 00000000 DCB 0x00,0x00,0x00,0x00 +002000 00000000 DCB 0x00,0x00,0x00,0x00 +002004 00000000 DCB 0x00,0x00,0x00,0x00 +002008 00000000 DCB 0x00,0x00,0x00,0x00 +00200c 00000000 DCB 0x00,0x00,0x00,0x00 +002010 00000000 DCB 0x00,0x00,0x00,0x00 +002014 00000000 DCB 0x00,0x00,0x00,0x00 +002018 00000000 DCB 0x00,0x00,0x00,0x00 +00201c 00000000 DCB 0x00,0x00,0x00,0x00 + phone_data_75_FF +002020 ffffffff DCB 0xff,0xff,0xff,0xff +002024 ffffffff DCB 0xff,0xff,0xff,0xff +002028 ffffffff DCB 0xff,0xff,0xff,0xff +00202c ffffffff DCB 0xff,0xff,0xff,0xff +002030 ffffffff DCB 0xff,0xff,0xff,0xff +002034 ffffffff DCB 0xff,0xff,0xff,0xff +002038 ffffffff DCB 0xff,0xff,0xff,0xff +00203c ffffffff DCB 0xff,0xff,0xff,0xff +002040 ffffffff DCB 0xff,0xff,0xff,0xff +002044 ffffffff DCB 0xff,0xff,0xff,0xff +002048 ffffffff DCB 0xff,0xff,0xff,0xff +00204c ffffffff DCB 0xff,0xff,0xff,0xff +002050 ffffffff DCB 0xff,0xff,0xff,0xff +002054 ffffffff DCB 0xff,0xff,0xff,0xff +002058 ffffffff DCB 0xff,0xff,0xff,0xff +00205c ffffffff DCB 0xff,0xff,0xff,0xff +002060 ffffffff DCB 0xff,0xff,0xff,0xff +002064 ffffffff DCB 0xff,0xff,0xff,0xff +002068 ffffffff DCB 0xff,0xff,0xff,0xff +00206c ffffffff DCB 0xff,0xff,0xff,0xff +002070 ffffffff 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0xff,0xff,0xff,0xff +002134 ffffffff DCB 0xff,0xff,0xff,0xff +002138 ffffffff DCB 0xff,0xff,0xff,0xff +00213c ffffffff DCB 0xff,0xff,0xff,0xff + sleep_on +002140 46012b85 DCB 0x46,0x01,0x2b,0x85 +002144 f4000000 DCB 0xf4,0x00,0x00,0x00 +002148 00000000 DCB 0x00,0x00,0x00,0x00 +00214c 00000000 DCB 0x00,0x00,0x00,0x00 + + AREA ||area_number.8||, DATA, READONLY, ALIGN=0 + + EXPORTAS ||area_number.8||, ||.constdata|| + phone_data_60_2 +000000 1d610202 DCB 0x1d,0x61,0x02,0x02 +000004 06000000 DCB 0x06,0x00,0x00,0x00 +000008 00000000 DCB 0x00,0x00,0x00,0x00 +00000c 00000000 DCB 0x00,0x00,0x00,0x00 + + AREA ||area_number.9||, DATA, READONLY, ALIGN=0 + + EXPORTAS ||area_number.9||, ||.constdata|| + phone_data_60_3 +000000 1d610600 DCB 0x1d,0x61,0x06,0x00 +000004 02020000 DCB 0x02,0x02,0x00,0x00 +000008 00000000 DCB 0x00,0x00,0x00,0x00 +00000c 00000000 DCB 0x00,0x00,0x00,0x00 + + AREA ||area_number.10||, DATA, READONLY, ALIGN=0 + + EXPORTAS ||area_number.10||, ||.constdata|| + phone_data_60_4 +000000 1d410000 DCB 0x1d,0x41,0x00,0x00 +000004 00000000 DCB 0x00,0x00,0x00,0x00 +000008 00000000 DCB 0x00,0x00,0x00,0x00 +00000c 00000000 DCB 0x00,0x00,0x00,0x00 + + AREA ||area_number.11||, DATA, READONLY, ALIGN=0 + + EXPORTAS ||area_number.11||, ||.constdata|| + phone_data_60_5 +000000 1d610502 DCB 0x1d,0x61,0x05,0x02 +000004 02000000 DCB 0x02,0x00,0x00,0x00 +000008 00000000 DCB 0x00,0x00,0x00,0x00 +00000c 00000000 DCB 0x00,0x00,0x00,0x00 + + AREA ||area_number.12||, DATA, READONLY, ALIGN=0 + + EXPORTAS ||area_number.12||, ||.constdata|| + phone_data_60_6 +000000 1d610202 DCB 0x1d,0x61,0x02,0x02 +000004 05020000 DCB 0x05,0x02,0x00,0x00 +000008 00000000 DCB 0x00,0x00,0x00,0x00 +00000c 00000000 DCB 0x00,0x00,0x00,0x00 + + AREA ||area_number.13||, DATA, READONLY, ALIGN=0 + + EXPORTAS ||area_number.13||, ||.constdata|| + phone_data_60_7 +000000 1d610502 DCB 0x1d,0x61,0x05,0x02 +000004 02020000 DCB 0x02,0x02,0x00,0x00 +000008 00000000 DCB 0x00,0x00,0x00,0x00 +00000c 00000000 DCB 0x00,0x00,0x00,0x00 + + AREA ||area_number.14||, DATA, READONLY, ALIGN=0 + + EXPORTAS ||area_number.14||, ||.constdata|| + phone_data_60_8 +000000 09010100 DCB 0x09,0x01,0x01,0x00 +000004 00000000 DCB 0x00,0x00,0x00,0x00 +000008 00000000 DCB 0x00,0x00,0x00,0x00 +00000c 00000000 DCB 0x00,0x00,0x00,0x00 + + AREA ||area_number.15||, DATA, READONLY, ALIGN=0 + + EXPORTAS ||area_number.15||, ||.constdata|| + phone_data_85_3 +000000 99010001 DCB 0x99,0x01,0x00,0x01 +000004 22050100 DCB 0x22,0x05,0x01,0x00 +000008 0304ffff DCB 0x03,0x04,0xff,0xff +00000c ffffffff DCB 0xff,0xff,0xff,0xff +000010 ffffffff DCB 0xff,0xff,0xff,0xff +000014 ffffffff DCB 0xff,0xff,0xff,0xff +000018 ffffffff DCB 0xff,0xff,0xff,0xff +00001c ffffffff DCB 0xff,0xff,0xff,0xff +000020 ffffff01 DCB 0xff,0xff,0xff,0x01 +000024 ff DCB 0xff + + AREA ||area_number.16||, DATA, READONLY, ALIGN=0 + + EXPORTAS ||area_number.16||, ||.constdata|| + screen_87_data +000000 87 DCB 0x87 + + AREA ||area_number.17||, DATA, READONLY, ALIGN=0 + + EXPORTAS ||area_number.17||, ||.constdata|| + screen_a0_00_ff_data +000000 a000ff DCB 0xa0,0x00,0xff + + AREA ||area_number.18||, DATA, READONLY, ALIGN=0 + + EXPORTAS ||area_number.18||, ||.constdata|| + screen_a4_06_c1_data +000000 a406c1 DCB 0xa4,0x06,0xc1 + + AREA ||area_number.19||, DATA, READONLY, ALIGN=0 + + EXPORTAS ||area_number.19||, ||.constdata|| + screen_reg_int_data_size +000000 03 DCB 0x03 + + AREA ||area_number.20||, DATA, READONLY, ALIGN=0 + + EXPORTAS ||area_number.20||, ||.constdata|| + screen_reg_start_data_size +000000 04 DCB 0x04 + + AREA ||.data||, DATA, ALIGN=1 + + phone_data_E4 +000000 01 DCB 0x01 + tp_flag +000001 00 DCB 0x00 + g_phone_output_int_pad +000002 02 DCB 0x02 + tp_sleep_in +000003 01 DCB 0x01 + tp_sleep_count +000004 00 DCB 0x00 + sleep_double_EN +000005 00 DCB 0x00 + Flag_EA_EN +000006 00 DCB 0x00 + Flag_touch_count +000007 00 DCB 0x00 + touchnum_bak +000008 00 DCB 0x00 + Flag_blacklight_EN +000009 00 DCB 0x00 + app_tp_count +00000a 00 DCB 0x00 + phone_85_flag +00000b 00 DCB 0x00 + phone_F6_flag +00000c 00 DCB 0x00 + phone_E4_flag +00000d 00 DCB 0x00 + phone_72_flag +00000e 00 DCB 0x00 + phone_75_flag +00000f 00 DCB 0x00 + phone_92_flag +000010 00 DCB 0x00 + phone_74_flag +000011 00 DCB 0x00 + phone_data_B1 +000012 0082 DCB 0x00,0x82 + u16CoordY +000014 0000 DCB 0x00,0x00 + u16CoordX +000016 0000 DCB 0x00,0x00 + u16CoordY_back +000018 0000 DCB 0x00,0x00 + u16CoordX_back +00001a 0000 DCB 0x00,0x00 + phone_reg_coord_back +00001c 1d030202 DCB 0x1d,0x03,0x02,0x02 +000020 00020000 DCB 0x00,0x02,0x00,0x00 +000024 00000000 DCB 0x00,0x00,0x00,0x00 +000028 00000000 DCB 0x00,0x00,0x00,0x00 + % 184 + + AREA ||area_number.22||, DATA, ALIGN=0 + + EXPORTAS ||area_number.22||, ||.data|| + s8_host_num +000000 02020406 DCB 0x02,0x02,0x04,0x06 +000004 080a0c0e DCB 0x08,0x0a,0x0c,0x0e +000008 101214 DCB 0x10,0x12,0x14 + + AREA ||area_number.23||, DATA, ALIGN=0 + + EXPORTAS ||area_number.23||, ||.data|| + s8_host_id +000000 00102030 DCB 0x00,0x10,0x20,0x30 +000004 40506070 DCB 0x40,0x50,0x60,0x70 +000008 8090 DCB 0x80,0x90 + + AREA ||area_number.24||, DATA, ALIGN=0 + + EXPORTAS ||area_number.24||, ||.data|| + g_screen_input_rst_pad +000000 08 DCB 0x08 + + AREA ||area_number.25||, DATA, ALIGN=0 + + EXPORTAS ||area_number.25||, ||.data|| + g_screen_input_int_pad +000000 09 DCB 0x09 + + AREA ||area_number.26||, DATA, ALIGN=0 + + EXPORTAS ||area_number.26||, ||.data|| + g_phone_input_rst_pad +000000 15 DCB 0x15 + + AREA ||area_number.27||, DATA, ALIGN=1 + + EXPORTAS ||area_number.27||, ||.data|| + first_touch +000000 0000 DCW 0x0000 + + AREA ||area_number.28||, DATA, ALIGN=1 + + EXPORTAS ||area_number.28||, ||.data|| + first_send +000000 0000 DCW 0x0000 + + AREA ||area_number.29||, DATA, ALIGN=1 + + EXPORTAS ||area_number.29||, ||.data|| + flnger_state_flg +000000 0000 DCW 0x0000 + + AREA ||area_number.30||, DATA, ALIGN=0 + + EXPORTAS ||area_number.30||, ||.data|| + screen_data_write_1 +000000 86 DCB 0x86 + + AREA ||area_number.31||, DATA, ALIGN=0 + + EXPORTAS ||area_number.31||, ||.data|| + screen_data_write_2 +000000 a60000 DCB 0xa6,0x00,0x00 + + AREA ||area_number.32||, DATA, ALIGN=0 + + EXPORTAS ||area_number.32||, ||.data|| + screen_data_write_3 +000000 fa200000 DCB 0xfa,0x20,0x00,0x00 +000004 78 DCB 0x78 + + AREA ||area_number.33||, DATA, ALIGN=0 + + EXPORTAS ||area_number.33||, ||.data|| + screen_data_write_4 +000000 ff00 DCB 0xff,0x00 + + AREA ||area_number.34||, DATA, ALIGN=0 + + EXPORTAS ||area_number.34||, ||.data|| + screen_data_write_5 +000000 1fff DCB 0x1f,0xff + + AREA ||area_number.35||, DATA, ALIGN=0 + + EXPORTAS ||area_number.35||, ||.data|| + screen_data_write_6 +000000 0e24 DCB 0x0e,0x24 + + AREA ||area_number.36||, DATA, ALIGN=0 + + EXPORTAS ||area_number.36||, ||.data|| + screen_data_write_7 +000000 2401 DCB 0x24,0x01 + + AREA ||area_number.37||, DATA, ALIGN=0 + + EXPORTAS ||area_number.37||, ||.data|| + screen_data_write_8 +000000 0d00 DCB 0x0d,0x00 + + AREA ||area_number.38||, DATA, ALIGN=0 + + EXPORTAS ||area_number.38||, ||.data|| + screen_data_write_9 +000000 0e00 DCB 0x0e,0x00 + + AREA ||area_number.39||, DATA, ALIGN=0 + + EXPORTAS ||area_number.39||, ||.data|| + screen_data_write_10 +000000 0e07 DCB 0x0e,0x07 + + AREA ||area_number.40||, DATA, ALIGN=0 + + EXPORTAS ||area_number.40||, ||.data|| + screen_data_write_11 +000000 0d DCB 0x0d + + AREA ||area_number.41||, DATA, ALIGN=0 + + EXPORTAS ||area_number.41||, ||.data|| + screen_data_write_12 +000000 05 DCB 0x05 + + AREA ||area_number.42||, DATA, ALIGN=2 + + EXPORTAS ||area_number.42||, ||.data|| + screen_reg_int_data + DCD screen_data_write_1 + DCD 0x00000001 + DCD 0x00000002 +00000c 01000000 DCB 0x01,0x00,0x00,0x00 + DCD screen_data_write_2 + DCD 0x00000001 + DCD 0x00000002 +00001c 01000000 DCB 0x01,0x00,0x00,0x00 + DCD screen_data_write_3 + DCD 0x00000001 + DCD 0x00000008 +00002c 01000000 DCB 0x01,0x00,0x00,0x00 + + AREA ||area_number.43||, DATA, ALIGN=2 + + EXPORTAS ||area_number.43||, ||.data|| + screen_reg_start_data + DCD screen_data_write_4 + DCD 0x00000002 + DCD 0x00000002 +00000c 00000000 DCB 0x00,0x00,0x00,0x00 + DCD screen_data_write_5 + DCD 0x00000002 + DCD 0x00000002 +00001c 00000000 DCB 0x00,0x00,0x00,0x00 + DCD screen_data_write_6 + DCD 0x00000002 + DCD 0x00000008 +00002c 00000000 DCB 0x00,0x00,0x00,0x00 + DCD screen_data_write_7 + DCD 0x00000002 + DCD 0x00000008 +00003c 00000000 DCB 0x00,0x00,0x00,0x00 + + AREA ||area_number.44||, DATA, ALIGN=0 + + EXPORTAS ||area_number.44||, ||.data|| + phone_reg_point_data +000000 b60023 DCB 0xb6,0x00,0x23 + + AREA ||area_number.45||, DATA, ALIGN=0 + + EXPORTAS ||area_number.45||, ||.data|| + phone_reg_point_back +000000 0502 DCB 0x05,0x02 + + AREA ||area_number.46||, DATA, ALIGN=0 + + EXPORTAS ||area_number.46||, ||.data|| + phone_reg_coord_data +000000 86 DCB 0x86 + + AREA ||area_number.47||, DATA, ALIGN=2 + + EXPORTAS ||area_number.47||, ||.data|| + phone_reg_int_data +000000 03000000 DCB 0x03,0x00,0x00,0x00 + DCD 0x00000002 + DCD phone_reg_point_data + DCD phone_reg_point_back +000010 01000000 DCB 0x01,0x00,0x00,0x00 + DCD 0x00000050 + DCD phone_reg_coord_data + DCD phone_reg_coord_back + + AREA ||area_number.48||, DATA, ALIGN=0 + + EXPORTAS ||area_number.48||, ||.data|| + phone_reg_int_size +000000 02 DCB 0x02 + +;*** Start embedded assembler *** + +#line 1 "..\\..\\src\\app\\demo\\app_tp_for_custom_s8.c" + AREA ||.rev16_text||, CODE + THUMB + EXPORT |__asm___22_app_tp_for_custom_s8_c_0ea31c8a____REV16| +#line 467 "C:\\Users\\ASUS\\AppData\\Local\\Arm\\Packs\\ARM\\CMSIS\\5.5.1\\CMSIS\\Core\\Include\\cmsis_armcc.h" +|__asm___22_app_tp_for_custom_s8_c_0ea31c8a____REV16| PROC +#line 468 + + rev16 r0, r0 + bx lr + ENDP + AREA ||.revsh_text||, CODE + THUMB + EXPORT |__asm___22_app_tp_for_custom_s8_c_0ea31c8a____REVSH| +#line 482 +|__asm___22_app_tp_for_custom_s8_c_0ea31c8a____REVSH| PROC +#line 483 + + revsh r0, r0 + bx lr + ENDP + +;*** End embedded assembler *** diff --git a/project/ISP_568/Listings/app_tp_st_touch.txt b/project/ISP_568/Listings/app_tp_st_touch.txt new file mode 100644 index 0000000..a25be4d --- /dev/null +++ b/project/ISP_568/Listings/app_tp_st_touch.txt @@ -0,0 +1,1173 @@ +; generated by Component: ARM Compiler 5.06 update 6 (build 750) Tool: ArmCC [4d3637] +; commandline ArmCC [--c99 --list --split_sections --debug -c --asm --interleave --gnu -o.\objects\app_tp_st_touch.o --asm_dir=.\Listings\ --list_dir=.\Listings\ --depend=.\objects\app_tp_st_touch.d --cpu=Cortex-M0 --apcs=interwork -O3 --diag_suppress=9931 -I..\..\src -I..\..\src\board -I..\..\src\common -I..\..\src\sdk\include -I..\..\src\app\demo -I..\..\src\sdk\include\M0 -I..\..\src\app -I..\..\src\app\module_demo -I..\..\src\app\touch -I..\..\src\app\S8 -I..\..\src\app\S9 -I..\CVWL568 -I.\RTE\_ISP_568 -IC:\Keil_v5\ARM\PACK\ARM\CMSIS\5.5.1\CMSIS\Core\Include -IC:\Keil_v5\ARM\PACK\ARM\CMSIS\5.5.1\Device\ARM\ARMCM0\Include -D__MICROLIB -D__UVISION_VERSION=528 -D_RTE_ -DARMCM0 -DISP_568 --omf_browse=.\objects\app_tp_st_touch.crf ..\..\src\app\demo\app_tp_st_touch.c] + THUMB + + AREA ||i.CRC16_2||, CODE, READONLY, ALIGN=2 + + CRC16_2 PROC +;;;146 +;;;147 unsigned short CRC16_2(unsigned char *pchMsg, unsigned short wDataLen) +000000 b570 PUSH {r4-r6,lr} +;;;148 { +000002 4604 MOV r4,r0 +;;;149 unsigned short wCRC = 0xFFFF; +000004 480c LDR r0,|L1.56| +;;;150 unsigned short i; +;;;151 unsigned char chChar; +;;;152 +;;;153 for (i = 0; i < wDataLen; i++) +000006 2200 MOVS r2,#0 +;;;154 { +;;;155 chChar = *pchMsg++; +;;;156 wCRC = wCRCTalbeAbs[(chChar ^ wCRC) & 15] ^ (wCRC >> 4); +000008 4e0c LDR r6,|L1.60| +00000a e011 B |L1.48| + |L1.12| +00000c 7825 LDRB r5,[r4,#0] ;155 +;;;157 wCRC = wCRCTalbeAbs[((chChar >> 4) ^ wCRC) & 15] ^ (wCRC >> 4); +00000e 1c52 ADDS r2,r2,#1 +000010 462b MOV r3,r5 ;155 +000012 4043 EORS r3,r3,r0 ;156 +000014 071b LSLS r3,r3,#28 ;156 +000016 0edb LSRS r3,r3,#27 ;156 +000018 5af3 LDRH r3,[r6,r3] ;156 +00001a 0900 LSRS r0,r0,#4 ;156 +00001c 4043 EORS r3,r3,r0 ;156 +00001e 0928 LSRS r0,r5,#4 +000020 4058 EORS r0,r0,r3 +000022 0700 LSLS r0,r0,#28 +000024 0ec0 LSRS r0,r0,#27 +000026 5a30 LDRH r0,[r6,r0] +000028 091b LSRS r3,r3,#4 +00002a 4058 EORS r0,r0,r3 +00002c b292 UXTH r2,r2 ;153 +00002e 1c64 ADDS r4,r4,#1 ;153 + |L1.48| +000030 428a CMP r2,r1 ;153 +000032 d3eb BCC |L1.12| +;;;158 } +;;;159 +;;;160 return wCRC; +;;;161 } +000034 bd70 POP {r4-r6,pc} +;;;162 + ENDP + +000036 0000 DCW 0x0000 + |L1.56| + DCD 0x0000ffff + |L1.60| + DCD ||.constdata|| + + AREA ||i.ap_get_tp_calibration_status_01||, CODE, READONLY, ALIGN=2 + + ap_get_tp_calibration_status_01 PROC +;;;271 +;;;272 bool ap_get_tp_calibration_status_01(hal_dsi_rx_ctrl_handle_t *handler, uint8_t param) +000000 b508 PUSH {r3,lr} +;;;273 { +;;;274 // if( param == 0x5A ) +;;;275 { +;;;276 if(s_calibration_correct_flag) // У׼ɹ +000002 4906 LDR r1,|L2.28| +000004 7849 LDRB r1,[r1,#1] ; s_calibration_correct_flag +000006 2900 CMP r1,#0 +000008 d000 BEQ |L2.12| +;;;277 { +;;;278 hal_dsi_rx_ctrl_send_ack_cmd(handler, +00000a 215a MOVS r1,#0x5a + |L2.12| +;;;279 DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, //xxx +;;;280 DSI_VC_0, +;;;281 1,ST_TP_CALIBRATION_SUCCESS); +;;;282 } +;;;283 else // У׼ʧ +;;;284 { +;;;285 hal_dsi_rx_ctrl_send_ack_cmd(handler, +00000c 9100 STR r1,[sp,#0] +00000e 2301 MOVS r3,#1 +000010 2200 MOVS r2,#0 +000012 2121 MOVS r1,#0x21 +000014 f7fffffe BL hal_dsi_rx_ctrl_send_ack_cmd +;;;286 DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, //xxx +;;;287 DSI_VC_0, +;;;288 1,0x00); +;;;289 } +;;;290 } +;;;291 +;;;292 return true; +000018 2001 MOVS r0,#1 +;;;293 } +00001a bd08 POP {r3,pc} +;;;294 + ENDP + + |L2.28| + DCD ||.data|| + + AREA ||i.ap_set_tp_calibration_04||, CODE, READONLY, ALIGN=2 + + REQUIRE _printf_pre_padding + REQUIRE _printf_percent + REQUIRE _printf_flags + REQUIRE _printf_widthprec + REQUIRE _printf_x + REQUIRE _printf_longlong_hex + ap_set_tp_calibration_04 PROC +;;;170 +;;;171 bool ap_set_tp_calibration_04(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +000000 b570 PUSH {r4-r6,lr} +;;;172 { +000002 b088 SUB sp,sp,#0x20 +000004 460d MOV r5,r1 +;;;173 uint8_t i,crch,crcl,command,param[30] = {0}; +000006 2120 MOVS r1,#0x20 +000008 4668 MOV r0,sp +00000a f7fffffe BL __aeabi_memclr4 +;;;174 unsigned short crc; +;;;175 +;;;176 // CRCֵ +;;;177 for(i=0;iparam_length;i++) +00000e 2400 MOVS r4,#0 +000010 466e MOV r6,sp ;173 +000012 e00a B |L3.42| + |L3.20| +;;;178 { +;;;179 param[i+1] = dcs_packet->packet_param[i]; +000014 68e8 LDR r0,[r5,#0xc] +000016 1931 ADDS r1,r6,r4 +000018 5d00 LDRB r0,[r0,r4] +00001a 7048 STRB r0,[r1,#1] +;;;180 printf("%02x ",dcs_packet->packet_param[i]); +00001c 68e8 LDR r0,[r5,#0xc] +00001e 5d01 LDRB r1,[r0,r4] +000020 a01a ADR r0,|L3.140| +000022 f7fffffe BL __2printf +000026 1c64 ADDS r4,r4,#1 +000028 b2e4 UXTB r4,r4 ;177 + |L3.42| +00002a 68a8 LDR r0,[r5,#8] ;177 +00002c 42a0 CMP r0,r4 ;177 +00002e d8f1 BHI |L3.20| +;;;181 } +;;;182 +;;;183 param[0] = 0x04; +000030 2104 MOVS r1,#4 +000032 4668 MOV r0,sp +000034 7001 STRB r1,[r0,#0] +;;;184 crc = CRC16_2(param,dcs_packet->param_length-1); +000036 8928 LDRH r0,[r5,#8] +000038 1e40 SUBS r0,r0,#1 +00003a b281 UXTH r1,r0 +00003c 4668 MOV r0,sp +00003e f7fffffe BL CRC16_2 +;;;185 crch = (crc>>8); +;;;186 crcl = crc; +;;;187 +;;;188 // CRCУж +;;;189 // if(crch == dcs_packet->packet_param[dcs_packet->param_length-2] && crcl == dcs_packet->packet_param[dcs_packet->param_length-1]) +;;;190 { +;;;191 command = param[3]; +000042 4668 MOV r0,sp +000044 78c0 LDRB r0,[r0,#3] +000046 2200 MOVS r2,#0 +;;;192 switch(command) +;;;193 { +;;;194 case CMD_TP_CABLIBRATION: // TouchУ׼ +;;;195 if( (param[4] == 0x01) && (param[5] == 0x01) && (param[6] == 0x01) ) +000048 2301 MOVS r3,#1 +;;;196 { +;;;197 s_calibration_flag = true; +00004a 4912 LDR r1,|L3.148| +00004c 282a CMP r0,#0x2a +00004e d10d BNE |L3.108| +000050 4668 MOV r0,sp ;195 +000052 7900 LDRB r0,[r0,#4] ;195 +000054 2801 CMP r0,#1 ;195 +000056 d109 BNE |L3.108| +000058 4668 MOV r0,sp ;195 +00005a 7940 LDRB r0,[r0,#5] ;195 +00005c 2801 CMP r0,#1 ;195 +00005e d105 BNE |L3.108| +000060 4668 MOV r0,sp ;195 +000062 7980 LDRB r0,[r0,#6] ;195 +000064 2801 CMP r0,#1 ;195 +000066 d101 BNE |L3.108| +000068 700b STRB r3,[r1,#0] +;;;198 s_calibration_correct_flag = false; +00006a 704a STRB r2,[r1,#1] + |L3.108| +;;;199 +;;;200 } +;;;201 /* if( (param[4] == 0xA5) && (param[5] == 0x5A) && (param[6] == 0xA5) ) +;;;202 { +;;;203 if(s_calibration_correct_flag) // У׼ɹ +;;;204 { +;;;205 hal_dsi_rx_ctrl_send_ack_cmd(handler, +;;;206 DSI_ACK_DT_GEN_LONG_RESPONSE, //xxx +;;;207 DSI_VC_0, +;;;208 0x7, 0x04,0x02,0x07,0x2A,ST_TP_CALIBRATION_SUCCESS,0x00,0x00); +;;;209 printf("cali. send ok "); +;;;210 } +;;;211 else // У׼ʧ +;;;212 { +;;;213 hal_dsi_rx_ctrl_send_ack_cmd(handler, +;;;214 DSI_ACK_DT_GEN_LONG_RESPONSE, //xxx +;;;215 DSI_VC_0, +;;;216 0x7, 0x04,0x02,0x07,0x2A,0x00,0x00,0x00); +;;;217 } +;;;218 printf("%02x ",s_calibration_correct_flag); +;;;219 } +;;;220 */ +;;;221 break; +;;;222 case CMD_SET_IMAGE_RGB: // Image RGB +;;;223 break; +;;;224 case CMD_SEND_COMMAND: // Command Send +;;;225 break; +;;;226 case CMD_WRITE_GAMMA: // GammaУд +;;;227 break; +;;;228 case CMD_START_GAMMA: +;;;229 break; +;;;230 default: +;;;231 break; +;;;232 } +;;;233 } +;;;234 +;;;235 // ݾɰ汾tp calibration +;;;236 if( (dcs_packet->packet_param[0] == 0x01) && (dcs_packet->packet_param[1] == 0x01) && (dcs_packet->packet_param[2] == 0x01) ) +00006c 68e8 LDR r0,[r5,#0xc] +00006e 7804 LDRB r4,[r0,#0] +000070 2c01 CMP r4,#1 +000072 d107 BNE |L3.132| +000074 7844 LDRB r4,[r0,#1] +000076 2c01 CMP r4,#1 +000078 d104 BNE |L3.132| +00007a 7880 LDRB r0,[r0,#2] +00007c 2801 CMP r0,#1 +00007e d101 BNE |L3.132| +;;;237 { +;;;238 s_calibration_flag = true; +000080 700b STRB r3,[r1,#0] +;;;239 s_calibration_correct_flag = false; +000082 704a STRB r2,[r1,#1] + |L3.132| +;;;240 } +;;;241 /* +;;;242 if( (dcs_packet->packet_param[0] == 0xA5) && (dcs_packet->packet_param[1] == 0x5A) && (dcs_packet->packet_param[2] == 0xA5) ) +;;;243 { +;;;244 if(s_calibration_correct_flag) // У׼ɹ +;;;245 { +;;;246 hal_dsi_rx_ctrl_send_ack_cmd(handler, +;;;247 DSI_ACK_DT_GEN_LONG_RESPONSE, //xxx +;;;248 DSI_VC_0, +;;;249 0x7, 0x04,0x02,0x07,0x2A,ST_TP_CALIBRATION_SUCCESS,0x00,0x00); +;;;250 } +;;;251 else // У׼ʧ +;;;252 { +;;;253 hal_dsi_rx_ctrl_send_ack_cmd(handler, +;;;254 DSI_ACK_DT_GEN_LONG_RESPONSE, //xxx +;;;255 DSI_VC_0, +;;;256 0x7, 0x04,0x02,0x07,0x2A,0x00,0x00,0x00); +;;;257 } +;;;258 } +;;;259 */ +;;;260 return true; +000084 2001 MOVS r0,#1 +;;;261 } +000086 b008 ADD sp,sp,#0x20 +000088 bd70 POP {r4-r6,pc} +;;;262 + ENDP + +00008a 0000 DCW 0x0000 + |L3.140| +00008c 25303278 DCB "%02x ",0 +000090 2000 +000092 00 DCB 0 +000093 00 DCB 0 + |L3.148| + DCD ||.data|| + + AREA ||i.ap_tp_st_touch_calibration||, CODE, READONLY, ALIGN=2 + + ap_tp_st_touch_calibration PROC +;;;104 +;;;105 void ap_tp_st_touch_calibration(void) +000000 b510 PUSH {r4,lr} +;;;106 { +;;;107 // app_tp_m_write(st_touch_tp_tuning_reset, sizeof(st_touch_tp_tuning_reset)); // System Reset +;;;108 // while(!hal_i2c_m_transfer_complate()); +;;;109 // delayMs(10); +;;;110 app_tp_m_write(st_touch_tp_tuning_FpnlInit, sizeof(st_touch_tp_tuning_FpnlInit)); // FPnl Init +000002 2103 MOVS r1,#3 +000004 4829 LDR r0,|L4.172| +000006 f7fffffe BL app_tp_m_write + |L4.10| +;;;111 while(!hal_i2c_m_transfer_complate()); +00000a f7fffffe BL hal_i2c_m_transfer_complate +00000e 2800 CMP r0,#0 +000010 d0fb BEQ |L4.10| +;;;112 delayMs(1); +000012 2001 MOVS r0,#1 +000014 f7fffffe BL delayMs +;;;113 app_tp_m_write(st_touch_tp_tuning_PnlInit, sizeof(st_touch_tp_tuning_PnlInit)); // Pnl Init +000018 4824 LDR r0,|L4.172| +00001a 2103 MOVS r1,#3 +00001c 1cc0 ADDS r0,r0,#3 +00001e f7fffffe BL app_tp_m_write + |L4.34| +;;;114 while(!hal_i2c_m_transfer_complate()); +000022 f7fffffe BL hal_i2c_m_transfer_complate +000026 2800 CMP r0,#0 +000028 d0fb BEQ |L4.34| +;;;115 delayMs(1); +00002a 2001 MOVS r0,#1 +00002c f7fffffe BL delayMs +;;;116 app_tp_m_write(st_touch_tp_tuning_TuneM, sizeof(st_touch_tp_tuning_TuneM)); // TuneM +000030 481e LDR r0,|L4.172| +000032 2104 MOVS r1,#4 +000034 3015 ADDS r0,r0,#0x15 +000036 f7fffffe BL app_tp_m_write + |L4.58| +;;;117 while(!hal_i2c_m_transfer_complate()); +00003a f7fffffe BL hal_i2c_m_transfer_complate +00003e 2800 CMP r0,#0 +000040 d0fb BEQ |L4.58| +;;;118 delayMs(1); +000042 2001 MOVS r0,#1 +000044 f7fffffe BL delayMs +;;;119 app_tp_m_write(st_touch_tp_tuning_TuneS, sizeof(st_touch_tp_tuning_TuneS)); // TuneS +000048 4818 LDR r0,|L4.172| +00004a 2104 MOVS r1,#4 +00004c 3019 ADDS r0,r0,#0x19 +00004e f7fffffe BL app_tp_m_write + |L4.82| +;;;120 while(!hal_i2c_m_transfer_complate()); +000052 f7fffffe BL hal_i2c_m_transfer_complate +000056 2800 CMP r0,#0 +000058 d0fb BEQ |L4.82| +;;;121 delayMs(1); +00005a 2001 MOVS r0,#1 +00005c f7fffffe BL delayMs +;;;122 app_tp_m_write(st_touch_tp_tuning_SvCfg, sizeof(st_touch_tp_tuning_SvCfg)); // SvCfg +000060 4812 LDR r0,|L4.172| +000062 2103 MOVS r1,#3 +000064 1d80 ADDS r0,r0,#6 +000066 f7fffffe BL app_tp_m_write + |L4.106| +;;;123 while(!hal_i2c_m_transfer_complate()); +00006a f7fffffe BL hal_i2c_m_transfer_complate +00006e 2800 CMP r0,#0 +000070 d0fb BEQ |L4.106| +;;;124 delayMs(1); +000072 2001 MOVS r0,#1 +000074 f7fffffe BL delayMs +;;;125 app_tp_m_write(st_touch_tp_tuning_SvCx, sizeof(st_touch_tp_tuning_SvCx)); // SvCx +000078 480c LDR r0,|L4.172| +00007a 2103 MOVS r1,#3 +00007c 3009 ADDS r0,r0,#9 +00007e f7fffffe BL app_tp_m_write + |L4.130| +;;;126 while(!hal_i2c_m_transfer_complate()); +000082 f7fffffe BL hal_i2c_m_transfer_complate +000086 2800 CMP r0,#0 +000088 d0fb BEQ |L4.130| +;;;127 delayMs(1); +00008a 2001 MOVS r0,#1 +00008c f7fffffe BL delayMs +;;;128 app_tp_m_write(st_touch_tp_tuning_SvPnl, sizeof(st_touch_tp_tuning_SvPnl)); // SvPnl +000090 4806 LDR r0,|L4.172| +000092 2103 MOVS r1,#3 +000094 300c ADDS r0,r0,#0xc +000096 f7fffffe BL app_tp_m_write + |L4.154| +;;;129 while(!hal_i2c_m_transfer_complate()); +00009a f7fffffe BL hal_i2c_m_transfer_complate +00009e 2800 CMP r0,#0 +0000a0 d0fb BEQ |L4.154| +;;;130 delayMs(1); +0000a2 2001 MOVS r0,#1 +0000a4 f7fffffe BL delayMs +;;;131 } +0000a8 bd10 POP {r4,pc} +;;;132 + ENDP + +0000aa 0000 DCW 0x0000 + |L4.172| + DCD ||.data||+0xb + + AREA ||i.ap_tp_st_touch_error_handler_F3||, CODE, READONLY, ALIGN=1 + + ap_tp_st_touch_error_handler_F3 PROC +;;;540 +;;;541 void ap_tp_st_touch_error_handler_F3(uint8_t* screendata) +000000 b510 PUSH {r4,lr} +;;;542 { +;;;543 // յ TP 쳣ظ 0xF3 0x02 0x00 0x00 0x00 0x00 0x00 0x00 +;;;544 // if(screendata[0] == 0xF3 && screendata[1] == 0x02 && screendata[2] == 0x00) +;;;545 if(screendata[0] == 0xF3) +000002 7800 LDRB r0,[r0,#0] +000004 28f3 CMP r0,#0xf3 +000006 d101 BNE |L5.12| +;;;546 { +;;;547 // ap_tp_st_touch_software_reset(); +;;;548 ap_tp_st_touch_hardware_reset(); +000008 f7fffffe BL ap_tp_st_touch_hardware_reset + |L5.12| +;;;549 } +;;;550 } +00000c bd10 POP {r4,pc} +;;;551 + ENDP + + + AREA ||i.ap_tp_st_touch_error_handler_FF||, CODE, READONLY, ALIGN=1 + + ap_tp_st_touch_error_handler_FF PROC +;;;559 +;;;560 void ap_tp_st_touch_error_handler_FF(uint8_t* screendata) +000000 b510 PUSH {r4,lr} +;;;561 { +;;;562 // յ TP 쳣ظ 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF +;;;563 if(screendata[1] == 0xFF && screendata[2] == 0xFF&& screendata[3] == 0xFF&&screendata[4] == 0xFF) +000002 7841 LDRB r1,[r0,#1] +000004 29ff CMP r1,#0xff +000006 d10a BNE |L6.30| +000008 7881 LDRB r1,[r0,#2] +00000a 29ff CMP r1,#0xff +00000c d107 BNE |L6.30| +00000e 78c1 LDRB r1,[r0,#3] +000010 29ff CMP r1,#0xff +000012 d104 BNE |L6.30| +000014 7900 LDRB r0,[r0,#4] +000016 28ff CMP r0,#0xff +000018 d101 BNE |L6.30| +;;;564 { +;;;565 // ap_tp_st_touch_software_reset(); +;;;566 ap_tp_st_touch_hardware_reset(); +00001a f7fffffe BL ap_tp_st_touch_hardware_reset + |L6.30| +;;;567 } +;;;568 } +00001e bd10 POP {r4,pc} +;;;569 + ENDP + + + AREA ||i.ap_tp_st_touch_get_calibration_success_mark||, CODE, READONLY, ALIGN=2 + + ap_tp_st_touch_get_calibration_success_mark PROC +;;;58 +;;;59 void ap_tp_st_touch_get_calibration_success_mark(void) +000000 b500 PUSH {lr} +;;;60 { +;;;61 uint8_t cali_send_buff[6] = {0xFA,0x20,0x01,0x00,0x00,0x00}; +000002 a125 ADR r1,|L7.152| +000004 c903 LDM r1,{r0,r1} +000006 b08d SUB sp,sp,#0x34 ;60 +;;;62 uint8_t cali_send_buff1[3] = {0xA4,0x06,0x01}; +000008 910b STR r1,[sp,#0x2c] +00000a 900a STR r0,[sp,#0x28] +00000c a024 ADR r0,|L7.160| +00000e 6800 LDR r0,[r0,#0] +;;;63 uint8_t cali_read_buff[40] = {0}; +000010 900c STR r0,[sp,#0x30] +000012 2128 MOVS r1,#0x28 +000014 4668 MOV r0,sp +000016 f7fffffe BL __aeabi_memclr4 +;;;64 uint8_t i = 0; +;;;65 +;;;66 app_tp_m_read(cali_send_buff, 5, cali_read_buff, 4); +00001a 2304 MOVS r3,#4 +00001c 466a MOV r2,sp +00001e 2105 MOVS r1,#5 +000020 a80a ADD r0,sp,#0x28 +000022 f7fffffe BL app_tp_m_read + |L7.38| +;;;67 while(!hal_i2c_m_transfer_complate()); +000026 f7fffffe BL hal_i2c_m_transfer_complate +00002a 2800 CMP r0,#0 +00002c d0fb BEQ |L7.38| +;;;68 delayMs(1); +00002e 2001 MOVS r0,#1 +000030 f7fffffe BL delayMs +;;;69 +;;;70 app_tp_m_write(cali_send_buff1, 3); +000034 2103 MOVS r1,#3 +000036 a80c ADD r0,sp,#0x30 +000038 f7fffffe BL app_tp_m_write + |L7.60| +;;;71 while(!hal_i2c_m_transfer_complate()); +00003c f7fffffe BL hal_i2c_m_transfer_complate +000040 2800 CMP r0,#0 +000042 d0fb BEQ |L7.60| +;;;72 delayMs(1); +000044 2001 MOVS r0,#1 +000046 f7fffffe BL delayMs +;;;73 +;;;74 app_tp_m_read(cali_send_buff, 5, cali_read_buff, 4); +00004a 2304 MOVS r3,#4 +00004c 466a MOV r2,sp +00004e 2105 MOVS r1,#5 +000050 a80a ADD r0,sp,#0x28 +000052 f7fffffe BL app_tp_m_read + |L7.86| +;;;75 while(!hal_i2c_m_transfer_complate()); +000056 f7fffffe BL hal_i2c_m_transfer_complate +00005a 2800 CMP r0,#0 +00005c d0fb BEQ |L7.86| +;;;76 delayMs(1); +00005e 2001 MOVS r0,#1 +000060 f7fffffe BL delayMs +;;;77 +;;;78 app_tp_m_read(cali_send_buff, 5, cali_read_buff, 32); +000064 2320 MOVS r3,#0x20 +000066 466a MOV r2,sp +000068 2105 MOVS r1,#5 +00006a a80a ADD r0,sp,#0x28 +00006c f7fffffe BL app_tp_m_read + |L7.112| +;;;79 while(!hal_i2c_m_transfer_complate()); +000070 f7fffffe BL hal_i2c_m_transfer_complate +000074 2800 CMP r0,#0 +000076 d0fb BEQ |L7.112| +;;;80 +;;;81 if((cali_read_buff[20] == 0xFF) && (cali_read_buff[21] == 0xFF)) +000078 4668 MOV r0,sp +00007a 7d01 LDRB r1,[r0,#0x14] +;;;82 { +;;;83 s_calibration_correct_flag = ST_TP_CALIBRATION_SUCCESS; // У׼ɹ +00007c 4809 LDR r0,|L7.164| +00007e 29ff CMP r1,#0xff ;81 +000080 d103 BNE |L7.138| +000082 4669 MOV r1,sp ;81 +000084 7d49 LDRB r1,[r1,#0x15] ;81 +000086 29ff CMP r1,#0xff ;81 +000088 d003 BEQ |L7.146| + |L7.138| +;;;84 } +;;;85 else +;;;86 { +;;;87 s_calibration_correct_flag = 0x00; // У׼ʧ +00008a 2100 MOVS r1,#0 + |L7.140| +00008c 7041 STRB r1,[r0,#1] ;83 +;;;88 } +;;;89 /* +;;;90 for(i=0;i<32;i++) +;;;91 { +;;;92 printf("%02x ",cali_read_buff[i]); +;;;93 } +;;;94 */ +;;;95 } +00008e b00d ADD sp,sp,#0x34 +000090 bd00 POP {pc} + |L7.146| +000092 215a MOVS r1,#0x5a ;83 +000094 e7fa B |L7.140| +;;;96 + ENDP + +000096 0000 DCW 0x0000 + |L7.152| +000098 fa200100 DCB 250," ",1,0 +00009c 00 DCB 0 +00009d 00 DCB 0 +00009e 00 DCB 0 +00009f 00 DCB 0 + |L7.160| +0000a0 a4060100 DCB 164,6,1,0 + |L7.164| + DCD ||.data|| + + AREA ||i.ap_tp_st_touch_hardware_reset||, CODE, READONLY, ALIGN=2 + + ap_tp_st_touch_hardware_reset PROC +;;;412 **************************************************************************/ +;;;413 void ap_tp_st_touch_hardware_reset(void) +000000 b510 PUSH {r4,lr} +;;;414 { +;;;415 TAU_LOGD("st_tp_HW_rst \n"); +;;;416 ap_tp_st_touch_simulate_finger_release_event(); +000002 f7fffffe BL ap_tp_st_touch_simulate_finger_release_event +;;;417 ap_tp_st_touch_scan_point_init(); +000006 f7fffffe BL ap_tp_st_touch_scan_point_init +;;;418 hal_gpio_set_output_data(g_screen_input_rst_pad, IO_LVL_HIGH); +00000a 4c1d LDR r4,|L8.128| +00000c 2101 MOVS r1,#1 +00000e 7820 LDRB r0,[r4,#0] ; g_screen_input_rst_pad +000010 f7fffffe BL hal_gpio_set_output_data +;;;419 delayMs(2); +000014 2002 MOVS r0,#2 +000016 f7fffffe BL delayMs +;;;420 hal_gpio_set_output_data(g_screen_input_rst_pad, IO_LVL_LOW); +00001a 2100 MOVS r1,#0 +00001c 7820 LDRB r0,[r4,#0] ; g_screen_input_rst_pad +00001e f7fffffe BL hal_gpio_set_output_data +;;;421 delayMs(2); +000022 2002 MOVS r0,#2 +000024 f7fffffe BL delayMs +;;;422 hal_gpio_set_output_data(g_screen_input_rst_pad, IO_LVL_HIGH); +000028 2101 MOVS r1,#1 +00002a 7820 LDRB r0,[r4,#0] ; g_screen_input_rst_pad +00002c f7fffffe BL hal_gpio_set_output_data +;;;423 delayMs(2); +000030 2002 MOVS r0,#2 +000032 f7fffffe BL delayMs +;;;424 +;;;425 app_tp_m_write(st_touch_tp_tuning_clearfifo, sizeof(st_touch_tp_tuning_clearfifo));//0xA4,0x00,0x01} +000036 2103 MOVS r1,#3 +000038 4812 LDR r0,|L8.132| +00003a f7fffffe BL app_tp_m_write + |L8.62| +;;;426 while(!hal_i2c_m_transfer_complate()); +00003e f7fffffe BL hal_i2c_m_transfer_complate +000042 2800 CMP r0,#0 +000044 d0fb BEQ |L8.62| +;;;427 delayMs(5); +000046 2005 MOVS r0,#5 +000048 f7fffffe BL delayMs +;;;428 app_tp_m_write(st_touch_init_sensor_off, sizeof(st_touch_init_sensor_off));//0xA0,0x00,0x00 +00004c 480d LDR r0,|L8.132| +00004e 2103 MOVS r1,#3 +000050 3818 SUBS r0,r0,#0x18 +000052 f7fffffe BL app_tp_m_write + |L8.86| +;;;429 while(!hal_i2c_m_transfer_complate()); +000056 f7fffffe BL hal_i2c_m_transfer_complate +00005a 2800 CMP r0,#0 +00005c d0fb BEQ |L8.86| +;;;430 delayMs(5); +00005e 2005 MOVS r0,#5 +000060 f7fffffe BL delayMs +;;;431 app_tp_m_write(st_touch_init_sensor_on, sizeof(st_touch_init_sensor_on));//0xA0,0x00,0x01 +000064 4807 LDR r0,|L8.132| +000066 2103 MOVS r1,#3 +000068 3815 SUBS r0,r0,#0x15 +00006a f7fffffe BL app_tp_m_write + |L8.110| +;;;432 while(!hal_i2c_m_transfer_complate()); +00006e f7fffffe BL hal_i2c_m_transfer_complate +000072 2800 CMP r0,#0 +000074 d0fb BEQ |L8.110| +;;;433 delayMs(5); +000076 2005 MOVS r0,#5 +000078 f7fffffe BL delayMs +;;;434 } +00007c bd10 POP {r4,pc} +;;;435 + ENDP + +00007e 0000 DCW 0x0000 + |L8.128| + DCD g_screen_input_rst_pad + |L8.132| + DCD ||.data||+0x1a + + AREA ||i.ap_tp_st_touch_scan_point_init||, CODE, READONLY, ALIGN=2 + + ap_tp_st_touch_scan_point_init PROC +;;;337 +;;;338 void ap_tp_st_touch_scan_point_init(void) +000000 2000 MOVS r0,#0 +;;;339 { +;;;340 uint8_t i=0; +;;;341 +;;;342 for(i=0;i>4)+1; +;;;452 i+=7; +;;;453 +;;;454 if(eventdata == 0x13) // ¼ +;;;455 { +;;;456 for(j=0;j0)) // ͷ¼ +00001c 2e33 CMP r6,#0x33 +00001e d020 BEQ |L10.98| +;;;481 { +;;;482 for(j=0;j0) // в +;;;523 { +;;;524 // printf("release finger %2d\n",tp_scan_data.tp_read_point_counter); +;;;525 tp_scan_data.tp_read_point_counter = 0; +;;;526 ap_tp_st_touch_simulate_finger_release_event(); +;;;527 } +;;;528 ap_tp_st_touch_scan_point_init(); +;;;529 } +;;;530 } +;;;531 } +000016 bd10 POP {r4,pc} + |L11.24| +000018 7981 LDRB r1,[r0,#6] ;522 ; tp_scan_data +00001a 2900 CMP r1,#0 ;522 +00001c d003 BEQ |L11.38| +00001e 2100 MOVS r1,#0 ;525 +000020 7181 STRB r1,[r0,#6] ;525 +000022 f7fffffe BL ap_tp_st_touch_simulate_finger_release_event + |L11.38| +000026 f7fffffe BL ap_tp_st_touch_scan_point_init +00002a bd10 POP {r4,pc} +;;;532 + ENDP + + |L11.44| + DCD ||.bss|| + |L11.48| + DCD 0x00001999 + + AREA ||i.ap_tp_st_touch_simulate_finger_release_event||, CODE, READONLY, ALIGN=2 + + ap_tp_st_touch_simulate_finger_release_event PROC +;;;357 +;;;358 void ap_tp_st_touch_simulate_finger_release_event(void) +000000 b51c PUSH {r2-r4,lr} +;;;359 { +;;;360 uint8_t i,temp=0,ap_tp_release_buf[8] = {0x33,0x01,0x00,0x00,0x00,0x00,0x00,0x00}; +000002 a10a ADR r1,|L12.44| +000004 c903 LDM r1,{r0,r1} +;;;361 +;;;362 for(i=0;i<5;i++) +000006 2400 MOVS r4,#0 +000008 9101 STR r1,[sp,#4] +00000a 9000 STR r0,[sp,#0] + |L12.12| +00000c 0120 LSLS r0,r4,#4 +;;;363 { +;;;364 temp = i; +;;;365 ap_tp_release_buf[1] = (temp<<4)|0x01; +00000e 4669 MOV r1,sp +000010 1c40 ADDS r0,r0,#1 +000012 7048 STRB r0,[r1,#1] +;;;366 +;;;367 app_tp_screen_analysis_int(0, ap_tp_release_buf,8); +000014 2208 MOVS r2,#8 +000016 2000 MOVS r0,#0 +000018 f7fffffe BL app_tp_screen_analysis_int +;;;368 +;;;369 delayMs(6); +00001c 2006 MOVS r0,#6 +00001e f7fffffe BL delayMs +000022 1c64 ADDS r4,r4,#1 +000024 b2e4 UXTB r4,r4 ;362 +000026 2c05 CMP r4,#5 ;362 +000028 d3f0 BCC |L12.12| +;;;370 } +;;;371 } +00002a bd1c POP {r2-r4,pc} +;;;372 + ENDP + + |L12.44| +00002c 330100 DCB "3",1,0 +00002f 00 DCB 0 +000030 00 DCB 0 +000031 00 DCB 0 +000032 00 DCB 0 +000033 00 DCB 0 + + AREA ||i.ap_tp_st_touch_software_reset||, CODE, READONLY, ALIGN=2 + + ap_tp_st_touch_software_reset PROC +;;;380 +;;;381 void ap_tp_st_touch_software_reset(void) +000000 b510 PUSH {r4,lr} +;;;382 { +;;;383 TAU_LOGD("st_tp_sw_rst \n"); +;;;384 ap_tp_st_touch_simulate_finger_release_event(); +000002 f7fffffe BL ap_tp_st_touch_simulate_finger_release_event +;;;385 ap_tp_st_touch_scan_point_init(); +000006 f7fffffe BL ap_tp_st_touch_scan_point_init +;;;386 +;;;387 app_tp_m_write(st_touch_tp_tuning_clkreset, sizeof(st_touch_tp_tuning_clkreset)); // clk reset +00000a 2103 MOVS r1,#3 +00000c 4817 LDR r0,|L13.108| +00000e f7fffffe BL app_tp_m_write + |L13.18| +;;;388 while(!hal_i2c_m_transfer_complate()); +000012 f7fffffe BL hal_i2c_m_transfer_complate +000016 2800 CMP r0,#0 +000018 d0fb BEQ |L13.18| +;;;389 delayMs(5); +00001a 2005 MOVS r0,#5 +00001c f7fffffe BL delayMs +;;;390 +;;;391 app_tp_m_write(st_touch_tp_tuning_reset, sizeof(st_touch_tp_tuning_reset)); // System Reset A4 00 00 +000020 4812 LDR r0,|L13.108| +000022 2103 MOVS r1,#3 +000024 3815 SUBS r0,r0,#0x15 +000026 f7fffffe BL app_tp_m_write + |L13.42| +;;;392 while(!hal_i2c_m_transfer_complate()); +00002a f7fffffe BL hal_i2c_m_transfer_complate +00002e 2800 CMP r0,#0 +000030 d0fb BEQ |L13.42| +;;;393 delayMs(5); +000032 2005 MOVS r0,#5 +000034 f7fffffe BL delayMs +;;;394 +;;;395 app_tp_m_write(st_touch_tp_tuning_clearfifo, sizeof(st_touch_tp_tuning_clearfifo));//0xA4,0x00,0x01 +000038 480c LDR r0,|L13.108| +00003a 2103 MOVS r1,#3 +00003c 1ec0 SUBS r0,r0,#3 +00003e f7fffffe BL app_tp_m_write + |L13.66| +;;;396 while(!hal_i2c_m_transfer_complate()); +000042 f7fffffe BL hal_i2c_m_transfer_complate +000046 2800 CMP r0,#0 +000048 d0fb BEQ |L13.66| +;;;397 delayMs(5); +00004a 2005 MOVS r0,#5 +00004c f7fffffe BL delayMs +;;;398 +;;;399 app_tp_m_write(st_touch_init_sensor_on, sizeof(st_touch_init_sensor_on));//0xA0,0x00,0x01 +000050 4806 LDR r0,|L13.108| +000052 2103 MOVS r1,#3 +000054 3818 SUBS r0,r0,#0x18 +000056 f7fffffe BL app_tp_m_write + |L13.90| +;;;400 while(!hal_i2c_m_transfer_complate()); +00005a f7fffffe BL hal_i2c_m_transfer_complate +00005e 2800 CMP r0,#0 +000060 d0fb BEQ |L13.90| +;;;401 delayMs(5); +000062 2005 MOVS r0,#5 +000064 f7fffffe BL delayMs +;;;402 +;;;403 } +000068 bd10 POP {r4,pc} +;;;404 + ENDP + +00006a 0000 DCW 0x0000 + |L13.108| + DCD ||.data||+0x1d + + AREA ||i.app_tp_calibration_exec||, CODE, READONLY, ALIGN=2 + + app_tp_calibration_exec PROC +;;;302 +;;;303 void app_tp_calibration_exec(void) +000000 b570 PUSH {r4-r6,lr} +;;;304 { +;;;305 uint8_t i = 0; +;;;306 +;;;307 if(s_calibration_flag) +000002 4d0c LDR r5,|L14.52| +000004 2400 MOVS r4,#0 ;305 +000006 7828 LDRB r0,[r5,#0] ; s_calibration_flag +000008 2800 CMP r0,#0 +00000a d011 BEQ |L14.48| +;;;308 { +;;;309 s_calibration_flag = false; +00000c 2000 MOVS r0,#0 +00000e 7028 STRB r0,[r5,#0] +;;;310 for(i=0;i<2;i++) +;;;311 { +;;;312 ap_tp_st_touch_calibration(); +;;;313 delayMs(4000); +000010 267d MOVS r6,#0x7d +000012 0176 LSLS r6,r6,#5 + |L14.20| +000014 f7fffffe BL ap_tp_st_touch_calibration +000018 4630 MOV r0,r6 +00001a f7fffffe BL delayMs +;;;314 ap_tp_st_touch_get_calibration_success_mark(); +00001e f7fffffe BL ap_tp_st_touch_get_calibration_success_mark +;;;315 if(s_calibration_correct_flag == ST_TP_CALIBRATION_SUCCESS) +000022 7868 LDRB r0,[r5,#1] ; s_calibration_correct_flag +000024 285a CMP r0,#0x5a +000026 d003 BEQ |L14.48| +000028 1c64 ADDS r4,r4,#1 +00002a b2e4 UXTB r4,r4 ;310 +00002c 2c02 CMP r4,#2 ;310 +00002e d3f1 BCC |L14.20| + |L14.48| +;;;316 { +;;;317 TAU_LOGD("cali ok \n"); +;;;318 break; +;;;319 } +;;;320 else +;;;321 { +;;;322 TAU_LOGD("cali ng \n"); +;;;323 } +;;;324 } +;;;325 +;;;326 } +;;;327 } +000030 bd70 POP {r4-r6,pc} +;;;328 + ENDP + +000032 0000 DCW 0x0000 + |L14.52| + DCD ||.data|| + + AREA ||.bss||, DATA, NOINIT, ALIGN=2 + + tp_scan_data + % 12 + + AREA ||.constdata||, DATA, READONLY, ALIGN=1 + + wCRCTalbeAbs +000000 0000cc01 DCW 0x0000,0xcc01 +000004 d8011400 DCW 0xd801,0x1400 +000008 f0013c00 DCW 0xf001,0x3c00 +00000c 2800e401 DCW 0x2800,0xe401 +000010 a0016c00 DCW 0xa001,0x6c00 +000014 7800b401 DCW 0x7800,0xb401 +000018 50009c01 DCW 0x5000,0x9c01 +00001c 88014400 DCW 0x8801,0x4400 + + AREA ||.data||, DATA, ALIGN=0 + + s_calibration_flag +000000 00 DCB 0x00 + s_calibration_correct_flag +000001 00 DCB 0x00 + st_touch_init_sensor_off +000002 a000 DCB 0xa0,0x00 +000004 00 DCB 0x00 + st_touch_init_sensor_on +000005 a00001 DCB 0xa0,0x00,0x01 + st_touch_tp_tuning_reset +000008 a40000 DCB 0xa4,0x00,0x00 + st_touch_tp_tuning_FpnlInit +00000b a4 DCB 0xa4 +00000c 0003 DCB 0x00,0x03 + st_touch_tp_tuning_PnlInit +00000e a400 DCB 0xa4,0x00 +000010 02 DCB 0x02 + st_touch_tp_tuning_SvCfg +000011 a40501 DCB 0xa4,0x05,0x01 + st_touch_tp_tuning_SvCx +000014 a40502 DCB 0xa4,0x05,0x02 + st_touch_tp_tuning_SvPnl +000017 a4 DCB 0xa4 +000018 0504 DCB 0x05,0x04 + st_touch_tp_tuning_clearfifo +00001a a400 DCB 0xa4,0x00 +00001c 01 DCB 0x01 + st_touch_tp_tuning_clkreset +00001d a40005 DCB 0xa4,0x00,0x05 + st_touch_tp_tuning_TuneM +000020 a4031300 DCB 0xa4,0x03,0x13,0x00 + st_touch_tp_tuning_TuneS +000024 a4030c00 DCB 0xa4,0x03,0x0c,0x00 + +;*** Start embedded assembler *** + +#line 1 "..\\..\\src\\app\\demo\\app_tp_st_touch.c" + AREA ||.rev16_text||, CODE + THUMB + EXPORT |__asm___17_app_tp_st_touch_c_0c52f749____REV16| +#line 467 "C:\\Keil_v5\\ARM\\PACK\\ARM\\CMSIS\\5.5.1\\CMSIS\\Core\\Include\\cmsis_armcc.h" +|__asm___17_app_tp_st_touch_c_0c52f749____REV16| PROC +#line 468 + + rev16 r0, r0 + bx lr + ENDP + AREA ||.revsh_text||, CODE + THUMB + EXPORT |__asm___17_app_tp_st_touch_c_0c52f749____REVSH| +#line 482 +|__asm___17_app_tp_st_touch_c_0c52f749____REVSH| PROC +#line 483 + + revsh r0, r0 + bx lr + ENDP + +;*** End embedded assembler *** diff --git a/project/ISP_568/Listings/app_tp_transfer.txt b/project/ISP_568/Listings/app_tp_transfer.txt new file mode 100644 index 0000000..8d55fa8 --- /dev/null +++ b/project/ISP_568/Listings/app_tp_transfer.txt @@ -0,0 +1,1188 @@ +; generated by Component: ARM Compiler 5.06 update 6 (build 750) Tool: ArmCC [4d3637] +; commandline ArmCC [--c99 --list --split_sections --debug -c --asm --interleave --gnu -o.\objects\app_tp_transfer.o --asm_dir=.\Listings\ --list_dir=.\Listings\ --depend=.\objects\app_tp_transfer.d --cpu=Cortex-M0 --apcs=interwork -O3 --diag_suppress=9931 -I..\..\src -I..\..\src\board -I..\..\src\common -I..\..\src\sdk\include -I..\..\src\app\demo -I..\..\src\sdk\include\M0 -I..\..\src\app -I..\..\src\app\module_demo -I..\..\src\app\touch -I..\..\src\app\S8 -I..\..\src\app\S9 -I..\CVWL568 -I.\RTE\_ISP_568 -IC:\Keil_v5\ARM\PACK\ARM\CMSIS\5.5.1\CMSIS\Core\Include -IC:\Keil_v5\ARM\PACK\ARM\CMSIS\5.5.1\Device\ARM\ARMCM0\Include -D__MICROLIB -D__UVISION_VERSION=528 -D_RTE_ -DARMCM0 -DISP_568 --omf_browse=.\objects\app_tp_transfer.crf ..\..\src\app\demo\app_tp_transfer.c] + THUMB + + AREA ||i.S20_Start_init||, CODE, READONLY, ALIGN=2 + + S20_Start_init PROC +;;;359 +;;;360 void S20_Start_init(void) +000000 b570 PUSH {r4-r6,lr} +;;;361 { +;;;362 uint8_t len=0; +;;;363 uint8_t temp=0; +;;;364 uint8_t temp_start_flag=0; +;;;365 // if(phone_start_flag==1) +;;;366 { +;;;367 app_tp_m_read(screen_reg_int_data[0].buffer, 1, s_screen_read_buffer, 8); +000002 4d4a LDR r5,|L1.300| +000004 2308 MOVS r3,#8 +000006 4a4a LDR r2,|L1.304| +000008 2101 MOVS r1,#1 +00000a 6828 LDR r0,[r5,#0] ; screen_reg_int_data +00000c f7fffffe BL app_tp_m_read + |L1.16| +;;;368 while(!hal_i2c_m_transfer_complate()); +000010 f7fffffe BL hal_i2c_m_transfer_complate +000014 2800 CMP r0,#0 +000016 d0fb BEQ |L1.16| +;;;369 delayMs(2); +000018 2002 MOVS r0,#2 +00001a f7fffffe BL delayMs +;;;370 while(!hal_gpio_get_input_data(g_screen_input_int_pad)) +00001e 4c45 LDR r4,|L1.308| +000020 e00c B |L1.60| + |L1.34| +;;;371 { +;;;372 app_tp_m_read(screen_reg_int_data[0].buffer, 1, s_screen_read_buffer, 8); +000022 2308 MOVS r3,#8 +000024 4a42 LDR r2,|L1.304| +000026 2101 MOVS r1,#1 +000028 6828 LDR r0,[r5,#0] ; screen_reg_int_data +00002a f7fffffe BL app_tp_m_read + |L1.46| +;;;373 while(!hal_i2c_m_transfer_complate()); +00002e f7fffffe BL hal_i2c_m_transfer_complate +000032 2800 CMP r0,#0 +000034 d0fb BEQ |L1.46| +;;;374 delayMs(2); +000036 2002 MOVS r0,#2 +000038 f7fffffe BL delayMs + |L1.60| +00003c 7820 LDRB r0,[r4,#0] ;370 ; g_screen_input_int_pad +00003e f7fffffe BL hal_gpio_get_input_data +000042 2800 CMP r0,#0 ;370 +000044 d0ed BEQ |L1.34| +;;;375 } +;;;376 temp=s_screen_read_buffer[0]&0xf0; +000046 4e3a LDR r6,|L1.304| +000048 7830 LDRB r0,[r6,#0] ; s_screen_read_buffer +00004a 0900 LSRS r0,r0,#4 +00004c 0100 LSLS r0,r0,#4 +;;;377 if((temp==0x10)||(temp==0x20)||(temp==0x30)) +00004e 2810 CMP r0,#0x10 +000050 d04a BEQ |L1.232| +000052 2820 CMP r0,#0x20 +000054 d048 BEQ |L1.232| +000056 2830 CMP r0,#0x30 +000058 d046 BEQ |L1.232| +;;;378 { +;;;379 temp_start_flag=1; +;;;380 } +;;;381 if(temp_start_flag==0) +;;;382 { +;;;383 app_tp_m_write(MI10_PRO_screen_init_data1, sizeof(MI10_PRO_screen_init_data1));//0xA0,0x00,0x01 +00005a 2103 MOVS r1,#3 +00005c 4836 LDR r0,|L1.312| +00005e f7fffffe BL app_tp_m_write + |L1.98| +;;;384 while(!hal_i2c_m_transfer_complate()); +000062 f7fffffe BL hal_i2c_m_transfer_complate +000066 2800 CMP r0,#0 +000068 d0fb BEQ |L1.98| +;;;385 delayMs(1); +00006a 2001 MOVS r0,#1 +00006c f7fffffe BL delayMs +;;;386 app_tp_m_write(MI10_PRO_screen_init_data2, sizeof(MI10_PRO_screen_init_data2));//0xA2,0x03,0x00,0x00,0x00,0x03 +000070 4831 LDR r0,|L1.312| +000072 2106 MOVS r1,#6 +000074 3009 ADDS r0,r0,#9 +000076 f7fffffe BL app_tp_m_write + |L1.122| +;;;387 while(!hal_i2c_m_transfer_complate()); +00007a f7fffffe BL hal_i2c_m_transfer_complate +00007e 2800 CMP r0,#0 +000080 d0fb BEQ |L1.122| +;;;388 delayMs(1); +000082 2001 MOVS r0,#1 +000084 f7fffffe BL delayMs +;;;389 app_tp_m_write(MI10_PRO_screen_init_data3, sizeof(MI10_PRO_screen_init_data3));//0xA2,0x02,0x00 +000088 482b LDR r0,|L1.312| +00008a 2103 MOVS r1,#3 +00008c 1cc0 ADDS r0,r0,#3 +00008e f7fffffe BL app_tp_m_write + |L1.146| +;;;390 while(!hal_i2c_m_transfer_complate()); +000092 f7fffffe BL hal_i2c_m_transfer_complate +000096 2800 CMP r0,#0 +000098 d0fb BEQ |L1.146| +;;;391 delayMs(1); +00009a 2001 MOVS r0,#1 +00009c f7fffffe BL delayMs +;;;392 app_tp_m_write(MI10_PRO_screen_init_data4, sizeof(MI10_PRO_screen_init_data4));//0xC0,0x07,0x01 +0000a0 4825 LDR r0,|L1.312| +0000a2 2103 MOVS r1,#3 +0000a4 1d80 ADDS r0,r0,#6 +0000a6 f7fffffe BL app_tp_m_write + |L1.170| +;;;393 while(!hal_i2c_m_transfer_complate()); +0000aa f7fffffe BL hal_i2c_m_transfer_complate +0000ae 2800 CMP r0,#0 +0000b0 d0fb BEQ |L1.170| +;;;394 delayMs(1); +0000b2 2001 MOVS r0,#1 +0000b4 f7fffffe BL delayMs +;;;395 app_tp_m_read(screen_reg_int_data[0].buffer, 1, s_screen_read_buffer, 8); +0000b8 2308 MOVS r3,#8 +0000ba 4a1d LDR r2,|L1.304| +0000bc 2101 MOVS r1,#1 +0000be 6828 LDR r0,[r5,#0] ; screen_reg_int_data +0000c0 f7fffffe BL app_tp_m_read + |L1.196| +;;;396 while(!hal_i2c_m_transfer_complate()); +0000c4 f7fffffe BL hal_i2c_m_transfer_complate +0000c8 2800 CMP r0,#0 +0000ca d0fb BEQ |L1.196| +;;;397 if(s_screen_read_buffer[7]>0) +0000cc 79f0 LDRB r0,[r6,#7] ; s_screen_read_buffer +0000ce 2800 CMP r0,#0 +0000d0 d00a BEQ |L1.232| +;;;398 { +;;;399 len=s_screen_read_buffer[7]*8; +0000d2 06c0 LSLS r0,r0,#27 +0000d4 0e03 LSRS r3,r0,#24 +;;;400 app_tp_m_read(screen_reg_int_data[0].buffer, 1, s_screen_read_buffer, len); +0000d6 4a16 LDR r2,|L1.304| +0000d8 2101 MOVS r1,#1 +0000da 6828 LDR r0,[r5,#0] ; screen_reg_int_data +0000dc f7fffffe BL app_tp_m_read + |L1.224| +;;;401 while(!hal_i2c_m_transfer_complate()); +0000e0 f7fffffe BL hal_i2c_m_transfer_complate +0000e4 2800 CMP r0,#0 +0000e6 d0fb BEQ |L1.224| + |L1.232| +;;;402 } +;;;403 } +;;;404 #endif +;;;405 if(hal_gpio_get_input_data(g_screen_input_int_pad)) +0000e8 7820 LDRB r0,[r4,#0] ; g_screen_input_int_pad +0000ea f7fffffe BL hal_gpio_get_input_data +0000ee 2800 CMP r0,#0 +0000f0 d01b BEQ |L1.298| +;;;406 { +;;;407 s_screen_init_complate = true; +0000f2 4911 LDR r1,|L1.312| +0000f4 2001 MOVS r0,#1 +0000f6 3908 SUBS r1,r1,#8 +0000f8 7108 STRB r0,[r1,#4] +0000fa 4601 MOV r1,r0 +0000fc 2200 MOVS r2,#0 +0000fe 7820 LDRB r0,[r4,#0] ; g_screen_input_int_pad +000100 f7fffffe BL hal_gpio_set_pull_state +000104 2100 MOVS r1,#0 +000106 7820 LDRB r0,[r4,#0] ; g_screen_input_int_pad +000108 f7fffffe BL hal_gpio_ctrl_eint +00010c 2103 MOVS r1,#3 +00010e 7820 LDRB r0,[r4,#0] ; g_screen_input_int_pad +000110 f7fffffe BL hal_gpio_init_eint +000114 4909 LDR r1,|L1.316| +000116 7820 LDRB r0,[r4,#0] ; g_screen_input_int_pad +000118 f7fffffe BL hal_gpio_reg_eint_cb +00011c 2101 MOVS r1,#1 +00011e 7820 LDRB r0,[r4,#0] ; g_screen_input_int_pad +000120 f7fffffe BL hal_gpio_ctrl_eint +;;;408 app_tp_screen_int_init(); +;;;409 phone_start_flag=0; +000124 4906 LDR r1,|L1.320| +000126 2000 MOVS r0,#0 +000128 7008 STRB r0,[r1,#0] + |L1.298| +;;;410 } +;;;411 } +;;;412 } +00012a bd70 POP {r4-r6,pc} +;;;413 + ENDP + + |L1.300| + DCD screen_reg_int_data + |L1.304| + DCD ||.bss|| + |L1.308| + DCD g_screen_input_int_pad + |L1.312| + DCD ||.data||+0x8 + |L1.316| + DCD app_tp_screen_int_callback + |L1.320| + DCD phone_start_flag + + AREA ||i.app_tp_I2C_init||, CODE, READONLY, ALIGN=2 + + app_tp_I2C_init PROC +;;;126 +;;;127 void app_tp_I2C_init(void) +000000 b510 PUSH {r4,lr} +;;;128 { +;;;129 hal_i2c_s_init(CHIP_I2C_ADDRESS, CHIP_I2C_ADDR_BITS); +000002 2107 MOVS r1,#7 +000004 2048 MOVS r0,#0x48 +000006 f7fffffe BL hal_i2c_s_init +;;;130 hal_i2c_s_set_transfer(app_tp_i2cs_callback); +00000a 4804 LDR r0,|L2.28| +00000c f7fffffe BL hal_i2c_s_set_transfer +;;;131 hal_i2c_s_nonblocking_read(s_phone_read_buffer, BUFFER_SIZE_MAX); //ý buffer +000010 21c8 MOVS r1,#0xc8 +000012 4803 LDR r0,|L2.32| +000014 f7fffffe BL hal_i2c_s_nonblocking_read +;;;132 } +000018 bd10 POP {r4,pc} +;;;133 + ENDP + +00001a 0000 DCW 0x0000 + |L2.28| + DCD app_tp_i2cs_callback + |L2.32| + DCD ||.bss||+0xc8 + + AREA ||i.app_tp_i2cs_callback||, CODE, READONLY, ALIGN=2 + + app_tp_i2cs_callback PROC +;;;322 //recieve_numΪյָ +;;;323 static void app_tp_i2cs_callback(e_i2c_s_int_status int_status, size_t recieve_num) +000000 b51c PUSH {r2-r4,lr} +000002 2000 MOVS r0,#0 +000004 9001 STR r0,[sp,#4] +000006 2900 CMP r1,#0 +;;;324 { +000008 d004 BEQ |L3.20| +00000a ab01 ADD r3,sp,#4 +00000c 466a MOV r2,sp +00000e 4807 LDR r0,|L3.44| +000010 f7fffffe BL app_tp_phone_analysis_data + |L3.20| +000014 21c8 MOVS r1,#0xc8 +000016 4805 LDR r0,|L3.44| +000018 f7fffffe BL app_tp_s_read +00001c 9901 LDR r1,[sp,#4] +00001e 2900 CMP r1,#0 +000020 d002 BEQ |L3.40| +000022 9800 LDR r0,[sp,#0] +000024 f7fffffe BL app_tp_s_write + |L3.40| +;;;325 #if 0 // 1: test +;;;326 if (int_status >2) +;;;327 { +;;;328 s_phone_read_buffer[2]=int_status; +;;;329 s_phone_read_buffer[3]=recieve_num; +;;;330 app_tp_m_write(s_phone_read_buffer, 4); +;;;331 } +;;;332 #endif +;;;333 app_tp_transfer_phone(recieve_num); +;;;334 } +000028 bd1c POP {r2-r4,pc} +;;;335 #endif + ENDP + +00002a 0000 DCW 0x0000 + |L3.44| + DCD ||.bss||+0xc8 + + AREA ||i.app_tp_init||, CODE, READONLY, ALIGN=2 + + app_tp_init PROC +;;;143 **************************************************************************/ +;;;144 void app_tp_init(void) +000000 b510 PUSH {r4,lr} +;;;145 { +;;;146 #ifdef DISABLE_TDDI_I2C_FUNCTION +;;;147 hal_gpio_init_output(g_phone_output_int_pad, IO_LVL_HIGH); //phoneжIO +;;;148 hal_gpio_init_output(g_screen_input_rst_pad, IO_LVL_HIGH); //ģTP RESET +;;;149 +;;;150 hal_gpio_set_mode(IO_PAD_TD_SPIM_CLK,IO_MODE_I2C1_SCL); +;;;151 hal_gpio_set_mode(IO_PAD_TD_SPIM_CSN,IO_MODE_I2C1_SDA); +;;;152 +;;;153 return; +;;;154 #else +;;;155 hal_gpio_set_pull_state(IO_PAD_TD_SPIM_CLK, ENABLE, DISABLE); +000002 2200 MOVS r2,#0 +000004 2101 MOVS r1,#1 +000006 2018 MOVS r0,#0x18 +000008 f7fffffe BL hal_gpio_set_pull_state +;;;156 hal_gpio_set_pull_state(IO_PAD_TD_SPIM_CSN, ENABLE, DISABLE); +00000c 2200 MOVS r2,#0 +00000e 2101 MOVS r1,#1 +000010 2019 MOVS r0,#0x19 +000012 f7fffffe BL hal_gpio_set_pull_state +;;;157 #endif +;;;158 +;;;159 // app_tp_screen_init(); //ʼֻλIO +;;;160 //app_tp_screen_int_init(); //screenж +;;;161 #ifdef G_PHONE_INT_DEFAULT_LOW +;;;162 hal_gpio_init_output(g_phone_output_int_pad, IO_LVL_LOW); //phoneжIO +;;;163 #else +;;;164 hal_gpio_init_output(g_phone_output_int_pad, IO_LVL_HIGH); //phoneжIO +000016 4807 LDR r0,|L4.52| +000018 2101 MOVS r1,#1 +00001a 7800 LDRB r0,[r0,#0] ; g_phone_output_int_pad +00001c f7fffffe BL hal_gpio_init_output +;;;165 #endif +;;;166 hal_gpio_init_input(g_screen_input_int_pad); +000020 4805 LDR r0,|L4.56| +000022 7800 LDRB r0,[r0,#0] ; g_screen_input_int_pad +000024 f7fffffe BL hal_gpio_init_input +;;;167 // hal_gpio_init_output(g_screen_input_rst_pad, IO_LVL_HIGH); //ģTP RESET +;;;168 +;;;169 #if SCREEN_MASTER_TRANSFER_I2C +;;;170 hal_i2c_m_dma_init(SCREEN_I2C_ADDRESS, SCREEN_I2C_ADDR_BITS, I2C_MASTER_SPEED); +000028 4a04 LDR r2,|L4.60| +00002a 2107 MOVS r1,#7 +00002c 2049 MOVS r0,#0x49 +00002e f7fffffe BL hal_i2c_m_dma_init +;;;171 #elif SCREEN_MASTER_TRANSFER_SPI +;;;172 hal_spi_m_dma_init(SPI_MASTER_SPEED, SCREEN_SPI_CPHA, SCREEN_SPI_CPOL); +;;;173 #endif +;;;174 +;;;175 #if PHONE_SLAVE_TRANSFER_I2C +;;;176 // hal_i2c_s_init(CHIP_I2C_ADDRESS, CHIP_I2C_ADDR_BITS); +;;;177 // hal_i2c_s_set_transfer(app_tp_i2cs_callback); +;;;178 // hal_i2c_s_nonblocking_read(s_phone_read_buffer, BUFFER_SIZE_MAX); //ý buffer +;;;179 #elif PHONE_SLAVE_TRANSFER_SPI +;;;180 hal_spi_slave_init(PHONE_SPI_CPHA, PHONE_SPI_CPOL, true); // ʼspiԼdma +;;;181 hal_spi_slave_register_callback(app_tp_spis_callback); // עص +;;;182 hal_spi_slave_auto_transfer_abort(); // ֹͣ +;;;183 hal_spi_slave_flush_fifo(); // Flush FIFO +;;;184 +;;;185 /* ÿpacketԶ, circle mode Ϊfalse, յbuffer max sizeݺbufferٸ, packetɺûص */ +;;;186 hal_spi_slave_set_auto_rx_buffer(s_phone_read_buffer, BUFFER_SIZE_MAX, false); // auto rx buffer +;;;187 hal_spi_slave_set_auto_tx_buffer(phone_reg_const_data[0].write_back, phone_reg_const_data[0].write_back_size, false); // TX BUFFER +;;;188 +;;;189 hal_spi_slave_enable(); // spis +;;;190 hal_spi_slave_auto_transfer_start(); // rxԶ +;;;191 #endif +;;;192 +;;;193 //ap_tp_scan_point_init(); +;;;194 } +000032 bd10 POP {r4,pc} +;;;195 + ENDP + + |L4.52| + DCD g_phone_output_int_pad + |L4.56| + DCD g_screen_input_int_pad + |L4.60| + DCD 0x000c3500 + + AREA ||i.app_tp_m_read||, CODE, READONLY, ALIGN=1 + + app_tp_m_read PROC +;;;260 **************************************************************************/ +;;;261 void app_tp_m_read(const uint8_t *cmd, size_t cmd_size, uint8_t *data_buffer, size_t data_size) +000000 b5f8 PUSH {r3-r7,lr} +;;;262 { +000002 4605 MOV r5,r0 +;;;263 #if SCREEN_MASTER_TRANSFER_I2C +;;;264 uint8_t i = 0; +000004 2400 MOVS r4,#0 +;;;265 uint32_t address = 0; +000006 4620 MOV r0,r4 +000008 e005 B |L5.22| + |L5.10| +;;;266 +;;;267 for (i = 0; i < cmd_size; i++) //ȽҪ͵ϵ address +;;;268 { +;;;269 address |= (uint32_t)cmd[i] << i * 8; +00000a 5d2e LDRB r6,[r5,r4] +00000c 00e7 LSLS r7,r4,#3 +00000e 40be LSLS r6,r6,r7 +000010 4330 ORRS r0,r0,r6 +000012 1c64 ADDS r4,r4,#1 +000014 b2e4 UXTB r4,r4 ;267 + |L5.22| +000016 428c CMP r4,r1 ;267 +000018 d3f7 BCC |L5.10| +;;;270 } +;;;271 hal_i2c_m_dma_read(address, cmd_size, data_buffer, data_size); +00001a f7fffffe BL hal_i2c_m_dma_read +;;;272 #elif SCREEN_MASTER_TRANSFER_SPI +;;;273 hal_spi_m_dma_read(cmd, cmd_size, data_buffer, data_size); +;;;274 #endif +;;;275 } +00001e bdf8 POP {r3-r7,pc} +;;;276 + ENDP + + + AREA ||i.app_tp_m_transfer_complate||, CODE, READONLY, ALIGN=1 + + app_tp_m_transfer_complate PROC +;;;203 **************************************************************************/ +;;;204 bool app_tp_m_transfer_complate(void) +000000 b510 PUSH {r4,lr} +;;;205 { +;;;206 #if SCREEN_MASTER_TRANSFER_I2C +;;;207 return hal_i2c_m_transfer_complate(); +000002 f7fffffe BL hal_i2c_m_transfer_complate +;;;208 #elif SCREEN_MASTER_TRANSFER_SPI +;;;209 return hal_spi_m_get_transfer_complate(); +;;;210 #else +;;;211 return true; +;;;212 #endif +;;;213 } +000006 bd10 POP {r4,pc} +;;;214 + ENDP + + + AREA ||i.app_tp_m_write||, CODE, READONLY, ALIGN=1 + + app_tp_m_write PROC +;;;240 **************************************************************************/ +;;;241 void app_tp_m_write(const uint8_t *txbuffer, size_t buffer_size) +000000 b510 PUSH {r4,lr} +;;;242 { +;;;243 #if SCREEN_MASTER_TRANSFER_I2C +;;;244 hal_i2c_m_dma_write(txbuffer, buffer_size); +000002 f7fffffe BL hal_i2c_m_dma_write +;;;245 #elif SCREEN_MASTER_TRANSFER_SPI +;;;246 hal_spi_m_dma_write(txbuffer, buffer_size); +;;;247 s_spim_write = true; +;;;248 #endif +;;;249 } +000006 bd10 POP {r4,pc} +;;;250 + ENDP + + + AREA ||i.app_tp_phone_clear_reset_on||, CODE, READONLY, ALIGN=2 + + app_tp_phone_clear_reset_on PROC +;;;721 **************************************************************************/ +;;;722 void app_tp_phone_clear_reset_on(void) +000000 4901 LDR r1,|L8.8| +;;;723 { +;;;724 s_phone_reset_flag = false; +000002 2000 MOVS r0,#0 +000004 7088 STRB r0,[r1,#2] +;;;725 } +000006 4770 BX lr +;;;726 + ENDP + + |L8.8| + DCD ||.data|| + + AREA ||i.app_tp_phone_reset_on||, CODE, READONLY, ALIGN=2 + + app_tp_phone_reset_on PROC +;;;709 **************************************************************************/ +;;;710 bool app_tp_phone_reset_on(void) +000000 4801 LDR r0,|L9.8| +;;;711 { +;;;712 return s_phone_reset_flag; +000002 7880 LDRB r0,[r0,#2] ; s_phone_reset_flag +;;;713 } +000004 4770 BX lr +;;;714 + ENDP + +000006 0000 DCW 0x0000 + |L9.8| + DCD ||.data|| + + AREA ||i.app_tp_s_read||, CODE, READONLY, ALIGN=1 + + app_tp_s_read PROC +;;;305 **************************************************************************/ +;;;306 void app_tp_s_read(void *rxBuffer, size_t data_size) +000000 b510 PUSH {r4,lr} +;;;307 { +;;;308 #if PHONE_SLAVE_TRANSFER_I2C +;;;309 hal_i2c_s_nonblocking_read(rxBuffer, data_size); +000002 f7fffffe BL hal_i2c_s_nonblocking_read +;;;310 #endif +;;;311 } +000006 bd10 POP {r4,pc} +;;;312 + ENDP + + + AREA ||i.app_tp_s_transfer_complate||, CODE, READONLY, ALIGN=1 + + app_tp_s_transfer_complate PROC +;;;221 **************************************************************************/ +;;;222 bool app_tp_s_transfer_complate(void) +000000 b510 PUSH {r4,lr} +;;;223 { +;;;224 #if SCREEN_MASTER_TRANSFER_I2C +;;;225 return hal_i2c_s_write_complate() && hal_i2c_s_read_complate(); +000002 f7fffffe BL hal_i2c_s_write_complate +000006 2800 CMP r0,#0 +000008 d005 BEQ |L11.22| +00000a f7fffffe BL hal_i2c_s_read_complate +00000e 2800 CMP r0,#0 +000010 d001 BEQ |L11.22| +000012 2001 MOVS r0,#1 +;;;226 #elif SCREEN_MASTER_TRANSFER_SPI +;;;227 return !hal_spi_slave_busy(); +;;;228 #else +;;;229 return true; +;;;230 #endif +;;;231 } +000014 bd10 POP {r4,pc} + |L11.22| +000016 2000 MOVS r0,#0 ;225 +000018 bd10 POP {r4,pc} +;;;232 + ENDP + + + AREA ||i.app_tp_s_write||, CODE, READONLY, ALIGN=1 + + app_tp_s_write PROC +;;;284 **************************************************************************/ +;;;285 void app_tp_s_write(const uint8_t *txbuffer, size_t buffer_size) +000000 b510 PUSH {r4,lr} +;;;286 { +;;;287 #if PHONE_SLAVE_TRANSFER_I2C +;;;288 hal_i2c_s_dma_write(txbuffer, buffer_size); +000002 f7fffffe BL hal_i2c_s_dma_write +;;;289 #elif PHONE_SLAVE_TRANSFER_SPI +;;;290 //while (hal_spi_slave_busy()); +;;;291 hal_spi_slave_auto_transfer_abort(); +;;;292 hal_spi_slave_flush_fifo(); +;;;293 hal_spi_slave_set_auto_tx_buffer(txbuffer, buffer_size, true); +;;;294 hal_spi_slave_auto_transfer_start(); +;;;295 #endif +;;;296 } +000006 bd10 POP {r4,pc} +;;;297 + ENDP + + + AREA ||i.app_tp_screen_init||, CODE, READONLY, ALIGN=2 + + app_tp_screen_init PROC +;;;117 **************************************************************************/ +;;;118 void app_tp_screen_init(void) +000000 b510 PUSH {r4,lr} +;;;119 { +;;;120 hal_gpio_init_output(g_screen_input_rst_pad, IO_LVL_HIGH); +000002 4c0a LDR r4,|L13.44| +000004 2101 MOVS r1,#1 +000006 7820 LDRB r0,[r4,#0] ; g_screen_input_rst_pad +000008 f7fffffe BL hal_gpio_init_output +;;;121 delayUs(200); +00000c 20c8 MOVS r0,#0xc8 +00000e f7fffffe BL delayUs +;;;122 hal_gpio_set_output_data(g_screen_input_rst_pad, IO_LVL_LOW); +000012 2100 MOVS r1,#0 +000014 7820 LDRB r0,[r4,#0] ; g_screen_input_rst_pad +000016 f7fffffe BL hal_gpio_set_output_data +;;;123 delayUs(200); +00001a 20c8 MOVS r0,#0xc8 +00001c f7fffffe BL delayUs +;;;124 hal_gpio_set_output_data(g_screen_input_rst_pad, IO_LVL_HIGH); +000020 2101 MOVS r1,#1 +000022 7820 LDRB r0,[r4,#0] ; g_screen_input_rst_pad +000024 f7fffffe BL hal_gpio_set_output_data +;;;125 } +000028 bd10 POP {r4,pc} +;;;126 + ENDP + +00002a 0000 DCW 0x0000 + |L13.44| + DCD g_screen_input_rst_pad + + AREA ||i.app_tp_screen_int_callback||, CODE, READONLY, ALIGN=2 + + app_tp_screen_int_callback PROC +;;;70 **************************************************************************/ +;;;71 static void app_tp_screen_int_callback(void *data) +000000 4901 LDR r1,|L14.8| +;;;72 { +;;;73 s_screen_int_flag = true; +000002 2001 MOVS r0,#1 +000004 7048 STRB r0,[r1,#1] +;;;74 } +000006 4770 BX lr +;;;75 + ENDP + + |L14.8| + DCD ||.data|| + + AREA ||i.app_tp_transfer_screen_const||, CODE, READONLY, ALIGN=2 + + app_tp_transfer_screen_const PROC +;;;424 **************************************************************************/ +;;;425 static void app_tp_transfer_screen_const(void) +000000 b510 PUSH {r4,lr} +000002 f7fffffe BL hal_i2c_m_transfer_complate +;;;426 { +;;;427 // static bool screen_const_transfer_buffer_ready = true; // buffer Ƿ׼ +;;;428 uint8_t ii; +;;;429 // uint8_t len=0; +;;;430 /**** 1. жϵǰ״̬ͨѽ, ״̬ͨѽҿʼ̻δ****/ +;;;431 #if 0 // test +;;;432 uint8_t test_master_read_buffer[10] = {0x08, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18, 0x19}; +;;;433 uint8_t write_buffer[10] = {0x04, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18, 0x19}; +;;;434 +;;;435 // for (ii =0x20; ii<0x7F; ii++) +;;;436 { +;;;437 //hal_i2c_m_dma_init(ii, SCREEN_I2C_ADDR_BITS); +;;;438 //delayMs(100); +;;;439 if (hal_i2c_m_dma_write(write_buffer, 1)) +;;;440 { +;;;441 //break; +;;;442 } +;;;443 while(!hal_i2c_m_transfer_complate()); +;;;444 hal_i2c_m_dma_read(test_master_read_buffer, 1, test_master_read_buffer, 2); +;;;445 } +;;;446 #endif +;;;447 +;;;448 +;;;449 if (app_tp_m_transfer_complate() && (s_screen_const_transfer_count < screen_reg_start_data_size)) +000006 2800 CMP r0,#0 +000008 d012 BEQ |L15.48| +00000a 4c0a LDR r4,|L15.52| +00000c 490a LDR r1,|L15.56| +00000e 7960 LDRB r0,[r4,#5] ; s_screen_const_transfer_count +000010 7809 LDRB r1,[r1,#0] ; screen_reg_start_data_size +000012 4288 CMP r0,r1 +000014 d20c BCS |L15.48| +;;;450 { +;;;451 if (s_spim_write) //SPI дݺҪѽFIFOݶȻӰһζȡ +000016 7820 LDRB r0,[r4,#0] ; s_spim_write +000018 2800 CMP r0,#0 +00001a d003 BEQ |L15.36| +;;;452 { +;;;453 hal_spi_m_clear_rxfifo(); +00001c f7fffffe BL hal_spi_m_clear_rxfifo +;;;454 s_spim_write = false; +000020 2000 MOVS r0,#0 +000022 7020 STRB r0,[r4,#0] + |L15.36| +;;;455 } +;;;456 +;;;457 #if 1 +;;;458 +;;;459 // #ifndef USE_FOR_SUMSUNG_S20 +;;;460 // for (ii =0; ii= screen_reg_start_data_size) +;;;516 { +;;;517 s_screen_init_complate = true; +;;;518 } +;;;519 } +;;;520 #endif +;;;521 } +;;;522 } +000030 bd10 POP {r4,pc} +;;;523 + ENDP + +000032 0000 DCW 0x0000 + |L15.52| + DCD ||.data|| + |L15.56| + DCD screen_reg_start_data_size + |L15.60| + DCD phone_start_flag + + AREA ||i.app_tp_transfer_screen_int||, CODE, READONLY, ALIGN=2 + + app_tp_transfer_screen_int PROC +;;;550 **************************************************************************/ +;;;551 void app_tp_transfer_screen_int(void) +000000 b5f8 PUSH {r3-r7,lr} +;;;552 { +;;;553 uint8_t len=0; +;;;554 uint8_t temp_len=0; +;;;555 bool screen_gpio_int = false; +;;;556 static uint8_t screen_int_transfer_count = 0; //¼ǰͨŵһ +;;;557 static bool screen_int_transfer_buffer_ready = true; // buffer Ƿ׼ +;;;558 // static uint8_t test_flag = 0; +;;;559 // s_screen_init_complate=false;//Ϊ¼⽫ƬΪ·ݣFT8719̩ĹͨѶ +;;;560 if (!s_screen_init_complate) //TP ʼδɣȽгʼ +000002 4d53 LDR r5,|L16.336| +000004 2400 MOVS r4,#0 ;553 +000006 7928 LDRB r0,[r5,#4] ; s_screen_init_complate +000008 4626 MOV r6,r4 ;554 +00000a 2800 CMP r0,#0 +00000c d04c BEQ |L16.168| +;;;561 { +;;;562 app_tp_transfer_screen_const(); +;;;563 return; +;;;564 } +;;;565 +;;;566 #if 0 //test +;;;567 test_flag++; +;;;568 if (test_flag >1000000) +;;;569 { +;;;570 test_flag =0; +;;;571 //TAU_LOGD("Run ok!!\n"); +;;;572 //app_tp_m_read(screen_reg_int_data[0].buffer, screen_reg_int_data[0].txbuffer_size, s_screen_number, screen_reg_int_data[0].rxbuffer_size); +;;;573 //while(!hal_i2c_m_transfer_complate()); +;;;574 } +;;;575 #endif +;;;576 +;;;577 /**** 1. ж screen Ƿ񷢳жź ****/ +;;;578 // s_screen_int_flag: жźű־λ +;;;579 // app_tp_screen_int_lvl_low : SPI ʱͨʱżcsߵͨ쳣ñ־λڽ +;;;580 screen_gpio_int = s_screen_int_flag || app_tp_screen_int_lvl_low(); +00000e 7868 LDRB r0,[r5,#1] ; s_screen_int_flag +;;;581 if (((screen_gpio_int) || (s_screen_int_transfer_status)) && app_tp_m_transfer_complate()) //жϵǰͨ״̬׼ͨ +000010 78e9 LDRB r1,[r5,#3] ; s_screen_int_transfer_status +000012 4308 ORRS r0,r0,r1 +000014 d04a BEQ |L16.172| +000016 f7fffffe BL hal_i2c_m_transfer_complate +00001a 2800 CMP r0,#0 +00001c d046 BEQ |L16.172| +;;;582 { +;;;583 s_screen_int_flag = false; +00001e 2700 MOVS r7,#0 +000020 706f STRB r7,[r5,#1] +;;;584 if (s_spim_write) //SPI дݺҪѽFIFOݶȻӰһζȡ +000022 7828 LDRB r0,[r5,#0] ; s_spim_write +000024 2800 CMP r0,#0 +000026 d002 BEQ |L16.46| +;;;585 { +;;;586 hal_spi_m_clear_rxfifo(); +000028 f7fffffe BL hal_spi_m_clear_rxfifo +;;;587 s_spim_write = false; +00002c 702f STRB r7,[r5,#0] + |L16.46| +;;;588 } +;;;589 +;;;590 /**** 2. ͻȡӻ ****/ +;;;591 if (screen_int_transfer_buffer_ready) +00002e 79e8 LDRB r0,[r5,#7] ; screen_int_transfer_buffer_ready +000030 2800 CMP r0,#0 +000032 d078 BEQ |L16.294| +;;;592 { +;;;593 #ifndef READ_MODULE_TP_ONE_BY_ONE +;;;594 screen_int_transfer_buffer_ready = false; +000034 4846 LDR r0,|L16.336| +000036 2100 MOVS r1,#0 +000038 71c1 STRB r1,[r0,#7] +;;;595 s_screen_int_transfer_status = true; +00003a 2101 MOVS r1,#1 +;;;596 #ifdef USE_FOR_SUMSUNG_S20U +;;;597 app_tp_m_read(screen_reg_int_data[0].buffer, 1, s_screen_read_buffer, 8); +00003c 4d45 LDR r5,|L16.340| +00003e 70c1 STRB r1,[r0,#3] ;595 +000040 2308 MOVS r3,#8 +000042 4a45 LDR r2,|L16.344| +000044 6828 LDR r0,[r5,#0] ; screen_reg_int_data +000046 f7fffffe BL app_tp_m_read + |L16.74| +;;;598 while(!hal_i2c_m_transfer_complate()); +00004a f7fffffe BL hal_i2c_m_transfer_complate +00004e 2800 CMP r0,#0 +000050 d0fb BEQ |L16.74| +;;;599 if(s_screen_read_buffer[7]>0) +000052 4f41 LDR r7,|L16.344| +000054 4639 MOV r1,r7 ;597 +000056 79f8 LDRB r0,[r7,#7] ; s_screen_read_buffer +000058 3108 ADDS r1,r1,#8 ;597 +00005a 9100 STR r1,[sp,#0] +00005c 2800 CMP r0,#0 +00005e d00d BEQ |L16.124| +;;;600 { +;;;601 len=s_screen_read_buffer[7]*8; +000060 06c0 LSLS r0,r0,#27 +000062 0e04 LSRS r4,r0,#24 +;;;602 app_tp_m_read(screen_reg_int_data[0].buffer, 1, &s_screen_read_buffer[8], len); +000064 460a MOV r2,r1 +000066 4623 MOV r3,r4 +000068 2101 MOVS r1,#1 +00006a 6828 LDR r0,[r5,#0] ; screen_reg_int_data +00006c f7fffffe BL app_tp_m_read + |L16.112| +;;;603 while(!hal_i2c_m_transfer_complate()); +000070 f7fffffe BL hal_i2c_m_transfer_complate +000074 2800 CMP r0,#0 +000076 d0fb BEQ |L16.112| +;;;604 temp_len=len+7; +000078 1de0 ADDS r0,r4,#7 +00007a b2c6 UXTB r6,r0 + |L16.124| +;;;605 } +;;;606 if(s_screen_read_buffer[temp_len]>0) +00007c 5db8 LDRB r0,[r7,r6] +00007e 2800 CMP r0,#0 +000080 d00d BEQ |L16.158| +;;;607 { +;;;608 len=s_screen_read_buffer[7]*8; +000082 79f8 LDRB r0,[r7,#7] ; s_screen_read_buffer +;;;609 app_tp_m_read(screen_reg_int_data[0].buffer, 1, &s_screen_read_buffer[temp_len+1], len); +000084 19ba ADDS r2,r7,r6 +000086 06c0 LSLS r0,r0,#27 ;608 +000088 0e04 LSRS r4,r0,#24 ;608 +00008a 4623 MOV r3,r4 +00008c 2101 MOVS r1,#1 +00008e 1c52 ADDS r2,r2,#1 +000090 6828 LDR r0,[r5,#0] ; screen_reg_int_data +000092 f7fffffe BL app_tp_m_read + |L16.150| +;;;610 while(!hal_i2c_m_transfer_complate()); +000096 f7fffffe BL hal_i2c_m_transfer_complate +00009a 2800 CMP r0,#0 +00009c d0fb BEQ |L16.150| + |L16.158| +;;;611 } +;;;612 delayUs(100); +00009e 2064 MOVS r0,#0x64 +0000a0 f7fffffe BL delayUs +;;;613 +;;;614 while(!hal_gpio_get_input_data(g_screen_input_int_pad)) +0000a4 4e2d LDR r6,|L16.348| +0000a6 e021 B |L16.236| + |L16.168| +0000a8 f7fffffe BL app_tp_transfer_screen_const + |L16.172| +;;;615 { +;;;616 app_tp_m_read(screen_reg_int_data[0].buffer, 1, s_screen_read_buffer, 8); +;;;617 while(!hal_i2c_m_transfer_complate()); +;;;618 delayMs(2); +;;;619 if(s_screen_read_buffer[7]>0) +;;;620 { +;;;621 len=s_screen_read_buffer[7]*8; +;;;622 app_tp_m_read(screen_reg_int_data[0].buffer, 1, &s_screen_read_buffer[8], len); +;;;623 while(!hal_i2c_m_transfer_complate()); +;;;624 delayMs(2); +;;;625 } +;;;626 // printf("%2x,%2x\n",s_screen_read_buffer[0],s_screen_read_buffer[1]); +;;;627 +;;;628 } +;;;629 +;;;630 #else +;;;631 +;;;632 #endif +;;;633 #else +;;;634 +;;;635 #endif +;;;636 ap_tp_st_touch_scan_point_record_event(s_screen_read_buffer, len+8); +;;;637 ap_tp_st_touch_error_handler_FF(s_screen_read_buffer); +;;;638 ap_tp_st_touch_error_handler_F3(s_screen_read_buffer); +;;;639 screen_int_transfer_buffer_ready = true; +;;;640 app_tp_screen_analysis_int(screen_int_transfer_count, s_screen_read_buffer,screen_reg_int_data[2].rxbuffer_size); +;;;641 screen_int_transfer_count = 0; +;;;642 s_screen_int_transfer_status = false; +;;;643 } +;;;644 /**** 3. ͨݣ׼һͨŵbuffer ****/ +;;;645 else +;;;646 { +;;;647 #if 1 +;;;648 #ifdef USE_FOR_SUMSUNG_S20 +;;;649 u16TouchID=0x0000; +;;;650 #endif +;;;651 ap_tp_st_touch_scan_point_record_event(s_screen_read_buffer, len+8); +;;;652 ap_tp_st_touch_error_handler_FF(s_screen_read_buffer); +;;;653 ap_tp_st_touch_error_handler_F3(s_screen_read_buffer); +;;;654 screen_int_transfer_buffer_ready = true; +;;;655 screen_int_transfer_count = app_tp_screen_analysis_int(screen_int_transfer_count, s_screen_read_buffer,screen_reg_int_data[2].rxbuffer_size); +;;;656 screen_int_transfer_count = 0; +;;;657 s_screen_int_transfer_status = false; +;;;658 +;;;659 #else +;;;660 screen_int_transfer_buffer_ready = true; +;;;661 screen_int_transfer_count = app_tp_screen_analysis_int(screen_int_transfer_count, s_screen_read_buffer, \ +;;;662 screen_reg_int_data[screen_int_transfer_count].rxbuffer_size); +;;;663 +;;;664 if (screen_int_transfer_count > screen_reg_int_data_size) //ҪһͨŽһݽֹͣͨ +;;;665 { +;;;666 screen_int_transfer_count = 0; +;;;667 s_screen_int_transfer_status = false; +;;;668 return; +;;;669 } +;;;670 #endif +;;;671 } +;;;672 } +;;;673 } +0000ac bdf8 POP {r3-r7,pc} + |L16.174| +0000ae 2308 MOVS r3,#8 ;616 +0000b0 4a29 LDR r2,|L16.344| +0000b2 2101 MOVS r1,#1 ;616 +0000b4 6828 LDR r0,[r5,#0] ;616 ; screen_reg_int_data +0000b6 f7fffffe BL app_tp_m_read + |L16.186| +0000ba f7fffffe BL hal_i2c_m_transfer_complate +0000be 2800 CMP r0,#0 ;617 +0000c0 d0fb BEQ |L16.186| +0000c2 2002 MOVS r0,#2 ;618 +0000c4 f7fffffe BL delayMs +0000c8 79f8 LDRB r0,[r7,#7] ;619 ; s_screen_read_buffer +0000ca 2800 CMP r0,#0 ;619 +0000cc d00e BEQ |L16.236| +0000ce 06c0 LSLS r0,r0,#27 ;621 +0000d0 0e04 LSRS r4,r0,#24 ;621 +0000d2 4623 MOV r3,r4 ;622 +0000d4 6828 LDR r0,[r5,#0] ;622 ; screen_reg_int_data +0000d6 2101 MOVS r1,#1 ;622 +0000d8 9a00 LDR r2,[sp,#0] ;622 +0000da f7fffffe BL app_tp_m_read + |L16.222| +0000de f7fffffe BL hal_i2c_m_transfer_complate +0000e2 2800 CMP r0,#0 ;623 +0000e4 d0fb BEQ |L16.222| +0000e6 2002 MOVS r0,#2 ;624 +0000e8 f7fffffe BL delayMs + |L16.236| +0000ec 7830 LDRB r0,[r6,#0] ;614 ; g_screen_input_int_pad +0000ee f7fffffe BL hal_gpio_get_input_data +0000f2 2800 CMP r0,#0 ;614 +0000f4 d0db BEQ |L16.174| +0000f6 3408 ADDS r4,r4,#8 ;614 +0000f8 b2e1 UXTB r1,r4 ;636 +0000fa 4817 LDR r0,|L16.344| +0000fc f7fffffe BL ap_tp_st_touch_scan_point_record_event +000100 4815 LDR r0,|L16.344| +000102 f7fffffe BL ap_tp_st_touch_error_handler_FF +000106 4814 LDR r0,|L16.344| +000108 f7fffffe BL ap_tp_st_touch_error_handler_F3 +00010c 4c10 LDR r4,|L16.336| +00010e 2001 MOVS r0,#1 ;639 +000110 71e0 STRB r0,[r4,#7] ;639 +000112 4911 LDR r1,|L16.344| +000114 79a0 LDRB r0,[r4,#6] ;640 ; screen_int_transfer_count +000116 6aaa LDR r2,[r5,#0x28] ;640 ; screen_reg_int_data +000118 f7fffffe BL app_tp_screen_analysis_int +00011c 2000 MOVS r0,#0 ;641 +00011e 71a0 STRB r0,[r4,#6] ;641 +000120 70e0 STRB r0,[r4,#3] ;642 + |L16.290| +000122 bdf8 POP {r3-r7,pc} +000124 e7ff B |L16.294| + |L16.294| +000126 2108 MOVS r1,#8 ;651 +000128 480b LDR r0,|L16.344| +00012a f7fffffe BL ap_tp_st_touch_scan_point_record_event +00012e 480a LDR r0,|L16.344| +000130 f7fffffe BL ap_tp_st_touch_error_handler_FF +000134 4808 LDR r0,|L16.344| +000136 f7fffffe BL ap_tp_st_touch_error_handler_F3 +00013a 2001 MOVS r0,#1 ;654 +00013c 71e8 STRB r0,[r5,#7] ;654 +00013e 4805 LDR r0,|L16.340| +000140 4905 LDR r1,|L16.344| +000142 6a82 LDR r2,[r0,#0x28] ;655 ; screen_reg_int_data +000144 79a8 LDRB r0,[r5,#6] ;655 ; screen_int_transfer_count +000146 f7fffffe BL app_tp_screen_analysis_int +00014a 71af STRB r7,[r5,#6] ;656 +00014c 70ef STRB r7,[r5,#3] ;657 +00014e e7e8 B |L16.290| +;;;674 + ENDP + + |L16.336| + DCD ||.data|| + |L16.340| + DCD screen_reg_int_data + |L16.344| + DCD ||.bss|| + |L16.348| + DCD g_screen_input_int_pad + + AREA ||i.app_tp_transfer_screen_start||, CODE, READONLY, ALIGN=2 + + app_tp_transfer_screen_start PROC +;;;530 **************************************************************************/ +;;;531 void app_tp_transfer_screen_start(void) +000000 b570 PUSH {r4-r6,lr} +;;;532 { +;;;533 s_screen_init_complate = false; +000002 4c04 LDR r4,|L17.20| +000004 2500 MOVS r5,#0 +000006 7125 STRB r5,[r4,#4] +;;;534 s_screen_const_transfer_count = 0; +000008 7165 STRB r5,[r4,#5] +;;;535 //app_tp_screen_init(); +;;;536 #ifndef DISABLE_I2C_INIT_CODE +;;;537 app_tp_transfer_screen_const(); +00000a f7fffffe BL app_tp_transfer_screen_const +;;;538 #endif +;;;539 s_screen_int_flag = false; +00000e 7065 STRB r5,[r4,#1] +;;;540 } +000010 bd70 POP {r4-r6,pc} +;;;541 + ENDP + +000012 0000 DCW 0x0000 + |L17.20| + DCD ||.data|| + + AREA ||.bss||, DATA, NOINIT, ALIGN=0 + + s_screen_read_buffer + % 200 + s_phone_read_buffer + % 200 + + AREA ||.data||, DATA, ALIGN=0 + + s_spim_write +000000 00 DCB 0x00 + s_screen_int_flag +000001 00 DCB 0x00 + s_phone_reset_flag +000002 00 DCB 0x00 + s_screen_int_transfer_status +000003 00 DCB 0x00 + s_screen_init_complate +000004 00 DCB 0x00 + s_screen_const_transfer_count +000005 ff DCB 0xff + screen_int_transfer_count +000006 00 DCB 0x00 + screen_int_transfer_buffer_ready +000007 01 DCB 0x01 + MI10_PRO_screen_init_data1 +000008 a00001 DCB 0xa0,0x00,0x01 + MI10_PRO_screen_init_data3 +00000b a2 DCB 0xa2 +00000c 0200 DCB 0x02,0x00 + MI10_PRO_screen_init_data4 +00000e c007 DCB 0xc0,0x07 +000010 01 DCB 0x01 + MI10_PRO_screen_init_data2 +000011 a20300 DCB 0xa2,0x03,0x00 +000014 000003 DCB 0x00,0x00,0x03 + + AREA ||area_number.22||, DATA, ALIGN=0 + + EXPORTAS ||area_number.22||, ||.data|| + MI10_PRO_screen_init_data5 +000000 a40670 DCB 0xa4,0x06,0x70 + + AREA ||area_number.23||, DATA, ALIGN=0 + + EXPORTAS ||area_number.23||, ||.data|| + MI10_PRO_screen_init_data6 +000000 a60000 DCB 0xa6,0x00,0x00 + + AREA ||area_number.24||, DATA, ALIGN=0 + + EXPORTAS ||area_number.24||, ||.data|| + MI10_PRO_screen_init_data7 +000000 fa200000 DCB 0xfa,0x20,0x00,0x00 +000004 78 DCB 0x78 + + AREA ||area_number.25||, DATA, ALIGN=0 + + EXPORTAS ||area_number.25||, ||.data|| + MI10_PRO_screen_init_data8 +000000 a2032000 DCB 0xa2,0x03,0x20,0x00 +000004 0000 DCB 0x00,0x00 + + AREA ||area_number.26||, DATA, ALIGN=0 + + EXPORTAS ||area_number.26||, ||.data|| + MI10_PRO_screen_init_data9 +000000 a001 DCB 0xa0,0x01 + + AREA ||area_number.27||, DATA, ALIGN=0 + + EXPORTAS ||area_number.27||, ||.data|| + MI10_PRO_screen_init_data10 +000000 a00000 DCB 0xa0,0x00,0x00 + + AREA ||area_number.28||, DATA, ALIGN=0 + + EXPORTAS ||area_number.28||, ||.data|| + read_point +000000 00 DCB 0x00 + + AREA ||area_number.29||, DATA, ALIGN=0 + + EXPORTAS ||area_number.29||, ||.data|| + s_screen_number +000000 0000 DCB 0x00,0x00 + + AREA ||area_number.30||, DATA, ALIGN=0 + + EXPORTAS ||area_number.30||, ||.data|| + s_screen_temp +000000 0000 DCB 0x00,0x00 + +;*** Start embedded assembler *** + +#line 1 "..\\..\\src\\app\\demo\\app_tp_transfer.c" + AREA ||.rev16_text||, CODE + THUMB + EXPORT |__asm___17_app_tp_transfer_c_e672c05a____REV16| +#line 467 "C:\\Keil_v5\\ARM\\PACK\\ARM\\CMSIS\\5.5.1\\CMSIS\\Core\\Include\\cmsis_armcc.h" +|__asm___17_app_tp_transfer_c_e672c05a____REV16| PROC +#line 468 + + rev16 r0, r0 + bx lr + ENDP + AREA ||.revsh_text||, CODE + THUMB + EXPORT |__asm___17_app_tp_transfer_c_e672c05a____REVSH| +#line 482 +|__asm___17_app_tp_transfer_c_e672c05a____REVSH| PROC +#line 483 + + revsh r0, r0 + bx lr + ENDP + +;*** End embedded assembler *** diff --git a/project/ISP_568/Listings/board.txt b/project/ISP_568/Listings/board.txt new file mode 100644 index 0000000..bf82646 --- /dev/null +++ b/project/ISP_568/Listings/board.txt @@ -0,0 +1,63 @@ +; generated by Component: ARM Compiler 5.06 update 6 (build 750) Tool: ArmCC [4d3637] +; commandline ArmCC [--c99 --list --split_sections --debug -c --asm --interleave --gnu -o.\objects\board.o --asm_dir=.\Listings\ --list_dir=.\Listings\ --depend=.\objects\board.d --cpu=Cortex-M0 --apcs=interwork -O3 --diag_suppress=9931 -I..\..\src -I..\..\src\board -I..\..\src\common -I..\..\src\sdk\include -I..\..\src\app\demo -I..\..\src\sdk\include\M0 -I..\..\src\app -I..\..\src\app\module_demo -I..\..\src\app\touch -I..\..\src\app\S8 -I..\..\src\app\S9 -I..\CVWL568 -I.\RTE\_ISP_568 -IC:\Keil_v5\ARM\PACK\ARM\CMSIS\5.5.1\CMSIS\Core\Include -IC:\Keil_v5\ARM\PACK\ARM\CMSIS\5.5.1\Device\ARM\ARMCM0\Include -D__MICROLIB -D__UVISION_VERSION=528 -D_RTE_ -DARMCM0 -DISP_568 --omf_browse=.\objects\board.crf ..\..\src\board\board.c] + THUMB + + AREA ||i.board_Init||, CODE, READONLY, ALIGN=2 + + board_Init PROC +;;;13 +;;;14 void board_Init(void) +000000 b510 PUSH {r4,lr} +;;;15 { +;;;16 hal_system_init(SYSTEM_CLOCK); +000002 4807 LDR r0,|L1.32| +000004 f7fffffe BL hal_system_init +;;;17 hal_system_enable_systick(1); +000008 2001 MOVS r0,#1 +00000a f7fffffe BL hal_system_enable_systick +;;;18 #if !EDA_MODE +;;;19 hal_system_init_console(115200); +00000e 20e1 MOVS r0,#0xe1 +000010 0240 LSLS r0,r0,#9 +000012 f7fffffe BL hal_system_init_console +;;;20 #endif +;;;21 #if defined(ISP_568) || defined(ISP_368) +;;;22 /* 从EFUSE读取DPHY校准值并设置 */ +;;;23 hal_system_set_phy_calibration(true); +000016 2001 MOVS r0,#1 +000018 f7fffffe BL hal_system_set_phy_calibration +;;;24 #endif +;;;25 } +00001c bd10 POP {r4,pc} +;;;26 + ENDP + +00001e 0000 DCW 0x0000 + |L1.32| + DCD 0x04c4b400 + +;*** Start embedded assembler *** + +#line 1 "..\\..\\src\\board\\board.c" + AREA ||.rev16_text||, CODE + THUMB + EXPORT |__asm___7_board_c_bcd01269____REV16| +#line 467 "C:\\Keil_v5\\ARM\\PACK\\ARM\\CMSIS\\5.5.1\\CMSIS\\Core\\Include\\cmsis_armcc.h" +|__asm___7_board_c_bcd01269____REV16| PROC +#line 468 + + rev16 r0, r0 + bx lr + ENDP + AREA ||.revsh_text||, CODE + THUMB + EXPORT |__asm___7_board_c_bcd01269____REVSH| +#line 482 +|__asm___7_board_c_bcd01269____REVSH| PROC +#line 483 + + revsh r0, r0 + bx lr + ENDP + +;*** End embedded assembler *** diff --git a/project/ISP_568/Listings/main.txt b/project/ISP_568/Listings/main.txt new file mode 100644 index 0000000..4909f67 --- /dev/null +++ b/project/ISP_568/Listings/main.txt @@ -0,0 +1,55 @@ +; generated by Component: ARM Compiler 5.06 update 6 (build 750) Tool: ArmCC [4d3637] +; commandline ArmCC [--c99 --list --split_sections --debug -c --asm --interleave --gnu -o.\objects\main.o --asm_dir=.\Listings\ --list_dir=.\Listings\ --depend=.\objects\main.d --cpu=Cortex-M0 --apcs=interwork -O3 --diag_suppress=9931 -I..\..\src -I..\..\src\board -I..\..\src\common -I..\..\src\sdk\include -I..\..\src\app\demo -I..\..\src\sdk\include\M0 -I..\..\src\app -I..\..\src\app\module_demo -I..\..\src\app\touch -I..\..\src\app\S8 -I..\..\src\app\S9 -I..\CVWL568 -I.\RTE\_ISP_568 -IC:\Keil_v5\ARM\PACK\ARM\CMSIS\5.5.1\CMSIS\Core\Include -IC:\Keil_v5\ARM\PACK\ARM\CMSIS\5.5.1\Device\ARM\ARMCM0\Include -D__MICROLIB -D__UVISION_VERSION=528 -D_RTE_ -DARMCM0 -DISP_568 --omf_browse=.\objects\main.crf ..\..\src\app\main.c] + THUMB + + AREA ||i.main||, CODE, READONLY, ALIGN=1 + + main PROC +;;;13 +;;;14 int main() +000000 f7fffffe BL board_Init +;;;15 { +;;;16 // hal_system_init(); +;;;17 board_Init(); +;;;18 +;;;19 while (1) +;;;20 { +;;;21 #if _DEMO_S8_EN +;;;22 ap_demo(); +000004 f7fffffe BL ap_demo + |L1.8| +;;;23 #endif +;;;24 while (1); +000008 e7fe B |L1.8| +;;;25 } +;;;26 } + ENDP + + +;*** Start embedded assembler *** + +#line 1 "..\\..\\src\\app\\main.c" + AREA ||.rev16_text||, CODE + THUMB + EXPORT |__asm___6_main_c_main____REV16| +#line 467 "C:\\Keil_v5\\ARM\\PACK\\ARM\\CMSIS\\5.5.1\\CMSIS\\Core\\Include\\cmsis_armcc.h" +|__asm___6_main_c_main____REV16| PROC +#line 468 + + rev16 r0, r0 + bx lr + ENDP + AREA ||.revsh_text||, CODE + THUMB + EXPORT |__asm___6_main_c_main____REVSH| +#line 482 +|__asm___6_main_c_main____REVSH| PROC +#line 483 + + revsh r0, r0 + bx lr + ENDP + +;*** End embedded assembler *** + + __ARM_use_no_argv EQU 0 diff --git a/project/ISP_568/Objects/WL568_S20U_CSOT667_V100_20230713.bin b/project/ISP_568/Objects/WL568_S20U_CSOT667_V100_20230713.bin new file mode 100644 index 0000000000000000000000000000000000000000..f72eac2914868f50df3f4625e4f49c30bd74f783 GIT binary patch literal 62976 zcmb@ud3+Pc**HG4yE=Wz7s$3SyIRYZIgAV;K#pc5!6KO>;E_Ks z1D^w6Pp4qCJQ<^h0OxV|dfHTOZd*h_X&I{kbg0JwC^Di#g|?|KD6-c(-r z9Kg2@#n%3O0^p3r{{Q+%sOb_?o8Cui0{%__JzPCWA{G(L+HrwNO%cxuk9%}yCW$SA zKhFWbLQb|=o{y$~a?#Zr>Oln#5jpXBTp)N*F}M!DCo%9|;wK)Y0Aw0c{GL!REhc%7 z8fe9&8c%0THuf=7hWlwXseuj&HovVrf2cpSu>Uw#DH6^ffe^BP9<%ghie`}!bHv0z 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zcaL$p`{y|3!3|D)fULhX+pItQs#@>f%d&oVW32V&S97d4zIfMqecu5qynQ#juDxSH z*OoknuFV{du0KBq-59tY-AsdcrtN=1-Z$#C(dJBHFlEjl!Z0{%g^_UPg)x*PLxELVSS=-1.7V +#define SWIRE_DEFAULT_NUM 50 +#else +#define SWIRE_DEFAULT_NUM 38 +#endif + +#define SYNC_LIN_NUMBER 2400 //2400 + +static uint8_t swire_num=SWIRE_DEFAULT_NUM; + +/* Ĭfalse,ʼ־λ,ʹTP1.8V,AC ʼҪTP1.8Vе */ +static volatile bool start_display_on = true; + +#if ENABLE_TP_WAKE_UP +static bool g_need_enter_sleep_mode = false; +#endif + +static bool g_mipi_path_off = false; +extern bool s_screen_init_complate; + +static uint8_t phone_off_flag =0; //绰ϨFLAG=1Ϩ +static bool g_exit_sleep_mode = false; + +/* ʼɱ־λ */ +static bool panel_display_done = false; +//static bool g_panel_init_done = false; +static volatile bool g_resolution_change = false; +static void swire_init(void); +static void soft_disable_mipi_timer_init(void); +void Gpio_swire_output(uint8_t flag, uint8_t num); + +static bool phone_power_on = false; + +#if AUTO_CAL_TP +static uint16_t g_cal_cnt = 100; //3sʱTPУ׼ +#endif + +#ifdef USE_FOR_SUMSUNG_S20U +extern uint8_t Flag_blacklight_EN; +extern uint8_t tp_sleep_in; +extern uint8_t tp_sleep_count; +#endif + +#ifdef USE_FOR_SUMSUNG_S20U +uint8_t phone_DoubleDlick_flag=0; +uint8_t phone_86_flag=0; +uint8_t phone_A6_flag=0; +uint8_t phone_start_flag=0; +uint16_t phone_DisplayOFF_count=0; +uint8_t phone_DisplayOFF_flag=0; +#endif + +#if ADD_TP_CALIBRATION +static volatile bool g_calibration_flag = false; +#endif + +static uint32_t test_count =1; + +uint32_t s_heartbeat = 0; + + +void blue_change_ccm(void) +{ + ccm_coef_t ccm; + ccm.coef_c00 = 250; // 260 + ccm.coef_c01 = 0; + ccm.coef_c02 = 0; + ccm.coef_c10 = 0; + ccm.coef_c11 = 256; // 250 + ccm.coef_c12 = 0; + ccm.coef_c20 = 0; + ccm.coef_c21 = 0; + ccm.coef_c22 = 256; //260 + + hal_dsi_tx_ctrl_set_ccm(ccm); +} + + +static bool ap_dcs_read(uint8_t data_type, uint8_t dcs_cmd, uint8_t param) +{ +#ifdef USE_FOR_SUMSUNG_S20U + static uint8_t b3_read_flag =0; + static uint8_t c8_read_flag =0; + static uint8_t c9_read_flag =0; + static uint8_t c9_read_flag2 =0; + static uint8_t c9_read_flag3 =0; + + uint32_t return_size = hal_dsi_rx_ctrl_get_max_ret_size(g_rx_ctrl_handle); +// TAU_LOGD("r[%x] [%d]", dcs_cmd, return_size); + + if (dcs_cmd == 0xDA) + { + phone_DisplayOFF_flag=1; + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, + DSI_VC_0, + 0x1, 0x81); + phone_power_on = true; + } + else if (dcs_cmd == 0xDB) + { + phone_DisplayOFF_flag=1; + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, + DSI_VC_0, + 0x1, 0x21); //0x1, 0x01); + + } + else if (dcs_cmd == 0xDC) + { + phone_DisplayOFF_flag=1; + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, + DSI_VC_0, + 0x1, 0x04); //0x1, 0x03); + + } + else if (dcs_cmd == 0x01) + { + ap_get_tp_calibration_status_01(g_rx_ctrl_handle, param); + } + else if (dcs_cmd == 0x04) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 3, 0x81,0x01,0x03); + } + else if (dcs_cmd == 0x0A) + { + if (return_size == 3) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 3, 0x9D,0x9D,0x9D); + } + else + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, + DSI_VC_0, + 0x1, 0x9F); + } + } + else if (dcs_cmd == 0x0E) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, + DSI_VC_0, + 0x1, 0x80); + } + else if (dcs_cmd == 0x0F) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, + DSI_VC_0, + 0x1, 0xC0); + } + else if (dcs_cmd == 0xEE) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, + DSI_VC_0, + 0x1, 0x00); + } + else if (dcs_cmd == 0x05) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, + DSI_VC_0, + 0x1, 0x00); + } + else if (dcs_cmd == 0x87) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, + DSI_VC_0, + 0x1, 0x00); + } + else if (dcs_cmd == 0xA1) + { + if (return_size == 11) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + return_size, 0x0B,0xF2,0x0C,0x90,0x9B,0x17,0x0D,0x05,0x0D,0x20,0xBF); + + } + else if (return_size == 10) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + //10, 0x0B,0xF2,0x0C,0x90,0x9B,0x17,0x0D,0x05,0x0D,0x20); + 10, 0x0B,0xF6,0x0C,0x91,0x93,0x0D,0x09,0x15,0x03,0x1A); + + + } + else if (return_size == 4) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 4, 0x0B,0xF2,0x0C,0x90); + + } + else if (return_size == 1) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, + DSI_VC_0, + 1, 0x30); //1, 0xBF); + } + else + { + TAU_LOGD("r[%x] [%d] err", dcs_cmd, return_size); + } + } + else if (dcs_cmd == 0xD6) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + //5, 0x98,0x8E,0xB1,0x79,0x9A); + 5, 0x9B,0x8A,0x35,0x60,0xC2); + + } + else if (dcs_cmd == 0xEC) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 5, 0x00,0x00,0x00,0x00,0x00); + } + else if (dcs_cmd == 0x7F) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 10, 0x40,0x04,0x00,0x00,0x00,0x00,0x3A,0x9B,0x74,0xB0); + } + else if (dcs_cmd == 0xFE) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 10, 0x30,0x08,0x00,0x31,0x00,0x00,0x00,0x00,0x00,0x10); + } + else if (dcs_cmd == 0x5A) + { + static uint8_t flag_5a =0; + if (flag_5a==0) + { + flag_5a =1; + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 41, 0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00); + } + else + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 41, 0x01,0x00,0x01,0x01,0x3B,0x01,0x3B,0x00,0x03,0x01,0x1F,0x00,0xE8,0x00,0xE7,0x00,0xEE,0x00,0x9D,0x00, + 0x85,0x00,0xAB,0x00,0x9D,0x00,0x85,0x00,0xAB,0x00,0x9D,0x00,0x85,0x00,0xAB,0x00,0x9D,0x00,0x85,0x00,0xAB); + } + } + else if (dcs_cmd == 0xB5) + { + if (return_size == 76) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + return_size, + 0x19,0xDC,0x16,0x01,0x44,0x4C,0x7E,0x44,0xB0,0xE2,0x55,0x14,0x46,0x55,0x78,0xAA,0x56,0xDC,0x0E,0x66, + 0x40,0x72,0x66,0xA4,0xD6,0x77,0x08,0x3A,0x77,0x6C,0x9E,0x70,0xD0,0x01,0x02,0x03,0x04,0x05,0x06,0x07, + 0x08,0x09,0x0A,0x0B,0x0C,0x0D,0x0E,0x0F,0x10,0x11,0x12,0x13,0x14,0x14,0x14,0x14,0x14,0x14,0x14,0x14, + 0x01,0x22,0x33,0x44,0x00,0x00,0x06,0x66,0xBB,0x0B,0x01,0x11,0x11,0x10,0x15,0x04); + } + else if (return_size == 75) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + return_size, 0x19,0xDC,0x16,0x01,0x44,0x4C,0x7E,0x44,0xB0,0xE2,0x55,0x14,0x46,0x55,0x78,0xAA,0x56,0xDC,0x0E,0x66,0x40,0x72, + 0x66,0xA4,0xD6,0x77,0x08,0x3A,0x77,0x6C,0x9E,0x70,0xD0,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09,0x0A,0x0B,0x0C,0x0D,0x0E, + 0x0F,0x10,0x11,0x12,0x13,0x14,0x14,0x14,0x14,0x14,0x14,0x14,0x14,0x01,0x22,0x33,0x44,0x00,0x00,0x06,0x66,0xBB,0x0B,0x01,0x11,0x11,0x10,0x15); + } + else if (return_size == 23) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 23, 0x19,0xDC,0x16,0x01,0x44,0x4C,0x7E,0x44,0xB0,0xE2,0x55,0x14,0x46,0x55,0x78,0xAA,0x56,0xDC,0x0E,0x66,0x40,0x72,0x66); + } + else if (return_size == 2) + { + c8_read_flag =0x20; // C8B5棬־0x20 + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_SHORT_RESPONSE_2B, + DSI_VC_0, + //2, 0x15, 0x04); + 2, 0x13, 0x03); + } + else + { + TAU_LOGD("r[%x] [%d] err", dcs_cmd, return_size); + } + + } + else if (dcs_cmd == 0xC8) + { + if (return_size == 144) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + return_size, + 0x00,0x6A,0x20,0xAF,0x5C,0x5A,0x5D,0x5E,0x5C,0x5F,0x49,0x44,0x4B,0x4C,0x46,0x50,0x5C,0x56,0x5E,0x56,0x50, + 0x59,0x35,0x2F,0x3D,0x61,0x6A,0x66,0x66,0x74,0x6A,0x66,0x63,0x43,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x00,0x00,0x00,0x00,0x00,0x00,0x15,0xB1,0xB1,0xB0,0x7B,0x7A,0x7B,0x7A,0x79,0x7C,0x78,0x75,0x79,0x76,0x72, + 0x77,0x75,0x72,0x78,0x74,0x6C,0x76,0x68,0x58,0x6E,0x78,0x76,0x79,0x74,0x81,0x78,0x22,0x20); + } + else if (return_size == 34) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + return_size, + 0x00,0x6A,0x20,0xAF,0x5C,0x5A,0x5D,0x5E,0x5C,0x5F,0x49,0x44,0x4B,0x4C,0x46,0x50,0x5C,0x56,0x5E,0x56,0x50, + 0x59,0x35,0x2F,0x3D,0x61,0x6A,0x66,0x66,0x74,0x6A,0x66,0x63,0x43); + } + else if (return_size == 10) + { + if ((c8_read_flag&0xF0) ==0x10) // C9/B3 + { + if ((c8_read_flag&0x0F) ==0) + { + c8_read_flag |=0x01; + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + //10, 0x00,0x6A,0x20,0xAF,0x5C,0x5A,0x5D,0x5E,0x5C,0x5F); + 10, 0x00,0x6A,0x1A,0xB9,0x5D,0x5B,0x5D,0x5B,0x59,0x5C); + + } + else if ((c8_read_flag&0x0F) ==1) + { + c8_read_flag |=0x02; + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + //10, 0x49,0x44,0x4B,0x4C,0x46,0x50,0x5C,0x56,0x5E,0x56); + 10, 0x4A,0x46,0x4C,0x4E,0x48,0x51,0x5B,0x56,0x5E,0x58); + + } + else + { + c8_read_flag &= 0xF0; + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + //10, 0x50,0x59,0x35,0x2F,0x3D,0x61,0x6A,0x66,0x66,0x74); + 10, 0x51,0x5A,0x3C,0x35,0x41,0x5F,0x68,0x66,0x63,0x70); + + } + } + else // if ((c8_read_flag&0xF0) ==0x20) //B5 + { + if ((c8_read_flag&0x0F) ==0) + { + c8_read_flag |=0x01; + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + //10, 0x15,0xB1,0xB1,0xB0,0x7B,0x7A,0x7B,0x7A,0x79,0x7C); + 10, 0x15,0xB2,0xB2,0xB1,0x79,0x79,0x7A,0x7C,0x7A,0x7C); + + } + else if ((c8_read_flag&0x0F) ==1) + { + c8_read_flag |=0x02; + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + //10, 0x78,0x75,0x79,0x76,0x72,0x77,0x75,0x72,0x78,0x74); + 10, 0x77,0x75,0x79,0x75,0x71,0x77,0x78,0x73,0x79,0x75); + + } + else + { + c8_read_flag &= 0xF0; + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + //10, 0x6C,0x76,0x68,0x58,0x6E,0x78,0x76,0x79,0x74,0x81); + 10, 0x6E,0x77,0x65,0x59,0x6E,0x78,0x75,0x79,0x5A,0x69); + + } + } + + } + else if (return_size == 4) + { + c9_read_flag =0x10; // C9C8棬־0x10 + + if ((c8_read_flag&0xF0) ==0x10) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + //4, 0x6A,0x66,0x63,0x43); + 4, 0x68,0x66,0x63,0x43); + + } + else + { + if (c9_read_flag2 >2) + c8_read_flag =0x10; + + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + //4, 0x78,0x22,0x20,0x00); + 4, 0x67,0x22,0x20,0x00); + + } + } + else + { + TAU_LOGD("r[%x] [%d] err", dcs_cmd, return_size); + } +// c8_read_flag =0x00|(c8_read_flag&0x0F); // C8C8棬־0x20 + } + else if (dcs_cmd == 0xC9) + { + //ԭװеΪc9_read_flag=0X100X20ʱӦֵ + if (return_size == 142) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + return_size, + 0x00,0x31,0x01,0x01,0x9E,0x41,0x33,0x54,0x53,0x31,0x53,0x30,0x39,0x30,0x31,0x38,0x42,0x42,0x32,0x32, + 0x35,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x15,0xAE,0xAE, + 0xAD,0x7B,0x7A,0x7C,0x7B,0x79,0x7B,0x77,0x76,0x79,0x77,0x73,0x77,0x77,0x75,0x79,0x76,0x73,0x78,0x73, + 0x72,0x76,0x82,0x83,0x7F,0x67,0x7B,0x6F,0x44,0x40,0x00,0x00,0x00,0x00,0x2A,0x0F,0x05,0x12,0x71,0x6E, + 0x73,0x75,0x74,0x76,0x70,0x6F,0x72,0x75,0x71,0x74,0x76,0x73,0x78,0x74,0x6D,0x75,0x69,0x5C,0x6F,0x7C, + 0x7E,0x7B,0x64,0x73,0x68,0x00,0x00,0x00,0x00,0x00,0x00,0x2A,0x12,0x08,0x16,0x70,0x6F,0x71,0x76,0x75, + 0x75,0x72,0x6F,0x74,0x72,0x6F,0x73,0x74,0x70,0x77,0x73,0x6B,0x75,0x62,0x4B,0x69,0x73,0x70,0x76,0x3E,0x5B,0x5A); + } + else if (return_size == 105) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + return_size, + 0x00,0x31,0x01,0x01,0x9E,0x41,0x33,0x54,0x53,0x31,0x53,0x30,0x39,0x30,0x31,0x38,0x42,0x42,0x32,0x32, + 0x35,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x15,0xAE,0xAE, + 0xAD,0x7B,0x7A,0x7C,0x7B,0x79,0x7B,0x77,0x76,0x79,0x77,0x73,0x77,0x77,0x75,0x79,0x76,0x73,0x78,0x73, + 0x72,0x76,0x82,0x83,0x7F,0x67,0x7B,0x6F,0x44,0x40,0x00,0x00,0x00,0x00,0x2A,0x0F,0x05,0x12,0x71,0x6E, + 0x73,0x75,0x74,0x76,0x70,0x6F,0x72,0x75,0x71,0x74,0x76,0x73,0x78,0x74,0x6D,0x75,0x69,0x5C,0x6F,0x7C,0x7E,0x7B,0x64,0x73,0x68); + } + else if (return_size == 70) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + return_size, + 0x00,0x31,0x01,0x01,0x9E,0x41,0x33,0x54,0x53,0x31,0x53,0x30,0x39,0x30,0x31,0x38,0x42,0x42,0x32,0x32, + 0x35,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x15,0xAE,0xAE, + 0xAD,0x7B,0x7A,0x7C,0x7B,0x79,0x7B,0x77,0x76,0x79,0x77,0x73,0x77,0x77,0x75,0x79,0x76,0x73,0x78,0x73, + 0x72,0x76,0x82,0x83,0x7F,0x67,0x7B,0x6F,0x44,0x40); + } + else if (return_size == 21) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + return_size, + 0x00,0x31,0x01,0x01,0x9E,0x41,0x33,0x54,0x53,0x31,0x53,0x30,0x39,0x30,0x31,0x38,0x42,0x42,0x32,0x32,0x35); + } + else if (return_size == 10) + { + if ((c9_read_flag&0xF0) ==0) + { + if ((c9_read_flag&0x0F) ==0) + { + c9_read_flag |=0x01; + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + //10, 0x31,0x01,0x01,0x9E,0x41,0x33,0x54,0x53,0x31,0x53); + 10, 0x40,0x01,0x01,0xA0,0x41,0x33,0x54,0x5A,0x31,0x53); + + } + else + { + c9_read_flag &=0xF0; + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + //10, 0x30,0x39,0x30,0x31,0x38,0x42,0x42,0x32,0x32,0x35); + 10, 0x30,0x31,0x43,0x44,0x4E,0x42,0x45,0x30,0x36,0x39); + + } + } + else if ((c9_read_flag&0xF0) ==0x10) // C8 + { + if ((c9_read_flag&0x0F) ==0) + { + c9_read_flag &=0xF0; + c9_read_flag |=0x01; + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + //10, 0x15,0xAE,0xAE,0xAD,0x7B,0x7A,0x7C,0x7B,0x79,0x7B); + 10, 0x15,0xAE,0xAF,0xAE,0x7B,0x7A,0x7B,0x7B,0x7A,0x7C); + + } + else if ((c9_read_flag&0x0F) ==1) + { + c9_read_flag &=0xF0; + c9_read_flag |=0x02; + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + //10, 0x77,0x76,0x79,0x77,0x73,0x77,0x77,0x75,0x79,0x76); + 10, 0x77,0x75,0x79,0x76,0x73,0x77,0x78,0x75,0x7A,0x77); + + } + else + { + c9_read_flag &=0xF0; + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + //10, 0x73,0x78,0x73,0x72,0x76,0x82,0x83,0x7F,0x67,0x7B); + 10, 0x73,0x77,0x6D,0x6B,0x73,0x82,0x85,0x81,0x6A,0x78); + + } + } + else // if ((c9_read_flag&0xF0) ==0x20) //B3 + { + if ((c9_read_flag&0x0F) ==0) + { + c9_read_flag |=0x01; + if (c9_read_flag2 >2) + c9_read_flag2 =0; + + if (c9_read_flag2 >=2) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + //10, 0x2A,0x12,0x08,0x16,0x70,0x6F,0x71,0x76,0x75,0x75); + 10, 0x2A,0x1C,0x11,0x24,0x6E,0x6B,0x6F,0x76,0x76,0x77); + + } + else + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + //10, 0x2A,0x0F,0x05,0x12,0x71,0x6E,0x73,0x75,0x74,0x76); + 10, 0x2A,0x16,0x0B,0x1E,0x70,0x6E,0x72,0x78,0x78,0x78); + + } + c9_read_flag2++; + } + else if ((c9_read_flag&0x0F) ==1) + { + c9_read_flag |=0x02; + if (c9_read_flag2 >2) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + //10, 0x72,0x6F,0x74,0x72,0x6F,0x73,0x74,0x70,0x77,0x73); + 10, 0x71,0x6F,0x71,0x73,0x71,0x76,0x75,0x71,0x77,0x74); + + } + else + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + //10, 0x70,0x6F,0x72,0x75,0x71,0x74,0x76,0x73,0x78,0x74); + 10, 0x6F,0x6D,0x71,0x74,0x72,0x75,0x77,0x73,0x78,0x75); + } + } + else + { + c9_read_flag &=0xF0; + if (c9_read_flag2 >2) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + //10, 0x6B,0x75,0x62,0x4B,0x69,0x73,0x70,0x76,0x3E,0x5B); + 10, 0x6D,0x76,0x50,0x3C,0x5B,0x73,0x6C,0x74,0x40,0x52); + + } + else + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + //10, 0x6D,0x75,0x69,0x5C,0x6F,0x7C,0x7E,0x7B,0x64,0x73); + 10, 0x70,0x77,0x5A,0x52,0x63,0x7A,0x79,0x7A,0x5D,0x6F); + } + } + } + + } + else if (return_size == 4) + { + c8_read_flag =0x10; // C8C9(size=4)棬־0x10 + + c9_read_flag &=0xF0; + if ((c9_read_flag&0xF0) ==0x10) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + //4, 0x6F,0x44,0x40,0x00); + 4, 0x6D,0x44,0x40,0x00); + + } + else + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + //4, 0x6F,0x44,0x40,0x00); + 4, 0x6D,0x44,0x40,0x00); + } + } + else if (return_size == 1) + { + c8_read_flag =0x20; // C8C9(size=1)棬־0x20 + + if ((c9_read_flag&0xF0) ==0x20) + { + if (c9_read_flag2 >2) + { + if (c9_read_flag3) + c9_read_flag3 =0; + else + c9_read_flag3 =1; + + if (c9_read_flag3) + c8_read_flag =0x10; // C8Ϊ0x10 + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, + DSI_VC_0, + 1, 0x58); //1, 0x5A); + } + else + { + c9_read_flag =0x10; // C9Ϊ0x10 + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, + DSI_VC_0, + 1, 0x69); //1, 0x68); + } + } + else + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, + DSI_VC_0, + 1, 0x51); + } + } + else + { + TAU_LOGD("r[%x] [%d] err", dcs_cmd, return_size); + } +// c9_read_flag =0x00|(c9_read_flag&0x0F); // C9C9棬־0x20 + } + else if (dcs_cmd == 0xB3) + { + if (return_size == 39) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + return_size, + 0x21,0x00,0x50,0x00,0x28,0x2A,0x64,0x58,0x69,0x77,0x77,0x77,0x7B,0x7A,0x7B,0x7A,0x7A,0x7A,0x7F,0x7E, + 0x7D,0x7D,0x7E,0x7E,0x7D,0x7E,0x7F,0x7F,0x7A,0x80,0x7B,0x76,0x7A,0x54,0x6C,0x61,0x00,0x00,0x00); + } + else if (return_size == 10) + { + if (b3_read_flag ==0) + { + b3_read_flag =1; + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + //10, 0x2A,0x64,0x58,0x69,0x77,0x77,0x77,0x7B,0x7A,0x7B); + 10, 0x2A,0x6A,0x5F,0x73,0x76,0x74,0x77,0x7D,0x7E,0x7D); + + } + else if (b3_read_flag ==1) + { + b3_read_flag =2; + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + //10, 0x7A,0x7A,0x7A,0x7F,0x7E,0x7D,0x7D,0x7E,0x7E,0x7D); + 10, 0x7A,0x7B,0x7A,0x7C,0x7D,0x7C,0x80,0x80,0x7F,0x7F); + + } + else //if (b3_read_flag ==2) + { + b3_read_flag =0; + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + //10, 0x7E,0x7F,0x7F,0x7A,0x80,0x7B,0x76,0x7A,0x54,0x6C); + 10, 0x7E,0x80,0x6F,0x6C,0x72,0x7E,0x7A,0x7C,0x60,0x70); + + } + + } + else if (return_size == 4) + { + c9_read_flag =0x20; // C9B3棬־0x20 + c8_read_flag =0x10; // C8B3棬־0x10 + + b3_read_flag =0; + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + //4, 0x61,0x00,0x00,0x00); + 4, 0x6B,0x00,0x00,0x00); + + } + else + { + TAU_LOGD("r[%x] [%d] err", dcs_cmd, return_size); + } + } + else + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, + DSI_VC_0, + 1, 0); + TAU_LOGD("r[%x] [%d] err!!!!!!", dcs_cmd, return_size); + } + //TAU_LOGD("r %x\n",dcs_cmd); + return true; +#endif // USE_FOR_SUMSUNG_S20 + +} + +bool ap_tear_flag = true; +/* PPS update callback ڷֱлcase */ +static bool pps_update_handle(uint8_t *pps, uint8_t size, uint32_t pic_width, uint32_t pic_height) +{ + //hal_gpio_set_output_data(IO_PAD_PWMEN, IO_LVL_HIGH); + if (pic_width != g_rx_ctrl_handle->base_info.src_w || pic_height != g_rx_ctrl_handle->base_info.src_h) + { + /* PPS Update ҷֱʷ仯 */ + hal_dsi_rx_ctrl_set_sw_tear_mode(g_rx_ctrl_handle); + g_rx_ctrl_handle->base_info.src_w = pic_width; + g_rx_ctrl_handle->base_info.src_h = pic_height; + /* עⲿֻPPSǰ Compression Mode Command */ + g_rx_ctrl_handle->compress_en = true; //hal_dsi_rx_ctrl_get_compressen_en(g_rx_ctrl_handle); +// g_rx_ctrl_handle->compress_en = hal_dsi_rx_ctrl_get_compressen_en(g_rx_ctrl_handle); + if(pic_width > 720) + { + g_tx_ctrl_handle->base_info.src_w = pic_width; + g_tx_ctrl_handle->base_info.src_h = pic_height; + } + hal_dsi_rx_ctrl_toggle_resolution(g_rx_ctrl_handle); + //*((uint32_t *)(0x40002B04)) = 1; + if(ap_tear_flag){ + hal_dsi_rx_ctrl_set_hw_tear_mode(g_rx_ctrl_handle); + }else{ + hal_dsi_rx_ctrl_set_sw_tear_mode(g_rx_ctrl_handle); + } + } + return true; +} + +static bool ap_update_frame_rate(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +{ + static uint8_t frame_rate = 0; //ÿλʱĻʾ60hzǶȡframe_rateȴ + //TAU_LOGD("frame_rate:[%02X], %d", dcs_packet->packet_param[0], dcs_packet->param_length); + if (frame_rate != dcs_packet->packet_param[0]) + { + frame_rate = dcs_packet->packet_param[0]; + if (frame_rate == 0x00) //120hz + { + hal_dsi_rx_ctrl_set_tear_mode_ex(g_rx_ctrl_handle, SYNC_LIN_NUMBER, TE_SOFT_120HZ_MODE); + // TAU_LOGD("120HZ"); + } + else + { + hal_dsi_rx_ctrl_set_tear_mode_ex(g_rx_ctrl_handle, SYNC_LIN_NUMBER, TE_HW_MODE); + // TAU_LOGD("60HZ"); + } + //TAU_LOGD("frame_rate:%x",frame_rate); + } + return true; +} + +bool g_enter_display_off = false; +bool g_enter_display_ON = false; + +static bool ap_set_display_on(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +{ +// if(g_enter_display_off == true) +{ + // Gpio_swire_output(2,38); + g_enter_display_ON = true; + } + // hal_dsi_tx_ctrl_write_cmd(0x39, 0, 3, 0x51, 0, 0x1F); + // hal_dsi_tx_ctrl_write_cmd(0x05, 0, 2, 0x29); + // TAU_LOGD("disp on"); + return true; +} + +static bool ap_set_display_off(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +{ + Gpio_swire_output(0, 0); + + TAU_LOGD("disp off"); + g_enter_display_off = true; + hal_dsi_tx_ctrl_write_cmd(0x05, 0, 2, 0x28); +// hal_gpio_set_output_data(IO_PAD_PWMEN, IO_LVL_LOW); + return true; +} + +static bool ap_set_enter_sleep_mode(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +{ + hal_dsi_tx_ctrl_write_cmd(0x05, 0, 2, 0x10); +#if ENABLE_TP_WAKE_UP + g_need_enter_sleep_mode = true; +#endif + g_exit_sleep_mode = false; + // TAU_LOGD("enter sleep mode"); + soft_disable_mipi_timer_init(); + return true; +} + +static bool ap_set_exit_sleep_mode(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +{ + TAU_LOGD("exit sleep mode"); + /* AVDD ϵ, ڽϢPPS */ + //hal_gpio_set_output_data(IO_PAD_PWMEN, IO_LVL_HIGH); //leo + g_exit_sleep_mode = true; + + return true; +} + +/***************************************************************************** +*GPIOswire +*flag: =0, SWIRE=0; =1,SWIREź; =2, øٷSWIREź +*num: +*עFLAG=1ʱGPIOʼ!!!!!! +*****************************************************************************/ +#define GPIO_SWIRE_PAD IO_PAD_AP_SWIRE //S20Pʹô +//#define GPIO_SWIRE_PAD IO_PAD_ADCIN //S20Uʹô +void Gpio_swire_output(uint8_t flag, uint8_t num) +{ + uint8_t ii; + + if (flag) + { + if (flag ==2) + { + //hal_gpio_init_output(GPIO_SWIRE_PAD, IO_LVL_HIGH); + hal_gpio_set_output_data(GPIO_SWIRE_PAD, IO_LVL_HIGH); + hal_gpio_set_output_data(IO_PAD_ADCIN, IO_LVL_HIGH); + //delayMs(4); //2 + delayUs(807); + } + for (ii =0; ii< num; ii++) + { + hal_gpio_set_output_data(GPIO_SWIRE_PAD, IO_LVL_LOW); + hal_gpio_set_output_data(IO_PAD_ADCIN, IO_LVL_LOW); + delayUs(9); + hal_gpio_set_output_data(GPIO_SWIRE_PAD, IO_LVL_HIGH); + hal_gpio_set_output_data(IO_PAD_ADCIN, IO_LVL_HIGH); + delayUs(9); + } + } + else + { + hal_gpio_init_output(GPIO_SWIRE_PAD, IO_LVL_LOW); + hal_gpio_init_output(IO_PAD_ADCIN, IO_LVL_LOW); + } +} + +#ifdef ADD_PWM_OUTPUT_FOR_BL +/***************************************************************************** +* @brief pwmԿƱ +* @param init: ǷΪʼһαѡʼ +* @param polarity: ԣfalse:ȸߺͣtrue:ȵͺ +* @param duty_ratio: ռձ(0-100) +* @param frequency: ƵʣλHZ +* @retval null +*****************************************************************************/ +static void test_pwm_out_adjust(bool init, bool polarity, uint8_t duty_ratio, uint32_t frequency) +{ + + pwm_out_ctrl_e ctl0 = PWMO_CTRL_HIGH; + pwm_out_ctrl_e ctl1 = PWMO_CTRL_LOW; + if (polarity) + { + ctl0 = PWMO_CTRL_LOW; + ctl1 = PWMO_CTRL_HIGH; + } + uint32_t period = 1000000 / frequency; //λus + uint32_t thr0 = 0; + uint32_t thr1 = (period * duty_ratio / 100); + + if (duty_ratio == 100) + { + ctl1 = ctl0; + thr1 = period / 2; + } + if (init) + { + hal_pwm_out_init(); + hal_pwm_out_config_all(ctl0, ctl1, thr0, thr1, period); + } + else + { + hal_pwm_out_sync_all(ctl0, ctl1, thr0, thr1, period); + } +} + +void PWM_OUTPUT_TEST(void) +{ + test_pwm_out_adjust(true, true, 30, 20000); + delayMs(2); + test_pwm_out_adjust(false, false, 40, 10000); +} + +#define PWM_PERIOD 1000 //PWM.λUS +#define PWM_MIN 8 //Сֵɵ +static void PWM_init(void) +{ + // 1ms ڳʼ͵ƽ1000 + hal_pwm_out_init(); + hal_pwm_out_config_all(PWMO_CTRL_LOW, PWMO_CTRL_HIGH, 0, PWM_PERIOD, PWM_PERIOD); +} + +static uint16_t read_bl_data =0; +static uint16_t read_bl_data_bak =0; +void PWM_Task(void) +{ +uint16_t pwm_h; + +#ifdef USE_FOR_SUMSUNG_S20 +// s20: read_bl_data = 1~FD + + if(Flag_blacklight_EN) + { + read_bl_data_bak =0; + hal_pwm_out_sync_thr(0, PWM_PERIOD+1); + //printf("Flag_blacklight_EN!!!! read_bl_data[%4x] \n", read_bl_data); + return; + } + + if (g_need_enter_sleep_mode) + { + //ΪϨʱ + read_bl_data_bak =0; + hal_pwm_out_sync_thr(0, PWM_PERIOD-PWM_MIN); //ΪС +// printf("tp_sleep_in!!!! read_bl_data[%4x] \n", read_bl_data); + // return; + } + + if(read_bl_data !=read_bl_data_bak) + { + pwm_h = PWM_PERIOD*read_bl_data/0xFF; + #if 1//Բ + if (pwm_h >700) + pwm_h = 300+(pwm_h-700)*7/3; + else + pwm_h = 1+(pwm_h-1)*3/7; + #endif + if(pwm_h 0: Ϊǡʱ +uint32_t value_reg_ca_bak =0; +uint16_t value_reg_b1_bak =0; +//#define USE_BL_ADJ6 //֮ǰS20ⷽʽ +#define USE_BL_ADJ7 //ĹS20ⷽʽ +uint16_t value_reg51 =0; +uint16_t value_reg51_bak =0; +#endif + +#if 1 // +static bool ap_set_backlight(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +{ + /* AP 0xC 0xb8d , ʱ0xC,ƽҪһŻ */ + uint16_t temp_u16,temp_min,temp_max; + uint16_t temp51_min,temp51_max; + + value_reg_b1 = (dcs_packet->packet_param[0] << 8) + dcs_packet->packet_param[1]; +// printf("B1[%4x],CA[%4x] \n", value_reg_b1, value_reg_ca); +// TAU_LOGD("B1[%x]", value_reg_b1); + +#ifdef USE_BL_ADJ7 + +#if 0//def ADD_PWM_OUTPUT_FOR_BL + if (value_reg_b1 &0x8000) + { + // 60Hz + if(value_reg_ca >0x15FE) + { + read_bl_data = 0xFF; + } + else if(value_reg_ca >=0x1550) + { + // value_reg_ca =0x1550Ӧ105(ǵ⼶Ϊ256) + read_bl_data = 105+(value_reg_ca-0x1550)*150/175; + } + else + { + //value_reg_b1_bak=0xC65~0x1E4Ӧ1~104 + if (value_reg_b1_bak>0xC65) + read_bl_data =1; + else if (value_reg_b1_bak<0x1E4) + read_bl_data =104; + else + read_bl_data = 1+(0xC65-value_reg_b1_bak)*103/2689; + } + } + else if (value_reg_b1 &0x4000) + { + // 120Hz + if(value_reg_ca >0x15AD) + { + read_bl_data = 0xFF; + } + else if(value_reg_ca >=0x150F) + { + // value_reg_ca =0x15AD~0x150FӦ256~109(ǵ⼶Ϊ256) + read_bl_data = 109+(value_reg_ca-0x150F)*146/158; + } + else + { + //value_reg_b1_bak=0xC54~0x1E4Ӧ1~108 + if (value_reg_b1_bak>0xC54) + read_bl_data =1; + else if (value_reg_b1_bak<0x1E4) + read_bl_data =108; + else + read_bl_data = 1+(0xC54-value_reg_b1_bak)*107/2672; + } + } + else + { + value_reg_b1_bak = value_reg_b1; + if ((value_reg_ca ==0x2A00) &&(value_reg_b1 >0x500)) + s20_power_on_flag =1; + else + s20_power_on_flag =0; + } + + +#else + if (dcs_packet->param_length ==1) + { + if (bl_adj_flag) + { + // ֻ120Hzģʽ¡CAΪ0 + if(value_reg_b1_bak <=0x222) + { + switch(value_reg_ca) + { + case 0: + case 1: + value_reg51 = 255; //255 + break; + + case 2: + value_reg51 = 252; + break; + + case 3: + value_reg51 = 249; + break; + + case 4: + value_reg51 = 245; + break; + + case 5: + value_reg51 = 239; + break; + + case 6: + value_reg51 = 235; + break; + + case 7: + case 8: + value_reg51 = 229; + break; + + case 9: + value_reg51 = 222; + break; + + case 10: + value_reg51 = 212; + break; + + case 11: + value_reg51 = 207; + break; + + case 12: + value_reg51 = 203; + break; + + case 13: + value_reg51 = 200; + break; + + case 14: + value_reg51 = 198; + break; + + case 15: + value_reg51 = 195; + break; + + case 16: + value_reg51 = 189; + break; + + case 17: + value_reg51 = 182; + break; + + case 18: + value_reg51 = 178; + break; + + case 19: + value_reg51 = 175; + break; + + case 20: + value_reg51 = 171; + break; + + default: + case 21: + value_reg51 = 168; + break; + } + } + else if(value_reg_b1_bak <=0x55B) + { + // value_reg_b1_bak =0x55B ~ 0x22BӦ130 ~ 167(ǵ⼶Ϊ256) + temp_max = 0x55B; + temp_min = 0x22B; + + temp51_max =167; + temp51_min =130; + if(value_reg_b1_bak<=temp_min) + value_reg51 =temp51_max; + else if(value_reg_b1_bak>=temp_max) + value_reg51 =temp51_min; + else + value_reg51 = temp51_max - (value_reg_b1_bak-temp_min)*(temp51_max-temp51_min)/(temp_max-temp_min); + } + else if(value_reg_b1_bak ==0x56F) + { + if(value_reg_ca <0x27) + { + value_reg51 = 122; + } + else if(value_reg_ca <0x2D) + { + value_reg51 = 116; + } + else if(value_reg_ca <0x30) + { + value_reg51 = 112; + } + else if(value_reg_ca <0x3B) + { + value_reg51 = 108; + } + else if(value_reg_ca <0x40) + { + value_reg51 = 105; + } + else if(value_reg_ca <0x50) + { + value_reg51 = 103; + } + else + { + value_reg51 = 101; + } + } + else if(value_reg_b1_bak <=0xB3B) + { + // value_reg_b1_bak =0xB3B ~ 0x589Ӧ55~ 100(ǵ⼶Ϊ256) + temp_max = 0xB3B; + temp_min = 0x589; + + temp51_max =100; + temp51_min =55; + if(value_reg_b1_bak<=temp_min) + value_reg51 =temp51_max; + else if(value_reg_b1_bak>=temp_max) + value_reg51 =temp51_min; + else + value_reg51 = temp51_max - (value_reg_b1_bak-temp_min)*(temp51_max-temp51_min)/(temp_max-temp_min); + } + else if(value_reg_b1_bak <=0xBF9) + { + // value_reg_b1_bak =0xB44 ~ 0xBF9Ӧ54~ 37(ǵ⼶Ϊ256) + temp_max = 0xBF9; + temp_min = 0xB44; + + temp51_max =54; + temp51_min =37; + if(value_reg_b1_bak<=temp_min) + value_reg51 =temp51_max; + else if(value_reg_b1_bak>=temp_max) + value_reg51 =temp51_min; + else + value_reg51 = temp51_max - (value_reg_b1_bak-temp_min)*(temp51_max-temp51_min)/(temp_max-temp_min); + } + else + { + // value_reg_b1_bak =0xC0B ~ 0xC71Ӧ36 ~ 1(ǵ⼶Ϊ256) + temp_max = 0xC71; + temp_min = 0xC0B; + + temp51_max =36; + temp51_min =1; + if(value_reg_b1_bak<=temp_min) + value_reg51 =temp51_max; + else if(value_reg_b1_bak>=temp_max) + value_reg51 =temp51_min; + else + value_reg51 = temp51_max - (value_reg_b1_bak-temp_min)*(temp51_max-temp51_min)/(temp_max-temp_min); + } + } + else if (dcs_packet->packet_param[0] &0x80) + { + //Ϊ60Hz + if(value_reg_ca >=0x15C0) + { + // value_reg51 = 0xC0~ 0xFF + if(value_reg_ca >=0x15FF) + value_reg51 = 0xFF; + else + value_reg51 = value_reg_ca&0xFF; + } + else if(value_reg_ca >0x15B8) + { + // value_reg51 = 0x90~ 0xC0 + temp_max = 0x573; + temp_min = 0x1EE; + + temp51_max =0xC0; + temp51_min =0x90; + if(value_reg_b1_bak<=temp_min) + value_reg51 =temp51_max; + else if(value_reg_b1_bak>=temp_max) + value_reg51 =temp51_min; + else + value_reg51 = temp51_max - (value_reg_b1_bak-temp_min)*(temp51_max-temp51_min)/(temp_max-temp_min); + } + else if(value_reg_ca >=0x156D) + { + // value_reg51 = 0x70~ 0x90 + temp_max = 0x15B8; + temp_min = 0x156D; + + temp51_max =0x90; + temp51_min =0x70; + if(value_reg_ca <=temp_min) + value_reg51 =temp51_min; + else if(value_reg_ca>=temp_max) + value_reg51 =temp51_max; + else + value_reg51 = temp51_min + (value_reg_ca-temp_min)*(temp51_max-temp51_min)/(temp_max-temp_min); + } + else + { + // value_reg51 = 0x10~ 0x70 + temp_max = 0xC77; + temp_min = 0x587; + + temp51_max =0x70; + temp51_min =1; + if(value_reg_b1_bak<=temp_min) + value_reg51 =temp51_max; + else if(value_reg_b1_bak>=temp_max) + value_reg51 =temp51_min; + else + value_reg51 = temp51_max - (value_reg_b1_bak-temp_min)*(temp51_max-temp51_min)/(temp_max-temp_min); + + } + } + else //if (dcs_packet->packet_param[0] &0x40) + { + //Ϊ120Hz + if(value_reg_ca >=0x156D) + { + // value_reg51 = 0xBE~ 0xFF + if(value_reg_ca >=0x15AE) + value_reg51 = 0xFF; + else + value_reg51 = (value_reg_ca&0xFF)+0x51; + } + else if(value_reg_ca >0x1564) + { + // value_reg51 = 0x90~ 0xBE + temp_max = 0x56F; + temp_min = 0x1ED; + + temp51_max =0xBE; + temp51_min =0x90; + if(value_reg_b1_bak<=temp_min) + value_reg51 =temp51_max; + else if(value_reg_b1_bak>=temp_max) + value_reg51 =temp51_min; + else + value_reg51 = temp51_max - (value_reg_b1_bak-temp_min)*(temp51_max-temp51_min)/(temp_max-temp_min); + } + else if(value_reg_ca >=0x1518) + { + // value_reg51 = 0x70~ 0x90 + temp_max = 0x1518; + temp_min = 0x1564; + + temp51_max =0x90; + temp51_min =0x70; + if(value_reg_ca <=temp_min) + value_reg51 =temp51_min; + else if(value_reg_ca>=temp_max) + value_reg51 =temp51_max; + else + value_reg51 = temp51_min + (value_reg_ca-temp_min)*(temp51_max-temp51_min)/(temp_max-temp_min); + } + else + { + // value_reg51 = 0x01~ 0x70 + temp_max = 0xC71; + temp_min = 0x5A2; + + temp51_max =0x70; + temp51_min =0x01; + if(value_reg_b1_bak<=temp_min) + value_reg51 =temp51_max; + else if(value_reg_b1_bak>=temp_max) + value_reg51 =temp51_min; + else + value_reg51 = temp51_max - (value_reg_b1_bak-temp_min)*(temp51_max-temp51_min)/(temp_max-temp_min); + + } + } + + if (value_reg51 != value_reg51_bak) + { + #if 0// 1: ƽһ + if (value_reg51 <0x41) + { + temp_max = 0x40; + temp_min = 1; + + temp51_max =0x100; + temp51_min =0x10; + + temp_u16 = temp51_min + (value_reg51-temp_min)*(temp51_max-temp51_min)/(temp_max-temp_min); + } + else if (value_reg51 <0x81) + { + temp_max = 0x80; + temp_min = 41; + + temp51_max =0x400; + temp51_min =0x101; + + temp_u16 = temp51_min + (value_reg51-temp_min)*(temp51_max-temp51_min)/(temp_max-temp_min); + } + else + { + temp_max = 0xFF; + temp_min = 0x81; + + temp51_max =0xDBB; + temp51_min =0x401; + + temp_u16 = temp51_min + (value_reg51-temp_min)*(temp51_max-temp51_min)/(temp_max-temp_min); + } + + #else + temp_u16=(value_reg51-0x01)*15+0xB0; + // temp_u16 = value_reg51*0xFFF/0xFF; + #endif + //temp_u16 = value_reg51; + + // + // if (temp_u16 <0x3F) + // temp_u16 = 0X3F; + if(temp_u16 == 0x1be) + { + temp_u16 = 0x1cd; + } + //Ϣѱ + if(phone_power_on == true||g_enter_display_ON == true) + { + hal_dsi_tx_ctrl_write_cmd(0x39, 0, 3, 0x51, temp_u16>>8, temp_u16&0xFF); + } + // if(g_enter_display_ON == false) + else { + + hal_dsi_tx_ctrl_write_cmd(0x39, 0, 3, 0x51, 0, 0x01); //0x001F + } + phone_power_on = false; + //hal_dsi_tx_ctrl_write_cmd(0x39, 0, 3, 0x51, 0, 0xF4); + value_reg51_bak = value_reg51; + // printf("B1[%4x],CA[%4x] \n", value_reg_b1, value_reg_ca); + // TAU_LOGD("B1[%4x],CA[%4x],51[%02x], value_reg51[%02x]", value_reg_b1, value_reg_ca, value_reg51 , temp_u16); + } + } + +#endif + +#endif // // USE_BL_ADJ7 + + return true; +} +#endif + +static bool ap_get_reg_ca(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +{ + bl_adj_flag =0; + value_reg_ca = (dcs_packet->packet_param[0] << 8)+ dcs_packet->packet_param[1]; + if (value_reg_ca ==0) + { + bl_adj_flag =1; + value_reg_ca = dcs_packet->packet_param[5]; + } + value_reg_b1_bak = value_reg_b1; + return true; +} + +#if 0 +static bool ap_get_reg_b5(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +{ + value_reg_b5 = (dcs_packet->packet_param[3] << 8) + dcs_packet->packet_param[2]; + TAU_LOGD("CA[%4x],B1[%4x],B5[%4x]", value_reg_ca,value_reg_b1,value_reg_b5); + + return true; +} +#endif + +#ifdef ADD_PANEL_DISPLAY_MODE +uint8_t panel_mode =1; // DFĴ100:ۿ,01:۹,11:3(ӰԺ/Ƭ/.Ŀǰû) +uint16_t panel_r,panel_g,panel_b; // ¼RGBֵ + +#ifdef USE_FOR_SUMSUNG_S9PLUS +#define RATIO_VALUE 2 //Żϵ +#else +#define RATIO_VALUE 2 //Żϵ +#endif + +#endif + + +static bool ap_get_reg_df(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +{ + ccm_coef_t ccm; + ccm.coef_c00 = 255; + ccm.coef_c01 = 0; + ccm.coef_c02 = 0; + ccm.coef_c10 = 0; + ccm.coef_c11 = 255; + ccm.coef_c12 = 0; + ccm.coef_c20 = 0; + ccm.coef_c21 = 0; + ccm.coef_c22 = 255; + +#ifdef ADD_PANEL_DISPLAY_MODE + value_reg_df = (dcs_packet->packet_param[35] << 8) + dcs_packet->packet_param[33]; + panel_mode = dcs_packet->packet_param[0]; + panel_r =dcs_packet->packet_param[49]; + panel_g =dcs_packet->packet_param[51]; + panel_b =dcs_packet->packet_param[53]; +// TAU_LOGD("value_reg_df[%4x],panel_mode[%4x],panel_r[%4x],panel_g[%4x],panel_b[%4x]", value_reg_df,panel_mode,panel_r,panel_g,panel_b); + + if (panel_mode ==00) + { + //ģʽ + + #ifdef USE_FOR_S10_BLUE_MODE + //panel_r =256-RATIO_VALUE*(0xFF-panel_r); + //panel_g =256-RATIO_VALUE*(0xFF-panel_g); + //panel_b =256-RATIO_VALUE*(0xFF-panel_b); +// hal_dsi_rx_ctrl_set_cus_pq_gain(g_rx_ctrl_handle,panel_r,panel_g,panel_b); + ccm.coef_c00 = panel_r; + ccm.coef_c11 = panel_g; + ccm.coef_c22 = panel_b; + hal_dsi_tx_ctrl_set_ccm(ccm); + + #else + + value_reg_df =value_reg_df&0xFF; + switch(value_reg_df) + { + case 0xC1: + case 0xC3: + value_blue = BLUE_MIN; + break; + + case 0xCF: + case 0xD0: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)/BLUE_STEP; + break; + + case 0xD8: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*2/BLUE_STEP; + break; + + case 0xDE: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*3/BLUE_STEP; + break; + + case 0xE4: + case 0xE5: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*4/BLUE_STEP; + break; + + case 0xE9: + case 0xEA: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*5/BLUE_STEP; + break; + + case 0xED: + case 0xEE: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*6/BLUE_STEP; + break; + + case 0xF1: + case 0xF2: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*7/BLUE_STEP; + break; + + case 0xF4: + case 0xF5: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*8/BLUE_STEP; + break; + + case 0xF7: + case 0xF8: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*9/BLUE_STEP; + break; + + case 0xFA: + value_blue = BLUE_MAX; + break; + + default: + case 0xFF: + value_blue = 0; + break; + + } + hal_dsi_rx_ctrl_set_cus_pq_gain(g_rx_ctrl_handle,256,256,256); + hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0x84, value_blue); + + #endif + + } + else + { + #ifndef USE_FOR_S10_BLUE_MODE + value_blue =0; + hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0x84, value_blue); //ģʽs8+/s9+ + #endif + + //һ㣬ЧԡҪݿͻҪϸ + panel_r =208-RATIO_VALUE*(0xFF-panel_r); //230 + panel_g =218-RATIO_VALUE*(0xFF-panel_g); //235 + panel_b =218-RATIO_VALUE*(0xFF-panel_b); //235 +// hal_dsi_rx_ctrl_set_cus_pq_gain(g_rx_ctrl_handle,panel_r,panel_g,panel_b); + + ccm.coef_c00 = panel_r; + ccm.coef_c11 = panel_g; + ccm.coef_c22 = panel_b; + if((panel_r == 256)&&(panel_g == 256)&&(panel_b == 256)) + { + blue_change_ccm(); + } + else + hal_dsi_tx_ctrl_set_ccm(ccm); + } + + #ifndef USE_FOR_S10_BLUE_MODE + if (blue_flag==0) + { + blue_flag =1; + delayMs(20); + hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0x84, value_blue); + } + #endif + +#else + value_reg_df = (dcs_packet->packet_param[35] << 8) + dcs_packet->packet_param[33]; + + value_reg_df =value_reg_df&0xFF; + switch(value_reg_df) + { + case 0xC1: + case 0xC3: + value_blue = BLUE_MIN; + break; + + case 0xCF: + case 0xD0: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)/BLUE_STEP; + break; + + case 0xD8: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*2/BLUE_STEP; + break; + + case 0xDE: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*3/BLUE_STEP; + break; + + case 0xE4: + case 0xE5: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*4/BLUE_STEP; + break; + + case 0xE9: + case 0xEA: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*5/BLUE_STEP; + break; + + case 0xED: + case 0xEE: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*6/BLUE_STEP; + break; + + case 0xF1: + case 0xF2: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*7/BLUE_STEP; + break; + + case 0xF4: + case 0xF5: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*8/BLUE_STEP; + break; + + case 0xF7: + case 0xF8: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*9/BLUE_STEP; + break; + + case 0xFA: + value_blue = BLUE_MAX; + break; + + default: + case 0xFF: + value_blue = 0; + break; + + } + + TAU_LOGD("df[%4x]", value_reg_df); + hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0x84, value_blue); + if (blue_flag==0) + { + blue_flag =1; + delayMs(20); + hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0x84, value_blue); + } +#endif + + return true; +} + + +#if 0 +static bool ap_get_reg_df(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +{ + ccm_coef_t ccm; + ccm.coef_c00 = 255; + ccm.coef_c01 = 0; + ccm.coef_c02 = 0; + ccm.coef_c10 = 0; + ccm.coef_c11 = 255; + ccm.coef_c12 = 0; + ccm.coef_c20 = 0; + ccm.coef_c21 = 0; + ccm.coef_c22 = 255; + +#ifdef ADD_PANEL_DISPLAY_MODE + value_reg_df = (dcs_packet->packet_param[35] << 8) + dcs_packet->packet_param[33]; + panel_mode = dcs_packet->packet_param[0]; + panel_r =dcs_packet->packet_param[49]; + panel_g =dcs_packet->packet_param[51]; + panel_b =dcs_packet->packet_param[53]; +// TAU_LOGD("value_reg_df[%4x],panel_mode[%4x],panel_r[%4x],panel_g[%4x],panel_b[%4x]", value_reg_df,panel_mode,panel_r,panel_g,panel_b); + + if (panel_mode ==00) + { + //ģʽ + + #ifdef USE_FOR_S10_BLUE_MODE + //panel_r =256-RATIO_VALUE*(0xFF-panel_r); + //panel_g =256-RATIO_VALUE*(0xFF-panel_g); + //panel_b =256-RATIO_VALUE*(0xFF-panel_b); +// hal_dsi_rx_ctrl_set_cus_pq_gain(g_rx_ctrl_handle,panel_r,panel_g,panel_b); + ccm.coef_c00 = panel_r; + ccm.coef_c11 = panel_g; + ccm.coef_c22 = panel_b; + hal_dsi_tx_ctrl_set_ccm(ccm); + + #else + + value_reg_df =value_reg_df&0xFF; + switch(value_reg_df) + { + case 0xC1: + case 0xC3: + value_blue = BLUE_MIN; + break; + + case 0xCF: + case 0xD0: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)/BLUE_STEP; + break; + + case 0xD8: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*2/BLUE_STEP; + break; + + case 0xDE: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*3/BLUE_STEP; + break; + + case 0xE4: + case 0xE5: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*4/BLUE_STEP; + break; + + case 0xE9: + case 0xEA: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*5/BLUE_STEP; + break; + + case 0xED: + case 0xEE: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*6/BLUE_STEP; + break; + + case 0xF1: + case 0xF2: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*7/BLUE_STEP; + break; + + case 0xF4: + case 0xF5: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*8/BLUE_STEP; + break; + + case 0xF7: + case 0xF8: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*9/BLUE_STEP; + break; + + case 0xFA: + value_blue = BLUE_MAX; + break; + + default: + case 0xFF: + value_blue = 0; + break; + + } + hal_dsi_rx_ctrl_set_cus_pq_gain(g_rx_ctrl_handle,256,256,256); + hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0x84, value_blue); + + #endif + + } + else + { + #ifndef USE_FOR_S10_BLUE_MODE + value_blue =0; + hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0x84, value_blue); //ģʽs8+/s9+ + #endif + + //һ㣬ЧԡҪݿͻҪϸ + panel_r =256-RATIO_VALUE*(0xFF-panel_r); + panel_g =256-RATIO_VALUE*(0xFF-panel_g); + panel_b =256-RATIO_VALUE*(0xFF-panel_b); +// hal_dsi_rx_ctrl_set_cus_pq_gain(g_rx_ctrl_handle,panel_r,panel_g,panel_b); + + ccm.coef_c00 = panel_r; + ccm.coef_c11 = panel_g; + ccm.coef_c22 = panel_b; + hal_dsi_tx_ctrl_set_ccm(ccm); + } + + #ifndef USE_FOR_S10_BLUE_MODE + if (blue_flag==0) + { + blue_flag =1; + delayMs(20); + hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0x84, value_blue); + } + #endif + +#else + value_reg_df = (dcs_packet->packet_param[35] << 8) + dcs_packet->packet_param[33]; + + value_reg_df =value_reg_df&0xFF; + switch(value_reg_df) + { + case 0xC1: + case 0xC3: + value_blue = BLUE_MIN; + break; + + case 0xCF: + case 0xD0: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)/BLUE_STEP; + break; + + case 0xD8: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*2/BLUE_STEP; + break; + + case 0xDE: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*3/BLUE_STEP; + break; + + case 0xE4: + case 0xE5: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*4/BLUE_STEP; + break; + + case 0xE9: + case 0xEA: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*5/BLUE_STEP; + break; + + case 0xED: + case 0xEE: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*6/BLUE_STEP; + break; + + case 0xF1: + case 0xF2: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*7/BLUE_STEP; + break; + + case 0xF4: + case 0xF5: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*8/BLUE_STEP; + break; + + case 0xF7: + case 0xF8: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*9/BLUE_STEP; + break; + + case 0xFA: + value_blue = BLUE_MAX; + break; + + default: + case 0xFF: + value_blue = 0; + break; + + } + + TAU_LOGD("df[%4x]", value_reg_df); + hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0x84, value_blue); + if (blue_flag==0) + { + blue_flag =1; + delayMs(20); + hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0x84, value_blue); + } +#endif + + return true; +} +#endif + + +static bool ap_set_tear_on(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +{ + hal_dsi_rx_ctrl_set_hw_tear_mode(g_rx_ctrl_handle); + ap_tear_flag = true; +// printf("tear on\n"); + return true; +} + +/* ƻDCS command */ +static const hal_dcs_execute_entry_t g_cus_rx_dcs_execute_table[] = +{ + {DCS_SET_DISPLAY_ON, ap_set_display_on, true}, + {DCS_SET_DISPLAY_OFF, ap_set_display_off, true}, + {0xDF, ap_get_reg_df, false}, // + {0xCA, ap_get_reg_ca, false}, // ⡣ҪB1ܵ + {0xB1, ap_set_backlight, false}, + {0x60, ap_update_frame_rate, true}, +// {0x35, ap_set_tear_on, true}, + {DCS_ENTER_SLEEP_MODE, ap_set_enter_sleep_mode, true}, + {DCS_EXIT_SLEEP_MODE, ap_set_exit_sleep_mode, true}, +#if ADD_TP_CALIBRATION +// TP calibration + {0x04, ap_set_tp_calibration_04, true}, +#endif + {0, NULL, false} //{0,NULL,false} һ̶ԱΪtableβжϱ׼ +}; + +static void tx_panel_reset(void) +{ +#ifdef USE_WL518_INTERNAL_FLASH + hal_system_share_flash_mode(true); +#endif + +#if USE_FIRST_CODE + hal_dsi_tx_ctrl_panel_reset_pin(IO_LVL_HIGH); + delayMs(10); //10ms + hal_dsi_tx_ctrl_panel_reset_pin(IO_LVL_LOW); + delayMs(10); //10ms + hal_dsi_tx_ctrl_panel_reset_pin(IO_LVL_HIGH); + delayMs(10); +#else + //20221103 ڶģʱ򣬰εоҪ + hal_dsi_tx_ctrl_panel_reset_pin(IO_LVL_HIGH); + delayMs(50); //10ms + hal_dsi_tx_ctrl_panel_reset_pin(IO_LVL_LOW); + delayMs(50); //10ms + hal_dsi_tx_ctrl_panel_reset_pin(IO_LVL_HIGH); + delayMs(50); +#endif +} + + +#if PANEL_INIT_CODE_ARRAY +static void send_panel_init_code(uint32_t size, uint8_t * data) +{ + uint32_t data_offeset = 0; + uint8_t data_type; + uint8_t vc; + uint8_t data_size; + uint8_t * p_data; + + while(data_offeset < size) + { + data_type = data[data_offeset]; + vc = data[data_offeset + 1]; + data_size = data[data_offeset + 2]; + p_data = &data[data_offeset + 3]; + hal_dsi_tx_ctrl_write_array_cmd(data_type, vc, data_size, p_data); + data_offeset = data_offeset + data_size + 3; + delayUs(50); + } +} + + +uint8_t panel_init_code[] = { +#if AMOLED_NT37701_CSOT667 + 0x39, 0, 6, 0xF0,0x55,0xAA,0x52,0x08,0x00, + 0x39, 0, 9, 0xBA,0x02,0x79,0x00,0x14,0x03,0x9C,0x00,0x01, + 0x39, 0, 2, 0x6F,0x08, + 0x39, 0, 9, 0xBA,0x01,0xAF,0x00,0x14,0x00,0x1C,0x00,0x00, + 0x39, 0, 2, 0x6F,0x10, + 0x39, 0, 8, 0xBA,0x01,0x66,0x00,0x14,0x00,0x1C,0x00, + 0x39, 0, 9, 0xBB,0x02,0x79,0x00,0x14,0x03,0x9C,0x00,0x21, + 0x39, 0, 2, 0xB5,0x84, + 0x39, 0, 2, 0x6F,0x06, + 0x39, 0, 4, 0xB5,0x2B,0x0C,0x33, + 0x39, 0, 2, 0x6F,0x0B, + 0x39, 0, 4, 0xB5,0x2B,0x23,0x33, + 0x39, 0, 2, 0x6F,0x10, + 0x39, 0, 6, 0xB5,0x0C,0x0C,0x0C,0x0C,0x0C, + 0x39, 0, 2, 0x6F,0x01, + 0x39, 0, 2, 0xB6,0x19, + 0x39, 0, 19, 0xB7,0x99,0x99,0x99,0x99,0x99,0x99,0x87,0x65,0x43,0x32,0x10,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x13, + 0x39, 0, 13, 0xB7,0x00,0x00,0x01,0x13,0x78,0x89,0x9A,0xAB,0xBC,0xCD,0xDE,0xEF, + 0x39, 0, 2, 0x6F,0x1F, + 0x39, 0, 25, 0xB7,0x08,0x31,0x66,0x8F,0xF5,0xC1,0xC2,0x33,0xFF,0x7F,0xFF,0x7F,0xFF,0x7F,0xFF,0x7F,0xFF,0x7F,0xFF,0x7F,0xFF,0x7F,0xFF,0xFF, + 0x39, 0, 3, 0xB2,0x98,0x60, + 0x39, 0, 2, 0x6F,0x09, + 0x39, 0, 2, 0xB2,0x40, + 0x39, 0, 2, 0x6F,0x0F, + 0x39, 0, 9, 0xB2,0x20,0x20,0x21,0xC2,0x21,0xC2,0x2F,0xFF, + 0x39, 0, 13, 0xB3,0x00,0x08,0x00,0x1C,0x00,0x1C,0x00,0x3C,0x00,0x3C,0x00,0x70, + 0x39, 0, 2, 0x6F,0x0C, + 0x39, 0, 13, 0xB3,0x00,0x70,0x00,0xC8,0x00,0xC8,0x01,0x48,0x01,0x48,0x01,0xAD, + 0x39, 0, 2, 0x6F,0x18, + 0x39, 0, 13, 0xB3,0x01,0xAD,0x01,0xC2,0x01,0xC2,0x01,0xC2,0x07,0xFF,0x0F,0xFF, + 0x39, 0, 2, 0x6F,0x24, + 0x39, 0, 9, 0xB3,0x01,0x55,0x08,0xCC,0x08,0xCC,0x0F,0xFF, + 0x39, 0, 2, 0x6F,0x2C, + 0x39, 0, 15, 0xB3,0x09,0x90,0x08,0xDC,0x08,0x70,0x08,0x70,0x07,0xC8,0x07,0xC8,0x06,0xB8, + 0x39, 0, 2, 0x6F,0x3A, + 0x39, 0, 13, 0xB3,0x06,0xB8,0x04,0xE8,0x04,0xE8,0x02,0x48,0x02,0x48,0x00,0x38, + 0x39, 0, 2, 0x6F,0x46, + 0x39, 0, 13, 0xB3,0x00,0x38,0x00,0x38,0x00,0x38,0x00,0x38,0x00,0x38,0x00,0x38, + 0x39, 0, 15, 0xB4,0x0D,0x10,0x0C,0x1C,0x0B,0x88,0x0B,0x88,0x0A,0xA0,0x0A,0xA0,0x09,0x28, + 0x39, 0, 2, 0x6F,0x0E, + 0x39, 0, 13, 0xB4,0x09,0x28,0x06,0xB0,0x06,0xB0,0x03,0x18,0x03,0x18,0x00,0x48, + 0x39, 0, 2, 0x6F,0x1A, + 0x39, 0, 13, 0xB4,0x00,0x48,0x00,0x48,0x00,0x48,0x00,0x48,0x00,0x48,0x00,0x48, + 0x39, 0, 2, 0x6F,0x26, + 0x39, 0, 11, 0xB4,0x0D,0x10,0x00,0x48,0x00,0x48,0x00,0x48,0x00,0x48, + 0x39, 0, 2, 0x6F,0x30, + 0x39, 0, 15, 0xB4,0x09,0x90,0x08,0xDC,0x08,0x70,0x08,0x70,0x07,0xC8,0x07,0xC8,0x06,0xB8, + 0x39, 0, 2, 0x6F,0x3E, + 0x39, 0, 13, 0xB4,0x06,0xB8,0x04,0xE8,0x04,0xE8,0x02,0x48,0x02,0x48,0x00,0x38, + 0x39, 0, 2, 0x6F,0x4A, + 0x39, 0, 13, 0xB4,0x00,0x38,0x00,0x38,0x00,0x38,0x00,0x38,0x00,0x38,0x00,0x38, + 0x39, 0, 2, 0x6F,0xAC, + 0x39, 0, 21, 0xB2,0x0F,0xFF,0x0F,0xFF,0x08,0x09,0x08,0x6C,0x08,0xCA,0x09,0x24,0x09,0x79,0x09,0xCB,0x0A,0x1A,0x0A,0x66, + 0x39, 0, 2, 0x6F,0xC0, + 0x39, 0, 21, 0xB2,0x0A,0xB0,0x0A,0xF7,0x0B,0x3D,0x0B,0x80,0x0B,0xC1,0x0C,0x01,0x0C,0x40,0x0C,0x7C,0x0C,0xB8,0x0C,0xF2, + 0x39, 0, 2, 0x6F,0xD4, + 0x39, 0, 21, 0xB2,0x0D,0x2B,0x0D,0x63,0x0D,0x9A,0x0D,0xCF,0x0E,0x04,0x0E,0x38,0x0E,0x6B,0x0E,0x9D,0x0E,0xCF,0x0E,0xFF, + 0x39, 0, 2, 0x6F,0xE8, + 0x39, 0, 11, 0xB2,0x0F,0x2F,0x0F,0x5E,0x0F,0x8D,0x0F,0xBB,0x0F,0xFF, + 0x39, 0, 2, 0x6F,0x52, + 0x39, 0, 21, 0xB3,0x01,0xC2,0x01,0xC3,0x01,0xF5,0x02,0x27,0x02,0x59,0x02,0x8B,0x02,0xBD,0x02,0xEF,0x03,0x21,0x03,0x53, + 0x39, 0, 2, 0x6F,0x66, + 0x39, 0, 21, 0xB3,0x03,0x84,0x03,0xB6,0x03,0xE8,0x04,0x1A,0x04,0x4C,0x04,0x7E,0x04,0xB0,0x04,0xE2,0x05,0x14,0x05,0x46, + 0x39, 0, 2, 0x6F,0x7A, + 0x39, 0, 21, 0xB3,0x05,0x78,0x05,0xA9,0x05,0xDB,0x06,0x0D,0x06,0x3F,0x06,0x71,0x06,0xA3,0x06,0xD5,0x07,0x07,0x07,0x39, + 0x39, 0, 2, 0x6F,0x8E, + 0x39, 0, 9, 0xB3,0x07,0x6B,0x07,0x9D,0x07,0xCE,0x07,0xFF, + 0x39, 0, 3, 0xB9,0x00,0x96, + 0x39, 0, 3, 0xBD,0x04,0xB0, + 0x39, 0, 4, 0xC0,0x76,0xF3,0xC1, + 0x39, 0, 2, 0x6F,0x08, + 0x39, 0, 2, 0xC0,0x40, + 0x39, 0, 2, 0x6F,0x09, + 0x39, 0, 3, 0xC0,0x20,0x20, + 0x39, 0, 2, 0x6F,0x02, + 0x39, 0, 7, 0xC1,0x24,0x86,0x00,0x57,0x00,0x45, + 0x39, 0, 2, 0x6F,0x0A, + 0x39, 0, 3, 0xC1,0x00,0x86, + 0x39, 0, 2, 0xC5,0x05, + 0x39, 0, 2, 0x6F,0x08, + 0x39, 0, 2, 0xC3,0x00, + 0x39, 0, 15, 0xC6,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55, + 0x39, 0, 2, 0xCA,0x12, + 0x39, 0, 2, 0xB9,0x00, + 0x39, 0, 5, 0xBE,0x0E,0x0B,0x14,0x13, + 0x39, 0, 2, 0x6F,0x05, + 0x39, 0, 2, 0xBE,0x8A, + 0x39, 0, 6, 0xF0,0x55,0xAA,0x52,0x08,0x00, + 0x39, 0, 2, 0x6F,0x2A, + 0x39, 0, 2, 0xD9,0x43, + 0x39, 0, 6, 0xF0,0x55,0xAA,0x52,0x08,0x01, + 0x39, 0, 11, 0xB5,0x00,0xB0,0x00,0x98,0x00,0x98,0x00,0xB0,0x00,0x98, + 0x39, 0, 11, 0xB6,0x01,0x38,0x00,0xD0,0x00,0xD0,0x01,0x38,0x00,0xD0, + 0x39, 0, 13, 0xC2,0x00,0xB0,0x01,0x38,0x00,0xB0,0x01,0x38,0x00,0xB0,0x01,0x38, + 0x39, 0, 3, 0xB0,0x04,0x04, + 0x39, 0, 3, 0xB3,0x13,0x13, + 0x39, 0, 7, 0xB7,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B, + 0x39, 0, 3, 0xB1,0x08,0x08, + 0x39, 0, 3, 0xB4,0x13,0x13, + 0x39, 0, 8, 0xB8,0x46,0x46,0x46,0x46,0x46,0x46,0x46, + 0x39, 0, 29, 0xB9,0x00,0x1F,0x00,0x00,0x00,0x1F,0x00,0x00,0x1F,0x00,0x00,0x1F,0x00,0x00,0x00,0x00,0x00,0x00,0x1F,0x1F,0x1F,0x1F,0x1F,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 6, 0xBB,0x03,0x94,0x00,0x19,0x3C, + 0x39, 0, 2, 0x6F,0x05, + 0x39, 0, 20, 0xBB,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20, + 0x39, 0, 2, 0x6F,0x18, + 0x39, 0, 20, 0xBB,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20, + 0x39, 0, 2, 0x6F,0x2B, + 0x39, 0, 20, 0xBB,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20, + 0x39, 0, 2, 0x6F,0x3E, + 0x39, 0, 20, 0xBB,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20, + 0x39, 0, 5, 0xBA,0x10,0x10,0x10,0x10, + 0x39, 0, 3, 0xC4,0x80,0x03, + 0x39, 0, 2, 0xC7,0x01, + 0x39, 0, 3, 0xCD,0x05,0x81, + 0x39, 0, 2, 0xCF,0x1D, + 0x39, 0, 2, 0x6F,0x01, + 0x39, 0, 5, 0xCE,0x00,0x01,0x00,0x00, + 0x39, 0, 2, 0x6F,0x09, + 0x39, 0, 2, 0xD2,0x00, + 0x39, 0, 2, 0x6F,0x10, + 0x39, 0, 2, 0xD8,0x0C, + 0x39, 0, 2, 0xD9,0xAB, + 0x39, 0, 2, 0xD1,0x07, + 0x39, 0, 2, 0x6F,0x02, + 0x39, 0, 2, 0xD1,0x06, + 0x39, 0, 2, 0x6F,0x05, + 0x39, 0, 2, 0xD1,0x06, + 0x39, 0, 3, 0xD6,0x00,0x40, + 0x39, 0, 6, 0xF0,0x55,0xAA,0x52,0x08,0x02, + 0x39, 0, 25, 0xB9,0x00,0x04,0x00,0x0C,0x00,0x14,0x00,0x1C,0x00,0x2C,0x00,0x3C,0x00,0x4C,0x00,0x5C,0x00,0x7C,0x00,0x9C,0x00,0xBC,0x00,0xDC, + 0x39, 0, 25, 0xBA,0x00,0xFC,0x01,0x3C,0x01,0x7C,0x01,0xBC,0x01,0xFC,0x02,0x7C,0x02,0xFC,0x03,0x7C,0x03,0xBC,0x03,0xDC,0x03,0xFC,0x03,0xFF, + 0x39, 0, 2, 0xBC,0x11, + 0x39, 0, 17, 0xBD,0x96,0x00,0x69,0x00,0x00,0x96,0x00,0x69,0xBB,0x44,0x44,0xBB,0xEE,0x11,0x11,0xEE, + 0x39, 0, 2, 0xC1,0x02, + 0x39, 0, 9, 0xC2,0x19,0x00,0x91,0x00,0x19,0x00,0x91,0x00, + 0x39, 0, 3, 0xC0,0x00,0x00, + 0x39, 0, 2, 0xCE,0x01, + 0x39, 0, 2, 0xCC,0x00, + +#if 1 + ///////////#1_gamma.txt/////////////// + + 0x39, 0, 6, 0xF0,0x55,0xAA,0x52,0x08,0x02, + 0x39, 0, 2, 0xCC,0x30, + 0x39, 0, 6, 0xF0,0x55,0xAA,0x52,0x08,0x02, + 0x39, 0, 2, 0xBF,0x09, + 0x39, 0, 19, 0xB0,0x00,0x00,0x01,0xF6,0x02,0x1F,0x02,0xB0,0x03,0x53,0x03,0xC8,0x04,0x34,0x04,0x95,0x05,0x25, + 0x39, 0, 19, 0xB1,0x05,0xA7,0x06,0x11,0x06,0x70,0x06,0xCA,0x07,0x6B,0x08,0x04,0x08,0x93,0x09,0x19,0x09,0x9E, + 0x39, 0, 15, 0xB2,0x0A,0x1B,0x0A,0x94,0x0B,0x0C,0x0B,0x84,0x0C,0x04,0x0D,0x04,0x0D,0x07, + 0x39, 0, 19, 0xB3,0x00,0x00,0x01,0x96,0x01,0xB4,0x02,0x10,0x02,0x89,0x02,0xED,0x03,0x51,0x03,0xAA,0x04,0x32, + 0x39, 0, 19, 0xB4,0x04,0xAE,0x05,0x15,0x05,0x71,0x05,0xC8,0x06,0x5E,0x06,0xE5,0x07,0x62,0x07,0xD6,0x08,0x45, + 0x39, 0, 15, 0xB5,0x08,0xB2,0x09,0x1B,0x09,0x83,0x09,0xEE,0x0A,0x5D,0x0B,0x3C,0x0B,0x42, + 0x39, 0, 19, 0xB6,0x00,0x00,0x02,0xA4,0x02,0xD3,0x03,0x6F,0x04,0x1F,0x04,0x9F,0x05,0x14,0x05,0x7C,0x06,0x18, + 0x39, 0, 19, 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0xB7,0x02,0xE0,0x02,0xF4,0x03,0x0B,0x03,0x1E,0x03,0x50,0x03,0x7C,0x03,0xB0,0x03,0xDD,0x04,0x0C, + 0x39, 0, 15, 0xB8,0x04,0x3D,0x04,0x62,0x04,0x8F,0x04,0xAC,0x04,0xCF,0x05,0x11,0x05,0x1C, + 0x39, 0, 2, 0xBF,0x01, + 0x39, 0, 19, 0xB0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 19, 0xB1,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 15, 0xB2,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 19, 0xB3,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 19, 0xB4,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 15, 0xB5,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 19, 0xB6,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 19, 0xB7,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 15, 0xB8,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0xBF,0x00, + 0x39, 0, 19, 0xB0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 19, 0xB1,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 15, 0xB2,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 19, 0xB3,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 19, 0xB4,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 15, 0xB5,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 19, 0xB6,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 19, 0xB7,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 15, 0xB8,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0xCE,0x01, + 0x39, 0, 2, 0xCC,0x00, + 0x39, 0, 6, 0xF0,0x55,0xAA,0x52,0x08,0x02, + 0x39, 0, 25, 0xB9,0x00,0x04,0x00,0x0C,0x00,0x1C,0x00,0x2C,0x00,0x3C,0x00,0x4C,0x00,0x5C,0x00,0x7C,0x00,0x9C,0x00,0xBC,0x00,0xDC,0x00,0xFC, + 0x39, 0, 25, 0xBA,0x01,0x3C,0x01,0x7C,0x01,0xBC,0x01,0xFC,0x02,0x3C,0x02,0x7C,0x02,0xBC,0x02,0xFC,0x03,0x3C,0x03,0x7C,0x03,0xFC,0x03,0xFF, + + /////////#1_gamma.txt end/////////// +#endif + + + 0x39, 0, 6, 0xF0,0x55,0xAA,0x52,0x08,0x03, + 0x39, 0, 6, 0xB2,0x00,0x1F,0x1F,0x06,0x01, + 0x39, 0, 2, 0x6F,0x05, + 0x39, 0, 13, 0xB2,0x00,0x10,0x10,0x00,0x0F,0x0F,0x00,0x10,0x10,0x00,0x1F,0x1F, + 0x39, 0, 2, 0x6F,0x11, + 0x39, 0, 9, 0xB2,0x06,0x01,0x06,0x01,0x06,0x01,0x06,0x01, + 0x39, 0, 2, 0x6F,0x19, + 0x39, 0, 2, 0xB2,0x00, + 0x39, 0, 16, 0xB6,0xF0,0x1C,0x1C,0x00,0x10,0x01,0x00,0x10,0x01,0x00,0x10,0x01,0x00,0x1C,0x1C, + 0x39, 0, 2, 0x6F,0x0F, + 0x39, 0, 4, 0xB6,0x1F,0x00,0x0A, + 0x39, 0, 2, 0x6F,0x1A, + 0x39, 0, 4, 0xB6,0x0F,0x00,0x0A, + 0x39, 0, 2, 0x6F,0x25, + 0x39, 0, 4, 0xB6,0x0F,0x00,0x0A, + 0x39, 0, 2, 0x6F,0x30, + 0x39, 0, 4, 0xB6,0x0F,0x00,0x0A, + 0x39, 0, 17, 0xBB,0x11,0x00,0x1D,0x7E,0x00,0x0F,0x5E,0x00,0x0E,0x4C,0x00,0x00,0x00,0x00,0x1D,0x7E, + 0x39, 0, 17, 0xBC,0x22,0x10,0x1D,0x5C,0x00,0x0F,0x3C,0x00,0x0E,0x29,0x00,0x00,0x00,0x00,0x1D,0x5C, + 0x39, 0, 6, 0xF0,0x55,0xAA,0x52,0x08,0x04, + 0x39, 0, 2, 0xC2,0x14, + 0x39, 0, 2, 0xB1,0x02, + 0x39, 0, 2, 0xB2,0x40, + 0x39, 0, 2, 0x6F,0x01, + 0x39, 0, 4, 0xB2,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x04, + 0x39, 0, 4, 0xB2,0x09,0xE3,0x40, + 0x39, 0, 2, 0x6F,0x07, + 0x39, 0, 4, 0xB2,0x09,0xE4,0x00, + 0x39, 0, 2, 0x6F,0x0A, + 0x39, 0, 4, 0xB2,0x09,0xE3,0x40, + 0x39, 0, 2, 0xCB,0x86, + 0x39, 0, 5, 0xD0,0x00,0x00,0x00,0x10, + 0x39, 0, 2, 0x6F,0x04, + 0x39, 0, 2, 0xD0,0x01, + 0x39, 0, 2, 0x6F,0x01, + 0x39, 0, 6, 0xCB,0x05,0x0F,0x1F,0x3E,0x7C, + 0x39, 0, 2, 0x6F,0x06, + 0x39, 0, 11, 0xCB,0x00,0x08,0x00,0x3C,0x01,0x48,0x07,0xFF,0x0F,0xFF, + 0x39, 0, 2, 0x6F,0x00, + 0x39, 0, 6, 0xD2,0x12,0x0C,0x0C,0x0A,0x06, + 0x39, 0, 2, 0x6F,0x05, + 0x39, 0, 6, 0xD2,0x30,0x14,0x16,0x0E,0x0A, + 0x39, 0, 2, 0x6F,0x0A, + 0x39, 0, 6, 0xD2,0x48,0x20,0x16,0x12,0x0E, + 0x39, 0, 2, 0x6F,0x0F, + 0x39, 0, 6, 0xD2,0x44,0x20,0x16,0x12,0x15, + 0x39, 0, 2, 0x6F,0x14, + 0x39, 0, 6, 0xD2,0x40,0x20,0x16,0x12,0x12, + 0x39, 0, 2, 0x6F,0x19, + 0x39, 0, 6, 0xD2,0xFF,0xE4,0xA9,0x40,0x30, + 0x39, 0, 2, 0x6F,0x1E, + 0x39, 0, 6, 0xD2,0xFF,0xD8,0x40,0x26,0x20, + 0x39, 0, 2, 0x6F,0x23, + 0x39, 0, 6, 0xD2,0xFF,0x8F,0x40,0x26,0x1F, + 0x39, 0, 2, 0x6F,0x28, + 0x39, 0, 6, 0xD2,0x9F,0x60,0x40,0x20,0x1B, + 0x39, 0, 2, 0x6F,0x2D, + 0x39, 0, 6, 0xD2,0x84,0x40,0x40,0x20,0x1B, + 0x39, 0, 2, 0x6F,0x32, + 0x39, 0, 6, 0xD2,0x12,0x08,0x10,0x10,0x06, + 0x39, 0, 2, 0x6F,0x37, + 0x39, 0, 6, 0xD2,0x30,0x08,0x15,0x0B,0x0A, + 0x39, 0, 2, 0x6F,0x3C, + 0x39, 0, 6, 0xD2,0x46,0x08,0x10,0x10,0x0C, + 0x39, 0, 2, 0x6F,0x41, + 0x39, 0, 6, 0xD2,0x30,0x1A,0x10,0x16,0x16, + 0x39, 0, 2, 0x6F,0x46, + 0x39, 0, 6, 0xD2,0x30,0x1A,0x10,0x12,0x12, + 0x39, 0, 2, 0x6F,0x00, + 0x39, 0, 6, 0xD4,0x08,0x08,0x04,0x0C,0x06, + 0x39, 0, 2, 0x6F,0x05, + 0x39, 0, 6, 0xD4,0x29,0x18,0x10,0x0D,0x0A, + 0x39, 0, 2, 0x6F,0x0A, + 0x39, 0, 6, 0xD4,0x40,0x14,0x10,0x11,0x0C, + 0x39, 0, 2, 0x6F,0x0F, + 0x39, 0, 6, 0xD4,0x40,0x1F,0x13,0x14,0x10, + 0x39, 0, 2, 0x6F,0x14, + 0x39, 0, 6, 0xD4,0x5f,0x16,0x14,0x16,0x13, + 0x39, 0, 2, 0x6F,0x19, + 0x39, 0, 6, 0xD4,0xFF,0xFF,0xA0,0x50,0x2F, + 0x39, 0, 2, 0x6F,0x1E, + 0x39, 0, 6, 0xD4,0xFF,0xF0,0x9A,0x30,0x0C, + 0x39, 0, 2, 0x6F,0x23, + 0x39, 0, 6, 0xD4,0xFF,0xA0,0x6A,0x30,0x0F, + 0x39, 0, 2, 0x6F,0x28, + 0x39, 0, 6, 0xD4,0xF0,0x80,0x40,0x30,0x12, + 0x39, 0, 2, 0x6F,0x2D, + 0x39, 0, 6, 0xD4,0xB0,0x40,0x40,0x30,0x14, + 0x39, 0, 2, 0x6F,0x32, + 0x39, 0, 6, 0xD4,0x04,0x04,0x04,0x0A,0x05, + 0x39, 0, 2, 0x6F,0x37, + 0x39, 0, 6, 0xD4,0x32,0x14,0x10,0x0B,0x07, + 0x39, 0, 2, 0x6F,0x3C, + 0x39, 0, 6, 0xD4,0x40,0x18,0x10,0x0C,0x09, + 0x39, 0, 2, 0x6F,0x41, + 0x39, 0, 6, 0xD4,0x20,0x1C,0x1A,0x0E,0x0B, + 0x39, 0, 2, 0x6F,0x46, + 0x39, 0, 6, 0xD4,0xB5,0x18,0x18,0x08,0x0C, + 0x39, 0, 6, 0xF0,0x55,0xAA,0x52,0x08,0x05, + 0x39, 0, 3, 0xC7,0x07,0x01, + 0x39, 0, 4, 0xB0,0x07,0x21,0x00, + 0x39, 0, 3, 0xB3,0x86,0x80, + 0x39, 0, 3, 0xB5,0x85,0x81, + 0x39, 0, 5, 0xB7,0x85,0x00,0x00,0x81, + 0x39, 0, 5, 0xB8,0x85,0x00,0x00,0x81, + 0x39, 0, 5, 0xB9,0x85,0x00,0x00,0x81, + 0x39, 0, 4, 0xD0,0x00,0x03,0x10, + 0x39, 0, 5, 0xE0,0x82,0x00,0x00,0x02, + 0x39, 0, 4, 0xD1,0x00,0x01,0x10, + 0x39, 0, 5, 0xE1,0x82,0x00,0x00,0x02, + 0x39, 0, 6, 0xF0,0x55,0xAA,0x52,0x08,0x06, + 0x39, 0, 6, 0xB0,0x13,0x32,0x12,0x32,0x04, + 0x39, 0, 6, 0xB1,0x32,0x31,0x0E,0x32,0x31, + 0x39, 0, 6, 0xB2,0x32,0x00,0x32,0x31,0x32, + 0x39, 0, 2, 0xB3,0x0F, + 0x39, 0, 6, 0xB6,0x13,0x32,0x12,0x32,0x04, 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0xB8,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00, + 0x39, 0, 2, 0x6F,0x20, + 0x39, 0, 7, 0xB8,0x08,0x00,0x08,0x00,0x08,0x00, + 0x39, 0, 17, 0xB9,0x01,0x01,0x00,0x91,0x00,0x38,0x60,0x00,0x00,0x00,0xA6,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x10, + 0x39, 0, 17, 0xB9,0x00,0x00,0x00,0x00,0x01,0x00,0x05,0x00,0x0C,0x00,0x1F,0x00,0x44,0x00,0x86,0x00, + 0x39, 0, 2, 0x6F,0x20, + 0x39, 0, 17, 0xB9,0xF5,0x01,0xB3,0x02,0xD7,0x04,0x1C,0x05,0x61,0x06,0xA6,0x07,0xEB,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x30, + 0x39, 0, 17, 0xB9,0x00,0x00,0x00,0x00,0x01,0x00,0x02,0x00,0x05,0x00,0x0C,0x00,0x18,0x00,0x2C,0x00, + 0x39, 0, 2, 0x6F,0x40, + 0x39, 0, 17, 0xB9,0x4F,0x00,0xAD,0x01,0x27,0x01,0xA1,0x02,0x1B,0x02,0x95,0x03,0x0F,0x03,0x89,0x00, + 0x39, 0, 2, 0x6F,0x50, + 0x39, 0, 17, 0xB9,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x02,0x00,0x0D,0x00,0x1D,0x00, + 0x39, 0, 2, 0x6F,0x60, + 0x39, 0, 17, 0xB9,0x48,0x00,0x9D,0x01,0x34,0x02,0x32,0x03,0xE4,0x05,0xF6,0x08,0xF1,0x0B,0xEC,0x0E, + 0x39, 0, 2, 0x6F,0x70, + 0x39, 0, 17, 0xB9,0xE7,0x03,0xD0,0xB0,0xE0,0x0A,0x80,0x80,0x82,0x7D,0x7B,0x79,0x77,0x72,0x70,0x80, + 0x39, 0, 2, 0x6F,0x80, + 0x39, 0, 17, 0xB9,0x80,0x80,0x7D,0x7E,0x7B,0x7B,0x77,0x73,0x80,0x80,0x82,0x81,0x80,0x7F,0x7E,0x7B, + 0x39, 0, 2, 0x6F,0x90, + 0x39, 0, 17, 0xB9,0x78,0x80,0x80,0x81,0x82,0x82,0x82,0x81,0x7F,0x7C,0x80,0x80,0x80,0x83,0x86,0x86, + 0x39, 0, 2, 0x6F,0xA0, + 0x39, 0, 17, 0xB9,0x85,0x81,0x7D,0x80,0x80,0x82,0x81,0x84,0x85,0x87,0x85,0x88,0x80,0x80,0x81,0x8B, + 0x39, 0, 2, 0x6F,0xB0, + 0x39, 0, 17, 0xB9,0x88,0x8A,0x8C,0x8D,0x8E,0x80,0x80,0x84,0x87,0x8A,0x8C,0x8F,0x90,0x91,0x80,0x80, + 0x39, 0, 2, 0x6F,0xC0, + 0x39, 0, 17, 0xB9,0x84,0x87,0x8A,0x8D,0x91,0x91,0x92,0x80,0x80,0x85,0x88,0x8D,0x8F,0x8F,0x95,0x96, + 0x39, 0, 2, 0x6F,0xD0, + 0x39, 0, 17, 0xB9,0x80,0x80,0x7A,0x73,0x6E,0x69,0x66,0x60,0x5D,0x80,0x80,0x80,0x80,0x76,0x74,0x70, + 0x39, 0, 2, 0x6F,0xE0, + 0x39, 0, 17, 0xB9,0x6C,0x6A,0x80,0x80,0x81,0x7F,0x7F,0x7C,0x7B,0x76,0x73,0x80,0x80,0x83,0x83,0x83, + 0x39, 0, 2, 0x6F,0xF0, + 0x39, 0, 14, 0xB9,0x82,0x82,0x7F,0x7C,0x80,0x80,0x82,0x84,0x85,0x84,0x87,0x83,0x80, + 0x39, 0, 17, 0xBA,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00, + 0x39, 0, 2, 0x6F,0x10, + 0x39, 0, 17, 0xBA,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00, + 0x39, 0, 2, 0x6F,0x20, + 0x39, 0, 17, 0xBA,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00, + 0x39, 0, 2, 0x6F,0x30, + 0x39, 0, 17, 0xBA,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00, + 0x39, 0, 2, 0x6F,0x40, + 0x39, 0, 17, 0xBA,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00, + 0x39, 0, 2, 0x6F,0x50, + 0x39, 0, 17, 0xBA,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00, + 0x39, 0, 2, 0x6F,0x60, + 0x39, 0, 17, 0xBA,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00,0x05,0xD1,0x08,0x00,0x08,0x00,0x08,0x00, + 0x39, 0, 2, 0x6F,0x70, + 0x39, 0, 17, 0xBA,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00, + 0x39, 0, 2, 0x6F,0x80, + 0x39, 0, 17, 0xBA,0x08,0x00,0x05,0x3E,0x07,0x36,0x07,0x36,0x07,0x36,0x07,0x36,0x07,0x36,0x07,0x36, + 0x39, 0, 2, 0x6F,0x90, + 0x39, 0, 17, 0xBA,0x07,0x36,0x07,0x36,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00,0x05,0x3E,0x07,0x36, + 0x39, 0, 2, 0x6F,0xA0, + 0x39, 0, 17, 0xBA,0x07,0x36,0x07,0x36,0x07,0x36,0x07,0x36,0x07,0x36,0x07,0x36,0x07,0x36,0x08,0x00, + 0x39, 0, 2, 0x6F,0xB0, + 0x39, 0, 17, 0xBA,0x08,0x00,0x08,0x00,0x08,0x00,0x05,0xD1,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00, + 0x39, 0, 2, 0x6F,0xC0, + 0x39, 0, 17, 0xBA,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00, + 0x39, 0, 2, 0x6F,0xD0, + 0x39, 0, 17, 0xBA,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00, + 0x39, 0, 2, 0x6F,0xE0, + 0x39, 0, 11, 0xBA,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00, + 0x39, 0, 17, 0xBB,0x01,0x2C,0x01,0x2C,0x01,0x2C,0x01,0x2C,0x01,0x2C,0x01,0x2C,0x01,0x2C,0x01,0x2C, + 0x39, 0, 2, 0x6F,0x10, + 0x39, 0, 17, 0xBB,0x01,0x2C,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x2C,0x01,0x2C,0x01,0x2C, + 0x39, 0, 2, 0x6F,0x20, + 0x39, 0, 17, 0xBB,0x01,0x2C,0x01,0x2C,0x01,0x2C,0x01,0x2C,0x01,0x2C,0x01,0x2C,0x01,0x00,0x01,0x00, + 0x39, 0, 2, 0x6F,0x30, + 0x39, 0, 17, 0xBB,0x01,0x00,0x01,0x00,0x01,0x2C,0x01,0x2C,0x01,0x2C,0x01,0x2C,0x01,0x2C,0x01,0x2C, + 0x39, 0, 2, 0x6F,0x40, + 0x39, 0, 17, 0xBB,0x01,0x2C,0x01,0x2C,0x01,0x2C,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x2C, + 0x39, 0, 2, 0x6F,0x50, + 0x39, 0, 17, 0xBB,0x01,0x2C,0x01,0x2C,0x01,0x2C,0x01,0x2C,0x01,0x2C,0x01,0x2C,0x01,0x2C,0x01,0x2C, + 0x39, 0, 2, 0x6F,0x60, + 0x39, 0, 17, 0xBB,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00, + 0x39, 0, 2, 0x6F,0x70, + 0x39, 0, 17, 0xBB,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00, + 0x39, 0, 2, 0x6F,0x80, + 0x39, 0, 17, 0xBB,0x01,0x00,0x08,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x90, + 0x39, 0, 17, 0xBB,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x10,0x10,0x10, + 0x39, 0, 2, 0x6F,0xA0, + 0x39, 0, 5, 0xBB,0x80,0x80,0x80,0x00, + 0x39, 0, 2, 0xEE,0x05, + 0x39, 0, 5, 0xFF,0xAA,0x55,0xA5,0x80, + 0x39, 0, 2, 0x6F,0x1D, + 0x39, 0, 2, 0xF2,0x05, + 0x39, 0, 5, 0x3B,0x00,0x14,0x00,0x12, + 0x39, 0, 2, 0x03,0x01, + 0x39, 0, 2, 0x90,0x02, + 0x39, 0, 19, 0x91,0x89,0x28,0x00,0x0C,0xC2,0x00,0x03,0x1C,0x01,0x7E,0x00,0x0F,0x08,0xBB,0x04,0x3D,0x10,0xF0, + 0x39, 0, 1, 0x2C, + 0x39, 0, 5, 0x51,0x07,0xFF,0x0F,0xFF, + 0x39, 0, 2, 0x53,0x20, + 0x39, 0, 1, 0x35, + 0x39, 0, 5, 0x2A,0x00,0x00,0x04,0x37, + 0x39, 0, 5, 0x2B,0x00,0x00,0x09,0x5F, + 0x39, 0, 2, 0x2F,0x01, + + + //video Mode + 0x39, 0, 6, 0xF0,0x55,0xAA,0x52,0x08,0x00, + 0x39, 0, 2, 0xC0,0x77, +// 0x39, 0, 5, 0x3B,0x00,0x10,0x09,0x90, +// 0x39, 0, 2, 0x90,0x00, +// 0x05, 0, 1, 0x2C, +// 0x39, 0, 3, 0x51,0x03,0x00, + +#endif + +}; +#endif + + +static void send_panel_init_code_1(uint32_t size, uint8_t*data,uint32_t us) +{ + uint32_t data_offeset = 0; + uint8_t data_type; + uint8_t vc; + uint8_t data_size; + uint8_t *p_data; + + while(data_offesetbase_info.src_w = INPUT_WIDTH; + g_rx_ctrl_handle->base_info.src_h = INPUT_HEIGHT; + g_rx_ctrl_handle->base_info.dst_w = OUTPUT_WIDTH; + g_rx_ctrl_handle->base_info.dst_h = OUTPUT_HEIGHT; + g_rx_ctrl_handle->base_info.src_frate = INPUT_FRAME_RATE; + g_rx_ctrl_handle->base_info.src_mode = INPUT_DATA_MODE; + g_rx_ctrl_handle->rx_color_mode = INPUT_COLOR_MODE; + g_rx_ctrl_handle->rx_lanes = INPUT_MIPI_LANE_NUM; + g_rx_ctrl_handle->rx_nonburst_models = INPUT_VIDEO_MODEL; /* ɲ */ + g_rx_ctrl_handle->rx_vc = INPUT_VC; + g_rx_ctrl_handle->compress_en = INPUT_COMPRESS; + g_rx_ctrl_handle->rx_hsclk_rate = INPUT_MIPI_LANE_RATE; + g_rx_ctrl_handle->cus_dcs_entry_table = g_cus_rx_dcs_execute_table; /* ע DCSб */ + g_rx_ctrl_handle->rx_dcs_read_entry = ap_dcs_read; /* עdsc read ص,ѡ,˺Ϊʱcus_dcs_entry_tableִ */ + g_rx_ctrl_handle->pps_update_entry = pps_update_handle; +#if 1//򿪻ᵼ¿ӡϢTX + // g_rx_ctrl_handle->pq_marginal = PQ_TYPE_5; + // g_rx_ctrl_handle->err_handler_level = ERR_HANDLE_L1; +#endif + /* ǰԤPPS, AP PPS cmdҲ */ + if (g_rx_ctrl_handle->compress_en == true) + { + uint8_t pps[128] = {0x11,0x00,0x00,0x89,0x30,0x80,0x09,0x60,0x04,0x38,0x00,0x1E,0x02,0x1C,0x02,0x1C, + 0x02,0x00,0x02,0x0E,0x00,0x20,0x02,0xE3,0x00,0x07,0x00,0x0C,0x03,0x50,0x03,0x64, + 0x18,0x00,0x10,0xF0,0x03,0x0C,0x20,0x00,0x06,0x0B,0x0B,0x33,0x0E,0x1C,0x2A,0x38, + 0x46,0x54,0x62,0x69,0x70,0x77,0x79,0x7B,0x7D,0x7E,0x01,0x02,0x01,0x00,0x09,0x40, + 0x09,0xBE,0x19,0xFC,0x19,0xFA,0x19,0xF8,0x1A,0x38,0x1A,0x78,0x1A,0xB6,0x2A,0xF6, + 0x2B,0x34,0x2B,0x74,0x3B,0x74,0x63,0xF4,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}; + + hal_dsi_rx_ctrl_pre_init_pps(g_rx_ctrl_handle, pps, 128); + } + + /* ʼrx ctrl */ + hal_dsi_rx_ctrl_init(g_rx_ctrl_handle); + //*((uint32_t *)(0x40002B04)) = 1; + +#ifdef USE_FOR_SUMSUNG_S20U + hal_dsi_rx_ctrl_set_cus_sync_line(g_rx_ctrl_handle, 2400);// lss add, ˺SYNC_LIN_NUMBER +#endif + hal_dsi_rx_ctrl_hight_performan_mode(g_rx_ctrl_handle); + //hal_dsi_rx_ctrl_set_sw_tear_mode(g_rx_ctrl_handle); + /* rx ctrl */ + hal_dsi_rx_ctrl_start(g_rx_ctrl_handle); +} + +static void init_mipi_tx(void) +{ + if (g_tx_ctrl_handle == NULL) + { + g_tx_ctrl_handle = hal_dsi_tx_ctrl_create_handle(); + } + g_tx_ctrl_handle->channel_id = OUTPUT_VC; + g_tx_ctrl_handle->lane_num = OUTPUT_LANE_NUMBER; + g_tx_ctrl_handle->vid_mode = OUTPUT_VIDEO_MODEL; + g_tx_ctrl_handle->cmd_tx_type = _CMD_TYPE; + g_tx_ctrl_handle->dpi_vsa = OUTPUT_VSA; + g_tx_ctrl_handle->dpi_vbp = OUTPUT_VBP; + g_tx_ctrl_handle->dpi_vfp = OUTPUT_VFP; + g_tx_ctrl_handle->dpi_hsa = OUTPUT_HSA; + g_tx_ctrl_handle->dpi_hbp = OUTPUT_HBP; + g_tx_ctrl_handle->dpi_hfp = OUTPUT_HFP; + g_tx_ctrl_handle->base_info.src_w = INPUT_WIDTH; + g_tx_ctrl_handle->base_info.src_h = INPUT_HEIGHT; + g_tx_ctrl_handle->base_info.dst_w = OUTPUT_WIDTH; + g_tx_ctrl_handle->base_info.dst_h = OUTPUT_HEIGHT; + g_tx_ctrl_handle->base_info.src_frate = INPUT_FRAME_RATE; + g_tx_ctrl_handle->base_info.src_mode = INPUT_DATA_MODE; +// g_tx_ctrl_handle->tx_frame_rate = 60; //61-62 +// g_tx_ctrl_handle->lp_exit_lpdt = true; + g_tx_ctrl_handle->tx_line_delay = 100; //100 do800 works; + + hal_dsi_tx_ctrl_init(g_tx_ctrl_handle); + /* AP ûзʱĬϵʾɫ, Ϊ0 0 0(ɫ), ɫΪdebugʹ */ +#ifndef DISPLAY_ONLY + hal_dsi_tx_ctrl_set_overwrite_rgb(0x00, 0x00, 0x00); +#else + hal_dsi_tx_ctrl_set_overwrite_rgb(0x00, 0x00, 0x00); +#endif +} + + +static void tx_display_on(void) +{ + init_panel(); + + hal_dsi_tx_ctrl_start(g_tx_ctrl_handle); + delayMs(135); //90 ߵ + hal_dsi_tx_ctrl_write_cmd(0x39, 0, 3, 0x51, 0x00, 0x01); //01 + hal_dsi_tx_ctrl_write_cmd(0x05, 0, 1, 0x29); + Gpio_swire_output(2, 40); + // delayMs(20); +// TAU_LOGD("29 send..."); +} + +static void swire_timer_callback(void *data) +{ +#ifdef USE_FOR_SUMSUNG_S20 + if(Flag_blacklight_EN) + { + hal_swire_start(12, 12, 12, 12, SWIRE_DEFAULT_NUM); + } + else if(s20_power_on_flag) + { + hal_swire_start(12, 12, 12, 12, SWIRE_DEFAULT_NUM); + } + else +#endif + { + hal_swire_start(12, 12, 12, 12, swire_num); + } +} + + +static void disable_mipi_timer_cb(void *data) +{ +#if ENABLE_TP_WAKE_UP + g_mipi_path_off = true; + hal_gpio_init_output(IO_PAD_TD_LEDPWM, IO_LVL_HIGH); + /* FIXME stop more model */ + hal_dsi_tx_ctrl_stop(g_tx_ctrl_handle); + hal_dsi_tx_ctrl_deinit(g_tx_ctrl_handle); + hal_dsi_rx_ctrl_stop(g_rx_ctrl_handle); + hal_dsi_rx_ctrl_deinit(g_rx_ctrl_handle); + hal_swire_open(DISABLE); + hal_timer_stop(SWIRE_TIMER); + hal_gpio_set_output_data(IO_PAD_PWMEN, IO_LVL_LOW); + hal_dsi_tx_ctrl_panel_reset_pin(IO_LVL_LOW); + hal_system_set_vcc(false); + tp_sleep_in=1; + TAU_LOGD("disable video path \n"); +#endif +} + +static void soft_disable_mipi_timer_init() +{ + TAU_LOGD("soft_disable_mipi_timer_init"); + hal_timer_init(WAKE_UP_TIMER); + hal_timer_start(WAKE_UP_TIMER, 20, disable_mipi_timer_cb, NULL); +} + +#ifdef ADD_TIMER3_FUNCTION +static void soft_timer3_cb(void *data) +{ + hal_timer_start(TIMER_NUM3, 10, soft_timer3_cb, NULL); + tp_sleep_count++; + if(phone_DisplayOFF_count>0) + { + phone_DisplayOFF_count++; + } + +#if 0// test + if (test_count) + { + test_count++; + } +#endif + +#if AUTO_CAL_TP + if (g_exit_sleep_mode) + { + if (g_cal_cnt > 0) + { + g_cal_cnt--; + if (g_cal_cnt == 0) + { + g_calibration_flag = true; + TAU_LOGD("Start cal tp!\n"); + } + } + } +#endif +} +#endif + + +#if ADD_TP_CALIBRATION + +#endif + +#if ENABLE_TP_WAKE_UP +#if 0 +static void ap_reset_high_cb(void *data) +{ + TAU_LOGD("ap_reset_high_cb***********\n"); + delayMs(5); + hal_system_set_pvd(true); + hal_system_set_vcc(true); + NVIC_SystemReset(); +} +#endif +static void ap_reset_cb(void *data) +{ + /* лԴ */ + // hal_gpio_set_output_data_ex(POWER_IO_B, IO_LVL_HIGH, POWER_IO_A, IO_LVL_LOW); + /* VCC */ + TAU_LOGD("aprst................................................\n"); + hal_system_set_pvd(true); + hal_system_set_vcc(true); + NVIC_SystemReset(); +} +#endif + + +void tp_heartbeat_exec(void) +{ + if (s_screen_init_complate) + { + if(hal_gpio_get_input_data(IO_PAD_TD_INT)) + { + s_heartbeat = 0; + } + else + { + if(s_heartbeat < (65536/50)) // 65536*3 = 900ms 65536/50 = 6ms + { + s_heartbeat ++; + }else + { + TAU_LOGD("hb..."); + s_heartbeat = 0; + // ap_tp_st_touch_software_reset(); + ap_tp_st_touch_hardware_reset(); + } + } + } +} +//static uint32_t loop_count=1; +void ap_demo(void) +{ + hal_gpio_init_output(IO_PAD_TD_LEDPWM, IO_LVL_LOW); + hal_gpio_init_output(IO_PAD_PWMEN, IO_LVL_LOW);//LED_ON + hal_gpio_init_output(IO_PAD_AP_SWIRE, IO_LVL_LOW);//IO_LVL_LOW + hal_gpio_init_output(IO_PAD_ADCIN, IO_LVL_LOW);//IO_LVL_LOW + + /* mipi rxʼ */ + app_tp_I2C_init(); + open_mipi_rx(); + +// TAU_LOGD("S20u 568 [%s %s]", __DATE__, __TIME__); + TAU_LOGD("S20U 568 V100 20230713"); + + /* mipi tx ʼ*/ + init_mipi_tx(); + + /* touch ģʼ */ +#ifndef DISPLAY_ONLY + app_tp_init(); + phone_86_flag=1; + phone_A6_flag=1; + phone_start_flag=0; +#endif + +#ifdef ADD_TIMER3_FUNCTION + tp_sleep_count=0; + phone_DisplayOFF_count=1; + hal_timer_init(TIMER_NUM3); + hal_timer_start(TIMER_NUM3, 10, soft_timer3_cb, NULL); +#endif + + /* ʼ */ + tx_display_on(); + start_display_on = false; + panel_display_done = true; + + hal_gpio_set_ap_reset_int(ENABLE, ap_reset_cb, DETECT_RISING_EDGE); +#ifndef DISPLAY_ONLY + app_tp_phone_clear_reset_on(); +#ifndef DISABLE_TDDI_I2C_FUNCTION + /* TP ģͨѶʼ */ + delayMs(50); +// printf("tp start begin\n"); + app_tp_transfer_screen_start(); +// printf("tp start end\n"); +#endif +#endif + while (1) + { + if(g_mipi_path_off == false){ + while (hal_dsi_rx_ctrl_dsc_async_handler(g_rx_ctrl_handle)); + + #if ADD_TP_CALIBRATION + tp_heartbeat_exec(); + app_tp_calibration_exec(); + ap_tp_st_touch_scan_point_record_event_exec(); + #endif + + + #if 1//绰Ϩ + if (phone_off_flag==0) + { + if(Flag_blacklight_EN) + { + phone_off_flag =1; + hal_dsi_tx_ctrl_write_cmd(0x39, 0, 2, 0x28, 0x00); + } + } + else + { + if(Flag_blacklight_EN ==0) + { + phone_off_flag =0; + hal_dsi_tx_ctrl_write_cmd(0x39, 0, 2, 0x29, 0x00); + } + } + #endif + } + + if(phone_DisplayOFF_flag==1) + { + if(phone_DisplayOFF_count>800) + { + phone_DisplayOFF_count=0; + phone_start_flag=1; + } + } + else + { + if(phone_DisplayOFF_count>20) + { + phone_DisplayOFF_count=0; + phone_start_flag=1; + hal_gpio_set_output_data(IO_PAD_AP_INT, IO_LVL_LOW);//ͣ˫2~3s޴.jason_su + } + } + app_tp_transfer_screen_int(); + +#ifdef USE_FOR_SUMSUNG_S20U + if(phone_start_flag==2) + { + + S20_Start_init(); + } +#endif + } +} diff --git a/src/app/demo/ap_demo.h b/src/app/demo/ap_demo.h new file mode 100644 index 0000000..680c24b --- /dev/null +++ b/src/app/demo/ap_demo.h @@ -0,0 +1,57 @@ +/******************************************************************************* +* +* +* File: s8_demo.h +* Description: s8ͷļ +* Version: V0.1 +* Date: 2021-02-22 +* Author: Tempest + *******************************************************************************/ + +#ifndef __AP_DEMO_H__ +#define __AP_DEMO_H__ + +//#define DISABLE_TDDI_I2C_FUNCTION +//#define USE_WL518_INTERNAL_FLASH + + +/* ͬѡѡѡ1*/ +#define USE_FOR_SUMSUNG_S20U +//#define USE_FOR_OPPO_RENO3_PRO + +//#define DISPLAY_ONLY //leo``````````````````````````````````````````````````````````````````````````````10 + +//#define USE_FOR_SUMSUNG_S20Ultra //汾SWIER_jason +#ifdef USE_FOR_SUMSUNG_S20U +#define AMOLED_NT37701_CSOT667 1 + +#define PANEL_INIT_CODE_ARRAY 1 //һַʼʽٴ + +#define ENABLE_TP_SLEEP +#define ADD_TIMER3_FUNCTION +//#define G_PHONE_INT_DEFAULT_LOW +#define USE_FOR_S10_BLUE_MODE //S10ģʽ +#define ADD_PANEL_DISPLAY_MODE //Ļģʽܡƽ⹦ + +#define USE_51_REG_ADJ_BL //51Ĵ +#ifdef USE_51_REG_ADJ_BL +#define REG51_MAX_VALUE 0x3FF //51ֵ +#define REG51_MIN_VALUE 0x80 //С51ֵĿǵ⿴ +#define SWIRE_MAX_VALUE 9 //SWIREֵ +#define SWIRE_STEP_VALUE 15 //⼶ +#endif +#endif + +#ifdef USE_FOR_OPPO_RENO3_PRO +#define AMOLED_NT37701_HX655 1 +#endif + +/** +* @brief test system +* @param none +* @retval none +*/ +void ap_demo(void); +void S20_Start_init(void); +void app_tp_I2C_init(void); +#endif diff --git a/src/app/demo/ap_demo_version.txt b/src/app/demo/ap_demo_version.txt new file mode 100644 index 0000000..741aa73 --- /dev/null +++ b/src/app/demo/ap_demo_version.txt @@ -0,0 +1,21 @@ + +//////////////////////////////////////////////////////////////////////// +//////////////////////////////////////////////////////////////////////// + + WL568_S20U_NT37701AH_CSOT667_20230713 + + 1、增加校准状态回读； + 2、将ST触摸软件复位全部更改为硬件复位； + 3、ST 触摸报错F3后启动硬件复位，无需判断是否是 F3 02 00； + 4、修正指纹唤醒弹窗问题：将app_tp_screen_init函数屏蔽。 + 5、增加版本号打印和BIN文件版本 + + + + + +//////////////////////////////////////////////////////////////////////// +//////////////////////////////////////////////////////////////////////// + + + diff --git a/src/app/demo/app_tp_for_custom_s8.h b/src/app/demo/app_tp_for_custom_s8.h new file mode 100644 index 0000000..add90a1 --- /dev/null +++ b/src/app/demo/app_tp_for_custom_s8.h @@ -0,0 +1,156 @@ +/******************************************************************************* +* +* +* File: app_tp_for_custom.h +* Description tp Э鴦ļضõĺ +* Version V0.1 +* Date 2021-10-14 +* Author zhanghz +*******************************************************************************/ +#ifndef __APP_TP_FOR_CUSTOM_S8_H__ +#define __APP_TP_FOR_CUSTOM_S8_H__ +#include "test_cfg_global.h" + +#include "string.h" +#include "tau_device_datatype.h" +#include "tau_common.h" +#include "app_tp_transfer.h" +#include "hal_gpio.h" + +#define AP_TP_TRANSFER 1 + +#if AMOLED_NT37280 + #define PHONE_SLAVE_TRANSFER_I2C 1 //1:ʾֻоƬ֮䣬touch ݲ I2C ͨţ + #define PHONE_SLAVE_TRANSFER_SPI 0 //1:ʾֻоƬ֮䣬touch ݲ SPI ͨţ + #define SCREEN_MASTER_TRANSFER_I2C 0 //1:ʾĻоƬ֮䣬touch ݲ I2C ͨţ + #define SCREEN_MASTER_TRANSFER_SPI 1 //1:ʾĻоƬ֮䣬touch ݲ SPI ͨţ +#elif LCD_HX83112A + #define PHONE_SLAVE_TRANSFER_I2C 1 //1:ʾֻоƬ֮䣬touch ݲ I2C ͨţ + #define PHONE_SLAVE_TRANSFER_SPI 0 //1:ʾֻоƬ֮䣬touch ݲ SPI ͨţ + #define SCREEN_MASTER_TRANSFER_I2C 0 //1:ʾĻоƬ֮䣬touch ݲ I2C ͨţ + #define SCREEN_MASTER_TRANSFER_SPI 0 //1:ʾĻоƬ֮䣬touch ݲ SPI ͨţ +#else // #if LCD_TD4310 + #define PHONE_SLAVE_TRANSFER_I2C 1 //1:ʾֻоƬ֮䣬touch ݲ I2C ͨţ + #define PHONE_SLAVE_TRANSFER_SPI 0 //1:ʾֻоƬ֮䣬touch ݲ SPI ͨţ + #define SCREEN_MASTER_TRANSFER_I2C 1 //1:ʾĻоƬ֮䣬touch ݲ I2C ͨţ + #define SCREEN_MASTER_TRANSFER_SPI 0 //1:ʾĻоƬ֮䣬touch ݲ SPI ͨţ +#endif + +#ifdef USE_FOR_SUMSUNG_S20U +#define CHIP_I2C_ADDRESS 0x48 //оƬ I2C ӻַ.I2Cַ +#define SCREEN_I2C_ADDRESS 0x49 //Ļ I2C ӻַ + +#elif defined(USE_FOR_SUMSUNG_S9PLUS) +#define CHIP_I2C_ADDRESS 0x48 //оƬ I2C ӻַ +#define SCREEN_I2C_ADDRESS 0x20 //Ļ I2C ӻַ + +#else +#define CHIP_I2C_ADDRESS 0x48 //оƬ I2C ӻַ +#define SCREEN_I2C_ADDRESS 0x49 //Ļ I2C ӻַ +#endif + +#define CHIP_I2C_ADDR_BITS I2C_ADDR_BITS_7 //Ļ I2C ַλ 7/10ĬΪ7 +#define SCREEN_I2C_ADDR_BITS I2C_ADDR_BITS_7 //Ļ I2C ַλ 7/10ĬΪ7 +#define I2C_MASTER_SPEED 800000 // I2C ͨ + +#define SPI_MASTER_SPEED 10000000 // SPI ͨ + +#define BUFFER_SIZE_MAX 200 // bufrer ֽ + +#define INPUT_WIDTH_VALUE 1440 //ԭװ X ֵֵ +#define INPUT_HEIGHT_VALUE 3200 //ԭװ Y ֵֵ + +#if LCD_FT8006S_TRULY59 +#define OUTPUT_WIDTH_VALUE 720 //ά X ֵֵ +#define OUTPUT_HEIGHT_VALUE 1520 //ά Y ֵֵ + +#else +#define OUTPUT_WIDTH_VALUE 1080 //ά X ֵֵ +#define OUTPUT_HEIGHT_VALUE 2340 //ά Y ֵֵ +#endif + + +#define SCREEN_TRANSFER_WRITE false //յscreen ioжϣ֮ö +#define SCREEN_TRANSFER_READ true //յscreen ioжϣ֮Ҫ + +typedef enum +{ + I2C_ADDR_BITS_7 = 7, + I2C_ADDR_BITS_10 = 10 +} en_I2C_ADDR_BITS_mdoe; + +typedef struct +{ + uint8_t *buffer; //յscreen ioжϺͨŵķbufferָ + size_t txbuffer_size; // buffer ݳȣҪʱĿǰֻ֧4ֽ + size_t rxbuffer_size; //֮Ҫصݳ + bool read_flag; //true յscreen ioжϣ֮Ҫ +} st_screen_data; + +typedef struct +{ + const uint8_t *buffer; //ͨŵķbufferָ + size_t txbuffer_size; // buffer ݳȣҪʱĿǰֻ֧4ֽ + size_t rxbuffer_size; //֮Ҫصݳ + bool read_flag; //true յscreen ioжϣ֮Ҫ +} st_screen_const_data; + +typedef struct +{ + uint8_t reg_size; //bufferĸ + size_t write_back_size; //Ҫ͵ݳ + const uint8_t *reg_data; //buffer + const uint8_t *write_back; //bufer +} st_reg_const_data; + +typedef struct +{ + uint8_t reg_size; //bufferĸ + size_t write_back_size; //Ҫ͵ݳ + uint8_t *reg_data; //buffer + uint8_t *write_back; //bufer +} st_reg_data; + +extern io_pad_e g_screen_input_rst_pad; +extern io_pad_e g_screen_input_int_pad; +extern io_pad_e g_phone_input_rst_pad; +extern io_pad_e g_phone_output_int_pad; + +extern uint8_t phone_start_flag; +extern uint8_t phone_touch_flag; +extern const uint8_t screen_reg_int_data_size; +extern const uint8_t screen_reg_start_data_size; +extern st_screen_data screen_reg_int_data[]; +extern st_screen_const_data screen_reg_start_data[]; +//extern st_reg_const_data phone_reg_const_data[]; + +/************************************************************************** +* @name : app_tp_screen_analysis_const +* @brief : screen start ׶ݽɿͻ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +uint8_t app_tp_screen_analysis_const(uint8_t transfer_now, uint8_t *rxbuffer, size_t data_size); + +/************************************************************************** +* @name : app_tp_screen_analysis_int +* @brief : screen IOжϺ ݽɿͻ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +uint8_t app_tp_screen_analysis_int(uint8_t transfer_now, uint8_t *rxbuffer, size_t data_size); + +/************************************************************************** +* @name : app_tp_phone_analysis_data +* @brief : phone ݽɿͻ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +void app_tp_phone_analysis_data(uint8_t *rxbuffer, size_t rxbuffer_size, const uint8_t **txbuffer, size_t *txbuffer_size); + + +#endif + diff --git a/src/app/demo/app_tp_phone_transfer_data_s8.h b/src/app/demo/app_tp_phone_transfer_data_s8.h new file mode 100644 index 0000000..eee1ad9 --- /dev/null +++ b/src/app/demo/app_tp_phone_transfer_data_s8.h @@ -0,0 +1,489 @@ +/******************************************************************************* +* +* +* File: app_tp_transfer_data.h +* Description ôӻҪ𸴵ĽֵӦĴֵ +* Version V0.1 +* Date 2021-10-14 +* Author zhanghz +*******************************************************************************/ +#ifndef __APP_TP_PHONE_TRANSFER_DATA_S8_H__ +#define __APP_TP_PHONE_TRANSFER_DATA_S8_H__ + +#include "tau_common.h" +#include "ap_demo.h" +/***************send to phone***************/ +//const uint8_t phone_b6_00_28_data[] = {0xB6, 0x00, 0x28, 0x80}; +//const uint8_t phone_b6_00_28_back[] = {0x10, 0x00, 0x00, 0x00, 0x00, 0x26, 0x0D, 0x01}; + +//const uint8_t phone_b6_00_08_data[] = {0xB6, 0x00, 0x08}; +//const uint8_t phone_b6_00_08_back[] = {0x00, 0x26, 0x23}; + +//const uint8_t phone_b6_00_04_data[] = {0xB6, 0x00, 0x04}; +//const uint8_t phone_b6_00_04_back[] = {0x00, 0x36, 0x70, 0x01, 0x00, 0x26, 0x23}; + +//const uint8_t phone_b8_00_08_data[] = {0xB8, 0x00, 0x08}; +//const uint8_t phone_b8_00_08_back[] = {0x13, 0x00, 0x08, 0x05, 0x07, 0x06, 0x00, 0x00}; //// becareful һ + +//const uint8_t phone_ac_data[] = {0xAC}; +//const uint8_t phone_ac_back[] = {0x16, 0x06, 0x23, 0x00, 0x00, 0x00, 0x00, 0x00}; + +//const uint8_t phone_a7_data[] = {0xA7}; +//const uint8_t phone_a7_back[] = {0x0F, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}; + +//const uint8_t phone_84_data[] = {0x84}; +//const uint8_t phone_84_back[] = {0x00, 0x00, 0x00, 0x00}; + +//const uint8_t phone_aa_00_data[] = {0xaa, 0x00}; +//const uint8_t phone_aa_00_back[] = {0x19, 0x01, 0x01, 0x23, 0x26, 0x26, 0x0D, 0x00}; + +//const uint8_t phone_aa_01_data[] = {0xaa, 0x01}; +//const uint8_t phone_aa_01_back[] = {0x1A, 0x9D, 0x9B, 0x00, 0x00, 0x00, 0x00, 0x00}; + +//const uint8_t phone_d0_00_5a_data[] = {0xD0, 0x00, 0x5A}; +//const uint8_t phone_d0_00_5a_back[] = {0x00, 0x20, 0x00, 0x10}; + +//const uint8_t phone_d0_00_5c_data[] = {0xD0, 0x00, 0x5C}; +//const uint8_t phone_d0_00_5c_back[] = {0x00, 0x10, 0x00, 0x3D}; + +//const uint8_t phone_d0_00_64_data[] = {0xD0, 0x00, 0x64}; +//const uint8_t phone_d0_00_64_back[] = {0x00, 0x01, 0x00}; + +//const uint8_t phone_d0_00_88_data[] = {0xD0, 0x00, 0x88}; +//const uint8_t phone_d0_00_88_back[] = {0x00, 0x8F, 0x0B, 0x9F, 0x05}; + +//const uint8_t phone_d0_00_7a_data[] = {0xD0, 0x00, 0x7A}; +//const uint8_t phone_d0_00_7a_back[] = {0x06, 0x04, 0x76, 0x00, 0x00, 0x05, 0x00, 0x24, 0x00, 0x00, 0x30, 0x00, 0x00, 0x20, 0x00}; + +//const uint8_t phone_d0_76_04_data[] = {0xD0, 0x76, 0x04}; +//const uint8_t phone_d0_76_04_back[] = {0x8F, 0x47, 0x39, 0x35, 0x35}; + +//const uint8_t phone_d0_00_50_data[] = {0xD0, 0x00, 0x50}; +//const uint8_t phone_d0_00_50_back[] = {0x06, 0x5C, 0x1F, 0x01, 0x06, 0x00, 0x00, 0x09}; //// becareful + +//const uint8_t phone_d0_1f_6e_data[] = {0xD0, 0x1F, 0x6E}; +//const uint8_t phone_d0_1f_6e_back[] = {0x00, 0x01, 0x9D, 0x90, 0x00}; + +//const uint8_t phone_d0_1f_b3_data[] = {0xD0, 0x1F, 0xB3}; +//const uint8_t phone_d0_1f_b3_back[] = {0x00, 0x01, 0x01, 0x01, 0x00}; + +//const uint8_t phone_d0_1f_6c_data[] = {0xD0, 0x1F, 0x6C}; +//const uint8_t phone_d0_1f_6c_back[] = {0x00, 0x09, 0x00}; + +//const uint8_t phone_d0_1f_b2_data[] = {0xD0, 0x1F, 0xB2}; +//const uint8_t phone_d0_1f_b2_back[] = {0x00, 0x02}; + +//const uint8_t phone_d0_1f_72_data[] = {0xD0, 0x1F, 0x72}; +//const uint8_t phone_d0_1f_72_back[] = {0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x14, 0x02, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF}; + +//const uint8_t phone_d0_00_06_data[] = {0xD0, 0x00, 0x06}; +//const uint8_t phone_d0_00_06_back[] = {0x00, 0x6C, 0x23, 0x00}; + +//const uint8_t phone_d0_23_ac_data[] = {0xD0, 0x23, 0xAC}; +//const uint8_t phone_d0_23_ac_back[] = {0x00, 0x42, 0x0A, 0x71, 0x0A, 0x28, 0x0A, 0xDE, 0x09, 0x05, 0x0A, 0xDE, 0x09, 0xCA, 0x09, 0x11, 0x0A, 0x50, 0x0A, 0xF5, 0x09, 0xF1, 0x09, 0x40, 0x0A, 0xF5, 0x09, 0x8E, 0x0A, 0x04, 0x0A, 0x54, 0x0A, 0x14, 0x0A, 0xBE, 0x09, 0x4E, 0x0A, 0x35, 0x0A, 0xB0, 0x0A, 0x6F, 0x0A, 0x00, 0x0B, 0xA6, 0x0A, 0x62, 0x0A, 0x62, 0x0A, 0x5E, 0x0A, 0xEA, 0x0A, 0xB5, 0x0A, 0x7B, 0x0B, 0x97, 0x0B, 0x82, 0x0B, 0xE1, 0x09, 0x5D, 0x0A, 0xF6, 0x09, 0xF3, 0x09, 0x10, 0x0A, 0x07, 0x0A, 0xBA, 0x09, 0x27, 0x0A, 0xC8, 0x09, 0x2C, 0x0A, 0xF0, 0x09, 0xAF, 0x09, 0x02, 0x0A, 0xC9, 0x09, 0xF7, 0x09, 0x7E, 0x0A, 0x94, 0x0A, 0xC7, 0x0A, 0x57, 0x0B, 0xCF, 0x0A, 0x4F, 0x0B, 0xF1, 0x0A, 0x5B, 0x0B, 0x07, 0x0B, 0x17, 0x0B, 0x9C, 0x0A, 0x57, 0x0A, 0xE7, 0x0A, 0xBE, 0x0A, 0x03, 0x0B, 0x69, 0x0B, 0x82, 0x0B}; + +//const uint8_t phone_d0_24_2c_data[] = {0xD0, 0x24, 0x2C}; +//const uint8_t phone_d0_24_2c_back[] = {0xEF, 0xEF, 0x09, 0xCE, 0x09, 0xD6, 0x09, 0xD4, 0x09, 0xEF, 0x09, 0xDE, 0x09, 0xD6, 0x09, 0x91, 0x09, 0x03, 0x0A, 0x88, 0x09, 0x16, 0x0A, 0xC9, 0x09, 0x1F, 0x0A, 0xD7, 0x09, 0xFB, 0x09, 0xBD, 0x09, 0x14, 0x0A, 0x38, 0x0A, 0xE2, 0x09, 0x22, 0x0A, 0x86, 0x0A, 0x2E, 0x0A, 0x64, 0x0A, 0xDF, 0x09, 0x0E, 0x0A, 0x53, 0x0A, 0x24, 0x0A, 0xBE, 0x0A, 0x94, 0x0A, 0xD7, 0x0A, 0x64, 0x0B, 0xD7, 0x0A, 0x6F, 0x0A, 0x3B, 0x0A, 0x44, 0x0A, 0x7D, 0x09, 0x9C, 0x09, 0x91, 0x09, 0x98, 0x09, 0x0A, 0x0A, 0x14, 0x0A, 0x25, 0x0A, 0xF5, 0x09, 0x7C, 0x09, 0xBC, 0x09, 0x76, 0x09, 0xA1, 0x09, 0x06, 0x0A, 0x7D, 0x09, 0xEA, 0x09, 0x9B, 0x09, 0xEA, 0x09, 0x3B, 0x0A, 0xE9, 0x09, 0x46, 0x0A, 0xD9, 0x09, 0x1D, 0x0A, 0x71, 0x0A, 0x3C, 0x0A, 0x09, 0x0A, 0xA3, 0x0A, 0xAC, 0x0A, 0xAD, 0x0B, 0x06, 0x0B}; + +//const uint8_t phone_d0_24_ac_data[] = {0xD0, 0x24, 0xAC}; +//const uint8_t phone_d0_24_ac_back[] = {0x28, 0x28, 0x0A, 0xE8, 0x09, 0xF1, 0x09, 0xE9, 0x09, 0x03, 0x0A, 0xEF, 0x09, 0xD5, 0x09, 0xC2, 0x09, 0xA4, 0x09, 0xF2, 0x09, 0x11, 0x0A, 0xF3, 0x09, 0x3F, 0x0A, 0xF2, 0x09, 0xF4, 0x09, 0x47, 0x0A, 0xA5, 0x09, 0x3A, 0x0A, 0xC3, 0x09, 0x04, 0x0A, 0x95, 0x09, 0x0E, 0x0A, 0x9B, 0x09, 0xED, 0x09, 0x2C, 0x0A, 0xDB, 0x09, 0x5A, 0x0A, 0x11, 0x0A, 0xAA, 0x0A, 0xA4, 0x0A, 0xA8, 0x0B, 0x65, 0x0B, 0xC6, 0x09, 0x99, 0x09, 0x9F, 0x09, 0x93, 0x09, 0xBC, 0x09, 0xB0, 0x09, 0x8C, 0x09, 0x62, 0x09, 0x70, 0x09, 0x95, 0x09, 0x12, 0x0A, 0xB7, 0x09, 0xED, 0x09, 0xEF, 0x09, 0xA9, 0x09, 0xE9, 0x09, 0x05, 0x0A, 0x00, 0x0A, 0x55, 0x0A, 0x77, 0x09, 0xD5, 0x09, 0x4C, 0x0A, 0xFC, 0x09, 0x3E, 0x0A, 0x94, 0x0A, 0xF6, 0x09, 0xA2, 0x0A, 0x71, 0x0A, 0xD5, 0x0A, 0xC0, 0x0A, 0xE4, 0x0A, 0x49, 0x0B}; + +//const uint8_t phone_d0_25_2c_data[] = {0xD0, 0x25, 0x2C}; +//const uint8_t phone_d0_25_2c_back[] = {0x21, 0x21, 0x0A, 0xE4, 0x09, 0xE9, 0x09, 0xE7, 0x09, 0x3F, 0x09, 0x2D, 0x09, 0xD6, 0x09, 0x91, 0x09, 0xA7, 0x09, 0xA1, 0x09, 0xB5, 0x09, 0xDC, 0x09, 0x6A, 0x09, 0xB1, 0x09, 0x34, 0x09, 0x79, 0x09, 0x0E, 0x0A, 0x11, 0x0A, 0x25, 0x0A, 0xD1, 0x09, 0xFE, 0x09, 0x9C, 0x09, 0xFE, 0x09, 0xED, 0x09, 0x05, 0x0A, 0x30, 0x0A, 0x1F, 0x0A, 0x9C, 0x0A, 0x15, 0x0A, 0xEC, 0x0A, 0xCE, 0x0A, 0x29, 0x0B, 0xCC, 0x09, 0x88, 0x09, 0x91, 0x09, 0x92, 0x09, 0xAC, 0x09, 0x9E, 0x09, 0x8F, 0x09, 0x3D, 0x09, 0x53, 0x09, 0x80, 0x09, 0xD6, 0x09, 0x3D, 0x09, 0xAC, 0x09, 0x9E, 0x09, 0x9F, 0x09, 0xE9, 0x09, 0xAA, 0x09, 0x0B, 0x0A, 0xE4, 0x09, 0x63, 0x0A, 0x94, 0x0A, 0x68, 0x0A, 0xC9, 0x09, 0x12, 0x0A, 0x0A, 0x0A, 0x98, 0x0A, 0x7F, 0x0A, 0xC5, 0x0A, 0x62, 0x0A, 0xB7, 0x0A, 0x4A, 0x0B, 0x52, 0x0B}; + +//const uint8_t phone_d0_25_ac_data[] = {0xD0, 0x25, 0xAC}; +//const uint8_t phone_d0_25_ac_back[] = {0xCF, 0xCF, 0x09, 0xCB, 0x09, 0xD5, 0x09, 0xDD, 0x09, 0x3F, 0x09, 0x35, 0x09, 0xEE, 0x09, 0x8E, 0x09, 0xAB, 0x09, 0xEF, 0x09, 0xC0, 0x09, 0x9B, 0x09, 0xE3, 0x09, 0xCC, 0x09, 0xBB, 0x09, 0x64, 0x09, 0xA6, 0x09, 0x0C, 0x0A, 0xB2, 0x09, 0x10, 0x0A, 0xE3, 0x09, 0x71, 0x0A, 0xD6, 0x0A, 0x1F, 0x0A, 0x02, 0x0A, 0x63, 0x0B, 0x7C, 0x0A, 0xE9, 0x09, 0x6F, 0x0A, 0xBF, 0x0A, 0x1A, 0x0B, 0x75, 0x0B, 0x6B, 0x09, 0xEA, 0x09, 0x76, 0x09, 0x91, 0x09, 0x9F, 0x09, 0x9B, 0x09, 0xCE, 0x09, 0xF5, 0x09, 0x4E, 0x09, 0x94, 0x09, 0xE7, 0x09, 0x52, 0x09, 0x94, 0x09, 0x90, 0x09, 0x86, 0x09, 0xBF, 0x09, 0x07, 0x0A, 0x99, 0x09, 0x06, 0x0A, 0x98, 0x09, 0xDD, 0x09, 0x2F, 0x0A, 0x47, 0x0B, 0x17, 0x0B, 0x24, 0x0A, 0xD3, 0x09, 0x96, 0x0A, 0x47, 0x0A, 0x8A, 0x0A, 0xAC, 0x0A, 0x95, 0x0B, 0x2B, 0x0B}; + +//const uint8_t phone_d0_26_2c_data[] = {0xD0, 0x26, 0x2C}; +//const uint8_t phone_d0_26_2c_back[] = {0xBC, 0xBC, 0x09, 0x74, 0x09, 0x85, 0x09, 0x92, 0x09, 0xB0, 0x09, 0xAE, 0x09, 0x4B, 0x09, 0x8E, 0x09, 0xA3, 0x09, 0x89, 0x09, 0x59, 0x09, 0xB4, 0x09, 0x5D, 0x09, 0x8A, 0x09, 0xCD, 0x09, 0x05, 0x0A, 0x0E, 0x0A, 0xA2, 0x09, 0x31, 0x0A, 0x90, 0x09, 0xD4, 0x09, 0xAE, 0x09, 0x4D, 0x0A, 0x4E, 0x0B, 0x74, 0x0A, 0xA6, 0x0A, 0x99, 0x0A, 0x46, 0x0A, 0x47, 0x0B, 0x99, 0x0A, 0x2D, 0x0B, 0x55, 0x0B, 0x50, 0x09, 0xCE, 0x09, 0x20, 0x09, 0x2D, 0x09, 0x56, 0x09, 0x4D, 0x09, 0x6D, 0x09, 0xB6, 0x09, 0x47, 0x09, 0xAC, 0x09, 0xCC, 0x09, 0x92, 0x09, 0xEB, 0x09, 0x82, 0x09, 0x9C, 0x09, 0xA2, 0x09, 0xCE, 0x09, 0x28, 0x0A, 0xCB, 0x09, 0xD1, 0x09, 0x11, 0x0A, 0x92, 0x0A, 0x2F, 0x0B, 0xF0, 0x09, 0x55, 0x0B, 0x25, 0x0A, 0x93, 0x0A, 0x50, 0x0A, 0xE7, 0x0A, 0xE5, 0x0A, 0x4B, 0x0B, 0xE9, 0x0A}; + +//const uint8_t phone_d0_26_ac_data[] = {0xD0, 0x26, 0xAC}; +//const uint8_t phone_d0_26_ac_back[] = {0xC5, 0xC5, 0x09, 0x88, 0x09, 0xA3, 0x09, 0xB4, 0x09, 0xDE, 0x09, 0xD7, 0x09, 0x9A, 0x09, 0x74, 0x09, 0x9E, 0x09, 0x65, 0x09, 0x7F, 0x09, 0xCF, 0x09, 0x64, 0x09, 0xB6, 0x09, 0x4E, 0x09, 0x93, 0x09, 0x45, 0x0A, 0x58, 0x0B, 0xFE, 0x0A, 0x3B, 0x0B, 0xA7, 0x0A, 0xA9, 0x0B, 0x36, 0x0B, 0xD4, 0x0A, 0xA2, 0x0A, 0x89, 0x0A, 0x2E, 0x0A, 0xA5, 0x0A, 0x65, 0x0A, 0xFB, 0x0A, 0xB4, 0x0A, 0xD2, 0x0A, 0x8C, 0x09, 0x4C, 0x09, 0x6D, 0x09, 0x83, 0x09, 0xB3, 0x09, 0xAB, 0x09, 0x58, 0x09, 0x5C, 0x09, 0x78, 0x09, 0xC1, 0x09, 0x5F, 0x09, 0xB0, 0x09, 0x46, 0x09, 0xA8, 0x09, 0xFC, 0x09, 0x93, 0x09, 0xB1, 0x0A, 0x72, 0x0A, 0x79, 0x0A, 0x5D, 0x0A, 0x2F, 0x0B, 0x82, 0x0B, 0x22, 0x0B, 0xD6, 0x0A, 0xB8, 0x0A, 0xE3, 0x0A, 0xA2, 0x0A, 0xD9, 0x0A, 0xAC, 0x0A, 0x32, 0x0B, 0xF8, 0x0A, 0xE7, 0x0A}; + +//const uint8_t phone_d0_27_2c_data[] = {0xD0, 0x27, 0x2C}; +//const uint8_t phone_d0_27_2c_back[] = {0x20, 0x20, 0x09, 0xC7, 0x09, 0x2E, 0x09, 0x4C, 0x09, 0x7C, 0x09, 0x6F, 0x09, 0xD7, 0x09, 0xEA, 0x09, 0x42, 0x09, 0x92, 0x09, 0xBD, 0x09, 0x8B, 0x09, 0xE8, 0x09, 0x6F, 0x09, 0xD7, 0x09, 0x05, 0x0A, 0x37, 0x0A, 0x78, 0x0A, 0x60, 0x0A, 0xA9, 0x0A, 0x2C, 0x0B, 0x27, 0x0B, 0xDF, 0x0A, 0x2C, 0x0B, 0x20, 0x0B, 0x8E, 0x0B, 0x4A, 0x0B, 0x40, 0x0B, 0x0D, 0x0B, 0xEB, 0x0A, 0x72, 0x0B, 0x57, 0x0B, 0x37, 0x09, 0x29, 0x09, 0x6C, 0x09, 0x8E, 0x09, 0xBF, 0x09, 0xBD, 0x09, 0x58, 0x09, 0x77, 0x09, 0x90, 0x09, 0xDC, 0x09, 0x48, 0x09, 0x8F, 0x09, 0xEA, 0x09, 0xB3, 0x09, 0x27, 0x0A, 0x97, 0x09, 0x0E, 0x0A, 0x25, 0x0A, 0x6E, 0x0A, 0xB3, 0x0A, 0xCA, 0x0A, 0x88, 0x0A, 0x8C, 0x0A, 0xB8, 0x0A, 0xCD, 0x0A, 0xDF, 0x0A, 0x2A, 0x0B, 0xE6, 0x0A, 0x63, 0x0B, 0x06, 0x0B, 0x83, 0x0B, 0xD5, 0x0A}; + + +/*******************************************/ +#ifdef USE_FOR_SUMSUNG_S20U +const uint8_t phone_data_60_1[]={0x09,0x00,0x10,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}; +const uint8_t phone_data_60_2[]={0x1D,0x61,0x02,0x02,0x06,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}; +const uint8_t phone_data_60_3[]={0x1D,0x61,0x06,0x00,0x02,0x02,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}; +const uint8_t phone_data_60_4[]={0x1D,0x41,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}; +const uint8_t phone_data_60_5[]={0x1D,0x61,0x05,0x02,0x02,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}; +const uint8_t phone_data_60_6[]={0x1D,0x61,0x02,0x02,0x05,0x02,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}; +const uint8_t phone_data_60_7[]={0x1D,0x61,0x05,0x02,0x02,0x02,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}; +const uint8_t phone_data_60_8[]={0x09,0x01,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}; +const uint8_t phone_data_21[]={0x80}; +const uint8_t phone_data_22[]={0x53,0x45,0x37,0x91,0x00}; +const uint8_t phone_data_23[]={0x10,0x00,0x10,0x00,0x05,0xA0,0x0C,0x80,0x11,0x26,0x00}; +const uint8_t phone_data_30[]={0x61,0x00}; +const uint8_t phone_data_52[]={0xAC,0x37,0x91}; +const uint8_t phone_data_55[]={0x20}; +const uint8_t phone_data_85_1[]={0x00}; +const uint8_t phone_data_85_2[]={0x01,0x20,0x01,0x04,0x01,0x00,0x03,0x04,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x00}; +const uint8_t phone_data_85_3[]={0x99,0x01,0x00,0x01,0x22,0x05,0x01,0x00,0x03,0x04,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0x01,0xFF}; +const uint8_t phone_data_90[]={0x47,0x39,0x38,0x36,0x00,0x04,0x00,0x07,0x20,0x01}; +const uint8_t phone_data_92_1[]={0x03}; +const uint8_t phone_data_92_2[]={0xE6,0x00,0xC7,0x00,0xD7,0x00}; +const uint8_t phone_data_92_3[]={0x11,0x11,0x25}; +const uint8_t phone_data_A3[]={0x23,0x77,0x01,0x01}; +const uint8_t phone_data_A4[]={0x23,0x77,0x01,0x02}; +const uint8_t phone_data_A5[]={0x23,0x77,0x01,0x28}; +const uint8_t phone_data_AF[]={0x00,0x03,0x01,0x00}; +//const uint8_t phone_data_E4[]={0x00}; +uint8_t phone_data_E4[]={0x01}; +const uint8_t phone_data_F1[]={0x07,0x07,0x00,0xA2}; +//const uint8_t phone_data_F5[]={0x00}; +const uint8_t phone_data_F5_1[]={0xFF}; +const uint8_t phone_data_F5_2[]={0x13}; +const uint8_t phone_data_F5_3[]={0x00}; +const uint8_t phone_data_F5_4[]={0x06}; +const uint8_t phone_data_F6_1[]={0xFA,0xF4,0xFB,0x09,0xFB,0x09}; +const uint8_t phone_data_F6_2[]={0x25,0x23,0x23,0xE1,0x21,0x86}; +const uint8_t phone_data_F6_3[]={0x00,0x01,0x00,0x01,0x00,0x00}; +const uint8_t phone_data_F6_4[]={0x00,0x02,0x00,0x00,0x00,0x00}; + +uint8_t phone_data_B1[]={0x00,0x082}; + +#if 1 +const uint8_t phone_data_72_0[]={ +0xFF,0xD1,0xFF,0xDB,0xFF,0xDA,0xFF,0xE1,0xFF,0xDF,0xFF,0xDE,0xFF,0xDB,0xFF,0xDC,0xFF,0xDE,0xFF,0xD8,0xFF,0xCF,0xFF,0xD4,0xFF,0xCC,0xFF,0xCA,0xFF,0xC5,0xFF,0xBD,\ +0xFF,0xBE,0xFF,0xC4,0xFF,0xB7,0xFF,0xBE,0xFF,0xBD,0xFF,0xC3,0xFF,0xC3,0xFF,0xCB,0xFF,0xD3,0xFF,0xCF,0xFF,0xCC,0xFF,0xBF,0xFF,0xBB,0xFF,0xBA,0xFF,0xBC,0xFF,0xC3,\ +0xFF,0xBE,0xFF,0xBA,0x00,0x25,0xFF,0xB6,0xFF,0xC1,0xFF,0xC0,0xFF,0xE5,0xFF,0xE7,0xFF,0xE8,0xFF,0xE9,0xFF,0xEB,0xFF,0xE6,0xFF,0xE7,0xFF,0xEA,0xFF,0xE8,0xFF,0xE4,\ +0xFF,0xDF,0xFF,0xE2,0xFF,0xD8,0xFF,0xD7,0xFF,0xD5,0xFF,0xC9,0xFF,0xC3,0xFF,0xC2,0xFF,0xB8,0xFF,0xB9,0xFF,0xB7,0xFF,0xBF,0xFF,0xBF,0xFF,0xC9,0xFF,0xD1,0xFF,0xD1,\ +0xFF,0xC9,0xFF,0xBE,0xFF,0xB5,0xFF,0xB2,0xFF,0xBA,0xFF,0xC1,0xFF,0xBB,0xFF,0xB6,0x00,0xCF,0xFF,0xC3,0xFF,0xBD,0xFF,0xC2,0xFF,0xF1,0xFF,0xF5,0xFF,0xF5,0xFF,0xFA,\ +0xFF,0xFA,0xFF,0xF8,0xFF,0xF9,0xFF,0xFB,0xFF,0xF8,0xFF,0xF4,0xFF,0xEF,0xFF,0xF4,0xFF,0xEA,0xFF,0xEC,0xFF,0xE7,0xFF,0xDD,0xFF,0xD1,0xFF,0xD0,0xFF,0xC0,0xFF,0xBB,\ +0xFF,0xB6,0xFF,0xBB,0xFF,0xBA,0xFF,0xC3,0xFF,0xD3,0xFF,0xD9,0xFF,0xD6,0xFF,0xC8,0xFF,0xC1,0xFF,0xB3,0xFF,0xB6,0xFF,0xBD,0xFF,0xB7,0xFF,0xA9,0x00,0xC7,0xFF,0xC2,\ +0xFF,0xC5,0xFF,0xD0,0xFF,0xED,0xFF,0xEF,0xFF,0xF5,0xFF,0xF7,0xFF,0xFB,0xFF,0xF8,0xFF,0xF9,0xFF,0xF9,0xFF,0xF8,0xFF,0xF8,0xFF,0xF5,0xFF,0xFA,0xFF,0xF0,0xFF,0xEE,\ +0xFF,0xEF,0xFF,0xE5,0xFF,0xDE,0xFF,0xDC,0xFF,0xCC,0xFF,0xC1,0xFF,0xBA,0xFF,0xB9,0xFF,0xB7,0xFF,0xBF,0xFF,0xCD,0xFF,0xD5,0xFF,0xD5,0xFF,0xCC,0xFF,0xC7,0xFF,0xBA,\ +0xFF,0xB6,0xFF,0xBB,0xFF,0xB5,0xFF,0xBC,0xFF,0xBB,0xFF,0xBA,0xFF,0xB9,0xFF,0xBE,0xFF,0xF8,0xFF,0xFA,0xFF,0xFD,0x00,0x01,0x00,0x06,0x00,0x05,0x00,0x04,0x00,0x08,\ +0x00,0x08,0x00,0x04,0xFF,0xFE,0x00,0x01,0xFF,0xFB,0xFF,0xFD,0xFF,0xFD,0xFF,0xF1,0xFF,0xEC,0xFF,0xEB,0xFF,0xDD,0xFF,0xD4,0xFF,0xC9,0xFF,0xC3,0xFF,0xBB,0xFF,0xC1,\ +0xFF,0xCE,0xFF,0xD2,0xFF,0xD1,0xFF,0xD2,0xFF,0xC8,0xFF,0xC0,0xFF,0xBD,0xFF,0xBA,0xFF,0xB4,0xFF,0xBC,0xFF,0xBC,0xFF,0xB8,0xFF,0xBF,0xFF,0xC1,0xFF,0xF3,0xFF,0xF9,\ +0xFF,0xF8,0xFF,0xFF,0x00,0x01,0xFF,0xFF,0x00,0x03,0x00,0x00,0x00,0x01,0x00,0x03,0xFF,0xFE,0x00,0x01,0xFF,0xFB,0xFF,0xFD,0xFF,0xFC,0xFF,0xF1,0xFF,0xEA,0xFF,0xEE,\ +0xFF,0xE0,0xFF,0xDE,0xFF,0xD0,0xFF,0xC7,0xFF,0xBE,0xFF,0xC2,0xFF,0xC8,0xFF,0xC9,0xFF,0xC6,0xFF,0xC1,0xFF,0xBF,0xFF,0xB8,0xFF,0xB4,0xFF,0xB3,0xFF,0xB1,0xFF,0xB5,\ +0xFF,0xB9,0xFF,0xAB,0xFF,0xB1,0xFF,0xB6,0xFF,0xF3,0xFF,0xF6,0xFF,0xFB,0xFF,0xFD,0x00,0x02,0x00,0x01,0x00,0x00,0x00,0x06,0x00,0x04,0x00,0x02,0xFF,0xFC,0x00,0x03,\ +0xFF,0xFD,0xFF,0xFF,0xFF,0xFF,0xFF,0xF5,0xFF,0xEE,0xFF,0xF0,0xFF,0xE6,0xFF,0xE2,0xFF,0xDB,0xFF,0xD1,0xFF,0xC1,0xFF,0xC3,0xFF,0xC6,0xFF,0xC2,0xFF,0xC1,0xFF,0xBF,\ +0xFF,0xC0,0xFF,0xB6,0xFF,0xB6,0xFF,0xB8,0xFF,0xB4,0xFF,0xB2,0xFF,0xB6,0xFF,0xAD,0xFF,0xAD,0xFF,0xB4,0xFF,0xF3,0xFF,0xF7,0xFF,0xF7,0xFF,0xFD,0x00,0x01,0x00,0x00,\ +0x00,0x01,0x00,0x04,0x00,0x03,0xFF,0xFD,0xFF,0xFE,0x00,0x03,0xFF,0xFE,0xFF,0xFE,0x00,0x00,0xFF,0xF3,0xFF,0xF0,0xFF,0xEF,0xFF,0xEA,0xFF,0xE3,0xFF,0xDC,0xFF,0xD6,\ +0xFF,0xC2,0xFF,0xBE,0xFF,0xC2,0xFF,0xBD,0xFF,0xBD,0xFF,0xC0,0xFF,0xBE,0xFF,0xBA,0xFF,0xB8,0xFF,0xB9,0xFF,0xB1,0xFF,0xB1,0xFF,0xB6,0xFF,0xAB,0xFF,0xAF,0xFF,0xB6,\ +0xFF,0xFB,0xFF,0xFF,0x00,0x03,0x00,0x05,0x00,0x0C,0x00,0x08,0x00,0x08,0x00,0x0B,0x00,0x0C,0x00,0x0A,0x00,0x08,0x00,0x0E,0x00,0x09,0x00,0x09,0x00,0x07,0xFF,0xFD,\ +0xFF,0xF7,0xFF,0xFA,0xFF,0xF1,0xFF,0xF2,0xFF,0xE8,0xFF,0xE1,0xFF,0xCF,0xFF,0xC4,0xFF,0xC7,0xFF,0xC6,0xFF,0xC6,0xFF,0xC7,0xFF,0xCA,0xFF,0xCA,0xFF,0xCB,0xFF,0xCC,\ +0xFF,0xC6,0xFF,0xC2,0xFF,0xC0,0xFF,0xB2,0xFF,0xBD,0xFF,0xBE,0xFF,0xFA,0xFF,0xFE,0x00,0x03,0x00,0x05,0x00,0x09,0x00,0x07,0x00,0x07,0x00,0x0A,0x00,0x0A,0x00,0x07,\ +0x00,0x04,0x00,0x09,0x00,0x04,0x00,0x05,0x00,0x04,0xFF,0xFA,0xFF,0xF9,0xFF,0xFB,0xFF,0xF2,0xFF,0xEF,0xFF,0xEA,0xFF,0xE3,0xFF,0xD3,0xFF,0xCC,0xFF,0xC7,0xFF,0xC8,\ +0xFF,0xC9,0xFF,0xC5,0xFF,0xCC,0xFF,0xCF,0xFF,0xCF,0xFF,0xD6,0xFF,0xCF,0xFF,0xC9,0xFF,0xC7,0xFF,0xB0,0xFF,0xB5,0xFF,0xBC,0xFF,0xF5,0xFF,0xF9,0xFF,0xFD,0x00,0x02,\ +0x00,0x05,0x00,0x03,0x00,0x06,0x00,0x07,0x00,0x08,0x00,0x02,0x00,0x00,0x00,0x0A,0x00,0x01,0x00,0x03,0x00,0x01,0xFF,0xF9,0xFF,0xF3,0xFF,0xF8,0xFF,0xF1,0xFF,0xF1,\ +0xFF,0xEA,0xFF,0xE9,0xFF,0xDB,0xFF,0xD0,0xFF,0xC9,0xFF,0xC8,0xFF,0xCC,0xFF,0xC5,0xFF,0xC5,0xFF,0xCA,0xFF,0xD1,0xFF,0xD8,0xFF,0xD3,0xFF,0xD2,0xFF,0xCC,0xFF,0xB2,\ +0xFF,0xB1,0xFF,0xB8,0xFF,0xEF,0xFF,0xF6,0xFF,0xFA,0xFF,0xFD,0x00,0x00,0xFF,0xFE,0x00,0x02,0x00,0x03,0x00,0x02,0xFF,0xFD,0xFF,0xFD,0x00,0x04,0xFF,0xFB,0xFF,0xFF,\ +0xFF,0xFF,0xFF,0xF3,0xFF,0xEE,0xFF,0xF5,0xFF,0xEC,0xFF,0xEC,0xFF,0xE8,0xFF,0xE5,0xFF,0xD9,0xFF,0xD4,0xFF,0xCE,0xFF,0xC7,0xFF,0xC7,0xFF,0xC1,0xFF,0xC1,0xFF,0xC2,\ +0xFF,0xCA,0xFF,0xD4,0xFF,0xCB,0xFF,0xCE,0xFF,0xD1,0xFF,0xB8,0xFF,0xB1,0xFF,0xB2,0xFF,0xFC,0xFF,0xFF,0x00,0x02,0x00,0x04,0x00,0x06,0x00,0x05,0x00,0x08,0x00,0x0A,\ +0x00,0x09,0x00,0x04,0x00,0x02,0x00,0x09,0x00,0x01,0x00,0x04,0x00,0x02,0xFF,0xFB,0xFF,0xF6,0xFF,0xFD,0xFF,0xF5,0xFF,0xF5,0xFF,0xF2,0xFF,0xF1,0xFF,0xE4,0xFF,0xE2,\ +0xFF,0xDE,0xFF,0xD0,0xFF,0xCC,0xFF,0xC2,0xFF,0xC4,0xFF,0xC5,0xFF,0xD1,0xFF,0xDA,0xFF,0xD6,0xFF,0xD8,0xFF,0xDE,0xFF,0xCA,0xFF,0xC4,0xFF,0xC0,0xFF,0xEF,0xFF,0xF5,\ +0xFF,0xF7,0xFF,0xF8,0xFF,0xFB,0xFF,0xF7,0xFF,0xFA,0xFF,0xFD,0xFF,0xFC,0xFF,0xF9,0xFF,0xF6,0xFF,0xFD,0xFF,0xF7,0xFF,0xF8,0xFF,0xF6,0xFF,0xEF,0xFF,0xEC,0xFF,0xF2,\ +0xFF,0xEB,0xFF,0xEA,0xFF,0xE8,0xFF,0xE6,0xFF,0xDE,0xFF,0xDA,0xFF,0xDB,0xFF,0xD5,0xFF,0xCD,0xFF,0xBD,0xFF,0xC2,0xFF,0xC4,0xFF,0xCA,0xFF,0xD3,0xFF,0xCF,0xFF,0xD5,\ +0xFF,0xDC,0xFF,0xCC,0xFF,0xC4,0xFF,0xC5,0xFF,0xF7,0xFF,0xF9,0xFF,0xFA,0xFF,0xFA,0x00,0x00,0xFF,0xFB,0x00,0x00,0x00,0x00,0xFF,0xFF,0xFF,0xFB,0xFF,0xFA,0xFF,0xFE,\ +0xFF,0xF3,0xFF,0xFA,0xFF,0xF8,0xFF,0xF1,0xFF,0xF0,0xFF,0xF2,0xFF,0xED,0xFF,0xEC,0xFF,0xEA,0xFF,0xE6,0xFF,0xE0,0xFF,0xDE,0xFF,0xDF,0xFF,0xD9,0xFF,0xCF,0xFF,0xC1,\ +0xFF,0xC0,0xFF,0xC7,0xFF,0xCB,0xFF,0xD3,0xFF,0xD0,0xFF,0xD7,0xFF,0xE2,0xFF,0xD2,0xFF,0xD0,0xFF,0xCD,0xFF,0xEB,0xFF,0xED,0xFF,0xE9,0xFF,0xED,0xFF,0xF3,0xFF,0xED,\ +0xFF,0xED,0xFF,0xF0,0xFF,0xEF,0xFF,0xEB,0xFF,0xE8,0xFF,0xEF,0xFF,0xE7,0xFF,0xEB,0xFF,0xEC,0xFF,0xE3,0xFF,0xDE,0xFF,0xE3,0xFF,0xDF,0xFF,0xE2,0xFF,0xE2,0xFF,0xDE,\ +0xFF,0xD8,0xFF,0xD8,0xFF,0xDC,0xFF,0xD7,0xFF,0xD0,0xFF,0xC0,0xFF,0xBE,0xFF,0xC0,0xFF,0xC4,0xFF,0xCE,0xFF,0xCA,0xFF,0xD2,0xFF,0xDB,0xFF,0xCD,0xFF,0xCD,0xFF,0xC7,\ +0xFF,0xD8,0xFF,0xDF,0xFF,0xE0,0xFF,0xDD,0xFF,0xDF,0xFF,0xDE,0xFF,0xE0,0xFF,0xE0,0xFF,0xDF,0xFF,0xDE,0xFF,0xD9,0xFF,0xE1,0xFF,0xD8,0xFF,0xDF,0xFF,0xDD,0xFF,0xD6,\ +0xFF,0xD6,0xFF,0xDB,0xFF,0xD4,0xFF,0xD7,0xFF,0xD4,0xFF,0xD5,0xFF,0xD4,0xFF,0xD6,0xFF,0xD8,0xFF,0xD7,0xFF,0xD3,0xFF,0xC8,0xFF,0xC6,0xFF,0xBF,0xFF,0xC5,0xFF,0xCE,\ +0xFF,0xC6,0xFF,0xD3,0xFF,0xD7,0xFF,0xCD,0xFF,0xCB,0xFF,0xC7}; +const uint8_t phone_data_72_5[]={ +0xFF,0xDA,0xFF,0xE4,0xFF,0xE0,0xFF,0xE6,0xFF,0xE5,0xFF,0xDF,0xFF,0xE1,0xFF,0xE4,0xFF,0xE3,0xFF,0xDD,0xFF,0xD6,0xFF,0xD5,0xFF,0xD2,0xFF,0xCF,0xFF,0xC9,0xFF,0xC1,\ +0xFF,0xC0,0xFF,0xC7,0xFF,0xBD,0xFF,0xBD,0xFF,0xBF,0xFF,0xC5,0xFF,0xC3,0xFF,0xCF,0xFF,0xD0,0xFF,0xCE,0xFF,0xCC,0xFF,0xC1,0xFF,0xBC,0xFF,0xBC,0xFF,0xBB,0xFF,0xC3,\ +0xFF,0xBA,0xFF,0xB9,0x00,0x24,0xFF,0xB8,0xFF,0xC1,0xFF,0xBD,0xFF,0xEE,0xFF,0xF4,0xFF,0xF2,0xFF,0xF2,0xFF,0xF7,0xFF,0xF3,0xFF,0xF5,0xFF,0xF6,0xFF,0xF5,0xFF,0xED,\ +0xFF,0xEA,0xFF,0xE9,0xFF,0xE4,0xFF,0xE1,0xFF,0xDB,0xFF,0xD1,0xFF,0xC8,0xFF,0xC9,0xFF,0xBF,0xFF,0xBD,0xFF,0xC1,0xFF,0xC7,0xFF,0xC5,0xFF,0xD1,0xFF,0xD6,0xFF,0xD6,\ +0xFF,0xD2,0xFF,0xC7,0xFF,0xBA,0xFF,0xBA,0xFF,0xBD,0xFF,0xC5,0xFF,0xBC,0xFF,0xB5,0x00,0xD2,0xFF,0xC6,0xFF,0xC1,0xFF,0xC7,0xFF,0xE8,0xFF,0xE0,0xFF,0xE4,0xFF,0xEC,\ +0xFF,0xED,0xFF,0xEB,0xFF,0xEB,0xFF,0xF0,0xFF,0xEF,0xFF,0xE7,0xFF,0xE4,0xFF,0xE9,0xFF,0xE4,0xFF,0xE1,0xFF,0xDD,0xFF,0xD3,0xFF,0xCA,0xFF,0xC5,0xFF,0xB9,0xFF,0xB5,\ +0xFF,0xAF,0xFF,0xB3,0xFF,0xB3,0xFF,0xC1,0xFF,0xC8,0xFF,0xCA,0xFF,0xCC,0xFF,0xC1,0xFF,0xB6,0xFF,0xAA,0xFF,0xAB,0xFF,0xB5,0xFF,0xAC,0xFF,0xA3,0x00,0xBA,0xFF,0xBE,\ +0xFF,0xBF,0xFF,0xC9,0xFF,0xF0,0xFF,0xF4,0xFF,0xF6,0xFF,0xFC,0x00,0x01,0xFF,0xFD,0xFF,0xFD,0xFF,0xFE,0xFF,0xFF,0xFF,0xF9,0xFF,0xF8,0xFF,0xFF,0xFF,0xF6,0xFF,0xF1,\ +0xFF,0xF1,0xFF,0xE5,0xFF,0xE2,0xFF,0xDD,0xFF,0xCD,0xFF,0xBF,0xFF,0xBF,0xFF,0xBB,0xFF,0xB7,0xFF,0xC1,0xFF,0xCA,0xFF,0xD2,0xFF,0xD6,0xFF,0xCD,0xFF,0xC4,0xFF,0xB8,\ +0xFF,0xB7,0xFF,0xBD,0xFF,0xB2,0xFF,0xB5,0xFF,0xB8,0xFF,0xB8,0xFF,0xBD,0xFF,0xBD,0xFF,0xF8,0xFF,0xFA,0xFF,0xFF,0x00,0x04,0x00,0x05,0x00,0x02,0x00,0x05,0x00,0x07,\ +0x00,0x07,0x00,0x02,0xFF,0xFF,0x00,0x01,0xFF,0xFD,0xFF,0xFE,0xFF,0xFA,0xFF,0xEE,0xFF,0xE8,0xFF,0xE6,0xFF,0xDC,0xFF,0xD3,0xFF,0xC8,0xFF,0xC1,0xFF,0xBA,0xFF,0xC0,\ +0xFF,0xCA,0xFF,0xCC,0xFF,0xCE,0xFF,0xCE,0xFF,0xC7,0xFF,0xBD,0xFF,0xB8,0xFF,0xB5,0xFF,0xAF,0xFF,0xB8,0xFF,0xB7,0xFF,0xB4,0xFF,0xB9,0xFF,0xBE,0x00,0x0A,0x00,0x0E,\ +0x00,0x0D,0x00,0x16,0x00,0x15,0x00,0x0C,0x00,0x13,0x00,0x13,0x00,0x15,0x00,0x10,0x00,0x07,0x00,0x0D,0x00,0x09,0x00,0x0A,0x00,0x06,0xFF,0xFC,0xFF,0xF6,0xFF,0xF6,\ +0xFF,0xEA,0xFF,0xE7,0xFF,0xDC,0xFF,0xD1,0xFF,0xC6,0xFF,0xCA,0xFF,0xCE,0xFF,0xCA,0xFF,0xCA,0xFF,0xC8,0xFF,0xC3,0xFF,0xB9,0xFF,0xBA,0xFF,0xB5,0xFF,0xAF,0xFF,0xB4,\ +0xFF,0xBB,0xFF,0xB2,0xFF,0xB1,0xFF,0xBA,0xFF,0xF6,0xFF,0xF8,0xFF,0xFD,0x00,0x04,0x00,0x03,0x00,0x06,0x00,0x07,0x00,0x07,0x00,0x07,0x00,0x00,0xFF,0xF9,0x00,0x03,\ +0x00,0x01,0x00,0x00,0xFF,0xFE,0xFF,0xF4,0xFF,0xEE,0xFF,0xEE,0xFF,0xE6,0xFF,0xE1,0xFF,0xDC,0xFF,0xCF,0xFF,0xBE,0xFF,0xC8,0xFF,0xC4,0xFF,0xBA,0xFF,0xBE,0xFF,0xC0,\ +0xFF,0xBD,0xFF,0xB7,0xFF,0xB4,0xFF,0xB5,0xFF,0xB1,0xFF,0xAC,0xFF,0xB3,0xFF,0xAC,0xFF,0xA7,0xFF,0xB0,0x00,0x00,0x00,0x04,0x00,0x05,0x00,0x0E,0x00,0x0D,0x00,0x08,\ +0x00,0x0F,0x00,0x0D,0x00,0x13,0x00,0x0A,0x00,0x07,0x00,0x0D,0x00,0x0B,0x00,0x08,0x00,0x06,0xFF,0xFE,0xFF,0xF8,0xFF,0xFA,0xFF,0xF0,0xFF,0xEB,0xFF,0xE8,0xFF,0xDD,\ +0xFF,0xCE,0xFF,0xC6,0xFF,0xC8,0xFF,0xC4,0xFF,0xC6,0xFF,0xC6,0xFF,0xC3,0xFF,0xC1,0xFF,0xBE,0xFF,0xBB,0xFF,0xB3,0xFF,0xB4,0xFF,0xB9,0xFF,0xB2,0xFF,0xB9,0xFF,0xBC,\ +0x00,0x02,0x00,0x07,0x00,0x09,0x00,0x0F,0x00,0x12,0x00,0x0A,0x00,0x0B,0x00,0x10,0x00,0x14,0x00,0x05,0x00,0x08,0x00,0x11,0x00,0x08,0x00,0x0B,0x00,0x0A,0xFF,0xFF,\ +0xFF,0xFA,0xFF,0xFB,0xFF,0xF3,0xFF,0xF3,0xFF,0xEC,0xFF,0xE1,0xFF,0xD3,0xFF,0xCD,0xFF,0xC9,0xFF,0xC7,0xFF,0xCA,0xFF,0xC4,0xFF,0xCB,0xFF,0xCA,0xFF,0xCB,0xFF,0xCB,\ +0xFF,0xC0,0xFF,0xC0,0xFF,0xC0,0xFF,0xB4,0xFF,0xBB,0xFF,0xC1,0x00,0x12,0x00,0x17,0x00,0x19,0x00,0x1B,0x00,0x1E,0x00,0x1C,0x00,0x17,0x00,0x1E,0x00,0x20,0x00,0x15,\ +0x00,0x18,0x00,0x19,0x00,0x0E,0x00,0x15,0x00,0x12,0x00,0x09,0x00,0x08,0x00,0x09,0x00,0x01,0xFF,0xFB,0xFF,0xFA,0xFF,0xF3,0xFF,0xE3,0xFF,0xD7,0xFF,0xCF,0xFF,0xCF,\ +0xFF,0xCE,0xFF,0xC4,0xFF,0xD1,0xFF,0xD4,0xFF,0xD7,0xFF,0xD5,0xFF,0xD0,0xFF,0xD0,0xFF,0xCC,0xFF,0xB8,0xFF,0xBB,0xFF,0xC1,0x00,0x02,0x00,0x07,0x00,0x07,0x00,0x0D,\ +0x00,0x10,0x00,0x0C,0x00,0x09,0x00,0x12,0x00,0x16,0x00,0x0D,0x00,0x0A,0x00,0x0F,0x00,0x0A,0x00,0x0B,0x00,0x0A,0xFF,0xFF,0xFF,0xFC,0xFF,0xFF,0xFF,0xF7,0xFF,0xF9,\ +0xFF,0xF2,0xFF,0xED,0xFF,0xE1,0xFF,0xD5,0xFF,0xCF,0xFF,0xCB,0xFF,0xD2,0xFF,0xC8,0xFF,0xCB,0xFF,0xD0,0xFF,0xD7,0xFF,0xDB,0xFF,0xD4,0xFF,0xD4,0xFF,0xD6,0xFF,0xBA,\ +0xFF,0xB9,0xFF,0xBD,0xFF,0xFA,0xFF,0xFD,0x00,0x01,0x00,0x03,0x00,0x08,0x00,0x02,0x00,0x03,0x00,0x08,0x00,0x0A,0x00,0x03,0x00,0x02,0x00,0x05,0x00,0x00,0x00,0x03,\ +0x00,0x02,0xFF,0xF7,0xFF,0xF6,0xFF,0xF7,0xFF,0xEF,0xFF,0xF3,0xFF,0xF0,0xFF,0xE5,0xFF,0xDB,0xFF,0xD5,0xFF,0xCF,0xFF,0xC5,0xFF,0xC6,0xFF,0xC0,0xFF,0xBF,0xFF,0xC2,\ +0xFF,0xCD,0xFF,0xD3,0xFF,0xCC,0xFF,0xCC,0xFF,0xD2,0xFF,0xBA,0xFF,0xAF,0xFF,0xB3,0x00,0x0D,0x00,0x14,0x00,0x13,0x00,0x15,0x00,0x18,0x00,0x12,0x00,0x18,0x00,0x17,\ +0x00,0x19,0x00,0x13,0x00,0x14,0x00,0x12,0x00,0x08,0x00,0x0E,0x00,0x0C,0x00,0x08,0x00,0x05,0x00,0x04,0xFF,0xFE,0x00,0x02,0xFF,0xFE,0xFF,0xF9,0xFF,0xED,0xFF,0xEF,\ +0xFF,0xDF,0xFF,0xD1,0xFF,0xCC,0xFF,0xC9,0xFF,0xC7,0xFF,0xCB,0xFF,0xD4,0xFF,0xDC,0xFF,0xDA,0xFF,0xDB,0xFF,0xE3,0xFF,0xD0,0xFF,0xC7,0xFF,0xC8,0xFF,0xFD,0x00,0x04,\ +0x00,0x03,0x00,0x03,0x00,0x08,0x00,0x06,0x00,0x06,0x00,0x07,0x00,0x0B,0x00,0x01,0x00,0x04,0x00,0x08,0x00,0x02,0x00,0x02,0x00,0x04,0xFF,0xFA,0xFF,0xF7,0xFF,0xFA,\ +0xFF,0xF6,0xFF,0xF6,0xFF,0xF6,0xFF,0xF5,0xFF,0xE7,0xFF,0xE7,0xFF,0xE5,0xFF,0xDD,0xFF,0xD2,0xFF,0xC7,0xFF,0xCB,0xFF,0xCF,0xFF,0xD4,0xFF,0xDA,0xFF,0xDA,0xFF,0xDD,\ +0xFF,0xE5,0xFF,0xD6,0xFF,0xCF,0xFF,0xD0,0xFF,0xF1,0xFF,0xF4,0xFF,0xEF,0xFF,0xF5,0xFF,0xFA,0xFF,0xF2,0xFF,0xF6,0xFF,0xFB,0xFF,0xFB,0xFF,0xF3,0xFF,0xF4,0xFF,0xF8,\ +0xFF,0xF4,0xFF,0xF4,0xFF,0xF4,0xFF,0xEC,0xFF,0xEB,0xFF,0xEE,0xFF,0xEA,0xFF,0xE8,0xFF,0xE4,0xFF,0xE5,0xFF,0xDB,0xFF,0xDB,0xFF,0xD9,0xFF,0xD5,0xFF,0xCC,0xFF,0xBF,\ +0xFF,0xBD,0xFF,0xC5,0xFF,0xC8,0xFF,0xCE,0xFF,0xCC,0xFF,0xD3,0xFF,0xDB,0xFF,0xCC,0xFF,0xCD,0xFF,0xCA,0xFF,0xF7,0xFF,0xF8,0xFF,0xF5,0xFF,0xF5,0xFF,0xFA,0xFF,0xF6,\ +0xFF,0xFC,0xFF,0xF9,0xFF,0xFB,0xFF,0xF7,0xFF,0xF4,0xFF,0xF6,0xFF,0xEE,0xFF,0xF4,0xFF,0xF4,0xFF,0xEE,0xFF,0xEB,0xFF,0xEC,0xFF,0xEA,0xFF,0xEC,0xFF,0xEC,0xFF,0xE7,\ +0xFF,0xDF,0xFF,0xE1,0xFF,0xE1,0xFF,0xDB,0xFF,0xD6,0xFF,0xCB,0xFF,0xC7,0xFF,0xCB,0xFF,0xD0,0xFF,0xD4,0xFF,0xD0,0xFF,0xD7,0xFF,0xE3,0xFF,0xD6,0xFF,0xD7,0xFF,0xD2,\ +0xFF,0xE4,0xFF,0xEE,0xFF,0xEE,0xFF,0xEE,0xFF,0xF1,0xFF,0xED,0xFF,0xED,0xFF,0xF1,0xFF,0xED,0xFF,0xEC,0xFF,0xE6,0xFF,0xEC,0xFF,0xEA,0xFF,0xEA,0xFF,0xE7,0xFF,0xE3,\ +0xFF,0xE5,0xFF,0xE5,0xFF,0xE1,0xFF,0xE1,0xFF,0xE0,0xFF,0xE1,0xFF,0xDE,0xFF,0xDE,0xFF,0xDE,0xFF,0xDD,0xFF,0xD5,0xFF,0xD2,0xFF,0xCF,0xFF,0xCA,0xFF,0xD0,0xFF,0xD2,\ +0xFF,0xCE,0xFF,0xDA,0xFF,0xDD,0xFF,0xD8,0xFF,0xD5,0xFF,0xCE}; +const uint8_t phone_data_72_13[]={ +0x03,0x22,0x02,0xCD,0x02,0xCD,0x02,0xD0,0x02,0xC7,0x02,0xEB,0x02,0xF0,0x02,0xD6,0x02,0xA4,0x02,0xEE,0x02,0xF6,0x02,0xC4,0x02,0xDF,0x02,0xD6,0x02,0xD3,0x03,0x34,\ +0x03,0x2B,0x02,0xFC,0x03,0x31,0x03,0x0E,0x03,0x5D,0x03,0x2E,0x03,0x08,0x03,0x3A,0x03,0x63,0x03,0x54,0x03,0x14,0x03,0x3D,0x03,0x37,0x03,0x95,0x03,0x81,0x03,0x31,\ +0x03,0x95,0x03,0x72,0x03,0x6C,0x03,0x8F,0x03,0x46,0x03,0x57,0x02,0xFF,0x02,0xBE,0x02,0xC1,0x02,0xC7,0x02,0xB6,0x02,0xD9,0x02,0xE5,0x02,0xCD,0x02,0x95,0x02,0xDF,\ +0x02,0xEE,0x02,0xB3,0x02,0xD3,0x02,0xCA,0x02,0xCD,0x03,0x2B,0x03,0x1A,0x02,0xF6,0x03,0x2B,0x02,0xFF,0x03,0x54,0x03,0x22,0x02,0xF9,0x03,0x31,0x03,0x5A,0x03,0x49,\ +0x03,0x08,0x03,0x34,0x03,0x2B,0x03,0x89,0x03,0x72,0x03,0x22,0x03,0x8F,0x03,0x60,0x03,0x5D,0x03,0x84,0x03,0x3A,0x03,0x4F,0x02,0xF3,0x02,0xB3,0x02,0xB9,0x02,0xBC,\ +0x02,0xB0,0x02,0xD6,0x02,0xDF,0x02,0xC7,0x02,0x92,0x02,0xDC,0x02,0xEE,0x02,0xB3,0x02,0xD3,0x02,0xCD,0x02,0xC7,0x03,0x2B,0x03,0x1D,0x02,0xF6,0x03,0x28,0x02,0xFF,\ +0x03,0x54,0x03,0x22,0x02,0xFC,0x03,0x31,0x03,0x5D,0x03,0x49,0x03,0x05,0x03,0x31,0x03,0x2B,0x03,0x8C,0x03,0x75,0x03,0x28,0x03,0x92,0x03,0x66,0x03,0x60,0x03,0x84,\ +0x03,0x3D,0x03,0x54,0x02,0xF0,0x02,0xD9,0x02,0xDF,0x02,0xE8,0x02,0xDF,0x02,0xFC,0x03,0x0E,0x02,0xF0,0x02,0xC7,0x03,0x0E,0x03,0x1A,0x02,0xE8,0x03,0x02,0x02,0xF6,\ +0x02,0xF6,0x03,0x57,0x03,0x4F,0x03,0x2B,0x03,0x54,0x03,0x37,0x03,0x89,0x03,0x54,0x03,0x31,0x03,0x60,0x03,0x9B,0x03,0x86,0x03,0x49,0x03,0x72,0x03,0x69,0x03,0xC4,\ +0x03,0xB8,0x03,0x60,0x03,0xCD,0x03,0xAD,0x03,0xA7,0x03,0xC4,0x03,0x84,0x03,0xB3,0x02,0xEB,0x02,0xC1,0x02,0xCA,0x02,0xD0,0x02,0xC7,0x02,0xE8,0x02,0xF0,0x02,0xD9,\ +0x02,0xA7,0x02,0xF3,0x02,0xFF,0x02,0xD0,0x02,0xEB,0x02,0xE2,0x02,0xE2,0x03,0x43,0x03,0x37,0x03,0x11,0x03,0x40,0x03,0x20,0x03,0x6F,0x03,0x3D,0x03,0x17,0x03,0x4C,\ +0x03,0x81,0x03,0x69,0x03,0x2E,0x03,0x54,0x03,0x4C,0x03,0xAD,0x03,0x9B,0x03,0x49,0x03,0xB3,0x03,0x8F,0x03,0x8C,0x03,0xAA,0x03,0x60,0x03,0x8C,0x03,0x0E,0x02,0xDC,\ +0x02,0xE5,0x02,0xEB,0x02,0xDF,0x02,0xFC,0x03,0x08,0x02,0xF0,0x02,0xC4,0x03,0x11,0x03,0x1D,0x02,0xEB,0x03,0x08,0x02,0xF9,0x02,0xF9,0x03,0x5A,0x03,0x54,0x03,0x31,\ +0x03,0x5A,0x03,0x3D,0x03,0x92,0x03,0x5A,0x03,0x3A,0x03,0x66,0x03,0x9B,0x03,0x89,0x03,0x49,0x03,0x72,0x03,0x69,0x03,0xCA,0x03,0xB6,0x03,0x66,0x03,0xCD,0x03,0xAD,\ +0x03,0xA7,0x03,0xC4,0x03,0x81,0x03,0xA4,0x03,0x02,0x02,0xCA,0x02,0xCA,0x02,0xCD,0x02,0xCA,0x02,0xE5,0x02,0xF0,0x02,0xD9,0x02,0xAA,0x02,0xF3,0x03,0x05,0x02,0xD0,\ +0x02,0xF0,0x02,0xE2,0x02,0xE5,0x03,0x43,0x03,0x3A,0x03,0x11,0x03,0x43,0x03,0x25,0x03,0x75,0x03,0x43,0x03,0x1A,0x03,0x4F,0x03,0x81,0x03,0x6C,0x03,0x31,0x03,0x57,\ +0x03,0x4F,0x03,0xB0,0x03,0x9B,0x03,0x4C,0x03,0xB3,0x03,0x92,0x03,0x8C,0x03,0xAA,0x03,0x63,0x03,0x89,0x03,0x0E,0x02,0xCA,0x02,0xCD,0x02,0xD3,0x02,0xCA,0x02,0xEB,\ +0x02,0xF6,0x02,0xDF,0x02,0xAD,0x02,0xF6,0x03,0x05,0x02,0xD6,0x02,0xF0,0x02,0xE8,0x02,0xEB,0x03,0x49,0x03,0x3D,0x03,0x1A,0x03,0x49,0x03,0x2E,0x03,0x7B,0x03,0x49,\ +0x03,0x28,0x03,0x54,0x03,0x89,0x03,0x75,0x03,0x37,0x03,0x5D,0x03,0x57,0x03,0xB6,0x03,0xA1,0x03,0x52,0x03,0xB8,0x03,0x98,0x03,0x95,0x03,0xB3,0x03,0x6C,0x03,0x8F,\ +0x03,0x25,0x02,0xD3,0x02,0xD6,0x02,0xD9,0x02,0xD6,0x02,0xF6,0x03,0x02,0x02,0xEB,0x02,0xBC,0x03,0x02,0x03,0x14,0x02,0xDF,0x02,0xFC,0x02,0xF0,0x02,0xF0,0x03,0x52,\ +0x03,0x4C,0x03,0x25,0x03,0x52,0x03,0x34,0x03,0x89,0x03,0x54,0x03,0x31,0x03,0x5D,0x03,0x95,0x03,0x81,0x03,0x3D,0x03,0x69,0x03,0x5D,0x03,0xBB,0x03,0xAD,0x03,0x5A,\ +0x03,0xC1,0x03,0xA1,0x03,0xA1,0x03,0xB8,0x03,0x6C,0x03,0x6F,0x03,0x1A,0x02,0xD6,0x02,0xD9,0x02,0xDF,0x02,0xD3,0x02,0xF6,0x02,0xFF,0x02,0xEB,0x02,0xB9,0x03,0x02,\ +0x03,0x11,0x02,0xE2,0x02,0xFC,0x02,0xF3,0x02,0xF6,0x03,0x52,0x03,0x49,0x03,0x2B,0x03,0x52,0x03,0x37,0x03,0x89,0x03,0x54,0x03,0x31,0x03,0x5D,0x03,0x92,0x03,0x7B,\ +0x03,0x40,0x03,0x63,0x03,0x5D,0x03,0xBB,0x03,0xAA,0x03,0x5A,0x03,0xC1,0x03,0x9E,0x03,0x9B,0x03,0xBB,0x03,0x69,0x03,0x72,0x03,0x11,0x02,0xD3,0x02,0xD6,0x02,0xDF,\ +0x02,0xD3,0x02,0xF6,0x02,0xFC,0x02,0xEB,0x02,0xB9,0x03,0x02,0x03,0x14,0x02,0xDF,0x02,0xFC,0x02,0xF3,0x02,0xF3,0x03,0x54,0x03,0x4C,0x03,0x25,0x03,0x52,0x03,0x37,\ +0x03,0x86,0x03,0x54,0x03,0x31,0x03,0x5A,0x03,0x8C,0x03,0x78,0x03,0x3A,0x03,0x60,0x03,0x5A,0x03,0xBB,0x03,0xAA,0x03,0x57,0x03,0xBE,0x03,0x9E,0x03,0x98,0x03,0xB8,\ +0x03,0x6C,0x03,0x72,0x03,0x0B,0x02,0xDC,0x02,0xDC,0x02,0xE8,0x02,0xDC,0x02,0xF9,0x03,0x05,0x02,0xEE,0x02,0xBE,0x03,0x0B,0x03,0x17,0x02,0xE8,0x02,0xFF,0x02,0xF3,\ +0x02,0xF3,0x03,0x57,0x03,0x4C,0x03,0x2E,0x03,0x54,0x03,0x3A,0x03,0x8C,0x03,0x57,0x03,0x34,0x03,0x63,0x03,0x92,0x03,0x7B,0x03,0x3D,0x03,0x69,0x03,0x5D,0x03,0xBE,\ +0x03,0xB0,0x03,0x5A,0x03,0xBE,0x03,0x9E,0x03,0x9B,0x03,0xBB,0x03,0x81,0x03,0xBE,0x02,0xF3,0x02,0xD3,0x02,0xD6,0x02,0xDC,0x02,0xD0,0x02,0xF0,0x02,0xF9,0x02,0xE5,\ +0x02,0xB3,0x02,0xFC,0x03,0x0E,0x02,0xDC,0x02,0xF6,0x02,0xEE,0x02,0xF0,0x03,0x4F,0x03,0x43,0x03,0x1D,0x03,0x4C,0x03,0x34,0x03,0x7E,0x03,0x4F,0x03,0x28,0x03,0x57,\ +0x03,0x7E,0x03,0x6C,0x03,0x31,0x03,0x5A,0x03,0x52,0x03,0xB3,0x03,0x9E,0x03,0x4F,0x03,0xB6,0x03,0x92,0x03,0x92,0x03,0xAD,0x03,0x66,0x03,0x98,0x03,0x0B,0x02,0xDC,\ +0x02,0xDF,0x02,0xE8,0x02,0xDC,0x02,0xF9,0x03,0x08,0x02,0xEE,0x02,0xC1,0x03,0x0B,0x03,0x17,0x02,0xE8,0x02,0xFC,0x02,0xF3,0x02,0xF3,0x03,0x52,0x03,0x4C,0x03,0x2B,\ +0x03,0x4F,0x03,0x34,0x03,0x86,0x03,0x4F,0x03,0x31,0x03,0x5A,0x03,0x86,0x03,0x6F,0x03,0x34,0x03,0x5A,0x03,0x52,0x03,0xB3,0x03,0x9E,0x03,0x4F,0x03,0xB6,0x03,0x92,\ +0x03,0x95,0x03,0xB0,0x03,0x69,0x03,0x8F,0x03,0x1A,0x02,0xE5,0x02,0xE8,0x02,0xEE,0x02,0xE2,0x02,0xFF,0x03,0x0E,0x02,0xF3,0x02,0xC7,0x03,0x0E,0x03,0x1D,0x02,0xE8,\ +0x03,0x05,0x02,0xF6,0x02,0xF6,0x03,0x54,0x03,0x4C,0x03,0x2E,0x03,0x54,0x03,0x3A,0x03,0x89,0x03,0x54,0x03,0x31,0x03,0x5A,0x03,0x89,0x03,0x72,0x03,0x34,0x03,0x5A,\ +0x03,0x54,0x03,0xB6,0x03,0xA1,0x03,0x4F,0x03,0xB8,0x03,0x95,0x03,0x92,0x03,0xB3,0x03,0x6C,0x03,0x8F,0x03,0x14,0x02,0xE2,0x02,0xE8,0x02,0xEB,0x02,0xDF,0x02,0xFC,\ +0x03,0x0E,0x02,0xF0,0x02,0xC1,0x03,0x0B,0x03,0x1A,0x02,0xE5,0x02,0xFF,0x02,0xF3,0x02,0xF3,0x03,0x52,0x03,0x46,0x03,0x25,0x03,0x4F,0x03,0x34,0x03,0x81,0x03,0x4C,\ +0x03,0x28,0x03,0x54,0x03,0x7E,0x03,0x63,0x03,0x2E,0x03,0x54,0x03,0x4C,0x03,0xAA,0x03,0x98,0x03,0x46,0x03,0xAD,0x03,0x8C,0x03,0x89,0x03,0xAA,0x03,0x60,0x03,0x86,\ +0x03,0x0B,0x02,0xBE,0x02,0xCD,0x02,0xD0,0x02,0xC7,0x02,0xE8,0x02,0xF3,0x02,0xD6,0x02,0xA7,0x02,0xF0,0x02,0xF9,0x02,0xC7,0x02,0xE5,0x02,0xD3,0x02,0xD3,0x03,0x34,\ +0x03,0x28,0x02,0xF9,0x03,0x2B,0x03,0x0B,0x03,0x5A,0x03,0x28,0x02,0xF9,0x03,0x2E,0x03,0x5D,0x03,0x49,0x03,0x05,0x03,0x34,0x03,0x28,0x03,0x89,0x03,0x6F,0x03,0x20,\ +0x03,0x8C,0x03,0x63,0x03,0x63,0x03,0x8C,0x03,0x43,0x03,0x54}; + +const uint8_t phone_data_75_01[]={0x46,0x54,0x52,0x59,0x01,0x01,0x75,0x01,0xF1,0xEB,0xEA,0xEA,0xEA,0xEE,0xF1,0xF2,0xF3,0xF5,0xF7,0xF9,0xFB,0xFA,0xFF,0xFA,0xFF,0x01,0xFF,0x05,0x09,0x09,0x06,0x06,\ +0x08,0x0A,0x0A,0x0B,0x0C,0x0C,0x0D,0x0E,0x0E,0x0F,0x0E,0x0C,0x0B,0x04,0xE7,0xE8,0xE8,0xE9,0xEA,0xEC,0xF0,0xF0,0xF2,0xF5,0xF6,0xF9,0xFA,0xF9,0xFE,0xF9,0xFD,0x00,\ +0xFE,0x03,0x07,0x07,0x04,0x04,0x08,0x0B,0x0C,0x0C,0x0D,0x0D,0x0E,0x0F,0x0F,0x10,0x0F,0x0E,0x0D,0x07,0xE7,0xE9,0xE9,0xEA,0xEB,0xEE,0xF1,0xF2,0xF4,0xF6,0xF8,0xFA,\ +0xFC,0xFB,0xFF,0xFA,0xFF,0x01,0xFF,0x05,0x08,0x09,0x06,0x05,0x0A,0x0D,0x0D,0x0E,0x0F,0x0F,0x10,0x12,0x12,0x12,0x11,0x10,0x0F,0x0A,0xE6,0xEA,0xEA,0xEC,0xEC,0xF0,\ +0xF2,0xF4,0xF5,0xF7,0xF9,0xFC,0xFE,0xFC,0x01,0xFC,0x00,0x03,0x00,0x06,0x0B,0x0A,0x07,0x07,0x0D,0x0F,0x10,0x11,0x11,0x13,0x14,0x15,0x16,0x15,0x15,0x14,0x12,0x0E,\ +0xEA,0xEC,0xEE,0xEF,0xEF,0xF1,0xF4,0xF5,0xF8,0xF9,0xFB,0xFE,0x00,0xFE,0x02,0xFE,0x02,0x05,0x02,0x08,0x0D,0x0C,0x09,0x09,0x10,0x12,0x12,0x13,0x14,0x16,0x17,0x18,\ +0x19,0x18,0x18,0x16,0x14,0x10,0xEC,0xEE,0xEF,0xF0,0xF0,0xF2,0xF5,0xF6,0xF9,0xFA,0xFC,0xFF,0x00,0xFF,0x03,0xFE,0x03,0x05,0x03,0x09,0x0D,0x0D,0x0A,0x0A,0x11,0x13,\ +0x13,0x14,0x15,0x17,0x18,0x19,0x1A,0x1A,0x19,0x17,0x16,0x11,0xEF,0xF0,0xF0,0xF0,0xF1,0xF3,0xF6,0xF7,0xFA,0xFB,0xFC,0xFF,0x01,0x00,0x04,0xFF,0x03,0x06,0x04,0x0A,\ +0x0E,0x0E,0x0A,0x0A,0x12,0x14,0x15,0x16,0x17,0x18,0x19,0x1A,0x1B,0x1B,0x1A,0x19,0x17,0x12,0xF1,0xF1,0xF0,0xF1,0xF2,0xF4,0xF6,0xF8,0xFB,0xFC,0xFD,0x00,0x01,0x00,\ +0x04,0x00,0x04,0x07,0x05,0x0B,0x0F,0x0E,0x0B,0x0A,0x13,0x16,0x16,0x17,0x18,0x19,0x1B,0x1B,0x1C,0x1C,0x1B,0x1A,0x18,0x13,0xF3,0xF1,0xF0,0xF1,0xF2,0xF4,0xF6,0xF8,\ +0xFA,0xFB,0xFD,0x00,0x01,0x00,0x04,0xFF,0x04,0x06,0x04,0x0A,0x0F,0x0D,0x0A,0x0A,0x14,0x16,0x16,0x17,0x18,0x19,0x1A,0x1B,0x1C,0x1C,0x1B,0x1A,0x15,0x0A,0xF1,0xF0,\ +0xF0,0xF1,0xF2,0xF4,0xF7,0xF8,0xFB,0xFB,0xFD,0x00,0x01,0x00,0x04,0xFF,0x04,0x06,0x04,0x0A,0x0E,0x0D,0x0B,0x0A,0x15,0x17,0x17,0x19,0x19,0x1A,0x1C,0x1C,0x1D,0x1D,\ +0x1D,0x1B,0x19,0x14,0xEF,0xF0,0xF0,0xF0,0xF1,0xF3,0xF6,0xF7,0xFA,0xFB,0xFC,0xFF,0x00,0xFF,0x04,0xFF,0x03,0x05,0x03,0x09,0x0D,0x0D,0x0A,0x0A,0x15,0x17,0x17,0x19,\ +0x19,0x1A,0x1C,0x1C,0x1D,0x1D,0x1C,0x1B,0x19,0x15,0xEC,0xEE,0xEE,0xEF,0xF0,0xF2,0xF4,0xF6,0xF9,0xF9,0xFB,0xFE,0x00,0xFE,0x02,0xFD,0x02,0x04,0x01,0x08,0x0C,0x0C,\ +0x09,0x09,0x14,0x17,0x17,0x18,0x19,0x1A,0x1B,0x1C,0x1D,0x1D,0x1C,0x1B,0x19,0x15,0xE9,0xEB,0xED,0xEE,0xED,0xF1,0xF3,0xF5,0xF6,0xF8,0xFA,0xFD,0xFE,0xFD,0x01,0xFC,\ +0x00,0x03,0x00,0x07,0x0B,0x0B,0x08,0x08,0x14,0x16,0x16,0x17,0x18,0x1A,0x1B,0x1C,0x1D,0x1D,0x1C,0x1A,0x19,0x15,0xE6,0xE9,0xEA,0xEB,0xEB,0xEF,0xF1,0xF3,0xF4,0xF7,\ +0xF8,0xFB,0xFD,0xFB,0x00,0xFA,0xFF,0x01,0xFF,0x05,0x09,0x09,0x06,0x06,0x12,0x14,0x15,0x16,0x17,0x18,0x19,0x1A,0x1B,0x1B,0x1A,0x19,0x17,0x13,0xE5,0xE7,0xE8,0xE8,\ +0xE9,0xEC,0xF0,0xEF,0xF2,0xF4,0xF6,0xF9,0xFA,0xF8,0xFD,0xF7,0xFC,0xFF,0xFD,0x03,0x07,0x07,0x04,0x04,0x10,0x13,0x13,0x14,0x15,0x17,0x18,0x19,0x19,0x19,0x19,0x17,\ +0x15,0x11,0xE5,0xE6,0xE6,0xE7,0xE7,0xE9,0xED,0xEE,0xF0,0xF3,0xF4,0xF5,0xF8,0xF4,0xFB,0xF6,0xFB,0xFD,0xFB,0x01,0x05,0x05,0x02,0x01,0x0F,0x11,0x12,0x13,0x14,0x15,\ +0x16,0x17,0x17,0x18,0x17,0x16,0x14,0x0E,0xE5,0xE3,0xE4,0xE5,0xE5,0xE7,0xEA,0xEB,0xEE,0xEF,0xF1,0xF3,0xF4,0xF2,0xF7,0xF3,0xF8,0xFB,0xF9,0xFE,0x02,0x01,0xFE,0xFE,\ +0x10,0x11,0x11,0x12,0x12,0x14,0x15,0x16,0x16,0x16,0x16,0x16,0x14,0x0D}; +const uint8_t phone_data_75_02[]={0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\ +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\ +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\ +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\ +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\ +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\ +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\ +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\ +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\ +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\ +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\ +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\ +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\ +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\ +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\ +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\ +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\ +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\ +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\ +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\ +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}; +const uint8_t phone_data_75_03[]={0x46,0x54,0x4D,0x33,0x01,0x02,0x61,0x01,0x15,0x0A,0x05,0x05,0x06,0x05,0x03,0x03,0x06,0x03,0x03,0x01,0x03,0x03,0x03,0x06,0x03,0x03,0x05,0x03,0x03,0x03,0x07,0x07,\ +0x05,0x03,0x03,0x03,0x01,0x01,0x03,0x01,0x01,0x01,0x01,0x01,0x01,0xFB,0x08,0x03,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0x00,0xFF,0x00,\ +0xFF,0x00,0x01,0xFF,0x01,0x01,0x01,0xFF,0x01,0x01,0xFF,0xFF,0x01,0xFF,0xFF,0xFF,0xFF,0xFF,0x00,0xFF,0x06,0x03,0x01,0x01,0x01,0x01,0xFF,0x01,0x01,0xFF,0x01,0xFD,\ +0x01,0xFF,0xFF,0x00,0xFF,0x00,0xFF,0x00,0x00,0xFF,0x01,0x01,0x01,0xFF,0x00,0x01,0xFF,0xFF,0x01,0x01,0xFF,0xFF,0xFD,0xFD,0xFD,0xFF,0x03,0x03,0x01,0x01,0x01,0x01,\ +0xFF,0x00,0x01,0xFF,0xFF,0xFD,0xFF,0xFF,0xFF,0x00,0xFF,0x00,0xFF,0xFD,0x00,0xFF,0x01,0x01,0x01,0xFF,0x00,0xFF,0xFF,0xFF,0x01,0xFF,0xFF,0xFF,0xFD,0xFD,0xFD,0xFF,\ +0x03,0x03,0x01,0x01,0x01,0x01,0xFF,0x00,0x00,0xFF,0xFF,0xFD,0xFF,0xFF,0xFF,0x00,0xFF,0x00,0x01,0x00,0x01,0xFF,0x01,0x01,0x01,0xFF,0x01,0x01,0xFF,0xFF,0x01,0x01,\ +0xFF,0xFF,0xFF,0xFF,0x00,0xFF,0x06,0x03,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0xFF,0x01,0xFF,0xFF,0x01,0x01,0x00,0x01,0x00,0x01,0xFF,0x03,0x01,0x03,0x01,\ +0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0xFF,0xFF,0x00,0xFF,0x08,0x06,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0xFF,0x01,0xFF,0x01,0xFF,0xFF,0x01,0xFF,0x00,0x01,0x00,\ +0x01,0xFF,0x03,0x01,0x01,0x01,0x01,0x01,0xFF,0xFF,0x01,0x01,0x01,0xFF,0xFF,0xFF,0x00,0xFF,0x0C,0x03,0x01,0x01,0x01,0x01,0xFF,0x01,0x01,0xFF,0x01,0xFD,0xFF,0xFF,\ +0xFF,0x00,0x01,0x00,0x01,0x00,0x01,0xFF,0x03,0x01,0x01,0xFF,0x01,0x01,0xFF,0xFF,0x01,0xFF,0xFF,0xFF,0xFF,0xFD,0xFD,0xFD,0x0E,0x06,0x01,0x03,0x01,0x03,0x01,0x01,\ +0x01,0x01,0x01,0xFF,0x01,0xFF,0x01,0x01,0x01,0x01,0x01,0x00,0x01,0xFF,0x03,0x01,0x03,0x01,0x03,0x01,0x01,0x01,0x01,0x01,0xFF,0xFF,0xFF,0xFF,0xFB,0xEC,0x0A,0x06,\ +0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0xFF,0x01,0xFF,0xFF,0x01,0xFF,0x00,0x01,0x00,0x01,0xFF,0x03,0x01,0x03,0x01,0x01,0x01,0x01,0x01,0x03,0x01,0xFF,0xFF,\ +0xFF,0xFF,0x00,0xFF,0x0A,0x06,0x03,0x03,0x03,0x01,0x01,0x01,0x03,0x01,0x01,0xFF,0x01,0xFF,0x01,0x01,0x01,0x01,0x01,0x00,0x01,0x01,0x03,0x01,0x03,0x01,0x03,0x03,\ +0x01,0x01,0x03,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x08,0x06,0x03,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0xFF,0x01,0xFF,0x01,0x01,0x01,0x00,0x01,0x00,0x01,0xFF,\ +0x03,0x01,0x03,0x01,0x03,0x01,0x01,0x01,0x03,0x03,0x01,0x01,0xFF,0xFF,0x00,0x01,0x06,0x06,0x01,0x01,0x01,0x01,0xFF,0x01,0x01,0x01,0x01,0xFF,0x01,0xFF,0xFF,0x01,\ +0xFF,0x00,0xFF,0x00,0x01,0xFF,0x03,0x01,0x03,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0xFF,0xFF,0xFF,0x00,0x01,0x03,0x06,0x01,0x01,0x01,0x01,0xFF,0x01,0x01,0xFF,\ +0x01,0xFF,0x01,0xFF,0x01,0x00,0xFF,0x00,0x01,0x00,0x01,0xFF,0x03,0x01,0x03,0x01,0x01,0x01,0x01,0x01,0x03,0x01,0x01,0xFF,0xFF,0xFF,0x00,0x01,0x08,0x06,0x03,0x01,\ +0x03,0x01,0x01,0x01,0x01,0x01,0x01,0xFF,0x01,0xFF,0x01,0x01,0xFF,0x00,0x01,0x00,0x01,0xFF,0x03,0x01,0x03,0x01,0x03,0x03,0x01,0x01,0x03,0x01,0x01,0x01,0x01,0x01,\ +0x01,0x01,0x0A,0x06,0x01,0x01,0x01,0x01,0xFF,0x01,0x01,0xFF,0x01,0xFD,0x01,0xFF,0xFF,0x00,0x01,0x00,0xFF,0x00,0x01,0xFF,0x03,0x01,0x03,0x01,0x03,0x03,0x01,0x01,\ +0x03,0x01,0x01,0xFF,0x01,0x01,0x01,0xFF,0x0A,0x03,0x03,0x03,0x03,0x03,0x01,0x01,0x01,0x01,0x03,0xFF,0x01,0xFF,0x01,0x01,0x01,0x01,0x01,0x00,0x01,0xFF,0x01,0xFF,\ +0x0A,0x05,0x06,0x05,0x03,0x03,0x05,0x03,0x03,0x03,0x03,0x05,0x06,0xFF}; +const uint8_t phone_data_75_06[]={0x46,0x54,0x52,0x59,0x01,0x04,0x7D,0x01,0xE8,0xE5,0xE6,0xE6,0xE7,0xEA,0xEC,0xEF,0xF1,0xF2,0xF4,0xF6,0xF9,0xF7,0xFF,0xF7,0xFC,0x01,0xFE,0x06,0x0D,0x0B,0x07,0x05,\ +0x0D,0x0E,0x0F,0x10,0x11,0x13,0x15,0x15,0x16,0x13,0x13,0x11,0x10,0x07,0xDE,0xE1,0xE2,0xE3,0xE3,0xE6,0xE9,0xEB,0xED,0xEF,0xF1,0xF3,0xF5,0xF4,0xFB,0xF4,0xF9,0xFE,\ +0xFA,0x03,0x09,0x08,0x03,0x01,0x0B,0x0E,0x0D,0x0E,0x0F,0x12,0x14,0x14,0x15,0x14,0x12,0x13,0x0F,0x08,0xDD,0xE1,0xE2,0xE3,0xE4,0xE7,0xE9,0xEC,0xEE,0xEF,0xF2,0xF4,\ +0xF5,0xF4,0xFC,0xF4,0xF9,0xFE,0xFB,0x03,0x09,0x08,0x03,0x01,0x0C,0x0E,0x0E,0x0F,0x10,0x13,0x14,0x14,0x16,0x14,0x13,0x12,0x10,0x0A,0xDE,0xE3,0xE4,0xE6,0xE7,0xE9,\ +0xEC,0xEF,0xF1,0xF3,0xF5,0xF7,0xF9,0xF8,0x00,0xF7,0xFD,0x02,0xFF,0x07,0x0D,0x0E,0x07,0x05,0x10,0x14,0x15,0x16,0x17,0x18,0x1A,0x1B,0x1B,0x1A,0x1A,0x18,0x18,0x11,\ +0xE0,0xE4,0xE5,0xE6,0xE7,0xEA,0xED,0xEF,0xF1,0xF3,0xF6,0xF8,0xF9,0xF8,0x00,0xF8,0xFD,0x02,0xFF,0x07,0x0E,0x0C,0x07,0x05,0x12,0x15,0x16,0x17,0x18,0x19,0x1B,0x1C,\ +0x1C,0x1B,0x1C,0x19,0x18,0x12,0xE2,0xE5,0xE6,0xE7,0xE8,0xEB,0xEE,0xF0,0xF2,0xF4,0xF6,0xF8,0xFA,0xF9,0x01,0xF9,0xFE,0x03,0x02,0x08,0x0F,0x0F,0x08,0x06,0x13,0x16,\ +0x18,0x18,0x19,0x1A,0x1C,0x1E,0x1E,0x1C,0x1D,0x1A,0x19,0x13,0xE6,0xE7,0xE8,0xE9,0xEA,0xED,0xF0,0xF2,0xF5,0xF6,0xF9,0xFB,0xFD,0xFC,0x03,0xFE,0x02,0x07,0x04,0x0D,\ +0x12,0x12,0x0B,0x0C,0x17,0x1A,0x1C,0x1D,0x1D,0x1E,0x20,0x21,0x21,0x21,0x20,0x20,0x1E,0x17,0xE5,0xE6,0xE7,0xE7,0xE8,0xEB,0xEE,0xF0,0xF2,0xF4,0xF6,0xF8,0xF9,0xF8,\ +0x00,0xF9,0xFE,0x02,0xFE,0x07,0x0D,0x0C,0x07,0x05,0x14,0x16,0x18,0x19,0x19,0x1A,0x1C,0x1D,0x1E,0x1C,0x1D,0x1B,0x19,0x13,0xE7,0xE6,0xE7,0xE8,0xE9,0xEC,0xEE,0xF0,\ +0xF2,0xF4,0xF6,0xF9,0xFB,0xFA,0x01,0xFA,0xFF,0x03,0x00,0x07,0x0E,0x0D,0x07,0x08,0x15,0x18,0x1A,0x1A,0x1B,0x1C,0x1D,0x1F,0x1E,0x1E,0x1E,0x1B,0x17,0x0C,0xE9,0xE9,\ +0xEA,0xEB,0xEC,0xEF,0xF2,0xF4,0xF7,0xF8,0xFB,0xFE,0xFF,0xFE,0x06,0x00,0x04,0x0A,0x06,0x0E,0x14,0x15,0x10,0x0E,0x1C,0x1F,0x21,0x21,0x23,0x24,0x24,0x26,0x26,0x26,\ +0x26,0x24,0x22,0x1C,0xE2,0xE4,0xE5,0xE5,0xE6,0xE9,0xEC,0xEE,0xF0,0xF2,0xF4,0xF6,0xF8,0xF7,0xFE,0xF6,0xFC,0x00,0xFC,0x05,0x0B,0x0A,0x05,0x03,0x13,0x16,0x18,0x18,\ +0x19,0x1A,0x1C,0x1D,0x1F,0x1C,0x1D,0x1B,0x19,0x13,0xE0,0xE3,0xE5,0xE5,0xE6,0xE9,0xEC,0xEE,0xF0,0xF2,0xF4,0xF7,0xF8,0xF7,0xFF,0xF7,0xFC,0x00,0xFD,0x06,0x0D,0x0B,\ +0x05,0x04,0x15,0x18,0x19,0x1A,0x1B,0x1C,0x1E,0x1F,0x1F,0x1E,0x1E,0x1B,0x1B,0x15,0xE0,0xE4,0xE5,0xE6,0xE8,0xEB,0xED,0xF0,0xF2,0xF4,0xF6,0xF9,0xFB,0xFA,0x01,0xFA,\ +0x00,0x03,0x00,0x0A,0x0F,0x0E,0x0A,0x08,0x19,0x1C,0x1E,0x1E,0x20,0x21,0x22,0x24,0x24,0x23,0x24,0x22,0x20,0x1B,0xDB,0xE0,0xE1,0xE2,0xE3,0xE6,0xE8,0xEA,0xED,0xEE,\ +0xF1,0xF2,0xF5,0xF3,0xFB,0xF3,0xF8,0xFC,0xF9,0x02,0x06,0x06,0x02,0x00,0x12,0x14,0x16,0x17,0x18,0x18,0x1A,0x1B,0x1B,0x1A,0x1C,0x19,0x18,0x12,0xDB,0xDE,0xDF,0xE0,\ +0xE1,0xE4,0xE7,0xE9,0xEB,0xED,0xEF,0xF2,0xF3,0xF2,0xFA,0xF1,0xF7,0xFB,0xF8,0x01,0x04,0x05,0x00,0xFF,0x11,0x14,0x16,0x16,0x17,0x18,0x1A,0x1B,0x1C,0x19,0x1B,0x18,\ +0x16,0x11,0xDD,0xE0,0xE1,0xE2,0xE3,0xE6,0xE9,0xEB,0xED,0xEF,0xF2,0xF4,0xF6,0xF5,0xFC,0xF4,0xFA,0xFF,0xFB,0x04,0x0B,0x09,0x04,0x02,0x17,0x19,0x1B,0x1C,0x1D,0x1E,\ +0x20,0x21,0x21,0x21,0x21,0x20,0x1E,0x17,0xDA,0xDA,0xDC,0xDD,0xDE,0xE1,0xE3,0xE6,0xE7,0xE9,0xEC,0xEE,0xEF,0xEE,0xF5,0xED,0xF2,0xF7,0xF3,0xFC,0x00,0x00,0xFC,0xF9,\ +0x12,0x13,0x12,0x15,0x16,0x16,0x18,0x18,0x1A,0x1A,0x1A,0x19,0x15,0x0F}; +const uint8_t phone_data_75_07[]={0x46,0x54,0x4D,0x33,0x01,0x01,0x61,0x01,0x15,0x0A,0x07,0x05,0x06,0x03,0x03,0x06,0x06,0x05,0x01,0x01,0x03,0x03,0x05,0x06,0x05,0x06,0x05,0x06,0x03,0x08,0x08,0x07,\ +0x03,0x06,0x06,0x03,0x03,0x03,0x03,0x03,0x06,0x03,0x03,0x01,0x03,0xFB,0x0A,0x06,0x01,0x01,0x03,0xFF,0xFF,0x01,0x01,0xFF,0xFF,0xFD,0xFD,0xFF,0xFF,0x01,0x01,0x00,\ +0xFF,0x01,0xFF,0x01,0x01,0x01,0x00,0x03,0x01,0x00,0x01,0x01,0x00,0x01,0x01,0xFF,0xFF,0xFF,0x00,0x00,0x08,0x03,0x01,0xFF,0x01,0xFF,0xFF,0x00,0x01,0xFF,0xFF,0xFF,\ +0xFD,0xFF,0xFF,0x01,0xFF,0x00,0x01,0x00,0xFF,0x01,0x01,0x01,0x00,0x03,0x00,0x00,0xFF,0xFF,0x00,0x01,0x01,0xFF,0xFF,0xFF,0x00,0x00,0x03,0x03,0x01,0xFF,0x01,0xFF,\ +0xFF,0x01,0x01,0xFF,0xFD,0xFD,0xFD,0xFF,0x01,0x01,0xFF,0x00,0xFF,0x00,0xFF,0x01,0xFF,0x01,0x01,0x03,0x01,0x00,0xFF,0x01,0x00,0x01,0x01,0xFF,0xFF,0xFF,0x00,0x00,\ +0x06,0x03,0x01,0x01,0x01,0xFF,0xFF,0x00,0x01,0xFF,0xFF,0xFD,0xFD,0xFF,0xFF,0x00,0xFF,0x00,0xFF,0x00,0xFF,0x01,0x01,0x01,0x01,0x03,0x01,0x00,0xFF,0x01,0x01,0x01,\ +0x01,0xFF,0xFF,0xFF,0x00,0x00,0x08,0x03,0x01,0x01,0x01,0xFF,0xFF,0x01,0x01,0xFF,0xFF,0xFD,0xFD,0xFF,0xFF,0x00,0x01,0x00,0xFF,0x00,0xFF,0x01,0xFF,0x01,0x01,0x03,\ +0x01,0x00,0x01,0x01,0x00,0x01,0x01,0xFF,0xFF,0xFF,0x00,0x00,0x0A,0x03,0x01,0xFF,0x01,0xFF,0xFF,0x01,0x00,0xFF,0xFF,0xFD,0x00,0xFF,0xFF,0x01,0xFF,0x00,0x01,0x00,\ +0xFD,0x01,0xFF,0x03,0x01,0x03,0x01,0x00,0xFF,0x01,0x00,0x01,0x03,0x01,0xFF,0xFF,0x00,0x00,0x0C,0x06,0x01,0x01,0x01,0xFF,0xFF,0x00,0x01,0xFF,0xFF,0xFD,0x00,0xFF,\ +0xFF,0x01,0x01,0x00,0x01,0x00,0xFF,0x01,0x01,0x01,0x01,0x03,0x01,0x00,0x01,0x01,0x00,0x01,0x03,0xFF,0xFF,0xFF,0x01,0x00,0x0E,0x06,0x01,0x01,0x01,0xFF,0xFF,0x01,\ +0x01,0xFF,0xFF,0xFF,0x00,0xFF,0x01,0x01,0x01,0x01,0x01,0x00,0xFF,0x01,0x01,0x01,0x01,0x03,0x01,0x01,0x01,0x01,0x01,0x01,0x03,0x01,0xFF,0x01,0xFD,0xEC,0x0C,0x06,\ +0x01,0x01,0x01,0xFF,0x01,0x01,0x01,0xFF,0xFF,0xFF,0x00,0xFF,0xFF,0x01,0x01,0x00,0x01,0x00,0xFF,0x01,0x01,0x03,0x01,0x03,0x03,0x00,0x01,0x01,0x01,0x01,0x01,0xFF,\ +0xFF,0xFF,0x01,0x00,0x0A,0x06,0x01,0x01,0x01,0xFF,0xFF,0x01,0x01,0xFF,0xFF,0xFF,0x00,0xFF,0x01,0x01,0x01,0x00,0x01,0x01,0xFF,0x03,0x01,0x01,0x01,0x03,0x01,0x00,\ +0x01,0x01,0x01,0x01,0x03,0x01,0xFF,0xFF,0x01,0x01,0x08,0x06,0x01,0x01,0x01,0xFF,0xFF,0x01,0x01,0x01,0xFF,0xFD,0x00,0xFF,0x01,0x01,0x01,0x00,0x01,0x00,0xFF,0x01,\ +0x01,0x01,0x01,0x03,0x03,0x01,0x01,0x01,0x01,0x01,0x03,0x01,0xFF,0x01,0x01,0x01,0x06,0x06,0x01,0x01,0x01,0x01,0xFF,0x01,0x01,0x01,0xFF,0xFF,0x00,0x01,0x01,0x01,\ +0xFF,0x00,0x01,0x01,0xFF,0x01,0x01,0x03,0x01,0x03,0x03,0x01,0x01,0x03,0x01,0x01,0x03,0x01,0xFF,0xFF,0x00,0x01,0x06,0x03,0x01,0x01,0x01,0xFF,0xFF,0x01,0x01,0xFF,\ +0xFF,0xFF,0x00,0xFF,0xFF,0x01,0xFF,0x00,0x01,0x00,0xFF,0x01,0x01,0x01,0x01,0x03,0x01,0x00,0x01,0x01,0x01,0x03,0x03,0xFF,0x01,0xFF,0x01,0x01,0x08,0x06,0x01,0x01,\ +0x01,0xFF,0xFF,0x01,0x01,0xFF,0xFF,0xFD,0x00,0xFF,0x01,0x00,0x01,0x00,0x01,0x01,0xFF,0x01,0x01,0x01,0x01,0x03,0x03,0x01,0x01,0x01,0x01,0x03,0x03,0x01,0x01,0x01,\ +0x01,0x01,0x0A,0x06,0x03,0x01,0x01,0xFF,0x01,0x01,0x01,0xFF,0xFF,0xFF,0x00,0xFF,0xFF,0x01,0x01,0x00,0x01,0x00,0xFF,0x01,0x01,0x01,0x03,0x06,0x03,0x01,0x03,0x01,\ +0x01,0x01,0x03,0x01,0x01,0x01,0x01,0x00,0x0A,0x06,0x03,0x03,0x03,0x01,0x01,0x03,0x03,0x01,0x01,0x01,0x01,0x01,0x03,0x03,0x01,0x01,0x01,0x00,0x01,0x01,0x01,0x01,\ +0x08,0x08,0x08,0x03,0x05,0x05,0x06,0x05,0x08,0x05,0x05,0x05,0x06,0x00}; +const uint8_t phone_data_75_05[]={0x46,0x4D,0x53,0x43,0x00,0x07,0x16,0x00,0x0A,0x06,0x0C,0x0F,0x09,0x06,0x06,0x07,0x05,0x07,0x09,0x09,0x09,0x08,0x0A,0x0F,0x09,0x08,0x0C,0x09,0x0B,0x11,0x0F,0x09,\ +0x0A,0x0C,0x08,0x06,0x09,0x0D,0x0A,0x07,0x06,0x06,0x0A,0x0A,0x0B,0x00,0x09,0x08,0x0E,0x0E,0x10,0x07,0x0B,0x07,0x06,0x07,0x0F,0x0E,0x07,0x06,0x07,0x0A,0x09,0x07,\ +0x07,0x07,0x09,0x0E,0x0A,0x09,0x07,0x09,0x08,0x07,0x0A,0x0E,0x0C,0x0C,0x05,0x06,0x08,0x08,0x05,0x00,0x0D,0x06,0x0C,0x0A,0x0C,0x0C,0x08,0x06,0x08,0x07,0x0A,0x10,\ +0x07,0x07,0x07,0x08,0x08,0x06,0x09,0x06,0x08,0x0F,0x09,0x0A,0x05,0x08,0x09,0x06,0x06,0x0A,0x0A,0x09,0x06,0x06,0x09,0x08,0x06,0x00,0x08,0x07,0x0C,0x0D,0x0E,0x0A,\ +0x06,0x05,0x06,0x0B,0x09,0x09,0x06,0x05,0x07,0x09,0x08,0x06,0x0C,0x0C,0x0C,0x0E,0x08,0x09,0x06,0x07,0x08,0x07,0x09,0x0A,0x0A,0x08,0x07,0x06,0x0C,0x0A,0x05,0x00,\ +0x08,0x07,0x06,0x07,0x08,0x07,0x0D,0x07,0x08,0x0A,0x08,0x09,0x09,0x07,0x06,0x0B,0x08,0x07,0x0B,0x09,0x07,0x11,0x0F,0x0E,0x0E,0x04,0x08,0x09,0x07,0x08,0x07,0x09,\ +0x07,0x08,0x08,0x08,0x0F,0x00,0x06,0x07,0x05,0x08,0x0E,0x07,0x0A,0x08,0x0B,0x0A,0x0A,0x08,0x05,0x06,0x07,0x07,0x09,0x06,0x0A,0x08,0x07,0x0C,0x0A,0x09,0x0A,0x05,\ +0x06,0x08,0x05,0x06,0x05,0x07,0x08,0x06,0x08,0x08,0x0C,0x00,0x09,0x09,0x06,0x06,0x08,0x09,0x09,0x07,0x08,0x06,0x09,0x09,0x0B,0x0A,0x08,0x0D,0x07,0x08,0x0A,0x0B,\ +0x07,0x12,0x10,0x0C,0x08,0x05,0x08,0x09,0x0C,0x08,0x08,0x07,0x06,0x09,0x0B,0x0B,0x0B,0x00,0x0B,0x0A,0x08,0x08,0x0B,0x09,0x09,0x06,0x08,0x09,0x07,0x08,0x08,0x08,\ +0x06,0x07,0x0B,0x0C,0x0F,0x08,0x06,0x0B,0x0B,0x0C,0x0B,0x07,0x08,0x09,0x0C,0x05,0x08,0x05,0x07,0x06,0x08,0x07,0x09,0x00,0x0A,0x06,0x06,0x08,0x0C,0x05,0x06,0x0B,\ +0x0E,0x08,0x0A,0x0C,0x07,0x08,0x07,0x06,0x07,0x06,0x07,0x0F,0x0B,0x09,0x07,0x0A,0x15,0x0F,0x05,0x0C,0x05,0x07,0x08,0x09,0x05,0x06,0x06,0x08,0x05,0x00,0x0A,0x08,\ +0x05,0x08,0x0C,0x07,0x08,0x09,0x08,0x0B,0x0B,0x0A,0x07,0x08,0x08,0x05,0x0A,0x09,0x07,0x0A,0x09,0x0A,0x07,0x0B,0x0F,0x0E,0x06,0x0C,0x05,0x07,0x08,0x06,0x07,0x06,\ +0x05,0x09,0x08,0x00,0x0C,0x05,0x05,0x06,0x08,0x07,0x07,0x0D,0x0E,0x0C,0x13,0x0D,0x05,0x09,0x08,0x07,0x07,0x0A,0x06,0x0A,0x08,0x0B,0x09,0x06,0x0E,0x0B,0x06,0x06,\ +0x06,0x06,0x06,0x05,0x08,0x09,0x07,0x0A,0x08,0x00,0x06,0x07,0x07,0x06,0x0C,0x09,0x08,0x0B,0x0A,0x06,0x0B,0x14,0x07,0x07,0x09,0x0A,0x07,0x07,0x07,0x11,0x0D,0x0B,\ +0x09,0x0A,0x16,0x0F,0x06,0x0A,0x05,0x0F,0x0E,0x06,0x09,0x05,0x09,0x0B,0x0A,0x00,0x09,0x08,0x05,0x07,0x0B,0x05,0x06,0x06,0x09,0x0B,0x0E,0x0A,0x07,0x08,0x0A,0x08,\ +0x0B,0x09,0x06,0x0D,0x0A,0x0D,0x0B,0x0C,0x0E,0x06,0x08,0x08,0x06,0x06,0x04,0x08,0x07,0x06,0x0A,0x07,0x09,0x00,0x0A,0x08,0x06,0x08,0x0A,0x05,0x07,0x09,0x0D,0x0A,\ +0x09,0x0A,0x07,0x08,0x08,0x09,0x08,0x07,0x0A,0x0A,0x0D,0x08,0x07,0x11,0x09,0x08,0x06,0x07,0x06,0x06,0x05,0x07,0x0B,0x06,0x07,0x07,0x0D,0x00,0x08,0x09,0x06,0x0A,\ +0x0C,0x08,0x09,0x06,0x0D,0x0A,0x0A,0x06,0x07,0x08,0x06,0x06,0x09,0x07,0x09,0x0C,0x10,0x09,0x08,0x11,0x09,0x07,0x08,0x09,0x08,0x07,0x07,0x05,0x09,0x08,0x07,0x04,\ +0x0A,0x00,0x0A,0x08,0x09,0x0B,0x0A,0x08,0x0F,0x0A,0x0B,0x0E,0x10,0x09,0x07,0x09,0x07,0x06,0x09,0x07,0x09,0x0D,0x0A,0x09,0x09,0x12,0x0B,0x09,0x06,0x09,0x07,0x06,\ +0x05,0x05,0x07,0x07,0x08,0x04,0x08,0x00,0x08,0x11,0x06,0x09,0x0D,0x07,0x07,0x05,0x05,0x05,0x07,0x0A,0x0B,0x0A,0x0A,0x07,0x0F,0x05,0x08,0x07,0x10,0x11,0x09,0x08,\ +0x06,0x07,0x07,0x0D,0x09,0x08,0x0A,0x07,0x0C,0x07,0x0D,0x0F,0x09,0x00}; + +const uint8_t phone_data_75_00[]={0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\ +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\ +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\ +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\ +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\ +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\ +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\ +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\ +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}; +const uint8_t phone_data_75_FF[]={0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,\ +0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,\ +0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,\ +0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,\ +0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,\ +0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,\ +0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,\ +0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,\ +0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF}; + + + + +#endif + +#endif + +#ifdef USE_FOR_SUMSUNG_S9PLUS +const uint8_t phone_data_60_1[]={0x09,0x00,0x10,0x00,0x00,0x00,0x00,0x00}; +const uint8_t phone_data_60_2[]={0x1D,0x61,0x02,0x02,0x06,0x00,0x00,0x00}; +const uint8_t phone_data_60_3[]={0x1D,0x61,0x06,0x00,0x02,0x02,0x00,0x00}; +const uint8_t phone_data_60_4[]={0x1D,0x41,0x00,0x00,0x00,0x00,0x00,0x00}; +const uint8_t phone_data_60_5[]={0x1D,0x61,0x05,0x02,0x02,0x00,0x00,0x00}; +const uint8_t phone_data_60_6[]={0x1D,0x61,0x02,0x02,0x05,0x02,0x00,0x00}; +const uint8_t phone_data_60_7[]={0x1D,0x61,0x05,0x02,0x02,0x02,0x00,0x00}; +const uint8_t phone_data_21[]={0x80}; +const uint8_t phone_data_22[]={0x53,0x45,0x37,0x61,0x00}; +const uint8_t phone_data_23[]={0x10,0x00,0x10,0x00,0x05,0xA0,0x0B,0x90,0x10,0x21,0x03}; +const uint8_t phone_data_30[]={0x61,0x00}; +const uint8_t phone_data_52[]={0xAC,0x37,0x61}; +const uint8_t phone_data_55[]={0x20}; +const uint8_t phone_data_85_1[]={0x01}; +const uint8_t phone_data_85_2[]={0x22}; +const uint8_t phone_data_85_3[]={0x99,0x01,0x00,0x01,0x22,0x05,0x01,0x00,0x03,0x04,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0x01,0xFF}; +const uint8_t phone_data_90[]={0x47,0x39,0x36,0x35,0x00,0x04,0x00,0x0C,0x10,0x00}; +const uint8_t phone_data_92_1[]={0x03}; +const uint8_t phone_data_92_2[]={0x96,0x00}; +const uint8_t phone_data_92_3[]={0x80,0x00}; +const uint8_t phone_data_A3[]={0x10,0x41,0x02,0x02}; +const uint8_t phone_data_A4[]={0x10,0x41,0x01,0x14}; +const uint8_t phone_data_A5[]={0x10,0x41,0x01,0x30}; +const uint8_t phone_data_AF[]={0x00,0x03,0x00,0x00}; +//const uint8_t phone_data_E4[]={0x00}; +uint8_t phone_data_E4[]={0x01}; +const uint8_t phone_data_F1[]={0x0C,0x0C,0x00,0xA2}; +//const uint8_t phone_data_F5[]={0x00}; +const uint8_t phone_data_F5_1[]={0xFF}; +const uint8_t phone_data_F5_2[]={0x13}; +const uint8_t phone_data_F5_3[]={0x00}; +const uint8_t phone_data_F5_4[]={0x06}; +const uint8_t phone_data_F6_1[]={0xFA,0xF4,0xFB,0x09,0xFB,0x09}; +const uint8_t phone_data_F6_2[]={0x25,0x23,0x23,0xE1,0x21,0x86}; +const uint8_t phone_data_F6_3[]={0x00,0x01,0x00,0x01,0x00,0x00}; +const uint8_t phone_data_F6_4[]={0x00,0x02,0x00,0x00,0x00,0x00}; + +uint8_t phone_data_B1[]={0x00,0x082}; + +const uint8_t phone_data_72[]={ +0x00,0x22,0x00,0x41,0x00,0x4A,0x00,0x33,0x00,0x2D,0x00,0x2D,0x00,0x28,0x00,0x27,0x00,0x2B,0x00,0x30,0x00,0x3C,0x00,0x3C,0x00,0x3D,0x00,0x49,0x00,0x4F,0x00,0x56,0x00,0x5B,0x00,0x5E,0x00,0x68,0x00,0x70,0x00,0x75,0x00,0x7B,0x00,0x80,0x00,0x9D,0x00,0x8E,0x00,0x91,0x00,0x94,0x00,0x9D,0x00,0xA7,0x00,0xAC,0x00,0xB3,0x00,0xC8,0x00,0xEB,0x00,0x82,0x00,0x93,0x00,0x9A,0x00,0x8F,0x00,0x8D,0x00,0x8F,0x00,0x90,0x00,0x91,0x00,0x93,0x00,0x9A,0x00,0xA2,0x00,0xAC,0x00,0xAD,0x00,0xB5,0x00,0xBD,0x00,0xC6,0x00,0xCF,0x00,0xCE,0x00,0xD2,0x00,0xDC,0x00,0xE7,0x00,0xEB,0x00,0xEE,0x00,0xF5,0x01,0x00,0x00,0xFF,0x01,0x06,0x01,0x0B,0x01,0x15,0x01,0x20,0x01,0x25,0x01,0x40,0x01,0x3B,0x00,0x80,0x00,0x8B,0x00,0x84,0x00,0x75,0x00,0x77,0x00,0x79,0x00,0x82,0x00,0x85,0x00,0x87,0x00,0x8E,0x00,0x98,0x00,0x9E,0x00,0xA1,0x00,0xAB,0x00,0xB3,0x00,0xBC,0x00,0xBF,0x00,0xC0,0x00,0xC8,0x00,0xD2,0x00,0xD9,0x00,0xDB,0x00,0xE0,0x00,0xE3,0x00,0xF0,0x00,0xF3,0x00,0xF6,0x00,0xFB,0x01,0x09,0x01,0x10,0x01,0x19,0x01,0x34,0x01,0x1F,0x00,0x74,0x00,0x7B,0x00,0x70,0x00,0x5F,0x00,0x65,0x00,0x69,0x00,0x72,0x00,0x79,0x00,0x7D,0x00,0x80,0x00,0x8A,0x00,0x92,0x00,0x97,0x00,0x9D,0x00,0xAB,0x00,0xB0,0x00,0xB1,0x00,0xB4,0x00,0xBA,0x00,0xC2,0x00,0xC5,0x00,0xCD,0x00,0xCE,0x00,0xD1,0x00,0xDE,0x00,0xDF,0x00,0xE0,0x00,0xE7,0x00,0xF5, +0x01,0x00,0x01,0x05,0x01,0x20,0x01,0x0D,0x00,0x76,0x00,0x70,0x00,0x73,0x00,0x65,0x00,0x65,0x00,0x6D,0x00,0x76,0x00,0x79,0x00,0x80,0x00,0x82,0x00,0x8C,0x00,0x90,0x00,0x94,0x00,0x9C,0x00,0xA4,0x00,0xAA,0x00,0xAB,0x00,0xAC,0x00,0xB5,0x00,0xBB,0x00,0xC2,0x00,0xC6,0x00,0xC8,0x00,0xC3,0x00,0xD3,0x00,0xD3,0x00,0xD9,0x00,0xDE,0x00,0xE8,0x00,0xEE,0x00,0xF7,0x01,0x10,0x01,0x01,0x00,0x78,0x00,0x7A,0x00,0x6F,0x00,0x5F,0x00,0x5F,0x00,0x6B,0x00,0x70,0x00,0x77,0x00,0x7A,0x00,0x7E,0x00,0x8A,0x00,0x92,0x00,0x94,0x00,0x98,0x00,0xA4,0x00,0xA6,0x00,0xA9,0x00,0xAA,0x00,0xB1,0x00,0xB9,0x00,0xC0,0x00,0xC2,0x00,0xC6,0x00,0xC7,0x00,0xD1,0x00,0xD3,0x00,0xD5,0x00,0xD8,0x00,0xE4,0x00,0xEC,0x00,0xF7,0x01,0x10,0x00,0xFB,0x00,0x70,0x00,0x72,0x00,0x65,0x00,0x57,0x00,0x59,0x00,0x63,0x00,0x66,0x00,0x71,0x00,0x72,0x00,0x72,0x00,0x7E,0x00,0x86,0x00,0x88,0x00,0x8C,0x00,0x96,0x00,0x9C,0x00,0x9D,0x00,0x9E,0x00,0xA7,0x00,0xA9,0x00,0xB2,0x00,0xB4,0x00,0xB6,0x00,0xB9,0x00,0xC7,0x00,0xC3,0x00,0xC5,0x00,0xCE,0x00,0xD6,0x00,0xE0,0x00,0xE9,0x01,0x04,0x00,0xEF,0x00,0x76,0x00,0x78,0x00,0x6B,0x00,0x5B,0x00,0x5D,0x00,0x67,0x00,0x6C,0x00,0x75,0x00,0x74,0x00,0x76,0x00,0x84,0x00,0x88,0x00,0x88,0x00,0x90,0x00,0x9A,0x00,0xA0,0x00,0xA1,0x00,0xA0,0x00,0xA5,0x00,0xB1,0x00,0xB4,0x00,0xB8,0x00,0xBC,0x00,0xB7,0x00,0xC3, +0x00,0xC5,0x00,0xC7,0x00,0xD0,0x00,0xDA,0x00,0xDE,0x00,0xE7,0x01,0x00,0x00,0xEF,0x00,0x70,0x00,0x72,0x00,0x67,0x00,0x57,0x00,0x5A,0x00,0x66,0x00,0x6C,0x00,0x72,0x00,0x71,0x00,0x76,0x00,0x7E,0x00,0x86,0x00,0x84,0x00,0x8C,0x00,0x95,0x00,0x9D,0x00,0x9E,0x00,0x9E,0x00,0xA0,0x00,0xA6,0x00,0xAF,0x00,0xB0,0x00,0xB6,0x00,0xB2,0x00,0xBF,0x00,0xC1,0x00,0xC4,0x00,0xC7,0x00,0xD1,0x00,0xD9,0x00,0xE0,0x00,0xFC,0x00,0xE8,0x00,0x6A,0x00,0x70,0x00,0x67,0x00,0x51,0x00,0x54,0x00,0x5E,0x00,0x64,0x00,0x68,0x00,0x69,0x00,0x6C,0x00,0x78,0x00,0x7C,0x00,0x7E,0x00,0x82,0x00,0x89,0x00,0x8F,0x00,0x92,0x00,0x92,0x00,0x96,0x00,0x9C,0x00,0xA1,0x00,0xA6,0x00,0xAA,0x00,0xAC,0x00,0xB5,0x00,0xB3,0x00,0xB8,0x00,0xBB,0x00,0xC1,0x00,0xC3,0x00,0xD2,0x00,0xEE,0x00,0xDE,0x00,0x68,0x00,0x6C,0x00,0x61,0x00,0x4D,0x00,0x4E,0x00,0x56,0x00,0x5C,0x00,0x5E,0x00,0x63,0x00,0x64,0x00,0x6C,0x00,0x72,0x00,0x72,0x00,0x78,0x00,0x81,0x00,0x81,0x00,0x88,0x00,0x86,0x00,0x8E,0x00,0x90,0x00,0x97,0x00,0x9C,0x00,0x9C,0x00,0x9E,0x00,0xAB,0x00,0xAD,0x00,0xAA,0x00,0xB3,0x00,0xB9,0x00,0xBB,0x00,0xC6,0x00,0xE0,0x00,0xD0,0x00,0x6A,0x00,0x6E,0x00,0x63,0x00,0x4D,0x00,0x50,0x00,0x56,0x00,0x5C,0x00,0x64,0x00,0x61,0x00,0x62,0x00,0x6A,0x00,0x70,0x00,0x70,0x00,0x72,0x00,0x7B,0x00,0x7D,0x00,0x80,0x00,0x82,0x00,0x84,0x00,0x8A,0x00,0x8F, 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+0x4C,0x02,0x4B,0x02,0x4F,0x02,0x54,0x02,0x5A,0x02,0x53,0x02,0x5D,0x02,0x5F,0x02,0x5F,0x02,0x62,0x02,0x63,0x02,0x60,0x02,0x68,0x02,0x69,0x02,0x68,0x02,0x67,0x02,0x68,0x02,0x6D,0x02,0x69,0x02,0x69,0x02,0x6D,0x02,0x6A,0x02,0x47,0x02,0x53,0x02,0x99,0x03,0x3B,0x02,0x42,0x02,0x3E,0x02,0x3D,0x02,0x43,0x02,0x44,0x02,0x42,0x02,0x45,0x02,0x4A,0x02,0x4A,0x02,0x4D,0x02,0x50,0x02,0x53,0x02,0x50,0x02,0x5A,0x02,0x5C,0x02,0x5C,0x02,0x5E,0x02,0x5F,0x02,0x5B,0x02,0x62,0x02,0x63,0x02,0x62,0x02,0x62,0x02,0x62,0x02,0x67,0x02,0x64,0x02,0x64,0x02,0x66,0x02,0x61,0x02,0xE7,0x01 +}; + +#endif + +#endif + diff --git a/src/app/demo/app_tp_st_touch.c b/src/app/demo/app_tp_st_touch.c new file mode 100644 index 0000000..6bf813f --- /dev/null +++ b/src/app/demo/app_tp_st_touch.c @@ -0,0 +1,572 @@ +/******************************************************************************* +* +* +* File: app_tp_st_touch.c +* Description ST touch У׼λȹܺ +* Version V0.1 +* Date 2023-03-13 +* Author sfy + +* Description ST touch У׼ضܣŽӿڸλȡǷɹ +* Version V0.2 +* Date 2023-03-22 +* Author sfy + +*******************************************************************************/ + +#include "test_cfg_global.h" +#include "app_tp_transfer.h" +#include "hal_i2c_master.h" +#include "hal_i2c_slave.h" +#include "hal_spi_master.h" +#include "hal_spi_slave.h" +#include "tau_log.h" +#include "app_tp_st_touch.h" +#include "tau_delay.h" + + +#define ST_TP_CALIBRATION_SUCCESS 0x5A // У׼ɹ־ + +static volatile bool s_calibration_flag = false; +static volatile uint8_t s_calibration_correct_flag = false; + +st_tp_scan_data tp_scan_data; + +uint8_t st_touch_init_sensor_off[3] = {0xA0,0x00,0x00}; //2 sensor OFF +uint8_t st_touch_init_sensor_on[3] = {0xA0,0x00,0x01}; //2 sensor on + + +uint8_t st_touch_tp_tuning_reset[3] = {0xA4,0x00,0x00}; // 3 System Reset +uint8_t st_touch_tp_tuning_FpnlInit[3] = {0xA4,0x00,0x03}; // FPnl Init +uint8_t st_touch_tp_tuning_PnlInit[3] = {0xA4,0x00,0x02}; // Pnl Init +uint8_t st_touch_tp_tuning_TuneM[4] = {0xA4,0x03,0x13,0x00}; // TuneM +uint8_t st_touch_tp_tuning_TuneS[4] = {0xA4,0x03,0x0C,0x00}; // TuneS +uint8_t st_touch_tp_tuning_SvCfg[3] = {0xA4,0x05,0x01}; // SvCfg +uint8_t st_touch_tp_tuning_SvCx[3] = {0xA4,0x05,0x02}; // SvCx +uint8_t st_touch_tp_tuning_SvPnl[3] = {0xA4,0x05,0x04}; // SvPnl +uint8_t st_touch_tp_tuning_clearfifo[3] = {0xA4,0x00,0x01}; // 1 clear fifo + +uint8_t st_touch_tp_tuning_clkreset[3] = {0xA4,0x00,0x05}; // clk reset + +/************************************************************************** +* @name : ap_tp_st_touch_get_calibration_success_mark +* @brief : st touch ȡУ׼ɹ־ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ + +void ap_tp_st_touch_get_calibration_success_mark(void) +{ + uint8_t cali_send_buff[6] = {0xFA,0x20,0x01,0x00,0x00,0x00}; + uint8_t cali_send_buff1[3] = {0xA4,0x06,0x01}; + uint8_t cali_read_buff[40] = {0}; + uint8_t i = 0; + + app_tp_m_read(cali_send_buff, 5, cali_read_buff, 4); + while(!hal_i2c_m_transfer_complate()); + delayMs(1); + + app_tp_m_write(cali_send_buff1, 3); + while(!hal_i2c_m_transfer_complate()); + delayMs(1); + + app_tp_m_read(cali_send_buff, 5, cali_read_buff, 4); + while(!hal_i2c_m_transfer_complate()); + delayMs(1); + + app_tp_m_read(cali_send_buff, 5, cali_read_buff, 32); + while(!hal_i2c_m_transfer_complate()); + + if((cali_read_buff[20] == 0xFF) && (cali_read_buff[21] == 0xFF)) + { + s_calibration_correct_flag = ST_TP_CALIBRATION_SUCCESS; // У׼ɹ + } + else + { + s_calibration_correct_flag = 0x00; // У׼ʧ + } +/* + for(i=0;i<32;i++) + { + printf("%02x ",cali_read_buff[i]); + } +*/ +} + +/************************************************************************** +* @name : ap_tp_st_touch_calibration +* @brief : st touch У׼ָ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ + +void ap_tp_st_touch_calibration(void) +{ + // app_tp_m_write(st_touch_tp_tuning_reset, sizeof(st_touch_tp_tuning_reset)); // System Reset + // while(!hal_i2c_m_transfer_complate()); + // delayMs(10); + app_tp_m_write(st_touch_tp_tuning_FpnlInit, sizeof(st_touch_tp_tuning_FpnlInit)); // FPnl Init + while(!hal_i2c_m_transfer_complate()); + delayMs(1); + app_tp_m_write(st_touch_tp_tuning_PnlInit, sizeof(st_touch_tp_tuning_PnlInit)); // Pnl Init + while(!hal_i2c_m_transfer_complate()); + delayMs(1); + app_tp_m_write(st_touch_tp_tuning_TuneM, sizeof(st_touch_tp_tuning_TuneM)); // TuneM + while(!hal_i2c_m_transfer_complate()); + delayMs(1); + app_tp_m_write(st_touch_tp_tuning_TuneS, sizeof(st_touch_tp_tuning_TuneS)); // TuneS + while(!hal_i2c_m_transfer_complate()); + delayMs(1); + app_tp_m_write(st_touch_tp_tuning_SvCfg, sizeof(st_touch_tp_tuning_SvCfg)); // SvCfg + while(!hal_i2c_m_transfer_complate()); + delayMs(1); + app_tp_m_write(st_touch_tp_tuning_SvCx, sizeof(st_touch_tp_tuning_SvCx)); // SvCx + while(!hal_i2c_m_transfer_complate()); + delayMs(1); + app_tp_m_write(st_touch_tp_tuning_SvPnl, sizeof(st_touch_tp_tuning_SvPnl)); // SvPnl + while(!hal_i2c_m_transfer_complate()); + delayMs(1); +} + +const unsigned short wCRCTalbeAbs[] = +{ + 0x0000, 0xCC01, 0xD801, 0x1400, 0xF001, 0x3C00, 0x2800, 0xE401, + 0xA001, 0x6C00, 0x7800, 0xB401, 0x5000, 0x9C01, 0x8801, 0x4400, +}; + +/************************************************************************** +* @name : CRC16_2 +* @brief : CRC ֵ +* @param[in] :pchMsg ַָ; wDataLen CRC 鳤 +* @return : 16λCRCֵ +* @retval : +**************************************************************************/ + +unsigned short CRC16_2(unsigned char *pchMsg, unsigned short wDataLen) +{ + unsigned short wCRC = 0xFFFF; + unsigned short i; + unsigned char chChar; + + for (i = 0; i < wDataLen; i++) + { + chChar = *pchMsg++; + wCRC = wCRCTalbeAbs[(chChar ^ wCRC) & 15] ^ (wCRC >> 4); + wCRC = wCRCTalbeAbs[((chChar >> 4) ^ wCRC) & 15] ^ (wCRC >> 4); + } + + return wCRC; +} + +/************************************************************************** +* @name : ap_set_tp_calibration_04 +* @brief : ȡ04 02ִУ׼gammaУ׼ȹ +* @param[in] :handler rx handler; dcs_packet ָͳȵϢṹ +* @return : true +* @retval : +**************************************************************************/ + +bool ap_set_tp_calibration_04(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +{ + uint8_t i,crch,crcl,command,param[30] = {0}; + unsigned short crc; + + // CRCֵ + for(i=0;iparam_length;i++) + { + param[i+1] = dcs_packet->packet_param[i]; + printf("%02x ",dcs_packet->packet_param[i]); + } + + param[0] = 0x04; + crc = CRC16_2(param,dcs_packet->param_length-1); + crch = (crc>>8); + crcl = crc; + + // CRCУж +// if(crch == dcs_packet->packet_param[dcs_packet->param_length-2] && crcl == dcs_packet->packet_param[dcs_packet->param_length-1]) + { + command = param[3]; + switch(command) + { + case CMD_TP_CABLIBRATION: // TouchУ׼ + if( (param[4] == 0x01) && (param[5] == 0x01) && (param[6] == 0x01) ) + { + s_calibration_flag = true; + s_calibration_correct_flag = false; + + } + /* if( (param[4] == 0xA5) && (param[5] == 0x5A) && (param[6] == 0xA5) ) + { + if(s_calibration_correct_flag) // У׼ɹ + { + hal_dsi_rx_ctrl_send_ack_cmd(handler, + DSI_ACK_DT_GEN_LONG_RESPONSE, //xxx + DSI_VC_0, + 0x7, 0x04,0x02,0x07,0x2A,ST_TP_CALIBRATION_SUCCESS,0x00,0x00); + printf("cali. send ok "); + } + else // У׼ʧ + { + hal_dsi_rx_ctrl_send_ack_cmd(handler, + DSI_ACK_DT_GEN_LONG_RESPONSE, //xxx + DSI_VC_0, + 0x7, 0x04,0x02,0x07,0x2A,0x00,0x00,0x00); + } + printf("%02x ",s_calibration_correct_flag); + } + */ + break; + case CMD_SET_IMAGE_RGB: // Image RGB + break; + case CMD_SEND_COMMAND: // Command Send + break; + case CMD_WRITE_GAMMA: // GammaУд + break; + case CMD_START_GAMMA: + break; + default: + break; + } + } + + // ݾɰ汾tp calibration + if( (dcs_packet->packet_param[0] == 0x01) && (dcs_packet->packet_param[1] == 0x01) && (dcs_packet->packet_param[2] == 0x01) ) + { + s_calibration_flag = true; + s_calibration_correct_flag = false; + } +/* + if( (dcs_packet->packet_param[0] == 0xA5) && (dcs_packet->packet_param[1] == 0x5A) && (dcs_packet->packet_param[2] == 0xA5) ) + { + if(s_calibration_correct_flag) // У׼ɹ + { + hal_dsi_rx_ctrl_send_ack_cmd(handler, + DSI_ACK_DT_GEN_LONG_RESPONSE, //xxx + DSI_VC_0, + 0x7, 0x04,0x02,0x07,0x2A,ST_TP_CALIBRATION_SUCCESS,0x00,0x00); + } + else // У׼ʧ + { + hal_dsi_rx_ctrl_send_ack_cmd(handler, + DSI_ACK_DT_GEN_LONG_RESPONSE, //xxx + DSI_VC_0, + 0x7, 0x04,0x02,0x07,0x2A,0x00,0x00,0x00); + } + } +*/ + return true; +} + + +/************************************************************************** +* @name : ap_get_tp_calibration_status_01 +* @brief : ȡУ׼״̬ +* @param[in] :param 01 +* @return : true +* @retval : +**************************************************************************/ + +bool ap_get_tp_calibration_status_01(hal_dsi_rx_ctrl_handle_t *handler, uint8_t param) +{ +// if( param == 0x5A ) + { + if(s_calibration_correct_flag) // У׼ɹ + { + hal_dsi_rx_ctrl_send_ack_cmd(handler, + DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, //xxx + DSI_VC_0, + 1,ST_TP_CALIBRATION_SUCCESS); + } + else // У׼ʧ + { + hal_dsi_rx_ctrl_send_ack_cmd(handler, + DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, //xxx + DSI_VC_0, + 1,0x00); + } + } + + return true; +} + +/************************************************************************** +* @name : app_tp_calibration_exec +* @brief : st touch У׼ִк +* @param[in] : +* @return : +* @retval : +**************************************************************************/ + +void app_tp_calibration_exec(void) +{ + uint8_t i = 0; + + if(s_calibration_flag) + { + s_calibration_flag = false; + for(i=0;i<2;i++) + { + ap_tp_st_touch_calibration(); + delayMs(4000); + ap_tp_st_touch_get_calibration_success_mark(); + if(s_calibration_correct_flag == ST_TP_CALIBRATION_SUCCESS) + { + TAU_LOGD("cali ok \n"); + break; + } + else + { + TAU_LOGD("cali ng \n"); + } + } + + } +} + + +/************************************************************************** +* @name : ap_tp_st_touch_scan_point_init +* @brief : st touch tp_scan_dataṹʼ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ + +void ap_tp_st_touch_scan_point_init(void) +{ + uint8_t i=0; + + for(i=0;i>4)+1; + i+=7; + + if(eventdata == 0x13) // ¼ + { + for(j=0;j0)) // ͷ¼ + { + for(j=0;j0) // в + { + // printf("release finger %2d\n",tp_scan_data.tp_read_point_counter); + tp_scan_data.tp_read_point_counter = 0; + ap_tp_st_touch_simulate_finger_release_event(); + } + ap_tp_st_touch_scan_point_init(); + } + } +} + +/************************************************************************** +* @name : ap_tp_st_touch_error_handler_F3 +* @brief : st touch 쳣 F3 02 +* @param[in] : screendata +* @return : +* @retval : +**************************************************************************/ + +void ap_tp_st_touch_error_handler_F3(uint8_t* screendata) +{ + // յ TP 쳣ظ 0xF3 0x02 0x00 0x00 0x00 0x00 0x00 0x00 +// if(screendata[0] == 0xF3 && screendata[1] == 0x02 && screendata[2] == 0x00) + if(screendata[0] == 0xF3) + { + // ap_tp_st_touch_software_reset(); + ap_tp_st_touch_hardware_reset(); + } +} + +/************************************************************************** +* @name : ap_tp_st_touch_error_handler_F3 +* @brief : st touch 쳣 FF FF +* @param[in] : screendata +* @return : +* @retval : +**************************************************************************/ + +void ap_tp_st_touch_error_handler_FF(uint8_t* screendata) +{ + // յ TP 쳣ظ 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF + if(screendata[1] == 0xFF && screendata[2] == 0xFF&& screendata[3] == 0xFF&&screendata[4] == 0xFF) + { +// ap_tp_st_touch_software_reset(); + ap_tp_st_touch_hardware_reset(); + } +} + + + + diff --git a/src/app/demo/app_tp_st_touch.h b/src/app/demo/app_tp_st_touch.h new file mode 100644 index 0000000..4ee5002 --- /dev/null +++ b/src/app/demo/app_tp_st_touch.h @@ -0,0 +1,176 @@ +/******************************************************************************* +* +* +* File: app_tp_st_touch.h +* Description ST touch оƬغ +* Version V0.1 +* Date 2023-03-13 +* Author sfy +*******************************************************************************/ + +#ifndef __APP_TP_ST_TOUCH_H__ +#define __APP_TP_ST_TOUCH_H__ + +#include "string.h" +#include "tau_device_datatype.h" +#include "tau_common.h" +#include "hal_dsi_rx_ctrl.h" +#include "hal_gpio.h" + +extern io_pad_e g_screen_input_rst_pad; +extern io_pad_e g_screen_input_int_pad; +extern io_pad_e g_phone_input_rst_pad; +extern io_pad_e g_phone_output_int_pad; + +typedef enum +{ + CMD_TP_CABLIBRATION = 0x2A, + CMD_SET_IMAGE_RGB = 0x2B, + CMD_SEND_COMMAND = 0x2C, + CMD_WRITE_GAMMA = 0x2D, + CMD_START_GAMMA = 0x2E +} st_tp_calibration_command; + + +#define ST_TP_SCAN_POINT_NUMBER_MAX 6 // TP + +typedef struct +{ + uint8_t tp_point_buffer[ST_TP_SCAN_POINT_NUMBER_MAX]; // ¼TPID + uint8_t tp_read_point_counter; // IDͳ + uint8_t tp_point_up_error_flag; // ¼ҪִUP¼ + uint32_t tp_point_error_time_counter; // ûյmove¼release¼ʱ +} st_tp_scan_data; + +/************************************************************************** +* @name : ap_tp_st_touch_calibration +* @brief : st touch У׼ָ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ + +void ap_tp_st_touch_calibration(void); + +/************************************************************************** +* @name : app_tp_calibration_exec +* @brief : st touch У׼ִк +* @param[in] : +* @return : +* @retval : +**************************************************************************/ + +void app_tp_calibration_exec(void); + +/************************************************************************** +* @name : ap_tp_st_touch_get_calibration_success_mark +* @brief : st touch ȡУ׼ɹ־ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ + +void ap_tp_st_touch_get_calibration_success_mark(void); + +/************************************************************************** +* @name : ap_set_tp_calibration_04 +* @brief : ȡ04 02ִУ׼gammaУ׼ȹ +* @param[in] :handler rx handler; dcs_packet ָͳȵϢṹ +* @return : true +* @retval : +**************************************************************************/ + +bool ap_set_tp_calibration_04(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet); + +/************************************************************************** +* @name : ap_get_tp_calibration_status_01 +* @brief : ȡУ׼״̬ +* @param[in] :param 01 +* @return : true +* @retval : +**************************************************************************/ + +bool ap_get_tp_calibration_status_01(hal_dsi_rx_ctrl_handle_t *handler, uint8_t param); + +/************************************************************************** +* @name : ap_tp_st_touch_scan_point_init +* @brief : st touch tp_scan_dataṹʼ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ + +void ap_tp_st_touch_scan_point_init(void); + +/************************************************************************** +* @name : ap_tp_st_touch_simulate_finger_release_event +* @brief : st touch ģST ָͷ¼ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ + +void ap_tp_st_touch_simulate_finger_release_event(void); + +/************************************************************************** +* @name : ap_tp_st_touch_software_reset +* @brief : st touch оƬλָ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ + +void ap_tp_st_touch_software_reset(void); + +/************************************************************************** +* @name : app_tp_st_touch_hardware_reset +* @brief : st touch оƬӲλָ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +void ap_tp_st_touch_hardware_reset(void); + +/************************************************************************** +* @name : ap_tp_st_touch_scan_point_record_event +* @brief : st touch ¼¼ +* @param[in] : screendata buflen ݳ +* @return : +* @retval : +**************************************************************************/ + +void ap_tp_st_touch_scan_point_record_event(uint8_t* screendata,uint8_t len); + +/************************************************************************** +* @name : ap_tp_st_touch_scan_point_record_event_exec +* @brief : st touch в㣬ʱִкҪwhile(1)ִ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ + +void ap_tp_st_touch_scan_point_record_event_exec(void); + +/************************************************************************** +* @name : ap_tp_st_touch_error_handler_F3 +* @brief : st touch 쳣 F3 02 +* @param[in] : screendata +* @return : +* @retval : +**************************************************************************/ + +void ap_tp_st_touch_error_handler_F3(uint8_t* screendata); + +/************************************************************************** +* @name : ap_tp_st_touch_error_handler_F3 +* @brief : st touch 쳣 FF FF +* @param[in] : screendata +* @return : +* @retval : +**************************************************************************/ + +void ap_tp_st_touch_error_handler_FF(uint8_t* screendata); + + +#endif + diff --git a/src/app/demo/app_tp_transfer.c b/src/app/demo/app_tp_transfer.c new file mode 100644 index 0000000..bbaf130 --- /dev/null +++ b/src/app/demo/app_tp_transfer.c @@ -0,0 +1,770 @@ +/******************************************************************************* +* +* +* File: app_tp_transfer.c +* Description touch I2C/SPI ʼԼͨ +* Version V0.1 +* Date 2021-10-14 +* Author zhanghz +*******************************************************************************/ +#include "test_cfg_global.h" +#include "app_tp_transfer.h" +#include "hal_i2c_master.h" +#include "hal_i2c_slave.h" +#include "hal_spi_master.h" +#include "hal_spi_slave.h" +#include "tau_log.h" +#include "tau_delay.h" +#include "app_tp_st_touch.h" + +#if 1//def AP_TP_TRANSFER +uint8_t read_point; //ǰҪıһ8BYTE +uint8_t s_screen_number[2]; +uint8_t s_screen_temp[2]; +//uint8_t s_screen_read_bak[200]; +static uint8_t s_screen_read_buffer[BUFFER_SIZE_MAX]; +static uint8_t s_phone_read_buffer[BUFFER_SIZE_MAX]; + +static bool s_spim_write = false; //¼SPIǷ÷ͣǵĻҪRXFIFO +static bool s_screen_int_flag = false; //¼ǷյĻıж +static bool s_phone_reset_flag = false; //¼ǷյֻĿλź +static bool s_screen_int_transfer_status = false; //¼ǷѾʼͨ +bool s_screen_init_complate = false; //ĻTPʼɱ־ +static uint8_t s_screen_const_transfer_count = 0xff; //¼ǰͨŵһ,ʼֵ screen_reg_start_data_size + + +#ifdef USE_FOR_SUMSUNG_S20 +uint16_t u16TouchID; +#endif + +static void app_tp_transfer_phone(size_t recieve_num); +//static void app_tp_reset_callback(void *data); +#if PHONE_SLAVE_TRANSFER_I2C //warning + static void app_tp_i2cs_callback(e_i2c_s_int_status int_status, size_t recieve_num); +#endif +#if PHONE_SLAVE_TRANSFER_SPI //warning + static void app_tp_spis_callback(hal_spis_event_e event, hal_spi_packet_info_t *packet_info); +#endif + +#ifdef USE_FOR_SUMSUNG_S20U +uint8_t MI10_PRO_screen_init_data1[3] = {0xA0,0x00,0x01}; +uint8_t MI10_PRO_screen_init_data2[6] = {0xA2,0x03,0x00,0x00,0x00,0x03}; +uint8_t MI10_PRO_screen_init_data3[3] = {0xA2,0x02,0x00}; +uint8_t MI10_PRO_screen_init_data4[3] = {0xC0,0x07,0x01}; + +uint8_t MI10_PRO_screen_init_data5[3] = {0xA4,0x06,0x70}; +uint8_t MI10_PRO_screen_init_data6[3] = {0xA6,0x00,0x00}; +uint8_t MI10_PRO_screen_init_data7[5] = {0xFA,0x20,0x00,0x00,0x78}; + +uint8_t MI10_PRO_screen_init_data8[6] = {0xA2,0x03,0x20,0x00,0x00,0x00}; +uint8_t MI10_PRO_screen_init_data9[2] = {0xA0,0x01}; +uint8_t MI10_PRO_screen_init_data10[3] = {0xA0,0x00,0x00}; +#endif + +/************************************************************************** +* @name : app_tp_screen_int_callback +* @brief : screen ж ص +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +static void app_tp_screen_int_callback(void *data) +{ + s_screen_int_flag = true; +} + +/************************************************************************** +* @name : app_tp_screen_int_lvl_low +* @brief : ȡ screen ж IO ƽ +* @param[in] : +* @return : trueIO Ϊ͵ƽ +* @retval : +**************************************************************************/ +static bool app_tp_screen_int_lvl_low(void) +{ +#if SCREEN_MASTER_TRANSFER_I2C + return false; +#elif SCREEN_MASTER_TRANSFER_SPI + return !hal_gpio_get_input_data(g_screen_input_int_pad); //ӦSPIͨŹżͻȻCS ͨ쳣 +#else + return false; +#endif +} + +/************************************************************************** +* @name : app_tp_screen_int_init +* @brief : screen ж IO ʼ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +static void app_tp_screen_int_init(void) +{ + hal_gpio_set_pull_state(g_screen_input_int_pad, ENABLE, DISABLE); // 1. + hal_gpio_ctrl_eint(g_screen_input_int_pad, DISABLE); // 2.رж + hal_gpio_init_eint(g_screen_input_int_pad, DETECT_FALLING_EDGE); // 3.жϳʼ,TPһ㶼½شж + hal_gpio_reg_eint_cb(g_screen_input_int_pad, app_tp_screen_int_callback); // 4.עص + hal_gpio_ctrl_eint(g_screen_input_int_pad, ENABLE); // 5.ʹж +} + + +/************************************************************************** +* @name : app_tp_screen_init +* @brief : screen IO 䣬ʼʼ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +void app_tp_screen_init(void) +{ + hal_gpio_init_output(g_screen_input_rst_pad, IO_LVL_HIGH); + delayUs(200); + hal_gpio_set_output_data(g_screen_input_rst_pad, IO_LVL_LOW); + delayUs(200); + hal_gpio_set_output_data(g_screen_input_rst_pad, IO_LVL_HIGH); +} + +void app_tp_I2C_init(void) +{ + hal_i2c_s_init(CHIP_I2C_ADDRESS, CHIP_I2C_ADDR_BITS); + hal_i2c_s_set_transfer(app_tp_i2cs_callback); + hal_i2c_s_nonblocking_read(s_phone_read_buffer, BUFFER_SIZE_MAX); //ý buffer +} + + + + +/************************************************************************** +* @name : app_tp_init +* @brief : ʼͨ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +void app_tp_init(void) +{ +#ifdef DISABLE_TDDI_I2C_FUNCTION + hal_gpio_init_output(g_phone_output_int_pad, IO_LVL_HIGH); //phoneжIO + hal_gpio_init_output(g_screen_input_rst_pad, IO_LVL_HIGH); //ģTP RESET + + hal_gpio_set_mode(IO_PAD_TD_SPIM_CLK,IO_MODE_I2C1_SCL); + hal_gpio_set_mode(IO_PAD_TD_SPIM_CSN,IO_MODE_I2C1_SDA); + + return; +#else + hal_gpio_set_pull_state(IO_PAD_TD_SPIM_CLK, ENABLE, DISABLE); + hal_gpio_set_pull_state(IO_PAD_TD_SPIM_CSN, ENABLE, DISABLE); +#endif + +// app_tp_screen_init(); //ʼֻλIO +//app_tp_screen_int_init(); //screenж +#ifdef G_PHONE_INT_DEFAULT_LOW + hal_gpio_init_output(g_phone_output_int_pad, IO_LVL_LOW); //phoneжIO +#else + hal_gpio_init_output(g_phone_output_int_pad, IO_LVL_HIGH); //phoneжIO +#endif + hal_gpio_init_input(g_screen_input_int_pad); +// hal_gpio_init_output(g_screen_input_rst_pad, IO_LVL_HIGH); //ģTP RESET + +#if SCREEN_MASTER_TRANSFER_I2C + hal_i2c_m_dma_init(SCREEN_I2C_ADDRESS, SCREEN_I2C_ADDR_BITS, I2C_MASTER_SPEED); +#elif SCREEN_MASTER_TRANSFER_SPI + hal_spi_m_dma_init(SPI_MASTER_SPEED, SCREEN_SPI_CPHA, SCREEN_SPI_CPOL); +#endif + +#if PHONE_SLAVE_TRANSFER_I2C +// hal_i2c_s_init(CHIP_I2C_ADDRESS, CHIP_I2C_ADDR_BITS); +// hal_i2c_s_set_transfer(app_tp_i2cs_callback); +// hal_i2c_s_nonblocking_read(s_phone_read_buffer, BUFFER_SIZE_MAX); //ý buffer +#elif PHONE_SLAVE_TRANSFER_SPI + hal_spi_slave_init(PHONE_SPI_CPHA, PHONE_SPI_CPOL, true); // ʼspiԼdma + hal_spi_slave_register_callback(app_tp_spis_callback); // עص + hal_spi_slave_auto_transfer_abort(); // ֹͣ + hal_spi_slave_flush_fifo(); // Flush FIFO + + /* ÿpacketԶ, circle mode Ϊfalse, յbuffer max sizeݺbufferٸ, packetɺûص */ + hal_spi_slave_set_auto_rx_buffer(s_phone_read_buffer, BUFFER_SIZE_MAX, false); // auto rx buffer + hal_spi_slave_set_auto_tx_buffer(phone_reg_const_data[0].write_back, phone_reg_const_data[0].write_back_size, false); // TX BUFFER + + hal_spi_slave_enable(); // spis + hal_spi_slave_auto_transfer_start(); // rxԶ +#endif + + //ap_tp_scan_point_init(); +} + + +/************************************************************************** +* @name : app_tp_m_transfer_complate +* @brief : ȡͨ״̬ +* @param[in] : +* @return :true: ͨ +* @retval : +**************************************************************************/ +bool app_tp_m_transfer_complate(void) +{ +#if SCREEN_MASTER_TRANSFER_I2C + return hal_i2c_m_transfer_complate(); +#elif SCREEN_MASTER_TRANSFER_SPI + return hal_spi_m_get_transfer_complate(); +#else + return true; +#endif +} + +/************************************************************************** +* @name : app_tp_s_transfer_complate +* @brief : ȡӻͨ״̬ +* @param[in] : +* @return :true: ͨ +* @retval : +**************************************************************************/ +bool app_tp_s_transfer_complate(void) +{ +#if SCREEN_MASTER_TRANSFER_I2C + return hal_i2c_s_write_complate() && hal_i2c_s_read_complate(); +#elif SCREEN_MASTER_TRANSFER_SPI + return !hal_spi_slave_busy(); +#else + return true; +#endif +} + +/************************************************************************** +* @name : app_tp_m_write +* @brief : ͨŷʽ÷txbufferе +* @param[in] :txbuffer: buffer ͷַ +* @param[in] :buffer_size: buffer +* @return : +* @retval : +**************************************************************************/ +void app_tp_m_write(const uint8_t *txbuffer, size_t buffer_size) +{ +#if SCREEN_MASTER_TRANSFER_I2C + hal_i2c_m_dma_write(txbuffer, buffer_size); +#elif SCREEN_MASTER_TRANSFER_SPI + hal_spi_m_dma_write(txbuffer, buffer_size); + s_spim_write = true; +#endif +} + +/************************************************************************** +* @name : app_tp_m_read +* @brief : ͨŷʽ÷txbufferеݺrxbuffer +* @param[in] :cmd: buffer ͷַ +* @param[in] :cmd_size: buffer +* @param[in] :data_buffer: ȡ buffer ͷַ +* @param[in] :data_size: ȡ buffer +* @return : +* @retval : +**************************************************************************/ +void app_tp_m_read(const uint8_t *cmd, size_t cmd_size, uint8_t *data_buffer, size_t data_size) +{ +#if SCREEN_MASTER_TRANSFER_I2C + uint8_t i = 0; + uint32_t address = 0; + + for (i = 0; i < cmd_size; i++) //ȽҪ͵ϵ address + { + address |= (uint32_t)cmd[i] << i * 8; + } + hal_i2c_m_dma_read(address, cmd_size, data_buffer, data_size); +#elif SCREEN_MASTER_TRANSFER_SPI + hal_spi_m_dma_read(cmd, cmd_size, data_buffer, data_size); +#endif +} + +/************************************************************************** +* @name : app_tp_s_write +* @brief : ͨŷʽ÷txbufferе +* @param[in] :txbuffer: buffer ͷַ +* @param[in] :buffer_size: buffer +* @return : +* @retval : +**************************************************************************/ +void app_tp_s_write(const uint8_t *txbuffer, size_t buffer_size) +{ +#if PHONE_SLAVE_TRANSFER_I2C + hal_i2c_s_dma_write(txbuffer, buffer_size); +#elif PHONE_SLAVE_TRANSFER_SPI + //while (hal_spi_slave_busy()); + hal_spi_slave_auto_transfer_abort(); + hal_spi_slave_flush_fifo(); + hal_spi_slave_set_auto_tx_buffer(txbuffer, buffer_size, true); + hal_spi_slave_auto_transfer_start(); +#endif +} + +/************************************************************************** +* @name : app_tp_s_read +* @brief : ͨŷʽrxbuffer +* @param[in] :rxBuffer: ȡ buffer ͷַ +* @param[in] :data_size: ȡ buffer +* @return : +* @retval : +**************************************************************************/ +void app_tp_s_read(void *rxBuffer, size_t data_size) +{ +#if PHONE_SLAVE_TRANSFER_I2C + hal_i2c_s_nonblocking_read(rxBuffer, data_size); +#endif +} + +/************************************************************************** +* @name : app_tp_spis_callback +* @brief : SPI slave жϴ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +#if PHONE_SLAVE_TRANSFER_I2C //warning +//ԡint_status=0Ϊ=2ΪSTOP=1δԵ +//recieve_numΪյָ +static void app_tp_i2cs_callback(e_i2c_s_int_status int_status, size_t recieve_num) +{ +#if 0 // 1: test + if (int_status >2) + { + s_phone_read_buffer[2]=int_status; + s_phone_read_buffer[3]=recieve_num; + app_tp_m_write(s_phone_read_buffer, 4); + } +#endif + app_tp_transfer_phone(recieve_num); +} +#endif + +/************************************************************************** +* @name : app_tp_spis_callback +* @brief : SPI slave жϴ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +#if PHONE_SLAVE_TRANSFER_SPI //warning +static void app_tp_spis_callback(hal_spis_event_e event, hal_spi_packet_info_t *packet_info) +{ + app_tp_transfer_phone(packet_info->packet_size); +} +#endif + + +/************************************************************************** +* @name : 20_Start_init +* @brief : +* @param[in] : +* @return : +* @retval : +**************************************************************************/ + +void S20_Start_init(void) +{ + uint8_t len=0; + uint8_t temp=0; + uint8_t temp_start_flag=0; + // if(phone_start_flag==1) + { + app_tp_m_read(screen_reg_int_data[0].buffer, 1, s_screen_read_buffer, 8); + while(!hal_i2c_m_transfer_complate()); + delayMs(2); + while(!hal_gpio_get_input_data(g_screen_input_int_pad)) + { + app_tp_m_read(screen_reg_int_data[0].buffer, 1, s_screen_read_buffer, 8); + while(!hal_i2c_m_transfer_complate()); + delayMs(2); + } + temp=s_screen_read_buffer[0]&0xf0; + if((temp==0x10)||(temp==0x20)||(temp==0x30)) + { + temp_start_flag=1; + } + if(temp_start_flag==0) + { + app_tp_m_write(MI10_PRO_screen_init_data1, sizeof(MI10_PRO_screen_init_data1));//0xA0,0x00,0x01 + while(!hal_i2c_m_transfer_complate()); + delayMs(1); + app_tp_m_write(MI10_PRO_screen_init_data2, sizeof(MI10_PRO_screen_init_data2));//0xA2,0x03,0x00,0x00,0x00,0x03 + while(!hal_i2c_m_transfer_complate()); + delayMs(1); + app_tp_m_write(MI10_PRO_screen_init_data3, sizeof(MI10_PRO_screen_init_data3));//0xA2,0x02,0x00 + while(!hal_i2c_m_transfer_complate()); + delayMs(1); + app_tp_m_write(MI10_PRO_screen_init_data4, sizeof(MI10_PRO_screen_init_data4));//0xC0,0x07,0x01 + while(!hal_i2c_m_transfer_complate()); + delayMs(1); + app_tp_m_read(screen_reg_int_data[0].buffer, 1, s_screen_read_buffer, 8); + while(!hal_i2c_m_transfer_complate()); + if(s_screen_read_buffer[7]>0) + { + len=s_screen_read_buffer[7]*8; + app_tp_m_read(screen_reg_int_data[0].buffer, 1, s_screen_read_buffer, len); + while(!hal_i2c_m_transfer_complate()); + } + } +#endif + if(hal_gpio_get_input_data(g_screen_input_int_pad)) + { + s_screen_init_complate = true; + app_tp_screen_int_init(); + phone_start_flag=0; + } + } +} + + + +/************************************************************************** +* @name : app_tp_transfer_screen_const +* @brief : flowдscreen screen ʼ +* @param[in] : +* @return : +* @retval : +*޸TP1ģʼ +*ִscreen_reg_start_data[] +**************************************************************************/ +static void app_tp_transfer_screen_const(void) +{ +// static bool screen_const_transfer_buffer_ready = true; // buffer Ƿ׼ + uint8_t ii; +// uint8_t len=0; + /**** 1. жϵǰ״̬ͨѽ, ״̬ͨѽҿʼ̻δ****/ +#if 0 // test + uint8_t test_master_read_buffer[10] = {0x08, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18, 0x19}; + uint8_t write_buffer[10] = {0x04, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18, 0x19}; + +// for (ii =0x20; ii<0x7F; ii++) + { + //hal_i2c_m_dma_init(ii, SCREEN_I2C_ADDR_BITS); + //delayMs(100); + if (hal_i2c_m_dma_write(write_buffer, 1)) + { + //break; + } + while(!hal_i2c_m_transfer_complate()); + hal_i2c_m_dma_read(test_master_read_buffer, 1, test_master_read_buffer, 2); + } +#endif + + + if (app_tp_m_transfer_complate() && (s_screen_const_transfer_count < screen_reg_start_data_size)) + { + if (s_spim_write) //SPI дݺҪѽFIFOݶȻӰһζȡ + { + hal_spi_m_clear_rxfifo(); + s_spim_write = false; + } + + #if 1 + +// #ifndef USE_FOR_SUMSUNG_S20 +// for (ii =0; ii= screen_reg_start_data_size) + { + s_screen_init_complate = true; + } + } + #endif + } +} + +/************************************************************************** +* @name : app_tp_transfer_screen_start +* @brief : flowдscreenʼʼ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +void app_tp_transfer_screen_start(void) +{ + s_screen_init_complate = false; + s_screen_const_transfer_count = 0; + //app_tp_screen_init(); +#ifndef DISABLE_I2C_INIT_CODE + app_tp_transfer_screen_const(); +#endif + s_screen_int_flag = false; +} + +/************************************************************************** +* @name : app_tp_transfer_screen_int +* @brief : screenжϺ󣬰flowдscreenЭת +* @param[in] : +* @return : +* @retval : +*޸TP2ȡģ鱨㣡 +*ִscreen_reg_int_data[]ҲԼд +**************************************************************************/ +void app_tp_transfer_screen_int(void) +{ + uint8_t len=0; + uint8_t temp_len=0; + bool screen_gpio_int = false; + static uint8_t screen_int_transfer_count = 0; //¼ǰͨŵһ + static bool screen_int_transfer_buffer_ready = true; // buffer Ƿ׼ + // static uint8_t test_flag = 0; + // s_screen_init_complate=false;//Ϊ¼⽫ƬΪ·ݣFT8719̩ĹͨѶ + if (!s_screen_init_complate) //TP ʼδɣȽгʼ + { + app_tp_transfer_screen_const(); + return; + } + +#if 0 //test + test_flag++; + if (test_flag >1000000) + { + test_flag =0; + //TAU_LOGD("Run ok!!\n"); + //app_tp_m_read(screen_reg_int_data[0].buffer, screen_reg_int_data[0].txbuffer_size, s_screen_number, screen_reg_int_data[0].rxbuffer_size); + //while(!hal_i2c_m_transfer_complate()); + } +#endif + + /**** 1. ж screen Ƿ񷢳жź ****/ + // s_screen_int_flag: жźű־λ + // app_tp_screen_int_lvl_low : SPI ʱͨʱżcsߵͨ쳣ñ־λڽ + screen_gpio_int = s_screen_int_flag || app_tp_screen_int_lvl_low(); + if (((screen_gpio_int) || (s_screen_int_transfer_status)) && app_tp_m_transfer_complate()) //жϵǰͨ״̬׼ͨ + { + s_screen_int_flag = false; + if (s_spim_write) //SPI дݺҪѽFIFOݶȻӰһζȡ + { + hal_spi_m_clear_rxfifo(); + s_spim_write = false; + } + + /**** 2. ͻȡӻ ****/ + if (screen_int_transfer_buffer_ready) + { + #ifndef READ_MODULE_TP_ONE_BY_ONE + screen_int_transfer_buffer_ready = false; + s_screen_int_transfer_status = true; + #ifdef USE_FOR_SUMSUNG_S20U + app_tp_m_read(screen_reg_int_data[0].buffer, 1, s_screen_read_buffer, 8); + while(!hal_i2c_m_transfer_complate()); + if(s_screen_read_buffer[7]>0) + { + len=s_screen_read_buffer[7]*8; + app_tp_m_read(screen_reg_int_data[0].buffer, 1, &s_screen_read_buffer[8], len); + while(!hal_i2c_m_transfer_complate()); + temp_len=len+7; + } + if(s_screen_read_buffer[temp_len]>0) + { + len=s_screen_read_buffer[7]*8; + app_tp_m_read(screen_reg_int_data[0].buffer, 1, &s_screen_read_buffer[temp_len+1], len); + while(!hal_i2c_m_transfer_complate()); + } + delayUs(100); + + while(!hal_gpio_get_input_data(g_screen_input_int_pad)) + { + app_tp_m_read(screen_reg_int_data[0].buffer, 1, s_screen_read_buffer, 8); + while(!hal_i2c_m_transfer_complate()); + delayMs(2); + if(s_screen_read_buffer[7]>0) + { + len=s_screen_read_buffer[7]*8; + app_tp_m_read(screen_reg_int_data[0].buffer, 1, &s_screen_read_buffer[8], len); + while(!hal_i2c_m_transfer_complate()); + delayMs(2); + } + // printf("%2x,%2x\n",s_screen_read_buffer[0],s_screen_read_buffer[1]); + + } + + #else + + #endif + #else + + #endif + ap_tp_st_touch_scan_point_record_event(s_screen_read_buffer, len+8); + ap_tp_st_touch_error_handler_FF(s_screen_read_buffer); + ap_tp_st_touch_error_handler_F3(s_screen_read_buffer); + screen_int_transfer_buffer_ready = true; + app_tp_screen_analysis_int(screen_int_transfer_count, s_screen_read_buffer,screen_reg_int_data[2].rxbuffer_size); + screen_int_transfer_count = 0; + s_screen_int_transfer_status = false; + } + /**** 3. ͨݣ׼һͨŵbuffer ****/ + else + { + #if 1 + #ifdef USE_FOR_SUMSUNG_S20 + u16TouchID=0x0000; + #endif + ap_tp_st_touch_scan_point_record_event(s_screen_read_buffer, len+8); + ap_tp_st_touch_error_handler_FF(s_screen_read_buffer); + ap_tp_st_touch_error_handler_F3(s_screen_read_buffer); + screen_int_transfer_buffer_ready = true; + screen_int_transfer_count = app_tp_screen_analysis_int(screen_int_transfer_count, s_screen_read_buffer,screen_reg_int_data[2].rxbuffer_size); + screen_int_transfer_count = 0; + s_screen_int_transfer_status = false; + + #else + screen_int_transfer_buffer_ready = true; + screen_int_transfer_count = app_tp_screen_analysis_int(screen_int_transfer_count, s_screen_read_buffer, \ + screen_reg_int_data[screen_int_transfer_count].rxbuffer_size); + + if (screen_int_transfer_count > screen_reg_int_data_size) //ҪһͨŽһݽֹͣͨ + { + screen_int_transfer_count = 0; + s_screen_int_transfer_status = false; + return; + } + #endif + } + } +} + +/************************************************************************** +* @name : app_tp_transfer_phone +* @brief : ݽӦĴ +* @param[in] : recieve_numݳ +* @return : +* @retval : +**************************************************************************/ +static void app_tp_transfer_phone(size_t recieve_num) +{ + const uint8_t *phone_write_buffer; + size_t phone_write_buffer_size = 0; + /* ݽжǷҪԼ𸴵bufferָ */ + if (recieve_num > 0) + { + #if 0// 1: test + s_phone_read_buffer[3]=recieve_num; + app_tp_m_write(s_phone_read_buffer, 4); + #endif + app_tp_phone_analysis_data(s_phone_read_buffer, recieve_num, &phone_write_buffer, &phone_write_buffer_size); + } + + app_tp_s_read(s_phone_read_buffer, BUFFER_SIZE_MAX); + if (phone_write_buffer_size) //0ʾҪֻ÷buffer + { + app_tp_s_write(phone_write_buffer, phone_write_buffer_size); + } +} + +/************************************************************************** +* @name : app_tp_phone_reset_on +* @brief : ȡֻλźŵ״̬ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +bool app_tp_phone_reset_on(void) +{ + return s_phone_reset_flag; +} + +/************************************************************************** +* @name : app_tp_phone_clear_reset_on +* @brief : ֻλźŵ״̬ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +void app_tp_phone_clear_reset_on(void) +{ + s_phone_reset_flag = false; +} + +#else + +void app_tp_screen_init(void) +{ + +} + +void app_tp_init(void) +{ + +} + +void app_tp_transfer_screen_int(void) +{ + +} + +void app_tp_transfer_screen_start(void) +{ + +} + +bool app_tp_phone_reset_on(void) +{ + return false; +} + +void app_tp_phone_clear_reset_on(void) +{ + +} + +void app_tp_s_write(const uint8_t *txbuffer, size_t buffer_size) +{ + +} + +bool app_tp_enter_sleep_on(void) +{ + return false; +} + +#endif + diff --git a/src/app/demo/app_tp_transfer.h b/src/app/demo/app_tp_transfer.h new file mode 100644 index 0000000..ea64143 --- /dev/null +++ b/src/app/demo/app_tp_transfer.h @@ -0,0 +1,114 @@ +/******************************************************************************* +* +* +* File: app_tp_transfer.h +* Description touch I2C/SPI ͨغ +* Version V0.1 +* Date 2021-10-14 +* Author zhanghz +*******************************************************************************/ +#ifndef __APP_TP_TRANSFER_H__ +#define __APP_TP_TRANSFER_H__ + +#include "string.h" +#include "tau_device_datatype.h" +#include "tau_common.h" + +#define SCREEN_TRANSFER_WRITE false //յscreen ioжϣ֮ö +#define SCREEN_TRANSFER_READ true //յscreen ioжϣ֮Ҫ + +#define ST_TP_SCAN_POINT_NUMBER_MAX 6 + + +/************************************************************************** +* @name : ap_tp_calibration +* @brief : ����У׼���� +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +void ap_tp_calibration(void); + +void ap_tp_system_softReset(void); + +void ap_tp_scan_point_record_event_exec(void); + +/************************************************************************** +* @name : app_tp_screen_init +* @brief : screen IO 䣬ʼʼ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +void app_tp_screen_init(void); + +/************************************************************************** +* @name : app_tp_init +* @brief : ʼͨ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +void app_tp_init(void); + +/************************************************************************** +* @name : app_tp_transfer_screen_int +* @brief : screenжϺ󣬰flowдscreenЭת +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +void app_tp_transfer_screen_int(void); + +/************************************************************************** +* @name : app_tp_transfer_screen_start +* @brief : flowдscreenʼʼ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +void app_tp_transfer_screen_start(void); + +/************************************************************************** +* @name : app_tp_phone_reset_on +* @brief : ȡֻλźŵ״̬ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +bool app_tp_phone_reset_on(void); + +/************************************************************************** +* @name : app_tp_phone_clear_reset_on +* @brief : ֻλźŵ״̬ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +void app_tp_phone_clear_reset_on(void); + +/************************************************************************** +* @name : app_tp_s_write +* @brief : ͨŷʽ÷txbufferе +* @param[in] :txbuffer: buffer ͷַ +* @param[in] :buffer_size: buffer +* @return : +* @retval : +**************************************************************************/ +void app_tp_s_write(const uint8_t *txbuffer, size_t buffer_size); + +/************************************************************************** +* @name : app_tp_enter_sleep_on +* @brief : ȡ tp ͨ״̬ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +bool app_tp_enter_sleep_on(void); + +void app_tp_m_write(const uint8_t *txbuffer, size_t buffer_size); + +void app_tp_m_read(const uint8_t *cmd, size_t cmd_size, uint8_t *data_buffer, size_t data_size); + +#endif + diff --git a/src/app/demo/tp_EncryptCheck.lib b/src/app/demo/tp_EncryptCheck.lib new file mode 100644 index 0000000000000000000000000000000000000000..137ff91ef25fac68b10dacc0254548cd0e8bd382 GIT binary patch literal 65818 zcmeIb3w&Hvy)VA@%;eD*ZIY(6w3KNZAT4c~ypukllgT8Rc9IM;leC54?j)JCp-Cpp zByEa_1w;#?;tNs1qlj7+ugLKzdi7p7M>(i)4|+U4kfVqk#dGy|&Jht15C89PJ@#IE z&rBLhFZbj9{C7K9`}bSF-*5fa>$l!(uiKHz4j;N?;l+OE6VO2MuK)G>>*@k6g5+OkH@7<~FNM~wh-1bcjge>1!dU7N& zV1bEax#So^P=W>`9U(IkziiUNL_=;&Pb3yG7 z6WP%dbRv?Go^U)+09RK4S6=|v;Kc3i=yD?ZgYl#j6R8im0tChtTp|`pIJto7abkk* z^o#B7=?J?5>r2L*T#3CAcS^+uI-E4YnAsZ-C)~2a`;rke(wlT?uh6b2D6}il6xx+; z3f<_`M4_7sqnit(Tb$^H7rPA7DeY0KGFS%|qM~G{XQs?lc4BxUur+h>Lc2->0%2Wq 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zOrC0dV7I~J_l@6i>Et>4tKsqcSSCq0;+3`>*S0Ee8!*=a(n+5AUA-3suKT2uH)`^} z27(tJj}LhHzU8s;bm48q^)d~drU?L<7mVfk2Ar!r9-BWVg^Fw~&gH%1l*;j79tIax znYA8_FF|!S>HGFH3IKn9;`58YpR9NpFT^i3Q$zF=cziwc+`fZfPd1Rt;c+-JJoEc82;p6jODFTp{C>O#ynmNMkmV^KasMOo`h$2QdL>YJT(b@i?+{;) z)?VGN-;ee64UN`kWn^mozU};BuB_{sL$i|Kj|GpxX84ygJNysv_hYa#Xsx;_JRLe6 zJXyBhx{kt&#;~XMT_=5&!7mM1w#l($_x_BNbS7Z=W_-!_MZP-YSQh-aWmCV&-VWcD zYK_1(oV71>OUb_VB_Fz=Z%j3unN~R1kGZAfj*bfqr^?QF>pzbq!6Y_9Ih6Uaj146p zc*;VQ%_=39Ykf!Tk(_)(ynMOV_tn46wce7q`)mGgwJIg2uT~aLf3qf)%HF}>tXvXe zqCQd&htszb^${kG;jvpu7#gz;9R;%k@NScv?s~!J%8U`C*(Fx zk=rae_aJO% z&}-JO&ouV`%%*=%CYJjsVR}x(IrK-s93L>J0-x8akqiFA1)osua*Eu#%%XPI>sEYbc{J|(((7Z zmOprYmTaM5REgsvdoC}$1aZJCTuBtc(U0$Z{-6mj7RM{ZcRoIVtnYjX`Fq2U{+5N& zspZ~~ADzm2KFYNqa|Fisza_^S5=+jV%8MQc=pWfLZf(0an5gc@nhbfa=z2}L7Noj& z>_SHe_KpcfG7SGk_w-WKLAf{M`U= 6010050) +#pragma clang diagnostic push +#pragma clang diagnostic ignored "-Wc11-extensions" +#pragma clang diagnostic ignored "-Wreserved-id-macro" +#elif defined (__GNUC__) +/* anonymous unions are enabled by default */ +#elif defined (__TMS470__) +/* anonymous unions are enabled by default */ +#elif defined (__TASKING__) +#pragma warning 586 +#elif defined (__CSMC__) +/* anonymous unions are enabled by default */ +#else +#warning Not supported compiler type +#endif + +/* -------- Configuration of Core Peripherals ----------------------------------- */ +#define __CM0_REV 0x0000U /* Core revision r0p0 */ +#define __MPU_PRESENT 0U /* no MPU present */ +#define __VTOR_PRESENT 0U /* no VTOR present */ +#define __NVIC_PRIO_BITS 2U /* Number of Bits used for Priority Levels */ //20220228 +#define __Vendor_SysTickConfig 0U /* Set to 1 if different SysTick Config is used */ + +#define __FPU_PRESENT 0U /* Set to 1 if FPU is present */ +#define __FPU_DP 0U /* single precision FPU */ +#define __ICACHE_PRESENT 0U /* Set to 1 if I-CACHE is present */ +#define __DCACHE_PRESENT 0U /* Set to 1 if D-CACHE is present */ +#define __DSP_PRESENT 0U /* no DSP extension present */ + +#define FPGA_MODE 0 +#define EDA_MODE 0 +#define EXTERN_24M 0 +#define CPU_CLK_100M 0 + +#define LOG_MODE_RTT 0 /* 0:UART MODE 1: rtt MODE */ + +#include "core_cm0.h" /* Processor and core peripherals */ +#include "system_ARMCM0.h" /* System Header */ + +/*---------------------------------------------------------------------------- + Define clocks + *----------------------------------------------------------------------------*/ +#define XTAL (500000000UL) /* Oscillator frequency */ + +#if FPGA_MODE +#define SYSTEM_CLOCK (33300000U) +#else +/* 使用外部晶振时,系统时钟只能是100M,不使用外部晶振时,系统时钟可以是100M/80M*/ +#if EXTERN_24M +#define SYSTEM_CLOCK (100000000U) +#else +#if CPU_CLK_100M +#define SYSTEM_CLOCK (100000000U) +#else +#define SYSTEM_CLOCK (80000000U) +#endif +#endif +#endif + +/* -------- End of section using anonymous unions and disabling warnings -------- */ +#if defined (__CC_ARM) +#pragma pop +#elif defined (__ICCARM__) +/* leave anonymous unions enabled */ +#elif (defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)) +#pragma clang diagnostic pop +#elif defined (__GNUC__) +/* anonymous unions are enabled by default */ +#elif defined (__TMS470__) +/* anonymous unions are enabled by default */ +#elif defined (__TASKING__) +#pragma warning restore +#elif defined (__CSMC__) +/* anonymous unions are enabled by default */ +#else +#warning Not supported compiler type +#endif + +/* In HS mode and when the DMA is used, all variables and data structures dealing + with the DMA during the transaction process should be 4-bytes aligned */ +#define DMA_WORD_ALIGN_EN +#ifdef DMA_WORD_ALIGN_EN +#if defined (__GNUC__) /* GNU Compiler */ +#define __ALIGN_END __attribute__ ((aligned (4))) +#define __ALIGN_BEGIN +#else +#define __ALIGN_END +#if defined (__CC_ARM) /* ARM Compiler */ +#define __ALIGN_BEGIN __align(4) +#elif defined (__ICCARM__) /* IAR Compiler */ +#define __ALIGN_BEGIN +#elif defined (__TASKING__) /* TASKING Compiler */ +#define __ALIGN_BEGIN __align(4) +#endif /* __CC_ARM */ +#endif /* __GNUC__ */ +#else + +#define __ALIGN_BEGIN +#define __ALIGN_END + +#define __ALIGN_END_1 __attribute__ ((aligned (1))) +#endif /* DMA_WORD_ALIGN_EN */ + +/* __packed keyword used to decrease the data type alignment to 1-byte */ +#if defined (__CC_ARM) /* ARM Compiler */ +#define __packed __packed +#elif defined (__ICCARM__) /* IAR Compiler */ +#define __packed __packed +#elif defined ( __GNUC__ ) /* GNU Compiler */ +#define __packed __attribute__ ((__packed__)) +#define __weak __attribute__((weak)) +#elif defined (__TASKING__) /* TASKING Compiler */ +#define __packed __unaligned +#endif /* __CC_ARM */ + +#ifdef __cplusplus +} +#endif + +#endif /* ARMCM0_H */ diff --git a/src/sdk/include/hal_dsi_rx_ctrl.h b/src/sdk/include/hal_dsi_rx_ctrl.h new file mode 100644 index 0000000..9e6726d --- /dev/null +++ b/src/sdk/include/hal_dsi_rx_ctrl.h @@ -0,0 +1,568 @@ +/******************************************************************************* +* +* +* File: hal_dsi_rx_ctrl.h +* Description: hal mipi dsi rx path control 头文件 +* Version: V0.1 +* Date: 2021-04-06 +* Author: lzy + *******************************************************************************/ +#ifndef __HAL_DSI_RX_CTRL_H__ +#define __HAL_DSI_RX_CTRL_H__ + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "tau_dsi_datatype.h" +#include "tau_common.h" + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ +#define RX_DCS_QUEUE_MAX_SIZE 20 /* DCS存储队列长度 */ + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ +typedef struct hal_dcs_execute_entry_t hal_dcs_execute_entry_t; + +typedef struct hal_dcs_packet_t hal_dcs_packet_t; + +typedef struct hal_dsi_rx_ctrl_handle_t hal_dsi_rx_ctrl_handle_t; + +/* DCS CMD 回调函数, 注册进cus_dcs_entry_table里, 匹配对应的DCS 后回调*/ +typedef bool (*hal_dsi_rx_ctrl_dcs_execute)(hal_dsi_rx_ctrl_handle_t *rx_handle, hal_dcs_packet_t *dcs_packet); + +/* AP 读cmd 回调, 需要快速回CMD 时可注册, 为NULL 时DSC 读指令与写指令经过parse后由cus_dcs_entry_table回调 */ +typedef bool (*hal_dsi_rx_ctrl_read_entry)(uint8_t data_type, uint8_t dcs_cmd, uint8_t param); + +/* AP PPS 更新回调,参数为PPS 以及从PPS 里解析出来的picture width/height, 用于分辨率切换, 不注册该接口时内部处理PPS */ +typedef bool (*hal_dsi_rx_ctrl_pps_entry)(uint8_t *pps, uint8_t size, uint32_t pic_width, uint32_t pic_height); + +/** +* @brief hal_rx_dbg_event_e select +*/ +typedef enum hal_rx_dbg_event_e +{ + HAL_RX_DBG_FS = 0, /* Frame start */ + HAL_RX_DBG_EVENT_MAX +} hal_rx_dbg_event_e; + +/* RX debug 回调函数,用于获取frame start 等功能debug */ +typedef void (*hal_dsi_rx_ctrl_dbg_entry)(hal_rx_dbg_event_e event); + +/** +* @brief dsi rx ctrl handle struct +*/ +typedef struct hal_dsi_rx_ctrl_handle_t +{ + dsi_base_trans_info_t base_info; /* mipi video 转换基本信息 */ + dsi_color_code_e rx_color_mode; /* 输入color mode */ + dsi_lane_nume_e rx_lanes; /* mipi data lane */ + dsi_video_mode_type_e rx_nonburst_models; /* transmission packet sequences */ + dsi_virtual_channel_e rx_vc; /* virtual channel number */ + bool compress_en; /* DSC 压缩标志 */ + uint32_t rx_hsclk_rate; /* mipi 高速信号lane rate */ + uint8_t rx_dsc_pps[DSC_PPS_SIZE]; /* DSC 压缩PPS参数 */ + const hal_dcs_execute_entry_t *cus_dcs_entry_table; /* DCS处理函数列表 */ + hal_dsi_rx_ctrl_read_entry rx_dcs_read_entry; /* Host读指令数据函数,为NULL时由rx_dcs_queue注册cmd处理 */ + hal_dsi_rx_ctrl_pps_entry pps_update_entry; /* PPS Update 时回调函数,用于分辨率切换更新PPS,为NULL时内部处理 */ + bool used; /* handle使用标志位 */ + uint8_t pq_marginal; /* picture quality,参数为hal_rx_pq_marginal_type_e */ + bool direct_mode; /* video mode 直通模式,预留,仅debug使用 */ + hal_dsi_rx_ctrl_dbg_entry rx_debug_cb; /* rx debug 回调函数,目前为收到frame start之后回调，预留其他debug功能 */ + hal_err_handle_level_e err_handler_level; /* RX接收错误的时候对模块做reset等级, 等级越高reset模块越多 */ + bool draw_mode; /* 画点模式,仅debug使用 */ +#if defined(ISP_568) || defined(ISP_368) + uint8_t rx_strength; /* 用于调节RX信号强度，仅适用于开启内阻校准模式，档位0~7，默认3 */ + hight_performan_mode_e hight_performan_mode; /* 高性能模式等级,参考hight_performan_mode_e */ + bool pu_optimize; /* 用于优化PU显示效果，默认为false;true:优化PU显示显示效果,高功耗;false:普通PU模式,低功耗 */ +#endif + bool video_auto_sync; /* Video mode 自动同步开关 */ + uint8_t rx_debug_status; /* rx debug status用于debug表示rx的状态 */ +} hal_dsi_rx_ctrl_handle_t; + +/** +* @brief DCS command execute entry +*/ +typedef struct hal_dcs_execute_entry_t +{ + uint32_t dcs_command; /* DCS command */ + hal_dsi_rx_ctrl_dcs_execute execute_func; /* command 对应处理函数 */ + bool immediately_func; /* 执行机制:true-在中断里立即执行,false-加入DCS队列异步执行 */ +} hal_dcs_execute_entry_t; + +/** +* @brief 存储 DCS packet 结构体 +*/ +typedef struct hal_dcs_packet_t +{ + uint32_t data_type; /* data type */ + uint32_t dcs_command; /* dcs command */ + uint32_t param_length; /* dcs param length */ + uint8_t *packet_param; /* dcs param */ + const hal_dcs_execute_entry_t *dcs_execute_entry; /* dcs packet 处理函数入口*/ +} hal_dcs_packet_t; + +/** +* @brief dcs command filter select +*/ +typedef enum +{ + HAL_RX_DCS_FILTER_0 = 0, + HAL_RX_DCS_FILTER_1 = 1, + HAL_RX_DCS_FILTER_2 = 2, + HAL_RX_DCS_FILTER_3 = 3, + HAL_RX_DCS_FILTER_4 = 4, + HAL_RX_DCS_FILTER_5 = 5, + HAL_RX_DCS_FILTER_6 = 6, + HAL_RX_DCS_FILTER_7 = 7, + HAL_RX_DCS_FILTER_MAX +} hal_rx_dcs_filter_sel_e; + +/** +* @brief pentile source color format +*/ +typedef enum +{ + PENTILE_SRC_FORMAT_RGB = 0x0, + PENTILE_SRC_FORMAT_BGR = 0x1, + PENTILE_SRC_FORMAT_RGBG_BGRG = 0x8, + PENTILE_SRC_FORMAT_GBGR_GRGB = 0x9, + PENTILE_SRC_FORMAT_BGRG_RGBG = 0xA, + PENTILE_SRC_FORMAT_GRGB_GBGR = 0xB, + PENTILE_SRC_FORMAT_RGBG_RGBG = 0xC, + PENTILE_SRC_FORMAT_GBGR_GBGR = 0xD, + PENTILE_SRC_FORMAT_BGRG_BGRG = 0xE, + PENTILE_SRC_FORMAT_GRGB_GRGB = 0xF, + PENTILE_SRC_FORMAT_MAX +} pentile_src_format_e; + +/** +* @brief pential G0 G1 swap mode +*/ +typedef enum +{ + PENTILE_G0G1 = 0, + PENTILE_G1G0 = 1 +} pentile_g_swap_e; + +/** +* @brief pential R B swap mode +*/ +typedef enum +{ + PENTILE_RGBG_BGRG = 0, + PENTILE_GGRB_RBGG = 1, + PENTILE_GGBR_BRGG = 3 +} pentile_rb_swap_e; + +/** +* @brief TE 信号产生模式 +*/ +typedef enum +{ + TE_HW_MODE = 0, /* TE由硬件产生,频率与输出帧率一致 */ + TE_USER_MODE = 1, /* 底层不产生TE, 由hal_dsi_rx_ctrl_gen_a_tear_signal 接口产生 */ + TE_SOFT_60HZ_MODE = 2, /* 底层软件产生同步60Hz TE */ + TE_SOFT_90HZ_MODE = 4, /* 底层软件产生同步90Hz TE */ + TE_SOFT_120HZ_MODE = 5, /* 底层软件产生同步120Hz TE */ + TE_HW_MAX +} te_mode_e; + +/** +* @brief pq_marginal_type select +*/ +typedef enum +{ + PQ_TYPE_0 = 0x0, + PQ_TYPE_1 = 0x1, + PQ_TYPE_2 = 0x3, + PQ_TYPE_3 = 0x2, + PQ_TYPE_4 = 0xA, + PQ_TYPE_5 = 0xE, + PQ_TYPE_6 = 0xC, + PQ_TYPE_7 = 0x1A, + PQ_TYPE_8 = 0x18, + PQ_TYPE_MAX +} hal_rx_pq_marginal_type_e; + +/** +* @brief 设置RX CLK +*/ +typedef enum +{ + RX_CLK_100M = 0, + RX_CLK_150M = 1, + RX_CLK_200M = 2, + RX_CLK_300M = 3, + RX_CLK_MAX +} hal_rx_clk_e; + + +/******************************************************************************* +* 4.Global variable extern declarations +*******************************************************************************/ + +/******************************************************************************* +* 5.Global function prototypes +*******************************************************************************/ + +/** +* @brief 创建dsi rx ctrl handle (释放时需调用hal_dsi_rx_ctrl_release_handle) +* @param none +* @retval dsi rx handle +*/ +hal_dsi_rx_ctrl_handle_t *hal_dsi_rx_ctrl_create_handle(void); + +/** +* @brief 释放dsi rx ctrl handle +* @param rx_ctrl_handle: dsi rx handle +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_release_handle(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle); + +/** +* @brief 设置rx ctrl handle 里的 PPS 参数 +* @param rx_ctrl_handle: dsi rx handle +* @param pps: pps 参数 +* @param pps_size: pps 参数长度 +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_pre_init_pps(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, uint8_t pps[], uint32_t pps_size); + +/** +* @brief 初始化dsi rx 模块 +* @param rx_ctrl_handle: dsi rx handle +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_init(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle); + +/** +* @brief dsi rx 模块去初始化 +* @param rx_ctrl_handle: dsi rx handle +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_deinit(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle); + +/** +* @brief 启动dsi rx +* @param rx_ctrl_handle: dsi rx handle +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_start(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle); + +/** +* @brief 重新配置dsi rx参数并恢复状态 (debug使用, 重新配置rx_ctrl_handle参数后调用该接口重启) +* @param rx_ctrl_handle: dsi rx handle +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_restart(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle); + +/** +* @brief 停止dsi rx +* @param rx_ctrl_handle: dsi rx handle +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_stop(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle); + +/** +* @brief 手动设置RX clk,一般RX CLK 由底层自动计算,用于特殊video mode场景出现FIFO FULL情况调试使用 +* @param rxbr_clk: rx clk, 需要大于hs_lane_rate/8 +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_set_rx_clk(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, hal_rx_clk_e rxbr_clk); + +/** +* @brief 发送 MIPI HOST的读响应 CMD +* @param rx_ctrl_handle: dsi rx handle +* @param data_type: data type +* @param vc: virtual channel +* @param cmd_count: ack command 的长度 +* @param ... : 需要发送的command(数量与cmd_count 配置一致) +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_send_ack_cmd(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, dsi_ack_data_type_e data_type, dsi_virtual_channel_e vc, uint8_t cmd_count, ...); + +/** +* @brief 使用数组方式回复短包,与hal_dsi_rx_ctrl_send_ack_cmd功能一致 +* @param rx_ctrl_handle: dsi rx handle +* @param data_size: 数组长度,固定为4 +* @param data: 回复cmd数据,数据排列有严格规定: +* data[0]:DI(data type) +* data[1]:data 0 +* data[2]:data 1 +* data[3]:内部pkt type,短包固定为0 +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_ack_short_cmd(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, uint8_t data_size, uint8_t data[]); + +/** +* @brief 使用数组方式回复长包,与hal_dsi_rx_ctrl_send_ack_cmd功能一致 +* @param rx_ctrl_handle: dsi rx handle +* @param data_size: 数组长度,为Word Count + header长度 (header固定为4) +* @param data: 回复cmd数据,数据排列有严格规定: +* data[0]:DI(data type) +* data[1]:wc 0 (Word Count 低八位) +* data[2]:wc 1 (Word Count 高八位) +* data[3]:内部pkt type,长包固定为1 +* data[N]:长包数据 +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_ack_long_cmd(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, uint8_t data_size, uint8_t data[]); + +/** +* @brief 异步处理DSC接口,执行cus_dcs_entry_table里对应DCS immediately_func为false的函数 +* @param rx_ctrl_handle: dsi rx handle +* @retval true - 正常处理1个DSC , false - 无DSC 处理 +*/ +bool hal_dsi_rx_ctrl_dsc_async_handler(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle); + +/** +* @brief 使用硬件filter丢弃不需要处理的CMD,避免MCU资源被无效CMD占用 +* @param rx_ctrl_handle: dsi rx handle +* @param filter_number: filter 编号(0-7) +* @param cmd_start: 需要丢弃command code起始位 +* @param cmd_end: 需要丢弃command code终止位 +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_set_hw_cmd_filter(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, + hal_rx_dcs_filter_sel_e filter_number, + uint32_t cmd_start, uint32_t cmd_end); + +/** +* @brief 配置输入输出同步行数,用于调整图像撕裂问题 +* @param rx_ctrl_handle: dsi rx handle +* @param line_num: 同步行号,范围1 ~ input height +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_set_cus_sync_line(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, uint32_t line_num); + +/** +* @brief 使用内置pattern代替mipi输入(用于测试) +* @param rx_ctrl_handle: dsi rx handle +* @param pg_orient: pattern 方向(0:Vertical mode ; 1:Horizontal mode) +* @param enable: 开启/关闭pattern +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_enable_test_pattern(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, uint8_t pg_orient, bool enable); + +/** +* @brief 设置TE信号特征 +* @param rx_ctrl_handle: dsi rx handle +* @param inverse_poly: tear信号极性 +* @param te_width: tear信号宽度(0-1023) +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_set_te_waveform(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, bool inverse_poly, uint32_t te_width); + +/** +* @brief 客制化scld filter配置,用于图像质量调节 +* @param rx_ctrl_handle: dsi rx handle +* @param scld_filter_h: 水平方向filter +* @param scld_filter_v: 垂直方向filter +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_set_cus_scld_filter(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, uint32_t scld_filter_h[32][2], uint32_t scld_filter_v[32][2]); + +/** +* @brief 获取AP 配置 BTA回复数据最大size +* @param rx_ctrl_handle: dsi rx handle +* @retval 返回数据大小 +*/ +uint32_t hal_dsi_rx_ctrl_get_max_ret_size(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle); + +/** +* @brief 获取AP Compression Mode Command配置,默认为0,谨慎使用 +* @param rx_ctrl_handle: dsi rx handle +* @retval AP 配置compressen_en +*/ +bool hal_dsi_rx_ctrl_get_compressen_en(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle); + +/** +* @brief 生成一个TE信号 +* @param rx_ctrl_handle: dsi rx handle +* @retval none +*/ +bool hal_dsi_rx_ctrl_gen_a_tear_signal(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle); + +/** +* @brief 输入分辨率切换接口 +* @param rx_ctrl_handle: dsi rx handle +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_toggle_resolution(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle); + +/** +* @brief 启动高性能模式,通常为debug使用 +* @param rx_ctrl_handle: dsi rx handle +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_hight_performan_mode(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle); + +/** +* @brief 配置TE信号为软件模式 +* @param rx_ctrl_handle: dsi rx handle +* @retval none +*/ +bool hal_dsi_rx_ctrl_set_sw_tear_mode(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle); + +/** +* @brief 配置TE信号为硬件模式 +* @param rx_ctrl_handle: dsi rx handle +* @retval none +*/ +bool hal_dsi_rx_ctrl_set_hw_tear_mode(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle); + +/** +* @brief 配置 pentile格式 +* @param rx_ctrl_handle: dsi rx handle +* @param src_format: pentile format +* @param g_swap: swap G0 G1 +* @param rb_swap: swap R B +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_set_pentile_format(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, pentile_src_format_e src_format, pentile_g_swap_e g_swap, pentile_rb_swap_e rb_swap); + +/** +* @brief 配置 RX escape clk +* @param rx_ctrl_handle: dsi rx handle +* @param esc_clk: escape clk 单位Hz,10000000时回CMD为10Mhz +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_set_cus_esc_clk(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, uint32_t esc_clk); + +/** +* @brief 自动计算并配置硬件filter +* @param rx_ctrl_handle: dsi rx handle +* @param enable: 启动/关闭 硬件filter +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_set_auto_hw_filter(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, bool enable); + +/* +* @brief 配置DCS cmd 透传模式, Tx init 之后生效 +* @param enable/disable +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_set_dcs_direct_mode(bool enable); + +/* +* @brief 输入帧率修改(针对video mode) +* @param rx_ctrl_handle: dsi rx handle +* @param frame_rate：frame rate +*/ +bool hal_dsi_rx_ctrl_toggle_input_frame_rate(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, dsi_video_frame_rate_e frame_rate); + +/** +* @brief 配置TE模式扩展接口 +* @param line_num: 同步行号,范围1 ~ input height +建议从最大开始配置,step为100逐步减小,直到完全不出现撕裂 +* @param te_mode: 产生 te 模式,建议使用HW mode +* @retval none +*/ +bool hal_dsi_rx_ctrl_set_tear_mode_ex(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, uint32_t line_num, te_mode_e te_mode); + +/** +* @brief 输入分辨率切换扩展接口 +* @param rx_ctrl_handle: dsi rx handle +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_toggle_resolution_ex(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle); + +/* +* @brief 注册写命令的回调函数，用于特殊命令序列时写命令的处理，注意无法接收0XFF命令 +* @param rx_ctrl_handle: dsi rx handle +* @param 写命令处理函数 +* @retval none +*/ +void hal_dsi_rx_register_write_cmd_entry(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, hal_dsi_rx_ctrl_dcs_execute execute_func); + + +#if !defined(ISP_568) && !defined(ISP_368) + /* ISP_518/ISP_308 接口 */ + /** + * @brief 客制化 Channel Gain 配置,用于图像质量调节 + * @param rx_ctrl_handle: dsi rx handle + * @param gain_r: channel gain coefficient for R + * @param gain_g: channel gain coefficient for G + * @param gain_b: channel gain coefficient for B + * @retval true/false + */ + bool hal_dsi_rx_ctrl_set_cus_pq_gain(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, int r_gain, int g_gain, int b_gain); + + /** + * @brief 客制化enhance for luma参数配置,用于图像质量调节 + * @param rx_ctrl_handle: dsi rx handle + * @param enhl_str: Enhance Str + * @param enhl_edgeslope: Enhance Edge Slope + * @retval none + */ + bool hal_dsi_rx_ctrl_set_cus_pq_enh_lum(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, uint32_t enhl_str, uint32_t enhl_edgeslope); + + /** + * @brief 客制化false color remove for chroma参数配置,用于图像质量调节 + * @param rx_ctrl_handle: dsi rx handle + * @param desatstr: 饱和度调整参数 范围:0-4095 + * @param desatslope: 饱和度调整斜率 范围:0-4095 + * @retval none + */ + bool hal_dsi_rx_ctrl_set_cus_pq_enh_chr(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, uint32_t desatstr, uint32_t desatslope); + + /** + * @brief 客制化false color remove for chroma参数配置2,用于图像质量调节 + * @param rx_ctrl_handle: dsi rx handle + * @param desatmode: 饱和度调整模式 0-降低饱和度 1-提升饱和度 + * @param fc_final_alpha: 饱和度调整参数 范围:0 - 255 + * @param edge_med_slope: 饱和度调整参数 范围:0 - 4095 + * @retval none + */ + bool hal_dsi_rx_ctrl_set_cus_pq_enh_chr2(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, uint32_t desatmode, uint32_t fc_final_alpha, uint32_t edge_med_slope); + +#else + /* ISP_568/ISP_368 接口 */ + /** + * @brief 裁剪输入video多余部分，用于部分机型比如mipi输入是900x1792,实际有效部分为828x1792,可用于裁剪右边跟下边 + * @param rx_ctrl_handle: dsi rx handle + * @param crop_width: 需要裁剪的列数 + * @param crop_height: 需要裁剪的行数 + * @retval true/false + */ + bool hal_dsi_rx_ctrl_crop_video(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, uint32_t crop_width, uint32_t crop_height); + + /* + * @brief 初始化画点模式,全屏赋值 + * @param rx_ctrl_handle: dsi rx handle + * @param red_data: 像素点R分量 + * @param green_data: 像素点G分量 + * @param blue_data: 像素点B分量 + * @retval none + */ + void hal_dsi_rx_ctrl_draw_mode_init(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, uint8_t red_data, uint8_t green_data, uint8_t blue_data); + + /* + * @brief 配置像素颜色 + * @param rx_ctrl_handle: dsi rx handle + * @param x: 像素点的x 坐标 + * @param y: 像素点的y 坐标 + * @param red_data: 像素点R分量 + * @param green_data: 像素点G分量 + * @param blue_data: 像素点B分量 + * @retval none + */ + void hal_dsi_rx_ctrl_set_pixel_data(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, int x, int y, uint8_t red_data, uint8_t green_data, uint8_t blue_data); + + /* + * @brief 填充颜色矩形 + * @param rx_ctrl_handle: dsi rx handle + * @param x1,y1: 矩形起始点 + * @param x2,y2: 矩形终点 + * @param red_data: 像素点R分量 + * @param green_data: 像素点G分量 + * @param blue_data: 像素点B分量 + * @retval none + */ + void hal_dsi_rx_ctrl_set_rect_pixel_data(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, int x1, int x2, int y1, int y2, uint8_t red_data, uint8_t green_data, uint8_t blue_data); +#endif + +#endif //__HAL_DSI_RX_CTRL_H__ diff --git a/src/sdk/include/hal_dsi_tx_ctrl.h b/src/sdk/include/hal_dsi_tx_ctrl.h new file mode 100644 index 0000000..652b498 --- /dev/null +++ b/src/sdk/include/hal_dsi_tx_ctrl.h @@ -0,0 +1,284 @@ +/******************************************************************************* +* +* +* File: hal_dsi_tx_ctrl.h +* Description: hal mipi dsi tx 头文件 +* Version: V0.1 +* Date: 2021-04-23 +* Author: wuc + *******************************************************************************/ +#ifndef __HAL_DSI_TX_CTRL_H__ +#define __HAL_DSI_TX_CTRL_H__ + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "tau_dsi_datatype.h" +#include "tau_device_datatype.h" +#include "tau_common.h" +#include "hal_gpio.h" +#include "stdint.h" +#include "stdbool.h" + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ + +/** +* @brief 客制化MIPI TX参数结构体 +*/ +typedef struct +{ + bool used; /* handle使用标志位 */ + uint8_t lane_num; + dsi_virtual_channel_e channel_id; + dsi_video_mode_type_e vid_mode; + dsi_tx_cmd_tx_type_e cmd_tx_type; /* 初始化模式传输命令方式，0:HS; 1:LP */ + uint8_t pclk_offset; /* 增加lane byte clk以增大HFP，适配LONG H的TP */ + uint32_t dpi_vsa; + uint32_t dpi_vbp; + uint32_t dpi_vfp; + uint32_t dpi_hsa; + uint32_t dpi_hbp; + uint32_t dpi_hfp; + dsi_base_trans_info_t base_info; /* mipi video 转换基本信息 */ + uint32_t tx_line_delay; /* tx 发送至屏端显示的延迟行数,由屏端决定,用于分辨率切换时确认切换时间点 */ + float tx_frame_rate; /* 默认60Hz输出,不建议配置为其他,仅作为debug使用 */ + bool tx_clkawayshs; /* 默认为false, 配置为true时video mode消隐行期间clk不进入LP */ + uint8_t blank_rows; /* 默认为0, 针对特殊屏使用，大于0时生效表示向下补黑blank_rows行 */ + uint8_t blank_columns; /* 默认为0, 针对特殊屏使用，大于0时生效表示向右补黑blank_columns列 */ + bool lp_exit_lpdt; /* 每一条LP CMD都退出LPDT */ + bool tx_cmd_mode_sync; /* TX command mode 输出同步 */ +} hal_dsi_tx_ctrl_handle_t; + +/** +* @brief crop parameters +*/ +typedef struct +{ + uint16_t crop_top; + uint16_t crop_bottom; + uint16_t crop_left; + uint16_t crop_right; +} hal_dsi_tx_crop_t; + +/** +* @brief MIPI TX初始化 +* @param tx_ctrl_handle: MIPI TX实例 +* @retval 成功:0 失败:-1 +*/ +bool hal_dsi_tx_ctrl_init(hal_dsi_tx_ctrl_handle_t *tx_ctrl_handle); + +/** +* @brief MIPI TX反初始化 +* @param tx_ctrl_handle: MIPI TX实例 +* @retval 成功:0 失败:-1 +*/ +bool hal_dsi_tx_ctrl_deinit(hal_dsi_tx_ctrl_handle_t *tx_ctrl_handle); + +/** +* @brief MIPI TX创建实例 +* @param 无 +* @retval tx_ctrl_handle: MIPI TX实例 +*/ +hal_dsi_tx_ctrl_handle_t *hal_dsi_tx_ctrl_create_handle(void); + +/** +* @brief MIPI TX释放实例 +* @param tx_ctrl_handle: MIPI TX实例 +* @retval 成功:0 失败:-1 +*/ +bool hal_dsi_tx_ctrl_release_handle(hal_dsi_tx_ctrl_handle_t *tx_ctrl_handle); + +/** +* @brief MIPI TX开始运行 +* @param tx_ctrl_handle: MIPI TX实例 +* @retval 成功:0 失败:-1 +*/ +bool hal_dsi_tx_ctrl_start(hal_dsi_tx_ctrl_handle_t *tx_ctrl_handle); + +/** +* @brief MIPI TX停止运行 +* @param tx_ctrl_handle: MIPI TX实例 +* @retval 成功:0 失败:-1 +*/ +bool hal_dsi_tx_ctrl_stop(hal_dsi_tx_ctrl_handle_t *tx_ctrl_handle); + +/** +* @brief 进入初始化panel +* @param 无 +* @retval 无 +*/ +void hal_dsi_tx_ctrl_enter_init_panel_mode(void); + +/** +* @brief 退出初始化panel +* @param 无 +* @retval 无 +*/ +void hal_dsi_tx_ctrl_exit_init_panel_mode(void); + +/** +* @brief MIPI TX接收命令 +* @param data_type: 数据类型，参考枚举类型dsi_data_type_e +* @param vc: 虚拟通道编号，参考枚举类型dsi_virtual_channel_e +* @param cmd: DCS指令 +* @param size: 读取数据长度 +* @param data: 数据存放地址 +* @retval 无 +*/ +void hal_dsi_tx_ctrl_read_cmd(uint8_t data_type, uint8_t vc, uint8_t cmd, uint8_t size, uint8_t *data); + +/** +* @brief MIPI TX发送命令 +* @param data_type: 数据类型，参考枚举类型dsi_data_type_e +* @param vc: 虚拟通道编号，参考枚举类型dsi_virtual_channel_e +* @param cmd_count: 可变参数个数 +* @param ...: 可变参数 +* @retval 无 +*/ +void hal_dsi_tx_ctrl_write_cmd(uint8_t data_type, uint8_t vc, uint8_t cmd_count, ...); + +/** +* @brief MIPI TX发送命令 +* @param data_type: 数据类型，参考枚举类型dsi_data_type_e +* @param vc: 虚拟通道编号，参考枚举类型dsi_virtual_channel_e +* @param size: data个数 +* @param data: data数组 +* @retval 无 +*/ +void hal_dsi_tx_ctrl_write_array_cmd(uint8_t data_type, uint8_t vc, uint8_t size, const uint8_t *data); + +/** +* @brief 设置TX溢出时钟分频系统 +* @param esc_div: TX溢出时钟分频系数 +* @retval 无 +*/ +void hal_dsi_tx_ctrl_set_escape_clock_div(uint8_t esc_div); + +/** +* @brief 屏端复位脚操作 +* @param state: Reset脚拉高、拉低 +* @retval 无 +*/ +void hal_dsi_tx_ctrl_panel_reset_pin(gpio_level_e state); + +/** +* @brief 设置部分显示的区域 +* @param st_line: 起始行 +* @param st_col: 起始列 +* @param end_line: 结束行 +* @param end_col: 结束列 +* @retval 无 +*/ +void hal_dsi_tx_ctrl_set_partial_disp_area(uint32_t st_line, uint32_t st_col, uint32_t end_line, uint32_t end_col); + +/** +* @brief 部分显示功能开关 +* @param pd_en: 开关部分显示功能 +* @retval 无 +*/ +void hal_dsi_tx_ctrl_set_partial_disp(function_state_e pd_en); + +/** +* @brief 设置复写颜色 +* @param R: RGB的R分量 +* @param G: RGB的G分量 +* @param B: RGB的B分量 +* @retval 无 +*/ +void hal_dsi_tx_ctrl_set_overwrite_rgb(uint8_t R, uint8_t G, uint8_t B); + +/** +* @brief 全屏复写开关 +* @param ow_en: 开关全屏复写功能 +* @retval 无 +*/ +void hal_dsi_tx_ctrl_set_overwrite(function_state_e ow_en); + +/** +* @brief 设置RGB或BGR +* @param endianness: 选择RGB或BGR显示 +* @retval 无 +*/ +void hal_dsi_tx_ctrl_set_endianness(dpi_endianness_type_e endianness); + +/** +* @brief 设置CCM参数 +* @param coef: 客制化参数，参考结构体ccm_coef_t +* @retval 无 +*/ +void hal_dsi_tx_ctrl_set_ccm(ccm_coef_t coef); + +/** +* @brief 控制TX VPG的输出 +* @param vpg_en: 使能VPG +* @param style: VPG的样式 +* @retval 无 +*/ +void hal_dsi_tx_ctrl_set_vpg(function_state_e vpg_en, dsi_tx_vpg_style_e style); + +/** +* @brief 在video mode下使能LP CMD +* @param lp_en:使能LP CMD +* @retval 无 +*/ +void hal_dsi_tx_ctrl_set_lp_cmd(function_state_e lp_en); + +/** +* @brief 裁剪tx输出的图像 +* @param tx_ctrl_handle: dsi tx handle +* @param crop: 裁剪参数 +* @retval 无 +*/ +void hal_dsi_tx_crop_pic(hal_dsi_tx_ctrl_handle_t *tx_ctrl_handle, hal_dsi_tx_crop_t *crop); + +#if !defined(ISP_568) && !defined(ISP_368) + /* ISP_518/ISP_308 接口 */ + /** + * @brief 设置水平翻转 + * @param flip_en: 开关水平翻转功能 + * @retval 无 + */ + void hal_dsi_tx_ctrl_set_horizon_flip(function_state_e flip_en); + + /** + * @brief 设置tx 画质filter + * @param tx_ctrl_handle: dsi tx handle + * @param filter_h: 水平方向filter + * @param filter_v: 垂直方向filter + * @retval true/false + */ + bool hal_dsi_tx_ctrl_set_cus_pq_filter(hal_dsi_tx_ctrl_handle_t *tx_ctrl_handle, uint32_t filter_h[32][2], uint32_t filter_v[32][2]); + + /** + * @brief 设置tx边缘参数,只在 + * @param tx_ctrl_handle: dsi tx handle + * @param threshold: 边缘增强强度 + * @param slope: 边缘增强范围 + * @retval true/false + */ + bool hal_dsi_tx_ctrl_set_cus_pq_edge(hal_dsi_tx_ctrl_handle_t *tx_ctrl_handle, uint8_t threshold, uint16_t slope); +#else + /* ISP_568/ISP_368 接口 */ + /** + * @brief 设置tx 画质filter + * @param tx_ctrl_handle: dsi tx handle + * @param filter: tx filter + * @retval true/false + */ + bool hal_dsi_tx_ctrl_set_cus_pq_filter(hal_dsi_tx_ctrl_handle_t *tx_ctrl_handle, uint32_t filter[32]); + + /** + * @brief TX command mode 同步接口,在收到屏端TE信号后调用，防止撕裂 + * @param tx_ctrl_handle: dsi tx handle + * @retval true/false + */ + bool hal_dsi_tx_ctrl_cmd_mode_rcv_te(hal_dsi_tx_ctrl_handle_t *tx_ctrl_handle); +#endif + +#endif //__HAL_DSI_TX_CTRL_H__ diff --git a/src/sdk/include/hal_flash.h b/src/sdk/include/hal_flash.h new file mode 100644 index 0000000..93fb7d0 --- /dev/null +++ b/src/sdk/include/hal_flash.h @@ -0,0 +1,109 @@ +/******************************************************************************* +* +* +* File: hal_system.h +* Description hal 通用系统接口头文件 +* Version V0.1 +* Date 2023-03-03 +* Author kevin + *******************************************************************************/ +#ifndef __HAL_FLASH_H__ +#define __HAL_FLASH_H__ +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "tau_common.h" + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ + +/******************************************************************************* +* 4.Global variable extern declarations +*******************************************************************************/ + +/******************************************************************************* +* 5.Global function prototypes +*******************************************************************************/ + +/** +* @brief 初始化flash 模块,使用完flash模块后需要deinit用于节省功耗 +* @param +* @retval bool 无 +*/ +void hal_flash_init(void); + +/** +* @brief 关闭flash 模块 +* @param +* @retval bool 无 +*/ +void hal_flash_deinit(void); + + +/** +* @brief flash ctl读取flash-uid操作 +* @param UID[16] 存放UID的数组,UID最大长度为16 +* @param UID 数组长度(最大16) +* @retval +*/ +void hal_flash_read_uid(uint8_t *UID, uint8_t size); + +/** +* @brief +* @param flash_block:0-13，选择对应的block进行擦除,启动对某个block写之前需要先擦除对应64K数据 +* @retval +*/ +bool hal_flash_erase(uint8_t flash_block); + + +/** +* @brief 用户字节数组形式从flash读取数据,按页读取，每页1024字节 +* @param *usr_cfg_t_addr(数组首地址), + usr_cfg_t_size(数组大小可以超过1024,超过1024时为跨页连续读) + flash_block:选择操作的block(0-13,其中0-3为TDDI Flash区域) + flash_page :(一个block 页0~63) + page_offset_addr:block = 64K +* @retval bool 无 +*/ +bool hal_flash_normal_read(uint8_t *usr_cfg_t_addr, + uint16_t usr_cfg_t_size, + uint8_t flash_block, + uint16_t flash_page, + uint16_t page_offset_addr); + +/** +* @brief 用户字节数组形式存入flash(次数有限，不可频繁写入),按页写入，每页1024字节 + 注意:写入某个block前确认使用hal_flash_erase进行擦除整个blocK,才能对该block的0-63page进行写入 +* @param *usr_cfg_t_addr(数组首地址), + usr_cfg_t_size(数组大小可以超过1024,超过1024时为跨页连续写) + flash_block:选择操作的block(0-13,其中0-3为TDDI Flash区域) + flash_page （一个block 0~63页） + page_offset_addr:0-1023 byte +* @retval bool 校验size是否超出 +*/ +bool hal_flash_normal_write(uint8_t *usr_cfg_t_addr, + uint16_t usr_cfg_t_size, + uint8_t flash_block, + uint16_t flash_page, + uint16_t page_offset_addr); + +/** +* @brief 发送0xAB指令控制flash退出deep sleep power mode +* @param none +* @retval null +*/ +void hal_flash_release_power_down(void); + +/** +* @brief 发送0xB9指令控制flash进入deep sleep power mode +* @param none +* @retval null +*/ +void hal_flash_power_down(void); + +#endif //__HAL_FLASH_H__ diff --git a/src/sdk/include/hal_gpio.h b/src/sdk/include/hal_gpio.h new file mode 100644 index 0000000..6d69a97 --- /dev/null +++ b/src/sdk/include/hal_gpio.h @@ -0,0 +1,537 @@ +/******************************************************************************* +* +* +* File: hal_gpio.h +* Description： gpio HAL层头文件 +* Version： V0.1 +* Date： 2021-03-17 +* Author： wuc + *******************************************************************************/ +#ifndef __HAL_GPIO_H__ +#define __HAL_GPIO_H__ + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "tau_device_datatype.h" +#include "tau_common.h" + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ +/** +* @brief GPIO pin +*/ +typedef enum +{ + /*以GPIO命名PIN*/ + IO_PAD_GPIO0 = 0, + IO_PAD_GPIO1, + IO_PAD_GPIO2, + IO_PAD_GPIO3, + IO_PAD_GPIO4, + IO_PAD_GPIO5, + IO_PAD_GPIO6, + IO_PAD_RESV, + IO_PAD_GPIO8, + IO_PAD_GPIO9, + IO_PAD_GPIO10, + IO_PAD_GPIO11, + IO_PAD_GPIO12, + IO_PAD_GPIO13, + IO_PAD_GPIO14, + IO_PAD_RESV1, + IO_PAD_RESV2, + IO_PAD_GPIO17, + IO_PAD_GPIO18, + IO_PAD_GPIO19, + IO_PAD_GPIO20, + IO_PAD_GPIO21, + + /*以实际PAD NAME命名PIN*/ + IO_PAD_AP_SPIS_MISO = IO_PAD_GPIO0, + IO_PAD_AP_SPIS_MOSI = IO_PAD_GPIO1, + IO_PAD_AP_INT = IO_PAD_GPIO2, + IO_PAD_AP_TE = IO_PAD_GPIO3, + IO_PAD_AP_SWIRE = IO_PAD_GPIO4, + IO_PAD_TD_SPIM_MISO = IO_PAD_GPIO5, + IO_PAD_TD_SPIM_MOSI = IO_PAD_GPIO6, + IO_PAD_TD_RSTN = IO_PAD_RESV, + IO_PAD_TD_TPRSTN = IO_PAD_GPIO8, + IO_PAD_TD_INT = IO_PAD_GPIO9, + IO_PAD_TD_LEDPWM = IO_PAD_GPIO10, + IO_PAD_TD_FC_CLK = IO_PAD_GPIO11, + IO_PAD_TD_FC_CSN = IO_PAD_GPIO12, + IO_PAD_TD_FC_MISO = IO_PAD_GPIO13, + IO_PAD_TD_FC_MOSI = IO_PAD_GPIO14, + IO_PAD_UART_RX = IO_PAD_GPIO17, + IO_PAD_UART_TX = IO_PAD_GPIO18, + IO_PAD_PWMEN = IO_PAD_GPIO19, + IO_PAD_ADCIN = IO_PAD_GPIO20, + IO_PAD_AP_TPRSTN = IO_PAD_GPIO21, + + IO_PAD_AP_SPIS_CLK, + IO_PAD_AP_SPIS_CSN, + IO_PAD_TD_SPIM_CLK, + IO_PAD_TD_SPIM_CSN, + IO_PAD_SFC_CLK, + IO_PAD_SFC_CSN, + IO_PAD_SFC_IO0, + IO_PAD_SFC_IO1, + + IO_PAD_MAX, + + /*以实际BALL编号命名PIN*/ + IO_PIN_A1 = IO_PAD_TD_TPRSTN, + IO_PIN_A2 = IO_PAD_TD_FC_CSN, + IO_PIN_A3 = IO_PAD_TD_SPIM_MISO, + IO_PIN_A4 = IO_PAD_TD_SPIM_CLK, + IO_PIN_A5 = IO_PAD_PWMEN, + IO_PIN_A6 = IO_PAD_ADCIN, + IO_PIN_A7 = IO_PAD_AP_INT, + IO_PIN_A8 = IO_PAD_AP_SPIS_MOSI, + IO_PIN_B1 = IO_PAD_TD_FC_CLK, + IO_PIN_B2 = IO_PAD_TD_FC_MISO, + IO_PIN_B3 = IO_PAD_TD_SPIM_MOSI, + IO_PIN_B4 = IO_PAD_TD_SPIM_CSN, + IO_PIN_B5 = IO_PAD_AP_SWIRE, + IO_PIN_B7 = IO_PAD_AP_SPIS_MISO, + IO_PIN_B8 = IO_PAD_AP_SPIS_CSN, + IO_PIN_C1 = IO_PAD_TD_FC_MOSI, + IO_PIN_C2 = IO_PAD_TD_LEDPWM, + IO_PIN_C4 = IO_PAD_UART_TX, + IO_PIN_C5 = IO_PAD_UART_RX, + IO_PIN_C6 = IO_PAD_AP_TE, + IO_PIN_D1 = IO_PAD_TD_RSTN, + IO_PIN_D2 = IO_PAD_TD_INT, + IO_PIN_D7 = IO_PAD_AP_TPRSTN, + IO_PIN_D8 = IO_PAD_AP_SPIS_CLK, +} io_pad_e; + +/** +* @brief PAD_AP_SPIS_CLK可选的mode +*/ +typedef enum +{ + IO_MODE_JTAG_TCK = 0, + IO_MODE_SPIS_SCLK = 1, + IO_MODE_I2C0_SCL = 3, +} pad_ap_spis_clk_mode_e; + +/** +* @brief PAD_AP_SPIS_CSN可选的mode +*/ +typedef enum +{ + IO_MODE_JTAG_TRSTN = 0, + IO_MODE_SPIS_CSN = 1, + IO_MODE_I2C0_SDA = 3, +} pad_ap_spis_csn_mode_e; + +/** +* @brief PAD_AP_SPIS_MISO可选的mode +*/ +typedef enum +{ + IO_MODE_JTAG_TDO = 0, + IO_MODE_SPIS_MISO = 1, + IO_MODE_GPIO0 = 2, + IO_MODE_UART_RX_AP = 3, + IO_MODE_SPIM_MISO_AP = 4, +} pad_ap_spis_miso_mode_e; + +/** +* @brief PAD_AP_SPIS_MOSI可选的mode +*/ +typedef enum +{ + IO_MODE_JTAG_TMS = 0, + IO_MODE_SPIS_MOSI = 1, + IO_MODE_GPIO1 = 2, + IO_MODE_UART_TX_AP = 3, + IO_MODE_SPIM_MOSI_AP = 4, +} pad_ap_spis_mosi_mode_e; + +/** +* @brief PAD_AP_TPRSTN可选的mode +*/ +typedef enum +{ + IO_MODE_JTAG_TDI = 0, + IO_MODE_GPIO21 = 2, +} pad_ap_tprstn_mode_e; + +/** +* @brief PAD_AP_INT可选的mode +*/ +typedef enum +{ + IO_MODE_GPIO2 = 2, +} pad_ap_int_mode_e; + +/** +* @brief PAD_AP_TE可选的mode +*/ +typedef enum +{ + IO_MODE_TEAR = 0, + IO_MODE_GPIO3 = 2, +} pad_ap_te_mode_e; + +/** +* @brief PAD_AP_SWIRE可选的mode +*/ +typedef enum +{ + IO_MODE_SWIRE = 0, + IO_MODE_PWMO = 1, + IO_MODE_GPIO4 = 2, +} pad_ap_swire_mode_e; + +/** +* @brief PAD_TD_SPIM_CLK可选的mode +*/ +typedef enum +{ + IO_MODE_SPIM_SCLK = 0, + IO_MODE_I2C1_SCL = 1, +} pad_td_spim_clk_mode_e; + +/** +* @brief PAD_TD_SPIM_CSN可选的mode +*/ +typedef enum +{ + IO_MODE_SPIM_CSN = 0, + IO_MODE_I2C1_SDA = 1, +} pad_td_spim_csn_mode_e; + +/** +* @brief PAD_TD_SPIM_MISO可选的mode +*/ +typedef enum +{ + IO_MODE_SPIM_MISO = 0, +#if defined(ISP_568) || defined(ISP_368) + IO_MODE_PWMO1 = 1, +#endif + IO_MODE_GPIO5 = 2, +} pad_td_spim_miso_mode_e; + +/** +* @brief PAD_TD_SPIM_MOSI可选的mode +*/ +typedef enum +{ + IO_MODE_SPIM_MOSI = 0, + IO_MODE_GPIO6 = 2, +} pad_td_spim_mosi_mode_e; + +/** +* @brief PAD_TD_TPRSTN可选的mode +*/ +typedef enum +{ + IO_MODE_GPIO8 = 2, +} pad_td_tprstn_mode_e; + +/** +* @brief PAD_TD_INT可选的mode +*/ +typedef enum +{ + IO_MODE_GPIO9_FUNC = 0, + IO_MODE_GPIO9 = 2, +} pad_td_int_mode_e; + +/** +* @brief PAD_TD_LEDPWM可选的mode +*/ +typedef enum +{ + IO_MODE_PWMI = 0, +#if defined(ISP_568) || defined(ISP_368) + IO_MODE_PWMO2 = 1, +#endif + IO_MODE_GPIO10 = 2, +} pad_td_ledpwm_mode_e; + +/** +* @brief PAD_TD_FC_CLK可选的mode +*/ +typedef enum +{ + IO_MODE_TSPIS_CLK = 0, + IO_MODE_GPIO11 = 2, +} pad_td_fc_clk_mode_e; + +/** +* @brief PAD_TD_FC_CSN可选的mode +*/ +typedef enum +{ + IO_MODE_TSPIS_CSN = 0, + IO_MODE_GPIO12 = 2, +} pad_td_fc_csn_mode_e; + +/** +* @brief PAD_TD_FC_MISO可选的mode +*/ +typedef enum +{ + IO_MODE_TSPIS_MISO = 0, + IO_MODE_GPIO13 = 2, +} pad_td_fc_miso_mode_e; + +/** +* @brief PAD_TD_FC_MOSI可选的mode +*/ +typedef enum +{ + IO_MODE_TSPIS_MOSI = 0, + IO_MODE_GPIO14 = 2, +} pad_td_fc_mosi_mode_e; + +/** +* @brief PAD_UART_RX可选的mode +*/ +typedef enum +{ + IO_MODE_UART_RX = 0, + IO_MODE_GPIO17 = 2, +} pad_uart_rx_mode_e; + +/** +* @brief PAD_UART_TX可选的mode +*/ +typedef enum +{ + IO_MODE_UART_TX = 0, + IO_MODE_GPIO18 = 2, +} pad_uart_tx_mode_e; + +/** +* @brief PAD_PWMEN可选的mode +*/ +typedef enum +{ + IO_MODE_GPIO19 = 2, +} pad_pwmen_mode_e; + +/** +* @brief PAD_ADCIN可选的mode +*/ +typedef enum +{ + IO_MODE_GPIO20 = 2, +} pad_adcin_mode_e; + +/** +* @brief PAD_SFC_CLK可选的mode +*/ +typedef enum +{ + IO_MODE_INTER_FLS_CLK = 0, + IO_MODE_EXT_FLS_CLK = 1, +} pad_sfc_clk_mode_e; + +/** +* @brief PAD_SFC_CSN可选的mode +*/ +typedef enum +{ + IO_MODE_INTER_FLS_CSN = 0, + IO_MODE_EXT_FLS_CSN = 1, +} pad_sfc_csn_mode_e; + +/** +* @brief PAD_SFC_IO0可选的mode +*/ +typedef enum +{ + IO_MODE_INTER_FLS_IO0 = 0, + IO_MODE_EXT_FLS_MISO = 1, +} pad_sfc_io0_mode_e; + +/** +* @brief PAD_SFC_IO1可选的mode +*/ +typedef enum +{ + IO_MODE_INTER_FLS_IO1 = 0, + IO_MODE_EXT_FLS_MOSI = 1, +} pad_sfc_io1_mode_e; + +/** +* @brief PAD电压转换速率 +*/ +typedef enum +{ + IO_SLEW_RATE_SLOW = 0, + IO_SLEW_RATE_FAST = 1, +} pad_slew_rate_e; + +/******************************************************************************* +* IOE +*******************************************************************************/ +/** +* @brief GPIO io方向 +*/ +typedef enum +{ + IO_IOE_INPUT = 0, + IO_IOE_OUTPUT +} gpio_ioe_direct_e; + +/** +* @brief GPIO level +*/ +typedef enum +{ + IO_LVL_LOW = 0, + IO_LVL_HIGH +} gpio_level_e; + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ + +/******************************************************************************* +* 4.Global variable extern declarations +*******************************************************************************/ + +/******************************************************************************* +* 5.Global function prototypes +*******************************************************************************/ +/** +* @brief 配置指定PAD为GPIO mode，方向为input，指定中断触发方式 +* @param pad：GPIO序号，参考枚举类型gpio_pad_e +* @param trig：4种中断触发方式，参考枚举类型sys_cfg_trigger_e +* @retval 无 +*/ +void hal_gpio_init_eint(io_pad_e pad, sys_cfg_trigger_e trig); + +/** +* @brief 注册GPIO中断回调函数 +* @param pad：GPIO序号，参考枚举类型gpio_pad_e +* @param cb_func：回调函数地址 +* @param data：回调函数参数地址 +* @retval 无 +*/ +void hal_gpio_reg_eint_cb(io_pad_e pad, fcb_type cb_func); + +/** +* @brief 开关GPIO中断 +* @param pad：GPIO序号，参考枚举类型gpio_pad_e +* @param state：开关控制 +* @retval 无 +*/ +void hal_gpio_ctrl_eint(io_pad_e pad, function_state_e state); + +/** +* @brief 获取GPIO中断类型 +* @param pad：GPIO序号，参考枚举类型gpio_pad_e +* @retval 无 +*/ +gpio_int_e hal_gpio_get_int_type(io_pad_e pad); + +/** +* @brief 配置指定PAD为GPIO mode，方向为output，指定初始电平 +* @param pad：GPIO序号，参考枚举类型gpio_pad_e +* @param lvl：初始电平，参考枚举类型gpio_level_e +* @retval 无 +*/ +void hal_gpio_init_output(io_pad_e pad, gpio_level_e lvl); + +/** +* @brief 封装设置输出接口 +* @param pad：GPIO序号，参考枚举类型gpio_pad_e +* @param lvl：初始电平，参考枚举类型gpio_level_e +* @retval 无 +*/ +void hal_gpio_set_output_data(io_pad_e pad, gpio_level_e lvl); + +/** +* @brief 封装设置输出接口扩展，支持同时通知两个IO输出电平 +* @param pad1：GPIO序号，参考枚举类型gpio_pad_e +* @param pad1_lvl：配置电平，参考枚举类型gpio_level_e +* @param pad2：GPIO序号，参考枚举类型gpio_pad_e +* @param pad2_lvl：配置电平，参考枚举类型gpio_level_e +* @retval 无 +*/ +void hal_gpio_set_output_data_ex(io_pad_e pad1, gpio_level_e pad1_lvl, io_pad_e pad2, gpio_level_e pad2_lvl); + +/** +* @brief 配置指定PAD为GPIO mode，方向为input +* @param pad：GPIO序号，参考枚举类型gpio_pad_e +* @retval 无 +*/ +void hal_gpio_init_input(io_pad_e pad); + +/** +* @brief 读取输入电平 +* @param pad：GPIO序号，参考枚举类型gpio_pad_e +* @retval 无 +*/ +gpio_level_e hal_gpio_get_input_data(io_pad_e pad); + +/** +* @brief 设置io mode +* @param pad：GPIO序号，参考枚举类型gpio_pad_e +* @param mode：工作模式，参考各PAD对应的mode枚举类型 +* @retval 无 +*/ +void hal_gpio_set_mode(io_pad_e pad, uint8_t mode); + +/** +* @brief 获取指定PAD的默认上拉、下拉状态 +* @param pad：GPIO序号，参考枚举类型gpio_pad_e +* @param up_enable：默认上拉状态 +* @param down_enable：默认下拉状态 +* @retval 无 +*/ +void hal_gpio_get_pull_state(io_pad_e pad, function_state_e *up_enable, function_state_e *down_enable); + +/** +* @brief 配置指定PAD的默认上拉、下拉状态 +* @param pad：GPIO序号，参考枚举类型gpio_pad_e +* @param up_enable：默认上拉状态 +* @param down_enable：默认下拉状态 +* @retval 无 +*/ +void hal_gpio_set_pull_state(io_pad_e pad, function_state_e up_enable, function_state_e down_enable); + +/** +* @brief 配置指定PAD是否为施密特触发 +* @param pad：GPIO序号，参考枚举类型gpio_pad_e +* @param st_enable：1为施密特触发，0为正常触发 +* @retval 无 +*/ +void hal_gpio_set_schmitt_trigger(io_pad_e pad, function_state_e st_enable); + +/** +* @brief 配置指定PAD的驱动能力 +* @param pad：GPIO序号，参考枚举类型gpio_pad_e +* @param strength：驱动强度，取值为0~3 +* @retval 无 +*/ +void hal_gpio_set_driving_strength(io_pad_e pad, uint8_t strength); + +/** +* @brief 配置指定PAD的电压转换速率 +* @param pad：GPIO序号，参考枚举类型gpio_pad_e +* @param rate：驱动强度，取值为0~3 +* @retval 无 +*/ +void hal_gpio_set_slew_rate(io_pad_e pad, pad_slew_rate_e rate); + +/** +* @brief 配置AP_RSTN引脚中断 +* @param enable: 中断开关 +* @param cb_func：回调函数 +* @param trig：触发模式 +* @retval 无 +*/ +void hal_gpio_set_ap_reset_int(bool enable, fcb_type cb_func, sys_cfg_trigger_e trig); + +#endif /* __HAL_GPIO_H__ */ diff --git a/src/sdk/include/hal_i2c_master.h b/src/sdk/include/hal_i2c_master.h new file mode 100644 index 0000000..94db44b --- /dev/null +++ b/src/sdk/include/hal_i2c_master.h @@ -0,0 +1,80 @@ +/******************************************************************************* +* +* +* File: hal_i2c_master.h +* Description i2c hal file +* Version V0.1 +* Date 2021-10-14 +* Author zhanghz +*******************************************************************************/ + +#ifndef __HAL_I2C_MASTER_H__ +#define __HAL_I2C_MASTER_H__ + +#include "tau_device_datatype.h" +#include "tau_common.h" +#include "string.h" + +/************************************************************************** +* @name : hal_i2c_m_dma_init +* @brief : i2c master dma 初始化 +* @param[in] : slave_addr：目标从机地址 +* @param[in] : addr_bits：目标从机地址位数 +* @param[in] : i2c_speed_hz: 通信速率 +* @return : +* @retval : +**************************************************************************/ +void hal_i2c_m_dma_init(uint8_t slave_addr, uint8_t addr_bits, uint32_t i2c_speed_hz); + +/************************************************************************** +* @name : hal_i2c_m_dma_write +* @brief : i2c master dma 发送数据 +* @param[in] : txBuffer：发送数据buffer +* @param[in] : data_size：发送数据个数 +* @return : STATUS_SUCCESS：数据已排入 DMA 通道，但不一定全部发送 +* @return : 其它：发送出错，需要重新调用函数发送 +* @retval : +**************************************************************************/ +status_t hal_i2c_m_dma_write(const uint8_t *txBuffer, size_t data_size); + +/************************************************************************** +* @name : hal_i2c_m_dma_read +* @brief : i2c master dma 接收数据 +* @param[in] : reg_address：先发送寄存器地址给从机 +* @param[in] : reg_size：地址字节数 +* @param[in] : rxBuffer：接收数据buffer +* @param[in] : data_size：接收数据长度 +* @return : STATUS_SUCCESS：寄存器地址发送成功，并已配置DMA接收通道，但不一定完成接收 +* @return : 其它：接收出错，需要重新调用函数接收 +* @retval : +**************************************************************************/ +status_t hal_i2c_m_dma_read(uint32_t reg_address, size_t reg_size, uint8_t *rxBuffer, size_t data_size); + +/************************************************************************** +* @name : hal_i2c_m_transfer_complate +* @brief : 获取 i2c master 发送状态 +* @param[in] : +* @return : true：数据发送完成 +* @return : false：数据还在发送 +* @retval : +**************************************************************************/ +bool hal_i2c_m_transfer_complate(void); + +/************************************************************************** +* @name : hal_i2c_m_set_high_impedance +* @brief : 将 I2C 主机的IO口设置为高阻态 +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +void hal_i2c_m_set_high_impedance(void); +/************************************************************************** +* @name : hal_i2c_m_deinit +* @brief : i2c主机 IP去初始化（关掉使能、外设时钟） +* @param[in] : +* @return : +* @retval : +***************************************************************************/ +void hal_i2c_m_deinit(void); +#endif /* __HAL_I2C_MASTER_H__*/ + diff --git a/src/sdk/include/hal_i2c_slave.h b/src/sdk/include/hal_i2c_slave.h new file mode 100644 index 0000000..6019ae0 --- /dev/null +++ b/src/sdk/include/hal_i2c_slave.h @@ -0,0 +1,179 @@ +/******************************************************************************* +* +* +* File: hal_i2c_slave.h +* Description i2c hal file +* Version V0.1 +* Date 2021-10-14 +* Author zhanghz +*******************************************************************************/ + +#ifndef __HAL_I2C_SLAVE_H__ +#define __HAL_I2C_SLAVE_H__ + +#include "tau_device_datatype.h" +#include "tau_common.h" +#include "string.h" + +typedef enum +{ + I2C_S_INT_READ = 0, //发生 读请求 中断 + I2C_S_INT_RX, //发生 接收 中断 + I2C_S_INT_STOP //发生 stop 中断 +} e_i2c_s_int_status; + +#if defined(ISP_568) || defined(ISP_368) +typedef enum +{ + I2C_S_0 = 0, + I2C_S_1, + I2C_S_MAX +} i2c_s_index_e; +#endif + +typedef void (*hal_i2c_s_callback_t)(e_i2c_s_int_status int_status, size_t receive_num); + +/************************************************************************** +* @name : hal_i2c_s_init +* @brief : i2c slave 初始化 +* @param[in] : slave_addr：从机地址 +* @param[in] : addr_bits：从机地址位数 +* @return : +* @retval : +**************************************************************************/ +void hal_i2c_s_init(uint8_t slave_addr, uint8_t addr_bits); + +/************************************************************************** +* @name : hal_i2c_s_dma_write +* @brief : i2c slave dma 发送数据 +* @param[in] : txBuffer：发送数据buffer +* @param[in] : data_size：发送数据个数 +* @return : STATUS_SUCCESS：数据已排入 DMA 通道，但不一定全部发送 +* @return : 其它：发送出错，需要重新调用函数发送 +* @retval : +**************************************************************************/ +status_t hal_i2c_s_dma_write(const uint8_t *txBuffer, size_t data_size); + +/************************************************************************** +* @name : hal_i2c_s_nonblocking_read +* @brief : i2c slave 准备接收数据 +* @param[in] : rxBuffer：接收数据buffer +* @param[in] : data_size：接收数据最大个数 +* @return : STATUS_SUCCESS：已配置准备接收，此时通信不一定开始 +* @return : 其它：接收配置出错，需要重新调用函数配置 +* @retval : +**************************************************************************/ +status_t hal_i2c_s_nonblocking_read(uint8_t *rxBuffer, size_t data_size); + +/************************************************************************** +* @name : hal_i2c_s_transfer_complate +* @brief : 获取 i2c slave 发送状态 +* @param[in] : +* @return : true：数据发送完成 +* @return : false：数据还在发送 +* @retval : +**************************************************************************/ +bool hal_i2c_s_write_complate(void); + +/************************************************************************** +* @name : hal_i2c_s_read_complate +* @brief : 获取 i2c slave 接收状态 +* @param[in] : +* @return : 数据接收个数 +* @retval : +**************************************************************************/ +uint8_t hal_i2c_s_read_complate(void); + +/************************************************************************** +* @name : hal_i2c_s_read_complate_clear +* @brief : 清除 i2c slave 接收状态 +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +void hal_i2c_s_read_complate_clear(void); + +/************************************************************************** +* @name : hal_i2c_s_set_dma_tx_cycle +* @brief : 配置 I2C cycle 模式 +* @param[in] : +* @return : ENABLE：cycle模式，DISABLE：非cycle模式 +* @retval : +**************************************************************************/ +void hal_i2c_s_set_dma_tx_cycle(bool enable); + +/************************************************************************** +* @name : hal_i2c_s_set_transfer +* @brief : 配置 i2c 从机数据解析函数 +* @param[in] :hal_tp_transfer_phone_tmp：解析函数指针 +* @return : +* @retval : +**************************************************************************/ +void hal_i2c_s_set_transfer(hal_i2c_s_callback_t hal_i2c_s_callback_tmp); + +/************************************************************************** +* @name : hal_i2c_s_read_data +* @brief :read data +* @param[in] : rx_data: 接收数据 +* @return : 1: 成功获取数据 +* @return : 0: 接收 fifo 为空 +* @retval : +**************************************************************************/ +status_t hal_i2c_s_read_data(uint8_t *rx_data); + +/************************************************************************** +* @name : hal_i2c_s_write_data +* @brief :write data +* @param[in] : tx_data: 准备发送的数据 +* @return : 1: 配置发送成功 +* @return : 0: 发送 fifo 已满 +* @retval : +**************************************************************************/ +status_t hal_i2c_s_write_data(const uint8_t tx_data); + +/************************************************************************** + * @name : hal_i2c_s_rxfifo_notempty + * @brief : 判断当前 rxfifo 中是否有数据 + * @param[in] : + * @return : true: rxfifo 中有数据 + * @return : false: rxfifo 中没有数据 + * @retval : + **************************************************************************/ +bool hal_i2c_s_rxfifo_notempty(void); + +/************************************************************************** +* @name : hal_i2c_s_set_high_impedance +* @brief : 将 I2C 从机的IO口设置为高阻态 +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +void hal_i2c_s_set_high_impedance(void); +/************************************************************************** +* @name : hal_i2c_s_get_tx_byte_num +* @brief : 获取I2C从机发送成功字节数 +* @param[in] : +* @return :发送总字节数 +* @retval : +**************************************************************************/ +int hal_i2c_s_get_tx_byte_num(void); +/************************************************************************** +* @name : hal_i2c_s_deinit +* @brief : i2c IP去初始化（关掉使能、外设时钟） +* @param[in] :slave_num 从机序号 +* @return : +* @retval : +***************************************************************************/ +void hal_i2c_s_deinit(void); +#if defined(ISP_568) || defined(ISP_368) + /************************************************************************** + * @name : hal_i2c_s_sel + * @brief : i2c slave 选择 + * @param[in] : slaver：从机编号 + * @return : + * @retval : + **************************************************************************/ + void hal_i2c_s_sel(i2c_s_index_e slaver); +#endif +#endif /* __HAL_I2C_SLAVE_H__*/ + diff --git a/src/sdk/include/hal_pwm.h b/src/sdk/include/hal_pwm.h new file mode 100644 index 0000000..485351d --- /dev/null +++ b/src/sdk/include/hal_pwm.h @@ -0,0 +1,219 @@ +/******************************************************************************* +* +* +* File: hal_pwm.h +* Description： pwm HAL层头文件 +* Version： V0.1 +* Date： 2021-03-17 +* Author： wuc + *******************************************************************************/ +#ifndef __HAL_PWM_H__ +#define __HAL_PWM_H__ + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "tau_device_datatype.h" +#include "tau_common.h" +#include "hal_gpio.h" + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ +/*! @brief PWM触发功能的定义 */ +typedef enum _pwm_out_ctrl_e +{ + PWMO_CTRL_KEEP = 0, + PWMO_CTRL_LOW = 1, + PWMO_CTRL_HIGH = 2, + PWMO_CTRL_TOGGLE = 3, + PWMO_CTRL_MAX +} pwm_out_ctrl_e; + +/******************************************************************************* +* 4.Global variable extern declarations +*******************************************************************************/ + +/******************************************************************************* +* 5.Global function prototypes +*******************************************************************************/ +/** +* @brief PWMO初始化 +* @param 无 +* @retval 无 +*/ +void hal_pwm_out_init(void); + +/** +* @brief PWMO反初始化 +* @param 无 +* @retval 无 +*/ +void hal_pwm_out_deinit(void); + +/** +* @brief PWMO输出脉冲暂停、恢复 +* @param state：开关控制 +* @retval 无 +*/ +void hal_pwm_out_pause(function_state_e state); + +/** +* @brief 配置PWMO脉冲并开始输出 +* @param ctl0：到达阈值thr0时的操作，参考枚举类型pwm_out_ctrl_e +* @param ctl1：到达阈值thr1时的操作，参考枚举类型pwm_out_ctrl_e +* @param thr0：阈值0，单位us +* @param thr1：阈值1，单位us +* @param period：一个周期的时间，单位us +* @retval 无 +*/ +void hal_pwm_out_config_all(pwm_out_ctrl_e ctl0, pwm_out_ctrl_e ctl1, uint32_t thr0, uint32_t thr1, uint32_t period); + +/** +* @brief 在同步所有模式下配置PWMO脉冲所有参数 +* @param ctl0：到达阈值thr0时的操作，参考枚举类型pwm_out_ctrl_e +* @param ctl1：到达阈值thr1时的操作，参考枚举类型pwm_out_ctrl_e +* @param thr0：阈值0，单位us +* @param thr1：阈值1，单位us +* @param period：一个周期的时间，单位us +* @retval 无 +*/ +void hal_pwm_out_sync_all(pwm_out_ctrl_e ctl0, pwm_out_ctrl_e ctl1, uint32_t thr0, uint32_t thr1, uint32_t period); + +/** +* @brief 调制pwm输出以控制背光 +* @param polarity: 极性，false:先高后低，true:先低后高 +* @param duty_ratio: 占空比(0-total_ratio) +* @param total_ratio: 可细分总量 +* @param frequency: 频率，单位HZ +* @retval 无 +*/ +void hal_pwm_out_config_duty_ratio(bool polarity, uint16_t duty_ratio, uint16_t total_ratio, uint32_t frequency); + +/** +* @brief 在同步周期模式下配置PWMO脉冲的周期 +* @param period：一个周期的时间，单位us +* @retval 无 +*/ +void hal_pwm_out_sync_period(uint32_t period); + +/** +* @brief 在同步控制模式下配置PWMO脉冲的控制 +* @param ctl0：到达阈值thr0时的操作，参考枚举类型pwm_out_ctrl_e +* @param ctl1：到达阈值thr1时的操作，参考枚举类型pwm_out_ctrl_e +* @retval 无 +*/ +void hal_pwm_out_sync_ctl(pwm_out_ctrl_e ctl0, pwm_out_ctrl_e ctl1); + +/** +* @brief 在同步阈值模式下配置PWMO脉冲的阈值 +* @param thr0：阈值0，单位us +* @param thr1：阈值1，单位us +* @retval 无 +*/ +void hal_pwm_out_sync_thr(uint32_t thr0, uint32_t thr1); + +/** +* @brief 在同步暂停模式下暂停或恢复PWMO脉冲 +* @param pause_state：暂停或恢复 +* @retval 无 +*/ +void hal_pwm_out_sync_pause(function_state_e pause_state); + +/** +* @brief PWMI初始化 +* @param 无 +* @retval 无 +*/ +void hal_pwm_in_init(void); + +/** +* @brief PWMI反初始化 +* @param 无 +* @retval 无 +*/ +void hal_pwm_in_deinit(void); + +/** +* @brief 注册PWMI中断回调函数，回传PWMI中断类型指针，参考pwm_int_type_e +* @param cb_func：回调函数地址 +* @retval 无 +*/ +void hal_pwm_in_register_callback(fcb_type cb_func); + +/** +* @brief 配置PWMI所有中断的开关 +* @param high_overflow_en：high overflow中断使能开关 +* @param low_overflow_en：low overflow中断使能开关 +* @param total_overflow_en：total overflow中断使能开关 +* @param high_done_en：high done中断使能开关 +* @param low_done_en：low done中断使能开关 +* @param total_done_en：total done中断使能开关 +* @retval 无 +*/ +void hal_pwm_in_config_int(function_state_e high_overflow_en, function_state_e low_overflow_en, function_state_e total_overflow_en, + function_state_e high_done_en, function_state_e low_done_en, function_state_e total_done_en); + +/** +* @brief 配置PWMI单个中断的开关 +* @param pwm_int：中断类型，参考枚举类型pwm_int_type_e +* @param enable：控制开关 +* @retval 无 +*/ +void hal_pwm_in_set_int(pwm_int_type_e pwm_int, function_state_e enable); + +/** +* @brief 关闭PWMI所有中断 +* @param 无 +* @retval 无 +*/ +void hal_pwm_in_clear_int(void); + +/** +* @brief 开关PWMI中断 +* @param state：开关控制 +* @retval 无 +*/ +void hal_pwm_in_ctrl_int(function_state_e state); + +/** +* @brief 获取PWMI脉冲周期时长 +* @param 无 +* @retval 周期时长，单位us +*/ +uint32_t hal_pwm_in_get_total_period(void); + +/** +* @brief 获取PWMI脉冲高电平时长 +* @param 无 +* @retval 高电平时长，单位us +*/ +uint32_t hal_pwm_in_get_high_period(void); + +/** +* @brief 获取PWMI脉冲低电平时长 +* @param 无 +* @retval 低电平时长，单位us +*/ +uint32_t hal_pwm_in_get_low_period(void); + +/** +* @brief 获取PWMI上升沿累积个数 +* @param 无 +* @retval 从模块使能到当前时间的上升沿个数，超过32位宽后清零重新计数 +*/ +uint32_t hal_pwm_in_get_current_count(void); + +#if defined(ISP_568) || defined(ISP_368) + /** + * @brief 选择PWMO输出的IO口 + * @param pad: PWMO输出的IO口,默认为IO_PAD_AP_SWIRE,可选通过IO_PAD_TD_SPIM_MISO、IO_PAD_TD_LEDPWM输出 + * @retval 无 + */ + void hal_pwm_out_sel_io(io_pad_e pad); +#endif +#endif /* __HAL_PWM_H__ */ diff --git a/src/sdk/include/hal_spi_master.h b/src/sdk/include/hal_spi_master.h new file mode 100644 index 0000000..bd75c44 --- /dev/null +++ b/src/sdk/include/hal_spi_master.h @@ -0,0 +1,89 @@ +/******************************************************************************* +* +* +* File: hal_spi_touch.h +* Description spi hal file +* Version V0.1 +* Date 2021-10-25 +* Author zhanghz +*******************************************************************************/ + +#ifndef __HAL_SPI_MASTER_H__ +#define __HAL_SPI_MASTER_H__ + +#include "tau_device_datatype.h" +#include "tau_common.h" +#include "string.h" + +/************************************************************************** +* @name : hal_spi_m_dma_init +* @brief : SPIM DMA 初始化 +* @param[in] :speed：配置通信速率 +* @param[in] :cpha: 配置第一个时钟沿或者第二个时钟沿有效 +* @param[in] :cpol: 配置总线空闲时时钟电平 +* @return : +* @retval : +**************************************************************************/ +void hal_spi_m_dma_init(uint32_t speed, uint8_t cpha, uint8_t cpol); + +/************************************************************************** +* @name : hal_spi_m_dma_write +* @brief : 用SPIM 发送数据 +* @param[in] :data_buffer: 发送数据 buffer 头地址 +* @param[in] :data_size: 发送数据 buffer 长度 +* @return :STATUS_SUCCESS: 配置成功，但数据不一定发送完成 +* @return :其它：配置不成功，需要重新配置发送 +* @retval : +**************************************************************************/ +status_t hal_spi_m_dma_write(const uint8_t *data_buffer, size_t data_size); + +/************************************************************************** +* @name : hal_spi_m_dma_read +* @brief : 用SPIM 读取数据 +* @param[in] :cmd: 发送命令 buffer 头地址 +* @param[in] :cmd_size: 发送命令 buffer 长度 +* @param[in] :data_buffer: 读取数据 buffer 头地址 +* @param[in] :data_size: 发送命令 和 读取数据 buffer 长度 +* @return :STATUS_SUCCESS: 配置成功，但数据不一定读取完成 +* @return :其它：配置不成功，需要重新配置发送 +* @retval : +**************************************************************************/ +status_t hal_spi_m_dma_read(const uint8_t *cmd, size_t cmd_size, uint8_t *data_buffer, size_t data_size); + +/************************************************************************** +* @name : hal_spi_m_get_transfer_complate +* @brief : 获取 SPIM 通信完成状态 +* @param[in] : +* @return :true：通信完成 +* @retval : +**************************************************************************/ +bool hal_spi_m_get_transfer_complate(void); + +/************************************************************************** +* @name : hal_spi_m_clear_rxfifo +* @brief : 清空 rxfifo 中的数据 +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +void hal_spi_m_clear_rxfifo(void); + +/************************************************************************** +* @name : hal_spi_m_set_high_impedance +* @brief : 将 SPI 主机的IO口设置为高阻态 +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +void hal_spi_m_set_high_impedance(void); +/************************************************************************** +* @name : hal_spi_m_deinit +* @brief : 将 SPI 主机去初始化(关掉SPIM) +* @param[in] : +* @return :true +* @retval : +**************************************************************************/ +bool hal_spi_m_deinit(void); + +#endif + diff --git a/src/sdk/include/hal_spi_slave.h b/src/sdk/include/hal_spi_slave.h new file mode 100644 index 0000000..6454ab2 --- /dev/null +++ b/src/sdk/include/hal_spi_slave.h @@ -0,0 +1,181 @@ +/******************************************************************************* +* Copyright (C) 2021-2022, All Rights Reserved. +* +* File: hal_spi_slave.h +* Description spi slave hal file +* Version V0.1 +* Date 2021-10-23 +* Author lzy +*******************************************************************************/ +#ifndef __HAL_SPI_SLAVE_H__ +#define __HAL_SPI_SLAVE_H__ + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "tau_dsi_datatype.h" +#include "tau_common.h" + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ +/* +自动模式event eg:rx_buffer_size=8, host发送16个byte数据, +收到前面8byte数据时产生SPI_EVENT_RCV_FULL事件,后续的事件丢弃, +传输完成后host拉高CS,产生SPI_EVENT_RCV_CS_HIGH事件 +*/ +typedef enum +{ + SPI_EVENT_RCV_DATA = 0, /* 手动模式下，SPIS 接受每接收一个数据即产生事件 */ + SPI_EVENT_RCV_FULL, /* 自动模式下 ，SPIS 接收数据等于buffer size后产生事件 */ + SPI_EVENT_RCV_CS_HIGH, /* 自动模式下 ，SPIS 收到CS 拉高的信号 */ +} hal_spis_event_e; + +typedef struct hal_spi_packet_info_t +{ + uint8_t *rx_buffer; /* 接收buffer */ + uint32_t rx_buffer_size; /* 接收buffer size */ + bool rx_circle; /* 接收circle mode */ + const uint8_t *tx_buffer; /* 发送buffer */ + uint32_t tx_buffer_size; /* 发送buffer size */ + bool tx_circle; /* 发送circle mode */ + uint32_t packet_size; /* packet size */ +} hal_spi_packet_info_t; + +typedef void (*hal_spi_slave_cb)(hal_spis_event_e event, hal_spi_packet_info_t *packet_info); + +/******************************************************************************* +* 4.Global variable extern declarations +*******************************************************************************/ + +/******************************************************************************* +* 5.Global function prototypes +*******************************************************************************/ +/** +* @brief 初始化spi slave 模块 +* @param cpha: 相位配置 +* @param cpol: 极性配置 +* @param dma: 自动模式下DMA enable +* @retval true/false +*/ +bool hal_spi_slave_init(uint8_t cpha, uint8_t cpol, bool dma); + +/** +* @brief spi slave 模块去初始化 +* @param none +* @retval true/false +*/ +bool hal_spi_slave_deinit(void); + +/** +* @brief spi slave 注册回调函数 +* @param cb：call back +* @retval true/false +*/ +bool hal_spi_slave_register_callback(hal_spi_slave_cb cb); + +/** +* @brief spi slave enable +* @param none +* @retval true/false +*/ +bool hal_spi_slave_enable(void); + +/** +* @brief spi slave disable +* @param none +* @retval true/false +*/ +bool hal_spi_slave_disable(void); + +/** +* @brief spi slave 配置自动接收buffer, 底层自动接收数据后调用callback, buffer为NULL时为自动接收模式 +* @param buffer：自动模式数据接收buffer +* @param size： 自动模式数据接收buffer size +* @param circle：circle mode，packet size 大于buffer size 时从offset 0重新写(暂不支持) +* @retval true/false +*/ +bool hal_spi_slave_set_auto_rx_buffer(uint8_t *buffer, uint32_t size, bool circle); + +/** +* @brief spi slave 配置自动发送buffer +* @param buffer：自动模式数据发送buffer, buffer为NULL为切换为自动模式 +* @param size： 自动模式数据发收buffer size +* @param circle：circle mode，重复发送buffer的数据 +* @retval true/false +*/ +bool hal_spi_slave_set_auto_tx_buffer(const uint8_t *buffer, uint32_t size, bool circle); + +/** +* @brief spi slave 启动自动传输 +* @param none +* @retval true/false +*/ +bool hal_spi_slave_auto_transfer_start(void); + +/** +* @brief spi slave 停止自动传输(circle mode 下packet结束可使用) +* @param none +* @retval true/false +*/ +bool hal_spi_slave_auto_transfer_abort(void); + +/** +* @brief spi slave flush fifo(circle mode 下packet结束后可使用) +* @param none +* @retval true/false +*/ +bool hal_spi_slave_flush_fifo(void); + +/** +* @brief reset spis tx,在启动spis后重新配置输出数据 +* @param buffer：自动模式数据发送buffer +* @param size： 自动模式数据发收buffer size +* @param circle：circle mode，重复发送buffer的数据 +* @retval true/false +*/ +bool hal_spi_slave_reset_tx(const uint8_t *buffer, uint32_t size, bool circle); + +/** +* @brief check spi slave busy(CS status) +* @param none +* @retval true/false +*/ +bool hal_spi_slave_busy(void); + +/** +* @brief 获取rx fifo 非空 +* @param none +* @retval true/false +*/ +bool hal_spi_slave_get_rxfifo_notempty(void); + +/** +* @brief 手动模式下从rx fifo 读取数据 +* @param none +* @retval true/false +*/ +bool hal_spi_slave_read_data(uint32_t *data); + +/** +* @brief 手动模式下往tx fifo 写数据 +* @param none +* @retval true/false +*/ +bool hal_spi_slave_write_data(const uint8_t data); + +/************************************************************************** +* @name : hal_spi_s_set_high_impedance +* @brief : 将 SPI 从机的IO口设置为高阻态 +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +void hal_spi_s_set_high_impedance(void); + +#endif /* __HAL_SPI_SLAVE_H__*/ + diff --git a/src/sdk/include/hal_swire.h b/src/sdk/include/hal_swire.h new file mode 100644 index 0000000..de654a4 --- /dev/null +++ b/src/sdk/include/hal_swire.h @@ -0,0 +1,75 @@ +/******************************************************************************* +* +* +* File: hal_swire.h +* Description： swire HAL层头文件 +* Version： V0.1 +* Date： 2021-03-17 +* Author： wuc + *******************************************************************************/ +#ifndef __HAL_SWIRE_H__ +#define __HAL_SWIRE_H__ + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "tau_device_datatype.h" +#include "tau_common.h" + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ + +/******************************************************************************* +* 4.Global variable extern declarations +*******************************************************************************/ + +/******************************************************************************* +* 5.Global function prototypes +*******************************************************************************/ +/** +* @brief SWIRE初始化 +* @param 无 +* @retval 无 +*/ +void hal_swire_init(void); + +/** +* @brief SWIRE反初始化 +* @param 无 +* @retval 无 +*/ +void hal_swire_deinit(void); + +/** +* @brief 配置SWIRE脉冲并开始输出 +* @param start_time：起始时长，单位us +* @param stop_time：结束时长，单位us，必须大于300us +* @param high_time：高电平时长，单位us +* @param low_time：低电平时长，单位us +* @param pulse：上升沿个数 +* @retval 无 +*/ +void hal_swire_start(uint32_t start_time, uint32_t stop_time, + uint32_t high_time, uint32_t low_time, + uint32_t pulse); + +/** +* @brief 打开或关闭背光 +* @param state：开关控制 +* @retval 无 +*/ +void hal_swire_open(function_state_e state); + +/** +* @brief 注册回调函数 +* @param cb_func：回调函数地址 +* @retval 无 +*/ +void hal_swire_register_callback(fcb_type cb_func); + +#endif /* __HAL_SWIRE_H__ */ diff --git a/src/sdk/include/hal_system.h b/src/sdk/include/hal_system.h new file mode 100644 index 0000000..ef90c75 --- /dev/null +++ b/src/sdk/include/hal_system.h @@ -0,0 +1,219 @@ +/******************************************************************************* +* +* +* File: hal_system.h +* Description hal 通用系统接口头文件 +* Version V0.1 +* Date 2021-05-21 +* Author lzy + *******************************************************************************/ +#ifndef __HAL_SYSTEM_H__ +#define __HAL_SYSTEM_H__ +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "tau_common.h" +#include "hal_flash.h" + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ + +/******************************************************************************* +* API兼容宏定义 +*******************************************************************************/ + +/** +* @brief 发送0xAB指令控制flash退出deep sleep power mode +* 新API为hal_flash_release_power_down +* @param none +* @retval null +*/ +#define hal_system_flash_release_power_down()\ +{\ + hal_flash_init();\ + hal_flash_release_power_down();\ + hal_flash_deinit();\ +} + +/** +* @brief 发送0xB9指令控制flash进入deep sleep power mode +* 新API为hal_system_flash_power_down +* @param +* @retval null +*/ +#define hal_system_flash_power_down()\ +{\ + hal_flash_init();\ + hal_flash_power_down();\ + hal_flash_deinit();\ +} + +/** +* @brief 用户字节数组形式从flash读取数据,按页读取，每页1024字节 +* 新API为hal_flash_normal_read +* @param *usr_cfg_t_addr(数组首地址), + usr_cfg_t_size(数组大小可以超过1024，可以按页读也可连续跨页读) + flash_page （页0~63） +* @retval bool 无 +*/ +#define hal_system_flash_read(usr_cfg_t_addr, usr_cfg_t_size, flash_page)\ +({\ + bool ret;\ + hal_flash_init();\ + ret = hal_flash_normal_read(usr_cfg_t_addr, usr_cfg_t_size, 13, flash_page, 0);\ + hal_flash_deinit();\ + ret;\ +}) + +/** +* @brief 用户字节数组形式存入flash(次数有限，不可频繁写入),按页写入，每页1024字节 +* 新API为hal_flash_normal_write +* @param *usr_cfg_t_addr(数组首地址), + usr_cfg_t_size(数组大小可以超过1024，可以按页写也可连续跨页写入)， + 推荐按页顺序写入方式，第一次必须从0页开始写入，后续才可1~63任意页写入 + flash_page （写入页0~63） +* @retval bool 校验size是否超出 +*/ +#define hal_system_flash_write(usr_cfg_t_addr, usr_cfg_t_size, flash_page)\ +({\ + bool ret;\ + if(flash_page == 0)\ + {\ + hal_flash_erase(13);\ + }\ + hal_flash_init();\ + ret = hal_flash_normal_write(usr_cfg_t_addr, usr_cfg_t_size, 13, flash_page, 0);\ + hal_flash_deinit();\ + ret;\ +}) + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ + +/******************************************************************************* +* 4.Global variable extern declarations +*******************************************************************************/ + +/******************************************************************************* +* 5.Global function prototypes +*******************************************************************************/ + +/** +* @brief system 初始化 +* @param none +* @retval none +*/ +void hal_system_init(uint32_t sysclk); + +/** +* @brief system 初始化 console +* @param baud_rate 波特率 +* @retval none +*/ +void hal_system_init_console(uint32_t baud_rate); + +/** +* @brief mcu进入idle模式,等待中断唤醒 +* @param disable_systick: 进入idle时是否关闭systick(退出idle 恢复systick) +* @retval none +*/ +void hal_system_idle_mode(bool disable_systick); + +/** +* @brief 注册systick回调函数 +* @param cb_func：回调函数地址 +* @retval 无 +*/ +void hal_system_register_systick_cb(fcb_type cb_func); + +/** +* @brief 启动sys tickt +* @param ms: sys tickt 间隔, 范围1-10ms +* @retval true/false +*/ +bool hal_system_enable_systick(uint8_t ms); + +/** +* @brief 获取systickt +* @param none +* @retval 当前systickt值 +*/ +bool hal_system_disable_systick(void); + +/** +* @brief 获取systickt +* @param none +* @retval 当前systickt值 +*/ +uint32_t hal_system_get_tick(void); + +/** +* @brief 进入deep sleep mode 模式, 等待AP_RSTN 唤醒 +* @param polarity true:上升沿唤醒, false:下降沿唤醒 +* @retval none +*/ +void hal_system_deep_sleep_mode(bool polarity); + +/** +* @brief 配置共享flash开关(使用过后注意关闭,常开功耗会增加) +* @param enable:true:可通过F_SPI访问内部flash , false:不可通过F_SPI访问内部flash +* @retval true/false +*/ +bool hal_system_share_flash_mode(bool enable); + +/** +* @brief sleep mode 配置 +* @param enable +* @retval none +*/ +void hal_system_sleep_mode(bool enable); + +/** +* @brief reset chip +* @param none +* @retval none +*/ +void hal_system_reset_chip(void); + +/** +* @brief 开关PVD检测 +* @param none +* @retval none +*/ +void hal_system_set_pvd(bool enable); + +/** +* @brief VCC电源开关， +* 使用场景: VCC掉电，13D与13M使用外灌电源时，关闭内部VCC供电,防止电源倒灌 +* @param enable: true:打开CP, false:关闭CP +* @retval none +*/ +void hal_system_set_vcc(bool enable); + + +#if defined(ISP_568) || defined(ISP_368) + /** + * @brief 控制DPHY内部校准开关 + * @param en: 使能开关 + * @retval none + */ + void hal_system_set_phy_calibration(bool en); +#endif + +/** +* @brief 获取上位机设置的debug state +* @param none +* @retval debug state +*/ +uint32_t hal_system_get_debug_state(void); + +/** +* @brief clear debug state(debug only) +* @param none +* @retval none +*/ +void hal_system_clear_debug_state(void); + +#endif //__HAL_SYSTEM_H__ diff --git a/src/sdk/include/hal_timer.h b/src/sdk/include/hal_timer.h new file mode 100644 index 0000000..f395c19 --- /dev/null +++ b/src/sdk/include/hal_timer.h @@ -0,0 +1,92 @@ +/******************************************************************************* +* +* +* File: hal_timer.h +* Description： timer HAL层头文件 +* Version： V0.1 +* Date： 2021-03-16 +* Author： wuc + *******************************************************************************/ +#ifndef __HAL_TIMER_H__ +#define __HAL_TIMER_H__ + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "tau_device_datatype.h" +#include "tau_common.h" + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ + +/******************************************************************************* +* 4.Global variable extern declarations +*******************************************************************************/ + +/******************************************************************************* +* 5.Global function prototypes +*******************************************************************************/ +/** +* @brief 指定定时器初始化 +* @param index：实例序号(0~3)，参考枚举类型timer_num_e +* @retval 无 +*/ +void hal_timer_init(timer_num_e index); + +/** +* @brief 指定定时器反初始化 +* @param index：实例序号(0~3)，参考枚举类型timer_num_e +* @retval 无 +*/ +void hal_timer_deinit(timer_num_e index); + +/** +* @brief 启动指定定时器 +* @param index：实例序号(0~3)，参考枚举类型timer_num_e +* @param ms：超时时间，单位ms。由于应用场景一般是ms级别的，应用开发不需要计数具体时针数， + 故直接输入时间，在接口内部换算成时钟数进行寄存器设置。 +* @param cb_func：回调函数地址，不需要则填NULL +* @param data：回调函数的参数地址，不需要则填NULL +* @retval 无 +*/ +void hal_timer_start(timer_num_e index, uint32_t ms, fcb_type cb_func, void *data); + +/** +* @brief 启动指定定时器 +* @param index：实例序号(0~3)，参考枚举类型timer_num_e +* @param us：超时时间，单位us。由于应用场景一般是us级别的，应用开发不需要计数具体时针数， + 故直接输入时间，在接口内部换算成时钟数进行寄存器设置。 +* @param cb_func：回调函数地址，不需要则填NULL +* @param data：回调函数的参数地址，不需要则填NULL +* @retval 无 +*/ +void hal_timer_start_ex(timer_num_e index, uint32_t us, fcb_type cb_func, void *data); + +/** +* @brief 停止指定定时器 +* @param index：实例序号(0~3)，参考枚举类型timer_num_e +* @retval 无 +*/ +void hal_timer_stop(timer_num_e index); + +/** +* @brief 设置定时器是否循环超时 +* @param index：实例序号(0~3)，参考枚举类型timer_num_e +* @param bool enable：循环超时使能 +* @retval 无 +*/ +void hal_timer_set_repeat(timer_num_e index, bool repeat); + +/** +* @brief 获取指定指示器状态 +* @param index：实例序号(0~3)，参考枚举类型timer_num_e +* @retval 参考timer_status_e +*/ +timer_status_e hal_timer_get_status(timer_num_e index); + +#endif /* __HAL_TIMER_H__ */ diff --git a/src/sdk/include/hal_uart.h b/src/sdk/include/hal_uart.h new file mode 100644 index 0000000..fcfd17a --- /dev/null +++ b/src/sdk/include/hal_uart.h @@ -0,0 +1,131 @@ +/******************************************************************************* +* +* +* File: hal_uart.h +* Description +* Version V0.1 +* Date 2021-11-24 +* Author kc +*******************************************************************************/ + +#ifndef __HAL_UART_H__ +#define __HAL_UART_H__ + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "stdint.h" +#include "tau_common.h" + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ +typedef enum +{ + HAL_UART_STOPBIT_1 = 0, + HAL_UART_STOPBIT_2 = 1 +} hal_uart_stopbit_e; + +typedef enum +{ + HAL_UART_PARITY_NO = 0, + HAL_UART_PARITY_ODD = 0x01, + HAL_UART_PARITY_EVEN = 0x03, +} hal_uart_parity_e; + +typedef enum +{ + HAL_UART_DATAWIDTH_6 = 1, + HAL_UART_DATAWIDTH_7 = 2, + HAL_UART_DATAWIDTH_8 = 3 +} hal_uart_datawidth_e; + + +typedef struct +{ + uint32_t baudrate; + hal_uart_stopbit_e stopbits; + hal_uart_datawidth_e data_width; + hal_uart_parity_e parity; +} hal_uart_config_t; + + +typedef struct _hal_uart_handle_t +{ + hal_uart_config_t uart_config; + void (* txdmacallback)(void); + void (* rxdmacallback)(void); +} hal_uart_handle_t; + + +typedef enum +{ + HAL_UART_OK = 0x00U, + HAL_UART_ERROR = 0x01U, + HAL_UART_BUSY = 0x02U, + HAL_UART_TIMEOUT = 0x03U +} hal_uart_status; + + +/******************************************************************************* +* 4.Global variable extern declarations +*******************************************************************************/ + +/******************************************************************************* +* 5.Global function prototypes +*******************************************************************************/ +/** +* @brief 初始化设置uart 传输的波特率、位宽等参数 +* @param hal_uart_handle_t +* @retval hal_uart_status +*/ +hal_uart_status hal_uart_init(hal_uart_handle_t *huart); + +/** +* @brief 关闭uart口 +* @param hal_uart_handle_t +* @retval hal_uart_status +*/ +hal_uart_status hal_uart_deinit(hal_uart_handle_t *huart); + +/** +* @brief 阻塞式发送数据 +* @param hal_uart_handle_t +* @param pdata:传输数据指针 +* @param size:传输数据大小 +* @retval hal_uart_status +*/ +hal_uart_status hal_uart_transmit_blocking(hal_uart_handle_t *huart, uint8_t *pdata, uint16_t size); + +/** +* @brief 阻塞式接收数据 +* @param hal_uart_handle_t +* @param pdata:传输数据指针 +* @param size:传输数据大小 +* @retval hal_uart_status +*/ +hal_uart_status hal_uart_receive_blocking(hal_uart_handle_t *huart, uint8_t *pdata, uint16_t size); + +/** +* @brief 使用DMA发送数据，TX和RX共用一个DMA 通道，所以需要TX/RX传输完后才能进行RX/TX的传输 +* @param hal_uart_handle_t +* @param pdata:传输数据指针 +* @param size:传输数据大小 +* @retval hal_uart_status +*/ +hal_uart_status hal_uart_transmit_dma(hal_uart_handle_t *huart, uint8_t *pdata, uint16_t size); + +/** +* @brief 使用DMA发送数据，TX和RX共用一个DMA 通道，所以需要TX/RX传输完后才能进行RX/TX的传输 +* @param hal_uart_handle_t +* @param pdata:传输数据指针 +* @param size:传输数据大小 +* @retval hal_uart_status +*/ +hal_uart_status hal_uart_receive_dma(hal_uart_handle_t *huart, uint8_t *pdata, uint16_t size); + +#endif /* __HAL_UART_H__ */ diff --git a/src/sdk/include/hal_wdg.h b/src/sdk/include/hal_wdg.h new file mode 100644 index 0000000..87c9360 --- /dev/null +++ b/src/sdk/include/hal_wdg.h @@ -0,0 +1,94 @@ +/******************************************************************************* +* +* +* File: hal_wdg.h +* Description： wdg HAL层头文件 +* Version： V0.1 +* Date： 2021-03-16 +* Author： wuc + *******************************************************************************/ +#ifndef __HAL_WDG_H__ +#define __HAL_WDG_H__ + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "tau_device_datatype.h" +#include "tau_common.h" + + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ +/*! + * @brief watch dog模式 + */ +typedef enum +{ + WDG_MODE_RESET = 0, //复位模式，跑飞复位 + WDG_MODE_INTERRUPT = 1 //中断模式，跑飞进入中断 +} wdg_mode_e; + +/******************************************************************************* +* 4.Global variable extern declarations +*******************************************************************************/ + +/******************************************************************************* +* 5.Global function prototypes +*******************************************************************************/ +/** +* @brief 看门狗初始化 +* @param 无 +* @retval 无 +*/ +void hal_wdg_init(void); + +/** +* @brief 看门狗反初始化 +* @param 无 +* @retval 无 +*/ +void hal_wdg_deinit(void); + +/** +* @brief 启动看门狗 +* @param wdg_mode_e modeSel: 复位或中断模式 +* @param uint32_t load: 超时时间，单位ms +* @retval 无 +*/ +void hal_wdg_start(wdg_mode_e modeSel, uint32_t load); + +/** +* @brief 停止看门狗 +* @param 无 +* @retval 无 +*/ +void hal_wdg_stop(void); + +/** +* @brief 设置WDG是否循环超时 +* @param enable：循环超时使能 +* @retval 无 +*/ +void hal_wdg_set_repeat(bool repeat); + +/** +* @brief 注册中断回调函数 +* @param cb_func：回调函数地址 +* @param data：回调参数地址 +* @retval 无 +*/ +void hal_wdg_register_callback(fcb_type cb_func, void *data); + +/** +* @brief 喂狗 +* @param 无 +* @retval 无 +*/ +void hal_wdg_kick_dog(void); + +#endif /* __HAL_WDG_H__ */ diff --git a/src/sdk/sdk_version.h b/src/sdk/sdk_version.h new file mode 100644 index 0000000..3fc1d35 --- /dev/null +++ b/src/sdk/sdk_version.h @@ -0,0 +1 @@ +#define SDK_REVISION 4450 \ No newline at end of file

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"board.h" +#include "tau_delay.h" + + + +//test_cfg_global.h file choice what you want test or completely demo of S8 or S8+ Felix + +int main() +{ +// hal_system_init(); + board_Init(); + + while (1) + { +#if _DEMO_S8_EN + ap_demo(); +#endif + while (1); + } +} diff --git a/src/app/test_cfg_global.h b/src/app/test_cfg_global.h new file mode 100644 index 0000000..37f4546 --- /dev/null +++ b/src/app/test_cfg_global.h @@ -0,0 +1,84 @@ +/******************************************************************************* +* Copyright (C) 2019-2022, 518 Systems (R),All Rights Reserved. +* +* File: test_cfg_global.h +* Description ȫͷļ +* Version V0.1 +* Date 2021-05-01 +* Author kevin + *******************************************************************************/ + +#ifndef __TEST_GLOBAL_CONFIG_H__ +#define __TEST_GLOBAL_CONFIG_H__ +/******************************************************************************* +* 1.Included files +*******************************************************************************/ + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ + +#define _TEST_TIMER_EN 0 +#define _TEST_DSI_TX_EN 0 +#define _TEST_DSI_RX_EN 0 +#define _TEST_PWM_EN 0 +#define _TEST_SWIRE_EN 0 +#define _TEST_WDG_EN 0 +#define _TEST_GPIO_EN 0 +#define _TEST_I2C_EN 0 +#define _TEST_SPI_EN 0 + +#define _DEMO_S8_EN 1 +#define _DEMO_S8P_EN 0 +#if _TEST_TIMER_EN + #include "test_hal_timer.h" +#endif + +#if _TEST_I2C_EN + #include "test_hal_i2c.h" +#endif + +#if _TEST_SPI_EN + #include "test_hal_spi.h" +#endif + +#if _TEST_DSI_TX_EN + #include "test_hal_dsi_tx.h" +#endif + +#if _TEST_DSI_RX_EN + #include "test_hal_dsi_rx.h" +#endif + +#if _TEST_PWM_EN + #include "test_hal_pwm.h" +#endif + +#if _TEST_SWIRE_EN + #include "test_hal_swire.h" +#endif + +#if _TEST_WDG_EN + #include "test_hal_wdg.h" +#endif + +#if _TEST_GPIO_EN + #include "test_hal_gpio.h" +#endif + +#if _TEST_I2C_TP_EN + #include "test_hal_i2c_tp.h" +#endif + +#if _DEMO_S8_EN + #include "ap_demo.h" + #include "app_tp_for_custom_s8.h" +#endif + +#if _DEMO_S8P_EN + #include "s8p_demo.h" + #include "app_tp_for_custom_s8p.h" +#endif + +#endif + diff --git a/src/board/board.c b/src/board/board.c new file mode 100644 index 0000000..aea5ad9 --- /dev/null +++ b/src/board/board.c @@ -0,0 +1,26 @@ +/******************************************************************************* +* Copyright (C) 2019-2022, ISP Systems (R),All Rights Reserved. +* +* File: board.c +* Description 板级文件 +* Version V0.1 +* Date 2020-12-07 +* Author linyw +*******************************************************************************/ +#include "board.h" +#include "hal_system.h" +#include "ArmCM0.h" + +void board_Init(void) +{ + hal_system_init(SYSTEM_CLOCK); + hal_system_enable_systick(1); +#if !EDA_MODE + hal_system_init_console(115200); +#endif +#if defined(ISP_568) || defined(ISP_368) + /* 从EFUSE读取DPHY校准值并设置 */ + hal_system_set_phy_calibration(true); +#endif +} + diff --git a/src/board/board.h b/src/board/board.h new file mode 100644 index 0000000..b450fd3 --- /dev/null +++ b/src/board/board.h @@ -0,0 +1,16 @@ +/******************************************************************************* +* Copyright (C) 2019-2022, CVA Systems (R),All Rights Reserved. +* +* File: board.h +* Description: baord 初始化头文件 +* Version: V0.1 +* Date: 2020-01-08 +* Author: lzy + *******************************************************************************/ + +#ifndef __BOARD_H__ +#define __BOARD_H__ + +void board_Init(void); + +#endif diff --git a/src/board/startup/startup_ARMCM0.s b/src/board/startup/startup_ARMCM0.s new file mode 100644 index 0000000..4a17757 --- /dev/null +++ b/src/board/startup/startup_ARMCM0.s @@ -0,0 +1,226 @@ +;/**************************************************************************//** +; * @file startup_ARMCM0.s +; * @brief CMSIS Core Device Startup File for +; * ARMCM0 Device +; * @version V5.4.0 +; * @date 12. December 2018 +; ******************************************************************************/ +;/* +; * Copyright (c) 2009-2018 Arm Limited. All rights reserved. +; * +; * SPDX-License-Identifier: Apache-2.0 +; * +; * Licensed under the Apache License, Version 2.0 (the License); you may +; * not use this file except in compliance with the License. +; * You may obtain a copy of the License at +; * +; * www.apache.org/licenses/LICENSE-2.0 +; * +; * Unless required by applicable law or agreed to in writing, software +; * distributed under the License is distributed on an AS IS BASIS, WITHOUT +; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +; * See the License for the specific language governing permissions and +; * limitations under the License. +; */ + +;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------ + + +; Stack Configuration +; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + +Stack_Size EQU 0x00001000 + + AREA STACK, NOINIT, READWRITE, ALIGN=3 +__stack_limit +Stack_Mem SPACE Stack_Size +__initial_sp + + +; Heap Configuration +; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + +Heap_Size EQU 0x00000C00 + + IF Heap_Size != 0 ; Heap is provided + AREA HEAP, NOINIT, READWRITE, ALIGN=3 +__heap_base +Heap_Mem SPACE Heap_Size +__heap_limit + ENDIF + + + PRESERVE8 + THUMB + + +; Vector Table Mapped to Address 0 at Reset + + AREA RESET, DATA, READONLY + EXPORT __Vectors + EXPORT __Vectors_End + EXPORT __Vectors_Size + +__Vectors DCD __initial_sp ; Top of Stack + DCD Reset_Handler ; Reset Handler + DCD NMI_Handler ; -14 NMI Handler + DCD HardFault_Handler ; -13 Hard Fault Handler + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD SVC_Handler ; -5 SVCall Handler + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD PendSV_Handler ; -2 PendSV Handler + DCD SysTick_Handler ; -1 SysTick Handler + + + ; Interrupts + DCD VIDC_IRQn_Handler ; 0 Interrupt 0 + DCD LCDC_IRQn_Handler ; 1 Interrupt 1 + DCD MIPI_RX_IRQn_Handler ; 2 Interrupt 2 + DCD MIPI_TX_IRQn_Handler ; 3 Interrupt 3 + DCD MEMC_IRQn_Handler ; 4 Interrupt 4 + DCD VPRE_IRQn_Handler ; 5 Interrupt 5 + DCD FLSCTRL_IRQn_Handler ; 6 Interrupt 6 + DCD DMA_IRQn_Handler ; 7 Interrupt 7 + DCD TIMER0_IRQn_Handler ; 8 Interrupt 8 + DCD TIMER1_IRQn_Handler ; 9 Interrupt 9 + DCD TIMER2_IRQn_Handler ; 10 Interrupt 10 + DCD TIMER3_IRQn_Handler ; 11 Interrupt 11 + DCD WDG_IRQn_Handler ; 12 Interrupt 12 + DCD UART_IRQn_Handler ; 13 Interrupt 13 + DCD I2C0_IRQn_Handler ; 14 Interrupt 14 + DCD I2C1_IRQn_Handler ; 15 Interrupt 15 + DCD SPIS_IRQn_Handler ; 16 Interrupt 16 + DCD SPIM_IRQn_Handler ; 17 Interrupt 17 + DCD ADC_IRQn_Handler ; 18 Interrupt 18 + DCD PWMDET_IRQn_Handler ; 19 Interrupt 19 + DCD OTP_IRQn_Handler ; 20 Interrupt 20 + DCD SWIRE_IRQn_Handler ; 21 Interrupt 21 + DCD PVD_IRQn_Handler ; 22 Interrupt 22 + DCD AP_NRESET_IRQn_Handler ; 23 Interrupt 23 + DCD EXTI_INT0_IRQn_Handler ; 24 Interrupt 24 + DCD EXTI_INT1_IRQn_Handler ; 25 Interrupt 25 + DCD EXTI_INT2_IRQn_Handler ; 26 Interrupt 26 + DCD EXTI_INT3_IRQn_Handler ; 27 Interrupt 27 + DCD EXTI_INT4_IRQn_Handler ; 28 Interrupt 28 + DCD EXTI_INT5_IRQn_Handler ; 29 Interrupt 29 + DCD EXTI_INT6_IRQn_Handler ; 30 Interrupt 30 + DCD EXTI_INT7_IRQn_Handler ; 31 Interrupt 31 + + SPACE ( 0 * 4) ; Interrupts 10 .. 31 are left out + +__Vectors_End +__Vectors_Size EQU __Vectors_End - __Vectors +_NVIC_ICER0 EQU 0xE000E180 ;清中断使能寄存器地址 +_NVIC_ICPR0 EQU 0xE000E280 ;清中断pending寄存器地址 + + AREA |.text|, CODE, READONLY + +; Reset Handler + +Reset_Handler PROC + EXPORT Reset_Handler [WEAK] + IMPORT __main + +;清中断使能和pending ——开始—— + CPSID I ; 屏蔽中断 + LDR R0, =_NVIC_ICER0 + LDR R1, =_NVIC_ICPR0 + LDR R2, =0xFFFFFFFF + MOVS R3, #1 ; 设置循环次数 M0只有1组(32个)中断，故只需要循环1次 +_irq_clear + ;CBZ R3, _irq_clear_end + CMP R3,#0 ; 循环次数等于0，跳转到_irq_clear_end + BEQ _irq_clear_end + STR R2, [R0] ;,#4 ; NVIC_ICER0 - 清 enable IRQ 寄存器 + STR R2, [R1] ;,#4 ; NVIC_ICPR0 - 清 pending IRQ 寄存器 + SUBS R3, #1 ; 循环数自减1 + B _irq_clear +_irq_clear_end +;清中断使能和pending ——结束—— + CPSIE I ; 开启中断 + LDR R0, =__main + BX R0 + ENDP + + +; Macro to define default exception/interrupt handlers. +; Default handler are weak symbols with an endless loop. +; They can be overwritten by real handlers. + MACRO + Set_Default_Handler $Handler_Name +$Handler_Name PROC + EXPORT $Handler_Name [WEAK] + B . + ENDP + MEND + + +; Default exception/interrupt handler + + Set_Default_Handler NMI_Handler + Set_Default_Handler HardFault_Handler + Set_Default_Handler SVC_Handler + Set_Default_Handler PendSV_Handler + Set_Default_Handler SysTick_Handler + + Set_Default_Handler VIDC_IRQn_Handler + Set_Default_Handler LCDC_IRQn_Handler + Set_Default_Handler MIPI_RX_IRQn_Handler + Set_Default_Handler MIPI_TX_IRQn_Handler + Set_Default_Handler MEMC_IRQn_Handler + Set_Default_Handler VPRE_IRQn_Handler + Set_Default_Handler FLSCTRL_IRQn_Handler + Set_Default_Handler DMA_IRQn_Handler + Set_Default_Handler TIMER0_IRQn_Handler + Set_Default_Handler TIMER1_IRQn_Handler + + Set_Default_Handler TIMER2_IRQn_Handler + Set_Default_Handler TIMER3_IRQn_Handler + Set_Default_Handler WDG_IRQn_Handler + Set_Default_Handler UART_IRQn_Handler + Set_Default_Handler I2C0_IRQn_Handler + Set_Default_Handler I2C1_IRQn_Handler + Set_Default_Handler SPIS_IRQn_Handler + Set_Default_Handler SPIM_IRQn_Handler + Set_Default_Handler ADC_IRQn_Handler + Set_Default_Handler PWMDET_IRQn_Handler + + Set_Default_Handler OTP_IRQn_Handler + Set_Default_Handler SWIRE_IRQn_Handler + Set_Default_Handler PVD_IRQn_Handler + Set_Default_Handler AP_NRESET_IRQn_Handler + Set_Default_Handler EXTI_INT0_IRQn_Handler + Set_Default_Handler EXTI_INT1_IRQn_Handler + Set_Default_Handler EXTI_INT2_IRQn_Handler + Set_Default_Handler EXTI_INT3_IRQn_Handler + Set_Default_Handler EXTI_INT4_IRQn_Handler + Set_Default_Handler EXTI_INT5_IRQn_Handler + + Set_Default_Handler EXTI_INT6_IRQn_Handler + Set_Default_Handler EXTI_INT7_IRQn_Handler + ALIGN + + +; User setup Stack & Heap + + IF :LNOT::DEF:__MICROLIB + IMPORT __use_two_region_memory + ENDIF + + EXPORT __stack_limit + EXPORT __initial_sp + IF Heap_Size != 0 ; Heap is provided + EXPORT __heap_base + EXPORT __heap_limit + ENDIF + + END diff --git a/src/common/tau_common.h b/src/common/tau_common.h new file mode 100644 index 0000000..2ca8cd1 --- /dev/null +++ b/src/common/tau_common.h @@ -0,0 +1,216 @@ +/******************************************************************************* +* +* +* File: tau_common.h +* Description 通用数据类型相关定义头文件 +* Version V0.1 +* Date 2020-09-07 +* Author lzy + *******************************************************************************/ + +#ifndef __TAU_COMMON_H +#define __TAU_COMMON_H + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "stdint.h" +#include "math.h" + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ +/** + * \name 通用常量定义 + * @{ + */ +//#define ENABLE 1 +//#define DISABLE 0 + +#define ON 1 +#define OFF 0 + +#define NONE 0 +#define EOS '\0' + +/* +#ifndef TRUE +#define TRUE 1 +#endif + +#ifndef FALSE +#define FALSE 0 +#endif +*/ + +#ifndef __cplusplus + #define true 1 + #define false 0 + #define bool _Bool +#endif /* ifndef __cplusplus */ + +#ifndef NULL + #define NULL ((void *)0) +#endif + +#define TAU_LITTLE_ENDIAN 1234 /**< \brief 小端模式 */ +#define TAU_BIG_ENDIAN 3412 /**< \brief 大端模式 */ + +/** @} */ + +/******************************************************************************/ + +/** + * \name 常用宏定义 + * @{ + */ + +#ifdef __cplusplus + #define __I volatile /*!< Defines 'read only' permissions */ +#else + #define __I volatile const /*!< Defines 'read only' permissions */ +#endif +#define __O volatile /*!< Defines 'write only' permissions */ +#define __IO volatile /*!< Defines 'read / write' permissions */ + +#define TAU_INLINE inline +#define TAU_STATIC_INLINE static inline +#define TAU_STATIC static +#define TAU_CONST const +#define TAU_EXTERN extern + +#define MIN(x, y) (((x) < (y)) ? (x) : (y)) +#define MAX(x, y) (((x) > (y)) ? (x) : (y)) + +/** + * \brief 求结构体成员的偏移 + * \attention 不同平台上，由于成员大小和内存对齐等原因， + * 同一结构体成员的偏移可能是不一样的 + * + * \par 示例 + * \code + * struct my_struct { + * int m1; + * char m2; + * }; + * int offset_m2; + * + * offset_m2 = TAU_OFFSET(struct my_struct, m2); + * \endcode + */ +#define TAU_OFFSET(structure, member) ((uint32_t)(&(((structure *)0)->member))) + +/** @} */ + +/** + * \brief 通过结构体成员指针获取包含该结构体成员的结构体 + * + * \param ptr 指向结构体成员的指针 + * \param type 结构体类型 + * \param member 结构体中该成员的名称 + * + * \par 示例 + * \code + * struct my_struct = { + * int m1; + * char m2; + * }; + * struct my_struct my_st; + * char *p_m2 = &my_st.m2; + * struct my_struct *p_st = TAU_CONTAINER_OF(p_m2, struct my_struct, m2); + * \endcode + */ +#define TAU_CONTAINER_OF(ptr, type, member) \ + ((type *)((char *)(ptr)-TAU_OFFSET(type, member))) + +/** + * \brief 计算结构体成员的大小 + * + * \code + * struct a = { + * uint32_t m1; + * uint32_t m2; + * }; + * int size_m2; + * + * size_m2 = TAU_MEMBER_SIZE(a, m2); //size_m2 = 4 + * \endcode + */ +#define TAU_MEMBER_SIZE(structure, member) (sizeof(((structure *)0)->member)) + +/** + * \brief 计算数组元素个数 + * + * \code + * int a[] = {0, 1, 2, 3}; + * int element_a = TAU_NELEMENTS(a); // element_a = 4 + * \endcode + */ +#define TAU_NELEMENTS(array) (sizeof(array) / sizeof((array)[0])) + +/** + * \brief 向上舍入 + * + * \param x 被运算的数 + * \param align 对齐因素 + * + * \code + * int size = TAU_ROUND_UP(15, 4); // size = 16 + * \endcode + */ +#define TAU_ROUND_UP(x, align) (((int)(x)/(align))*(align) + (((int)(x)%(align)) ? (align) : 0)) + +/** + * \brief 向下舍入 + * + * \param x 被运算的数 + * \param align 对齐因素 + * + * \code + * int size = TAU_ROUND_DOWN(15, 4); // size = 12 + * \endcode + */ +#define TAU_ROUND_DOWN(x, align) (((int)(x)/(align))*(align)) + +/** \brief 倍数向上舍入 */ +#define TAU_DIV_ROUND_UP(n, d) (((n) + (d)-1) / (d)) + +/** + * \brief 测试是否对齐 + * + * \param x 被运算的数 + * \param align 对齐因素，必须为2的乘方 + * + * \code + * if (TAU_ALIGNED(x, 4) { + * ; // x对齐 + * } else { + * ; // x不对齐 + * } + * \endcode + */ +#define TAU_ALIGNED(x, align) (((int)(x) & (align - 1)) == 0) + +/** \brief 将1字节BCD数据转换为16进制数据 */ +#define TAU_BCD_TO_HEX(val) (((val)&0x0f) + ((val) >> 4) * 10) + +/** \brief 将1字节16进制数据转换为BCD数据 */ +#define TAU_HEX_TO_BCD(val) ((((val) / 10) << 4) + (val) % 10) + +/** + * \brief 向上取整 + */ +#define TAU_CEIL(val) ceil(val) + + +/*! @brief Construct the version number for drivers. */ +#define MAKE_VERSION(major, minor, bugfix) (((major) << 16) | ((minor) << 8) | (bugfix)) + + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ +/* \brief 通用回调函数指针定义 */ +typedef void (*fcb_type)(void *data); + +#endif /* __TAU_COMMON_H */ diff --git a/src/common/tau_delay.h b/src/common/tau_delay.h new file mode 100644 index 0000000..b4a64ca --- /dev/null +++ b/src/common/tau_delay.h @@ -0,0 +1,34 @@ +/** + * File Name: tau_delay.h + * + * + * + * Author: Fortsense 3D Firmware Team + * + * Date: 2020/12/04 + * + * Project: Taurus + * + * Description: + * + * HISTORY: +**/ +#ifndef _DELAY_H_ +#define _DELAY_H_ +#include "stdint.h" + +/** +* @brief delay ms 函数,误差2%以内 +* @param ms:delay时长 +* @retval none +*/ +void delayMs(uint32_t ms); + +/** +* @brief delay us 函数,误差2%以内 +* @param us:delay时长 +* @retval none +*/ +void delayUs(uint32_t us); + +#endif diff --git a/src/common/tau_device_datatype.h b/src/common/tau_device_datatype.h new file mode 100644 index 0000000..99b2397 --- /dev/null +++ b/src/common/tau_device_datatype.h @@ -0,0 +1,167 @@ +/******************************************************************************* + * + * + * File: tau_device_datatype.h + * Description device datatype + * Version V0.1 + * Date 2020-12-04 + * Author kevin + *******************************************************************************/ + +#ifndef _TAU_DEVICE_DATATYPE_H_ +#define _TAU_DEVICE_DATATYPE_H_ + + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ + +#include "stdint.h" +#include "tau_common.h" + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ +/*! @brief 计算组状态码 */ +#define MAKE_STATUS(group, code) ((((group)*100) + (code))) + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ +/*! @brief 分组状态值 */ +enum _status_groups +{ + STATUS_GROUP_GENERIC = 0, + STATUS_GROUP_I2C = 1, + STATUS_GROUP_UART = 2, + STATUS_GROUP_SPI = 3, + kStatusGroup_Timer = 4, +}; + +/*! @brief 常用状态码 */ +enum _generic_status +{ + STATUS_SUCCESS = MAKE_STATUS(STATUS_GROUP_GENERIC, 0), + STATUS_FAIL = MAKE_STATUS(STATUS_GROUP_GENERIC, 1), + STATUS_READ_ONLY = MAKE_STATUS(STATUS_GROUP_GENERIC, 2), + STATUS_OUT_OF_RANGE = MAKE_STATUS(STATUS_GROUP_GENERIC, 3), + STATUS_INVALID_ARGUMENT = MAKE_STATUS(STATUS_GROUP_GENERIC, 4), + STATUS_TIME_OUT = MAKE_STATUS(STATUS_GROUP_GENERIC, 5), + STATUS_NO_TRANSFER_IN_PROGRESS = MAKE_STATUS(STATUS_GROUP_GENERIC, 6), +}; + +/*! + * @brief timer状态 + */ +typedef enum +{ + TIMER_STATUS_IDLE = MAKE_STATUS(kStatusGroup_Timer, 0), /*!< 空闲 */ + TIMER_STATUS_RUNNING = MAKE_STATUS(kStatusGroup_Timer, 1), /*!< 运行中 */ + TIMER_STATUS_TIMEOUT = MAKE_STATUS(kStatusGroup_Timer, 2), /*!< 超时 */ +} timer_status_e; + +/*! + * @brief system触发事件(中断/复位)模式 + */ +typedef enum +{ + DETECT_HIGH_LVL = 0, + DETECT_LOW_LVL, + DETECT_RISING_EDGE, + DETECT_FALLING_EDGE +} sys_cfg_trigger_e; + +/** +* @brief GPIO interrupt type +*/ +typedef enum +{ + TIMER_NUM0 = 0, + TIMER_NUM1, + TIMER_NUM2, + TIMER_NUM3, + TIMER_NUM_MAX +} timer_num_e; + +/** +* @brief GPIO interrupt type +*/ +typedef enum +{ + GPIO_INT_EXTI_INT0 = 0, + GPIO_INT_EXTI_INT1, + GPIO_INT_EXTI_INT2, + GPIO_INT_EXTI_INT3, + GPIO_INT_EXTI_INT4, + GPIO_INT_EXTI_INT5, + GPIO_INT_EXTI_INT6, + GPIO_INT_EXTI_INT7, + GPIO_INT_MAX +} gpio_int_e; + +/*! @brief PWMI中断类型 */ +typedef enum _pwm_int_type +{ + PWM_INT_HIGH_OVERFLOW = 0, + PWM_INT_LOW_OVERFLOW, + PWM_INT_TOTAL_OVERFLOW, + PWM_INT_HIGH_DONE, + PWM_INT_LOW_DONE, + PWM_INT_TOTAL_DONE, + PWM_INT_MAX +} pwm_int_type_e; + +/** +* @brief I2C chose +*/ +typedef enum +{ + I2C_SELECT_0 = 0, //常用slave + I2C_SELECT_1, //常用master +} i2c_select_e; + +/*! + * @brief 传输速度 + * @note + */ +typedef enum _i2c_rate +{ + I2C_RATE_STANDARD = 1, //100kHz + I2C_RATE_FAST, //400kHz + I2C_RATE_HIGH, //1MHz +} i2c_rate_e; + +/*! @brief DMA channel type */ +typedef enum +{ + DMA_CH0 = 0, /*!< SPIM */ + DMA_CH1 = 1, /*!< IIC0 */ + DMA_CH2 = 2, /*!< SPIS */ + DMA_CH3 = 3, /*!< IIC1 */ + DMA_CH4 = 4, /*!< SPI FLASH */ + DMA_CH5 = 5, /*!< UART */ +} dma_channel_e; + + +/*! @brief Type used for all status and error return values. */ + +typedef enum +{ + DISABLE = 0, + ENABLE = !DISABLE +} function_state_e; +/*!< @brief 用于返回状态和错误 */ +typedef int32_t status_t; + + + +/******************************************************************************* +* 4.Global variable extern declarations +*******************************************************************************/ + +#endif + diff --git a/src/common/tau_dsi_datatype.h b/src/common/tau_dsi_datatype.h new file mode 100644 index 0000000..fe706a4 --- /dev/null +++ b/src/common/tau_dsi_datatype.h @@ -0,0 +1,374 @@ +/******************************************************************************* +* +* +* File: tau_dsi_datatype.h +* Description: mipi dsi 通用头文件 +* Version: V0.1 +* Date: 2021-01-13 +* Author: lzy + *******************************************************************************/ + +#ifndef __MIPI_DSI_COMMON_H__ +#define __MIPI_DSI_COMMON_H__ + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "tau_common.h" + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ +#define DSC_PPS_SIZE 128 + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ +/** +* @brief Data Types for Peripheral-sourced Packets,From Mipi DSI Spec +*/ +typedef enum +{ + DSI_ACK_DT_ERROR = 0x02, + DSI_ACK_DT_EOTP = 0x08, + DSI_ACK_DT_GEN_SHORT_RESPONSE_1B = 0x11, + DSI_ACK_DT_GEN_SHORT_RESPONSE_2B = 0x12, + DSI_ACK_DT_GEN_LONG_RESPONSE = 0x1A, + DSI_ACK_DT_DSC_LONG_RESPONSE = 0x1C, + DSI_ACK_DT_DSC_SHORT_RESPONSE_1B = 0x21, + DSI_ACK_DT_DSC_SHORT_RESPONSE_2B = 0x22, + DSI_ACK_DT_MAX +} dsi_ack_data_type_e; + +/** +* @brief Software handle data types +*/ +typedef enum +{ + DSI_RECV_DT_PPS = 0x0A, //Picture Parameter Set + DSI_RECV_DT_GEN_WRITE_1B = 0x13, //Generic Short WRITE, 1 parameter + DSI_RECV_DT_GEN_WRITE_2B = 0x23, //Generic Short WRITE, 2 parameters + DSI_RECV_DT_GEN_READ_0B = 0x04, //Generic READ, no parameters + DSI_RECV_DT_GEN_READ_1B = 0x14, //Generic READ, 1 parameter + DSI_RECV_DT_GEN_READ_2B = 0x24, //Generic READ, 2 parameters + DSI_RECV_DT_DCS_WRITE_0B = 0x05, //DCS Short WRITE, no parameters + DSI_RECV_DT_DCS_WRITE_1B = 0x15, //DCS Short WRITE, 1 parameter + DSI_RECV_DT_DCS_READ_0B = 0x06, //DCS READ, no parameters + DSI_RECV_DT_GEN_WRITE_LONG = 0x29, //Generic Long Write + DSI_RECV_DT_DCS_WRITE_LONG = 0x39, //DCS Long Write/write_LUT Command Packet + DSI_RECV_DT_MAX +} dsi_data_type_e; + +typedef enum +{ + DCS_ENTER_IDLE_MODE = 0x39, + DCS_ENTER_INVERT_MODE = 0x21, + DCS_ENTER_NORMAL_MODE = 0x13, + DCS_ENTER_PARTIAL_MODE = 0x12, + DCS_ENTER_SLEEP_MODE = 0x10, + DCS_EXIT_IDLE_MODE = 0x38, + DCS_EXIT_INVERT_MODE = 0x20, + DCS_EXIT_SLEEP_MODE = 0x11, + DCS_GET_3D_CONTROL = 0x3F, + DCS_GET_ADDRESS_MODE = 0x0B, + DCS_GET_BLUE_CHANNEL = 0x08, + DCS_GET_COMPRESSION_MODE = 0x03, + DCS_GET_DIAGNOSTIC_RESULT = 0x0F, + DCS_GET_DISPLAY_MODE = 0x0D, + DCS_GET_GREEN_CHANNEL = 0x07, + DCS_GET_PIXEL_FORMAT = 0x0C, + DCS_GET_POWER_MODE = 0x0A, + DCS_GET_RED_CHANNEL = 0x06, + DCS_GET_SCANLINE = 0x45, + DCS_GET_SIGNAL_MODE = 0x0E, + DCS_NOP = 0x00, + DCS_READ_DDB_CONTINUE = 0xA8, + DCS_READ_DDB_START = 0xA1, + DCS_READ_MEMORY_CONTINUE = 0x3E, + DCS_READ_MEMORY_START = 0x2E, + DCS_SET_3D_CONTROL = 0x3D, + DCS_SET_ADDRESS_MODE = 0x36, + DCS_SET_COLUMN_ADDRESS = 0x2A, + DCS_SET_DISPLAY_OFF = 0x28, + DCS_SET_DISPLAY_ON = 0x29, + DCS_SET_GAMMA_CURVE = 0x26, + DCS_SET_PAGE_ADDRESS = 0x2B, + DCS_SET_PARTIAL_COLUMNS = 0x31, + DCS_SET_PARTIAL_ROWS = 0x30, + DCS_SET_PIXEL_FORMAT = 0x3A, + DCS_SET_SCROLL_AREA = 0x33, + DCS_SET_SCROLL_START = 0x37, + DCS_SET_TEAR_OFF = 0x34, + DCS_SET_TEAR_ON = 0x35, + DCS_SET_TEAR_SCANLINE = 0x44, + DCS_SET_VSYNC_TIMING = 0x40, + DCS_SOFT_RESET = 0x01, + DCS_WRITE_LUT = 0x2D, + DCS_WRITE_MEMORY_CONTINUE = 0x3C, + DCS_WRITE_MEMORY_START = 0x2C +} dsi_dcs_cmd_type_e; + +/** +* @brief video data transfer mode +*/ +typedef enum +{ + DSI_DATA_VIDEO_MODE = 0, + DSI_DATA_CMD_MODE = 1, + DSI_DATA_MODE_MAX +} dsi_video_data_mode_e; + +/** +* @brief dsi virtual channel +*/ +typedef enum +{ + DSI_VC_0 = 0, + DSI_VC_1 = 1, + DSI_VC_2 = 2, + DSI_VC_3 = 3, + DSI_VC_MAX +} dsi_virtual_channel_e; + +/** +* @brief video data mode +*/ +typedef enum +{ + DSI_FRAME_RATE_60HZ = 0, + DSI_FRAME_RATE_90HZ = 1, + DSI_FRAME_RATE_120HZ = 2, + DSI_FRAME_RATE_144HZ = 3, + DSI_FRAME_RATE_160HZ = 4, + DSI_FRAME_RATE_MAX +} dsi_video_frame_rate_e; + +/** +* @brief dsi rx color coding +*/ +typedef enum +{ + DSI_RGB565 = 1, + DSI_RGB666 = 2, /*!< 18 bbp(18bits per pixel) */ + DSI_RGB666_LOOSELY = 3, /*!< 24 bbp(24bits per pixel) */ + DSI_RGB888 = 4, /*!< 24 bbp(24bits per pixel) */ + DSI_RGB10_10_10 = 5, + DSI_RGB12_12_12 = 6, + DSI_YCbCr422_16 = 7, + DSI_PENTILE_16 = DSI_YCbCr422_16, + DSI_YCbCr422_20_LOOSELY = 8, + DSI_YCbCr422_24 = 9, + DSI_YCbCr420_12 = 10, + DSI_COLOR_CODE_MAX +} dsi_color_code_e; + +/** +* @brief dpi endianness type +*/ +typedef enum +{ + DPI_ENDIAN_RGB = 0, + DPI_ENDIAN_BGR +} dpi_endianness_type_e; + +/** +* @brief dpi polarity type +*/ +typedef enum +{ + DPI_SIG_ACTIVE_HIGH = 0, + DPI_SIG_ACTIVE_LOW = 1 +} dpi_polarity_e; + +/** +* @brief mipi lane number +*/ +typedef enum +{ + DSI_LANE_1 = 1, + DSI_LANE_2 = 2, + DSI_LANE_3 = 3, + DSI_LANE_4 = 4, + DSI_LANE_NUME_MAX +} dsi_lane_nume_e; + +/** +* @brief video mode +*/ +typedef enum +{ + DSI_NONBURST_PULSE = 0, + DSI_NONBURST_EVENT = 1, + DSI_BURST_MODE = 2, + DSI_VIDEO_MODE_MAX +} dsi_video_mode_type_e; + +/** +* @brief panel init cmd transfer type +*/ +typedef enum +{ + DSI_CMD_TX_HS = 0, + DSI_CMD_TX_LP = 1 +} dsi_tx_cmd_tx_type_e; + +/** +* @brief dpi tx vpg style +*/ +typedef enum +{ + TX_VPG_V_COLOR = 0, + TX_VPG_H_COLOR = 1, + TX_VPG_V_BER = 2, + TX_VPG_FLICKER = 3, + TX_VPG_CHESSBOARD = 4, + TX_VPG_MAX +} dsi_tx_vpg_style_e; + +#if defined(ISP_568) || defined(ISP_368) +/** +* @brief angle of rotation +*/ +typedef enum +{ + VIDOE_ROT_ANGLE_0 = 0, /* 不旋转 */ + VIDOE_ROT_ANGLE_90 = 1, /* 旋转90度 */ + VIDOE_ROT_ANGLE_180 = 2, /* 旋转180度 */ + VIDOE_ROT_ANGLE_270 = 3, /* 转转270度 */ + VIDOE_ROT_ANGLE_MAX +} video_rotate_angle_e; + +/** +* @brief mipi rx lane swap +*/ +typedef enum +{ + RX_LANE_ORDER_DEFAULT = 0x0, + RX_LANE_ORDER_3012 = RX_LANE_ORDER_DEFAULT, + RX_LANE_ORDER_3210 = 0x1, + RX_LANE_ORDER_MAX +} dsi_rx_lane_swap_e; + +/** +* @brief LTPO mode +*/ +typedef enum +{ + LTPO_MODE_NONE = 0, + LTPO_MODE_1 = 1, + LTPO_MODE_2 = 2, + LTPO_MODE_MAX +} ltpo_mode_e; + +/** +* @brief transform 基本信息 +*/ +typedef struct +{ + ltpo_mode_e ltpo; /* ltpo 模式 */ + bool mirror_en; /* 对video 做水平镜像标志位 */ + video_rotate_angle_e rot_angle; /* 对video 做旋转的角度 */ + dsi_video_data_mode_e dst_mode; /* mipi tx 输出video 数据传输模式(video/cmd mode) */ + dsi_rx_lane_swap_e rx_lane_swap; /* rx lane swap */ +} dsi_base_extra_info_t; +#endif + +/** +* @brief mipi P/N lane swap flag +* eg: pn_swap = RX_LANE_0_PN_SWAP | RX_LANE_CLK_PN_SWAP; +* 表示 lane0 与 CLK 的P跟N交换，其他lane不变 +*/ +typedef enum +{ + RX_LANE_0_PN_SWAP = 0x1, + RX_LANE_1_PN_SWAP = 0x2, + RX_LANE_2_PN_SWAP = 0x4, + RX_LANE_3_PN_SWAP = 0x8, + RX_LANE_CLK_PN_SWAP = 0x10 +} dsi_rx_lane_pn_swap_e; + +/** +* @brief error processing level +*/ +typedef enum +{ + ERR_HANDLE_NONE = 0, + ERR_HANDLE_L1 = 1, + ERR_HANDLE_L2 = 2, + ERR_HANDLE_L3 = 3, + ERR_HANDLE_MAX +} hal_err_handle_level_e; + +/** +* @brief transform 基本信息 +*/ +typedef struct +{ + uint32_t src_w; /* mipi rx 接收的 width */ + uint32_t src_h; /* mipi rx 接收的 height */ + uint32_t dst_w; /* mipi tx 发送的 width */ + uint32_t dst_h; /* mipi tx 发送的 height */ + dsi_video_frame_rate_e src_frate; /* mipi rx 接收的frame rate */ + dsi_video_data_mode_e src_mode; /* mipi rx 接收video 数据传输模式(video/cmd mode) */ + uint16_t pn_swap; /* mipi rx P/N swap标志位 */ +#if defined(ISP_568) || defined(ISP_368) + dsi_base_extra_info_t extra_info; /* ISP_568/ISP_368 新增功能配置 */ +#endif +} dsi_base_trans_info_t; + +/** +* @brief ccm系数 +*/ +typedef struct +{ + uint32_t coef_c00; + uint32_t coef_c01; + uint32_t coef_c02; + uint32_t coef_c10; + uint32_t coef_c11; + uint32_t coef_c12; + uint32_t coef_c20; + uint32_t coef_c21; + uint32_t coef_c22; +} ccm_coef_t; + +/** +* @brief video mode display timing +*/ +typedef struct +{ + uint32_t vsa; + uint32_t vbp; + uint32_t vact; + uint32_t vfp; + uint32_t hsa; + uint32_t hbp; + uint32_t hact; + uint32_t hfp; +} vid_disp_timing_t; + +/** +* @brief dpi极性配置 +*/ +typedef struct +{ + dpi_polarity_e vsync_active_level; //vsync极性 + dpi_polarity_e hsync_active_level; //hsync极性 + dpi_polarity_e dataen_active_level; //dataen极性 + dpi_polarity_e shutdown_active_level; //shutdown极性 + dpi_polarity_e colorm_active_level; //colorm极性 +} dpi_polarity_t; + +/** +* @brief hight performan mode level +*/ +typedef enum +{ + HIGHT_PERFORMAN_NONE = 0, + HIGHT_PERFORMAN_L1 = 1, + HIGHT_PERFORMAN_L2 = 2, + HIGHT_PERFORMAN_MAX +} hight_performan_mode_e; + + +#endif //__MIPI_DSI_COMMON_H__ diff --git a/src/common/tau_log.h b/src/common/tau_log.h new file mode 100644 index 0000000..80869a8 --- /dev/null +++ b/src/common/tau_log.h @@ -0,0 +1,108 @@ +/******************************************************************************* +* +* +* File: tau_log.h +* Description log file +* Version V0.1 +* Date 2020-12-08 +* Author linyw +*******************************************************************************/ +#ifndef _TAU_LOG_H_ +#define _TAU_LOG_H_ + + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include +#include +#include +#include "ArmCM0.h" +#if LOG_MODE_RTT + #include "SEGGER_RTT.h" +#endif +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ + +#ifdef LOG_TAG + #undef LOG_TAG +#endif +#define LOG_TAG "tau_log" +#define LOG_CURREN_LEVEL kLOG_LEVEL_NONE // kLOG_LEVEL_DBG /* 配置打印等级 TODO:每个模块可配置打印等级 */ + +/* + * Using the following three macros for conveniently logging. + */ +#if EDA_MODE +#define TAU_LOGD(format,...) +#define TAU_LOGI(format,...) +#define TAU_LOGE(format,...) +#else +#if LOG_MODE_RTT +#define TAU_LOGD(format,...) \ + do { \ + if (LOG_CURREN_LEVEL <= kLOG_LEVEL_DBG) { \ + SEGGER_RTT_printf(0,"[%s] (%04d) " format, LOG_TAG, __LINE__, ##__VA_ARGS__); \ + }; \ + } while (0) + + +#define TAU_LOGI(format,...) \ + do { \ + if (LOG_CURREN_LEVEL <= kLOG_LEVEL_INF) { \ + SEGGER_RTT_printf(0,"[%s] (%04d) " format, LOG_TAG, __LINE__, ##__VA_ARGS__); \ + }; \ + } while (0) + +#define TAU_LOGE(format,...) \ + do { \ + if (LOG_CURREN_LEVEL <= kLOG_LEVEL_ERR) { \ + SEGGER_RTT_printf(0,"error [%s] (%04d) " format, LOG_TAG, __LINE__, ##__VA_ARGS__); \ + }; \ + } while (0) +#else +#define TAU_LOGD(format,...) \ + do { \ + if (LOG_CURREN_LEVEL <= kLOG_LEVEL_DBG) { \ + LOG_printf("[%s] (%04d) " format, LOG_TAG, __LINE__, ##__VA_ARGS__); \ + }; \ + } while (0) + + +#define TAU_LOGI(format,...) \ + do { \ + if (LOG_CURREN_LEVEL <= kLOG_LEVEL_INF) { \ + LOG_printf("[%s] (%04d) " format, LOG_TAG, __LINE__, ##__VA_ARGS__); \ + }; \ + } while (0) + +#define TAU_LOGE(format,...) \ + do { \ + if (LOG_CURREN_LEVEL <= kLOG_LEVEL_ERR) { \ + LOG_printf("error [%s] (%04d) " format, LOG_TAG, __LINE__, ##__VA_ARGS__); \ + }; \ + } while (0) +#endif +#endif +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ +typedef enum +{ + kLOG_LEVEL_DBG = 0, + kLOG_LEVEL_INF, + kLOG_LEVEL_ERR, + kLOG_LEVEL_NONE /* 不打印任何参数 */ +} log_level_t; + +/******************************************************************************* +* 4.Global variable extern declarations +*******************************************************************************/ + +/******************************************************************************* +* 5.Global function prototypes +*******************************************************************************/ +void LOG_printf(const char *fmt, ...); + +#endif diff --git a/src/common/tau_operations.h b/src/common/tau_operations.h new file mode 100644 index 0000000..da2f90b --- /dev/null +++ b/src/common/tau_operations.h @@ -0,0 +1,229 @@ +/******************************************************************************* +* +* +* File: tau_operations.h +* Description 位操作与字节操作相关定义头文件 +* Version V0.1 +* Date 2020-09-07 +* Author lzy + *******************************************************************************/ +#ifndef __TAU_BYTEOPS_H +#define __TAU_BYTEOPS_H + +/** + * \name 通用位常数定义 + * @{ + */ + +/** \brief 长整数位数 */ +#ifndef TAU_BITS_PER_LONG + #define TAU_BITS_PER_LONG 32 +#endif + +/** \brief 字节位数 */ +#define TAU_BITS_PER_BYTE 8 + +/** @} */ + + +/******************************************************************************/ + +/** + * \name 通用位操作 + * @{ + */ + +/** \brief bit移位 + * TAU_BIT(2) is 0x4 + */ +#define TAU_BIT(bit) (1u << (bit)) + +/** \brief 值移位 + * TAU_SBF(0xFF, 8) is 0xff00 + */ +#define TAU_SBF(value, field) ((value) << (field)) + +/** \brief bit置位 + * TAU_BIT_SET(0, 8) is 0x100 + */ +#define TAU_BIT_SET(data, bit) ((data) |= TAU_BIT(bit)) + +/** \brief bit清零 + * TAU_BIT_CLR(0xFF, 2) is 0xfb + */ +#define TAU_BIT_CLR(data, bit) ((data) &= ~TAU_BIT(bit)) + +/** \brief bit置位, 根据 mask 指定的位 + * TAU_BIT_SET_MASK(0xF0F0, 0xF00) is 0xfff0 + */ +#define TAU_BIT_SET_MASK(data, mask) ((data) |= (mask)) + +/** \brief bit清零, 根据 mask 指定的位 + * TAU_BIT_CLR_MASK(0xFFFF, 0xFF00) is 0xff + */ +#define TAU_BIT_CLR_MASK(data, mask) ((data) &= ~(mask)) + +/** \brief bit翻转 + * TAU_BIT_TOGGLE(0xFFFF, 0) is 0xfffe + * TAU_BIT_TOGGLE(0x0000, 1) is 0x2 + */ +#define TAU_BIT_TOGGLE(data, bit) ((data) ^= TAU_BIT(bit)) + +/** \brief bit修改 + * TAU_BIT_MODIFY(0, 8, 1) is 0x100 + * TAU_BIT_MODIFY(0xFFFF, 1, 0) is 0xfffd + */ +#define TAU_BIT_MODIFY(data, bit, value) \ + ((value) ? TAU_BIT_SET(data, bit) : TAU_BIT_CLR(data, bit)) + +/** \brief 测试bit是否置位 + * TAU_BIT_ISSET(0xF0F1, 1) is 0 + * TAU_BIT_ISSET(0xF0F2, 1) is 2 + */ +#define TAU_BIT_ISSET(data, bit) ((data) & TAU_BIT(bit)) + +/** \brief 获取bit值 + * TAU_BIT_GET(0xF0F1, 1) is 0 + * TAU_BIT_GET(0xF0F2, 1) is 1 + */ +#define TAU_BIT_GET(data, bit) (TAU_BIT_ISSET(data, bit) ? 1 : 0) + +/** \brief 检测bit值 + * TAU_BIT_CHECK(0xF5FF, 4) is 1 + */ +#define TAU_BIT_CHECK(data, bit) \ + (((data) & TAU_BIT(bit)) ? 1 : 0) + +/** \brief 获取 n bits 掩码值 + * TAU_BITS_MASK(2) is 0x3 + */ +#define TAU_BITS_MASK(n) (~((~0u) << (n))) + +/** \brief 获取位段值 + * TAU_BITS_GET(0xF5FF, 0x0F00, 8) is 0x5 + */ +#define TAU_BITS_GET(data, mask, pos) \ + (((data) & (mask)) >> (pos)) + +/** \brief 获取位段值 + * TAU_BITS_CHECK(0xF5FF, 0x0F00) is 1 + */ +#define TAU_BITS_CHECK(data, mask) \ + (((data) & (mask)) ? 1 : 0) + +/** \brief 修改位段值 + * TAU_BITS_MODIFY(0xF5FF, 0x0FF0, 0x8A0) is 0xF8AF +*/ +#define TAU_BITS_MODIFY(data, clear_mask, set_mask) \ + (data) = (((data) & (~(clear_mask))) | (set_mask)) + +/** \brief 设置位段值 + * TAU_WRITE_REG32(0x05FF, 0xFFFA) is 0xFFFA +*/ +#define TAU_WRITE_REG32(data, value) ((data) = (value)) + +/** \brief 设置位段值 + * TAU_READ_REG32(0x05FF) is 0x05FF +*/ +#define TAU_READ_REG32(data) (data) + + +/** @} */ + +/******************************************************************************/ + +/** + * \brief 取2-byte整数的高位byte + * + * \par 示例 + * \code + * uint16_t a = 0x1234; + * uint16_t b; + * + * b = TAU_MSB(a); //b=0x12 + * \endcode + */ +#define TAU_MSB(x) (((x) >> 8) & 0xff) + +/** + * \brief 取2-byte整数的低位byte + * + * \par 示例 + * \code + * uint16_t a = 0x1234; + * uint16_t b; + * + * b = TAU_LSB(a); //b=0x34 + * \endcode + */ +#define TAU_LSB(x) ((x) & 0xff) + +/** + * \brief 取2-word整数的高位word + * + * \par 示例 + * \code + * uint32_t a = 0x12345678; + * uint32_t b; + * + * b = TAU_MSW(a); //b=0x1234 + * \endcode + */ +#define TAU_MSW(x) (((x) >> 16) & 0xffff) + +/** + * \brief 取2-word整数的低位word + * + * \par 示例 + * \code + * uint32_t a = 0x12345678; + * uint32_t b; + * + * b = TAU_LSW(a); //b=0x5678 + * \endcode + */ +#define TAU_LSW(x) ((x) & 0xffff) + +/** + * \brief 交换32-bit整数的高位word和低位word + * + * \par 示例 + * \code + * uint32_t a = 0x12345678; + * uint32_t b; + * + * b = TAU_WORDSWAP(a); //b=0x56781234 + * \endcode + */ +#define TAU_WORDSWAP(x) (TAU_MSW(x) | (TAU_LSW(x) << 16)) + +/** + * \brief 交换32-bit整数的字节顺序 + * + * \par 示例 + * \code + * uint32_t a = 0x12345678; + * uint32_t b; + * + * b = TAU_LONGSWAP(a); //b=0x78563412 + * \endcode + */ +#define TAU_LONGSWAP(x) ((TAU_LLSB(x) << 24) | \ + (TAU_LNLSB(x) << 16) | \ + (TAU_LNMSB(x) << 8) | \ + (TAU_LMSB(x))) + +#define TAU_LLSB(x) ((x) & 0xff) /**< \brief 取32bit整数第1个字节 */ +#define TAU_LNLSB(x) (((x) >> 8) & 0xff) /**< \brief 取32bit整数第2个字节 */ +#define TAU_LNMSB(x) (((x) >> 16) & 0xff) /**< \brief 取32bit整数第3个字节 */ +#define TAU_LMSB(x) (((x) >> 24) & 0xff) /**< \brief 取32bit整数第4个字节 */ +#define TAU_LNSB(x,n) (((x) >> ((n) * 8) ) & 0xff) /**< \brief 取32bit整数第n个字节 ,参数 0 - 3*/ + +/** + * @} + */ + +#endif /* __TAU_BYTEOPS_H */ + +/* end of file */ + diff --git a/src/sdk/CVWL308/lib/CVWL308.lib b/src/sdk/CVWL308/lib/CVWL308.lib new file mode 100644 index 0000000000000000000000000000000000000000..722ab020b9eef3b2588acc72063ed1e47494b229 GIT binary patch literal 657712 zcmeFa3w&Hhbw56L^_E|<>^QRH$4ZtR*|8nHC5JpDKQ@+QCywnnFNgJNccm3xN$cH} zA9>-VAq2`pfrL1L76X9>N@*H!e*uy<&`<(D=ual0O@Our0tqc`Q+^cEhLZpHoSC^h zclO@3;)K5bzx%N~d(QdJnVB>1xpQY4FN|g5sf%mR4||_hgOtC`|HI+--mcbO#_X#V zqU^guWRCsM{yTYCi2uTWPIQy_5C41VdEvYPf1&VCMajR5)`-yS`Agp+LcgiMPb?Op z>HPh9oe2FV{$BZz2nGC=)qhUB?!PzPEXq#zw`ZRyo9a>C+j>+~2K~MH2~l~vzuWE*m1pwzv7d^{*ZTKo z2eQ?|~1A>Nn!=Ps5^mI)C3gDyshz{%Yn;ivO{H*`uQ7ztZ2I^obh3 zzmt!Ono@r+>~bm!(h zZQWv8xLsSsaC9i0iw-7p`DlD-SdqE>M8+gDBZ?Y}jU_gX#lQhLpkz6F5+ntS# z<%W{k&0`74h>Q%4?@S&5aXBKwp=}%=&7_n0Bq4}N5i9UyYLnUQcs4pRHZ(3`nG72s zp3kPEGNxJK8djSH*pa-!9vMc|647`%88gv}og9k|!aA;&cq$p+AB|_@9ql%ABvIgy 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