diff --git a/project/ISP_568/ISP_568.uvprojx b/project/ISP_568/ISP_568.uvprojx index d112e1b..9c0df2a 100644 --- a/project/ISP_568/ISP_568.uvprojx +++ b/project/ISP_568/ISP_568.uvprojx @@ -50,7 +50,7 @@ 1 .\Objects\ - CVWL568_S21U_20230918 + CVWL568_S21U_20230921 1 0 1 diff --git a/project/ISP_568/Listings/CVWL568_S21U_20230921.map b/project/ISP_568/Listings/CVWL568_S21U_20230921.map new file mode 100644 index 0000000..5218615 --- /dev/null +++ b/project/ISP_568/Listings/CVWL568_S21U_20230921.map @@ -0,0 +1,5671 @@ +Component: ARM Compiler 5.06 update 6 (build 750) Tool: armlink [4d35ed] + +============================================================================== + +Section Cross References + + main.o(i.main) refers to board.o(i.board_Init) for board_Init + main.o(i.main) refers to ap_demo.o(i.ap_demo) for ap_demo + ap_demo.o(i.Gpio_swire_output) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + ap_demo.o(i.Gpio_swire_output) refers to tau_delay.o(i.delayMs) for delayMs + ap_demo.o(i.Gpio_swire_output) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + ap_demo.o(i.Gpio_swire_output) refers to tau_delay.o(i.delayUs) for delayUs + ap_demo.o(i.PWM_OUTPUT_TEST) refers to ap_demo.o(i.test_pwm_out_adjust) for test_pwm_out_adjust + ap_demo.o(i.PWM_OUTPUT_TEST) refers to tau_delay.o(i.delayMs) for delayMs + ap_demo.o(i.PWM_Task) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.PWM_Task) refers to app_tp_for_custom_s21u.o(.data) for Flag_blacklight_EN + ap_demo.o(i.PWM_Task) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_dcs_read) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) for hal_dsi_rx_ctrl_get_max_ret_size + ap_demo.o(i.ap_dcs_read) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) for hal_dsi_rx_ctrl_send_ack_cmd + ap_demo.o(i.ap_dcs_read) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_dcs_read) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_dcs_read) refers to app_tp_st_touch.o(i.ap_get_tp_calibration_status_01) for ap_get_tp_calibration_status_01 + ap_demo.o(i.ap_demo) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.open_mipi_rx) for open_mipi_rx + ap_demo.o(i.ap_demo) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_demo) refers to app_tp_transfer.o(i.app_tp_I2C_init) for app_tp_I2C_init + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.init_mipi_tx) for init_mipi_tx + ap_demo.o(i.ap_demo) refers to app_tp_transfer.o(i.app_tp_transfer_screen_start_init) for app_tp_transfer_screen_start_init + ap_demo.o(i.ap_demo) refers to app_tp_transfer.o(i.app_tp_init) for app_tp_init + ap_demo.o(i.ap_demo) refers to hal_timer.o(i.hal_timer_init) for hal_timer_init + ap_demo.o(i.ap_demo) refers to hal_timer.o(i.hal_timer_start) for hal_timer_start + ap_demo.o(i.ap_demo) refers to hal_swire.o(i.hal_swire_open) for hal_swire_open + ap_demo.o(i.ap_demo) refers to hal_swire.o(i.hal_swire_init) for hal_swire_init + ap_demo.o(i.ap_demo) refers to hal_swire.o(i.hal_swire_register_callback) for hal_swire_register_callback + ap_demo.o(i.ap_demo) refers to hal_swire.o(i.hal_swire_start) for hal_swire_start + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.init_panel) for init_panel + ap_demo.o(i.ap_demo) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) for hal_dsi_tx_ctrl_start + ap_demo.o(i.ap_demo) refers to tau_delay.o(i.delayMs) for delayMs + ap_demo.o(i.ap_demo) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.ap_demo) refers to hal_gpio.o(i.hal_gpio_set_ap_reset_int) for hal_gpio_set_ap_reset_int + ap_demo.o(i.ap_demo) refers to app_tp_transfer.o(i.app_tp_transfer_screen_start) for app_tp_transfer_screen_start + ap_demo.o(i.ap_demo) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.pps_updata_exec) for pps_updata_exec + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.tp_heartbeat_exec) for tp_heartbeat_exec + ap_demo.o(i.ap_demo) refers to app_tp_st_touch.o(i.app_tp_calibration_exec) for app_tp_calibration_exec + ap_demo.o(i.ap_demo) refers to app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_record_event_exec) for ap_tp_st_touch_scan_point_record_event_exec + ap_demo.o(i.ap_demo) refers to app_tp_transfer.o(i.app_tp_transfer_screen_int) for app_tp_transfer_screen_int + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.rx_restart_exec) for rx_restart_exec + ap_demo.o(i.ap_demo) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) for hal_dsi_rx_ctrl_dsc_async_handler + ap_demo.o(i.ap_demo) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) for hal_dsi_tx_ctrl_stop + ap_demo.o(i.ap_demo) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) for hal_dsi_tx_ctrl_deinit + ap_demo.o(i.ap_demo) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) for hal_dsi_rx_ctrl_stop + ap_demo.o(i.ap_demo) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) for hal_dsi_rx_ctrl_deinit + ap_demo.o(i.ap_demo) refers to hal_swire.o(i.hal_swire_deinit) for hal_swire_deinit + ap_demo.o(i.ap_demo) refers to hal_timer.o(i.hal_timer_stop) for hal_timer_stop + ap_demo.o(i.ap_demo) refers to hal_timer.o(i.hal_timer_deinit) for hal_timer_deinit + ap_demo.o(i.ap_demo) refers to hal_system.o(i.hal_system_set_vcc) for hal_system_set_vcc + ap_demo.o(i.ap_demo) refers to app_tp_for_custom_s21u.o(.data) for tp_sleep_count + ap_demo.o(i.ap_demo) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_demo) refers to app_tp_for_custom_s21u.o(.data) for g_tp_sleep_delay_count + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.soft_timer3_cb) for soft_timer3_cb + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.swire_callback) for swire_callback + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.swire_timer_callback) for swire_timer_callback + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.ap_reset_cb) for ap_reset_cb + ap_demo.o(i.ap_demo) refers to app_tp_for_custom_s21u.o(.data) for tp_sleep_in + ap_demo.o(i.ap_get_reg_df) refers to memcpya.o(.text) for __aeabi_memcpy4 + ap_demo.o(i.ap_get_reg_df) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) for hal_dsi_tx_ctrl_set_ccm + ap_demo.o(i.ap_get_reg_df) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_reset_cb) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + ap_demo.o(i.ap_reset_cb) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_reset_cb) refers to hal_system.o(i.hal_system_set_pvd) for hal_system_set_pvd + ap_demo.o(i.ap_reset_cb) refers to hal_system.o(i.hal_system_set_vcc) for hal_system_set_vcc + ap_demo.o(i.ap_set_backlight_51) refers to idiv.o(.text) for __aeabi_idivmod + ap_demo.o(i.ap_set_backlight_51) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.ap_set_display_off) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.ap_set_display_off) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_set_display_on) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_set_enter_sleep_mode) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) for hal_dsi_rx_ctrl_set_sw_tear_mode + ap_demo.o(i.ap_set_enter_sleep_mode) refers to ap_demo.o(i.Gpio_swire_output) for Gpio_swire_output + ap_demo.o(i.ap_set_enter_sleep_mode) refers to tau_delay.o(i.delayMs) for delayMs + ap_demo.o(i.ap_set_enter_sleep_mode) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.ap_set_enter_sleep_mode) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + ap_demo.o(i.ap_set_enter_sleep_mode) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_set_enter_sleep_mode) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_set_exit_sleep_mode) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_set_exit_sleep_mode) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_set_hbm_53) refers to app_tp_for_custom_s21u.o(.data) for g_tp_sleep_in + ap_demo.o(i.ap_update_frame_rate) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_tear_mode_ex) for hal_dsi_rx_ctrl_set_tear_mode_ex + ap_demo.o(i.ap_update_frame_rate) refers to ap_demo.o(.data) for .data + ap_demo.o(i.frame_start_cb) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.frame_start_cb) refers to ap_demo.o(.data) for .data + ap_demo.o(i.init_mipi_tx) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) for hal_dsi_tx_ctrl_create_handle + ap_demo.o(i.init_mipi_tx) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) for hal_dsi_tx_ctrl_init + ap_demo.o(i.init_mipi_tx) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) for hal_dsi_tx_ctrl_set_overwrite_rgb + ap_demo.o(i.init_mipi_tx) refers to ap_demo.o(.data) for .data + ap_demo.o(i.init_panel) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_panel_reset_pin) for hal_dsi_tx_ctrl_panel_reset_pin + ap_demo.o(i.init_panel) refers to tau_delay.o(i.delayMs) for delayMs + ap_demo.o(i.init_panel) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) for hal_dsi_tx_ctrl_enter_init_panel_mode + ap_demo.o(i.init_panel) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) for hal_dsi_tx_ctrl_write_array_cmd + ap_demo.o(i.init_panel) refers to tau_delay.o(i.delayUs) for delayUs + ap_demo.o(i.init_panel) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.init_panel) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + ap_demo.o(i.init_panel) refers to ap_demo.o(i.Gpio_swire_output) for Gpio_swire_output + ap_demo.o(i.init_panel) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) for hal_dsi_tx_ctrl_exit_init_panel_mode + ap_demo.o(i.init_panel) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.init_panel) refers to ap_demo.o(.constdata) for .constdata + ap_demo.o(i.open_mipi_rx) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) for hal_dsi_rx_ctrl_create_handle + ap_demo.o(i.open_mipi_rx) refers to memcpya.o(.text) for __aeabi_memcpy4 + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_pre_init_pps) for hal_dsi_rx_ctrl_pre_init_pps + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) for hal_dsi_rx_ctrl_init + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) for hal_dsi_rx_ctrl_set_cus_sync_line + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) for hal_dsi_rx_ctrl_set_cus_scld_filter + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) for hal_dsi_rx_ctrl_start + ap_demo.o(i.open_mipi_rx) refers to ap_demo.o(.data) for .data + ap_demo.o(i.open_mipi_rx) refers to ap_demo.o(.constdata) for .constdata + ap_demo.o(i.open_mipi_rx) refers to ap_demo.o(i.ap_dcs_read) for ap_dcs_read + ap_demo.o(i.open_mipi_rx) refers to ap_demo.o(i.pps_update_handle) for pps_update_handle + ap_demo.o(i.open_mipi_rx) refers to ap_demo.o(i.frame_start_cb) for frame_start_cb + ap_demo.o(i.pps_updata_exec) refers to hal_system.o(i.hal_system_get_tick) for hal_system_get_tick + ap_demo.o(i.pps_updata_exec) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.pps_updata_exec) refers to ap_demo.o(.data) for .data + ap_demo.o(i.pps_update_handle) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.pps_update_handle) refers to hal_system.o(i.hal_system_get_tick) for hal_system_get_tick + ap_demo.o(i.pps_update_handle) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution_ex) for hal_dsi_rx_ctrl_toggle_resolution_ex + ap_demo.o(i.pps_update_handle) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) for hal_dsi_rx_ctrl_set_cus_scld_filter + ap_demo.o(i.pps_update_handle) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.pps_update_handle) refers to ap_demo.o(.data) for .data + ap_demo.o(i.rx_restart_exec) refers to tau_delay.o(i.delayMs) for delayMs + ap_demo.o(i.rx_restart_exec) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.rx_restart_exec) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) for hal_dsi_rx_ctrl_restart + ap_demo.o(i.rx_restart_exec) refers to ap_demo.o(.data) for .data + ap_demo.o(i.soft_timer3_cb) refers to hal_timer.o(i.hal_timer_start) for hal_timer_start + ap_demo.o(i.soft_timer3_cb) refers to app_tp_for_custom_s21u.o(.data) for g_tp_sleep_delay_count + ap_demo.o(i.soft_timer3_cb) refers to app_tp_for_custom_s21u.o(.data) for tp_sleep_count + ap_demo.o(i.soft_timer3_cb) refers to ap_demo.o(.data) for .data + ap_demo.o(i.swire_callback) refers to hal_timer.o(i.hal_timer_start) for hal_timer_start + ap_demo.o(i.swire_callback) refers to ap_demo.o(i.swire_timer_callback) for swire_timer_callback + ap_demo.o(i.swire_timer_callback) refers to hal_swire.o(i.hal_swire_start) for hal_swire_start + ap_demo.o(i.swire_timer_callback) refers to ap_demo.o(.data) for .data + ap_demo.o(i.test_pwm_out_adjust) refers to uidiv.o(.text) for __aeabi_uidivmod + ap_demo.o(i.test_pwm_out_adjust) refers to hal_pwm.o(i.hal_pwm_out_init) for hal_pwm_out_init + ap_demo.o(i.test_pwm_out_adjust) refers to hal_pwm.o(i.hal_pwm_out_config_all) for hal_pwm_out_config_all + ap_demo.o(i.test_pwm_out_adjust) refers to hal_pwm.o(i.hal_pwm_out_sync_all) for hal_pwm_out_sync_all + ap_demo.o(i.tp_heartbeat_exec) refers to hal_gpio.o(i.hal_gpio_get_input_data) for hal_gpio_get_input_data + ap_demo.o(i.tp_heartbeat_exec) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.tp_heartbeat_exec) refers to app_tp_st_touch.o(i.ap_tp_st_touch_hardware_reset) for ap_tp_st_touch_hardware_reset + ap_demo.o(i.tp_heartbeat_exec) refers to app_tp_transfer.o(.data) for s_screen_init_complate + ap_demo.o(i.tp_heartbeat_exec) refers to ap_demo.o(.data) for .data + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_display_on) for ap_set_display_on + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_display_off) for ap_set_display_off + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_get_reg_df) for ap_get_reg_df + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_backlight_51) for ap_set_backlight_51 + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_update_frame_rate) for ap_update_frame_rate + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_hbm_53) for ap_set_hbm_53 + ap_demo.o(.constdata) refers to app_tp_st_touch.o(i.ap_set_tp_calibration_04) for ap_set_tp_calibration_04 + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_enter_sleep_mode) for ap_set_enter_sleep_mode + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_exit_sleep_mode) for ap_set_exit_sleep_mode + app_tp_transfer.o(i.ap_tp_st_touch_get_status) refers to app_tp_transfer.o(i.app_tp_m_read) for app_tp_m_read + app_tp_transfer.o(i.ap_tp_st_touch_get_status) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_transfer.o(i.ap_tp_st_touch_get_status) refers to app_tp_for_custom_s21u.o(.data) for screen_reg_int_data + app_tp_transfer.o(i.ap_tp_st_touch_get_status) refers to app_tp_transfer.o(.bss) for .bss + app_tp_transfer.o(i.app_tp_I2C_init) refers to hal_i2c_slave.o(i.hal_i2c_s_init) for hal_i2c_s_init + app_tp_transfer.o(i.app_tp_I2C_init) refers to hal_i2c_slave.o(i.hal_i2c_s_set_transfer) for hal_i2c_s_set_transfer + app_tp_transfer.o(i.app_tp_I2C_init) refers to hal_i2c_slave.o(i.hal_i2c_s_nonblocking_read) for hal_i2c_s_nonblocking_read + app_tp_transfer.o(i.app_tp_I2C_init) refers to app_tp_transfer.o(i.app_tp_i2cs_callback) for app_tp_i2cs_callback + app_tp_transfer.o(i.app_tp_I2C_init) refers to app_tp_transfer.o(.bss) for .bss + app_tp_transfer.o(i.app_tp_i2cs_callback) refers to app_tp_for_custom_s21u.o(i.app_tp_phone_analysis_data) for app_tp_phone_analysis_data + app_tp_transfer.o(i.app_tp_i2cs_callback) refers to app_tp_transfer.o(i.app_tp_s_read) for app_tp_s_read + app_tp_transfer.o(i.app_tp_i2cs_callback) refers to app_tp_transfer.o(i.app_tp_s_write) for app_tp_s_write + app_tp_transfer.o(i.app_tp_i2cs_callback) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.app_tp_i2cs_callback) refers to app_tp_transfer.o(.bss) for .bss + app_tp_transfer.o(i.app_tp_init) refers to hal_gpio.o(i.hal_gpio_ctrl_eint) for hal_gpio_ctrl_eint + app_tp_transfer.o(i.app_tp_init) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + app_tp_transfer.o(i.app_tp_init) refers to hal_gpio.o(i.hal_gpio_init_eint) for hal_gpio_init_eint + app_tp_transfer.o(i.app_tp_init) refers to hal_gpio.o(i.hal_gpio_reg_eint_cb) for hal_gpio_reg_eint_cb + app_tp_transfer.o(i.app_tp_init) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + app_tp_transfer.o(i.app_tp_init) refers to hal_i2c_master.o(i.hal_i2c_m_dma_init) for hal_i2c_m_dma_init + app_tp_transfer.o(i.app_tp_init) refers to app_tp_for_custom_s21u.o(.data) for g_screen_input_int_pad + app_tp_transfer.o(i.app_tp_init) refers to app_tp_transfer.o(i.app_tp_screen_int_callback) for app_tp_screen_int_callback + app_tp_transfer.o(i.app_tp_init) refers to app_tp_for_custom_s21u.o(.data) for g_phone_output_int_pad + app_tp_transfer.o(i.app_tp_m_read) refers to hal_i2c_master.o(i.hal_i2c_m_dma_read) for hal_i2c_m_dma_read + app_tp_transfer.o(i.app_tp_m_transfer_complate) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_transfer.o(i.app_tp_m_write) refers to hal_i2c_master.o(i.hal_i2c_m_dma_write) for hal_i2c_m_dma_write + app_tp_transfer.o(i.app_tp_phone_clear_reset_on) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.app_tp_phone_reset_on) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.app_tp_s_read) refers to hal_i2c_slave.o(i.hal_i2c_s_nonblocking_read) for hal_i2c_s_nonblocking_read + app_tp_transfer.o(i.app_tp_s_transfer_complate) refers to hal_i2c_slave.o(i.hal_i2c_s_write_complate) for hal_i2c_s_write_complate + app_tp_transfer.o(i.app_tp_s_transfer_complate) refers to hal_i2c_slave.o(i.hal_i2c_s_read_complate) for hal_i2c_s_read_complate + app_tp_transfer.o(i.app_tp_s_write) refers to hal_i2c_slave.o(i.hal_i2c_s_dma_write) for hal_i2c_s_dma_write + app_tp_transfer.o(i.app_tp_screen_init) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + app_tp_transfer.o(i.app_tp_screen_init) refers to tau_delay.o(i.delayUs) for delayUs + app_tp_transfer.o(i.app_tp_screen_init) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + app_tp_transfer.o(i.app_tp_screen_init) refers to tau_delay.o(i.delayMs) for delayMs + app_tp_transfer.o(i.app_tp_screen_init) refers to app_tp_for_custom_s21u.o(.data) for g_screen_input_rst_pad + app_tp_transfer.o(i.app_tp_screen_int_callback) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to hal_spi_master.o(i.hal_spi_m_clear_rxfifo) for hal_spi_m_clear_rxfifo + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to app_tp_transfer.o(i.app_tp_m_read) for app_tp_m_read + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to app_tp_transfer.o(i.app_tp_m_write) for app_tp_m_write + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to app_tp_for_custom_s21u.o(i.app_tp_screen_analysis_const) for app_tp_screen_analysis_const + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to tau_log.o(i.LOG_printf) for LOG_printf + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to app_tp_for_custom_s21u.o(.constdata) for screen_reg_start_data_size + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to app_tp_for_custom_s21u.o(.data) for screen_reg_start_data + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to app_tp_for_custom_s21u.o(.data) for g_screen_tp_init_start + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to app_tp_transfer.o(.bss) for .bss + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_transfer.o(i.app_tp_transfer_screen_restart) for app_tp_transfer_screen_restart + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_for_custom_s21u.o(i.app_tp_screen_analysis_wake_up_exec) for app_tp_screen_analysis_wake_up_exec + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_for_custom_s21u.o(i.app_tp_screen_analysis_int) for app_tp_screen_analysis_int + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_transfer.o(i.app_tp_transfer_screen_const) for app_tp_transfer_screen_const + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to hal_gpio.o(i.hal_gpio_get_input_data) for hal_gpio_get_input_data + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_transfer.o(i.app_tp_m_read) for app_tp_m_read + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_transfer.o(.bss) for .bss + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_for_custom_s21u.o(.data) for g_screen_input_int_pad + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_for_custom_s21u.o(.data) for screen_reg_int_data + app_tp_transfer.o(i.app_tp_transfer_screen_restart) refers to app_tp_st_touch.o(i.ap_tp_st_touch_hardware_reset) for ap_tp_st_touch_hardware_reset + app_tp_transfer.o(i.app_tp_transfer_screen_restart) refers to app_tp_for_custom_s21u.o(.data) for g_screen_tp_init_restart + app_tp_transfer.o(i.app_tp_transfer_screen_restart) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.app_tp_transfer_screen_start) refers to app_tp_transfer.o(i.app_tp_transfer_screen_const) for app_tp_transfer_screen_const + app_tp_transfer.o(i.app_tp_transfer_screen_start_init) refers to app_tp_transfer.o(i.app_tp_screen_init) for app_tp_screen_init + app_tp_transfer.o(i.app_tp_transfer_screen_start_init) refers to app_tp_transfer.o(.data) for .data + app_tp_st_touch.o(i.CRC16_2) refers to app_tp_st_touch.o(.constdata) for .constdata + app_tp_st_touch.o(i.ap_get_tp_calibration_status_01) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) for hal_dsi_rx_ctrl_send_ack_cmd + app_tp_st_touch.o(i.ap_get_tp_calibration_status_01) refers to app_tp_st_touch.o(.data) for .data + app_tp_st_touch.o(i.ap_set_tp_calibration_04) refers to memseta.o(.text) for __aeabi_memclr4 + app_tp_st_touch.o(i.ap_set_tp_calibration_04) refers to printfa.o(i.__0printf) for __2printf + app_tp_st_touch.o(i.ap_set_tp_calibration_04) refers to app_tp_st_touch.o(i.CRC16_2) for CRC16_2 + app_tp_st_touch.o(i.ap_set_tp_calibration_04) refers to app_tp_st_touch.o(.data) for .data + app_tp_st_touch.o(i.ap_tp_st_touch_calibration) refers to app_tp_transfer.o(i.app_tp_m_write) for app_tp_m_write + app_tp_st_touch.o(i.ap_tp_st_touch_calibration) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_st_touch.o(i.ap_tp_st_touch_calibration) refers to tau_delay.o(i.delayMs) for delayMs + app_tp_st_touch.o(i.ap_tp_st_touch_calibration) refers to app_tp_st_touch.o(.data) for .data + app_tp_st_touch.o(i.ap_tp_st_touch_error_handler_03) refers to app_tp_st_touch.o(i.ap_tp_st_touch_hardware_reset) for ap_tp_st_touch_hardware_reset + app_tp_st_touch.o(i.ap_tp_st_touch_error_handler_F3) refers to app_tp_st_touch.o(i.ap_tp_st_touch_hardware_reset) for ap_tp_st_touch_hardware_reset + app_tp_st_touch.o(i.ap_tp_st_touch_error_handler_FF) refers to app_tp_st_touch.o(i.ap_tp_st_touch_hardware_reset) for ap_tp_st_touch_hardware_reset + app_tp_st_touch.o(i.ap_tp_st_touch_get_calibration_success_mark) refers to memseta.o(.text) for __aeabi_memclr4 + app_tp_st_touch.o(i.ap_tp_st_touch_get_calibration_success_mark) refers to app_tp_transfer.o(i.app_tp_m_read) for app_tp_m_read + app_tp_st_touch.o(i.ap_tp_st_touch_get_calibration_success_mark) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_st_touch.o(i.ap_tp_st_touch_get_calibration_success_mark) refers to tau_delay.o(i.delayMs) for delayMs + app_tp_st_touch.o(i.ap_tp_st_touch_get_calibration_success_mark) refers to app_tp_transfer.o(i.app_tp_m_write) for app_tp_m_write + app_tp_st_touch.o(i.ap_tp_st_touch_get_calibration_success_mark) refers to app_tp_st_touch.o(.data) for .data + app_tp_st_touch.o(i.ap_tp_st_touch_hardware_reset) refers to tau_log.o(i.LOG_printf) for LOG_printf + app_tp_st_touch.o(i.ap_tp_st_touch_hardware_reset) refers to app_tp_st_touch.o(i.ap_tp_st_touch_simulate_finger_release_event) for ap_tp_st_touch_simulate_finger_release_event + app_tp_st_touch.o(i.ap_tp_st_touch_hardware_reset) refers to app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_init) for ap_tp_st_touch_scan_point_init + app_tp_st_touch.o(i.ap_tp_st_touch_hardware_reset) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + app_tp_st_touch.o(i.ap_tp_st_touch_hardware_reset) refers to tau_delay.o(i.delayMs) for delayMs + app_tp_st_touch.o(i.ap_tp_st_touch_hardware_reset) refers to app_tp_transfer.o(i.app_tp_m_write) for app_tp_m_write + app_tp_st_touch.o(i.ap_tp_st_touch_hardware_reset) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_st_touch.o(i.ap_tp_st_touch_hardware_reset) refers to app_tp_for_custom_s21u.o(.data) for g_screen_input_rst_pad + app_tp_st_touch.o(i.ap_tp_st_touch_hardware_reset) refers to app_tp_st_touch.o(.data) for .data + app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_init) refers to app_tp_st_touch.o(.bss) for .bss + app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_record_event) refers to app_tp_st_touch.o(.bss) for .bss + app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_record_event_exec) refers to printfa.o(i.__0printf) for __2printf + app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_record_event_exec) refers to app_tp_st_touch.o(i.ap_tp_st_touch_simulate_finger_release_event) for ap_tp_st_touch_simulate_finger_release_event + app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_record_event_exec) refers to app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_init) for ap_tp_st_touch_scan_point_init + app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_record_event_exec) refers to app_tp_st_touch.o(.bss) for .bss + app_tp_st_touch.o(i.ap_tp_st_touch_simulate_finger_release_event) refers to app_tp_for_custom_s21u.o(i.app_tp_screen_analysis_int) for app_tp_screen_analysis_int + app_tp_st_touch.o(i.ap_tp_st_touch_simulate_finger_release_event) refers to tau_delay.o(i.delayMs) for delayMs + app_tp_st_touch.o(i.ap_tp_st_touch_software_reset) refers to tau_log.o(i.LOG_printf) for LOG_printf + app_tp_st_touch.o(i.ap_tp_st_touch_software_reset) refers to app_tp_st_touch.o(i.ap_tp_st_touch_simulate_finger_release_event) for ap_tp_st_touch_simulate_finger_release_event + app_tp_st_touch.o(i.ap_tp_st_touch_software_reset) refers to app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_init) for ap_tp_st_touch_scan_point_init + app_tp_st_touch.o(i.ap_tp_st_touch_software_reset) refers to app_tp_transfer.o(i.app_tp_m_write) for app_tp_m_write + app_tp_st_touch.o(i.ap_tp_st_touch_software_reset) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_st_touch.o(i.ap_tp_st_touch_software_reset) refers to tau_delay.o(i.delayMs) for delayMs + app_tp_st_touch.o(i.ap_tp_st_touch_software_reset) refers to app_tp_st_touch.o(.data) for .data + app_tp_st_touch.o(i.app_tp_calibration_exec) refers to app_tp_st_touch.o(i.ap_tp_st_touch_calibration) for ap_tp_st_touch_calibration + app_tp_st_touch.o(i.app_tp_calibration_exec) refers to tau_delay.o(i.delayMs) for delayMs + app_tp_st_touch.o(i.app_tp_calibration_exec) refers to app_tp_st_touch.o(i.ap_tp_st_touch_get_calibration_success_mark) for ap_tp_st_touch_get_calibration_success_mark + app_tp_st_touch.o(i.app_tp_calibration_exec) refers to tau_log.o(i.LOG_printf) for LOG_printf + app_tp_st_touch.o(i.app_tp_calibration_exec) refers to app_tp_st_touch.o(.data) for .data + app_tp_for_custom_s21u.o(i.app_tp_phone_analysis_data) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + app_tp_for_custom_s21u.o(i.app_tp_phone_analysis_data) refers to app_tp_for_custom_s21u.o(.data) for .data + app_tp_for_custom_s21u.o(i.app_tp_screen_analysis_int) refers to app_tp_for_custom_s21u.o(i.app_tp_screen_analysis_wake_up) for app_tp_screen_analysis_wake_up + app_tp_for_custom_s21u.o(i.app_tp_screen_analysis_int) refers to ffltui.o(.text) for __aeabi_ui2f + app_tp_for_custom_s21u.o(i.app_tp_screen_analysis_int) refers to fmul.o(.text) for __aeabi_fmul + app_tp_for_custom_s21u.o(i.app_tp_screen_analysis_int) refers to fdiv.o(.text) for __aeabi_fdiv + app_tp_for_custom_s21u.o(i.app_tp_screen_analysis_int) refers to ffixui.o(.text) for __aeabi_f2uiz + app_tp_for_custom_s21u.o(i.app_tp_screen_analysis_int) refers to dfltui.o(.text) for __aeabi_ui2d + app_tp_for_custom_s21u.o(i.app_tp_screen_analysis_int) refers to dmul.o(.text) for __aeabi_dmul + app_tp_for_custom_s21u.o(i.app_tp_screen_analysis_int) refers to ddiv.o(.text) for __aeabi_ddiv + app_tp_for_custom_s21u.o(i.app_tp_screen_analysis_int) refers to dfixui.o(.text) for __aeabi_d2uiz + app_tp_for_custom_s21u.o(i.app_tp_screen_analysis_int) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + app_tp_for_custom_s21u.o(i.app_tp_screen_analysis_int) refers to app_tp_for_custom_s21u.o(.data) for .data + app_tp_for_custom_s21u.o(i.app_tp_screen_analysis_int) refers to app_tp_for_custom_s21u.o(.bss) for .bss + app_tp_for_custom_s21u.o(i.app_tp_screen_analysis_wake_up) refers to app_tp_for_custom_s21u.o(.bss) for .bss + app_tp_for_custom_s21u.o(i.app_tp_screen_analysis_wake_up) refers to app_tp_for_custom_s21u.o(.data) for .data + app_tp_for_custom_s21u.o(i.app_tp_screen_analysis_wake_up_exec) refers to tau_log.o(i.LOG_printf) for LOG_printf + app_tp_for_custom_s21u.o(i.app_tp_screen_analysis_wake_up_exec) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + app_tp_for_custom_s21u.o(i.app_tp_screen_analysis_wake_up_exec) refers to app_tp_for_custom_s21u.o(.data) for .data + app_tp_for_custom_s21u.o(i.app_tp_screen_analysis_wake_up_exec) refers to app_tp_for_custom_s21u.o(.bss) for .bss + app_tp_for_custom_s21u.o(.data) refers to app_tp_for_custom_s21u.o(.data) for screen_data_write_1 + app_tp_for_custom_s21u.o(.data) refers to app_tp_for_custom_s21u.o(.constdata) for screen_86_data + app_tp_for_custom_s21u.o(.data) refers to app_tp_for_custom_s21u.o(.constdata) for screen_a0_00_01_data + app_tp_for_custom_s21u.o(.data) refers to app_tp_for_custom_s21u.o(.constdata) for screen_a2_03_00_data + app_tp_for_custom_s21u.o(.data) refers to app_tp_for_custom_s21u.o(.constdata) for screen_a2_02_00_data + app_tp_for_custom_s21u.o(.data) refers to app_tp_for_custom_s21u.o(.constdata) for screen_c0_07_01_data + app_tp_for_custom_s21u.o(.data) refers to app_tp_for_custom_s21u.o(.data) for phone_reg_coord_data + app_tp_for_custom_s21u.o(.data) refers to app_tp_for_custom_s21u.o(.data) for phone_reg_coord_back + app_tp_for_custom_s21u.o(.data) refers to app_tp_for_custom_s21u.o(.constdata) for phone_60_start_back + app_tp_for_custom_s21u.o(.data) refers to app_tp_for_custom_s21u.o(.constdata) for phone_22_data + app_tp_for_custom_s21u.o(.data) refers to app_tp_for_custom_s21u.o(.constdata) for phone_22_back + app_tp_for_custom_s21u.o(.data) refers to app_tp_for_custom_s21u.o(.constdata) for phone_21_data + app_tp_for_custom_s21u.o(.data) refers to app_tp_for_custom_s21u.o(.constdata) for phone_21_back + board.o(i.board_Init) refers to hal_system.o(i.hal_system_init) for hal_system_init + board.o(i.board_Init) refers to hal_system.o(i.hal_system_enable_systick) for hal_system_enable_systick + board.o(i.board_Init) refers to hal_system.o(i.hal_system_init_console) for hal_system_init_console + board.o(i.board_Init) refers to hal_system.o(i.hal_system_set_phy_calibration) for hal_system_set_phy_calibration + startup_armcm0.o(RESET) refers to startup_armcm0.o(STACK) for __initial_sp + startup_armcm0.o(RESET) refers to startup_armcm0.o(.text) for Reset_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.HardFault_Handler) for HardFault_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.SysTick_Handler) for SysTick_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.VIDC_IRQn_Handler) for VIDC_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.LCDC_IRQn_Handler) for LCDC_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.MIPI_RX_IRQn_Handler) for MIPI_RX_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.MIPI_TX_IRQn_Handler) for MIPI_TX_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.MEMC_IRQn_Handler) for MEMC_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.VPRE_IRQn_Handler) for VPRE_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.FLSCTRL_IRQn_Handler) for FLSCTRL_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.DMA_IRQn_Handler) for DMA_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.TIMER0_IRQn_Handler) for TIMER0_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.TIMER1_IRQn_Handler) for TIMER1_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.TIMER2_IRQn_Handler) for TIMER2_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.TIMER3_IRQn_Handler) for TIMER3_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.WDG_IRQn_Handler) for WDG_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.UART_IRQn_Handler) for UART_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.I2C0_IRQn_Handler) for I2C0_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.I2C1_IRQn_Handler) for I2C1_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.SPIS_IRQn_Handler) for SPIS_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.SPIM_IRQn_Handler) for SPIM_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.ADC_IRQn_Handler) for ADC_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.PWMDET_IRQn_Handler) for PWMDET_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.SWIRE_IRQn_Handler) for SWIRE_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.AP_NRESET_IRQn_Handler) for AP_NRESET_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT0_IRQn_Handler) for EXTI_INT0_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT1_IRQn_Handler) for EXTI_INT1_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT2_IRQn_Handler) for EXTI_INT2_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT3_IRQn_Handler) for EXTI_INT3_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT4_IRQn_Handler) for EXTI_INT4_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT5_IRQn_Handler) for EXTI_INT5_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT6_IRQn_Handler) for EXTI_INT6_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT7_IRQn_Handler) for EXTI_INT7_IRQn_Handler + startup_armcm0.o(.text) refers to entry.o(.ARM.Collect$$$$00000000) for __main + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to dadd.o(.text) for __aeabi_dadd + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to drv_vidc.o(i.drv_vidc_set_scld_step) for drv_vidc_set_scld_step + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to drv_vidc.o(i.drv_vidc_set_module_enable) for drv_vidc_set_module_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) for hal_internal_vsync_get_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_dsc_dec.o(i.drv_dsc_dec_disable) for drv_dsc_dec_disable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) for drv_dsi_rx_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_rxbr.o(i.drv_rxbr_enable_irq) for drv_rxbr_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_vidc.o(i.drv_vidc_enable_irq) for drv_vidc_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_memc.o(i.drv_memc_enable_irq) for drv_memc_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) for hal_internal_vsync_get_tx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_config_reset_modules) for drv_crgu_config_reset_modules + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) for hal_internal_vsync_set_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_mode_init) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) refers to hal_internal_vsync.o(i.hal_internal_rx_dcs_async_handler) for hal_internal_rx_dcs_async_handler + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) refers to hal_internal_vsync.o(i.hal_internal_rx_dcs_polling) for hal_internal_rx_dcs_polling + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_pg_cfg) for drv_dsi_rx_set_ddi_pg_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_crgu.o(i.drv_crgu_set_rxbr_src) for drv_crgu_set_rxbr_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_crgu.o(i.drv_crgu_set_rxbr_div) for drv_crgu_set_rxbr_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_pg_cfg) for drv_dsi_rx_set_ipi_pg_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) refers to drv_memc.o(i.drv_memc_gen_a_tear_signal) for drv_memc_gen_a_tear_signal + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_compressen_en) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) for drv_dsi_rx_get_compression_en + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_max_ret_size) for drv_dsi_rx_get_max_ret_size + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) for hal_dsi_rx_ctrl_init_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_vsync_init_rx) for hal_internal_vsync_init_rx + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) for hal_dsi_rx_ctrl_init_dsi_rx + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) for hal_dsi_rx_ctrl_init_rxbr + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to drv_dsc_dec.o(i.drv_dsc_dec_enable) for drv_dsc_dec_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to drv_dsc_dec.o(i.drv_dsc_dec_set_u8_pps) for drv_dsc_dec_set_u8_pps + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to drv_dsc_dec.o(i.drv_dsc_dec_disable) for drv_dsc_dec_disable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) for hal_dsi_rx_ctrl_init_vidc + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) for hal_dsi_rx_ctrl_init_memc + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) for hal_internal_vsync_set_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to drv_chip_info.o(i.drv_chip_rx_init_done) for drv_chip_rx_init_done + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_efuse.o(i.drv_efuse_read) for drv_efuse_read + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_vidc_src) for drv_crgu_set_vidc_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_fb_src) for drv_crgu_set_fb_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_fb_div) for drv_crgu_set_fb_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) for hal_dsi_rx_ctrl_set_rxbr_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ctrl_cfg) for drv_dsi_rx_set_ctrl_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) for drv_dsi_rx_set_ddi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) for hal_dsi_rx_ctrl_set_ipi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) for drv_dsi_rx_set_up_phy + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_lane_swap) for drv_dsi_rx_set_lane_swap + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_inten) for drv_dsi_rx_set_inten + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_resp_cnt) for drv_dsi_rx_set_resp_cnt + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) for drv_dsi_rx_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_data_mode) for drv_memc_set_data_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_ltpo_mode) for drv_memc_set_ltpo_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_tear_waveform) for drv_memc_set_tear_waveform + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tear_mode) for hal_internal_vsync_get_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to hal_internal_vsync.o(i.hal_internal_check_video_auto_sync) for hal_internal_check_video_auto_sync + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_rate_transfer_sel) for drv_memc_rate_transfer_sel + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_fs_en_conditions) for drv_memc_set_fs_en_conditions + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_lcdc_st_conditions) for drv_memc_set_lcdc_st_conditions + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_sel_vsync) for drv_memc_sel_vsync + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_vidc_sync_cnt) for drv_memc_set_vidc_sync_cnt + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_double_buffer) for drv_memc_set_double_buffer + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_active_height) for drv_memc_set_active_height + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_inten) for drv_memc_set_inten + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_enable_irq) for drv_memc_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_color_format) for drv_rxbr_set_color_format + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) for drv_rxbr_frame_drop_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_ltpo_drop_th) for drv_rxbr_set_ltpo_drop_th + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_usr_cfg) for drv_rxbr_set_usr_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_usr_col) for drv_rxbr_set_usr_col + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_usr_row) for drv_rxbr_set_usr_row + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_hline_rcv_cfg) for drv_rxbr_hline_rcv_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_enable_irq) for drv_rxbr_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) for hal_internal_vsync_set_auto_hw_filter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_src_parameter) for drv_vidc_set_src_parameter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_pentile_swap) for drv_vidc_set_pentile_swap + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_dst_parameter) for drv_vidc_set_dst_parameter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_init_module_enable) for drv_vidc_init_module_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_rotation) for drv_vidc_set_rotation + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to dadd.o(.text) for __aeabi_dadd + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_step) for drv_vidc_set_scld_step + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_param_init.o(i.drv_param_init_get_scld_filter_h) for drv_param_init_get_scld_filter_h + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_param_init.o(i.drv_param_init_get_scld_filter_v) for drv_param_init_get_scld_filter_v + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_hcoef0) for drv_vidc_set_scld_hcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_hcoef1) for drv_vidc_set_scld_hcoef1 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_vcoef0) for drv_vidc_set_scld_vcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_vcoef1) for drv_vidc_set_scld_vcoef1 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_p2r_hinitr) for drv_vidc_set_p2r_hinitr + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_p2r_hinitb) for drv_vidc_set_p2r_hinitb + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_param_init.o(i.drv_param_p2r_filter_init) for drv_param_p2r_filter_init + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_p2r_hcoef0) for drv_vidc_set_p2r_hcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_mirror) for drv_vidc_set_mirror + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_pu_ctrl) for drv_vidc_set_pu_ctrl + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_irqen) for drv_vidc_set_irqen + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_enable_irq) for drv_vidc_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_pre_init_pps) refers to drv_dsc_dec.o(i.drv_dsc_dec_convert_pps_rc_parameter) for drv_dsc_dec_convert_pps_rc_parameter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_pre_init_pps) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_register_write_cmd_entry) refers to hal_internal_vsync.o(i.hal_internal_vsync_register_write_cmd_entry) for hal_internal_vsync_register_write_cmd_entry + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_release_handle) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to drv_dsi_rx.o(i.drv_dsi_rx_shut_down) for drv_dsi_rx_shut_down + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) for hal_dsi_rx_ctrl_init + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) for hal_internal_vsync_get_tx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) for hal_dsi_rx_ctrl_start + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) refers to drv_rxbr.o(i.drv_rxbr_set_ack_pkt_header) for drv_rxbr_set_ack_pkt_header + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) refers to hal_dsi_rx_ctrl.o(.conststring) for .conststring + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_auto_hw_filter) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) for hal_internal_vsync_set_auto_hw_filter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_auto_hw_filter) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) for drv_dsi_rx_set_ddi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to drv_vidc.o(i.drv_vidc_set_scld_hcoef0) for drv_vidc_set_scld_hcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to drv_vidc.o(i.drv_vidc_set_scld_hcoef1) for drv_vidc_set_scld_hcoef1 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to drv_vidc.o(i.drv_vidc_set_scld_vcoef0) for drv_vidc_set_scld_vcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to drv_vidc.o(i.drv_vidc_set_scld_vcoef1) for drv_vidc_set_scld_vcoef1 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to drv_param_init.o(i.drv_param_init_set_scld_filter) for drv_param_init_set_scld_filter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) for hal_internal_vsync_set_sync_line + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) refers to drv_rxbr.o(i.drv_rxbr_hline_rcv0_cfg) for drv_rxbr_hline_rcv0_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_dcs_direct_mode) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_dcs_direct_mode) for hal_internal_vsync_set_dcs_direct_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_cmd_filter) refers to drv_rxbr.o(i.drv_rxbr_set_cmd_filter) for drv_rxbr_set_cmd_filter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_cmd_filter) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) for hal_internal_vsync_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) refers to drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) for drv_dsi_rx_calc_ipi_tx_delay + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_cfg) for drv_dsi_rx_set_ipi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pentile_format) refers to drv_vidc.o(i.drv_vidc_update_src_format) for drv_vidc_update_src_format + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pentile_format) refers to drv_vidc.o(i.drv_vidc_set_pentile_swap) for drv_vidc_set_pentile_swap + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pentile_format) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to dflti.o(.text) for __aeabi_i2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to dmul.o(.text) for __aeabi_dmul + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to ddiv.o(.text) for __aeabi_ddiv + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to dfixi.o(.text) for __aeabi_d2iz + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rect_pixel_data) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rect_pixel_data) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rect_pixel_data) refers to dflti.o(.text) for __aeabi_i2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rect_pixel_data) refers to dmul.o(.text) for __aeabi_dmul + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rect_pixel_data) refers to ddiv.o(.text) for __aeabi_ddiv + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rect_pixel_data) refers to dfixi.o(.text) for __aeabi_d2iz + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) for hal_dsi_rx_ctrl_set_rxbr_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to hal_internal_soft_sync.o(i.hal_intl_svs_update_rxbr_clk) for hal_intl_svs_update_rxbr_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) for drv_dsi_rx_set_ddi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) for hal_dsi_rx_ctrl_set_ipi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_rxbr_src) for drv_crgu_set_rxbr_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_rxbr_div) for drv_crgu_set_rxbr_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_dsco_src) for drv_crgu_set_dsco_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_dsco_src_div) for drv_crgu_set_dsco_src_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_dsc_core_div) for drv_crgu_set_dsc_core_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) for hal_internal_vsync_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_te_waveform) refers to drv_memc.o(i.drv_memc_set_tear_waveform) for drv_memc_set_tear_waveform + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_te_waveform) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_tear_mode_ex) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) for hal_internal_vsync_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) refers to drv_dsi_rx.o(i.drv_dsi_rx_power_up) for drv_dsi_rx_power_up + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) for hal_internal_vsync_set_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) refers to drv_dsi_rx.o(i.drv_dsi_rx_shut_down) for drv_dsi_rx_shut_down + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) for hal_internal_vsync_set_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate) refers to hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) for hal_internal_vsync_toggle_input_frame_rate + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) refers to hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) for hal_internal_sync_input_resolution_change + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution_ex) refers to hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) for hal_internal_sync_input_resolution_change_ex + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution_ex) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to ffltui.o(.text) for __aeabi_ui2f + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to fscalb.o(.text) for __ARM_scalbnf + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to fdiv.o(.text) for __aeabi_fdiv + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to fmul.o(.text) for __aeabi_fmul + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to idiv.o(.text) for __aeabi_idivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to fflti.o(.text) for __aeabi_i2f + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to ffixi.o(.text) for __aeabi_f2iz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to f2d.o(.text) for __aeabi_f2d + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to ceil.o(i.ceil) for ceil + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to dfixi.o(.text) for __aeabi_d2iz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to fadd.o(.text) for __aeabi_fadd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_video_chunk) for drv_dsi_tx_set_video_chunk + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_video_timing) for drv_dsi_tx_set_video_timing + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) refers to fadd.o(.text) for __aeabi_fadd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to ffltui.o(.text) for __aeabi_ui2f + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to fmul.o(.text) for __aeabi_fmul + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to fdiv.o(.text) for __aeabi_fdiv + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to f2d.o(.text) for __aeabi_f2d + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to ceil.o(i.ceil) for ceil + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to drv_phy_common.o(i.drv_phy_get_rate_para) for drv_phy_get_rate_para + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to idiv.o(.text) for __aeabi_idivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to fadd.o(.text) for __aeabi_fadd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to ffixui.o(.text) for __aeabi_f2uiz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) for hal_internal_sync_get_hight_performan_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to hal_dsi_tx_ctrl.o(.conststring) for .conststring + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) for hal_lcdc_config_upscaler + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic) refers to drv_lcdc.o(i.drv_lcdc_config_src_parameter) for drv_lcdc_config_src_parameter + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic) refers to hal_internal_vsync.o(i.hal_internal_vsync_update_lcdc_addr) for hal_internal_vsync_update_lcdc_addr + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_cmd_mode_rcv_te) refers to hal_internal_vsync.o(i.hal_internal_sync_cmd_mode_rcv_te) for hal_internal_sync_cmd_mode_rcv_te + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_config_reset_modules) for drv_crgu_config_reset_modules + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to drv_param_init.o(i.drv_param_init_set_ccm) for drv_param_init_set_ccm + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to hal_dsi_tx_ctrl.o(.constdata) for .constdata + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to drv_memc.o(i.drv_memc_set_data_mode) for drv_memc_set_data_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) for hal_lcdc_config_upscaler + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) for hal_lcdc_config_remains + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_mode_init) for hal_dsi_tx_ctrl_draw_mode_init + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data) for hal_dsi_tx_ctrl_set_rect_pixel_data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to drv_memc.o(i.drv_memc_set_data_mode) for drv_memc_set_data_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) for hal_lcdc_config_upscaler + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) for hal_lcdc_config_remains + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_mode_init) for hal_dsi_tx_ctrl_draw_mode_init + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) for drv_dsi_tx_command_mode_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_mode) for drv_dsi_tx_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_ulps_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) for drv_dsi_tx_phy_ulps_enter + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) for drv_dsi_tx_command_mode_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_mode) for drv_dsi_tx_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_ulps_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) for drv_dsi_tx_phy_ulps_exit + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) for hal_dsi_tx_ctrl_init_clk + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_vsync_init_tx) for hal_internal_vsync_init_tx + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) for hal_dsi_tx_config_params_for_lane_rate + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) for hal_dsi_tx_count_lane_rate + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) for hal_dsi_tx_init_phy_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) for drv_dsi_tx_phy_test_setup + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) for hal_lcdc_init_clk + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) for hal_lcdc_init_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) for hal_dsi_tx_init_dpi_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) for hal_dsi_tx_init_data_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) for hal_dsi_tx_init_remains + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) for hal_dsi_tx_init_interrupt + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ready) for drv_dsi_tx_phy_status_ready + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to drv_dsi_tx.o(i.drv_dsi_tx_powerup) for drv_dsi_tx_powerup + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_panel_reset_pin) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) for hal_dsi_tx_send_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) for drv_dsi_tx_get_cmd_status + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_get_payload) for drv_dsi_tx_command_get_payload + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to memcpya.o(.text) for __aeabi_memcpy + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_release_handle) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) refers to drv_param_init.o(i.drv_param_init_set_ccm) for drv_param_init_set_ccm + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_cus_pq_filter) refers to drv_lcdc.o(i.drv_lcdc_config_scale_up_coef) for drv_lcdc_config_scale_up_coef + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_cus_pq_filter) refers to drv_param_init.o(i.drv_param_init_set_sclu_filter) for drv_param_init_set_sclu_filter + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_endianness) refers to drv_lcdc.o(i.drv_lcdc_config_endianness) for drv_lcdc_config_endianness + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_escape_clock_div) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) for drv_dsi_tx_set_esc_div + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_lp_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_video_mode_set_lp_cmd) for drv_dsi_tx_video_mode_set_lp_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite) for drv_lcdc_config_overwrite + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite_rgb) for drv_lcdc_config_overwrite_rgb + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp) refers to drv_lcdc.o(i.drv_lcdc_config_partial_display_enable) for drv_lcdc_config_partial_display_enable + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp_area) refers to drv_lcdc.o(i.drv_lcdc_config_partial_display_area) for drv_lcdc_config_partial_display_area + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data) refers to dflti.o(.text) for __aeabi_i2d + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data) refers to dmul.o(.text) for __aeabi_dmul + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data) refers to ddiv.o(.text) for __aeabi_ddiv + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data) refers to dfixi.o(.text) for __aeabi_d2iz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_vpg) for drv_dsi_tx_set_vpg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) for hal_dsi_tx_ctrl_draw_flicker + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) for hal_dsi_tx_ctrl_draw_chessboard + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) for drv_dsi_tx_config_eotp + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) for drv_dsi_tx_phy_clock_lane_req_hs + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_lcdc.o(i.drv_lcdc_enable_shadow_reg) for drv_lcdc_enable_shadow_reg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to hal_internal_vsync.o(i.hal_internal_check_video_auto_sync) for hal_internal_check_video_auto_sync + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite) for drv_lcdc_config_overwrite + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_lcdc.o(i.drv_lcdc_start) for drv_lcdc_start + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_lcdc.o(i.drv_lcdc_set_video_hw_mode) for drv_lcdc_set_video_hw_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to drv_lcdc.o(i.drv_lcdc_set_int) for drv_lcdc_set_int + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_int) for drv_dsi_tx_set_int + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to drv_dsi_tx.o(i.drv_dsi_tx_shutdown) for drv_dsi_tx_shutdown + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) for hal_internal_vsync_get_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) for hal_dsi_tx_send_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) for drv_dsi_tx_get_cmd_status + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) for drv_dsi_tx_command_put_payload + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) for hal_internal_vsync_get_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) for hal_dsi_tx_send_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) for drv_dsi_tx_get_cmd_status + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) for drv_dsi_tx_command_put_payload + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_mode) for drv_dsi_tx_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_edpi_cmd_size) for drv_dsi_tx_edpi_cmd_size + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) for hal_dsi_tx_init_video_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_dpi_mode) for drv_dsi_tx_dpi_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_dpi_polarity) for drv_dsi_tx_dpi_polarity + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_dpi_lpcmd_time) for drv_dsi_tx_dpi_lpcmd_time + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_int) for drv_dsi_tx_set_int + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) refers to drv_dsi_tx.o(i.drv_dsi_tx_config_int) for drv_dsi_tx_config_int + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_lane_mode) for drv_dsi_tx_phy_lane_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_time_cfg) for drv_dsi_tx_phy_time_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_response_mode) for drv_dsi_tx_response_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) for drv_dsi_tx_set_esc_div + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_time_out_div) for drv_dsi_tx_set_time_out_div + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_timeout_cfg) for drv_dsi_tx_timeout_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) for drv_dsi_tx_config_eotp + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) for drv_dsi_tx_phy_clock_lane_req_hs + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_auto_lp) for drv_dsi_tx_phy_clock_lane_auto_lp + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_video_mode_cfg) for drv_dsi_tx_video_mode_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_bta_ack) for drv_dsi_tx_set_bta_ack + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_video_mode_set_lp_cmd) for drv_dsi_tx_video_mode_set_lp_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_video_mode_disable_hact_cmd) for drv_dsi_tx_video_mode_disable_hact_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) for hal_dsi_tx_calc_video_chunks + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) for drv_dsi_tx_get_cmd_status + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_header) for drv_dsi_tx_command_header + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) for drv_dsi_tx_phy_status_stopstate + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) refers to drv_param_init.o(i.drv_param_init_get_ccm) for drv_param_init_get_ccm + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) refers to drv_lcdc.o(i.drv_lcdc_config_ccm) for drv_lcdc_config_ccm + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to hal_internal_vsync.o(i.hal_internal_check_video_auto_sync) for hal_internal_check_video_auto_sync + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_disp_mode) for drv_lcdc_config_disp_mode + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_edpi_mode) for drv_lcdc_config_edpi_mode + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_endianness) for drv_lcdc_config_endianness + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_thresh) for drv_lcdc_config_thresh + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_dpi_polarity) for drv_lcdc_config_dpi_polarity + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_src_parameter) for drv_lcdc_config_src_parameter + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_rgb_to_pentile) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to dadd.o(.text) for __aeabi_dadd + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp_area) for hal_dsi_tx_ctrl_set_partial_disp_area + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp) for hal_dsi_tx_ctrl_set_partial_disp + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to drv_lcdc.o(i.drv_lcdc_config_scale_up_step) for drv_lcdc_config_scale_up_step + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to drv_param_init.o(i.drv_param_init_get_sclu_filter) for drv_param_init_get_sclu_filter + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to drv_lcdc.o(i.drv_lcdc_config_scale_up_coef) for drv_lcdc_config_scale_up_coef + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) for hal_lcdc_config_upscaler + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) for hal_lcdc_config_ccm + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_rgb_to_pentile) for hal_lcdc_config_rgb_to_pentile + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) for hal_lcdc_config_remains + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) for hal_lcdc_init_interrupt + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to drv_lcdc.o(i.drv_lcdc_set_prefetch) for drv_lcdc_set_prefetch + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to ffltui.o(.text) for __aeabi_ui2f + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_dpi_pre_div) for drv_crgu_set_dpi_pre_div + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_dpi_pre_src) for drv_crgu_set_dpi_pre_src + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_dpi_mux_src) for drv_crgu_set_dpi_mux_src + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to fmul.o(.text) for __aeabi_fmul + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to fdiv.o(.text) for __aeabi_fdiv + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to f2d.o(.text) for __aeabi_f2d + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to ceil.o(i.ceil) for ceil + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_lcdc.o(i.drv_lcdc_config_dpi_timing) for drv_lcdc_config_dpi_timing + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to hal_internal_vsync.o(i.hal_internal_check_video_auto_sync) for hal_internal_check_video_auto_sync + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to hal_internal_soft_sync.o(i.hal_intl_svs_init_tx) for hal_intl_svs_init_tx + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to cfrcmple.o(.text) for __aeabi_cfrcmple + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to ffixi.o(.text) for __aeabi_f2iz + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to idiv.o(.text) for __aeabi_idivmod + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_lcdc_div) for drv_crgu_set_lcdc_div + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_lcdc_src) for drv_crgu_set_lcdc_src + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to hal_dsi_tx_ctrl.o(i.hal_tx_frame_rate_adjust) for hal_tx_frame_rate_adjust + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) for hal_internal_vsync_get_sync_line + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) refers to drv_lcdc.o(i.drv_lcdc_set_int) for drv_lcdc_set_int + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) refers to drv_lcdc.o(i.drv_lcdc_ctrl_flow) for drv_lcdc_ctrl_flow + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) refers to drv_lcdc.o(i.drv_lcdc_config_int) for drv_lcdc_config_int + hal_dsi_tx_ctrl.o(i.hal_tx_frame_rate_adjust) refers to cfcmple.o(.text) for __aeabi_cfcmple + hal_dsi_tx_ctrl.o(i.hal_tx_frame_rate_adjust) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) for hal_internal_vsync_get_tx_state + hal_dsi_tx_ctrl.o(i.hal_tx_frame_rate_adjust) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) for hal_dsi_tx_ctrl_init + hal_dsi_tx_ctrl.o(i.hal_tx_frame_rate_adjust) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_tx_frame_rate_adjust) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_gpio.o(i.hal_gpio_ctrl_eint) refers to drv_gpio.o(i.drv_gpio_set_int) for drv_gpio_set_int + hal_gpio.o(i.hal_gpio_ctrl_eint) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_get_input_data) refers to drv_gpio.o(i.drv_gpio_get_input_data) for drv_gpio_get_input_data + hal_gpio.o(i.hal_gpio_get_int_type) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_get_pull_state) refers to drv_gpio.o(i.drv_gpio_get_pull_state) for drv_gpio_get_pull_state + hal_gpio.o(i.hal_gpio_get_pull_state) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_init_eint) refers to drv_gpio.o(i.drv_gpio_set_ioe) for drv_gpio_set_ioe + hal_gpio.o(i.hal_gpio_init_eint) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_gpio.o(i.hal_gpio_init_eint) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_gpio_group) for drv_sys_cfg_sel_gpio_group + hal_gpio.o(i.hal_gpio_init_eint) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_int_trig) for drv_sys_cfg_sel_int_trig + hal_gpio.o(i.hal_gpio_init_eint) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_gpio.o(i.hal_gpio_init_eint) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_init_input) refers to drv_gpio.o(i.drv_gpio_set_ioe) for drv_gpio_set_ioe + hal_gpio.o(i.hal_gpio_init_input) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_gpio.o(i.hal_gpio_init_input) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_init_output) refers to hal_gpio.o(i.drv_gpio_set_output_data) for drv_gpio_set_output_data + hal_gpio.o(i.hal_gpio_init_output) refers to drv_gpio.o(i.drv_gpio_set_ioe) for drv_gpio_set_ioe + hal_gpio.o(i.hal_gpio_init_output) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_gpio.o(i.hal_gpio_init_output) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_reg_eint_cb) refers to drv_gpio.o(i.drv_gpio_register_callback) for drv_gpio_register_callback + hal_gpio.o(i.hal_gpio_reg_eint_cb) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_ap_reset_int) refers to drv_gpio.o(i.drv_gpio_register_ap_reset_callback) for drv_gpio_register_ap_reset_callback + hal_gpio.o(i.hal_gpio_set_ap_reset_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) for drv_sys_cfg_sel_ap_rst_trig + hal_gpio.o(i.hal_gpio_set_ap_reset_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_gpio.o(i.hal_gpio_set_ap_reset_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + hal_gpio.o(i.hal_gpio_set_driving_strength) refers to drv_gpio.o(i.drv_gpio_set_driving_strength) for drv_gpio_set_driving_strength + hal_gpio.o(i.hal_gpio_set_driving_strength) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_mode) refers to drv_gpio.o(i.drv_gpio_set_mode3) for drv_gpio_set_mode3 + hal_gpio.o(i.hal_gpio_set_mode) refers to drv_gpio.o(i.drv_gpio_set_mode2) for drv_gpio_set_mode2 + hal_gpio.o(i.hal_gpio_set_mode) refers to drv_gpio.o(i.drv_gpio_set_mode1) for drv_gpio_set_mode1 + hal_gpio.o(i.hal_gpio_set_mode) refers to drv_gpio.o(i.drv_gpio_set_mode0) for drv_gpio_set_mode0 + hal_gpio.o(i.hal_gpio_set_mode) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_output_data) refers to hal_gpio.o(i.drv_gpio_set_output_data) for drv_gpio_set_output_data + hal_gpio.o(i.hal_gpio_set_pull_state) refers to drv_gpio.o(i.drv_gpio_set_pull_state) for drv_gpio_set_pull_state + hal_gpio.o(i.hal_gpio_set_pull_state) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_schmitt_trigger) refers to drv_gpio.o(i.drv_gpio_set_schmitt_trigger) for drv_gpio_set_schmitt_trigger + hal_gpio.o(i.hal_gpio_set_schmitt_trigger) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_slew_rate) refers to drv_gpio.o(i.drv_gpio_set_slew_rate) for drv_gpio_set_slew_rate + hal_gpio.o(i.hal_gpio_set_slew_rate) refers to hal_gpio.o(.constdata) for .constdata + hal_i2c_master.o(i.hal_i2c_m_deinit) refers to drv_i2c_master.o(i.drv_i2c_m_deinit) for drv_i2c_m_deinit + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_master.o(i.drv_i2c_master_init) for drv_i2c_master_init + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_master.o(i.drv_i2c1_set_callback) for drv_i2c1_set_callback + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_master.o(i.drv_i2c_m_enable_intr) for drv_i2c_m_enable_intr + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_dma.o(i.drv_i2c_dma_init) for drv_i2c_dma_init + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_dma.o(i.drv_i2c_enable_rx_dma) for drv_i2c_enable_rx_dma + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_dma.o(i.drv_i2c_enable_tx_dma) for drv_i2c_enable_tx_dma + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to hal_i2c_master.o(i.hal_i2c_master_irq_callback) for hal_i2c_master_irq_callback + hal_i2c_master.o(i.hal_i2c_m_dma_read) refers to drv_i2c_dma.o(i.drv_i2c_master_read_dma) for drv_i2c_master_read_dma + hal_i2c_master.o(i.hal_i2c_m_dma_read) refers to hal_i2c_master.o(.data) for .data + hal_i2c_master.o(i.hal_i2c_m_dma_write) refers to drv_i2c_dma.o(i.drv_i2c_master_write_dma) for drv_i2c_master_write_dma + hal_i2c_master.o(i.hal_i2c_m_dma_write) refers to hal_i2c_master.o(.data) for .data + hal_i2c_master.o(i.hal_i2c_m_set_high_impedance) refers to drv_i2c_master.o(i.drv_i2c_m_enable) for drv_i2c_m_enable + hal_i2c_master.o(i.hal_i2c_m_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_i2c_master.o(i.hal_i2c_m_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + hal_i2c_master.o(i.hal_i2c_m_transfer_complate) refers to hal_i2c_master.o(.data) for .data + hal_i2c_master.o(i.hal_i2c_master_irq_callback) refers to drv_i2c_master.o(i.drv_i2c_m_clear_it_pending_bit) for drv_i2c_m_clear_it_pending_bit + hal_i2c_master.o(i.hal_i2c_master_irq_callback) refers to hal_i2c_master.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_deinit) refers to drv_i2c_slave.o(i.drv_i2c_s_set_intr) for drv_i2c_s_set_intr + hal_i2c_slave.o(i.hal_i2c_s_deinit) refers to drv_i2c_slave.o(i.drv_i2c_s_enable) for drv_i2c_s_enable + hal_i2c_slave.o(i.hal_i2c_s_deinit) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_i2c_slave.o(i.hal_i2c_s_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_i2c_slave.o(i.hal_i2c_s_deinit) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_deinit) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_i2c_slave.o(i.hal_i2c_s_dma_user_callback) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_dma_write) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + hal_i2c_slave.o(i.hal_i2c_s_dma_write) refers to drv_i2c_dma.o(i.drv_i2c_slave_write_dma) for drv_i2c_slave_write_dma + hal_i2c_slave.o(i.hal_i2c_s_dma_write) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_dma_write) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_i2c_slave.o(i.hal_i2c_s_get_tx_byte_num) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_i2c_slave.o(i.hal_i2c_s_init) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_slave.o(i.drv_i2c_slave_init) for drv_i2c_slave_init + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_master.o(i.drv_i2c1_set_callback) for drv_i2c1_set_callback + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_slave.o(i.drv_i2c_s_config_intr) for drv_i2c_s_config_intr + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_slave.o(i.drv_i2c_s_set_intr) for drv_i2c_s_set_intr + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_dma.o(i.drv_i2c_dma_init) for drv_i2c_dma_init + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) for drv_i2c_set_dma_irq_callback + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) for drv_sys_cfg_set_dma_tx_req + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_dma.o(i.drv_i2c_enable_tx_dma) for drv_i2c_enable_tx_dma + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_dma.o(i.drv_dma_enable_channel_interrupts) for drv_dma_enable_channel_interrupts + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_slave.o(i.drv_i2c0_set_callback) for drv_i2c0_set_callback + hal_i2c_slave.o(i.hal_i2c_s_init) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_init) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_i2c_slave.o(i.hal_i2c_s_init) refers to hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) for hal_i2c_slave_irq_callback + hal_i2c_slave.o(i.hal_i2c_s_init) refers to hal_i2c_slave.o(i.hal_i2c_s_dma_user_callback) for hal_i2c_s_dma_user_callback + hal_i2c_slave.o(i.hal_i2c_s_nonblocking_read) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_read_complate) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_read_complate_clear) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_read_data) refers to drv_i2c_slave.o(i.drv_i2c_s_read_data) for drv_i2c_s_read_data + hal_i2c_slave.o(i.hal_i2c_s_read_data) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_read_data) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_i2c_slave.o(i.hal_i2c_s_rxfifo_notempty) refers to drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) for drv_i2c_s_get_fifo_status + hal_i2c_slave.o(i.hal_i2c_s_rxfifo_notempty) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_rxfifo_notempty) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_i2c_slave.o(i.hal_i2c_s_sel) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_set_dma_tx_cycle) refers to drv_dma.o(i.drv_dma_enable_cycle) for drv_dma_enable_cycle + hal_i2c_slave.o(i.hal_i2c_s_set_dma_tx_cycle) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_set_dma_tx_cycle) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_i2c_slave.o(i.hal_i2c_s_set_high_impedance) refers to drv_i2c_slave.o(i.drv_i2c_s_enable) for drv_i2c_s_enable + hal_i2c_slave.o(i.hal_i2c_s_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_i2c_slave.o(i.hal_i2c_s_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + hal_i2c_slave.o(i.hal_i2c_s_set_high_impedance) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_set_high_impedance) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_i2c_slave.o(i.hal_i2c_s_set_transfer) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_write_complate) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_write_data) refers to drv_i2c_slave.o(i.drv_i2c_s_write_data) for drv_i2c_s_write_data + hal_i2c_slave.o(i.hal_i2c_s_write_data) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_write_data) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) for drv_i2c_s_get_fifo_status + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_i2c_slave.o(i.drv_i2c_s_clear_it_pending_bit) for drv_i2c_s_clear_it_pending_bit + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_i2c_slave.o(i.drv_i2c_s_write_data) for drv_i2c_s_write_data + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_pwm.o(i.hal_pwm_in_clear_int) refers to drv_pwm.o(i.drv_pwm_in_clear_pwm_int_all) for drv_pwm_in_clear_pwm_int_all + hal_pwm.o(i.hal_pwm_in_config_int) refers to drv_pwm.o(i.drv_pwm_in_set_pwm_int) for drv_pwm_in_set_pwm_int + hal_pwm.o(i.hal_pwm_in_ctrl_int) refers to drv_pwm.o(i.drv_pwm_in_set_sys_int) for drv_pwm_in_set_sys_int + hal_pwm.o(i.hal_pwm_in_deinit) refers to drv_pwm.o(i.drv_pwm_in_enable) for drv_pwm_in_enable + hal_pwm.o(i.hal_pwm_in_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_pwm.o(i.hal_pwm_in_get_current_count) refers to drv_pwm.o(i.drv_pwm_in_get_current_count) for drv_pwm_in_get_current_count + hal_pwm.o(i.hal_pwm_in_get_high_period) refers to drv_pwm.o(i.drv_pwm_in_get_high_period) for drv_pwm_in_get_high_period + hal_pwm.o(i.hal_pwm_in_get_high_period) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_pwm.o(i.hal_pwm_in_get_high_period) refers to drv_common.o(.data) for g_system_clock + hal_pwm.o(i.hal_pwm_in_get_low_period) refers to drv_pwm.o(i.drv_pwm_in_get_low_period) for drv_pwm_in_get_low_period + hal_pwm.o(i.hal_pwm_in_get_low_period) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_pwm.o(i.hal_pwm_in_get_low_period) refers to drv_common.o(.data) for g_system_clock + hal_pwm.o(i.hal_pwm_in_get_total_period) refers to drv_pwm.o(i.drv_pwm_in_get_counter_period) for drv_pwm_in_get_counter_period + hal_pwm.o(i.hal_pwm_in_get_total_period) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_pwm.o(i.hal_pwm_in_get_total_period) refers to drv_common.o(.data) for g_system_clock + hal_pwm.o(i.hal_pwm_in_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_pwm.o(i.hal_pwm_in_init) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_pwm.o(i.hal_pwm_in_init) refers to drv_pwm.o(i.drv_pwm_in_enable) for drv_pwm_in_enable + hal_pwm.o(i.hal_pwm_in_register_callback) refers to drv_pwm.o(i.drv_pwm_in_register_callback) for drv_pwm_in_register_callback + hal_pwm.o(i.hal_pwm_in_set_int) refers to drv_pwm.o(i.drv_pwm_in_set_pwm_int) for drv_pwm_in_set_pwm_int + hal_pwm.o(i.hal_pwm_out_common_config) refers to drv_pwm.o(i.drv_pwm_out_set_control) for drv_pwm_out_set_control + hal_pwm.o(i.hal_pwm_out_common_config) refers to drv_pwm.o(i.drv_pwm_out_set_threshold) for drv_pwm_out_set_threshold + hal_pwm.o(i.hal_pwm_out_common_config) refers to drv_pwm.o(i.drv_pwm_out_set_period) for drv_pwm_out_set_period + hal_pwm.o(i.hal_pwm_out_config_all) refers to hal_pwm.o(i.hal_pwm_out_convert_time) for hal_pwm_out_convert_time + hal_pwm.o(i.hal_pwm_out_config_duty_ratio) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_pwm.o(i.hal_pwm_out_config_duty_ratio) refers to hal_pwm.o(i.hal_pwm_out_convert_time) for hal_pwm_out_convert_time + hal_pwm.o(i.hal_pwm_out_config_duty_ratio) refers to drv_common.o(.data) for g_system_clock + hal_pwm.o(i.hal_pwm_out_convert_time) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_pwm.o(i.hal_pwm_out_convert_time) refers to hal_pwm.o(i.hal_pwm_out_common_config) for hal_pwm_out_common_config + hal_pwm.o(i.hal_pwm_out_convert_time) refers to drv_pwm.o(i.drv_pwm_out_set_sync_mode) for drv_pwm_out_set_sync_mode + hal_pwm.o(i.hal_pwm_out_convert_time) refers to drv_pwm.o(i.drv_pwm_out_enable) for drv_pwm_out_enable + hal_pwm.o(i.hal_pwm_out_convert_time) refers to drv_common.o(.data) for g_system_clock + hal_pwm.o(i.hal_pwm_out_convert_time) refers to hal_pwm.o(.data) for .data + hal_pwm.o(i.hal_pwm_out_deinit) refers to drv_pwm.o(i.drv_pwm_out_enable) for drv_pwm_out_enable + hal_pwm.o(i.hal_pwm_out_deinit) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_pwm.o(i.hal_pwm_out_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_pwm.o(i.hal_pwm_out_deinit) refers to hal_pwm.o(.data) for .data + hal_pwm.o(i.hal_pwm_out_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_pwm.o(i.hal_pwm_out_pause) refers to drv_pwm.o(i.drv_pwm_out_pause) for drv_pwm_out_pause + hal_pwm.o(i.hal_pwm_out_sel_io) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_pwm.o(i.hal_pwm_out_sync_all) refers to hal_pwm.o(i.hal_pwm_out_convert_time) for hal_pwm_out_convert_time + hal_pwm.o(i.hal_pwm_out_sync_ctl) refers to drv_pwm.o(i.drv_pwm_out_set_control) for drv_pwm_out_set_control + hal_pwm.o(i.hal_pwm_out_sync_pause) refers to drv_pwm.o(i.drv_pwm_out_pause) for drv_pwm_out_pause + hal_pwm.o(i.hal_pwm_out_sync_period) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_pwm.o(i.hal_pwm_out_sync_period) refers to drv_pwm.o(i.drv_pwm_out_set_period) for drv_pwm_out_set_period + hal_pwm.o(i.hal_pwm_out_sync_period) refers to drv_common.o(.data) for g_system_clock + hal_pwm.o(i.hal_pwm_out_sync_thr) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_pwm.o(i.hal_pwm_out_sync_thr) refers to drv_pwm.o(i.drv_pwm_out_set_threshold) for drv_pwm_out_set_threshold + hal_pwm.o(i.hal_pwm_out_sync_thr) refers to drv_common.o(.data) for g_system_clock + hal_spi_master.o(i.hal_spi_m_callback) refers to drv_spi_dma.o(i.drv_spi_abort_dma) for drv_spi_abort_dma + hal_spi_master.o(i.hal_spi_m_callback) refers to hal_spi_master.o(.data) for .data + hal_spi_master.o(i.hal_spi_m_clear_rxfifo) refers to drv_spi_master.o(i.drv_spi_m_read_data) for drv_spi_m_read_data + hal_spi_master.o(i.hal_spi_m_deinit) refers to drv_spi_master.o(i.drv_spi_m_deinit) for drv_spi_m_deinit + hal_spi_master.o(i.hal_spi_m_dma_init) refers to hal_spi_master.o(i.hal_spi_m_gpio_init) for hal_spi_m_gpio_init + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_master.o(i.drv_spi_master_init) for drv_spi_master_init + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_dma.o(i.drv_spi_dma_init) for drv_spi_dma_init + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_dma.o(i.drv_spi_dma_ch6_init) for drv_spi_dma_ch6_init + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) for drv_spi_set_dma_irq_callback + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) for drv_spi_set_dma_ch6_irq_callback + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) for drv_sys_cfg_set_dma_rx_req + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) for drv_sys_cfg_set_dma_tx_req + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_master.o(i.drv_spi_m_enable_rx_dma) for drv_spi_m_enable_rx_dma + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_master.o(i.drv_spi_m_enable_tx_dma) for drv_spi_m_enable_tx_dma + hal_spi_master.o(i.hal_spi_m_dma_init) refers to hal_spi_master.o(i.hal_spi_m_callback) for hal_spi_m_callback + hal_spi_master.o(i.hal_spi_m_dma_read) refers to drv_spi_dma.o(i.drv_spim_dma_read) for drv_spim_dma_read + hal_spi_master.o(i.hal_spi_m_dma_read) refers to hal_spi_master.o(.data) for .data + hal_spi_master.o(i.hal_spi_m_dma_write) refers to drv_spi_dma.o(i.drv_spim_dma_write) for drv_spim_dma_write + hal_spi_master.o(i.hal_spi_m_dma_write) refers to hal_spi_master.o(.data) for .data + hal_spi_master.o(i.hal_spi_m_get_transfer_complate) refers to hal_spi_master.o(.data) for .data + hal_spi_master.o(i.hal_spi_m_gpio_init) refers to drv_spi_master.o(i.drv_spi_m_gpio_init) for drv_spi_m_gpio_init + hal_spi_master.o(i.hal_spi_m_read_rxfifo) refers to drv_spi_master.o(i.drv_spi_m_read_data) for drv_spi_m_read_data + hal_spi_master.o(i.hal_spi_m_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_spi_master.o(i.hal_spi_m_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_init_input) for hal_gpio_init_input + hal_spi_master.o(i.hal_spi_m_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + hal_swire.o(i.hal_swire_deinit) refers to drv_swire.o(i.drv_swire_enable) for drv_swire_enable + hal_swire.o(i.hal_swire_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_swire.o(i.hal_swire_init) refers to drv_crgu.o(i.drv_crgu_set_swire_div) for drv_crgu_set_swire_div + hal_swire.o(i.hal_swire_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_swire.o(i.hal_swire_init) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_swire.o(i.hal_swire_init) refers to drv_swire.o(i.drv_swire_enable) for drv_swire_enable + hal_swire.o(i.hal_swire_open) refers to drv_swire.o(i.drv_swire_set_power_down) for drv_swire_set_power_down + hal_swire.o(i.hal_swire_register_callback) refers to drv_swire.o(i.drv_swire_register_callback) for drv_swire_register_callback + hal_swire.o(i.hal_swire_start) refers to drv_swire.o(i.drv_swire_set_int) for drv_swire_set_int + hal_swire.o(i.hal_swire_start) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_swire.o(i.hal_swire_start) refers to drv_swire.o(i.drv_swire_set_bit_time) for drv_swire_set_bit_time + hal_swire.o(i.hal_swire_start) refers to drv_swire.o(i.drv_swire_set_pulse_count) for drv_swire_set_pulse_count + hal_swire.o(i.hal_swire_start) refers to drv_common.o(.data) for g_system_clock + hal_system.o(i.hal_system_deep_sleep_mode) refers to drv_pwr.o(i.drv_pwr_enter_deep_sleep_mode) for drv_pwr_enter_deep_sleep_mode + hal_system.o(i.hal_system_disable_systick) refers to drv_common.o(i.drv_common_disable_systick) for drv_common_disable_systick + hal_system.o(i.hal_system_enable_systick) refers to drv_common.o(i.drv_common_enable_systick) for drv_common_enable_systick + hal_system.o(i.hal_system_get_tick) refers to drv_common.o(i.drv_common_get_tick) for drv_common_get_tick + hal_system.o(i.hal_system_idle_mode) refers to drv_common.o(i.drv_common_idle_mode) for drv_common_idle_mode + hal_system.o(i.hal_system_init) refers to drv_pwr.o(i.drv_pwr_set_system_clk_src) for drv_pwr_set_system_clk_src + hal_system.o(i.hal_system_init) refers to drv_crgu.o(i.drv_crgu_set_ahb_src) for drv_crgu_set_ahb_src + hal_system.o(i.hal_system_init) refers to drv_crgu.o(i.drv_crgu_set_ahb_pre_div) for drv_crgu_set_ahb_pre_div + hal_system.o(i.hal_system_init) refers to irq_redirect .o(i.handle_init) for handle_init + hal_system.o(i.hal_system_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_all_int) for drv_sys_cfg_clear_all_int + hal_system.o(i.hal_system_init) refers to drv_common.o(i.drv_common_system_init) for drv_common_system_init + hal_system.o(i.hal_system_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_system.o(i.hal_system_init) refers to drv_pwr.o(i.drv_pwr_set_pvd_mode) for drv_pwr_set_pvd_mode + hal_system.o(i.hal_system_init) refers to drv_common.o(.data) for g_system_clock + hal_system.o(i.hal_system_init_console) refers to hal_uart.o(i.hal_uart_init) for hal_uart_init + hal_system.o(i.hal_system_register_systick_cb) refers to drv_common.o(i.drv_common_systick_register_cb) for drv_common_systick_register_cb + hal_system.o(i.hal_system_set_phy_calibration) refers to drv_phy_common.o(i.drv_phy_enable_calibration) for drv_phy_enable_calibration + hal_system.o(i.hal_system_set_pvd) refers to drv_pwr.o(i.drv_pwr_set_pvd_mode) for drv_pwr_set_pvd_mode + hal_system.o(i.hal_system_set_vcc) refers to drv_pwr.o(i.drv_pwr_set_cp_mode) for drv_pwr_set_cp_mode + hal_system.o(i.hal_system_share_flash_mode) refers to drv_fls.o(i.drv_fls_gpio_connect) for drv_fls_gpio_connect + hal_system.o(i.hal_system_share_flash_mode) refers to drv_fls.o(i.drv_fls_gpio_disconnect) for drv_fls_gpio_disconnect + hal_system.o(i.hal_system_sleep_mode) refers to drv_crgu.o(i.drv_crgu_config_clocks) for drv_crgu_config_clocks + hal_timer.o(i.hal_timer_deinit) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + hal_timer.o(i.hal_timer_deinit) refers to drv_timer.o(i.drv_timer_set_repeat) for drv_timer_set_repeat + hal_timer.o(i.hal_timer_deinit) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_timer.o(i.hal_timer_deinit) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_timer.o(i.hal_timer_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_timer.o(i.hal_timer_get_status) refers to drv_timer.o(i.drv_timer_get_status) for drv_timer_get_status + hal_timer.o(i.hal_timer_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_timer.o(i.hal_timer_init) refers to drv_timer.o(i.drv_timer_set_prescaler) for drv_timer_set_prescaler + hal_timer.o(i.hal_timer_set_repeat) refers to drv_timer.o(i.drv_timer_set_repeat) for drv_timer_set_repeat + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_register_callback) for drv_timer_register_callback + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_get_prescaler) for drv_timer_get_prescaler + hal_timer.o(i.hal_timer_start) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_set_compare_val) for drv_timer_set_compare_val + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_timer.o(i.hal_timer_start) refers to drv_common.o(.data) for g_system_clock + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_register_callback) for drv_timer_register_callback + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_get_prescaler) for drv_timer_get_prescaler + hal_timer.o(i.hal_timer_start_ex) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_set_compare_val) for drv_timer_set_compare_val + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_timer.o(i.hal_timer_start_ex) refers to drv_common.o(.data) for g_system_clock + hal_timer.o(i.hal_timer_stop) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_timer.o(i.hal_timer_stop) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + hal_timer.o(i.hal_timer_stop) refers to drv_timer.o(i.drv_timer_register_callback) for drv_timer_register_callback + hal_timer.o(i.hal_timer_stop) refers to drv_timer.o(i.drv_timer_set_compare_val) for drv_timer_set_compare_val + tau_delay.o(i.delayMs) refers to tau_delay.o(i.delayUs) for delayUs + tau_log.o(i.LOG_printf) refers to printfa.o(i.__0vsprintf) for vsprintf + tau_log.o(i.LOG_printf) refers to printfa.o(i.__0printf) for __2printf + tau_log.o(i.LOG_printf) refers to tau_log.o(.bss) for .bss + tau_log.o(i.fgetc) refers to hal_uart.o(i.hal_uart_receive_blocking) for hal_uart_receive_blocking + tau_log.o(i.fputc) refers to hal_uart.o(i.hal_uart_transmit_blocking) for hal_uart_transmit_blocking + hal_uart.o(i.hal_uart_deinit) refers to drv_dma.o(i.drv_dma_deinit) for drv_dma_deinit + hal_uart.o(i.hal_uart_deinit) refers to drv_uart.o(i.UART_Deinit) for UART_Deinit + hal_uart.o(i.hal_uart_dmacallback) refers to hal_uart.o(.bss) for .bss + hal_uart.o(i.hal_uart_init) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_uart.o(i.hal_uart_init) refers to memseta.o(.text) for __aeabi_memclr4 + hal_uart.o(i.hal_uart_init) refers to drv_uart.o(i.UART_init) for UART_init + hal_uart.o(i.hal_uart_init) refers to drv_common.o(.data) for g_system_clock + hal_uart.o(i.hal_uart_init) refers to hal_uart.o(.bss) for .bss + hal_uart.o(i.hal_uart_receive_blocking) refers to drv_uart.o(i.UART_ReadBlocking) for UART_ReadBlocking + hal_uart.o(i.hal_uart_receive_dma) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + hal_uart.o(i.hal_uart_receive_dma) refers to drv_uart_dma.o(i.UART_TransferCreateHandleDMA) for UART_TransferCreateHandleDMA + hal_uart.o(i.hal_uart_receive_dma) refers to drv_uart_dma.o(i.UART_TransferReceiveDMA) for UART_TransferReceiveDMA + hal_uart.o(i.hal_uart_receive_dma) refers to hal_uart.o(.bss) for .bss + hal_uart.o(i.hal_uart_receive_dma) refers to hal_uart.o(i.hal_uart_dmacallback) for hal_uart_dmacallback + hal_uart.o(i.hal_uart_transmit_blocking) refers to drv_uart.o(i.UART_WriteBlocking) for UART_WriteBlocking + hal_uart.o(i.hal_uart_transmit_dma) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + hal_uart.o(i.hal_uart_transmit_dma) refers to drv_uart_dma.o(i.UART_TransferCreateHandleDMA) for UART_TransferCreateHandleDMA + hal_uart.o(i.hal_uart_transmit_dma) refers to drv_uart_dma.o(i.UART_TransferSendDMA) for UART_TransferSendDMA + hal_uart.o(i.hal_uart_transmit_dma) refers to hal_uart.o(.bss) for .bss + hal_uart.o(i.hal_uart_transmit_dma) refers to hal_uart.o(i.hal_uart_dmacallback) for hal_uart_dmacallback + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_param_init.o(i.drv_param_init_get_ccm) for drv_param_init_get_ccm + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_lcdc.o(i.drv_lcdc_config_ccm) for drv_lcdc_config_ccm + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) for hal_internal_sync_get_hight_performan_mode + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to dfltui.o(.text) for __aeabi_ui2d + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to ddiv.o(.text) for __aeabi_ddiv + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to sqrt.o(i.sqrt) for sqrt + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to dmul.o(.text) for __aeabi_dmul + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to cdcmple.o(.text) for __aeabi_cdcmple + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.check_pkt_buf_rev) refers to hal_internal_vsync.o(i.drv_rxbr_get_status0) for drv_rxbr_get_status0 + hal_internal_vsync.o(i.check_pkt_buf_rev) refers to drv_rxbr.o(i.drv_rxbr_get_pkt_buf_error_status) for drv_rxbr_get_pkt_buf_error_status + hal_internal_vsync.o(i.check_pkt_buf_rev) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.check_pkt_buf_rev) refers to drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) for drv_rxbr_clear_pkt_buffer + hal_internal_vsync.o(i.dcs_sw_filter) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.dcs_sw_filter) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_check_video_auto_sync) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_data_mode) for drv_memc_set_data_mode + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_tear_waveform) for drv_memc_set_tear_waveform + hal_internal_vsync.o(i.hal_internal_init_memc) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tear_mode) for hal_internal_vsync_get_tear_mode + hal_internal_vsync.o(i.hal_internal_init_memc) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_ltpo_mode) for drv_memc_set_ltpo_mode + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_double_buffer) for drv_memc_set_double_buffer + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_active_height) for drv_memc_set_active_height + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_inten) for drv_memc_set_inten + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_enable_irq) for drv_memc_enable_irq + hal_internal_vsync.o(i.hal_internal_init_memc) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_rx_dcs_async_handler) refers to dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) for dcs_packet_get_fifo_header + hal_internal_vsync.o(i.hal_internal_rx_dcs_async_handler) refers to dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) for dcs_packet_free_fifo_header + hal_internal_vsync.o(i.hal_internal_rx_dcs_polling) refers to hal_internal_vsync.o(i.drv_rxbr_get_status0) for drv_rxbr_get_status0 + hal_internal_vsync.o(i.hal_internal_rx_dcs_polling) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_bta_status) for drv_dsi_rx_get_bta_status + hal_internal_vsync.o(i.hal_internal_rx_dcs_polling) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_internal_vsync.o(i.hal_internal_rx_dcs_polling) refers to hal_internal_vsync.o(i.drv_rxbr_get_status1) for drv_rxbr_get_status1 + hal_internal_vsync.o(i.hal_internal_sync_cmd_mode_rcv_te) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_sync_cmd_mode_rcv_te) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite) for drv_lcdc_config_overwrite + hal_internal_vsync.o(i.hal_internal_sync_cmd_mode_rcv_te) refers to drv_lcdc.o(i.drv_lcdc_start) for drv_lcdc_start + hal_internal_vsync.o(i.hal_internal_sync_cmd_mode_rcv_te) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.hal_internal_sync_cmd_mode_rcv_te) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(i.calc_framebuffer_setting) for calc_framebuffer_setting + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_vidc.o(i.drv_vidc_reset) for drv_vidc_reset + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) for hal_dsi_rx_ctrl_init + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) for hal_dsi_tx_ctrl_init + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) for hal_dsi_rx_ctrl_start + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) for hal_dsi_rx_ctrl_gen_a_tear_signal + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to tau_delay.o(i.delayUs) for delayUs + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_dsi_tx.o(i.drv_dsi_tx_shutdown) for drv_dsi_tx_shutdown + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_crgu.o(i.drv_crgu_config_reset_modules) for drv_crgu_config_reset_modules + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(i.hal_internal_init_memc) for hal_internal_init_memc + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) for hal_dsi_tx_ctrl_start + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to hal_internal_vsync.o(i.calc_framebuffer_setting) for calc_framebuffer_setting + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to drv_vidc.o(i.drv_vidc_reset) for drv_vidc_reset + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) for hal_dsi_rx_ctrl_init + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) for hal_dsi_rx_ctrl_start + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to drv_lcdc.o(i.drv_lcdc_enable_shadow_reg) for drv_lcdc_enable_shadow_reg + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to tau_delay.o(i.delayMs) for delayMs + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) for hal_dsi_rx_ctrl_gen_a_tear_signal + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to tau_delay.o(i.delayUs) for delayUs + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) for hal_vsync_reset_lcdc_scaler + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to hal_internal_vsync.o(i.vsync_set_te_mode) for vsync_set_te_mode + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.hal_internal_vsync_deinit) refers to memseta.o(.text) for __aeabi_memclr4 + hal_internal_vsync.o(i.hal_internal_vsync_deinit) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_deinit) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_get_tear_mode) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to drv_chip_info.o(i.drv_chip_rx_info_check) for drv_chip_rx_info_check + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) for check_mipi_rx_tx_video_info + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.calc_framebuffer_setting) for calc_framebuffer_setting + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_soft_sync.o(i.hal_intl_svs_init_rx) for hal_intl_svs_init_rx + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to drv_rxbr.o(i.drv_rxbr_register_irq0_callback) for drv_rxbr_register_irq0_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to drv_rxbr.o(i.drv_rxbr_register_irq1_callback) for drv_rxbr_register_irq1_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to drv_vidc.o(i.drv_vidc_register_callback) for drv_vidc_register_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to dcs_packet_fifo.o(i.dcs_packet_fifo_init) for dcs_packet_fifo_init + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.soft_gen_te) for soft_gen_te + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.soft_gen_te_double_buffer) for soft_gen_te_double_buffer + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.rxbr_irq0_callback) for rxbr_irq0_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.rxbr_irq1_callback) for rxbr_irq1_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.vidc_callback) for vidc_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) for check_mipi_rx_tx_video_info + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to hal_internal_vsync.o(i.calc_framebuffer_setting) for calc_framebuffer_setting + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_register_write_cmd_entry) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) refers to memseta.o(.text) for __aeabi_memset + hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) refers to drv_rxbr.o(i.drv_rxbr_set_filter_regs) for drv_rxbr_set_filter_regs + hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_dcs_direct_mode) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) for hal_internal_vsync_set_auto_hw_filter + hal_internal_vsync.o(i.hal_internal_vsync_set_dcs_direct_mode) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) refers to hal_internal_vsync.o(i.hal_internal_vsync_deinit) for hal_internal_vsync_deinit + hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) refers to hal_internal_soft_sync.o(i.hal_intl_svs_deinit_tx) for hal_intl_svs_deinit_tx + hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) refers to ffltui.o(.text) for __aeabi_ui2f + hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) refers to fdiv.o(.text) for __aeabi_fdiv + hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) refers to hal_internal_soft_sync.o(i.hal_intl_svs_set_sync_coef) for hal_intl_svs_set_sync_coef + hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to hal_internal_vsync.o(i.vsync_set_te_mode) for vsync_set_te_mode + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to hal_internal_vsync.o(i.hal_internal_vsync_deinit) for hal_internal_vsync_deinit + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to hal_internal_soft_sync.o(i.hal_intl_svs_deinit_tx) for hal_intl_svs_deinit_tx + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite) for drv_lcdc_config_overwrite + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to hal_internal_vsync.o(i.vsync_set_te_mode) for vsync_set_te_mode + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to hal_internal_soft_sync.o(i.hal_intl_svs_set_input_frate) for hal_intl_svs_set_input_frate + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_memc.o(i.drv_memc_rate_transfer_sel) for drv_memc_rate_transfer_sel + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_memc.o(i.drv_memc_sel_vsync) for drv_memc_sel_vsync + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) for drv_rxbr_frame_drop_cfg + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_rxbr.o(i.drv_rxbr_hline_rcv0_cfg) for drv_rxbr_hline_rcv0_cfg + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_update_lcdc_addr) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to dfltui.o(.text) for __aeabi_ui2d + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to dadd.o(.text) for __aeabi_dadd + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp_area) for hal_dsi_tx_ctrl_set_partial_disp_area + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp) for hal_dsi_tx_ctrl_set_partial_disp + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to drv_param_init.o(i.drv_param_init_get_sclu_filter) for drv_param_init_get_sclu_filter + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to drv_lcdc.o(i.drv_lcdc_config_scale_up_coef) for drv_lcdc_config_scale_up_coef + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to drv_crgu.o(i.drv_crgu_config_reset_modules) for drv_crgu_config_reset_modules + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) for hal_dsi_tx_ctrl_init + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to hal_internal_vsync.o(i.hal_internal_init_memc) for hal_internal_init_memc + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) for hal_dsi_tx_ctrl_start + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to hal_internal_vsync.o(i.dcs_sw_filter) for dcs_sw_filter + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) for dcs_packet_fifo_alloc + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to hal_internal_vsync.o(i.hal_internal_rx_dcs_async_handler) for hal_internal_rx_dcs_async_handler + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to hal_internal_vsync.o(i.check_pkt_buf_rev) for check_pkt_buf_rev + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) for drv_dsi_tx_command_put_payload + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rx_partial_update) refers to drv_rxbr.o(i.drv_rxbr_get_col_addr) for drv_rxbr_get_col_addr + hal_internal_vsync.o(i.rx_partial_update) refers to drv_rxbr.o(i.drv_rxbr_get_page_addr) for drv_rxbr_get_page_addr + hal_internal_vsync.o(i.rx_partial_update) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.rx_partial_update) refers to drv_dsc_dec.o(i.drv_dsc_dec_get_nslc) for drv_dsc_dec_get_nslc + hal_internal_vsync.o(i.rx_partial_update) refers to drv_crgu.o(i.drv_crgu_set_dsco_src) for drv_crgu_set_dsco_src + hal_internal_vsync.o(i.rx_partial_update) refers to drv_crgu.o(i.drv_crgu_set_dsco_src_div) for drv_crgu_set_dsco_src_div + hal_internal_vsync.o(i.rx_partial_update) refers to drv_crgu.o(i.drv_crgu_set_dsc_core_div) for drv_crgu_set_dsc_core_div + hal_internal_vsync.o(i.rx_partial_update) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.rx_partial_update) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rx_receive_packet) refers to hal_internal_vsync.o(i.rx_get_dcs_packet_data) for rx_get_dcs_packet_data + hal_internal_vsync.o(i.rx_receive_packet) refers to hal_internal_vsync.o(i.rx_receive_pps) for rx_receive_pps + hal_internal_vsync.o(i.rx_receive_packet) refers to hal_internal_vsync.o(i.drv_rxbr_get_status1) for drv_rxbr_get_status1 + hal_internal_vsync.o(i.rx_receive_packet) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_bta_status) for drv_dsi_rx_get_bta_status + hal_internal_vsync.o(i.rx_receive_packet) refers to drv_rxbr.o(i.drv_rxbr_get_pkt_buf_error_status) for drv_rxbr_get_pkt_buf_error_status + hal_internal_vsync.o(i.rx_receive_packet) refers to drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) for drv_rxbr_clear_pkt_buffer + hal_internal_vsync.o(i.rx_receive_packet) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.rx_receive_packet) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rx_receive_pps) refers to memseta.o(.text) for __aeabi_memclr4 + hal_internal_vsync.o(i.rx_receive_pps) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.rx_receive_pps) refers to drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) for drv_rxbr_clear_pkt_buffer + hal_internal_vsync.o(i.rx_receive_pps) refers to hal_internal_vsync.o(i.check_pkt_buf_rev) for check_pkt_buf_rev + hal_internal_vsync.o(i.rx_receive_pps) refers to drv_dsc_dec.o(i.drv_dsc_dec_convert_pps_rc_parameter) for drv_dsc_dec_convert_pps_rc_parameter + hal_internal_vsync.o(i.rx_receive_pps) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.rx_receive_pps) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) for drv_dsi_rx_get_compression_en + hal_internal_vsync.o(i.rx_receive_pps) refers to drv_dsc_dec.o(i.drv_dsc_dec_enable) for drv_dsc_dec_enable + hal_internal_vsync.o(i.rx_receive_pps) refers to drv_dsc_dec.o(i.drv_dsc_dec_set_u8_pps) for drv_dsc_dec_set_u8_pps + hal_internal_vsync.o(i.rx_receive_pps) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.rx_receive_pps) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to hal_internal_vsync.o(i.drv_rxbr_get_int_source) for drv_rxbr_get_int_source + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to hal_internal_vsync.o(i.rx_receive_packet) for rx_receive_packet + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to hal_internal_vsync.o(i.vpre_err_reset) for vpre_err_reset + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to hal_internal_vsync.o(i.drv_rxbr_get_status0) for drv_rxbr_get_status0 + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to hal_internal_vsync.o(i.rx_partial_update) for rx_partial_update + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(i.drv_rxbr_get_int_source) for drv_rxbr_get_int_source + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_soft_sync.o(i.hal_intl_svs_handle) for hal_intl_svs_handle + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(i.vpre_err_reset) for vpre_err_reset + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) for drv_dsi_tx_phy_clock_lane_req_hs + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to drv_lcdc.o(i.drv_lcdc_start) for drv_lcdc_start + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to drv_memc.o(i.drv_memc_set_double_buffer_reverse) for drv_memc_set_double_buffer_reverse + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) for drv_rxbr_clear_pkt_buffer + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.soft_gen_te) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.soft_gen_te) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.soft_gen_te_double_buffer) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.soft_gen_te_double_buffer) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.vidc_callback) refers to drv_vidc.o(i.drv_vidc_get_irq_status) for drv_vidc_get_irq_status + hal_internal_vsync.o(i.vidc_callback) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite) for drv_lcdc_config_overwrite + hal_internal_vsync.o(i.vidc_callback) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_internal_vsync.o(i.vidc_callback) refers to drv_vidc.o(i.drv_vidc_clear_irq) for drv_vidc_clear_irq + hal_internal_vsync.o(i.vidc_callback) refers to drv_vidc.o(i.drv_vidc_set_irqen) for drv_vidc_set_irqen + hal_internal_vsync.o(i.vidc_callback) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.vidc_callback) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.vidc_callback) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.vpre_err_reset) refers to drv_crgu.o(i.drv_crgu_config_reset_modules) for drv_crgu_config_reset_modules + hal_internal_vsync.o(i.vpre_err_reset) refers to drv_vidc.o(i.drv_vidc_reset) for drv_vidc_reset + hal_internal_vsync.o(i.vpre_err_reset) refers to drv_dsc_dec.o(i.drv_dsc_dec_set_u8_pps) for drv_dsc_dec_set_u8_pps + hal_internal_vsync.o(i.vpre_err_reset) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.vsync_set_te_mode) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_internal_vsync.o(i.vsync_set_te_mode) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_internal_vsync.o(i.vsync_set_te_mode) refers to drv_lcdc.o(i.drv_lcdc_ctrl_flow) for drv_lcdc_ctrl_flow + hal_internal_vsync.o(i.vsync_set_te_mode) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.vsync_set_te_mode) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.vsync_set_te_mode) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.vsync_set_te_mode) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(.data) refers to hal_internal_vsync.o(.bss) for sg_te_info + drv_common.o(i.app_HardFault_Handler) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_common.o(i.app_SysTick_Handler) refers to drv_common.o(.data) for .data + drv_common.o(i.drv_common_enable_systick) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_common.o(i.drv_common_enable_systick) refers to drv_common.o(.data) for .data + drv_common.o(i.drv_common_get_tick) refers to drv_common.o(.data) for .data + drv_common.o(i.drv_common_system_init) refers to drv_chip_info.o(i.drv_chip_info_init) for drv_chip_info_init + drv_common.o(i.drv_common_systick_register_cb) refers to drv_common.o(.data) for .data + drv_dma.o(i.app_dma_irq_handler) refers to drv_dma.o(i.drv_dma_irq_handler) for drv_dma_irq_handler + drv_dma.o(i.drv_dma_abort_transfer) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + drv_dma.o(i.drv_dma_abort_transfer) refers to drv_dma.o(i.drv_dma_disenable_channel_interrupts) for drv_dma_disenable_channel_interrupts + drv_dma.o(i.drv_dma_ahb_init) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + drv_dma.o(i.drv_dma_ahb_init) refers to drv_dma.o(i.drv_dma_disenable_channel_interrupts) for drv_dma_disenable_channel_interrupts + drv_dma.o(i.drv_dma_ahb_init) refers to drv_dma.o(i.drv_dma_clear_flag) for drv_dma_clear_flag + drv_dma.o(i.drv_dma_ahb_init) refers to drv_dma.o(i.drv_dma_set_ccr) for drv_dma_set_ccr + drv_dma.o(i.drv_dma_ahb_init) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_dma.o(i.drv_dma_clear_flag) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dma.o(i.drv_dma_create_handle) refers to drv_dma.o(.bss) for .bss + drv_dma.o(i.drv_dma_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_dma.o(i.drv_dma_disenable_channel_interrupts) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dma.o(i.drv_dma_enable_channel_interrupts) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_dma.o(i.drv_dma_enable_cycle) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + drv_dma.o(i.drv_dma_get_remaining_bytes) refers to drv_dma.o(i.drv_dma_channel_is_active) for drv_dma_channel_is_active + drv_dma.o(i.drv_dma_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_dma.o(i.drv_dma_init) refers to drv_dma.o(i.drv_dma_ahb_init) for drv_dma_ahb_init + drv_dma.o(i.drv_dma_irq_handler) refers to drv_dma.o(i.drv_dma_get_channel_flag) for drv_dma_get_channel_flag + drv_dma.o(i.drv_dma_irq_handler) refers to drv_dma.o(i.drv_dma_clear_flag) for drv_dma_clear_flag + drv_dma.o(i.drv_dma_irq_handler) refers to drv_dma.o(.bss) for .bss + drv_dma.o(i.drv_dma_m2m_init) refers to memseta.o(.text) for __aeabi_memclr4 + drv_dma.o(i.drv_dma_m2m_init) refers to drv_dma.o(i.drv_dma_init) for drv_dma_init + drv_dma.o(i.drv_dma_reset) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + drv_dma.o(i.drv_dma_set_burst) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + drv_dma.o(i.drv_dma_set_transfer) refers to drv_dma.o(i.drv_dma_set_burst) for drv_dma_set_burst + drv_dma.o(i.drv_dma_start_transfer) refers to drv_dma.o(i.drv_dma_enable_channel_interrupts) for drv_dma_enable_channel_interrupts + drv_dma.o(i.drv_dma_start_transfer) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_fls.o(i.drv_fls_gpio_connect) refers to drv_fls.o(i.drv_fls_gpio_disconnect) for drv_fls_gpio_disconnect + drv_fls.o(i.drv_fls_gpio_disconnect) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_fls.o(i.fls_EnableClk) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_fls.o(i.fls_busy_pending) refers to norflash.o(i.norflash_get_status) for norflash_get_status + drv_fls.o(i.fls_de_init) refers to drv_fls_dma.o(i.fls_dma_disable) for fls_dma_disable + drv_fls.o(i.fls_de_init) refers to drv_dma.o(i.drv_dma_clear_flag) for drv_dma_clear_flag + drv_fls.o(i.fls_de_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_fls.o(i.fls_disable_it) refers to drv_fls.o(i.__NVIC_DisableIRQ) for __NVIC_DisableIRQ + drv_fls.o(i.fls_disable_it) refers to drv_fls.o(i.fls_set_mc_irq_mask) for fls_set_mc_irq_mask + drv_fls.o(i.fls_enable_it) refers to drv_fls.o(i.__NVIC_DisableIRQ) for __NVIC_DisableIRQ + drv_fls.o(i.fls_enable_it) refers to drv_fls.o(i.fls_set_mc_irq_mask) for fls_set_mc_irq_mask + drv_fls.o(i.fls_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_fls.o(i.fls_init) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + drv_fls.o(i.fls_init) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_init) refers to drv_fls.o(i.fls_spi_init) for fls_spi_init + drv_fls.o(i.fls_init) refers to drv_fls.o(i.fls_ctrl_cfg_init) for fls_ctrl_cfg_init + drv_fls.o(i.fls_init) refers to drv_fls.o(i.fls_set_tuning) for fls_set_tuning + drv_fls.o(i.fls_init) refers to drv_fls_dma.o(i.fls_dma_disable) for fls_dma_disable + drv_fls.o(i.fls_read_byte_data) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_read_byte_data) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls.o(i.fls_read_byte_data) refers to drv_fls.o(i.fls_set_read) for fls_set_read + drv_fls.o(i.fls_read_byte_data) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls.o(i.fls_read_cmd) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_read_cmd) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls.o(i.fls_read_cmd) refers to drv_fls.o(i.fls_set_read) for fls_set_read + drv_fls.o(i.fls_read_cmd) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls.o(i.fls_read_cmd_it) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_read_cmd_it) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls.o(i.fls_read_cmd_it) refers to drv_fls.o(i.fls_set_read) for fls_set_read + drv_fls.o(i.fls_read_cmd_it) refers to drv_fls.o(i.fls_enable_it) for fls_enable_it + drv_fls.o(i.fls_read_cmd_it) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls.o(i.fls_set_mc_irq_mask) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_fls.o(i.fls_set_mc_irq_mask) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_fls.o(i.fls_write_byte_data) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_write_byte_data) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls.o(i.fls_write_byte_data) refers to drv_fls.o(i.fls_set_write) for fls_set_write + drv_fls.o(i.fls_write_byte_data) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls.o(i.fls_write_cmd) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_write_cmd) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls.o(i.fls_write_cmd) refers to drv_fls.o(i.fls_set_write) for fls_set_write + drv_fls.o(i.fls_write_cmd) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) for drv_ap_rst_trig_edge_detect + drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) refers to drv_gpio.o(.data) for .data + drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.drv_gpio_get_pull_state) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_gpio.o(i.drv_gpio_register_ap_reset_callback) refers to drv_gpio.o(.data) for .data + drv_gpio.o(i.drv_gpio_register_callback) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.drv_gpio_set_driving_strength) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_gpio.o(i.drv_gpio_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.drv_gpio_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_gpio.o(i.drv_gpio_set_pull_state) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_gpio.o(i.drv_gpio_set_schmitt_trigger) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_gpio.o(i.drv_gpio_set_slew_rate) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_i2c_dma.o(i.drv_i2c_dma_callback) refers to drv_i2c_dma.o(.data) for .data + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_i2c_master.o(i.drv_i2c_m_enable) for drv_i2c_m_enable + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) for drv_sys_cfg_set_dma_rx_req + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_dma.o(i.drv_dma_set_transfer) for drv_dma_set_transfer + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_i2c_dma.o(i.drv_i2c_master_write_read_cmd) for drv_i2c_master_write_read_cmd + drv_i2c_dma.o(i.drv_i2c_master_write_dma) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) for drv_sys_cfg_set_dma_tx_req + drv_i2c_dma.o(i.drv_i2c_master_write_dma) refers to drv_dma.o(i.drv_dma_set_transfer) for drv_dma_set_transfer + drv_i2c_dma.o(i.drv_i2c_master_write_dma) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_i2c_dma.o(i.drv_i2c_master_write_dma) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) refers to drv_dma.o(i.drv_dma_set_callback) for drv_dma_set_callback + drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) refers to drv_i2c_dma.o(.data) for .data + drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) refers to drv_i2c_dma.o(.bss) for .bss + drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) refers to drv_i2c_dma.o(i.drv_i2c_dma_callback) for drv_i2c_dma_callback + drv_i2c_dma.o(i.drv_i2c_slave_write_dma) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_i2c_master.o(i.app_I2C1_IRQn_Handler) refers to drv_i2c_master.o(.data) for .data + drv_i2c_master.o(i.drv_i2c1_set_callback) refers to drv_i2c_master.o(.data) for .data + drv_i2c_master.o(i.drv_i2c_m_clear_it_pending_bit) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_i2c_master.o(i.drv_i2c_m_clear_it_pending_bit) refers to drv_i2c_master.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_i2c_master.o(i.drv_i2c_m_deinit) refers to drv_i2c_master.o(i.drv_i2c_m_disable_intr) for drv_i2c_m_disable_intr + drv_i2c_master.o(i.drv_i2c_m_deinit) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + drv_i2c_master.o(i.drv_i2c_m_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_i2c_master.o(i.drv_i2c_m_deinit) refers to drv_i2c_master.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_i2c_master.o(i.drv_i2c_m_enable_intr) refers to drv_i2c_master.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_i2c_master.o(i.drv_i2c_m_read_data) refers to drv_i2c_master.o(i.drv_i2c_m_get_fifo_status) for drv_i2c_m_get_fifo_status + drv_i2c_master.o(i.drv_i2c_m_set_sys_mask) refers to drv_i2c_master.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_i2c_master.o(i.drv_i2c_m_write_data) refers to drv_i2c_master.o(i.drv_i2c_m_get_fifo_status) for drv_i2c_m_get_fifo_status + drv_i2c_master.o(i.drv_i2c_master_init) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_i2c_master.o(i.drv_i2c_master_init) refers to drv_common.o(.data) for g_system_clock + drv_i2c_slave.o(i.app_I2C0_IRQn_Handler) refers to drv_i2c_slave.o(.data) for .data + drv_i2c_slave.o(i.drv_i2c0_set_callback) refers to drv_i2c_slave.o(.data) for .data + drv_i2c_slave.o(i.drv_i2c_s_clear_it_pending_bit) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_i2c_slave.o(i.drv_i2c_s_read_data) refers to drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) for drv_i2c_s_get_fifo_status + drv_i2c_slave.o(i.drv_i2c_s_set_intr) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_i2c_slave.o(i.drv_i2c_s_set_intr) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_i2c_slave.o(i.drv_i2c_s_write_data) refers to drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) for drv_i2c_s_get_fifo_status + drv_i2c_slave.o(i.drv_i2c_slave_init) refers to drv_i2c_slave.o(i.drv_i2c_s_enable) for drv_i2c_s_enable + drv_param_init.o(i.drv_param_init_get_ccm) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_get_scld_filter_h) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_get_scld_filter_v) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_get_sclu_filter) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_set_ccm) refers to memcpya.o(.text) for __aeabi_memcpy4 + drv_param_init.o(i.drv_param_init_set_ccm) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_set_scld_filter) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_set_sclu_filter) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_p2r_filter_init) refers to drv_param_init.o(.constdata) for .constdata + drv_pwm.o(i.app_PWMDET_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_pwm.o(i.app_PWMDET_IRQn_Handler) refers to drv_pwm.o(.data) for .data + drv_pwm.o(i.drv_pwm_in_register_callback) refers to drv_pwm.o(.data) for .data + drv_pwm.o(i.drv_pwm_in_set_sys_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_pwm.o(i.drv_pwm_in_set_sys_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_dma.o(i.drv_dma_disenable_channel_interrupts) for drv_dma_disenable_channel_interrupts + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_master.o(i.drv_spi_m_enable_tx_dma) for drv_spi_m_enable_tx_dma + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_master.o(i.drv_spi_m_enable_rx_dma) for drv_spi_m_enable_rx_dma + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_slave.o(i.drv_spi_s_enable_tx_dma) for drv_spi_s_enable_tx_dma + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_slave.o(i.drv_spi_s_enable_rx_dma) for drv_spi_s_enable_rx_dma + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_dma.o(.bss) for .bss + drv_spi_dma.o(i.drv_spi_dma_callback) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_dma_ch6_init) refers to drv_spi_dma.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_spi_dma.o(i.drv_spi_dma_ch6_init) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_dma_init) refers to drv_spi_dma.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_spi_dma.o(i.drv_spi_dma_init) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) refers to drv_dma.o(i.drv_dma_set_callback) for drv_dma_set_callback + drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) refers to drv_spi_dma.o(.bss) for .bss + drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) refers to drv_spi_dma.o(i.drv_spi_dma_callback) for drv_spi_dma_callback + drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) refers to drv_dma.o(i.drv_dma_set_callback) for drv_dma_set_callback + drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) refers to drv_spi_dma.o(.bss) for .bss + drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) refers to drv_spi_dma.o(i.drv_spi_dma_callback) for drv_spi_dma_callback + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_spi_master.o(i.drv_spi_m_enable_rx_dma) for drv_spi_m_enable_rx_dma + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_spi_master.o(i.drv_spi_m_enable_tx_dma) for drv_spi_m_enable_tx_dma + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_dma.o(i.drv_dma_enable_channel_interrupts) for drv_dma_enable_channel_interrupts + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spim_dma_write) refers to drv_spi_master.o(i.drv_spi_m_enable_tx_dma) for drv_spi_m_enable_tx_dma + drv_spi_dma.o(i.drv_spim_dma_write) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_spi_dma.o(i.drv_spim_dma_write) refers to drv_dma.o(i.drv_dma_enable_channel_interrupts) for drv_dma_enable_channel_interrupts + drv_spi_dma.o(i.drv_spim_dma_write) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_spi_dma.o(i.drv_spim_dma_write) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spis_dma_write) refers to drv_spi_slave.o(i.drv_spi_s_enable_tx_dma) for drv_spi_s_enable_tx_dma + drv_spi_dma.o(i.drv_spis_dma_write) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_spi_dma.o(i.drv_spis_dma_write) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_spi_dma.o(i.drv_spis_dma_write) refers to drv_spi_dma.o(.bss) for .bss + drv_spi_master.o(i.app_SPIM_IRQn_Handler) refers to drv_spi_master.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_spi_master.o(i.app_SPIM_IRQn_Handler) refers to drv_spi_master.o(.data) for .data + drv_spi_master.o(i.drv_spi_m_deinit) refers to drv_spi_master.o(i.drv_spi_m_switch_sclk) for drv_spi_m_switch_sclk + drv_spi_master.o(i.drv_spi_m_disable_int) refers to drv_spi_master.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_spi_master.o(i.drv_spi_m_set_intr_callback) refers to drv_spi_master.o(.data) for .data + drv_spi_master.o(i.drv_spi_master_init) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_spi_master.o(i.drv_spi_master_init) refers to drv_common.o(.data) for g_system_clock + drv_swire.o(i.app_SWIRE_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_swire.o(i.app_SWIRE_IRQn_Handler) refers to drv_swire.o(i.drv_swire_set_int) for drv_swire_set_int + drv_swire.o(i.app_SWIRE_IRQn_Handler) refers to drv_swire.o(.data) for .data + drv_swire.o(i.drv_swire_register_callback) refers to drv_swire.o(.data) for .data + drv_swire.o(i.drv_swire_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_swire.o(i.drv_swire_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_lvl_trig) for drv_sys_cfg_sel_ap_rst_lvl_trig + drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) refers to drv_sys_cfg.o(.data) for .data + drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_lvl_trig) for drv_sys_cfg_sel_ap_rst_lvl_trig + drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) refers to drv_sys_cfg.o(.data) for .data + drv_timer.o(i.app_TIMER0_IRQn_Handler) refers to drv_timer.o(i.drv_timer_handle_interrupt) for drv_timer_handle_interrupt + drv_timer.o(i.app_TIMER1_IRQn_Handler) refers to drv_timer.o(i.drv_timer_handle_interrupt) for drv_timer_handle_interrupt + drv_timer.o(i.app_TIMER2_IRQn_Handler) refers to drv_timer.o(i.drv_timer_handle_interrupt) for drv_timer_handle_interrupt + drv_timer.o(i.app_TIMER3_IRQn_Handler) refers to drv_timer.o(i.drv_timer_handle_interrupt) for drv_timer_handle_interrupt + drv_timer.o(i.drv_timer_clear_status_flags) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_clear_status_flags) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_timer.o(i.drv_timer_enable) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_get_instance) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_get_prescaler) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_get_status) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(i.drv_timer_clear_status_flags) for drv_timer_clear_status_flags + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(i.drv_timer_set_compare_val) for drv_timer_set_compare_val + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_register_callback) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_set_compare_val) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_timer.o(i.drv_timer_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_timer.o(i.drv_timer_set_prescaler) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_set_prescaler) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_set_repeat) refers to drv_timer.o(.data) for .data + hal_internal_soft_sync.o(i.hal_intl_svs_deinit_rx) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_internal_soft_sync.o(i.hal_intl_svs_deinit_rx) refers to hal_internal_soft_sync.o(.bss) for .bss + hal_internal_soft_sync.o(i.hal_intl_svs_deinit_rx) refers to hal_internal_soft_sync.o(i.svs_wait_start) for svs_wait_start + hal_internal_soft_sync.o(i.hal_intl_svs_deinit_tx) refers to hal_internal_soft_sync.o(.bss) for .bss + hal_internal_soft_sync.o(i.hal_intl_svs_handle) refers to hal_internal_soft_sync.o(.bss) for .bss + hal_internal_soft_sync.o(i.hal_intl_svs_init_rx) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_internal_soft_sync.o(i.hal_intl_svs_init_rx) refers to memseta.o(.text) for __aeabi_memclr4 + hal_internal_soft_sync.o(i.hal_intl_svs_init_rx) refers to hal_internal_soft_sync.o(i.hal_intl_svs_update_rxbr_clk) for hal_intl_svs_update_rxbr_clk + hal_internal_soft_sync.o(i.hal_intl_svs_init_rx) refers to hal_internal_soft_sync.o(.bss) for .bss + hal_internal_soft_sync.o(i.hal_intl_svs_init_rx) refers to hal_internal_soft_sync.o(i.svs_wait_start) for svs_wait_start + hal_internal_soft_sync.o(i.hal_intl_svs_init_tx) refers to hal_internal_soft_sync.o(.bss) for .bss + hal_internal_soft_sync.o(i.hal_intl_svs_set_input_frate) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_internal_soft_sync.o(i.hal_intl_svs_set_input_frate) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_soft_sync.o(i.hal_intl_svs_set_input_frate) refers to hal_internal_soft_sync.o(.bss) for .bss + hal_internal_soft_sync.o(i.hal_intl_svs_set_input_frate) refers to hal_internal_soft_sync.o(i.svs_wait_start) for svs_wait_start + hal_internal_soft_sync.o(i.hal_intl_svs_set_input_frate) refers to hal_internal_soft_sync.o(i.svs_waite_fr_stab) for svs_waite_fr_stab + hal_internal_soft_sync.o(i.hal_intl_svs_set_sync_coef) refers to hal_internal_soft_sync.o(.bss) for .bss + hal_internal_soft_sync.o(i.hal_intl_svs_update_rxbr_clk) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_internal_soft_sync.o(i.hal_intl_svs_update_rxbr_clk) refers to dfltui.o(.text) for __aeabi_ui2d + hal_internal_soft_sync.o(i.hal_intl_svs_update_rxbr_clk) refers to dmul.o(.text) for __aeabi_dmul + hal_internal_soft_sync.o(i.hal_intl_svs_update_rxbr_clk) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_internal_soft_sync.o(i.hal_intl_svs_update_rxbr_clk) refers to hal_internal_soft_sync.o(.bss) for .bss + hal_internal_soft_sync.o(i.svs_direct_mode_setting) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_soft_sync.o(i.svs_direct_mode_setting) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_internal_soft_sync.o(i.svs_direct_mode_setting) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_soft_sync.o(i.svs_direct_mode_setting) refers to drv_rxbr.o(i.drv_rxbr_hline_rcv1_cfg) for drv_rxbr_hline_rcv1_cfg + hal_internal_soft_sync.o(i.svs_direct_mode_setting) refers to hal_internal_soft_sync.o(.bss) for .bss + hal_internal_soft_sync.o(i.svs_get_rel_intv) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_soft_sync.o(i.svs_get_rel_intv) refers to hal_internal_soft_sync.o(.bss) for .bss + hal_internal_soft_sync.o(i.svs_sync_handle) refers to hal_internal_soft_sync.o(i.svs_get_rel_intv) for svs_get_rel_intv + hal_internal_soft_sync.o(i.svs_sync_handle) refers to ffltui.o(.text) for __aeabi_ui2f + hal_internal_soft_sync.o(i.svs_sync_handle) refers to fdiv.o(.text) for __aeabi_fdiv + hal_internal_soft_sync.o(i.svs_sync_handle) refers to fmul.o(.text) for __aeabi_fmul + hal_internal_soft_sync.o(i.svs_sync_handle) refers to f2d.o(.text) for __aeabi_f2d + hal_internal_soft_sync.o(i.svs_sync_handle) refers to dadd.o(.text) for __aeabi_dadd + hal_internal_soft_sync.o(i.svs_sync_handle) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_internal_soft_sync.o(i.svs_sync_handle) refers to hal_internal_soft_sync.o(.bss) for .bss + hal_internal_soft_sync.o(i.svs_wait_start) refers to hal_internal_soft_sync.o(i.svs_get_rel_intv) for svs_get_rel_intv + hal_internal_soft_sync.o(i.svs_wait_start) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_internal_soft_sync.o(i.svs_wait_start) refers to ffltui.o(.text) for __aeabi_ui2f + hal_internal_soft_sync.o(i.svs_wait_start) refers to fdiv.o(.text) for __aeabi_fdiv + hal_internal_soft_sync.o(i.svs_wait_start) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) for hal_internal_vsync_get_tx_state + hal_internal_soft_sync.o(i.svs_wait_start) refers to fmul.o(.text) for __aeabi_fmul + hal_internal_soft_sync.o(i.svs_wait_start) refers to f2d.o(.text) for __aeabi_f2d + hal_internal_soft_sync.o(i.svs_wait_start) refers to ceil.o(i.ceil) for ceil + hal_internal_soft_sync.o(i.svs_wait_start) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_internal_soft_sync.o(i.svs_wait_start) refers to hal_internal_soft_sync.o(i.svs_direct_mode_setting) for svs_direct_mode_setting + hal_internal_soft_sync.o(i.svs_wait_start) refers to drv_rxbr.o(i.drv_rxbr_hline_rcv1_cfg) for drv_rxbr_hline_rcv1_cfg + hal_internal_soft_sync.o(i.svs_wait_start) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_soft_sync.o(i.svs_wait_start) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_internal_soft_sync.o(i.svs_wait_start) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_soft_sync.o(i.svs_wait_start) refers to hal_internal_soft_sync.o(.bss) for .bss + hal_internal_soft_sync.o(i.svs_wait_start) refers to hal_internal_soft_sync.o(i.svs_waite_fr_stab) for svs_waite_fr_stab + hal_internal_soft_sync.o(i.svs_waite_fr_stab) refers to hal_internal_soft_sync.o(i.svs_get_rel_intv) for svs_get_rel_intv + hal_internal_soft_sync.o(i.svs_waite_fr_stab) refers to drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) for drv_rxbr_frame_drop_cfg + hal_internal_soft_sync.o(i.svs_waite_fr_stab) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_soft_sync.o(i.svs_waite_fr_stab) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_soft_sync.o(i.svs_waite_fr_stab) refers to ffltui.o(.text) for __aeabi_ui2f + hal_internal_soft_sync.o(i.svs_waite_fr_stab) refers to fmul.o(.text) for __aeabi_fmul + hal_internal_soft_sync.o(i.svs_waite_fr_stab) refers to ffixui.o(.text) for __aeabi_f2uiz + hal_internal_soft_sync.o(i.svs_waite_fr_stab) refers to hal_internal_soft_sync.o(.bss) for .bss + hal_internal_soft_sync.o(i.svs_waite_fr_stab) refers to hal_internal_soft_sync.o(i.svs_sync_handle) for svs_sync_handle + drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to ffltui.o(.text) for __aeabi_ui2f + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to fdiv.o(.text) for __aeabi_fdiv + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to fmul.o(.text) for __aeabi_fmul + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) for drv_dsi_rx_get_color_bpp + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_color_pcc) for drv_dsi_rx_get_color_pcc + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to fadd.o(.text) for __aeabi_fadd + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to cfrcmple.o(.text) for __aeabi_cfrcmple + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to f2d.o(.text) for __aeabi_f2d + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to dadd.o(.text) for __aeabi_dadd + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to dfixui.o(.text) for __aeabi_d2uiz + drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_dsi_rx.o(i.drv_dsi_rx_get_phy_stopstate) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_dsi_rx.o(i.drv_dsi_rx_phy_resistor_calibration) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_dsi_rx.o(i.drv_dsi_rx_phy_resistor_calibration) refers to drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) for drv_rx_phy_test_write_1_byte + drv_dsi_rx.o(i.drv_dsi_rx_phy_resistor_calibration) refers to drv_dsi_rx.o(i.drv_rx_phy_test_read) for drv_rx_phy_test_read + drv_dsi_rx.o(i.drv_dsi_rx_phy_resistor_calibration) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_rx.o(i.drv_dsi_rx_set_lane_swap) refers to drv_chip_info.o(i.drv_chip_info_get_info) for drv_chip_info_get_info + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_phy_common.o(i.drv_phy_get_rate_para) for drv_phy_get_rate_para + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_phy_common.o(i.drv_phy_get_calibration) for drv_phy_get_calibration + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_dsi_rx.o(i.drv_rx_phy_test_clear) for drv_rx_phy_test_clear + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) for drv_rx_phy_test_write_1_byte + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_dsi_rx.o(i.drv_rx_phy_test_write_2_byte) for drv_rx_phy_test_write_2_byte + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_chip_info.o(i.drv_chip_info_get_info) for drv_chip_info_get_info + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_dsi_rx.o(i.drv_rx_phy_test_lock) for drv_rx_phy_test_lock + drv_dsi_rx.o(i.drv_rx_phy_test_clear) refers to drv_phy_common.o(i.drv_phy_test_clear) for drv_phy_test_clear + drv_dsi_rx.o(i.drv_rx_phy_test_lock) refers to drv_phy_common.o(i.drv_phy_test_lock) for drv_phy_test_lock + drv_dsi_rx.o(i.drv_rx_phy_test_read) refers to drv_phy_common.o(i.drv_phy_test_read) for drv_phy_test_read + drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) refers to drv_phy_common.o(i.drv_phy_test_write_1_byte) for drv_phy_test_write_1_byte + drv_dsi_rx.o(i.drv_rx_phy_test_write_2_byte) refers to drv_phy_common.o(i.drv_phy_test_write_2_byte) for drv_phy_test_write_2_byte + drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dsi_tx.o(i.drv_dsi_tx_phy_resistor_calibration) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_dsi_tx.o(i.drv_dsi_tx_phy_resistor_calibration) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) for drv_tx_phy_test_write_1_byte + drv_dsi_tx.o(i.drv_dsi_tx_phy_resistor_calibration) refers to drv_dsi_tx.o(i.drv_tx_phy_test_read) for drv_tx_phy_test_read + drv_dsi_tx.o(i.drv_dsi_tx_phy_resistor_calibration) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ulpsactivenot) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_phy_common.o(i.drv_phy_get_rate_para) for drv_phy_get_rate_para + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_phy_common.o(i.drv_phy_get_pll_para) for drv_phy_get_pll_para + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_phy_common.o(i.drv_phy_get_calibration) for drv_phy_get_calibration + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_enter) for drv_tx_phy_test_enter + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_crgu.o(i.drv_crgu_set_mipi_ref_src) for drv_crgu_set_mipi_ref_src + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_crgu.o(i.drv_crgu_set_mipi_cfg_src) for drv_crgu_set_mipi_cfg_src + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_clear) for drv_tx_phy_test_clear + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) for drv_tx_phy_test_write_1_byte + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_2_byte) for drv_tx_phy_test_write_2_byte + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_code) for drv_tx_phy_test_write_code + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_exit) for drv_tx_phy_test_exit + drv_dsi_tx.o(i.drv_dsi_tx_phy_trigger) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) for drv_dsi_tx_phy_status_stopstate + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) for drv_dsi_tx_phy_status_stopstate + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_pll_lock) for drv_dsi_tx_phy_status_pll_lock + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ulpsactivenot) for drv_dsi_tx_phy_status_ulpsactivenot + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ulpsactivenot) for drv_dsi_tx_phy_status_ulpsactivenot + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) for drv_tx_phy_test_write_1_byte + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_pll_lock) for drv_dsi_tx_phy_status_pll_lock + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to drv_dsi_tx.o(i.drv_dsi_tx_version) for drv_dsi_tx_version + drv_dsi_tx.o(i.drv_dsi_tx_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dsi_tx.o(i.drv_dsi_tx_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_dsi_tx.o(i.drv_tx_phy_test_clear) refers to drv_phy_common.o(i.drv_phy_test_clear) for drv_phy_test_clear + drv_dsi_tx.o(i.drv_tx_phy_test_read) refers to drv_phy_common.o(i.drv_phy_test_read) for drv_phy_test_read + drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) refers to drv_phy_common.o(i.drv_phy_test_write_1_byte) for drv_phy_test_write_1_byte + drv_dsi_tx.o(i.drv_tx_phy_test_write_2_byte) refers to drv_phy_common.o(i.drv_phy_test_write_2_byte) for drv_phy_test_write_2_byte + drv_dsi_tx.o(i.drv_tx_phy_test_write_code) refers to drv_phy_common.o(i.drv_phy_test_write_code) for drv_phy_test_write_code + drv_lcdc.o(i.drv_lcdc_config_src_parameter) refers to drv_lcdc.o(i.drv_lcdc_config_input_size) for drv_lcdc_config_input_size + drv_lcdc.o(i.drv_lcdc_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_lcdc.o(i.drv_lcdc_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_memc.o(i.app_MEMC_IRQn_Handler) refers to drv_memc.o(i.drv_memc_get_status) for drv_memc_get_status + drv_memc.o(i.app_MEMC_IRQn_Handler) refers to drv_memc.o(i.drv_memc_clear_status) for drv_memc_clear_status + drv_memc.o(i.app_MEMC_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_memc.o(i.drv_memc_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_memc.o(i.drv_memc_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_rxbr.o(i.app_ADC_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_rxbr.o(i.app_ADC_IRQn_Handler) refers to drv_rxbr.o(.data) for .data + drv_rxbr.o(i.app_VPRE_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_rxbr.o(i.app_VPRE_IRQn_Handler) refers to drv_rxbr.o(.data) for .data + drv_rxbr.o(i.drv_rxbr_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_rxbr.o(i.drv_rxbr_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_rxbr.o(i.drv_rxbr_enable_irq) refers to drv_rxbr.o(i.__NVIC_EnableIRQ) for __NVIC_EnableIRQ + drv_rxbr.o(i.drv_rxbr_enable_irq) refers to drv_rxbr.o(i.__NVIC_DisableIRQ) for __NVIC_DisableIRQ + drv_rxbr.o(i.drv_rxbr_register_irq0_callback) refers to drv_rxbr.o(.data) for .data + drv_rxbr.o(i.drv_rxbr_register_irq1_callback) refers to drv_rxbr.o(.data) for .data + drv_rxbr.o(i.drv_rxbr_set_cmd_filter) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_rxbr.o(i.drv_rxbr_soft_reset) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + drv_vidc.o(i.app_VIDC_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_vidc.o(i.app_VIDC_IRQn_Handler) refers to drv_vidc.o(.data) for .data + drv_vidc.o(i.drv_vidc_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_vidc.o(i.drv_vidc_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_vidc.o(i.drv_vidc_register_callback) refers to drv_vidc.o(.data) for .data + irq_redirect .o(i.ADC_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.AP_NRESET_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.DMA_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT0_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT1_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT2_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT3_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT4_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT5_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT6_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT7_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.FLSCTRL_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.HardFault_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.I2C0_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.I2C1_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.LCDC_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.MEMC_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.MIPI_RX_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.MIPI_TX_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.PWMDET_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.SPIM_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.SPIS_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.SWIRE_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.SysTick_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.TIMER0_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.TIMER1_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.TIMER2_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.TIMER3_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.UART_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.VIDC_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.VPRE_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.WDG_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.handle_init) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.handle_init) refers to drv_common.o(i.app_SysTick_Handler) for app_SysTick_Handler + irq_redirect .o(i.handle_init) refers to hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) for app_LCDC_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) for app_MIPI_RX_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) for app_MIPI_TX_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_dma.o(i.app_dma_irq_handler) for app_dma_irq_handler + irq_redirect .o(i.handle_init) refers to norflash.o(i.app_fls_ctrl_Handler) for app_fls_ctrl_Handler + irq_redirect .o(i.handle_init) refers to drv_i2c_slave.o(i.app_I2C0_IRQn_Handler) for app_I2C0_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_i2c_master.o(i.app_I2C1_IRQn_Handler) for app_I2C1_IRQn_Handler + irq_redirect .o(i.handle_init) refers to hal_spi_slave.o(i.app_SPIS_IRQn_Handler) for app_SPIS_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_spi_master.o(i.app_SPIM_IRQn_Handler) for app_SPIM_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_rxbr.o(i.app_VPRE_IRQn_Handler) for app_VPRE_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_rxbr.o(i.app_ADC_IRQn_Handler) for app_ADC_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_vidc.o(i.app_VIDC_IRQn_Handler) for app_VIDC_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_memc.o(i.app_MEMC_IRQn_Handler) for app_MEMC_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_timer.o(i.app_TIMER0_IRQn_Handler) for app_TIMER0_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_timer.o(i.app_TIMER1_IRQn_Handler) for app_TIMER1_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_timer.o(i.app_TIMER2_IRQn_Handler) for app_TIMER2_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_timer.o(i.app_TIMER3_IRQn_Handler) for app_TIMER3_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_wdg.o(i.app_WDG_IRQn_Handler) for app_WDG_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_uart.o(i.app_UART_IRQn_Handler) for app_UART_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_pwm.o(i.app_PWMDET_IRQn_Handler) for app_PWMDET_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_swire.o(i.app_SWIRE_IRQn_Handler) for app_SWIRE_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) for app_AP_NRESET_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) for app_EXTI_INT0_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) for app_EXTI_INT1_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) for app_EXTI_INT2_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) for app_EXTI_INT3_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) for app_EXTI_INT4_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) for app_EXTI_INT5_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) for app_EXTI_INT6_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) for app_EXTI_INT7_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_common.o(i.app_HardFault_Handler) for app_HardFault_Handler + drv_efuse.o(i.drv_efuse_enter_inactive) refers to drv_efuse.o(i.drv_efuse_int_enable) for drv_efuse_int_enable + drv_efuse.o(i.drv_efuse_read) refers to drv_efuse.o(i.drv_efuse_read_req) for drv_efuse_read_req + drv_efuse.o(i.drv_efuse_write) refers to drv_efuse.o(i.drv_efuse_write_req) for drv_efuse_write_req + drv_phy_common.o(i.drv_phy_enable_calibration) refers to drv_phy_common.o(.data) for .data + drv_phy_common.o(i.drv_phy_get_calibration) refers to drv_chip_info.o(i.drv_chip_info_get_info) for drv_chip_info_get_info + drv_phy_common.o(i.drv_phy_get_calibration) refers to drv_efuse.o(i.drv_efuse_read) for drv_efuse_read + drv_phy_common.o(i.drv_phy_get_calibration) refers to drv_phy_common.o(.data) for .data + drv_phy_common.o(i.drv_phy_get_pll_para) refers to drv_phy_common.o(.constdata) for .constdata + drv_phy_common.o(i.drv_phy_get_rate_para) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_phy_common.o(i.drv_phy_get_rate_para) refers to drv_phy_common.o(.constdata) for .constdata + drv_phy_common.o(i.drv_phy_test_write_1_byte) refers to drv_phy_common.o(i.drv_phy_test_write_code) for drv_phy_test_write_code + drv_phy_common.o(i.drv_phy_test_write_1_byte) refers to drv_phy_common.o(i.drv_phy_test_write_data) for drv_phy_test_write_data + drv_phy_common.o(i.drv_phy_test_write_2_byte) refers to drv_phy_common.o(i.drv_phy_test_write_code) for drv_phy_test_write_code + drv_phy_common.o(i.drv_phy_test_write_2_byte) refers to drv_phy_common.o(i.drv_phy_test_write_data) for drv_phy_test_write_data + drv_chip_info.o(i.drv_chip_info_get_info) refers to drv_chip_info.o(.data) for .data + drv_chip_info.o(i.drv_chip_info_init) refers to drv_efuse.o(i.drv_efuse_enter_inactive) for drv_efuse_enter_inactive + drv_chip_info.o(i.drv_chip_info_init) refers to drv_efuse.o(i.drv_efuse_read) for drv_efuse_read + drv_chip_info.o(i.drv_chip_info_init) refers to drv_chip_info.o(.data) for .data + drv_chip_info.o(i.drv_chip_rx_info_check) refers to printfa.o(i.__0printf) for __2printf + drv_chip_info.o(i.drv_chip_rx_info_check) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_chip_info.o(i.drv_chip_rx_info_check) refers to drv_chip_info.o(.data) for .data + drv_dsc_dec.o(i.drv_dsc_dec_enable) refers to drv_efuse.o(i.drv_efuse_enter_inactive) for drv_efuse_enter_inactive + drv_dsc_dec.o(i.drv_dsc_dec_enable) refers to drv_efuse.o(i.drv_efuse_read) for drv_efuse_read + drv_dsc_dec.o(i.drv_dsc_dec_enable) refers to printfa.o(i.__0printf) for __2printf + hal_spi_slave.o(i.app_SPIS_IRQn_Handler) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + hal_spi_slave.o(i.app_SPIS_IRQn_Handler) refers to hal_spi_slave.o(i.__NVIC_SetPriority) for __NVIC_SetPriority + hal_spi_slave.o(i.app_SPIS_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_spi_slave.o(i.app_SPIS_IRQn_Handler) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_s_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_spi_slave.o(i.hal_spi_s_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_init_input) for hal_gpio_init_input + hal_spi_slave.o(i.hal_spi_s_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + hal_spi_slave.o(i.hal_spi_slave_auto_transfer_abort) refers to drv_spi_dma.o(i.drv_spi_abort_dma) for drv_spi_abort_dma + hal_spi_slave.o(i.hal_spi_slave_auto_transfer_start) refers to drv_dma.o(i.drv_dma_enable_cycle) for drv_dma_enable_cycle + hal_spi_slave.o(i.hal_spi_slave_auto_transfer_start) refers to drv_spi_dma.o(i.drv_spis_dma_write) for drv_spis_dma_write + hal_spi_slave.o(i.hal_spi_slave_auto_transfer_start) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_deinit) refers to drv_spi_slave.o(i.drv_spi_s_deinit) for drv_spi_s_deinit + hal_spi_slave.o(i.hal_spi_slave_enable) refers to drv_spi_slave.o(i.drv_spi_s_enable_int) for drv_spi_s_enable_int + hal_spi_slave.o(i.hal_spi_slave_enable) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_spi_slave.o(i.hal_spi_slave_enable) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_gpio_init) refers to drv_spi_slave.o(i.drv_spi_s_gpio_init) for drv_spi_s_gpio_init + hal_spi_slave.o(i.hal_spi_slave_init) refers to hal_spi_slave.o(i.hal_spi_slave_gpio_init) for hal_spi_slave_gpio_init + hal_spi_slave.o(i.hal_spi_slave_init) refers to drv_spi_slave.o(i.drv_spi_slave_init) for drv_spi_slave_init + hal_spi_slave.o(i.hal_spi_slave_init) refers to drv_spi_dma.o(i.drv_spi_dma_init) for drv_spi_dma_init + hal_spi_slave.o(i.hal_spi_slave_init) refers to drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) for drv_spi_set_dma_irq_callback + hal_spi_slave.o(i.hal_spi_slave_init) refers to drv_spi_slave.o(i.drv_spi_s_enable_tx_dma) for drv_spi_s_enable_tx_dma + hal_spi_slave.o(i.hal_spi_slave_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) for drv_sys_cfg_set_dma_tx_req + hal_spi_slave.o(i.hal_spi_slave_init) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_read_data) refers to drv_spi_slave.o(i.drv_spi_s_read_data) for drv_spi_s_read_data + hal_spi_slave.o(i.hal_spi_slave_register_callback) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_reset_tx) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_set_auto_rx_buffer) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_set_auto_tx_buffer) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_write_data) refers to drv_spi_slave.o(i.drv_spi_s_write_data) for drv_spi_s_write_data + norflash.o(i.app_fls_ctrl_Handler) refers to drv_fls.o(i.fls_clr_interrupt_flag) for fls_clr_interrupt_flag + norflash.o(i.app_fls_ctrl_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + norflash.o(i.app_fls_ctrl_Handler) refers to norflash.o(.data) for .data + norflash.o(i.norflash_best_cfg_init) refers to drv_fls.o(i.fls_spi_init) for fls_spi_init + norflash.o(i.norflash_best_cfg_init) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_check_id) refers to norflash.o(i.norflash_read_id) for norflash_read_id + norflash.o(i.norflash_check_id) refers to tau_delay.o(i.delayUs) for delayUs + norflash.o(i.norflash_check_id) refers to norflash.o(.data) for .data + norflash.o(i.norflash_dma_callback) refers to norflash.o(.data) for .data + norflash.o(i.norflash_dma_read) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + norflash.o(i.norflash_dma_read) refers to drv_fls_dma.o(i.fls_transfer_create_handle_dma) for fls_transfer_create_handle_dma + norflash.o(i.norflash_dma_read) refers to drv_fls_dma.o(i.fls_dma_read_prepare) for fls_dma_read_prepare + norflash.o(i.norflash_dma_read) refers to drv_fls_dma.o(i.fls_transfer_dma) for fls_transfer_dma + norflash.o(i.norflash_dma_read) refers to drv_fls_dma.o(i.fls_dma_disable) for fls_dma_disable + norflash.o(i.norflash_dma_read) refers to norflash.o(.data) for .data + norflash.o(i.norflash_dma_read) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_dma_read) refers to norflash.o(i.norflash_dma_callback) for norflash_dma_callback + norflash.o(i.norflash_dma_write) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + norflash.o(i.norflash_dma_write) refers to drv_fls_dma.o(i.fls_transfer_create_handle_dma) for fls_transfer_create_handle_dma + norflash.o(i.norflash_dma_write) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_dma_write) refers to norflash.o(i.norflash_switch_fls_spi) for norflash_switch_fls_spi + norflash.o(i.norflash_dma_write) refers to drv_fls_dma.o(i.fls_dma_write_prepare) for fls_dma_write_prepare + norflash.o(i.norflash_dma_write) refers to drv_fls_dma.o(i.fls_transfer_dma) for fls_transfer_dma + norflash.o(i.norflash_dma_write) refers to drv_fls_dma.o(i.fls_dma_disable) for fls_dma_disable + norflash.o(i.norflash_dma_write) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_dma_write) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_dma_write) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_dma_write) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_dma_write) refers to norflash.o(i.norflash_dma_callback) for norflash_dma_callback + norflash.o(i.norflash_dma_write) refers to norflash.o(.data) for .data + norflash.o(i.norflash_dual_read) refers to drv_fls.o(i.fls_ddat_enable) for fls_ddat_enable + norflash.o(i.norflash_dual_read) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_dual_read) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_dual_write) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_dual_write) refers to norflash.o(i.norflash_switch_fls_spi) for norflash_switch_fls_spi + norflash.o(i.norflash_dual_write) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_dual_write) refers to drv_fls.o(i.fls_ddat_enable) for fls_ddat_enable + norflash.o(i.norflash_dual_write) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_dual_write) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_en4b) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_en4b) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + norflash.o(i.norflash_en4b) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_en4b) refers to norflash.o(i.norflash_read_config_reg) for norflash_read_config_reg + norflash.o(i.norflash_en4b) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_en_quad) refers to norflash.o(i.norflash_en_quad_check) for norflash_en_quad_check + norflash.o(i.norflash_en_quad) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_en_quad) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_en_quad) refers to drv_fls.o(i.fls_busy_pending) for fls_busy_pending + norflash.o(i.norflash_en_quad) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_en_quad_check) refers to norflash.o(i.norflash_get_dual_hstatus) for norflash_get_dual_hstatus + norflash.o(i.norflash_en_quad_check) refers to norflash.o(i.norflash_get_hstatus) for norflash_get_hstatus + norflash.o(i.norflash_en_quad_check) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_en_quad_check) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_erase_block) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_erase_block) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_erase_block) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_erase_block) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_erase_chip) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_erase_chip) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + norflash.o(i.norflash_erase_chip) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_erase_sector) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_erase_sector) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_erase_sector) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_erase_sector) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_ex4b) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_ex4b) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + norflash.o(i.norflash_ex4b) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_ex4b) refers to norflash.o(i.norflash_read_config_reg) for norflash_read_config_reg + norflash.o(i.norflash_ex4b) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_exit_quad) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_exit_quad) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_exit_quad) refers to norflash.o(i.norflash_en_quad_check) for norflash_en_quad_check + norflash.o(i.norflash_exit_quad) refers to drv_fls.o(i.fls_busy_pending) for fls_busy_pending + norflash.o(i.norflash_exit_quad) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_get_dual_hstatus) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_get_dual_hstatus) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_get_dual_hstatus) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_get_hstatus) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_get_hstatus) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_get_hstatus) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_get_status) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_get_status) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_get_status) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_init) refers to drv_fls.o(i.fls_get_default_spi_config) for fls_get_default_spi_config + norflash.o(i.norflash_init) refers to drv_fls.o(i.fls_get_default_fls_config) for fls_get_default_fls_config + norflash.o(i.norflash_init) refers to drv_fls.o(i.fls_get_default_tuning) for fls_get_default_tuning + norflash.o(i.norflash_init) refers to drv_fls.o(i.fls_init) for fls_init + norflash.o(i.norflash_init) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_init) refers to drv_fls.o(.data) for g_fls_tuning + norflash.o(i.norflash_quad_read) refers to drv_fls.o(i.fls_qdat_enable) for fls_qdat_enable + norflash.o(i.norflash_quad_read) refers to drv_fls.o(i.fls_qadr_enable) for fls_qadr_enable + norflash.o(i.norflash_quad_read) refers to drv_fls.o(i.fls_qcmd_enable) for fls_qcmd_enable + norflash.o(i.norflash_quad_read) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_quad_read) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_quad_write) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_quad_write) refers to norflash.o(i.norflash_switch_fls_spi) for norflash_switch_fls_spi + norflash.o(i.norflash_quad_write) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_quad_write) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_quad_write) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_quad_write) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_read) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_read_config_reg) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_read_id) refers to drv_fls.o(i.fls_read_cmd) for fls_read_cmd + norflash.o(i.norflash_read_uid) refers to memseta.o(.text) for __aeabi_memclr4 + norflash.o(i.norflash_read_uid) refers to drv_fls.o(i.fls_read_cmd) for fls_read_cmd + norflash.o(i.norflash_read_uid) refers to memcpya.o(.text) for __aeabi_memcpy + norflash.o(i.norflash_set_best_cfg) refers to memseta.o(.text) for __aeabi_memclr4 + norflash.o(i.norflash_set_best_read_cfg) refers to norflash.o(i.norflash_en_quad) for norflash_en_quad + norflash.o(i.norflash_set_best_read_cfg) refers to norflash.o(.data) for .data + norflash.o(i.norflash_set_best_read_cfg) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_set_best_write_cfg) refers to norflash.o(i.norflash_en_quad) for norflash_en_quad + norflash.o(i.norflash_set_best_write_cfg) refers to norflash.o(.data) for .data + norflash.o(i.norflash_set_best_write_cfg) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_switch_fls_spi) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_switch_fls_spi) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_switch_fls_spi) refers to drv_fls.o(i.fls_ddat_enable) for fls_ddat_enable + norflash.o(i.norflash_switch_fls_spi) refers to drv_fls.o(i.fls_qdat_enable) for fls_qdat_enable + norflash.o(i.norflash_switch_fls_spi) refers to drv_fls.o(i.fls_qadr_enable) for fls_qadr_enable + norflash.o(i.norflash_write) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_write) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_write) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_write) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_write_disable) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + norflash.o(i.norflash_write_disable) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_write_disable) refers to norflash.o(.data) for .data + norflash.o(i.norflash_write_disable) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_write_enable) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + norflash.o(i.norflash_write_enable) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_write_enable) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_write_enable) refers to norflash.o(.data) for .data + norflash.o(i.norflash_write_endian_scr) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_write_endian_scr) refers to norflash.o(i.norflash_big_end_enable) for norflash_big_end_enable + norflash.o(i.norflash_write_endian_scr) refers to drv_fls.o(i.fls_en_scr) for fls_en_scr + norflash.o(i.norflash_write_endian_scr) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_write_endian_scr) refers to norflash.o(i.norflash_big_end_clear) for norflash_big_end_clear + norflash.o(i.norflash_write_endian_scr) refers to drv_fls.o(i.fls_scr_clear) for fls_scr_clear + norflash.o(i.norflash_write_endian_scr) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_write_endian_scr) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + drv_fls_dma.o(i.fls_abort_dma) refers to drv_dma.o(i.drv_dma_abort_transfer) for drv_dma_abort_transfer + drv_fls_dma.o(i.fls_abort_dma) refers to drv_fls_dma.o(i.fls_dma_disable) for fls_dma_disable + drv_fls_dma.o(i.fls_dma_read_prepare) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls_dma.o(i.fls_dma_read_prepare) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls_dma.o(i.fls_dma_read_prepare) refers to drv_fls.o(i.fls_set_read) for fls_set_read + drv_fls_dma.o(i.fls_dma_read_prepare) refers to drv_fls_dma.o(i.fls_dma_enable) for fls_dma_enable + drv_fls_dma.o(i.fls_dma_read_prepare) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls_dma.o(i.fls_dma_write_prepare) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls_dma.o(i.fls_dma_write_prepare) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls_dma.o(i.fls_dma_write_prepare) refers to drv_fls.o(i.fls_set_write) for fls_set_write + drv_fls_dma.o(i.fls_dma_write_prepare) refers to drv_fls_dma.o(i.fls_dma_enable) for fls_dma_enable + drv_fls_dma.o(i.fls_dma_write_prepare) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls_dma.o(i.fls_read_dmacallback) refers to drv_dma.o(i.drv_dma_abort_transfer) for drv_dma_abort_transfer + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to memseta.o(.text) for __aeabi_memclr4 + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to drv_dma.o(i.drv_dma_init) for drv_dma_init + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to drv_dma.o(i.drv_dma_set_callback) for drv_dma_set_callback + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to drv_fls_dma.o(.data) for .data + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to drv_fls_dma.o(i.fls_read_dmacallback) for fls_read_dmacallback + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to drv_fls_dma.o(i.fls_write_dmacallback) for fls_write_dmacallback + drv_fls_dma.o(i.fls_transfer_dma) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_fls_dma.o(i.fls_transfer_dma) refers to drv_dma.o(i.drv_dma_start_transfer) for drv_dma_start_transfer + drv_fls_dma.o(i.fls_transfer_get_receive_count_dma) refers to drv_dma.o(i.drv_dma_get_remaining_bytes) for drv_dma_get_remaining_bytes + drv_fls_dma.o(i.fls_write_dmacallback) refers to drv_dma.o(i.drv_dma_abort_transfer) for drv_dma_abort_transfer + drv_spi_slave.o(i.drv_spi_s_deinit) refers to drv_spi_slave.o(i.drv_spi_s_switch_sclk) for drv_spi_s_switch_sclk + drv_uart.o(i.UART0_IRQ_Handle) refers to drv_uart.o(i.UART_TransferHandleIRQ) for UART_TransferHandleIRQ + drv_uart.o(i.UART0_IRQ_Handle) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_uart.o(i.UART0_IRQ_Handle) refers to drv_uart.o(.data) for .data + drv_uart.o(i.UART_AbortReceive) refers to drv_uart.o(i.UART_Disable_IT) for UART_Disable_IT + drv_uart.o(i.UART_AbortReceive) refers to drv_uart.o(i.UART_ResetRxFIFO) for UART_ResetRxFIFO + drv_uart.o(i.UART_AbortSend) refers to drv_uart.o(i.UART_Disable_IT) for UART_Disable_IT + drv_uart.o(i.UART_AbortSend) refers to drv_uart.o(i.UART_ResetTxFIFO) for UART_ResetTxFIFO + drv_uart.o(i.UART_Deinit) refers to drv_uart.o(i.UART_SwitchSCLK) for UART_SwitchSCLK + drv_uart.o(i.UART_Disable_IT) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_Disable_IT) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_uart.o(i.UART_Disable_IT) refers to drv_uart.o(.constdata) for .constdata + drv_uart.o(i.UART_EnableDma) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) for drv_sys_cfg_set_dma_rx_req + drv_uart.o(i.UART_EnableDma) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) for drv_sys_cfg_set_dma_tx_req + drv_uart.o(i.UART_Enable_IT) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_Enable_IT) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_uart.o(i.UART_GetDefaultConfig) refers to memseta.o(.text) for __aeabi_memclr4 + drv_uart.o(i.UART_GetDefaultConfig) refers to drv_common.o(.data) for g_system_clock + drv_uart.o(i.UART_GetFIFO_Ctrl) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_GetFIFO_Ctrl) refers to drv_uart.o(.data) for .data + drv_uart.o(i.UART_ResetRxFIFO) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_ResetRxFIFO) refers to drv_uart.o(.data) for .data + drv_uart.o(i.UART_ResetTxFIFO) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_ResetTxFIFO) refers to drv_uart.o(.data) for .data + drv_uart.o(i.UART_SetBaudRate) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_uart.o(i.UART_SwitchSCLK) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_uart.o(i.UART_TransferCreateHandle) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_TransferCreateHandle) refers to memseta.o(.text) for __aeabi_memclr4 + drv_uart.o(i.UART_TransferCreateHandle) refers to drv_uart.o(i.UART_Enable_IT) for UART_Enable_IT + drv_uart.o(i.UART_TransferCreateHandle) refers to drv_uart.o(.data) for .data + drv_uart.o(i.UART_TransferHandleIRQ) refers to drv_uart.o(i.UART_ResetRxFIFO) for UART_ResetRxFIFO + drv_uart.o(i.UART_init) refers to drv_uart.o(i.UART_DisableDma) for UART_DisableDma + drv_uart.o(i.UART_init) refers to drv_uart.o(i.UART_SwitchSCLK) for UART_SwitchSCLK + drv_uart.o(i.UART_init) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_init) refers to drv_uart.o(i.UART_SetBaudRate) for UART_SetBaudRate + drv_uart.o(i.UART_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_uart.o(i.UART_init) refers to drv_uart.o(.data) for .data + drv_uart.o(i.app_UART_IRQn_Handler) refers to drv_uart.o(i.UART0_IRQ_Handle) for UART0_IRQ_Handle + drv_uart_dma.o(i.UART_DMAInit) refers to memseta.o(.text) for __aeabi_memclr4 + drv_uart_dma.o(i.UART_DMAInit) refers to drv_dma.o(i.drv_dma_init) for drv_dma_init + drv_uart_dma.o(i.UART_TransferAbortReceiveDMA) refers to drv_dma.o(i.drv_dma_abort_transfer) for drv_dma_abort_transfer + drv_uart_dma.o(i.UART_TransferAbortSendDMA) refers to drv_dma.o(i.drv_dma_abort_transfer) for drv_dma_abort_transfer + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to memseta.o(.text) for __aeabi_memclr4 + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart.o(i.UART_EnableDma) for UART_EnableDma + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart_dma.o(i.UART_DMAInit) for UART_DMAInit + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_dma.o(i.drv_dma_set_callback) for drv_dma_set_callback + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart_dma.o(.data) for .data + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart_dma.o(i.UART_TransferReceiveDMACallback) for UART_TransferReceiveDMACallback + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart_dma.o(i.UART_TransferSendDMACallback) for UART_TransferSendDMACallback + drv_uart_dma.o(i.UART_TransferGetReceiveCountDMA) refers to drv_dma.o(i.drv_dma_get_remaining_bytes) for drv_dma_get_remaining_bytes + drv_uart_dma.o(i.UART_TransferReceiveDMA) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_uart_dma.o(i.UART_TransferReceiveDMA) refers to drv_uart.o(i.UART_EnableDma) for UART_EnableDma + drv_uart_dma.o(i.UART_TransferReceiveDMA) refers to drv_dma.o(i.drv_dma_start_transfer) for drv_dma_start_transfer + drv_uart_dma.o(i.UART_TransferSendDMA) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_uart_dma.o(i.UART_TransferSendDMA) refers to drv_uart.o(i.UART_EnableDma) for UART_EnableDma + drv_uart_dma.o(i.UART_TransferSendDMA) refers to drv_dma.o(i.drv_dma_start_transfer) for drv_dma_start_transfer + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_wdg.o(i.drv_wdg_set_int) for drv_wdg_set_int + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_wdg.o(i.drv_wdg_clear_counter) for drv_wdg_clear_counter + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_wdg.o(i.drv_wdg_read_edge_flag) for drv_wdg_read_edge_flag + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_wdg.o(i.drv_wdg_clear_edge_flag) for drv_wdg_clear_edge_flag + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_wdg.o(.data) for .data + drv_wdg.o(i.drv_wdg_register_callback) refers to drv_wdg.o(.data) for .data + drv_wdg.o(i.drv_wdg_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_wdg.o(i.drv_wdg_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_wdg.o(i.drv_wdg_set_repeat) refers to drv_wdg.o(.data) for .data + dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) refers to dcs_packet_fifo.o(.bss) for .bss + dcs_packet_fifo.o(i.dcs_packet_fifo_init) refers to dcs_packet_fifo.o(.bss) for .bss + dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) refers to dcs_packet_fifo.o(.bss) for .bss + dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) refers to dcs_packet_fifo.o(.bss) for .bss + dcs_packet_fifo.o(i.dcs_packet_get_fifo_size) refers to dcs_packet_fifo.o(.bss) for .bss + ceil.o(i.__softfp_ceil) refers (Special) to iusefp.o(.text) for __I$use$fp + ceil.o(i.__softfp_ceil) refers to ceil.o(i.ceil) for ceil + ceil.o(i.ceil) refers (Special) to iusefp.o(.text) for __I$use$fp + ceil.o(i.ceil) refers to dadd.o(.text) for __aeabi_dadd + ceil.o(i.ceil) refers to cdrcmple.o(.text) for __aeabi_cdrcmple + sqrt.o(i.__softfp_sqrt) refers (Special) to iusefp.o(.text) for __I$use$fp + sqrt.o(i.__softfp_sqrt) refers to dsqrt.o(.text) for _dsqrt + sqrt.o(i.__softfp_sqrt) refers to errno.o(i.__set_errno) for __set_errno + sqrt.o(i.sqrt) refers (Special) to iusefp.o(.text) for __I$use$fp + sqrt.o(i.sqrt) refers to dsqrt.o(.text) for _dsqrt + sqrt.o(i.sqrt) refers to errno.o(i.__set_errno) for __set_errno + sqrt_x.o(i.____softfp_sqrt$lsc) refers (Special) to iusefp.o(.text) for __I$use$fp + sqrt_x.o(i.____softfp_sqrt$lsc) refers to cdcmple.o(.text) for __aeabi_cdcmple + sqrt_x.o(i.____softfp_sqrt$lsc) refers to errno.o(i.__set_errno) for __set_errno + sqrt_x.o(i.____softfp_sqrt$lsc) refers to dsqrt.o(.text) for _dsqrt + sqrt_x.o(i.__sqrt$lsc) refers (Special) to iusefp.o(.text) for __I$use$fp + sqrt_x.o(i.__sqrt$lsc) refers to cdcmple.o(.text) for __aeabi_cdcmple + sqrt_x.o(i.__sqrt$lsc) refers to errno.o(i.__set_errno) for __set_errno + sqrt_x.o(i.__sqrt$lsc) refers to dsqrt.o(.text) for _dsqrt + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry10a.o(.ARM.Collect$$$$0000000D) for __rt_final_cpp + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry11a.o(.ARM.Collect$$$$0000000F) for __rt_final_exit + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry7b.o(.ARM.Collect$$$$00000008) for _main_clock + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry8b.o(.ARM.Collect$$$$0000000A) for _main_cpp_init + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry9a.o(.ARM.Collect$$$$0000000B) for _main_init + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry5.o(.ARM.Collect$$$$00000004) for _main_scatterload + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry2.o(.ARM.Collect$$$$00000001) for _main_stk + idiv.o(.text) refers to uidiv.o(.text) for __aeabi_uidivmod + printfb.o(i.__0fprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0fprintf$bare) refers to tau_log.o(i.fputc) for fputc + printfb.o(i.__0printf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0printf$bare) refers to tau_log.o(i.fputc) for fputc + printfb.o(i.__0printf$bare) refers to stdout.o(.data) for __stdout + printfb.o(i.__0snprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0snprintf$bare) refers to printfb.o(i._snputc) for _snputc + printfb.o(i.__0sprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0sprintf$bare) refers to printfb.o(i._sputc) for _sputc + printfb.o(i.__0vfprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vfprintf$bare) refers to tau_log.o(i.fputc) for fputc + printfb.o(i.__0vprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vprintf$bare) refers to tau_log.o(i.fputc) for fputc + printfb.o(i.__0vprintf$bare) refers to stdout.o(.data) for __stdout + printfb.o(i.__0vsnprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vsnprintf$bare) refers to printfb.o(i._snputc) for _snputc + printfb.o(i.__0vsprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vsprintf$bare) refers to printfb.o(i._sputc) for _sputc + printf0.o(i.__0fprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0fprintf$0) refers to tau_log.o(i.fputc) for fputc + printf0.o(i.__0printf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0printf$0) refers to tau_log.o(i.fputc) for fputc + printf0.o(i.__0printf$0) refers to stdout.o(.data) for __stdout + printf0.o(i.__0snprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0snprintf$0) refers to printf0.o(i._snputc) for _snputc + printf0.o(i.__0sprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0sprintf$0) refers to printf0.o(i._sputc) for _sputc + printf0.o(i.__0vfprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vfprintf$0) refers to tau_log.o(i.fputc) for fputc + printf0.o(i.__0vprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vprintf$0) refers to tau_log.o(i.fputc) for fputc + printf0.o(i.__0vprintf$0) refers to stdout.o(.data) for __stdout + printf0.o(i.__0vsnprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vsnprintf$0) refers to printf0.o(i._snputc) for _snputc + printf0.o(i.__0vsprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vsprintf$0) refers to printf0.o(i._sputc) for _sputc + printf1.o(i.__0fprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0fprintf$1) refers to tau_log.o(i.fputc) for fputc + printf1.o(i.__0printf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0printf$1) refers to tau_log.o(i.fputc) for fputc + printf1.o(i.__0printf$1) refers to stdout.o(.data) for __stdout + printf1.o(i.__0snprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0snprintf$1) refers to printf1.o(i._snputc) for _snputc + printf1.o(i.__0sprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0sprintf$1) refers to printf1.o(i._sputc) for _sputc + printf1.o(i.__0vfprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vfprintf$1) refers to tau_log.o(i.fputc) for fputc + printf1.o(i.__0vprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vprintf$1) refers to tau_log.o(i.fputc) for fputc + printf1.o(i.__0vprintf$1) refers to stdout.o(.data) for __stdout + printf1.o(i.__0vsnprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vsnprintf$1) refers to printf1.o(i._snputc) for _snputc + printf1.o(i.__0vsprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vsprintf$1) refers to printf1.o(i._sputc) for _sputc + printf1.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printf2.o(i.__0fprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0fprintf$2) refers to tau_log.o(i.fputc) for fputc + printf2.o(i.__0printf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0printf$2) refers to tau_log.o(i.fputc) for fputc + printf2.o(i.__0printf$2) refers to stdout.o(.data) for __stdout + printf2.o(i.__0snprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0snprintf$2) refers to printf2.o(i._snputc) for _snputc + printf2.o(i.__0sprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0sprintf$2) refers to printf2.o(i._sputc) for _sputc + printf2.o(i.__0vfprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vfprintf$2) refers to tau_log.o(i.fputc) for fputc + printf2.o(i.__0vprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vprintf$2) refers to tau_log.o(i.fputc) for fputc + printf2.o(i.__0vprintf$2) refers to stdout.o(.data) for __stdout + printf2.o(i.__0vsnprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vsnprintf$2) refers to printf2.o(i._snputc) for _snputc + printf2.o(i.__0vsprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vsprintf$2) refers to printf2.o(i._sputc) for _sputc + printf3.o(i.__0fprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0fprintf$3) refers to tau_log.o(i.fputc) for fputc + printf3.o(i.__0printf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0printf$3) refers to tau_log.o(i.fputc) for fputc + printf3.o(i.__0printf$3) refers to stdout.o(.data) for __stdout + printf3.o(i.__0snprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0snprintf$3) refers to printf3.o(i._snputc) for _snputc + printf3.o(i.__0sprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0sprintf$3) refers to printf3.o(i._sputc) for _sputc + printf3.o(i.__0vfprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vfprintf$3) refers to tau_log.o(i.fputc) for fputc + printf3.o(i.__0vprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vprintf$3) refers to tau_log.o(i.fputc) for fputc + printf3.o(i.__0vprintf$3) refers to stdout.o(.data) for __stdout + printf3.o(i.__0vsnprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vsnprintf$3) refers to printf3.o(i._snputc) for _snputc + printf3.o(i.__0vsprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vsprintf$3) refers to printf3.o(i._sputc) for _sputc + printf3.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printf4.o(i.__0fprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0fprintf$4) refers to tau_log.o(i.fputc) for fputc + printf4.o(i.__0printf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0printf$4) refers to tau_log.o(i.fputc) for fputc + printf4.o(i.__0printf$4) refers to stdout.o(.data) for __stdout + printf4.o(i.__0snprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0snprintf$4) refers to printf4.o(i._snputc) for _snputc + printf4.o(i.__0sprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0sprintf$4) refers to printf4.o(i._sputc) for _sputc + printf4.o(i.__0vfprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vfprintf$4) refers to tau_log.o(i.fputc) for fputc + printf4.o(i.__0vprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vprintf$4) refers to tau_log.o(i.fputc) for fputc + printf4.o(i.__0vprintf$4) refers to stdout.o(.data) for __stdout + printf4.o(i.__0vsnprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vsnprintf$4) refers to printf4.o(i._snputc) for _snputc + printf4.o(i.__0vsprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vsprintf$4) refers to printf4.o(i._sputc) for _sputc + printf4.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printf5.o(i.__0fprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0fprintf$5) refers to tau_log.o(i.fputc) for fputc + printf5.o(i.__0printf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0printf$5) refers to tau_log.o(i.fputc) for fputc + printf5.o(i.__0printf$5) refers to stdout.o(.data) for __stdout + printf5.o(i.__0snprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0snprintf$5) refers to printf5.o(i._snputc) for _snputc + printf5.o(i.__0sprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0sprintf$5) refers to printf5.o(i._sputc) for _sputc + printf5.o(i.__0vfprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vfprintf$5) refers to tau_log.o(i.fputc) for fputc + printf5.o(i.__0vprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vprintf$5) refers to tau_log.o(i.fputc) for fputc + printf5.o(i.__0vprintf$5) refers to stdout.o(.data) for __stdout + printf5.o(i.__0vsnprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vsnprintf$5) refers to printf5.o(i._snputc) for _snputc + printf5.o(i.__0vsprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vsprintf$5) refers to printf5.o(i._sputc) for _sputc + printf5.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printf6.o(i.__0fprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0fprintf$6) refers to tau_log.o(i.fputc) for fputc + printf6.o(i.__0printf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0printf$6) refers to tau_log.o(i.fputc) for fputc + printf6.o(i.__0printf$6) refers to stdout.o(.data) for __stdout + printf6.o(i.__0snprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0snprintf$6) refers to printf6.o(i._snputc) for _snputc + printf6.o(i.__0sprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0sprintf$6) refers to printf6.o(i._sputc) for _sputc + printf6.o(i.__0vfprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vfprintf$6) refers to tau_log.o(i.fputc) for fputc + printf6.o(i.__0vprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vprintf$6) refers to tau_log.o(i.fputc) for fputc + printf6.o(i.__0vprintf$6) refers to stdout.o(.data) for __stdout + printf6.o(i.__0vsnprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vsnprintf$6) refers to printf6.o(i._snputc) for _snputc + printf6.o(i.__0vsprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vsprintf$6) refers to printf6.o(i._sputc) for _sputc + printf6.o(i._printf_core) refers to printf6.o(i._printf_pre_padding) for _printf_pre_padding + printf6.o(i._printf_core) refers to printf6.o(i._printf_post_padding) for _printf_post_padding + printf6.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printf7.o(i.__0fprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0fprintf$7) refers to tau_log.o(i.fputc) for fputc + printf7.o(i.__0printf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0printf$7) refers to tau_log.o(i.fputc) for fputc + printf7.o(i.__0printf$7) refers to stdout.o(.data) for __stdout + printf7.o(i.__0snprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0snprintf$7) refers to printf7.o(i._snputc) for _snputc + printf7.o(i.__0sprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0sprintf$7) refers to printf7.o(i._sputc) for _sputc + printf7.o(i.__0vfprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vfprintf$7) refers to tau_log.o(i.fputc) for fputc + printf7.o(i.__0vprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vprintf$7) refers to tau_log.o(i.fputc) for fputc + printf7.o(i.__0vprintf$7) refers to stdout.o(.data) for __stdout + printf7.o(i.__0vsnprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vsnprintf$7) refers to printf7.o(i._snputc) for _snputc + printf7.o(i.__0vsprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vsprintf$7) refers to printf7.o(i._sputc) for _sputc + printf7.o(i._printf_core) refers to printf7.o(i._printf_pre_padding) for _printf_pre_padding + printf7.o(i._printf_core) refers to printf7.o(i._printf_post_padding) for _printf_post_padding + printf7.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printf8.o(i.__0fprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0fprintf$8) refers to tau_log.o(i.fputc) for fputc + printf8.o(i.__0printf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0printf$8) refers to tau_log.o(i.fputc) for fputc + printf8.o(i.__0printf$8) refers to stdout.o(.data) for __stdout + printf8.o(i.__0snprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0snprintf$8) refers to printf8.o(i._snputc) for _snputc + printf8.o(i.__0sprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0sprintf$8) refers to printf8.o(i._sputc) for _sputc + printf8.o(i.__0vfprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vfprintf$8) refers to tau_log.o(i.fputc) for fputc + printf8.o(i.__0vprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vprintf$8) refers to tau_log.o(i.fputc) for fputc + printf8.o(i.__0vprintf$8) refers to stdout.o(.data) for __stdout + printf8.o(i.__0vsnprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vsnprintf$8) refers to printf8.o(i._snputc) for _snputc + printf8.o(i.__0vsprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vsprintf$8) refers to printf8.o(i._sputc) for _sputc + printf8.o(i._printf_core) refers to printf8.o(i._printf_pre_padding) for _printf_pre_padding + printf8.o(i._printf_core) refers to printf8.o(i._printf_post_padding) for _printf_post_padding + printf8.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printfa.o(i.__0fprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0fprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0fprintf) refers to tau_log.o(i.fputc) for fputc + printfa.o(i.__0printf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0printf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0printf) refers to tau_log.o(i.fputc) for fputc + printfa.o(i.__0printf) refers to stdout.o(.data) for __stdout + printfa.o(i.__0snprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0snprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0snprintf) refers to printfa.o(i._snputc) for _snputc + printfa.o(i.__0sprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0sprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0sprintf) refers to printfa.o(i._sputc) for _sputc + printfa.o(i.__0vfprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vfprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vfprintf) refers to tau_log.o(i.fputc) for fputc + printfa.o(i.__0vprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vprintf) refers to tau_log.o(i.fputc) for fputc + printfa.o(i.__0vprintf) refers to stdout.o(.data) for __stdout + printfa.o(i.__0vsnprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vsnprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vsnprintf) refers to printfa.o(i._snputc) for _snputc + printfa.o(i.__0vsprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vsprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vsprintf) refers to printfa.o(i._sputc) for _sputc + printfa.o(i._fp_digits) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._fp_digits) refers to dmul.o(.text) for __aeabi_dmul + printfa.o(i._fp_digits) refers to ddiv.o(.text) for __aeabi_ddiv + printfa.o(i._fp_digits) refers to cdrcmple.o(.text) for __aeabi_cdrcmple + printfa.o(i._fp_digits) refers to dadd.o(.text) for __aeabi_dadd + printfa.o(i._fp_digits) refers to dfixul.o(.text) for __aeabi_d2ulz + printfa.o(i._fp_digits) refers to uldiv.o(.text) for __aeabi_uldivmod + printfa.o(i._printf_core) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._printf_core) refers to printfa.o(i._printf_pre_padding) for _printf_pre_padding + printfa.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printfa.o(i._printf_core) refers to printfa.o(i._printf_post_padding) for _printf_post_padding + printfa.o(i._printf_core) refers to printfa.o(i._fp_digits) for _fp_digits + printfa.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printfa.o(i._printf_post_padding) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._printf_pre_padding) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._snputc) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._sputc) refers (Special) to iusefp.o(.text) for __I$use$fp + fadd.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + fadd.o(.text) refers to fepilogue.o(.text) for _float_epilogue + fmul.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + fdiv.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + fdiv.o(.text) refers to fepilogue.o(.text) for _float_round + fscalb.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dadd.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dadd.o(.text) refers to llshl.o(.text) for __aeabi_llsl + dadd.o(.text) refers to llsshr.o(.text) for __aeabi_lasr + dadd.o(.text) refers to depilogue.o(.text) for _double_epilogue + dmul.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dmul.o(.text) refers to depilogue.o(.text) for _double_epilogue + ddiv.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + ddiv.o(.text) refers to depilogue.o(.text) for _double_round + fflti.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + fflti.o(.text) refers to fepilogue.o(.text) for _float_epilogue + ffltui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + ffltui.o(.text) refers to fepilogue.o(.text) for _float_epilogue + dflti.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dflti.o(.text) refers to depilogue.o(.text) for _double_epilogue + dfltui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dfltui.o(.text) refers to depilogue.o(.text) for _double_epilogue + ffixi.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + ffixui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dfixi.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dfixi.o(.text) refers to llushr.o(.text) for __aeabi_llsr + dfixui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dfixui.o(.text) refers to llushr.o(.text) for __aeabi_llsr + f2d.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + cdcmple.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + cfcmple.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + cfrcmple.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + entry2.o(.ARM.Collect$$$$00000001) refers to entry2.o(.ARM.Collect$$$$00002712) for __lit__00000000 + entry2.o(.ARM.Collect$$$$00002712) refers to startup_armcm0.o(STACK) for __initial_sp + entry2.o(__vectab_stack_and_reset_area) refers to startup_armcm0.o(STACK) for __initial_sp + entry2.o(__vectab_stack_and_reset_area) refers to entry.o(.ARM.Collect$$$$00000000) for __main + entry5.o(.ARM.Collect$$$$00000004) refers to init.o(.text) for __scatterload + entry9a.o(.ARM.Collect$$$$0000000B) refers to main.o(i.main) for main + entry9b.o(.ARM.Collect$$$$0000000C) refers to main.o(i.main) for main + uldiv.o(.text) refers to llushr.o(.text) for __aeabi_llsr + uldiv.o(.text) refers to llshl.o(.text) for __aeabi_llsl + errno.o(i.__aeabi_errno_addr) refers to errno.o(.data) for .data + errno.o(i.__read_errno) refers to errno.o(.data) for .data + errno.o(i.__set_errno) refers to errno.o(.data) for .data + depilogue.o(.text) refers to depilogue.o(i.__ARM_clz) for __ARM_clz + depilogue.o(.text) refers to llshl.o(.text) for __aeabi_llsl + depilogue.o(.text) refers to llushr.o(.text) for __aeabi_llsr + dsqrt.o(.text) refers to llushr.o(.text) for __aeabi_llsr + dsqrt.o(.text) refers to depilogue.o(.text) for _double_round + dfixul.o(.text) refers to llushr.o(.text) for __aeabi_llsr + dfixul.o(.text) refers to llshl.o(.text) for __aeabi_llsl + init.o(.text) refers to entry5.o(.ARM.Collect$$$$00000004) for __main_after_scatterload + + +============================================================================== + +Removing Unused input sections from the image. + + Removing main.o(.rev16_text), (4 bytes). + Removing main.o(.revsh_text), (4 bytes). + Removing ap_demo.o(.rev16_text), (4 bytes). + Removing ap_demo.o(.revsh_text), (4 bytes). + Removing ap_demo.o(i.PWM_OUTPUT_TEST), (44 bytes). + Removing ap_demo.o(i.PWM_Task), (108 bytes). + Removing ap_demo.o(i.test_pwm_out_adjust), (104 bytes). + Removing ap_demo.o(.data), (2 bytes). + Removing ap_demo.o(.data), (2 bytes). + Removing ap_demo.o(.data), (2 bytes). + Removing ap_demo.o(.data), (2 bytes). + Removing app_tp_transfer.o(.rev16_text), (4 bytes). + Removing app_tp_transfer.o(.revsh_text), (4 bytes). + Removing app_tp_transfer.o(i.ap_tp_st_touch_get_status), (36 bytes). + Removing app_tp_transfer.o(i.app_tp_m_transfer_complate), (8 bytes). + Removing app_tp_transfer.o(i.app_tp_phone_clear_reset_on), (12 bytes). + Removing app_tp_transfer.o(i.app_tp_phone_reset_on), (12 bytes). + Removing app_tp_transfer.o(i.app_tp_s_transfer_complate), (26 bytes). + Removing app_tp_st_touch.o(.rev16_text), (4 bytes). + Removing app_tp_st_touch.o(.revsh_text), (4 bytes). + Removing app_tp_st_touch.o(i.ap_tp_st_touch_error_handler_03), (20 bytes). + Removing app_tp_st_touch.o(i.ap_tp_st_touch_error_handler_F3), (14 bytes). + Removing app_tp_st_touch.o(i.ap_tp_st_touch_error_handler_FF), (32 bytes). + Removing app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_record_event), (148 bytes). + Removing app_tp_st_touch.o(i.ap_tp_st_touch_software_reset), (172 bytes). + Removing app_tp_for_custom_s21u.o(.rev16_text), (4 bytes). + Removing app_tp_for_custom_s21u.o(.revsh_text), (4 bytes). + Removing app_tp_for_custom_s21u.o(.constdata), (8 bytes). + Removing app_tp_for_custom_s21u.o(.constdata), (1 bytes). + Removing app_tp_for_custom_s21u.o(.constdata), (5 bytes). + Removing app_tp_for_custom_s21u.o(.constdata), (1 bytes). + Removing app_tp_for_custom_s21u.o(.constdata), (1 bytes). + Removing app_tp_for_custom_s21u.o(.constdata), (6 bytes). + Removing app_tp_for_custom_s21u.o(.constdata), (4 bytes). + Removing app_tp_for_custom_s21u.o(.constdata), (6 bytes). + Removing app_tp_for_custom_s21u.o(.constdata), (6 bytes). + Removing app_tp_for_custom_s21u.o(.constdata), (6 bytes). + Removing app_tp_for_custom_s21u.o(.constdata), (6 bytes). + Removing app_tp_for_custom_s21u.o(.constdata), (6 bytes). + Removing app_tp_for_custom_s21u.o(.constdata), (6 bytes). + Removing app_tp_for_custom_s21u.o(.constdata), (6 bytes). + Removing app_tp_for_custom_s21u.o(.constdata), (6 bytes). + Removing app_tp_for_custom_s21u.o(.constdata), (6 bytes). + Removing app_tp_for_custom_s21u.o(.constdata), (6 bytes). + Removing app_tp_for_custom_s21u.o(.constdata), (6 bytes). + Removing app_tp_for_custom_s21u.o(.constdata), (9 bytes). + Removing app_tp_for_custom_s21u.o(.constdata), (6 bytes). + Removing app_tp_for_custom_s21u.o(.constdata), (5 bytes). + Removing app_tp_for_custom_s21u.o(.constdata), (12 bytes). + Removing app_tp_for_custom_s21u.o(.constdata), (12 bytes). + Removing app_tp_for_custom_s21u.o(.constdata), (12 bytes). + Removing app_tp_for_custom_s21u.o(.constdata), (12 bytes). + Removing app_tp_for_custom_s21u.o(.constdata), (5 bytes). + Removing app_tp_for_custom_s21u.o(.constdata), (1 bytes). + Removing app_tp_for_custom_s21u.o(.data), (1 bytes). + Removing app_tp_for_custom_s21u.o(.data), (3 bytes). + Removing app_tp_for_custom_s21u.o(.data), (3 bytes). + Removing app_tp_for_custom_s21u.o(.data), (1 bytes). + Removing app_tp_for_custom_s21u.o(.data), (1 bytes). + Removing app_tp_for_custom_s21u.o(.data), (1 bytes). + Removing app_tp_for_custom_s21u.o(.data), (16 bytes). + Removing app_tp_for_custom_s21u.o(.data), (16 bytes). + Removing app_tp_for_custom_s21u.o(.data), (1 bytes). + Removing app_tp_for_custom_s21u.o(.data), (48 bytes). + Removing app_tp_for_custom_s21u.o(.data), (1 bytes). + Removing board.o(.rev16_text), (4 bytes). + Removing board.o(.revsh_text), (4 bytes). + Removing startup_armcm0.o(HEAP), (3072 bytes). + Removing hal_dsi_rx_ctrl.o(.rev16_text), (4 bytes). + Removing hal_dsi_rx_ctrl.o(.revsh_text), (4 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_ack_long_cmd), (88 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_ack_short_cmd), (28 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video), (228 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_mode_init), (48 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern), (216 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_compressen_en), (16 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode), (100 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_register_write_cmd_entry), (10 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_release_handle), (40 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_auto_hw_filter), (28 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk), (44 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_dcs_direct_mode), (8 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_cmd_filter), (40 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode), (52 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pentile_format), (56 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data), (148 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rect_pixel_data), (268 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk), (80 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_te_waveform), (52 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate), (10 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution), (32 bytes). + Removing hal_dsi_tx_ctrl.o(.rev16_text), (4 bytes). + Removing hal_dsi_tx_ctrl.o(.revsh_text), (4 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic), (148 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_cmd_mode_rcv_te), (10 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard), (280 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker), (172 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_mode_init), (30 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_ulps_mode), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_ulps_mode), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd), (140 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_release_handle), (28 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_cus_pq_filter), (28 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_endianness), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_escape_clock_div), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_lp_cmd), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data), (272 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg), (80 bytes). + Removing hal_gpio.o(.rev16_text), (4 bytes). + Removing hal_gpio.o(.revsh_text), (4 bytes). + Removing hal_gpio.o(i.hal_gpio_get_int_type), (20 bytes). + Removing hal_gpio.o(i.hal_gpio_get_pull_state), (32 bytes). + Removing hal_gpio.o(i.hal_gpio_init_input), (32 bytes). + Removing hal_gpio.o(i.hal_gpio_set_driving_strength), (32 bytes). + Removing hal_gpio.o(i.hal_gpio_set_output_data_ex), (36 bytes). + Removing hal_gpio.o(i.hal_gpio_set_schmitt_trigger), (32 bytes). + Removing hal_gpio.o(i.hal_gpio_set_slew_rate), (32 bytes). + Removing hal_i2c_master.o(.rev16_text), (4 bytes). + Removing hal_i2c_master.o(.revsh_text), (4 bytes). + Removing hal_i2c_master.o(i.hal_i2c_m_deinit), (8 bytes). + Removing hal_i2c_master.o(i.hal_i2c_m_set_high_impedance), (46 bytes). + Removing hal_i2c_slave.o(.rev16_text), (4 bytes). + Removing hal_i2c_slave.o(.revsh_text), (4 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_deinit), (88 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_get_tx_byte_num), (12 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_read_complate), (12 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_read_complate_clear), (12 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_read_data), (32 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_rxfifo_notempty), (40 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_sel), (12 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_set_dma_tx_cycle), (36 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_set_high_impedance), (88 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_write_complate), (12 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_write_data), (32 bytes). + Removing hal_pwm.o(.rev16_text), (4 bytes). + Removing hal_pwm.o(.revsh_text), (4 bytes). + Removing hal_pwm.o(i.hal_pwm_in_clear_int), (8 bytes). + Removing hal_pwm.o(i.hal_pwm_in_config_int), (60 bytes). + Removing hal_pwm.o(i.hal_pwm_in_ctrl_int), (8 bytes). + Removing hal_pwm.o(i.hal_pwm_in_deinit), (18 bytes). + Removing hal_pwm.o(i.hal_pwm_in_get_current_count), (8 bytes). + Removing hal_pwm.o(i.hal_pwm_in_get_high_period), (36 bytes). + Removing hal_pwm.o(i.hal_pwm_in_get_low_period), (36 bytes). + Removing hal_pwm.o(i.hal_pwm_in_get_total_period), (36 bytes). + Removing hal_pwm.o(i.hal_pwm_in_init), (26 bytes). + Removing hal_pwm.o(i.hal_pwm_in_register_callback), (10 bytes). + Removing hal_pwm.o(i.hal_pwm_in_set_int), (8 bytes). + Removing hal_pwm.o(i.hal_pwm_out_common_config), (32 bytes). + Removing hal_pwm.o(i.hal_pwm_out_config_all), (28 bytes). + Removing hal_pwm.o(i.hal_pwm_out_config_duty_ratio), (76 bytes). + Removing hal_pwm.o(i.hal_pwm_out_convert_time), (144 bytes). + Removing hal_pwm.o(i.hal_pwm_out_deinit), (32 bytes). + Removing hal_pwm.o(i.hal_pwm_out_init), (12 bytes). + Removing hal_pwm.o(i.hal_pwm_out_pause), (8 bytes). + Removing hal_pwm.o(i.hal_pwm_out_sel_io), (38 bytes). + Removing hal_pwm.o(i.hal_pwm_out_sync_all), (28 bytes). + Removing hal_pwm.o(i.hal_pwm_out_sync_ctl), (12 bytes). + Removing hal_pwm.o(i.hal_pwm_out_sync_pause), (8 bytes). + Removing hal_pwm.o(i.hal_pwm_out_sync_period), (32 bytes). + Removing hal_pwm.o(i.hal_pwm_out_sync_thr), (48 bytes). + Removing hal_pwm.o(.data), (1 bytes). + Removing hal_spi_master.o(.rev16_text), (4 bytes). + Removing hal_spi_master.o(.revsh_text), (4 bytes). + Removing hal_spi_master.o(i.hal_spi_m_callback), (24 bytes). + Removing hal_spi_master.o(i.hal_spi_m_deinit), (10 bytes). + Removing hal_spi_master.o(i.hal_spi_m_dma_init), (104 bytes). + Removing hal_spi_master.o(i.hal_spi_m_dma_read), (36 bytes). + Removing hal_spi_master.o(i.hal_spi_m_dma_write), (40 bytes). + Removing hal_spi_master.o(i.hal_spi_m_get_transfer_complate), (36 bytes). + Removing hal_spi_master.o(i.hal_spi_m_gpio_init), (8 bytes). + Removing hal_spi_master.o(i.hal_spi_m_read_rxfifo), (28 bytes). + Removing hal_spi_master.o(i.hal_spi_m_set_high_impedance), (100 bytes). + Removing hal_spi_master.o(.data), (1 bytes). + Removing hal_swire.o(.rev16_text), (4 bytes). + Removing hal_swire.o(.revsh_text), (4 bytes). + Removing hal_system.o(.rev16_text), (4 bytes). + Removing hal_system.o(.revsh_text), (4 bytes). + Removing hal_system.o(i.hal_system_clear_debug_state), (10 bytes). + Removing hal_system.o(i.hal_system_deep_sleep_mode), (8 bytes). + Removing hal_system.o(i.hal_system_disable_systick), (8 bytes). + Removing hal_system.o(i.hal_system_get_debug_state), (8 bytes). + Removing hal_system.o(i.hal_system_idle_mode), (8 bytes). + Removing hal_system.o(i.hal_system_register_systick_cb), (8 bytes). + Removing hal_system.o(i.hal_system_reset_chip), (32 bytes). + Removing hal_system.o(i.hal_system_share_flash_mode), (20 bytes). + Removing hal_system.o(i.hal_system_sleep_mode), (48 bytes). + Removing hal_timer.o(.rev16_text), (4 bytes). + Removing hal_timer.o(.revsh_text), (4 bytes). + Removing hal_timer.o(i.hal_timer_get_status), (8 bytes). + Removing hal_timer.o(i.hal_timer_set_repeat), (8 bytes). + Removing hal_timer.o(i.hal_timer_start_ex), (72 bytes). + Removing tau_delay.o(.rev16_text), (4 bytes). + Removing tau_delay.o(.revsh_text), (4 bytes). + Removing tau_log.o(.rev16_text), (4 bytes). + Removing tau_log.o(.revsh_text), (4 bytes). + Removing tau_log.o(i.fgetc), (22 bytes). + Removing hal_uart.o(.rev16_text), (4 bytes). + Removing hal_uart.o(.revsh_text), (4 bytes). + Removing hal_uart.o(i.hal_uart_deinit), (28 bytes). + Removing hal_uart.o(i.hal_uart_dmacallback), (36 bytes). + Removing hal_uart.o(i.hal_uart_receive_blocking), (16 bytes). + Removing hal_uart.o(i.hal_uart_receive_dma), (76 bytes). + Removing hal_uart.o(i.hal_uart_transmit_dma), (76 bytes). + Removing hal_internal_vsync.o(.rev16_text), (4 bytes). + Removing hal_internal_vsync.o(.revsh_text), (4 bytes). + Removing hal_internal_vsync.o(i.hal_internal_sync_cmd_mode_rcv_te), (168 bytes). + Removing hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change), (556 bytes). + Removing hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual), (512 bytes). + Removing hal_internal_vsync.o(i.hal_internal_vsync_register_write_cmd_entry), (12 bytes). + Removing hal_internal_vsync.o(i.hal_internal_vsync_set_dcs_direct_mode), (48 bytes). + Removing hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate), (152 bytes). + Removing hal_internal_vsync.o(i.hal_internal_vsync_update_lcdc_addr), (48 bytes). + Removing drv_common.o(.rev16_text), (4 bytes). + Removing drv_common.o(.revsh_text), (4 bytes). + Removing drv_common.o(i.drv_common_disable_systick), (20 bytes). + Removing drv_common.o(i.drv_common_idle_mode), (40 bytes). + Removing drv_common.o(i.drv_common_systick_register_cb), (12 bytes). + Removing drv_crgu.o(.rev16_text), (4 bytes). + Removing drv_crgu.o(.revsh_text), (4 bytes). + Removing drv_crgu.o(i.drv_crgu_clear_all_reset_flags), (12 bytes). + Removing drv_crgu.o(i.drv_crgu_clear_reset_flag), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_config_clocks), (16 bytes). + Removing drv_crgu.o(i.drv_crgu_config_clocks_div), (16 bytes). + Removing drv_crgu.o(i.drv_crgu_config_clocks_src), (16 bytes). + Removing drv_crgu.o(i.drv_crgu_get_ana_clk_status), (24 bytes). + Removing drv_crgu.o(i.drv_crgu_get_clocks), (12 bytes). + Removing drv_crgu.o(i.drv_crgu_get_fpga_id), (12 bytes). + Removing drv_crgu.o(i.drv_crgu_get_mipi_ref_src), (16 bytes). + Removing drv_crgu.o(i.drv_crgu_get_reset_flag), (24 bytes). + Removing drv_crgu.o(i.drv_crgu_get_system_clk), (28 bytes). + Removing drv_crgu.o(i.drv_crgu_reset_chip), (12 bytes). + Removing drv_crgu.o(i.drv_crgu_set_200m_scan_src), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_300m_scan_src), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_abp0_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_adc_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_adc_src), (24 bytes). + Removing drv_crgu.o(i.drv_crgu_set_apb1_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_apb2_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_fls_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_fls_src), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_monitor_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_monitor_src), (20 bytes). + Removing drv_dma.o(.rev16_text), (4 bytes). + Removing drv_dma.o(.revsh_text), (4 bytes). + Removing drv_dma.o(i.drv_dma_abort_transfer), (32 bytes). + Removing drv_dma.o(i.drv_dma_ahb_init), (74 bytes). + Removing drv_dma.o(i.drv_dma_channel_is_active), (20 bytes). + Removing drv_dma.o(i.drv_dma_deinit), (32 bytes). + Removing drv_dma.o(i.drv_dma_disenable_channel_interrupts), (24 bytes). + Removing drv_dma.o(i.drv_dma_enable_cycle), (44 bytes). + Removing drv_dma.o(i.drv_dma_get_remaining_bytes), (32 bytes). + Removing drv_dma.o(i.drv_dma_init), (24 bytes). + Removing drv_dma.o(i.drv_dma_m2m_init), (72 bytes). + Removing drv_dma.o(i.drv_dma_reset), (10 bytes). + Removing drv_dma.o(i.drv_dma_set_ccr), (114 bytes). + Removing drv_dma.o(i.drv_dma_start_transfer), (32 bytes). + Removing drv_fls.o(.rev16_text), (4 bytes). + Removing drv_fls.o(.revsh_text), (4 bytes). + Removing drv_fls.o(i.__NVIC_DisableIRQ), (32 bytes). + Removing drv_fls.o(i.drv_fls_gpio_connect), (28 bytes). + Removing drv_fls.o(i.drv_fls_gpio_disconnect), (32 bytes). + Removing drv_fls.o(i.fls_EnableClk), (12 bytes). + Removing drv_fls.o(i.fls_busy_pending), (12 bytes). + Removing drv_fls.o(i.fls_clear_irq_status), (6 bytes). + Removing drv_fls.o(i.fls_ctrl_cfg_init), (72 bytes). + Removing drv_fls.o(i.fls_ddat_enable), (24 bytes). + Removing drv_fls.o(i.fls_de_init), (52 bytes). + Removing drv_fls.o(i.fls_descr), (10 bytes). + Removing drv_fls.o(i.fls_disable_it), (36 bytes). + Removing drv_fls.o(i.fls_en_scr), (10 bytes). + Removing drv_fls.o(i.fls_enable_it), (48 bytes). + Removing drv_fls.o(i.fls_get_crcout), (4 bytes). + Removing drv_fls.o(i.fls_get_default_fls_config), (20 bytes). + Removing drv_fls.o(i.fls_get_default_spi_config), (44 bytes). + Removing drv_fls.o(i.fls_get_default_tuning), (12 bytes). + Removing drv_fls.o(i.fls_get_tuning), (18 bytes). + Removing drv_fls.o(i.fls_init), (62 bytes). + Removing drv_fls.o(i.fls_qadr_enable), (22 bytes). + Removing drv_fls.o(i.fls_qcmd_enable), (22 bytes). + Removing drv_fls.o(i.fls_qdat_enable), (22 bytes). + Removing drv_fls.o(i.fls_read_byte_data), (130 bytes). + Removing drv_fls.o(i.fls_read_cmd), (104 bytes). + Removing drv_fls.o(i.fls_read_cmd_it), (110 bytes). + Removing drv_fls.o(i.fls_reset_crc), (18 bytes). + Removing drv_fls.o(i.fls_scr_clear), (10 bytes). + Removing drv_fls.o(i.fls_set_addr_dummy), (32 bytes). + Removing drv_fls.o(i.fls_set_addr_len), (32 bytes). + Removing drv_fls.o(i.fls_set_mc_irq_mask), (26 bytes). + Removing drv_fls.o(i.fls_set_read), (10 bytes). + Removing drv_fls.o(i.fls_set_tuning), (24 bytes). + Removing drv_fls.o(i.fls_set_write), (10 bytes). + Removing drv_fls.o(i.fls_single_mode), (16 bytes). + Removing drv_fls.o(i.fls_spi_init), (180 bytes). + Removing drv_fls.o(i.fls_spi_start), (10 bytes). + Removing drv_fls.o(i.fls_swrst), (18 bytes). + Removing drv_fls.o(i.fls_write_byte_data), (164 bytes). + Removing drv_fls.o(i.fls_write_cmd), (58 bytes). + Removing drv_fls.o(.data), (4 bytes). + Removing drv_gpio.o(.rev16_text), (4 bytes). + Removing drv_gpio.o(.revsh_text), (4 bytes). + Removing drv_gpio.o(i.drv_gpio_get_pull_state), (224 bytes). + Removing drv_gpio.o(i.drv_gpio_set_driving_strength), (312 bytes). + Removing drv_gpio.o(i.drv_gpio_set_schmitt_trigger), (168 bytes). + Removing drv_gpio.o(i.drv_gpio_set_slew_rate), (168 bytes). + Removing drv_i2c_dma.o(.rev16_text), (4 bytes). + Removing drv_i2c_dma.o(.revsh_text), (4 bytes). + Removing drv_i2c_master.o(.rev16_text), (4 bytes). + Removing drv_i2c_master.o(.revsh_text), (4 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_bus_init), (36 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_deinit), (80 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_disable_intr), (16 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_get_fifo_status), (28 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_read_data), (32 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_set_fifo_threshold), (24 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_set_sys_mask), (48 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_write_data), (32 bytes). + Removing drv_i2c_slave.o(.rev16_text), (4 bytes). + Removing drv_i2c_slave.o(.revsh_text), (4 bytes). + Removing drv_i2c_slave.o(i.drv_i2c_s_read_data), (30 bytes). + Removing drv_i2c_slave.o(i.drv_i2c_s_set_fifo_threshold), (16 bytes). + Removing drv_param_init.o(.rev16_text), (4 bytes). + Removing drv_param_init.o(.revsh_text), (4 bytes). + Removing drv_param_init.o(i.drv_param_init_set_sclu_filter), (28 bytes). + Removing drv_pwm.o(.rev16_text), (4 bytes). + Removing drv_pwm.o(.revsh_text), (4 bytes). + Removing drv_pwm.o(i.drv_pwm_in_clear_pwm_int_all), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_in_enable), (32 bytes). + Removing drv_pwm.o(i.drv_pwm_in_get_counter_period), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_in_get_current_count), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_in_get_high_period), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_in_get_low_period), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_in_register_callback), (24 bytes). + Removing drv_pwm.o(i.drv_pwm_in_set_pwm_int), (32 bytes). + Removing drv_pwm.o(i.drv_pwm_in_set_sys_int), (64 bytes). + Removing drv_pwm.o(i.drv_pwm_out_enable), (32 bytes). + Removing drv_pwm.o(i.drv_pwm_out_get_sync_flag), (16 bytes). + Removing drv_pwm.o(i.drv_pwm_out_pause), (28 bytes). + Removing drv_pwm.o(i.drv_pwm_out_set_control), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_out_set_period), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_out_set_sync_mode), (32 bytes). + Removing drv_pwm.o(i.drv_pwm_out_set_threshold), (12 bytes). + Removing drv_pwr.o(.rev16_text), (4 bytes). + Removing drv_pwr.o(.revsh_text), (4 bytes). + Removing drv_pwr.o(i.drv_pwr_enter_deep_sleep_mode), (44 bytes). + Removing drv_pwr.o(i.drv_pwr_set_frame_buff_pd), (28 bytes). + Removing drv_spi_dma.o(.rev16_text), (4 bytes). + Removing drv_spi_dma.o(.revsh_text), (4 bytes). + Removing drv_spi_dma.o(i.__NVIC_ClearPendingIRQ), (24 bytes). + Removing drv_spi_dma.o(i.drv_spi_abort_dma), (108 bytes). + Removing drv_spi_dma.o(i.drv_spi_dma_callback), (60 bytes). + Removing drv_spi_dma.o(i.drv_spi_dma_ch6_init), (208 bytes). + Removing drv_spi_dma.o(i.drv_spi_dma_init), (220 bytes). + Removing drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback), (48 bytes). + Removing drv_spi_dma.o(i.drv_spi_set_dma_irq_callback), (88 bytes). + Removing drv_spi_dma.o(i.drv_spim_dma_read), (96 bytes). + Removing drv_spi_dma.o(i.drv_spim_dma_write), (60 bytes). + Removing drv_spi_dma.o(i.drv_spis_dma_write), (72 bytes). + Removing drv_spi_dma.o(.bss), (480 bytes). + Removing drv_spi_dma.o(.data), (16 bytes). + Removing drv_spi_master.o(.rev16_text), (4 bytes). + Removing drv_spi_master.o(.revsh_text), (4 bytes). + Removing drv_spi_master.o(i.drv_spi_m_deinit), (40 bytes). + Removing drv_spi_master.o(i.drv_spi_m_disable_int), (68 bytes). + Removing drv_spi_master.o(i.drv_spi_m_enable_int), (72 bytes). + Removing drv_spi_master.o(i.drv_spi_m_enable_rx_dma), (32 bytes). + Removing drv_spi_master.o(i.drv_spi_m_enable_tx_dma), (28 bytes). + Removing drv_spi_master.o(i.drv_spi_m_get_dma_address), (8 bytes). + Removing drv_spi_master.o(i.drv_spi_m_gpio_init), (32 bytes). + Removing drv_spi_master.o(i.drv_spi_m_set_intr_callback), (12 bytes). + Removing drv_spi_master.o(i.drv_spi_m_switch_sclk), (28 bytes). + Removing drv_spi_master.o(i.drv_spi_m_write_data), (44 bytes). + Removing drv_spi_master.o(i.drv_spi_master_init), (164 bytes). + Removing drv_swire.o(.rev16_text), (4 bytes). + Removing drv_swire.o(.revsh_text), (4 bytes). + Removing drv_sys_cfg.o(.rev16_text), (4 bytes). + Removing drv_sys_cfg.o(.revsh_text), (4 bytes). + Removing drv_sys_cfg.o(i.drv_sys_cfg_dma_req_mask), (32 bytes). + Removing drv_sys_cfg.o(i.drv_sys_cfg_read_version0_id), (12 bytes). + Removing drv_sys_cfg.o(i.drv_sys_cfg_set_ap_reset), (28 bytes). + Removing drv_timer.o(.rev16_text), (4 bytes). + Removing drv_timer.o(.revsh_text), (4 bytes). + Removing drv_timer.o(i.drv_timer_get_status), (38 bytes). + Removing hal_internal_soft_sync.o(.rev16_text), (4 bytes). + Removing hal_internal_soft_sync.o(.revsh_text), (4 bytes). + Removing hal_internal_soft_sync.o(i.hal_intl_svs_deinit_rx), (48 bytes). + Removing hal_internal_soft_sync.o(i.hal_intl_svs_set_input_frate), (120 bytes). + Removing drv_dsi_rx.o(.rev16_text), (4 bytes). + Removing drv_dsi_rx.o(.revsh_text), (4 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_get_phy_stopstate), (66 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_get_version), (4 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_phy_resistor_calibration), (236 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_pg_cfg), (32 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_pg_cfg), (48 bytes). + Removing drv_dsi_rx.o(i.drv_rx_phy_test_read), (12 bytes). + Removing drv_dsi_tx.o(.rev16_text), (4 bytes). + Removing drv_dsi_tx.o(.revsh_text), (4 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_command_get_payload), (4 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_force_interrupt), (8 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_get_phy_status), (6 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_forcepll), (12 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_resistor_calibration), (232 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_start), (18 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_status_pll_lock), (10 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ulpsactivenot), (62 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_trigger), (92 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter), (344 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit), (276 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_sdf_3d), (28 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_set_bta), (22 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_set_vpg), (70 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_version), (4 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_vid_shadow), (16 bytes). + Removing drv_dsi_tx.o(i.drv_tx_phy_test_read), (10 bytes). + Removing drv_lcdc.o(.rev16_text), (4 bytes). + Removing drv_lcdc.o(.revsh_text), (4 bytes). + Removing drv_lcdc.o(i.drv_lcdc_config_rgb_to_pentile), (6 bytes). + Removing drv_lcdc.o(i.drv_lcdc_enable), (42 bytes). + Removing drv_lcdc.o(i.drv_lcdc_update_shadow_reg), (12 bytes). + Removing drv_memc.o(.rev16_text), (4 bytes). + Removing drv_memc.o(.revsh_text), (4 bytes). + Removing drv_memc.o(i.drv_memc_set_db_frm_time), (14 bytes). + Removing drv_memc.o(i.drv_memc_set_db_int_frame), (28 bytes). + Removing drv_memc.o(i.drv_memc_set_fb_remaining_line_trigger), (12 bytes). + Removing drv_memc.o(i.drv_memc_set_read_trigger_line), (16 bytes). + Removing drv_memc.o(i.drv_memc_set_te_ind), (16 bytes). + Removing drv_memc.o(i.drv_memc_set_tear_hwclr), (16 bytes). + Removing drv_memc.o(i.drv_memc_set_vidc_fb_arb), (14 bytes). + Removing drv_memc.o(i.drv_memc_set_write_trigger_line), (16 bytes). + Removing drv_rxbr.o(.rev16_text), (4 bytes). + Removing drv_rxbr.o(.revsh_text), (4 bytes). + Removing drv_rxbr.o(i.drv_rxbr_dsc_flush), (16 bytes). + Removing drv_rxbr.o(i.drv_rxbr_get_cur_hline_rcv_cnt), (8 bytes). + Removing drv_rxbr.o(i.drv_rxbr_get_ipi_vsync_interval), (8 bytes). + Removing drv_rxbr.o(i.drv_rxbr_get_pix_fmt), (8 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_cmd_filter), (204 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_col_addr), (4 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_compress), (24 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_page_addr), (4 bytes). + Removing drv_rxbr.o(i.drv_rxbr_soft_reset), (98 bytes). + Removing drv_vidc.o(.rev16_text), (4 bytes). + Removing drv_vidc.o(.revsh_text), (4 bytes). + Removing drv_vidc.o(i.drv_vidc_clear_status0), (14 bytes). + Removing drv_vidc.o(i.drv_vidc_debug_cap_pixel), (24 bytes). + Removing drv_vidc.o(i.drv_vidc_debug_signal_frame), (30 bytes). + Removing drv_vidc.o(i.drv_vidc_get_int_source), (38 bytes). + Removing drv_vidc.o(i.drv_vidc_get_status0), (20 bytes). + Removing drv_vidc.o(i.drv_vidc_get_status1), (20 bytes). + Removing drv_vidc.o(i.drv_vidc_get_status2), (6 bytes). + Removing drv_vidc.o(i.drv_vidc_set_dsc_thresh), (4 bytes). + Removing drv_vidc.o(i.drv_vidc_set_frmst_latency), (12 bytes). + Removing drv_vidc.o(i.drv_vidc_set_inff_thresh), (4 bytes). + Removing drv_vidc.o(i.drv_vidc_set_irq_line), (20 bytes). + Removing drv_vidc.o(i.drv_vidc_set_module_enable), (20 bytes). + Removing drv_vidc.o(i.drv_vidc_set_outff_thresh), (4 bytes). + Removing drv_vidc.o(i.drv_vidc_update_src_format), (14 bytes). + Removing irq_redirect .o(.rev16_text), (4 bytes). + Removing irq_redirect .o(.revsh_text), (4 bytes). + Removing drv_efuse.o(.rev16_text), (4 bytes). + Removing drv_efuse.o(.revsh_text), (4 bytes). + Removing drv_efuse.o(i.drv_efuse_crc_cal), (128 bytes). + Removing drv_efuse.o(i.drv_efuse_get_default_config), (26 bytes). + Removing drv_efuse.o(i.drv_efuse_int_disable), (12 bytes). + Removing drv_efuse.o(i.drv_efuse_write), (46 bytes). + Removing drv_efuse.o(i.drv_efuse_write_req), (22 bytes). + Removing drv_phy_common.o(.rev16_text), (4 bytes). + Removing drv_phy_common.o(.revsh_text), (4 bytes). + Removing drv_phy_common.o(i.drv_phy_test_read), (8 bytes). + Removing drv_chip_info.o(.rev16_text), (4 bytes). + Removing drv_chip_info.o(.revsh_text), (4 bytes). + Removing drv_dsc_dec.o(.rev16_text), (4 bytes). + Removing drv_dsc_dec.o(.revsh_text), (4 bytes). + Removing drv_dsc_dec.o(i.drv_dsc_dec_set_u32_pps), (120 bytes). + Removing hal_spi_slave.o(.rev16_text), (4 bytes). + Removing hal_spi_slave.o(.revsh_text), (4 bytes). + Removing hal_spi_slave.o(i.hal_spi_s_set_high_impedance), (100 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_auto_transfer_abort), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_auto_transfer_start), (56 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_busy), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_deinit), (10 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_disable), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_enable), (96 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_flush_fifo), (20 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_get_rxfifo_notempty), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_gpio_init), (8 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_init), (76 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_read_data), (10 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_register_callback), (12 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_reset_tx), (68 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_set_auto_rx_buffer), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_set_auto_tx_buffer), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_write_data), (14 bytes). + Removing norflash.o(.rev16_text), (4 bytes). + Removing norflash.o(.revsh_text), (4 bytes). + Removing norflash.o(i.norflash_best_cfg_init), (44 bytes). + Removing norflash.o(i.norflash_big_end_clear), (14 bytes). + Removing norflash.o(i.norflash_big_end_enable), (20 bytes). + Removing norflash.o(i.norflash_check_crc32), (14 bytes). + Removing norflash.o(i.norflash_check_id), (72 bytes). + Removing norflash.o(i.norflash_dma_callback), (24 bytes). + Removing norflash.o(i.norflash_dma_read), (156 bytes). + Removing norflash.o(i.norflash_dma_write), (252 bytes). + Removing norflash.o(i.norflash_dual_read), (60 bytes). + Removing norflash.o(i.norflash_dual_write), (112 bytes). + Removing norflash.o(i.norflash_en4b), (40 bytes). + Removing norflash.o(i.norflash_en_quad), (116 bytes). + Removing norflash.o(i.norflash_en_quad_check), (64 bytes). + Removing norflash.o(i.norflash_erase_block), (44 bytes). + Removing norflash.o(i.norflash_erase_chip), (28 bytes). + Removing norflash.o(i.norflash_erase_sector), (44 bytes). + Removing norflash.o(i.norflash_ex4b), (40 bytes). + Removing norflash.o(i.norflash_exit_quad), (76 bytes). + Removing norflash.o(i.norflash_get_dual_hstatus), (52 bytes). + Removing norflash.o(i.norflash_get_hstatus), (52 bytes). + Removing norflash.o(i.norflash_get_status), (52 bytes). + Removing norflash.o(i.norflash_init), (48 bytes). + Removing norflash.o(i.norflash_quad_read), (76 bytes). + Removing norflash.o(i.norflash_quad_write), (108 bytes). + Removing norflash.o(i.norflash_read), (28 bytes). + Removing norflash.o(i.norflash_read_config_reg), (36 bytes). + Removing norflash.o(i.norflash_read_id), (20 bytes). + Removing norflash.o(i.norflash_read_uid), (52 bytes). + Removing norflash.o(i.norflash_reset), (2 bytes). + Removing norflash.o(i.norflash_reset_crc32), (32 bytes). + Removing norflash.o(i.norflash_set_best_cfg), (50 bytes). + Removing norflash.o(i.norflash_set_best_read_cfg), (84 bytes). + Removing norflash.o(i.norflash_set_best_write_cfg), (84 bytes). + Removing norflash.o(i.norflash_switch_fls_spi), (112 bytes). + Removing norflash.o(i.norflash_write), (96 bytes). + Removing norflash.o(i.norflash_write_disable), (64 bytes). + Removing norflash.o(i.norflash_write_enable), (56 bytes). + Removing norflash.o(i.norflash_write_endian_scr), (132 bytes). + Removing norflash.o(.bss), (412 bytes). + Removing norflash.o(.bss), (32 bytes). + Removing norflash.o(.data), (2 bytes). + Removing drv_fls_dma.o(.rev16_text), (4 bytes). + Removing drv_fls_dma.o(.revsh_text), (4 bytes). + Removing drv_fls_dma.o(i.fls_abort_dma), (42 bytes). + Removing drv_fls_dma.o(i.fls_dma_disable), (10 bytes). + Removing drv_fls_dma.o(i.fls_dma_enable), (10 bytes). + Removing drv_fls_dma.o(i.fls_dma_read_prepare), (86 bytes). + Removing drv_fls_dma.o(i.fls_dma_write_prepare), (82 bytes). + Removing drv_fls_dma.o(i.fls_read_dmacallback), (32 bytes). + Removing drv_fls_dma.o(i.fls_transfer_create_handle_dma), (208 bytes). + Removing drv_fls_dma.o(i.fls_transfer_dma), (112 bytes). + Removing drv_fls_dma.o(i.fls_transfer_get_receive_count_dma), (44 bytes). + Removing drv_fls_dma.o(i.fls_write_dmacallback), (32 bytes). + Removing drv_fls_dma.o(.data), (8 bytes). + Removing drv_spi_slave.o(.rev16_text), (4 bytes). + Removing drv_spi_slave.o(.revsh_text), (4 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_deinit), (40 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_disable_int), (68 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_enable_int), (72 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_enable_rx_dma), (32 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_enable_tx_dma), (28 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_get_dma_address), (8 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_gpio_init), (24 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_read_data), (32 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_switch_sclk), (28 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_write_data), (44 bytes). + Removing drv_spi_slave.o(i.drv_spi_slave_init), (76 bytes). + Removing drv_uart.o(.rev16_text), (4 bytes). + Removing drv_uart.o(.revsh_text), (4 bytes). + Removing drv_uart.o(i.UART_AbortReceive), (30 bytes). + Removing drv_uart.o(i.UART_AbortSend), (30 bytes). + Removing drv_uart.o(i.UART_Deinit), (28 bytes). + Removing drv_uart.o(i.UART_Disable_IT), (68 bytes). + Removing drv_uart.o(i.UART_EnableDma), (32 bytes). + Removing drv_uart.o(i.UART_Enable_IT), (44 bytes). + Removing drv_uart.o(i.UART_GetDefaultConfig), (72 bytes). + Removing drv_uart.o(i.UART_GetFIFO_Ctrl), (20 bytes). + Removing drv_uart.o(i.UART_GetReceiveCount), (22 bytes). + Removing drv_uart.o(i.UART_GetReceiveStatus), (20 bytes). + Removing drv_uart.o(i.UART_GetRxRingBufferLength), (28 bytes). + Removing drv_uart.o(i.UART_GetSendCount), (22 bytes). + Removing drv_uart.o(i.UART_GetSendStatus), (20 bytes). + Removing drv_uart.o(i.UART_ReadBlocking), (32 bytes). + Removing drv_uart.o(i.UART_ReceiveNonBlocking), (50 bytes). + Removing drv_uart.o(i.UART_ResetTxFIFO), (36 bytes). + Removing drv_uart.o(i.UART_SendNonBlocking), (38 bytes). + Removing drv_uart.o(i.UART_TransferCreateHandle), (96 bytes). + Removing drv_uart.o(i.UART_TransferStartRingBuffer), (30 bytes). + Removing drv_uart.o(.constdata), (1 bytes). + Removing drv_uart_dma.o(.rev16_text), (4 bytes). + Removing drv_uart_dma.o(.revsh_text), (4 bytes). + Removing drv_uart_dma.o(i.UART_DMAInit), (76 bytes). + Removing drv_uart_dma.o(i.UART_TransferAbortReceiveDMA), (16 bytes). + Removing drv_uart_dma.o(i.UART_TransferAbortSendDMA), (16 bytes). + Removing drv_uart_dma.o(i.UART_TransferCreateHandleDMA), (176 bytes). + Removing drv_uart_dma.o(i.UART_TransferGetReceiveCountDMA), (44 bytes). + Removing drv_uart_dma.o(i.UART_TransferReceiveDMA), (68 bytes). + Removing drv_uart_dma.o(i.UART_TransferReceiveDMACallback), (34 bytes). + Removing drv_uart_dma.o(i.UART_TransferSendDMA), (68 bytes). + Removing drv_uart_dma.o(i.UART_TransferSendDMACallback), (34 bytes). + Removing drv_uart_dma.o(.data), (8 bytes). + Removing drv_wdg.o(.rev16_text), (4 bytes). + Removing drv_wdg.o(.revsh_text), (4 bytes). + Removing drv_wdg.o(i.drv_wdg_enable), (32 bytes). + Removing drv_wdg.o(i.drv_wdg_load_match), (12 bytes). + Removing drv_wdg.o(i.drv_wdg_register_callback), (12 bytes). + Removing drv_wdg.o(i.drv_wdg_sel_mode), (28 bytes). + Removing drv_wdg.o(i.drv_wdg_set_repeat), (12 bytes). + Removing dcs_packet_fifo.o(i.dcs_packet_get_fifo_size), (16 bytes). + Removing dflti.o(.text), (40 bytes). + +604 unused section(s) (total 26457 bytes) removed from the image. + +============================================================================== + +Image Symbol Table + + Local Symbols + + Symbol Name Value Ov Type Size Object(Section) + + ../clib/../cmprslib/zerorunl2.c 0x00000000 Number 0 __dczerorl2.o ABSOLUTE + ../clib/microlib/division.c 0x00000000 Number 0 idiv.o ABSOLUTE + ../clib/microlib/division.c 0x00000000 Number 0 uldiv.o ABSOLUTE + ../clib/microlib/division.c 0x00000000 Number 0 uidiv.o ABSOLUTE + ../clib/microlib/errno.c 0x00000000 Number 0 errno.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry5.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry9b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry7a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry10a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry2.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry7b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry9a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry8a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry8b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry10b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry11a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry11b.o ABSOLUTE + ../clib/microlib/longlong.c 0x00000000 Number 0 llshl.o ABSOLUTE + ../clib/microlib/longlong.c 0x00000000 Number 0 llushr.o ABSOLUTE + ../clib/microlib/longlong.c 0x00000000 Number 0 llsshr.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf1.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf7.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf8.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printfa.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf5.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf6.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf3.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf4.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf2.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printfb.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf0.o ABSOLUTE + ../clib/microlib/printf/stubs.s 0x00000000 Number 0 stubs.o ABSOLUTE + ../clib/microlib/stdio/streams.c 0x00000000 Number 0 stdout.o ABSOLUTE + ../clib/microlib/string/memcpy.c 0x00000000 Number 0 memcpya.o ABSOLUTE + ../clib/microlib/string/memcpy.c 0x00000000 Number 0 memcpyb.o ABSOLUTE + ../clib/microlib/string/memset.c 0x00000000 Number 0 memseta.o ABSOLUTE + ../clib/microlib/stubs.s 0x00000000 Number 0 iusefp.o ABSOLUTE + ../fplib/microlib/f2d.c 0x00000000 Number 0 f2d.o ABSOLUTE + ../fplib/microlib/fpadd.c 0x00000000 Number 0 dadd.o ABSOLUTE + ../fplib/microlib/fpadd.c 0x00000000 Number 0 fadd.o ABSOLUTE + ../fplib/microlib/fpdiv.c 0x00000000 Number 0 ddiv.o ABSOLUTE + ../fplib/microlib/fpdiv.c 0x00000000 Number 0 fdiv.o ABSOLUTE + ../fplib/microlib/fpepilogue.c 0x00000000 Number 0 depilogue.o ABSOLUTE + ../fplib/microlib/fpepilogue.c 0x00000000 Number 0 fepilogue.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 dfixul.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 ffixui.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 ffixi.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 dfixui.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 dfixi.o ABSOLUTE + ../fplib/microlib/fpflt.c 0x00000000 Number 0 dfltui.o ABSOLUTE + ../fplib/microlib/fpflt.c 0x00000000 Number 0 dflti.o ABSOLUTE + ../fplib/microlib/fpflt.c 0x00000000 Number 0 ffltui.o ABSOLUTE + ../fplib/microlib/fpflt.c 0x00000000 Number 0 fflti.o ABSOLUTE + ../fplib/microlib/fpmul.c 0x00000000 Number 0 dmul.o ABSOLUTE + ../fplib/microlib/fpmul.c 0x00000000 Number 0 fmul.o ABSOLUTE + ../fplib/microlib/fpscalb.c 0x00000000 Number 0 fscalb.o ABSOLUTE + ../fplib/microlib/fpsqrt.c 0x00000000 Number 0 dsqrt.o ABSOLUTE + ../mathlib/ceil.c 0x00000000 Number 0 ceil.o ABSOLUTE + ../mathlib/sqrt.c 0x00000000 Number 0 sqrt.o ABSOLUTE + ../mathlib/sqrt.c 0x00000000 Number 0 sqrt_x.o ABSOLUTE + ..\..\..\src\common\tau_delay.c 0x00000000 Number 0 tau_delay.o ABSOLUTE + ..\..\..\src\common\tau_log.c 0x00000000 Number 0 tau_log.o ABSOLUTE + ..\..\..\src\driver\robin\src\drv_chip_info.c 0x00000000 Number 0 drv_chip_info.o ABSOLUTE + ..\..\..\src\driver\robin\src\drv_dsc_dec.c 0x00000000 Number 0 drv_dsc_dec.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_dsi_rx.c 0x00000000 Number 0 drv_dsi_rx.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_dsi_tx.c 0x00000000 Number 0 drv_dsi_tx.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_efuse.c 0x00000000 Number 0 drv_efuse.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_lcdc.c 0x00000000 Number 0 drv_lcdc.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_memc.c 0x00000000 Number 0 drv_memc.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_phy_common.c 0x00000000 Number 0 drv_phy_common.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_rxbr.c 0x00000000 Number 0 drv_rxbr.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_vidc.c 0x00000000 Number 0 drv_vidc.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\irq_redirect .c 0x00000000 Number 0 irq_redirect .o ABSOLUTE + ..\..\..\src\driver\source\robin\hal\internal\dcs_packet_fifo.c 0x00000000 Number 0 dcs_packet_fifo.o ABSOLUTE + ..\..\..\src\driver\source\robin\hal\internal\hal_internal_soft_sync.c 0x00000000 Number 0 hal_internal_soft_sync.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_common.c 0x00000000 Number 0 drv_common.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_crgu.c 0x00000000 Number 0 drv_crgu.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_dma.c 0x00000000 Number 0 drv_dma.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_fls.c 0x00000000 Number 0 drv_fls.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_fls_dma.c 0x00000000 Number 0 drv_fls_dma.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_gpio.c 0x00000000 Number 0 drv_gpio.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_i2c_dma.c 0x00000000 Number 0 drv_i2c_dma.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_i2c_master.c 0x00000000 Number 0 drv_i2c_master.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_i2c_slave.c 0x00000000 Number 0 drv_i2c_slave.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_param_init.c 0x00000000 Number 0 drv_param_init.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_pwm.c 0x00000000 Number 0 drv_pwm.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_pwr.c 0x00000000 Number 0 drv_pwr.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_spi_dma.c 0x00000000 Number 0 drv_spi_dma.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_spi_master.c 0x00000000 Number 0 drv_spi_master.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_spi_slave.c 0x00000000 Number 0 drv_spi_slave.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_swire.c 0x00000000 Number 0 drv_swire.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_sys_cfg.c 0x00000000 Number 0 drv_sys_cfg.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_timer.c 0x00000000 Number 0 drv_timer.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_uart.c 0x00000000 Number 0 drv_uart.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_uart_dma.c 0x00000000 Number 0 drv_uart_dma.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_wdg.c 0x00000000 Number 0 drv_wdg.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_dsi_rx_ctrl.c 0x00000000 Number 0 hal_dsi_rx_ctrl.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_dsi_tx_ctrl.c 0x00000000 Number 0 hal_dsi_tx_ctrl.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_gpio.c 0x00000000 Number 0 hal_gpio.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_i2c_master.c 0x00000000 Number 0 hal_i2c_master.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_i2c_slave.c 0x00000000 Number 0 hal_i2c_slave.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_pwm.c 0x00000000 Number 0 hal_pwm.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_spi_master.c 0x00000000 Number 0 hal_spi_master.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_spi_slave.c 0x00000000 Number 0 hal_spi_slave.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_swire.c 0x00000000 Number 0 hal_swire.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_system.c 0x00000000 Number 0 hal_system.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_timer.c 0x00000000 Number 0 hal_timer.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_uart.c 0x00000000 Number 0 hal_uart.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\internal\hal_internal_vsync.c 0x00000000 Number 0 hal_internal_vsync.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\internal\norflash.c 0x00000000 Number 0 norflash.o ABSOLUTE + ..\..\src\app\demo\ap_demo.c 0x00000000 Number 0 ap_demo.o ABSOLUTE + ..\..\src\app\demo\app_tp_for_custom_s21u.c 0x00000000 Number 0 app_tp_for_custom_s21u.o ABSOLUTE + ..\..\src\app\demo\app_tp_st_touch.c 0x00000000 Number 0 app_tp_st_touch.o ABSOLUTE + ..\..\src\app\demo\app_tp_transfer.c 0x00000000 Number 0 app_tp_transfer.o ABSOLUTE + ..\..\src\app\main.c 0x00000000 Number 0 main.o ABSOLUTE + ..\..\src\board\board.c 0x00000000 Number 0 board.o ABSOLUTE + ..\..\src\board\startup\startup_ARMCM0.s 0x00000000 Number 0 startup_armcm0.o ABSOLUTE + ..\\..\\..\\src\\common\\tau_delay.c 0x00000000 Number 0 tau_delay.o ABSOLUTE + ..\\..\\..\\src\\common\\tau_log.c 0x00000000 Number 0 tau_log.o ABSOLUTE + ..\\..\\..\\src\\driver\\robin\\src\\drv_chip_info.c 0x00000000 Number 0 drv_chip_info.o ABSOLUTE + ..\\..\\..\\src\\driver\\robin\\src\\drv_dsc_dec.c 0x00000000 Number 0 drv_dsc_dec.o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\drv\\drv_dsi_rx.c 0x00000000 Number 0 drv_dsi_rx.o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\drv\\drv_dsi_tx.c 0x00000000 Number 0 drv_dsi_tx.o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\drv\\drv_efuse.c 0x00000000 Number 0 drv_efuse.o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\drv\\drv_lcdc.c 0x00000000 Number 0 drv_lcdc.o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\drv\\drv_memc.c 0x00000000 Number 0 drv_memc.o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\drv\\drv_phy_common.c 0x00000000 Number 0 drv_phy_common.o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\drv\\drv_rxbr.c 0x00000000 Number 0 drv_rxbr.o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\drv\\drv_vidc.c 0x00000000 Number 0 drv_vidc.o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\drv\\irq_redirect .c 0x00000000 Number 0 irq_redirect .o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\hal\\internal\\hal_internal_soft_sync.c 0x00000000 Number 0 hal_internal_soft_sync.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_common.c 0x00000000 Number 0 drv_common.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_crgu.c 0x00000000 Number 0 drv_crgu.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_dma.c 0x00000000 Number 0 drv_dma.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_fls.c 0x00000000 Number 0 drv_fls.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_fls_dma.c 0x00000000 Number 0 drv_fls_dma.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_gpio.c 0x00000000 Number 0 drv_gpio.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_i2c_dma.c 0x00000000 Number 0 drv_i2c_dma.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_i2c_master.c 0x00000000 Number 0 drv_i2c_master.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_i2c_slave.c 0x00000000 Number 0 drv_i2c_slave.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_param_init.c 0x00000000 Number 0 drv_param_init.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_pwm.c 0x00000000 Number 0 drv_pwm.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_pwr.c 0x00000000 Number 0 drv_pwr.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_spi_dma.c 0x00000000 Number 0 drv_spi_dma.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_spi_master.c 0x00000000 Number 0 drv_spi_master.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_spi_slave.c 0x00000000 Number 0 drv_spi_slave.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_swire.c 0x00000000 Number 0 drv_swire.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_sys_cfg.c 0x00000000 Number 0 drv_sys_cfg.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_timer.c 0x00000000 Number 0 drv_timer.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_uart.c 0x00000000 Number 0 drv_uart.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_uart_dma.c 0x00000000 Number 0 drv_uart_dma.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_wdg.c 0x00000000 Number 0 drv_wdg.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_dsi_rx_ctrl.c 0x00000000 Number 0 hal_dsi_rx_ctrl.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_dsi_tx_ctrl.c 0x00000000 Number 0 hal_dsi_tx_ctrl.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_gpio.c 0x00000000 Number 0 hal_gpio.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_i2c_master.c 0x00000000 Number 0 hal_i2c_master.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_i2c_slave.c 0x00000000 Number 0 hal_i2c_slave.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_pwm.c 0x00000000 Number 0 hal_pwm.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_spi_master.c 0x00000000 Number 0 hal_spi_master.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_spi_slave.c 0x00000000 Number 0 hal_spi_slave.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_swire.c 0x00000000 Number 0 hal_swire.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_system.c 0x00000000 Number 0 hal_system.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_timer.c 0x00000000 Number 0 hal_timer.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_uart.c 0x00000000 Number 0 hal_uart.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\internal\\hal_internal_vsync.c 0x00000000 Number 0 hal_internal_vsync.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\internal\\norflash.c 0x00000000 Number 0 norflash.o ABSOLUTE + ..\\..\\src\\app\\demo\\ap_demo.c 0x00000000 Number 0 ap_demo.o ABSOLUTE + ..\\..\\src\\app\\demo\\app_tp_for_custom_s21u.c 0x00000000 Number 0 app_tp_for_custom_s21u.o ABSOLUTE + ..\\..\\src\\app\\demo\\app_tp_st_touch.c 0x00000000 Number 0 app_tp_st_touch.o ABSOLUTE + ..\\..\\src\\app\\demo\\app_tp_transfer.c 0x00000000 Number 0 app_tp_transfer.o ABSOLUTE + ..\\..\\src\\app\\main.c 0x00000000 Number 0 main.o ABSOLUTE + ..\\..\\src\\board\\board.c 0x00000000 Number 0 board.o ABSOLUTE + cdcmple.s 0x00000000 Number 0 cdcmple.o ABSOLUTE + cdrcmple.s 0x00000000 Number 0 cdrcmple.o ABSOLUTE + cfcmple.s 0x00000000 Number 0 cfcmple.o ABSOLUTE + cfrcmple.s 0x00000000 Number 0 cfrcmple.o ABSOLUTE + dc.s 0x00000000 Number 0 dc.o ABSOLUTE + handlers.s 0x00000000 Number 0 handlers.o ABSOLUTE + init.s 0x00000000 Number 0 init.o ABSOLUTE + RESET 0x00010000 Section 192 startup_armcm0.o(RESET) + .ARM.Collect$$$$00000000 0x000100c0 Section 0 entry.o(.ARM.Collect$$$$00000000) + .ARM.Collect$$$$00000001 0x000100c0 Section 4 entry2.o(.ARM.Collect$$$$00000001) + .ARM.Collect$$$$00000004 0x000100c4 Section 4 entry5.o(.ARM.Collect$$$$00000004) + .ARM.Collect$$$$00000008 0x000100c8 Section 0 entry7b.o(.ARM.Collect$$$$00000008) + .ARM.Collect$$$$0000000A 0x000100c8 Section 0 entry8b.o(.ARM.Collect$$$$0000000A) + .ARM.Collect$$$$0000000B 0x000100c8 Section 8 entry9a.o(.ARM.Collect$$$$0000000B) + .ARM.Collect$$$$0000000D 0x000100d0 Section 0 entry10a.o(.ARM.Collect$$$$0000000D) + .ARM.Collect$$$$0000000F 0x000100d0 Section 0 entry11a.o(.ARM.Collect$$$$0000000F) + .ARM.Collect$$$$00002712 0x000100d0 Section 4 entry2.o(.ARM.Collect$$$$00002712) + __lit__00000000 0x000100d0 Data 4 entry2.o(.ARM.Collect$$$$00002712) + .text 0x000100d4 Section 120 startup_armcm0.o(.text) + .text 0x0001014c Section 0 uidiv.o(.text) + .text 0x00010178 Section 0 idiv.o(.text) + .text 0x000101a0 Section 0 memcpya.o(.text) + .text 0x000101c4 Section 0 memseta.o(.text) + .text 0x000101e8 Section 0 fadd.o(.text) + .text 0x0001029a Section 0 fmul.o(.text) + .text 0x00010314 Section 0 fdiv.o(.text) + .text 0x00010390 Section 0 fscalb.o(.text) + .text 0x000103a8 Section 0 dadd.o(.text) + .text 0x0001050c Section 0 dmul.o(.text) + .text 0x000105dc Section 0 ddiv.o(.text) + .text 0x000106cc Section 0 fflti.o(.text) + .text 0x000106e2 Section 0 ffltui.o(.text) + .text 0x000106f0 Section 0 dfltui.o(.text) + .text 0x0001070c Section 0 ffixi.o(.text) + .text 0x0001073e Section 0 ffixui.o(.text) + .text 0x00010768 Section 0 dfixi.o(.text) + .text 0x000107b0 Section 0 dfixui.o(.text) + .text 0x000107ec Section 0 f2d.o(.text) + .text 0x00010814 Section 40 cdcmple.o(.text) + .text 0x0001083c Section 20 cfcmple.o(.text) + .text 0x00010850 Section 20 cfrcmple.o(.text) + .text 0x00010864 Section 0 uldiv.o(.text) + .text 0x000108c4 Section 0 llshl.o(.text) + .text 0x000108e4 Section 0 llushr.o(.text) + .text 0x00010906 Section 0 llsshr.o(.text) + .text 0x0001092c Section 0 fepilogue.o(.text) + .text 0x0001092c Section 0 iusefp.o(.text) + .text 0x000109ae Section 0 depilogue.o(.text) + .text 0x00010a6c Section 0 dsqrt.o(.text) + .text 0x00010b10 Section 0 dfixul.o(.text) + .text 0x00010b50 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0x00010d20 Section 0 irq_redirect .o(i.EXTI_INT6_IRQn_Handler) + i.EXTI_INT7_IRQn_Handler 0x00010d3c Section 0 irq_redirect .o(i.EXTI_INT7_IRQn_Handler) + i.FLSCTRL_IRQn_Handler 0x00010d58 Section 0 irq_redirect .o(i.FLSCTRL_IRQn_Handler) + i.Gpio_swire_output 0x00010d6c Section 0 ap_demo.o(i.Gpio_swire_output) + i.HardFault_Handler 0x00010dbc Section 0 irq_redirect .o(i.HardFault_Handler) + i.I2C0_IRQn_Handler 0x00010dd0 Section 0 irq_redirect .o(i.I2C0_IRQn_Handler) + i.I2C1_IRQn_Handler 0x00010de8 Section 0 irq_redirect .o(i.I2C1_IRQn_Handler) + i.LCDC_IRQn_Handler 0x00010e00 Section 0 irq_redirect .o(i.LCDC_IRQn_Handler) + i.LOG_printf 0x00010e18 Section 0 tau_log.o(i.LOG_printf) + i.MEMC_IRQn_Handler 0x00010e40 Section 0 irq_redirect .o(i.MEMC_IRQn_Handler) + i.MIPI_RX_IRQn_Handler 0x00010e58 Section 0 irq_redirect .o(i.MIPI_RX_IRQn_Handler) + i.MIPI_TX_IRQn_Handler 0x00010e70 Section 0 irq_redirect .o(i.MIPI_TX_IRQn_Handler) + i.PWMDET_IRQn_Handler 0x00010e88 Section 0 irq_redirect .o(i.PWMDET_IRQn_Handler) + i.SPIM_IRQn_Handler 0x00010ea4 Section 0 irq_redirect .o(i.SPIM_IRQn_Handler) + i.SPIS_IRQn_Handler 0x00010ec0 Section 0 irq_redirect .o(i.SPIS_IRQn_Handler) + i.SWIRE_IRQn_Handler 0x00010edc Section 0 irq_redirect .o(i.SWIRE_IRQn_Handler) + i.SysTick_Handler 0x00010ef8 Section 0 irq_redirect .o(i.SysTick_Handler) + i.TIMER0_IRQn_Handler 0x00010f10 Section 0 irq_redirect .o(i.TIMER0_IRQn_Handler) + i.TIMER1_IRQn_Handler 0x00010f28 Section 0 irq_redirect .o(i.TIMER1_IRQn_Handler) + i.TIMER2_IRQn_Handler 0x00010f40 Section 0 irq_redirect .o(i.TIMER2_IRQn_Handler) + i.TIMER3_IRQn_Handler 0x00010f58 Section 0 irq_redirect .o(i.TIMER3_IRQn_Handler) + i.UART0_IRQ_Handle 0x00010f70 Section 0 drv_uart.o(i.UART0_IRQ_Handle) + i.UART_DisableDma 0x00010f8c Section 0 drv_uart.o(i.UART_DisableDma) + i.UART_GetInstance 0x00010f8e Section 0 drv_uart.o(i.UART_GetInstance) + i.UART_IRQn_Handler 0x00010f94 Section 0 irq_redirect .o(i.UART_IRQn_Handler) + i.UART_ResetRxFIFO 0x00010fac Section 0 drv_uart.o(i.UART_ResetRxFIFO) + i.UART_SwitchSCLK 0x00010fd0 Section 0 drv_uart.o(i.UART_SwitchSCLK) + i.__scatterload_copy 0x00010fea Section 14 handlers.o(i.__scatterload_copy) + i.__scatterload_null 0x00010ff8 Section 2 handlers.o(i.__scatterload_null) + i.app_tp_screen_analysis_const 0x00010ffa Section 0 app_tp_for_custom_s21u.o(i.app_tp_screen_analysis_const) + .ARM.__at_0x11000 0x00011000 Section 20 drv_common.o(.ARM.__at_0x11000) + i.drv_dsi_rx_set_inten 0x00011014 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_inten) + .ARM.__at_0x11018 0x00011018 Section 4 drv_common.o(.ARM.__at_0x11018) + i.UART_SetBaudRate 0x0001101c Section 0 drv_uart.o(i.UART_SetBaudRate) + i.UART_TransferHandleIRQ 0x00011064 Section 0 drv_uart.o(i.UART_TransferHandleIRQ) + i.UART_WriteBlocking 0x00011198 Section 0 drv_uart.o(i.UART_WriteBlocking) + i.UART_init 0x000111b4 Section 0 drv_uart.o(i.UART_init) + i.VIDC_IRQn_Handler 0x00011270 Section 0 irq_redirect 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0x00011394 Section 0 drv_rxbr.o(i.__NVIC_EnableIRQ) + __NVIC_EnableIRQ 0x00011395 Thumb Code 18 drv_rxbr.o(i.__NVIC_EnableIRQ) + i.__NVIC_SetPriority 0x000113ac Section 0 hal_spi_slave.o(i.__NVIC_SetPriority) + __NVIC_SetPriority 0x000113ad Thumb Code 60 hal_spi_slave.o(i.__NVIC_SetPriority) + i.__scatterload_zeroinit 0x000113f0 Section 14 handlers.o(i.__scatterload_zeroinit) + i.__set_errno 0x00011400 Section 0 errno.o(i.__set_errno) + i._fp_digits 0x0001140c Section 0 printfa.o(i._fp_digits) + _fp_digits 0x0001140d Thumb Code 344 printfa.o(i._fp_digits) + i._printf_core 0x00011580 Section 0 printfa.o(i._printf_core) + _printf_core 0x00011581 Thumb Code 1754 printfa.o(i._printf_core) + i._printf_post_padding 0x00011c6c Section 0 printfa.o(i._printf_post_padding) + _printf_post_padding 0x00011c6d Thumb Code 32 printfa.o(i._printf_post_padding) + i._printf_pre_padding 0x00011c8c Section 0 printfa.o(i._printf_pre_padding) + _printf_pre_padding 0x00011c8d Thumb Code 44 printfa.o(i._printf_pre_padding) + i._sputc 0x00011cb8 Section 0 printfa.o(i._sputc) + _sputc 0x00011cb9 Thumb Code 10 printfa.o(i._sputc) + i.ap_dcs_read 0x00011cc4 Section 0 ap_demo.o(i.ap_dcs_read) + ap_dcs_read 0x00011cc5 Thumb Code 3224 ap_demo.o(i.ap_dcs_read) + i.ap_demo 0x00012960 Section 0 ap_demo.o(i.ap_demo) + i.ap_get_reg_df 0x00012b3c Section 0 ap_demo.o(i.ap_get_reg_df) + ap_get_reg_df 0x00012b3d Thumb Code 134 ap_demo.o(i.ap_get_reg_df) + i.ap_get_tp_calibration_status_01 0x00012bc8 Section 0 app_tp_st_touch.o(i.ap_get_tp_calibration_status_01) + i.ap_reset_cb 0x00012be8 Section 0 ap_demo.o(i.ap_reset_cb) + ap_reset_cb 0x00012be9 Thumb Code 48 ap_demo.o(i.ap_reset_cb) + i.ap_set_backlight_51 0x00012c48 Section 0 ap_demo.o(i.ap_set_backlight_51) + ap_set_backlight_51 0x00012c49 Thumb Code 68 ap_demo.o(i.ap_set_backlight_51) + i.ap_set_display_off 0x00012c90 Section 0 ap_demo.o(i.ap_set_display_off) + ap_set_display_off 0x00012c91 Thumb Code 28 ap_demo.o(i.ap_set_display_off) + i.ap_set_display_on 0x00012cd4 Section 0 ap_demo.o(i.ap_set_display_on) + ap_set_display_on 0x00012cd5 Thumb Code 16 ap_demo.o(i.ap_set_display_on) + i.ap_set_enter_sleep_mode 0x00012d08 Section 0 ap_demo.o(i.ap_set_enter_sleep_mode) + ap_set_enter_sleep_mode 0x00012d09 Thumb Code 72 ap_demo.o(i.ap_set_enter_sleep_mode) + i.ap_set_exit_sleep_mode 0x00012d84 Section 0 ap_demo.o(i.ap_set_exit_sleep_mode) + ap_set_exit_sleep_mode 0x00012d85 Thumb Code 20 ap_demo.o(i.ap_set_exit_sleep_mode) + i.ap_set_hbm_53 0x00012dc8 Section 0 ap_demo.o(i.ap_set_hbm_53) + ap_set_hbm_53 0x00012dc9 Thumb Code 22 ap_demo.o(i.ap_set_hbm_53) + i.ap_set_tp_calibration_04 0x00012de4 Section 0 app_tp_st_touch.o(i.ap_set_tp_calibration_04) + i.ap_tp_st_touch_calibration 0x00012e7c Section 0 app_tp_st_touch.o(i.ap_tp_st_touch_calibration) + i.ap_tp_st_touch_get_calibration_success_mark 0x00012f2c Section 0 app_tp_st_touch.o(i.ap_tp_st_touch_get_calibration_success_mark) + i.ap_tp_st_touch_hardware_reset 0x00012fd4 Section 0 app_tp_st_touch.o(i.ap_tp_st_touch_hardware_reset) + i.ap_tp_st_touch_scan_point_init 0x00013098 Section 0 app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_init) + i.ap_tp_st_touch_scan_point_record_event_exec 0x000130b4 Section 0 app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_record_event_exec) + i.ap_tp_st_touch_simulate_finger_release_event 0x00013104 Section 0 app_tp_st_touch.o(i.ap_tp_st_touch_simulate_finger_release_event) + i.ap_update_frame_rate 0x00013138 Section 0 ap_demo.o(i.ap_update_frame_rate) + ap_update_frame_rate 0x00013139 Thumb Code 38 ap_demo.o(i.ap_update_frame_rate) + i.app_ADC_IRQn_Handler 0x00013164 Section 0 drv_rxbr.o(i.app_ADC_IRQn_Handler) + i.app_AP_NRESET_IRQn_Handler 0x00013180 Section 0 drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) + i.app_EXTI_INT0_IRQn_Handler 0x000131a4 Section 0 drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) + i.app_EXTI_INT1_IRQn_Handler 0x000131c0 Section 0 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app_tp_transfer.o(i.app_tp_transfer_screen_const) + app_tp_transfer_screen_const 0x00014499 Thumb Code 130 app_tp_transfer.o(i.app_tp_transfer_screen_const) + i.app_tp_transfer_screen_int 0x00014554 Section 0 app_tp_transfer.o(i.app_tp_transfer_screen_int) + i.app_tp_transfer_screen_restart 0x000145e0 Section 0 app_tp_transfer.o(i.app_tp_transfer_screen_restart) + i.app_tp_transfer_screen_start 0x00014614 Section 0 app_tp_transfer.o(i.app_tp_transfer_screen_start) + i.app_tp_transfer_screen_start_init 0x0001461c Section 0 app_tp_transfer.o(i.app_tp_transfer_screen_start_init) + i.board_Init 0x00014630 Section 0 board.o(i.board_Init) + i.calc_framebuffer_setting 0x00014654 Section 0 hal_internal_vsync.o(i.calc_framebuffer_setting) + i.ceil 0x00014be0 Section 0 ceil.o(i.ceil) + i.check_mipi_rx_tx_video_info 0x00014ca8 Section 0 hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) + check_mipi_rx_tx_video_info 0x00014ca9 Thumb Code 44 hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) + i.check_pkt_buf_rev 0x00014cd4 Section 0 hal_internal_vsync.o(i.check_pkt_buf_rev) + check_pkt_buf_rev 0x00014cd5 Thumb Code 74 hal_internal_vsync.o(i.check_pkt_buf_rev) + i.dcs_packet_fifo_alloc 0x00014d58 Section 0 dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) + i.dcs_packet_fifo_init 0x00014db0 Section 0 dcs_packet_fifo.o(i.dcs_packet_fifo_init) + i.dcs_packet_free_fifo_header 0x00014dc8 Section 0 dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) + i.dcs_packet_get_fifo_header 0x00014e0c Section 0 dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) + i.dcs_sw_filter 0x00014e30 Section 0 hal_internal_vsync.o(i.dcs_sw_filter) + dcs_sw_filter 0x00014e31 Thumb Code 36 hal_internal_vsync.o(i.dcs_sw_filter) + i.delayMs 0x00014e5c Section 0 tau_delay.o(i.delayMs) + i.delayUs 0x00014e74 Section 0 tau_delay.o(i.delayUs) + i.drv_ap_rst_trig_edge_detect 0x00014e98 Section 0 drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) + i.drv_chip_info_get_info 0x00014ed0 Section 0 drv_chip_info.o(i.drv_chip_info_get_info) + i.drv_chip_info_init 0x00014edc Section 0 drv_chip_info.o(i.drv_chip_info_init) + i.drv_chip_rx_info_check 0x00014f1c Section 0 drv_chip_info.o(i.drv_chip_rx_info_check) + i.drv_chip_rx_init_done 0x00014fcc Section 0 drv_chip_info.o(i.drv_chip_rx_init_done) + i.drv_common_enable_systick 0x00014fe0 Section 0 drv_common.o(i.drv_common_enable_systick) + i.drv_common_get_tick 0x00015038 Section 0 drv_common.o(i.drv_common_get_tick) + i.drv_common_system_init 0x00015044 Section 0 drv_common.o(i.drv_common_system_init) + i.drv_crgu_config_reset_modules 0x0001504c Section 0 drv_crgu.o(i.drv_crgu_config_reset_modules) + i.drv_crgu_set_ahb_pre_div 0x0001505c Section 0 drv_crgu.o(i.drv_crgu_set_ahb_pre_div) + i.drv_crgu_set_ahb_src 0x00015070 Section 0 drv_crgu.o(i.drv_crgu_set_ahb_src) + i.drv_crgu_set_clock 0x00015084 Section 0 drv_crgu.o(i.drv_crgu_set_clock) + i.drv_crgu_set_dpi_mux_src 0x000150a4 Section 0 drv_crgu.o(i.drv_crgu_set_dpi_mux_src) + i.drv_crgu_set_dpi_pre_div 0x000150b8 Section 0 drv_crgu.o(i.drv_crgu_set_dpi_pre_div) + i.drv_crgu_set_dpi_pre_src 0x000150d0 Section 0 drv_crgu.o(i.drv_crgu_set_dpi_pre_src) + i.drv_crgu_set_dsc_core_div 0x000150e4 Section 0 drv_crgu.o(i.drv_crgu_set_dsc_core_div) + i.drv_crgu_set_dsco_src 0x000150f8 Section 0 drv_crgu.o(i.drv_crgu_set_dsco_src) + i.drv_crgu_set_dsco_src_div 0x0001510c Section 0 drv_crgu.o(i.drv_crgu_set_dsco_src_div) + i.drv_crgu_set_fb_div 0x00015120 Section 0 drv_crgu.o(i.drv_crgu_set_fb_div) + i.drv_crgu_set_fb_src 0x00015134 Section 0 drv_crgu.o(i.drv_crgu_set_fb_src) + i.drv_crgu_set_lcdc_div 0x00015148 Section 0 drv_crgu.o(i.drv_crgu_set_lcdc_div) + i.drv_crgu_set_lcdc_src 0x0001515c Section 0 drv_crgu.o(i.drv_crgu_set_lcdc_src) + i.drv_crgu_set_mipi_cfg_src 0x00015170 Section 0 drv_crgu.o(i.drv_crgu_set_mipi_cfg_src) + i.drv_crgu_set_mipi_ref_src 0x00015184 Section 0 drv_crgu.o(i.drv_crgu_set_mipi_ref_src) + i.drv_crgu_set_reset 0x0001519c Section 0 drv_crgu.o(i.drv_crgu_set_reset) + i.drv_crgu_set_rxbr_div 0x000151b4 Section 0 drv_crgu.o(i.drv_crgu_set_rxbr_div) + i.drv_crgu_set_rxbr_src 0x000151c8 Section 0 drv_crgu.o(i.drv_crgu_set_rxbr_src) + i.drv_crgu_set_swire_div 0x000151dc Section 0 drv_crgu.o(i.drv_crgu_set_swire_div) + i.drv_crgu_set_vidc_src 0x000151f0 Section 0 drv_crgu.o(i.drv_crgu_set_vidc_src) + i.drv_dma_clear_flag 0x00015204 Section 0 drv_dma.o(i.drv_dma_clear_flag) + i.drv_dma_create_handle 0x0001521c Section 0 drv_dma.o(i.drv_dma_create_handle) + i.drv_dma_disenable_channel 0x00015238 Section 0 drv_dma.o(i.drv_dma_disenable_channel) + i.drv_dma_enable_channel 0x00015248 Section 0 drv_dma.o(i.drv_dma_enable_channel) + i.drv_dma_enable_channel_interrupts 0x00015258 Section 0 drv_dma.o(i.drv_dma_enable_channel_interrupts) + i.drv_dma_get_channel_flag 0x0001527c Section 0 drv_dma.o(i.drv_dma_get_channel_flag) + i.drv_dma_irq_handler 0x00015288 Section 0 drv_dma.o(i.drv_dma_irq_handler) + i.drv_dma_prepar_transfer 0x00015318 Section 0 drv_dma.o(i.drv_dma_prepar_transfer) + i.drv_dma_set_burst 0x0001532a Section 0 drv_dma.o(i.drv_dma_set_burst) + i.drv_dma_set_callback 0x00015344 Section 0 drv_dma.o(i.drv_dma_set_callback) + i.drv_dma_set_transfer 0x0001534c Section 0 drv_dma.o(i.drv_dma_set_transfer) + i.drv_dsc_dec_convert_pps_rc_parameter 0x00015390 Section 0 drv_dsc_dec.o(i.drv_dsc_dec_convert_pps_rc_parameter) + i.drv_dsc_dec_disable 0x000153c6 Section 0 drv_dsc_dec.o(i.drv_dsc_dec_disable) + i.drv_dsc_dec_enable 0x000153d4 Section 0 drv_dsc_dec.o(i.drv_dsc_dec_enable) + i.drv_dsc_dec_get_nslc 0x00015448 Section 0 drv_dsc_dec.o(i.drv_dsc_dec_get_nslc) + i.drv_dsc_dec_set_u8_pps 0x00015452 Section 0 drv_dsc_dec.o(i.drv_dsc_dec_set_u8_pps) + i.drv_dsi_rx_calc_ipi_tx_delay 0x0001547c Section 0 drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) + i.drv_dsi_rx_enable_irq 0x00015580 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) + i.drv_dsi_rx_get_bta_status 0x000155c0 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_bta_status) + i.drv_dsi_rx_get_color_bpp 0x000155d0 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) + drv_dsi_rx_get_color_bpp 0x000155d1 Thumb Code 62 drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) + i.drv_dsi_rx_get_color_pcc 0x00015620 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_color_pcc) + drv_dsi_rx_get_color_pcc 0x00015621 Thumb Code 24 drv_dsi_rx.o(i.drv_dsi_rx_get_color_pcc) + i.drv_dsi_rx_get_compression_en 0x0001563c Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) + i.drv_dsi_rx_get_max_ret_size 0x00015644 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_max_ret_size) + i.drv_dsi_rx_power_up 0x0001564a Section 0 drv_dsi_rx.o(i.drv_dsi_rx_power_up) + i.drv_dsi_rx_set_ctrl_cfg 0x00015658 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_ctrl_cfg) + i.drv_dsi_rx_set_ddi_cfg 0x00015678 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) + i.drv_dsi_rx_set_ipi_cfg 0x00015688 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_cfg) + i.drv_dsi_rx_set_lane_swap 0x00015698 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_lane_swap) + i.drv_dsi_rx_set_resp_cnt 0x000156de Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_resp_cnt) + i.drv_dsi_rx_set_up_phy 0x00015704 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) + i.drv_dsi_rx_shut_down 0x00015808 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_shut_down) + i.drv_dsi_tx_command_header 0x00015816 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_command_header) + i.drv_dsi_tx_command_mode_cfg 0x0001582a Section 0 drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) + i.drv_dsi_tx_command_put_payload 0x00015896 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) + i.drv_dsi_tx_config_eotp 0x0001589a Section 0 drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) + i.drv_dsi_tx_config_int 0x000158b2 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_config_int) + i.drv_dsi_tx_dpi_lpcmd_time 0x000158ba Section 0 drv_dsi_tx.o(i.drv_dsi_tx_dpi_lpcmd_time) + i.drv_dsi_tx_dpi_mode 0x000158c2 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_dpi_mode) + i.drv_dsi_tx_dpi_polarity 0x000158cc Section 0 drv_dsi_tx.o(i.drv_dsi_tx_dpi_polarity) + i.drv_dsi_tx_edpi_cmd_size 0x000158f0 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_edpi_cmd_size) + i.drv_dsi_tx_get_cmd_status 0x000158f4 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) + i.drv_dsi_tx_mode 0x000158f8 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_mode) + i.drv_dsi_tx_phy_clock_lane_auto_lp 0x000158fc Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_auto_lp) + i.drv_dsi_tx_phy_clock_lane_req_hs 0x00015914 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) + i.drv_dsi_tx_phy_lane_mode 0x0001592e Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_lane_mode) + i.drv_dsi_tx_phy_status_ready 0x0001593a Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ready) + i.drv_dsi_tx_phy_status_stopstate 0x0001599e Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) + i.drv_dsi_tx_phy_test_setup 0x000159dc Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) + i.drv_dsi_tx_phy_time_cfg 0x00015b10 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_time_cfg) + i.drv_dsi_tx_powerup 0x00015b2e Section 0 drv_dsi_tx.o(i.drv_dsi_tx_powerup) + i.drv_dsi_tx_response_mode 0x00015b36 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_response_mode) + i.drv_dsi_tx_set_bta_ack 0x00015b52 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_bta_ack) + i.drv_dsi_tx_set_esc_div 0x00015b6a Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) + i.drv_dsi_tx_set_int 0x00015b78 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_int) + i.drv_dsi_tx_set_time_out_div 0x00015bb8 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_time_out_div) + i.drv_dsi_tx_set_video_chunk 0x00015bc8 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_video_chunk) + i.drv_dsi_tx_set_video_timing 0x00015bd0 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_video_timing) + i.drv_dsi_tx_shutdown 0x00015bf2 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_shutdown) + i.drv_dsi_tx_timeout_cfg 0x00015bfa Section 0 drv_dsi_tx.o(i.drv_dsi_tx_timeout_cfg) + i.drv_dsi_tx_video_mode_cfg 0x00015c20 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_cfg) + i.drv_dsi_tx_video_mode_disable_hact_cmd 0x00015cca Section 0 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_disable_hact_cmd) + i.drv_dsi_tx_video_mode_set_lp_cmd 0x00015ce0 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_set_lp_cmd) + i.drv_efuse_enter_inactive 0x00015cf8 Section 0 drv_efuse.o(i.drv_efuse_enter_inactive) + i.drv_efuse_int_enable 0x00015d26 Section 0 drv_efuse.o(i.drv_efuse_int_enable) + i.drv_efuse_read 0x00015d32 Section 0 drv_efuse.o(i.drv_efuse_read) + i.drv_efuse_read_req 0x00015d64 Section 0 drv_efuse.o(i.drv_efuse_read_req) + i.drv_gpio_get_input_data 0x00015d7c Section 0 drv_gpio.o(i.drv_gpio_get_input_data) + i.drv_gpio_register_ap_reset_callback 0x00015d94 Section 0 drv_gpio.o(i.drv_gpio_register_ap_reset_callback) + i.drv_gpio_register_callback 0x00015da0 Section 0 drv_gpio.o(i.drv_gpio_register_callback) + i.drv_gpio_set_int 0x00015db4 Section 0 drv_gpio.o(i.drv_gpio_set_int) + i.drv_gpio_set_ioe 0x00015e04 Section 0 drv_gpio.o(i.drv_gpio_set_ioe) + i.drv_gpio_set_mode0 0x00015e24 Section 0 drv_gpio.o(i.drv_gpio_set_mode0) + i.drv_gpio_set_mode1 0x00015e34 Section 0 drv_gpio.o(i.drv_gpio_set_mode1) + i.drv_gpio_set_mode2 0x00015e44 Section 0 drv_gpio.o(i.drv_gpio_set_mode2) + i.drv_gpio_set_mode3 0x00015e54 Section 0 drv_gpio.o(i.drv_gpio_set_mode3) + i.drv_gpio_set_output_data 0x00015e64 Section 0 hal_gpio.o(i.drv_gpio_set_output_data) + drv_gpio_set_output_data 0x00015e65 Thumb Code 26 hal_gpio.o(i.drv_gpio_set_output_data) + i.drv_gpio_set_pull_state 0x00015e84 Section 0 drv_gpio.o(i.drv_gpio_set_pull_state) + i.drv_i2c0_set_callback 0x00015fb4 Section 0 drv_i2c_slave.o(i.drv_i2c0_set_callback) + i.drv_i2c1_set_callback 0x00015fc0 Section 0 drv_i2c_master.o(i.drv_i2c1_set_callback) + i.drv_i2c_dma_callback 0x00015fcc Section 0 drv_i2c_dma.o(i.drv_i2c_dma_callback) + drv_i2c_dma_callback 0x00015fcd Thumb Code 40 drv_i2c_dma.o(i.drv_i2c_dma_callback) + i.drv_i2c_dma_init 0x00016000 Section 0 drv_i2c_dma.o(i.drv_i2c_dma_init) + i.drv_i2c_enable_rx_dma 0x000160ac Section 0 drv_i2c_dma.o(i.drv_i2c_enable_rx_dma) + i.drv_i2c_enable_tx_dma 0x000160c6 Section 0 drv_i2c_dma.o(i.drv_i2c_enable_tx_dma) + i.drv_i2c_m_clear_it_pending_bit 0x000160e0 Section 0 drv_i2c_master.o(i.drv_i2c_m_clear_it_pending_bit) + i.drv_i2c_m_enable 0x00016140 Section 0 drv_i2c_master.o(i.drv_i2c_m_enable) + i.drv_i2c_m_enable_intr 0x00016150 Section 0 drv_i2c_master.o(i.drv_i2c_m_enable_intr) + i.drv_i2c_master_init 0x00016188 Section 0 drv_i2c_master.o(i.drv_i2c_master_init) + i.drv_i2c_master_read_dma 0x00016214 Section 0 drv_i2c_dma.o(i.drv_i2c_master_read_dma) + i.drv_i2c_master_write_dma 0x00016270 Section 0 drv_i2c_dma.o(i.drv_i2c_master_write_dma) + i.drv_i2c_master_write_read_cmd 0x000162ac Section 0 drv_i2c_dma.o(i.drv_i2c_master_write_read_cmd) + drv_i2c_master_write_read_cmd 0x000162ad Thumb Code 62 drv_i2c_dma.o(i.drv_i2c_master_write_read_cmd) + i.drv_i2c_s_clear_it_pending_bit 0x000162ea Section 0 drv_i2c_slave.o(i.drv_i2c_s_clear_it_pending_bit) + i.drv_i2c_s_config_intr 0x0001632c Section 0 drv_i2c_slave.o(i.drv_i2c_s_config_intr) + i.drv_i2c_s_enable 0x00016330 Section 0 drv_i2c_slave.o(i.drv_i2c_s_enable) + i.drv_i2c_s_get_fifo_status 0x00016338 Section 0 drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) + i.drv_i2c_s_set_intr 0x0001634c Section 0 drv_i2c_slave.o(i.drv_i2c_s_set_intr) + i.drv_i2c_s_write_data 0x0001639c Section 0 drv_i2c_slave.o(i.drv_i2c_s_write_data) + i.drv_i2c_set_dma_irq_callback 0x000163b8 Section 0 drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) + i.drv_i2c_slave_init 0x00016410 Section 0 drv_i2c_slave.o(i.drv_i2c_slave_init) + i.drv_i2c_slave_write_dma 0x00016444 Section 0 drv_i2c_dma.o(i.drv_i2c_slave_write_dma) + i.drv_lcdc_config_bypass 0x0001645c Section 0 drv_lcdc.o(i.drv_lcdc_config_bypass) + i.drv_lcdc_config_ccm 0x00016474 Section 0 drv_lcdc.o(i.drv_lcdc_config_ccm) + i.drv_lcdc_config_disp_mode 0x000164a4 Section 0 drv_lcdc.o(i.drv_lcdc_config_disp_mode) + i.drv_lcdc_config_dpi_polarity 0x000164ba Section 0 drv_lcdc.o(i.drv_lcdc_config_dpi_polarity) + i.drv_lcdc_config_dpi_timing 0x000164de Section 0 drv_lcdc.o(i.drv_lcdc_config_dpi_timing) + i.drv_lcdc_config_edpi_mode 0x00016504 Section 0 drv_lcdc.o(i.drv_lcdc_config_edpi_mode) + i.drv_lcdc_config_endianness 0x0001651a Section 0 drv_lcdc.o(i.drv_lcdc_config_endianness) + i.drv_lcdc_config_input_size 0x00016530 Section 0 drv_lcdc.o(i.drv_lcdc_config_input_size) + i.drv_lcdc_config_int 0x0001653c Section 0 drv_lcdc.o(i.drv_lcdc_config_int) + i.drv_lcdc_config_int_single 0x0001655a Section 0 drv_lcdc.o(i.drv_lcdc_config_int_single) + i.drv_lcdc_config_overwrite 0x0001657c Section 0 drv_lcdc.o(i.drv_lcdc_config_overwrite) + i.drv_lcdc_config_overwrite_rgb 0x0001659e Section 0 drv_lcdc.o(i.drv_lcdc_config_overwrite_rgb) + i.drv_lcdc_config_partial_display_area 0x000165aa Section 0 drv_lcdc.o(i.drv_lcdc_config_partial_display_area) + i.drv_lcdc_config_partial_display_enable 0x000165c4 Section 0 drv_lcdc.o(i.drv_lcdc_config_partial_display_enable) + i.drv_lcdc_config_scale_up_coef 0x000165e6 Section 0 drv_lcdc.o(i.drv_lcdc_config_scale_up_coef) + i.drv_lcdc_config_scale_up_step 0x00016600 Section 0 drv_lcdc.o(i.drv_lcdc_config_scale_up_step) + i.drv_lcdc_config_src_parameter 0x0001660c Section 0 drv_lcdc.o(i.drv_lcdc_config_src_parameter) + i.drv_lcdc_config_thresh 0x00016658 Section 0 drv_lcdc.o(i.drv_lcdc_config_thresh) + i.drv_lcdc_ctrl_flow 0x0001665e Section 0 drv_lcdc.o(i.drv_lcdc_ctrl_flow) + i.drv_lcdc_enable_shadow_reg 0x00016670 Section 0 drv_lcdc.o(i.drv_lcdc_enable_shadow_reg) + i.drv_lcdc_set_int 0x00016690 Section 0 drv_lcdc.o(i.drv_lcdc_set_int) + i.drv_lcdc_set_prefetch 0x000166d0 Section 0 drv_lcdc.o(i.drv_lcdc_set_prefetch) + i.drv_lcdc_set_video_hw_mode 0x000166e8 Section 0 drv_lcdc.o(i.drv_lcdc_set_video_hw_mode) + i.drv_lcdc_start 0x000166fc Section 0 drv_lcdc.o(i.drv_lcdc_start) + i.drv_memc_clear_status 0x0001671c Section 0 drv_memc.o(i.drv_memc_clear_status) + i.drv_memc_enable_irq 0x00016728 Section 0 drv_memc.o(i.drv_memc_enable_irq) + i.drv_memc_gen_a_tear_signal 0x00016768 Section 0 drv_memc.o(i.drv_memc_gen_a_tear_signal) + i.drv_memc_get_status 0x00016774 Section 0 drv_memc.o(i.drv_memc_get_status) + i.drv_memc_rate_transfer_sel 0x00016786 Section 0 drv_memc.o(i.drv_memc_rate_transfer_sel) + i.drv_memc_sel_vsync 0x00016796 Section 0 drv_memc.o(i.drv_memc_sel_vsync) + i.drv_memc_set_active_height 0x000167a4 Section 0 drv_memc.o(i.drv_memc_set_active_height) + i.drv_memc_set_data_mode 0x000167b8 Section 0 drv_memc.o(i.drv_memc_set_data_mode) + i.drv_memc_set_double_buffer 0x000167c4 Section 0 drv_memc.o(i.drv_memc_set_double_buffer) + i.drv_memc_set_double_buffer_reverse 0x000167d4 Section 0 drv_memc.o(i.drv_memc_set_double_buffer_reverse) + i.drv_memc_set_fs_en_conditions 0x000167e6 Section 0 drv_memc.o(i.drv_memc_set_fs_en_conditions) + i.drv_memc_set_inten 0x000167f6 Section 0 drv_memc.o(i.drv_memc_set_inten) + i.drv_memc_set_lcdc_st_conditions 0x0001680c Section 0 drv_memc.o(i.drv_memc_set_lcdc_st_conditions) + i.drv_memc_set_ltpo_mode 0x00016824 Section 0 drv_memc.o(i.drv_memc_set_ltpo_mode) + i.drv_memc_set_tear_mode 0x0001683e Section 0 drv_memc.o(i.drv_memc_set_tear_mode) + i.drv_memc_set_tear_waveform 0x0001684c Section 0 drv_memc.o(i.drv_memc_set_tear_waveform) + i.drv_memc_set_vidc_sync_cnt 0x00016874 Section 0 drv_memc.o(i.drv_memc_set_vidc_sync_cnt) + i.drv_param_init_get_ccm 0x00016884 Section 0 drv_param_init.o(i.drv_param_init_get_ccm) + i.drv_param_init_get_scld_filter_h 0x0001688c Section 0 drv_param_init.o(i.drv_param_init_get_scld_filter_h) + i.drv_param_init_get_scld_filter_v 0x000168a0 Section 0 drv_param_init.o(i.drv_param_init_get_scld_filter_v) + i.drv_param_init_get_sclu_filter 0x000168b4 Section 0 drv_param_init.o(i.drv_param_init_get_sclu_filter) + i.drv_param_init_set_ccm 0x000168bc Section 0 drv_param_init.o(i.drv_param_init_set_ccm) + i.drv_param_init_set_scld_filter 0x000168d0 Section 0 drv_param_init.o(i.drv_param_init_set_scld_filter) + i.drv_param_p2r_filter_init 0x00016934 Section 0 drv_param_init.o(i.drv_param_p2r_filter_init) + i.drv_phy_enable_calibration 0x00016958 Section 0 drv_phy_common.o(i.drv_phy_enable_calibration) + i.drv_phy_get_calibration 0x00016968 Section 0 drv_phy_common.o(i.drv_phy_get_calibration) + i.drv_phy_get_pll_para 0x000169a4 Section 0 drv_phy_common.o(i.drv_phy_get_pll_para) + i.drv_phy_get_rate_para 0x00016a04 Section 0 drv_phy_common.o(i.drv_phy_get_rate_para) + i.drv_phy_test_clear 0x00016a58 Section 0 drv_phy_common.o(i.drv_phy_test_clear) + i.drv_phy_test_lock 0x00016a68 Section 0 drv_phy_common.o(i.drv_phy_test_lock) + i.drv_phy_test_write_1_byte 0x00016a80 Section 0 drv_phy_common.o(i.drv_phy_test_write_1_byte) + i.drv_phy_test_write_2_byte 0x00016aa0 Section 0 drv_phy_common.o(i.drv_phy_test_write_2_byte) + i.drv_phy_test_write_code 0x00016ac6 Section 0 drv_phy_common.o(i.drv_phy_test_write_code) + i.drv_phy_test_write_data 0x00016ae4 Section 0 drv_phy_common.o(i.drv_phy_test_write_data) + drv_phy_test_write_data 0x00016ae5 Thumb Code 32 drv_phy_common.o(i.drv_phy_test_write_data) + i.drv_pwr_set_cp_mode 0x00016b04 Section 0 drv_pwr.o(i.drv_pwr_set_cp_mode) + i.drv_pwr_set_pvd_mode 0x00016b24 Section 0 drv_pwr.o(i.drv_pwr_set_pvd_mode) + i.drv_pwr_set_system_clk_src 0x00016b3c Section 0 drv_pwr.o(i.drv_pwr_set_system_clk_src) + i.drv_rx_phy_test_clear 0x00016b74 Section 0 drv_dsi_rx.o(i.drv_rx_phy_test_clear) + drv_rx_phy_test_clear 0x00016b75 Thumb Code 12 drv_dsi_rx.o(i.drv_rx_phy_test_clear) + i.drv_rx_phy_test_lock 0x00016b80 Section 0 drv_dsi_rx.o(i.drv_rx_phy_test_lock) + drv_rx_phy_test_lock 0x00016b81 Thumb Code 16 drv_dsi_rx.o(i.drv_rx_phy_test_lock) + i.drv_rx_phy_test_write_1_byte 0x00016b90 Section 0 drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) + drv_rx_phy_test_write_1_byte 0x00016b91 Thumb Code 20 drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) + i.drv_rx_phy_test_write_2_byte 0x00016ba4 Section 0 drv_dsi_rx.o(i.drv_rx_phy_test_write_2_byte) + drv_rx_phy_test_write_2_byte 0x00016ba5 Thumb Code 22 drv_dsi_rx.o(i.drv_rx_phy_test_write_2_byte) + i.drv_rxbr_clear_pkt_buffer 0x00016bba Section 0 drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) + i.drv_rxbr_clear_status0 0x00016bc4 Section 0 drv_rxbr.o(i.drv_rxbr_clear_status0) + i.drv_rxbr_enable_irq 0x00016bc8 Section 0 drv_rxbr.o(i.drv_rxbr_enable_irq) + i.drv_rxbr_frame_drop_cfg 0x00016c24 Section 0 drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) + i.drv_rxbr_get_clk 0x00016c38 Section 0 drv_rxbr.o(i.drv_rxbr_get_clk) + i.drv_rxbr_get_col_addr 0x00016c9c Section 0 drv_rxbr.o(i.drv_rxbr_get_col_addr) + i.drv_rxbr_get_int_source 0x00016ca0 Section 0 hal_internal_vsync.o(i.drv_rxbr_get_int_source) + drv_rxbr_get_int_source 0x00016ca1 Thumb Code 18 hal_internal_vsync.o(i.drv_rxbr_get_int_source) + i.drv_rxbr_get_page_addr 0x00016cb2 Section 0 drv_rxbr.o(i.drv_rxbr_get_page_addr) + i.drv_rxbr_get_pkt_buf_error_status 0x00016cb6 Section 0 drv_rxbr.o(i.drv_rxbr_get_pkt_buf_error_status) + i.drv_rxbr_get_status0 0x00016cc2 Section 0 hal_internal_vsync.o(i.drv_rxbr_get_status0) + drv_rxbr_get_status0 0x00016cc3 Thumb Code 18 hal_internal_vsync.o(i.drv_rxbr_get_status0) + i.drv_rxbr_get_status1 0x00016cd4 Section 0 hal_internal_vsync.o(i.drv_rxbr_get_status1) + drv_rxbr_get_status1 0x00016cd5 Thumb Code 22 hal_internal_vsync.o(i.drv_rxbr_get_status1) + i.drv_rxbr_hline_rcv0_cfg 0x00016cea Section 0 drv_rxbr.o(i.drv_rxbr_hline_rcv0_cfg) + i.drv_rxbr_hline_rcv1_cfg 0x00016cf6 Section 0 drv_rxbr.o(i.drv_rxbr_hline_rcv1_cfg) + i.drv_rxbr_hline_rcv_cfg 0x00016d02 Section 0 drv_rxbr.o(i.drv_rxbr_hline_rcv_cfg) + i.drv_rxbr_register_irq0_callback 0x00016d0c Section 0 drv_rxbr.o(i.drv_rxbr_register_irq0_callback) + i.drv_rxbr_register_irq1_callback 0x00016d18 Section 0 drv_rxbr.o(i.drv_rxbr_register_irq1_callback) + i.drv_rxbr_set_ack_pkt_header 0x00016d24 Section 0 drv_rxbr.o(i.drv_rxbr_set_ack_pkt_header) + i.drv_rxbr_set_color_format 0x00016d38 Section 0 drv_rxbr.o(i.drv_rxbr_set_color_format) + i.drv_rxbr_set_filter_regs 0x00016d4c Section 0 drv_rxbr.o(i.drv_rxbr_set_filter_regs) + i.drv_rxbr_set_inten 0x00016d5e Section 0 drv_rxbr.o(i.drv_rxbr_set_inten) + i.drv_rxbr_set_ltpo_drop_th 0x00016d72 Section 0 drv_rxbr.o(i.drv_rxbr_set_ltpo_drop_th) + i.drv_rxbr_set_usr_cfg 0x00016d82 Section 0 drv_rxbr.o(i.drv_rxbr_set_usr_cfg) + i.drv_rxbr_set_usr_col 0x00016da8 Section 0 drv_rxbr.o(i.drv_rxbr_set_usr_col) + i.drv_rxbr_set_usr_row 0x00016db0 Section 0 drv_rxbr.o(i.drv_rxbr_set_usr_row) + i.drv_spi_m_read_data 0x00016db8 Section 0 drv_spi_master.o(i.drv_spi_m_read_data) + i.drv_swire_enable 0x00016dd8 Section 0 drv_swire.o(i.drv_swire_enable) + i.drv_swire_register_callback 0x00016df4 Section 0 drv_swire.o(i.drv_swire_register_callback) + i.drv_swire_set_bit_time 0x00016e00 Section 0 drv_swire.o(i.drv_swire_set_bit_time) + i.drv_swire_set_int 0x00016e18 Section 0 drv_swire.o(i.drv_swire_set_int) + i.drv_swire_set_power_down 0x00016e6c Section 0 drv_swire.o(i.drv_swire_set_power_down) + i.drv_swire_set_pulse_count 0x00016e88 Section 0 drv_swire.o(i.drv_swire_set_pulse_count) + i.drv_sys_cfg_clear_all_int 0x00016e94 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_clear_all_int) + i.drv_sys_cfg_clear_pending 0x00016ea0 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) + i.drv_sys_cfg_sel_ap_rst_lvl_trig 0x00016ec8 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_lvl_trig) + i.drv_sys_cfg_sel_ap_rst_trig 0x00016ee0 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) + i.drv_sys_cfg_sel_gpio_group 0x00016efc Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_gpio_group) + i.drv_sys_cfg_sel_int_trig 0x00016f20 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_int_trig) + i.drv_sys_cfg_set_dma_rx_req 0x00016f44 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) + i.drv_sys_cfg_set_dma_tx_req 0x00016f54 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) + i.drv_sys_cfg_set_int 0x00016f64 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_set_int) + i.drv_timer_clear_status_flags 0x00016f88 Section 0 drv_timer.o(i.drv_timer_clear_status_flags) + drv_timer_clear_status_flags 0x00016f89 Thumb Code 26 drv_timer.o(i.drv_timer_clear_status_flags) + i.drv_timer_enable 0x00016fa2 Section 0 drv_timer.o(i.drv_timer_enable) + i.drv_timer_get_instance 0x00016fc4 Section 0 drv_timer.o(i.drv_timer_get_instance) + i.drv_timer_get_prescaler 0x00016fd4 Section 0 drv_timer.o(i.drv_timer_get_prescaler) + i.drv_timer_handle_interrupt 0x00016fe4 Section 0 drv_timer.o(i.drv_timer_handle_interrupt) + drv_timer_handle_interrupt 0x00016fe5 Thumb Code 62 drv_timer.o(i.drv_timer_handle_interrupt) + i.drv_timer_register_callback 0x00017028 Section 0 drv_timer.o(i.drv_timer_register_callback) + i.drv_timer_set_compare_val 0x0001703c Section 0 drv_timer.o(i.drv_timer_set_compare_val) + i.drv_timer_set_int 0x0001704c Section 0 drv_timer.o(i.drv_timer_set_int) + i.drv_timer_set_prescaler 0x000170a0 Section 0 drv_timer.o(i.drv_timer_set_prescaler) + i.drv_timer_set_repeat 0x000170c8 Section 0 drv_timer.o(i.drv_timer_set_repeat) + i.drv_tx_phy_test_clear 0x000170d8 Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_clear) + drv_tx_phy_test_clear 0x000170d9 Thumb Code 10 drv_dsi_tx.o(i.drv_tx_phy_test_clear) + i.drv_tx_phy_test_enter 0x000170e2 Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_enter) + i.drv_tx_phy_test_exit 0x000170fe Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_exit) + i.drv_tx_phy_test_write_1_byte 0x0001711a Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) + drv_tx_phy_test_write_1_byte 0x0001711b Thumb Code 18 drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) + i.drv_tx_phy_test_write_2_byte 0x0001712c Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_write_2_byte) + drv_tx_phy_test_write_2_byte 0x0001712d Thumb Code 20 drv_dsi_tx.o(i.drv_tx_phy_test_write_2_byte) + i.drv_tx_phy_test_write_code 0x00017140 Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_write_code) + drv_tx_phy_test_write_code 0x00017141 Thumb Code 16 drv_dsi_tx.o(i.drv_tx_phy_test_write_code) + i.drv_vidc_clear_irq 0x00017150 Section 0 drv_vidc.o(i.drv_vidc_clear_irq) + i.drv_vidc_enable 0x00017158 Section 0 drv_vidc.o(i.drv_vidc_enable) + i.drv_vidc_enable_irq 0x00017170 Section 0 drv_vidc.o(i.drv_vidc_enable_irq) + i.drv_vidc_get_irq_status 0x000171b0 Section 0 drv_vidc.o(i.drv_vidc_get_irq_status) + i.drv_vidc_init_module_enable 0x000171c4 Section 0 drv_vidc.o(i.drv_vidc_init_module_enable) + i.drv_vidc_register_callback 0x000171ec Section 0 drv_vidc.o(i.drv_vidc_register_callback) + i.drv_vidc_reset 0x000171f8 Section 0 drv_vidc.o(i.drv_vidc_reset) + i.drv_vidc_set_dst_parameter 0x000171fe Section 0 drv_vidc.o(i.drv_vidc_set_dst_parameter) + i.drv_vidc_set_irqen 0x0001723a Section 0 drv_vidc.o(i.drv_vidc_set_irqen) + i.drv_vidc_set_mirror 0x0001724e Section 0 drv_vidc.o(i.drv_vidc_set_mirror) + i.drv_vidc_set_p2r_hcoef0 0x0001725e Section 0 drv_vidc.o(i.drv_vidc_set_p2r_hcoef0) + i.drv_vidc_set_p2r_hinitb 0x00017266 Section 0 drv_vidc.o(i.drv_vidc_set_p2r_hinitb) + i.drv_vidc_set_p2r_hinitr 0x0001728c Section 0 drv_vidc.o(i.drv_vidc_set_p2r_hinitr) + i.drv_vidc_set_pentile_swap 0x000172b4 Section 0 drv_vidc.o(i.drv_vidc_set_pentile_swap) + i.drv_vidc_set_pu_ctrl 0x000172cc Section 0 drv_vidc.o(i.drv_vidc_set_pu_ctrl) + i.drv_vidc_set_rotation 0x000172d6 Section 0 drv_vidc.o(i.drv_vidc_set_rotation) + i.drv_vidc_set_scld_hcoef0 0x000172e6 Section 0 drv_vidc.o(i.drv_vidc_set_scld_hcoef0) + i.drv_vidc_set_scld_hcoef1 0x000172f0 Section 0 drv_vidc.o(i.drv_vidc_set_scld_hcoef1) + i.drv_vidc_set_scld_step 0x000172fa Section 0 drv_vidc.o(i.drv_vidc_set_scld_step) + i.drv_vidc_set_scld_vcoef0 0x0001730c Section 0 drv_vidc.o(i.drv_vidc_set_scld_vcoef0) + i.drv_vidc_set_scld_vcoef1 0x00017316 Section 0 drv_vidc.o(i.drv_vidc_set_scld_vcoef1) + i.drv_vidc_set_src_parameter 0x00017320 Section 0 drv_vidc.o(i.drv_vidc_set_src_parameter) + i.drv_wdg_clear_counter 0x00017338 Section 0 drv_wdg.o(i.drv_wdg_clear_counter) + i.drv_wdg_clear_edge_flag 0x00017348 Section 0 drv_wdg.o(i.drv_wdg_clear_edge_flag) + drv_wdg_clear_edge_flag 0x00017349 Thumb Code 12 drv_wdg.o(i.drv_wdg_clear_edge_flag) + i.drv_wdg_read_edge_flag 0x00017358 Section 0 drv_wdg.o(i.drv_wdg_read_edge_flag) + drv_wdg_read_edge_flag 0x00017359 Thumb Code 10 drv_wdg.o(i.drv_wdg_read_edge_flag) + i.drv_wdg_set_int 0x00017368 Section 0 drv_wdg.o(i.drv_wdg_set_int) + i.fls_clr_interrupt_flag 0x000173a8 Section 0 drv_fls.o(i.fls_clr_interrupt_flag) + i.fputc 0x000173b2 Section 0 tau_log.o(i.fputc) + i.frame_start_cb 0x000173c8 Section 0 ap_demo.o(i.frame_start_cb) + frame_start_cb 0x000173c9 Thumb Code 42 ap_demo.o(i.frame_start_cb) + i.hal_dsi_rx_ctrl_create_handle 0x00017420 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) + i.hal_dsi_rx_ctrl_deinit 0x00017454 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) + i.hal_dsi_rx_ctrl_dsc_async_handler 0x00017504 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) + i.hal_dsi_rx_ctrl_gen_a_tear_signal 0x0001752c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) + i.hal_dsi_rx_ctrl_get_max_ret_size 0x00017554 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) + i.hal_dsi_rx_ctrl_init 0x0001757c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) + i.hal_dsi_rx_ctrl_init_clk 0x00017614 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) + hal_dsi_rx_ctrl_init_clk 0x00017615 Thumb Code 332 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) + i.hal_dsi_rx_ctrl_init_dsi_rx 0x000177b8 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) + hal_dsi_rx_ctrl_init_dsi_rx 0x000177b9 Thumb Code 184 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) + i.hal_dsi_rx_ctrl_init_memc 0x00017890 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) + hal_dsi_rx_ctrl_init_memc 0x00017891 Thumb Code 342 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) + i.hal_dsi_rx_ctrl_init_rxbr 0x000179f0 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) + hal_dsi_rx_ctrl_init_rxbr 0x000179f1 Thumb Code 320 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) + i.hal_dsi_rx_ctrl_init_vidc 0x00017b40 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) + hal_dsi_rx_ctrl_init_vidc 0x00017b41 Thumb Code 544 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) + i.hal_dsi_rx_ctrl_pre_init_pps 0x00017d6c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_pre_init_pps) + i.hal_dsi_rx_ctrl_restart 0x00017da8 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) + i.hal_dsi_rx_ctrl_send_ack_cmd 0x00017df8 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) + i.hal_dsi_rx_ctrl_set_cus_scld_filter 0x00017ee8 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) + i.hal_dsi_rx_ctrl_set_cus_sync_line 0x00017f54 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) + i.hal_dsi_rx_ctrl_set_ipi_cfg 0x00017f88 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) + hal_dsi_rx_ctrl_set_ipi_cfg 0x00017f89 Thumb Code 50 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) + i.hal_dsi_rx_ctrl_set_rxbr_clk 0x00017fc0 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) + hal_dsi_rx_ctrl_set_rxbr_clk 0x00017fc1 Thumb Code 114 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) + i.hal_dsi_rx_ctrl_set_sw_tear_mode 0x00018034 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) + i.hal_dsi_rx_ctrl_set_tear_mode_ex 0x00018068 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_tear_mode_ex) + i.hal_dsi_rx_ctrl_start 0x00018078 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) + i.hal_dsi_rx_ctrl_stop 0x000180b4 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) + i.hal_dsi_rx_ctrl_toggle_resolution_ex 0x000180f0 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution_ex) + i.hal_dsi_tx_calc_video_chunks 0x00018110 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) + hal_dsi_tx_calc_video_chunks 0x00018111 Thumb Code 384 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) + i.hal_dsi_tx_config_params_for_lane_rate 0x000182a0 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) + hal_dsi_tx_config_params_for_lane_rate 0x000182a1 Thumb Code 42 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) + i.hal_dsi_tx_count_lane_rate 0x000182d4 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) + hal_dsi_tx_count_lane_rate 0x000182d5 Thumb Code 982 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) + i.hal_dsi_tx_ctrl_create_handle 0x000186fc Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) + i.hal_dsi_tx_ctrl_deinit 0x00018728 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) + i.hal_dsi_tx_ctrl_enter_init_panel_mode 0x000187ac Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) + i.hal_dsi_tx_ctrl_exit_init_panel_mode 0x000187f8 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) + i.hal_dsi_tx_ctrl_init 0x00018820 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) + i.hal_dsi_tx_ctrl_init_clk 0x000188c4 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) + hal_dsi_tx_ctrl_init_clk 0x000188c5 Thumb Code 36 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) + i.hal_dsi_tx_ctrl_panel_reset_pin 0x000188e8 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_panel_reset_pin) + i.hal_dsi_tx_ctrl_set_ccm 0x000188f4 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) + i.hal_dsi_tx_ctrl_set_overwrite_rgb 0x00018914 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) + i.hal_dsi_tx_ctrl_set_partial_disp 0x00018928 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp) + i.hal_dsi_tx_ctrl_set_partial_disp_area 0x00018938 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp_area) + i.hal_dsi_tx_ctrl_start 0x0001895c Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) + i.hal_dsi_tx_ctrl_stop 0x00018a04 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) + i.hal_dsi_tx_ctrl_write_array_cmd 0x00018a48 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) + i.hal_dsi_tx_ctrl_write_cmd 0x00018b38 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) + i.hal_dsi_tx_init_data_mode 0x00018c04 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) + hal_dsi_tx_init_data_mode 0x00018c05 Thumb Code 58 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) + i.hal_dsi_tx_init_dpi_cfg 0x00018c48 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) + hal_dsi_tx_init_dpi_cfg 0x00018c49 Thumb Code 42 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) + i.hal_dsi_tx_init_interrupt 0x00018c78 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) + hal_dsi_tx_init_interrupt 0x00018c79 Thumb Code 28 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) + i.hal_dsi_tx_init_phy_cfg 0x00018c98 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) + hal_dsi_tx_init_phy_cfg 0x00018c99 Thumb Code 28 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) + i.hal_dsi_tx_init_remains 0x00018cb8 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) + hal_dsi_tx_init_remains 0x00018cb9 Thumb Code 142 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) + i.hal_dsi_tx_init_video_mode 0x00018d4c Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) + hal_dsi_tx_init_video_mode 0x00018d4d Thumb Code 82 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) + i.hal_dsi_tx_send_cmd 0x00018da4 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) + hal_dsi_tx_send_cmd 0x00018da5 Thumb Code 60 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) + i.hal_gpio_ctrl_eint 0x00018de8 Section 0 hal_gpio.o(i.hal_gpio_ctrl_eint) + i.hal_gpio_get_input_data 0x00018e00 Section 0 hal_gpio.o(i.hal_gpio_get_input_data) + i.hal_gpio_init_eint 0x00018e14 Section 0 hal_gpio.o(i.hal_gpio_init_eint) + i.hal_gpio_init_output 0x00018e54 Section 0 hal_gpio.o(i.hal_gpio_init_output) + i.hal_gpio_reg_eint_cb 0x00018e7c Section 0 hal_gpio.o(i.hal_gpio_reg_eint_cb) + i.hal_gpio_set_ap_reset_int 0x00018e94 Section 0 hal_gpio.o(i.hal_gpio_set_ap_reset_int) + i.hal_gpio_set_mode 0x00018ee4 Section 0 hal_gpio.o(i.hal_gpio_set_mode) + i.hal_gpio_set_output_data 0x00018f44 Section 0 hal_gpio.o(i.hal_gpio_set_output_data) + i.hal_gpio_set_pull_state 0x00018f4c Section 0 hal_gpio.o(i.hal_gpio_set_pull_state) + i.hal_i2c_m_dma_init 0x00018f6c Section 0 hal_i2c_master.o(i.hal_i2c_m_dma_init) + i.hal_i2c_m_dma_read 0x00018fd8 Section 0 hal_i2c_master.o(i.hal_i2c_m_dma_read) + i.hal_i2c_m_dma_write 0x00018ff8 Section 0 hal_i2c_master.o(i.hal_i2c_m_dma_write) + i.hal_i2c_m_transfer_complate 0x00019014 Section 0 hal_i2c_master.o(i.hal_i2c_m_transfer_complate) + i.hal_i2c_master_irq_callback 0x00019020 Section 0 hal_i2c_master.o(i.hal_i2c_master_irq_callback) + hal_i2c_master_irq_callback 0x00019021 Thumb Code 24 hal_i2c_master.o(i.hal_i2c_master_irq_callback) + i.hal_i2c_s_dma_user_callback 0x00019040 Section 0 hal_i2c_slave.o(i.hal_i2c_s_dma_user_callback) + hal_i2c_s_dma_user_callback 0x00019041 Thumb Code 12 hal_i2c_slave.o(i.hal_i2c_s_dma_user_callback) + i.hal_i2c_s_dma_write 0x00019050 Section 0 hal_i2c_slave.o(i.hal_i2c_s_dma_write) + i.hal_i2c_s_init 0x0001909c Section 0 hal_i2c_slave.o(i.hal_i2c_s_init) + i.hal_i2c_s_nonblocking_read 0x00019164 Section 0 hal_i2c_slave.o(i.hal_i2c_s_nonblocking_read) + i.hal_i2c_s_set_transfer 0x00019178 Section 0 hal_i2c_slave.o(i.hal_i2c_s_set_transfer) + i.hal_i2c_slave_irq_callback 0x00019184 Section 0 hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) + hal_i2c_slave_irq_callback 0x00019185 Thumb Code 356 hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) + i.hal_internal_check_video_auto_sync 0x000192f8 Section 0 hal_internal_vsync.o(i.hal_internal_check_video_auto_sync) + i.hal_internal_init_memc 0x00019310 Section 0 hal_internal_vsync.o(i.hal_internal_init_memc) + i.hal_internal_rx_dcs_async_handler 0x0001940c Section 0 hal_internal_vsync.o(i.hal_internal_rx_dcs_async_handler) + i.hal_internal_rx_dcs_polling 0x00019438 Section 0 hal_internal_vsync.o(i.hal_internal_rx_dcs_polling) + i.hal_internal_sync_get_fb_setting 0x00019490 Section 0 hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) + i.hal_internal_sync_get_hight_performan_mode 0x000194a0 Section 0 hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) + i.hal_internal_sync_input_resolution_change_ex 0x000194b0 Section 0 hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) + i.hal_internal_vsync_deinit 0x00019684 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_deinit) + i.hal_internal_vsync_get_rx_state 0x000196ac Section 0 hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) + i.hal_internal_vsync_get_sync_line 0x000196b8 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) + i.hal_internal_vsync_get_tear_mode 0x000196d0 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_get_tear_mode) + i.hal_internal_vsync_get_tx_state 0x000196dc Section 0 hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) + i.hal_internal_vsync_init_rx 0x000196e8 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_init_rx) + i.hal_internal_vsync_init_tx 0x00019828 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_init_tx) + i.hal_internal_vsync_set_auto_hw_filter 0x000198d8 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) + i.hal_internal_vsync_set_rx_state 0x00019968 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) + i.hal_internal_vsync_set_sync_line 0x0001998c Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) + i.hal_internal_vsync_set_tear_mode 0x000199d0 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) + i.hal_internal_vsync_set_tx_state 0x00019a20 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) + i.hal_intl_svs_deinit_tx 0x00019aa4 Section 0 hal_internal_soft_sync.o(i.hal_intl_svs_deinit_tx) + i.hal_intl_svs_handle 0x00019ab4 Section 0 hal_internal_soft_sync.o(i.hal_intl_svs_handle) + i.hal_intl_svs_init_rx 0x00019ad8 Section 0 hal_internal_soft_sync.o(i.hal_intl_svs_init_rx) + i.hal_intl_svs_init_tx 0x00019b50 Section 0 hal_internal_soft_sync.o(i.hal_intl_svs_init_tx) + i.hal_intl_svs_set_sync_coef 0x00019b64 Section 0 hal_internal_soft_sync.o(i.hal_intl_svs_set_sync_coef) + i.hal_intl_svs_update_rxbr_clk 0x00019b70 Section 0 hal_internal_soft_sync.o(i.hal_intl_svs_update_rxbr_clk) + i.hal_lcdc_config_ccm 0x00019bb8 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) + hal_lcdc_config_ccm 0x00019bb9 Thumb Code 30 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) + i.hal_lcdc_config_remains 0x00019bdc Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) + hal_lcdc_config_remains 0x00019bdd Thumb Code 94 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) + i.hal_lcdc_config_rgb_to_pentile 0x00019c40 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_rgb_to_pentile) + hal_lcdc_config_rgb_to_pentile 0x00019c41 Thumb Code 14 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_rgb_to_pentile) + i.hal_lcdc_config_upscaler 0x00019c54 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) + hal_lcdc_config_upscaler 0x00019c55 Thumb Code 348 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) + i.hal_lcdc_init_cfg 0x00019db8 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) + hal_lcdc_init_cfg 0x00019db9 Thumb Code 78 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) + i.hal_lcdc_init_clk 0x00019e0c Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) + hal_lcdc_init_clk 0x00019e0d Thumb Code 446 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) + i.hal_lcdc_init_interrupt 0x00019fd8 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) + hal_lcdc_init_interrupt 0x00019fd9 Thumb Code 58 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) + i.hal_spi_m_clear_rxfifo 0x0001a018 Section 0 hal_spi_master.o(i.hal_spi_m_clear_rxfifo) + i.hal_swire_deinit 0x0001a026 Section 0 hal_swire.o(i.hal_swire_deinit) + i.hal_swire_init 0x0001a038 Section 0 hal_swire.o(i.hal_swire_init) + i.hal_swire_open 0x0001a058 Section 0 hal_swire.o(i.hal_swire_open) + i.hal_swire_register_callback 0x0001a06e Section 0 hal_swire.o(i.hal_swire_register_callback) + i.hal_swire_start 0x0001a078 Section 0 hal_swire.o(i.hal_swire_start) + i.hal_system_enable_systick 0x0001a0e4 Section 0 hal_system.o(i.hal_system_enable_systick) + i.hal_system_get_tick 0x0001a0ec Section 0 hal_system.o(i.hal_system_get_tick) + i.hal_system_init 0x0001a0f4 Section 0 hal_system.o(i.hal_system_init) + i.hal_system_init_console 0x0001a17c Section 0 hal_system.o(i.hal_system_init_console) + i.hal_system_set_phy_calibration 0x0001a198 Section 0 hal_system.o(i.hal_system_set_phy_calibration) + i.hal_system_set_pvd 0x0001a1a0 Section 0 hal_system.o(i.hal_system_set_pvd) + i.hal_system_set_vcc 0x0001a1a8 Section 0 hal_system.o(i.hal_system_set_vcc) + i.hal_timer_deinit 0x0001a1b0 Section 0 hal_timer.o(i.hal_timer_deinit) + i.hal_timer_init 0x0001a1de Section 0 hal_timer.o(i.hal_timer_init) + i.hal_timer_start 0x0001a1f8 Section 0 hal_timer.o(i.hal_timer_start) + i.hal_timer_stop 0x0001a240 Section 0 hal_timer.o(i.hal_timer_stop) + i.hal_tx_frame_rate_adjust 0x0001a268 Section 0 hal_dsi_tx_ctrl.o(i.hal_tx_frame_rate_adjust) + hal_tx_frame_rate_adjust 0x0001a269 Thumb Code 44 hal_dsi_tx_ctrl.o(i.hal_tx_frame_rate_adjust) + i.hal_uart_init 0x0001a298 Section 0 hal_uart.o(i.hal_uart_init) + i.hal_uart_transmit_blocking 0x0001a324 Section 0 hal_uart.o(i.hal_uart_transmit_blocking) + i.hal_vsync_reset_lcdc_scaler 0x0001a334 Section 0 hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) + hal_vsync_reset_lcdc_scaler 0x0001a335 Thumb Code 460 hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) + i.handle_init 0x0001a510 Section 0 irq_redirect .o(i.handle_init) + i.init_mipi_tx 0x0001a620 Section 0 ap_demo.o(i.init_mipi_tx) + init_mipi_tx 0x0001a621 Thumb Code 98 ap_demo.o(i.init_mipi_tx) + i.init_panel 0x0001a690 Section 0 ap_demo.o(i.init_panel) + init_panel 0x0001a691 Thumb Code 160 ap_demo.o(i.init_panel) + i.main 0x0001a768 Section 0 main.o(i.main) + i.open_mipi_rx 0x0001a774 Section 0 ap_demo.o(i.open_mipi_rx) + open_mipi_rx 0x0001a775 Thumb Code 166 ap_demo.o(i.open_mipi_rx) + i.pps_updata_exec 0x0001a840 Section 0 ap_demo.o(i.pps_updata_exec) + i.pps_update_handle 0x0001a86c Section 0 ap_demo.o(i.pps_update_handle) + pps_update_handle 0x0001a86d Thumb Code 126 ap_demo.o(i.pps_update_handle) + i.rx_get_dcs_packet_data 0x0001a920 Section 0 hal_internal_vsync.o(i.rx_get_dcs_packet_data) + rx_get_dcs_packet_data 0x0001a921 Thumb Code 654 hal_internal_vsync.o(i.rx_get_dcs_packet_data) + i.rx_partial_update 0x0001ad14 Section 0 hal_internal_vsync.o(i.rx_partial_update) + rx_partial_update 0x0001ad15 Thumb Code 348 hal_internal_vsync.o(i.rx_partial_update) + i.rx_receive_packet 0x0001ae80 Section 0 hal_internal_vsync.o(i.rx_receive_packet) + rx_receive_packet 0x0001ae81 Thumb Code 126 hal_internal_vsync.o(i.rx_receive_packet) + i.rx_receive_pps 0x0001af0c Section 0 hal_internal_vsync.o(i.rx_receive_pps) + rx_receive_pps 0x0001af0d Thumb Code 268 hal_internal_vsync.o(i.rx_receive_pps) + i.rx_restart_exec 0x0001b08c Section 0 ap_demo.o(i.rx_restart_exec) + i.rxbr_irq0_callback 0x0001b0e0 Section 0 hal_internal_vsync.o(i.rxbr_irq0_callback) + rxbr_irq0_callback 0x0001b0e1 Thumb Code 192 hal_internal_vsync.o(i.rxbr_irq0_callback) + i.rxbr_irq1_callback 0x0001b1ac Section 0 hal_internal_vsync.o(i.rxbr_irq1_callback) + rxbr_irq1_callback 0x0001b1ad Thumb Code 392 hal_internal_vsync.o(i.rxbr_irq1_callback) + i.soft_gen_te 0x0001b3f0 Section 0 hal_internal_vsync.o(i.soft_gen_te) + soft_gen_te 0x0001b3f1 Thumb Code 166 hal_internal_vsync.o(i.soft_gen_te) + i.soft_gen_te_double_buffer 0x0001b4b4 Section 0 hal_internal_vsync.o(i.soft_gen_te_double_buffer) + soft_gen_te_double_buffer 0x0001b4b5 Thumb Code 166 hal_internal_vsync.o(i.soft_gen_te_double_buffer) + i.soft_timer3_cb 0x0001b574 Section 0 ap_demo.o(i.soft_timer3_cb) + soft_timer3_cb 0x0001b575 Thumb Code 44 ap_demo.o(i.soft_timer3_cb) + i.sqrt 0x0001b5b0 Section 0 sqrt.o(i.sqrt) + i.svs_direct_mode_setting 0x0001b5f8 Section 0 hal_internal_soft_sync.o(i.svs_direct_mode_setting) + svs_direct_mode_setting 0x0001b5f9 Thumb Code 156 hal_internal_soft_sync.o(i.svs_direct_mode_setting) + i.svs_get_rel_intv 0x0001b6a4 Section 0 hal_internal_soft_sync.o(i.svs_get_rel_intv) + svs_get_rel_intv 0x0001b6a5 Thumb Code 20 hal_internal_soft_sync.o(i.svs_get_rel_intv) + i.svs_sync_handle 0x0001b6c0 Section 0 hal_internal_soft_sync.o(i.svs_sync_handle) + svs_sync_handle 0x0001b6c1 Thumb Code 158 hal_internal_soft_sync.o(i.svs_sync_handle) + i.svs_wait_start 0x0001b770 Section 0 hal_internal_soft_sync.o(i.svs_wait_start) + svs_wait_start 0x0001b771 Thumb Code 224 hal_internal_soft_sync.o(i.svs_wait_start) + i.svs_waite_fr_stab 0x0001b864 Section 0 hal_internal_soft_sync.o(i.svs_waite_fr_stab) + svs_waite_fr_stab 0x0001b865 Thumb Code 148 hal_internal_soft_sync.o(i.svs_waite_fr_stab) + i.swire_callback 0x0001b93c Section 0 ap_demo.o(i.swire_callback) + swire_callback 0x0001b93d Thumb Code 16 ap_demo.o(i.swire_callback) + i.swire_timer_callback 0x0001b950 Section 0 ap_demo.o(i.swire_timer_callback) + swire_timer_callback 0x0001b951 Thumb Code 22 ap_demo.o(i.swire_timer_callback) + i.tp_heartbeat_exec 0x0001b96c Section 0 ap_demo.o(i.tp_heartbeat_exec) + i.vidc_callback 0x0001b9d8 Section 0 hal_internal_vsync.o(i.vidc_callback) + vidc_callback 0x0001b9d9 Thumb Code 234 hal_internal_vsync.o(i.vidc_callback) + i.vpre_err_reset 0x0001bae0 Section 0 hal_internal_vsync.o(i.vpre_err_reset) + vpre_err_reset 0x0001bae1 Thumb Code 192 hal_internal_vsync.o(i.vpre_err_reset) + i.vsync_set_te_mode 0x0001bbb8 Section 0 hal_internal_vsync.o(i.vsync_set_te_mode) + vsync_set_te_mode 0x0001bbb9 Thumb Code 300 hal_internal_vsync.o(i.vsync_set_te_mode) + .constdata 0x0001bd84 Section 10612 ap_demo.o(.constdata) + g_cus_rx_dcs_execute_table 0x0001bd84 Data 120 ap_demo.o(.constdata) + .constdata 0x0001e6f8 Section 32 app_tp_st_touch.o(.constdata) + .constdata 0x0001e718 Section 1 app_tp_for_custom_s21u.o(.constdata) + .constdata 0x0001e719 Section 3 app_tp_for_custom_s21u.o(.constdata) + .constdata 0x0001e71c Section 6 app_tp_for_custom_s21u.o(.constdata) + .constdata 0x0001e722 Section 3 app_tp_for_custom_s21u.o(.constdata) + .constdata 0x0001e725 Section 3 app_tp_for_custom_s21u.o(.constdata) + .constdata 0x0001e728 Section 1 app_tp_for_custom_s21u.o(.constdata) + .constdata 0x0001e72c Section 36 hal_dsi_tx_ctrl.o(.constdata) + .constdata 0x0001e750 Section 210 hal_gpio.o(.constdata) + s_gpio_map 0x0001e750 Data 120 hal_gpio.o(.constdata) + s_gpio_perf 0x0001e7c8 Data 90 hal_gpio.o(.constdata) + .constdata 0x0001e824 Section 32 hal_i2c_slave.o(.constdata) + sg_i2c_s_config 0x0001e824 Data 32 hal_i2c_slave.o(.constdata) + .constdata 0x0001e844 Section 8 drv_param_init.o(.constdata) + .constdata 0x0001e84c Section 390 drv_phy_common.o(.constdata) + phy_para_mapping_h 0x0001e84c Data 184 drv_phy_common.o(.constdata) + phy_para_mapping_l 0x0001e904 Data 128 drv_phy_common.o(.constdata) + phy_data_high_map 0x0001e984 Data 48 drv_phy_common.o(.constdata) + phy_data_lp_map 0x0001e9b4 Data 30 drv_phy_common.o(.constdata) + .conststring 0x0001e9d4 Section 72 hal_dsi_rx_ctrl.o(.conststring) + .conststring 0x0001ea1c Section 67 hal_dsi_tx_ctrl.o(.conststring) + .conststring 0x0001ea60 Section 292 hal_internal_vsync.o(.conststring) + .ARM.__AT_0x00070100 0x00070100 Section 192 irq_redirect .o(.ARM.__AT_0x00070100) + .data 0x000701d0 Section 1592 ap_demo.o(.data) + g_need_enter_sleep_mode 0x000701d0 Data 1 ap_demo.o(.data) + swire_num 0x000701d1 Data 1 ap_demo.o(.data) + start_display_on 0x000701d2 Data 1 ap_demo.o(.data) + g_exit_sleep_mode 0x000701d3 Data 1 ap_demo.o(.data) + panel_display_done 0x000701d4 Data 1 ap_demo.o(.data) + R60_Parma_backup 0x000701d9 Data 1 ap_demo.o(.data) + read_A1_count 0x000701db Data 1 ap_demo.o(.data) + read_6e_10 0x000701dc Data 1 ap_demo.o(.data) + read_6e_24 0x000701dd Data 1 ap_demo.o(.data) + read_6e_38 0x000701de Data 1 ap_demo.o(.data) + read_6e_52 0x000701df Data 1 ap_demo.o(.data) + read_6e_66 0x000701e0 Data 1 ap_demo.o(.data) + read_6e_70 0x000701e1 Data 1 ap_demo.o(.data) + read_5a_39 0x000701e2 Data 1 ap_demo.o(.data) + read_7F_count 0x000701e3 Data 1 ap_demo.o(.data) + read_bl_data 0x000701e6 Data 2 ap_demo.o(.data) + read_bl_data_bak 0x000701e8 Data 2 ap_demo.o(.data) + g_rx_ctrl_handle 0x000701f0 Data 4 ap_demo.o(.data) + g_tx_ctrl_handle 0x000701f4 Data 4 ap_demo.o(.data) + value_reg_df 0x00070204 Data 4 ap_demo.o(.data) + .data 0x00070808 Section 20 app_tp_transfer.o(.data) + s_spim_write 0x00070808 Data 1 app_tp_transfer.o(.data) + s_screen_int_flag 0x00070809 Data 1 app_tp_transfer.o(.data) + s_phone_reset_flag 0x0007080a Data 1 app_tp_transfer.o(.data) + s_screen_const_transfer_count 0x0007080c Data 1 app_tp_transfer.o(.data) + i2cs_transfer 0x0007080d Data 1 app_tp_transfer.o(.data) + screen_const_transfer_buffer_ready 0x0007080e Data 1 app_tp_transfer.o(.data) + analysis_flag 0x0007080f Data 1 app_tp_transfer.o(.data) + s_slave_txbuffer 0x00070810 Data 4 app_tp_transfer.o(.data) + s_slave_txbuffer_size 0x00070814 Data 4 app_tp_transfer.o(.data) + .data 0x0007081c Section 40 app_tp_st_touch.o(.data) + s_calibration_flag 0x0007081c Data 1 app_tp_st_touch.o(.data) + s_calibration_correct_flag 0x0007081d Data 1 app_tp_st_touch.o(.data) + .data 0x00070844 Section 1 app_tp_for_custom_s21u.o(.data) + .data 0x00070845 Section 1 app_tp_for_custom_s21u.o(.data) + .data 0x00070846 Section 642 app_tp_for_custom_s21u.o(.data) + .data 0x00070ac8 Section 1 app_tp_for_custom_s21u.o(.data) + .data 0x00070acc Section 16 app_tp_for_custom_s21u.o(.data) + .data 0x00070adc Section 100 app_tp_for_custom_s21u.o(.data) + .data 0x00070b40 Section 1 app_tp_for_custom_s21u.o(.data) + .data 0x00070b41 Section 1 app_tp_for_custom_s21u.o(.data) + .data 0x00070b44 Section 8 hal_dsi_rx_ctrl.o(.data) + g_hw_auto_filter 0x00070b44 Data 1 hal_dsi_rx_ctrl.o(.data) + g_esc_clk 0x00070b48 Data 4 hal_dsi_rx_ctrl.o(.data) + .data 0x00070b4c Section 3 hal_dsi_tx_ctrl.o(.data) + g_tx_vcom_en 0x00070b4c Data 1 hal_dsi_tx_ctrl.o(.data) + g_tx_vpg_en 0x00070b4d Data 1 hal_dsi_tx_ctrl.o(.data) + g_tx_mode 0x00070b4e Data 1 hal_dsi_tx_ctrl.o(.data) + .data 0x00070b4f Section 1 hal_i2c_master.o(.data) + s_i2c_m_transfer_end 0x00070b4f Data 1 hal_i2c_master.o(.data) + .data 0x00070b50 Section 32 hal_i2c_slave.o(.data) + s_txbuffer_complate 0x00070b50 Data 1 hal_i2c_slave.o(.data) + s_i2c_s_dma_end 0x00070b51 Data 1 hal_i2c_slave.o(.data) + s_i2c_s_receive_cnt 0x00070b52 Data 1 hal_i2c_slave.o(.data) + sg_i2c_s_index 0x00070b53 Data 1 hal_i2c_slave.o(.data) + s_hal_slave_rxbuffer 0x00070b54 Data 4 hal_i2c_slave.o(.data) + s_hal_slave_rxbuffer_size 0x00070b58 Data 4 hal_i2c_slave.o(.data) + hal_i2c_s_callback 0x00070b5c Data 4 hal_i2c_slave.o(.data) + sg_tx_byte_num 0x00070b60 Data 4 hal_i2c_slave.o(.data) + s_receive_count 0x00070b64 Data 4 hal_i2c_slave.o(.data) + s_tx_buffer_t 0x00070b68 Data 4 hal_i2c_slave.o(.data) + tx_sum 0x00070b6c Data 4 hal_i2c_slave.o(.data) + .data 0x00070b70 Section 24 hal_internal_vsync.o(.data) + sg_cmd_mode_tx_start 0x00070b70 Data 1 hal_internal_vsync.o(.data) + sg_cur_te_info 0x00070b74 Data 4 hal_internal_vsync.o(.data) + g_cus_rx_write_cmd_handle 0x00070b7c Data 12 hal_internal_vsync.o(.data) + .data 0x00070b88 Section 12 drv_common.o(.data) + s_my_tick 0x00070b88 Data 4 drv_common.o(.data) + .data 0x00070b94 Section 4 drv_gpio.o(.data) + g_ap_reset_cb 0x00070b94 Data 4 drv_gpio.o(.data) + .data 0x00070b98 Section 8 drv_i2c_dma.o(.data) + i2c0_dma_callback 0x00070b98 Data 4 drv_i2c_dma.o(.data) + i2c1_dma_callback 0x00070b9c Data 4 drv_i2c_dma.o(.data) + .data 0x00070ba0 Section 4 drv_i2c_master.o(.data) + i2c1_intr_callback 0x00070ba0 Data 4 drv_i2c_master.o(.data) + .data 0x00070ba4 Section 4 drv_i2c_slave.o(.data) + i2c0_intr_callback 0x00070ba4 Data 4 drv_i2c_slave.o(.data) + .data 0x00070ba8 Section 1188 drv_param_init.o(.data) + .data 0x0007104c Section 12 drv_pwm.o(.data) + s_pwm_type 0x0007104c Data 1 drv_pwm.o(.data) + s_pwm_cb 0x00071050 Data 8 drv_pwm.o(.data) + .data 0x00071058 Section 4 drv_spi_master.o(.data) + SPIM_intr_callback 0x00071058 Data 4 drv_spi_master.o(.data) + .data 0x0007105c Section 8 drv_swire.o(.data) + s_swire_cb 0x0007105c Data 8 drv_swire.o(.data) + .data 0x00071064 Section 1 drv_sys_cfg.o(.data) + sg_ap_rstn_trigger_type 0x00071064 Data 1 drv_sys_cfg.o(.data) + .data 0x00071068 Section 80 drv_timer.o(.data) + sg_timer_info 0x00071068 Data 80 drv_timer.o(.data) + .data 0x000710b8 Section 8 drv_rxbr.o(.data) + .data 0x000710c0 Section 4 drv_vidc.o(.data) + .data 0x000710c4 Section 1 drv_phy_common.o(.data) + g_phy_calibration 0x000710c4 Data 1 drv_phy_common.o(.data) + .data 0x000710c8 Section 12 drv_chip_info.o(.data) + sg_chip_info 0x000710c8 Data 4 drv_chip_info.o(.data) + sg_chip_function 0x000710cc Data 4 drv_chip_info.o(.data) + sg_chip_encrypt 0x000710d0 Data 4 drv_chip_info.o(.data) + .data 0x000710d4 Section 18 norflash.o(.data) + tmprg 0x000710dc Data 4 norflash.o(.data) + .data 0x000710e8 Section 8 drv_uart.o(.data) + s_UartFcrReg 0x000710e8 Data 4 drv_uart.o(.data) + uart_userData 0x000710ec Data 4 drv_uart.o(.data) + .data 0x000710f0 Section 12 drv_wdg.o(.data) + sg_wdg_repeat 0x000710f0 Data 1 drv_wdg.o(.data) + sg_wdg_cb 0x000710f4 Data 8 drv_wdg.o(.data) + .data 0x000710fc Section 4 stdout.o(.data) + .data 0x00071100 Section 4 errno.o(.data) + _errno 0x00071100 Data 4 errno.o(.data) + .bss 0x00071104 Section 500 app_tp_transfer.o(.bss) + s_screen_read_buffer 0x00071104 Data 250 app_tp_transfer.o(.bss) + s_phone_read_buffer 0x000711fe Data 250 app_tp_transfer.o(.bss) + .bss 0x000712f8 Section 12 app_tp_st_touch.o(.bss) + .bss 0x00071304 Section 72 app_tp_for_custom_s21u.o(.bss) + .bss 0x0007134c Section 196 hal_dsi_rx_ctrl.o(.bss) + g_rx_ctrl_handle_inst 0x0007134c Data 196 hal_dsi_rx_ctrl.o(.bss) + .bss 0x00071410 Section 76 hal_dsi_tx_ctrl.o(.bss) + g_tx_ctrl_handle_inst 0x00071410 Data 76 hal_dsi_tx_ctrl.o(.bss) + .bss 0x0007145c Section 256 tau_log.o(.bss) + .bss 0x0007155c Section 208 hal_uart.o(.bss) + .bss 0x0007162c Section 2420 hal_internal_vsync.o(.bss) + g_imm_buffer 0x00071e80 Data 255 hal_internal_vsync.o(.bss) + sg_te_info 0x00071f80 Data 12 hal_internal_vsync.o(.bss) + g_imm_packet 0x00071f8c Data 20 hal_internal_vsync.o(.bss) + .bss 0x00071fa0 Section 28 drv_dma.o(.bss) + s_dma_handle 0x00071fa0 Data 28 drv_dma.o(.bss) + .bss 0x00071fbc Section 64 drv_gpio.o(.bss) + s_gpio_cb 0x00071fbc Data 64 drv_gpio.o(.bss) + .bss 0x00071ffc Section 320 drv_i2c_dma.o(.bss) + i2c0_dma_slave_handle 0x00071ffc Data 160 drv_i2c_dma.o(.bss) + i2c1_dma_master_handle 0x0007209c Data 160 drv_i2c_dma.o(.bss) + .bss 0x0007213c Section 64 hal_internal_soft_sync.o(.bss) + sg_sys_handler 0x0007213c Data 64 hal_internal_soft_sync.o(.bss) + .bss 0x0007217c Section 32 hal_spi_slave.o(.bss) + .bss 0x0007219c Section 4144 dcs_packet_fifo.o(.bss) + STACK 0x000731d0 Section 4096 startup_armcm0.o(STACK) + + Global Symbols + + Symbol Name Value Ov Type Size Object(Section) + + BuildAttributes$$THM_ISAv3M$S$PE$A:L22$X:L11$S22$IEEE1$IW$USESV6$~STKCKD$USESV7$~SHL$OTIME$ROPI$IEEEJ$EBA8$MICROLIB$REQ8$PRES8$EABIv2 0x00000000 Number 0 anon$$obj.o ABSOLUTE + __ARM_use_no_argv 0x00000000 Number 0 main.o ABSOLUTE + _printf_a 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_c 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_charcount 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_d 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_e 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_f 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_flags 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_fp_dec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_fp_hex 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_g 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_i 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_int_dec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_l 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_lc 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_ll 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_lld 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_lli 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_llo 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_llu 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_llx 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_longlong_dec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_longlong_hex 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_longlong_oct 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_ls 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_mbtowc 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_n 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_o 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_p 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_percent 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_pre_padding 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_return_value 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_s 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_sizespec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_str 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_truncate_signed 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_truncate_unsigned 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_u 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_wc 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_wctomb 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_widthprec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_x 0x00000000 Number 0 stubs.o ABSOLUTE + __cpp_initialize__aeabi_ - Undefined Weak Reference + __cxa_finalize - Undefined Weak Reference + _clock_init - Undefined Weak Reference + _microlib_exit - Undefined Weak Reference + __Vectors_Size 0x000000c0 Number 0 startup_armcm0.o ABSOLUTE + __Vectors 0x00010000 Data 4 startup_armcm0.o(RESET) + __Vectors_End 0x000100c0 Data 0 startup_armcm0.o(RESET) + __main 0x000100c1 Thumb Code 0 entry.o(.ARM.Collect$$$$00000000) + _main_stk 0x000100c1 Thumb Code 0 entry2.o(.ARM.Collect$$$$00000001) + _main_scatterload 0x000100c5 Thumb Code 0 entry5.o(.ARM.Collect$$$$00000004) + __main_after_scatterload 0x000100c9 Thumb Code 0 entry5.o(.ARM.Collect$$$$00000004) + _main_clock 0x000100c9 Thumb Code 0 entry7b.o(.ARM.Collect$$$$00000008) + _main_cpp_init 0x000100c9 Thumb Code 0 entry8b.o(.ARM.Collect$$$$0000000A) + _main_init 0x000100c9 Thumb Code 0 entry9a.o(.ARM.Collect$$$$0000000B) + __rt_final_cpp 0x000100d1 Thumb Code 0 entry10a.o(.ARM.Collect$$$$0000000D) + __rt_final_exit 0x000100d1 Thumb Code 0 entry11a.o(.ARM.Collect$$$$0000000F) + Reset_Handler 0x000100d5 Thumb Code 28 startup_armcm0.o(.text) + NMI_Handler 0x000100f1 Thumb Code 2 startup_armcm0.o(.text) + SVC_Handler 0x000100f5 Thumb Code 2 startup_armcm0.o(.text) + PendSV_Handler 0x000100f7 Thumb Code 2 startup_armcm0.o(.text) + OTP_IRQn_Handler 0x00010123 Thumb Code 2 startup_armcm0.o(.text) + PVD_IRQn_Handler 0x00010127 Thumb Code 2 startup_armcm0.o(.text) + __aeabi_uidiv 0x0001014d Thumb Code 0 uidiv.o(.text) + __aeabi_uidivmod 0x0001014d Thumb Code 44 uidiv.o(.text) + __aeabi_idiv 0x00010179 Thumb Code 0 idiv.o(.text) + __aeabi_idivmod 0x00010179 Thumb Code 40 idiv.o(.text) + __aeabi_memcpy 0x000101a1 Thumb Code 36 memcpya.o(.text) + __aeabi_memcpy4 0x000101a1 Thumb Code 0 memcpya.o(.text) + __aeabi_memcpy8 0x000101a1 Thumb Code 0 memcpya.o(.text) + __aeabi_memset 0x000101c5 Thumb Code 14 memseta.o(.text) + __aeabi_memset4 0x000101c5 Thumb Code 0 memseta.o(.text) + __aeabi_memset8 0x000101c5 Thumb Code 0 memseta.o(.text) + __aeabi_memclr 0x000101d3 Thumb Code 4 memseta.o(.text) + __aeabi_memclr4 0x000101d3 Thumb Code 0 memseta.o(.text) + __aeabi_memclr8 0x000101d3 Thumb Code 0 memseta.o(.text) + _memset$wrapper 0x000101d7 Thumb Code 18 memseta.o(.text) + __aeabi_fadd 0x000101e9 Thumb Code 162 fadd.o(.text) + __aeabi_fsub 0x0001028b Thumb Code 8 fadd.o(.text) + __aeabi_frsub 0x00010293 Thumb Code 8 fadd.o(.text) + __aeabi_fmul 0x0001029b Thumb Code 122 fmul.o(.text) + __aeabi_fdiv 0x00010315 Thumb Code 124 fdiv.o(.text) + __ARM_scalbnf 0x00010391 Thumb Code 24 fscalb.o(.text) + scalbnf 0x00010391 Thumb Code 0 fscalb.o(.text) + __aeabi_dadd 0x000103a9 Thumb Code 328 dadd.o(.text) + __aeabi_dsub 0x000104f1 Thumb Code 12 dadd.o(.text) + __aeabi_drsub 0x000104fd Thumb Code 12 dadd.o(.text) + __aeabi_dmul 0x0001050d Thumb Code 202 dmul.o(.text) + __aeabi_ddiv 0x000105dd Thumb Code 234 ddiv.o(.text) + __aeabi_i2f 0x000106cd Thumb Code 22 fflti.o(.text) + __aeabi_ui2f 0x000106e3 Thumb Code 14 ffltui.o(.text) + __aeabi_ui2d 0x000106f1 Thumb Code 24 dfltui.o(.text) + __aeabi_f2iz 0x0001070d Thumb Code 50 ffixi.o(.text) + __aeabi_f2uiz 0x0001073f Thumb Code 40 ffixui.o(.text) + __aeabi_d2iz 0x00010769 Thumb Code 62 dfixi.o(.text) + __aeabi_d2uiz 0x000107b1 Thumb Code 50 dfixui.o(.text) + __aeabi_f2d 0x000107ed Thumb Code 40 f2d.o(.text) + __aeabi_cdcmpeq 0x00010815 Thumb Code 0 cdcmple.o(.text) + __aeabi_cdcmple 0x00010815 Thumb Code 38 cdcmple.o(.text) + __aeabi_cfcmpeq 0x0001083d Thumb Code 0 cfcmple.o(.text) + __aeabi_cfcmple 0x0001083d Thumb Code 20 cfcmple.o(.text) + __aeabi_cfrcmple 0x00010851 Thumb Code 20 cfrcmple.o(.text) + __aeabi_uldivmod 0x00010865 Thumb Code 96 uldiv.o(.text) + __aeabi_llsl 0x000108c5 Thumb Code 32 llshl.o(.text) + _ll_shift_l 0x000108c5 Thumb Code 0 llshl.o(.text) + __aeabi_llsr 0x000108e5 Thumb Code 34 llushr.o(.text) + _ll_ushift_r 0x000108e5 Thumb Code 0 llushr.o(.text) + __aeabi_lasr 0x00010907 Thumb Code 38 llsshr.o(.text) + _ll_sshift_r 0x00010907 Thumb Code 0 llsshr.o(.text) + __I$use$fp 0x0001092d Thumb Code 0 iusefp.o(.text) + _float_round 0x0001092d Thumb Code 16 fepilogue.o(.text) + _float_epilogue 0x0001093d Thumb Code 114 fepilogue.o(.text) + _double_round 0x000109af Thumb Code 26 depilogue.o(.text) + _double_epilogue 0x000109c9 Thumb Code 164 depilogue.o(.text) + _dsqrt 0x00010a6d Thumb Code 162 dsqrt.o(.text) + __aeabi_d2ulz 0x00010b11 Thumb Code 54 dfixul.o(.text) + __aeabi_cdrcmple 0x00010b51 Thumb Code 38 cdrcmple.o(.text) + __scatterload 0x00010b79 Thumb Code 28 init.o(.text) + __scatterload_rt2 0x00010b79 Thumb Code 0 init.o(.text) + __decompress 0x00010b9d Thumb Code 0 __dczerorl2.o(.text) + __decompress1 0x00010b9d Thumb Code 86 __dczerorl2.o(.text) + ADC_IRQn_Handler 0x00010bf5 Thumb Code 18 irq_redirect .o(i.ADC_IRQn_Handler) + AP_NRESET_IRQn_Handler 0x00010c0d Thumb Code 18 irq_redirect .o(i.AP_NRESET_IRQn_Handler) + CRC16_2 0x00010c25 Thumb Code 54 app_tp_st_touch.o(i.CRC16_2) + DMA_IRQn_Handler 0x00010c65 Thumb Code 14 irq_redirect .o(i.DMA_IRQn_Handler) + EXTI_INT0_IRQn_Handler 0x00010c79 Thumb Code 22 irq_redirect .o(i.EXTI_INT0_IRQn_Handler) + EXTI_INT1_IRQn_Handler 0x00010c95 Thumb Code 22 irq_redirect .o(i.EXTI_INT1_IRQn_Handler) + EXTI_INT2_IRQn_Handler 0x00010cb1 Thumb Code 22 irq_redirect .o(i.EXTI_INT2_IRQn_Handler) + EXTI_INT3_IRQn_Handler 0x00010ccd Thumb Code 22 irq_redirect .o(i.EXTI_INT3_IRQn_Handler) + EXTI_INT4_IRQn_Handler 0x00010ce9 Thumb Code 22 irq_redirect .o(i.EXTI_INT4_IRQn_Handler) + EXTI_INT5_IRQn_Handler 0x00010d05 Thumb Code 22 irq_redirect .o(i.EXTI_INT5_IRQn_Handler) + EXTI_INT6_IRQn_Handler 0x00010d21 Thumb Code 22 irq_redirect .o(i.EXTI_INT6_IRQn_Handler) + EXTI_INT7_IRQn_Handler 0x00010d3d Thumb Code 22 irq_redirect .o(i.EXTI_INT7_IRQn_Handler) + FLSCTRL_IRQn_Handler 0x00010d59 Thumb Code 14 irq_redirect .o(i.FLSCTRL_IRQn_Handler) + Gpio_swire_output 0x00010d6d Thumb Code 78 ap_demo.o(i.Gpio_swire_output) + HardFault_Handler 0x00010dbd Thumb Code 14 irq_redirect .o(i.HardFault_Handler) + I2C0_IRQn_Handler 0x00010dd1 Thumb Code 18 irq_redirect .o(i.I2C0_IRQn_Handler) + I2C1_IRQn_Handler 0x00010de9 Thumb Code 18 irq_redirect .o(i.I2C1_IRQn_Handler) + LCDC_IRQn_Handler 0x00010e01 Thumb Code 18 irq_redirect .o(i.LCDC_IRQn_Handler) + LOG_printf 0x00010e19 Thumb Code 30 tau_log.o(i.LOG_printf) + MEMC_IRQn_Handler 0x00010e41 Thumb Code 18 irq_redirect .o(i.MEMC_IRQn_Handler) + MIPI_RX_IRQn_Handler 0x00010e59 Thumb Code 18 irq_redirect .o(i.MIPI_RX_IRQn_Handler) + MIPI_TX_IRQn_Handler 0x00010e71 Thumb Code 18 irq_redirect .o(i.MIPI_TX_IRQn_Handler) + PWMDET_IRQn_Handler 0x00010e89 Thumb Code 22 irq_redirect .o(i.PWMDET_IRQn_Handler) + SPIM_IRQn_Handler 0x00010ea5 Thumb Code 22 irq_redirect .o(i.SPIM_IRQn_Handler) + SPIS_IRQn_Handler 0x00010ec1 Thumb Code 22 irq_redirect .o(i.SPIS_IRQn_Handler) + SWIRE_IRQn_Handler 0x00010edd Thumb Code 22 irq_redirect .o(i.SWIRE_IRQn_Handler) + SysTick_Handler 0x00010ef9 Thumb Code 18 irq_redirect .o(i.SysTick_Handler) + TIMER0_IRQn_Handler 0x00010f11 Thumb Code 18 irq_redirect .o(i.TIMER0_IRQn_Handler) + TIMER1_IRQn_Handler 0x00010f29 Thumb Code 18 irq_redirect .o(i.TIMER1_IRQn_Handler) + TIMER2_IRQn_Handler 0x00010f41 Thumb Code 18 irq_redirect .o(i.TIMER2_IRQn_Handler) + TIMER3_IRQn_Handler 0x00010f59 Thumb Code 18 irq_redirect .o(i.TIMER3_IRQn_Handler) + UART0_IRQ_Handle 0x00010f71 Thumb Code 20 drv_uart.o(i.UART0_IRQ_Handle) + UART_DisableDma 0x00010f8d Thumb Code 2 drv_uart.o(i.UART_DisableDma) + UART_GetInstance 0x00010f8f Thumb Code 4 drv_uart.o(i.UART_GetInstance) + UART_IRQn_Handler 0x00010f95 Thumb Code 18 irq_redirect .o(i.UART_IRQn_Handler) + UART_ResetRxFIFO 0x00010fad Thumb Code 32 drv_uart.o(i.UART_ResetRxFIFO) + UART_SwitchSCLK 0x00010fd1 Thumb Code 26 drv_uart.o(i.UART_SwitchSCLK) + __scatterload_copy 0x00010feb Thumb Code 14 handlers.o(i.__scatterload_copy) + __scatterload_null 0x00010ff9 Thumb Code 2 handlers.o(i.__scatterload_null) + app_tp_screen_analysis_const 0x00010ffb Thumb Code 6 app_tp_for_custom_s21u.o(i.app_tp_screen_analysis_const) + s_RAM_CK 0x00011000 Data 20 drv_common.o(.ARM.__at_0x11000) + drv_dsi_rx_set_inten 0x00011015 Thumb Code 4 drv_dsi_rx.o(i.drv_dsi_rx_set_inten) + s_debug_state 0x00011018 Data 4 drv_common.o(.ARM.__at_0x11018) + UART_SetBaudRate 0x0001101d Thumb Code 72 drv_uart.o(i.UART_SetBaudRate) + UART_TransferHandleIRQ 0x00011065 Thumb Code 308 drv_uart.o(i.UART_TransferHandleIRQ) + UART_WriteBlocking 0x00011199 Thumb Code 26 drv_uart.o(i.UART_WriteBlocking) + UART_init 0x000111b5 Thumb Code 182 drv_uart.o(i.UART_init) + VIDC_IRQn_Handler 0x00011271 Thumb Code 18 irq_redirect .o(i.VIDC_IRQn_Handler) + VPRE_IRQn_Handler 0x00011289 Thumb Code 18 irq_redirect .o(i.VPRE_IRQn_Handler) + WDG_IRQn_Handler 0x000112a1 Thumb Code 18 irq_redirect .o(i.WDG_IRQn_Handler) + __0printf 0x000112b9 Thumb Code 24 printfa.o(i.__0printf) + __1printf 0x000112b9 Thumb Code 0 printfa.o(i.__0printf) + __2printf 0x000112b9 Thumb Code 0 printfa.o(i.__0printf) + __c89printf 0x000112b9 Thumb Code 0 printfa.o(i.__0printf) + printf 0x000112b9 Thumb Code 0 printfa.o(i.__0printf) + __0vsprintf 0x000112d9 Thumb Code 30 printfa.o(i.__0vsprintf) + __1vsprintf 0x000112d9 Thumb Code 0 printfa.o(i.__0vsprintf) + __2vsprintf 0x000112d9 Thumb Code 0 printfa.o(i.__0vsprintf) + __c89vsprintf 0x000112d9 Thumb Code 0 printfa.o(i.__0vsprintf) + vsprintf 0x000112d9 Thumb Code 0 printfa.o(i.__0vsprintf) + __ARM_clz 0x000112fd Thumb Code 46 depilogue.o(i.__ARM_clz) + __ARM_common_switch8 0x0001132b Thumb Code 26 hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) + __scatterload_zeroinit 0x000113f1 Thumb Code 14 handlers.o(i.__scatterload_zeroinit) + __set_errno 0x00011401 Thumb Code 6 errno.o(i.__set_errno) + ap_demo 0x00012961 Thumb Code 360 ap_demo.o(i.ap_demo) + ap_get_tp_calibration_status_01 0x00012bc9 Thumb Code 28 app_tp_st_touch.o(i.ap_get_tp_calibration_status_01) + ap_set_tp_calibration_04 0x00012de5 Thumb Code 138 app_tp_st_touch.o(i.ap_set_tp_calibration_04) + ap_tp_st_touch_calibration 0x00012e7d Thumb Code 170 app_tp_st_touch.o(i.ap_tp_st_touch_calibration) + ap_tp_st_touch_get_calibration_success_mark 0x00012f2d Thumb Code 150 app_tp_st_touch.o(i.ap_tp_st_touch_get_calibration_success_mark) + ap_tp_st_touch_hardware_reset 0x00012fd5 Thumb Code 138 app_tp_st_touch.o(i.ap_tp_st_touch_hardware_reset) + ap_tp_st_touch_scan_point_init 0x00013099 Thumb Code 24 app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_init) + ap_tp_st_touch_scan_point_record_event_exec 0x000130b5 Thumb Code 50 app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_record_event_exec) + ap_tp_st_touch_simulate_finger_release_event 0x00013105 Thumb Code 44 app_tp_st_touch.o(i.ap_tp_st_touch_simulate_finger_release_event) + app_ADC_IRQn_Handler 0x00013165 Thumb Code 22 drv_rxbr.o(i.app_ADC_IRQn_Handler) + app_AP_NRESET_IRQn_Handler 0x00013181 Thumb Code 32 drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) + app_EXTI_INT0_IRQn_Handler 0x000131a5 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) + app_EXTI_INT1_IRQn_Handler 0x000131c1 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) + app_EXTI_INT2_IRQn_Handler 0x000131dd Thumb Code 22 drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) + app_EXTI_INT3_IRQn_Handler 0x000131f9 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) + app_EXTI_INT4_IRQn_Handler 0x00013215 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) + app_EXTI_INT5_IRQn_Handler 0x00013231 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) + app_EXTI_INT6_IRQn_Handler 0x0001324d Thumb Code 22 drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) + app_EXTI_INT7_IRQn_Handler 0x00013269 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) + app_HardFault_Handler 0x00013285 Thumb Code 12 drv_common.o(i.app_HardFault_Handler) + app_I2C0_IRQn_Handler 0x000132cd Thumb Code 14 drv_i2c_slave.o(i.app_I2C0_IRQn_Handler) + app_I2C1_IRQn_Handler 0x000132e5 Thumb Code 8 drv_i2c_master.o(i.app_I2C1_IRQn_Handler) + app_LCDC_IRQn_Handler 0x000132f5 Thumb Code 146 hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) + app_MEMC_IRQn_Handler 0x00013425 Thumb Code 132 drv_memc.o(i.app_MEMC_IRQn_Handler) + app_MIPI_RX_IRQn_Handler 0x000134ad Thumb Code 232 drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) + app_MIPI_TX_IRQn_Handler 0x00013745 Thumb Code 56 drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) + app_PWMDET_IRQn_Handler 0x000137e5 Thumb Code 62 drv_pwm.o(i.app_PWMDET_IRQn_Handler) + app_SPIM_IRQn_Handler 0x0001382d Thumb Code 34 drv_spi_master.o(i.app_SPIM_IRQn_Handler) + app_SPIS_IRQn_Handler 0x0001385d Thumb Code 500 hal_spi_slave.o(i.app_SPIS_IRQn_Handler) + app_SWIRE_IRQn_Handler 0x00013a5d Thumb Code 28 drv_swire.o(i.app_SWIRE_IRQn_Handler) + app_SysTick_Handler 0x00013a7d Thumb Code 20 drv_common.o(i.app_SysTick_Handler) + app_TIMER0_IRQn_Handler 0x00013a95 Thumb Code 10 drv_timer.o(i.app_TIMER0_IRQn_Handler) + app_TIMER1_IRQn_Handler 0x00013a9f Thumb Code 10 drv_timer.o(i.app_TIMER1_IRQn_Handler) + app_TIMER2_IRQn_Handler 0x00013aa9 Thumb Code 10 drv_timer.o(i.app_TIMER2_IRQn_Handler) + app_TIMER3_IRQn_Handler 0x00013ab3 Thumb Code 10 drv_timer.o(i.app_TIMER3_IRQn_Handler) + app_UART_IRQn_Handler 0x00013abd Thumb Code 8 drv_uart.o(i.app_UART_IRQn_Handler) + app_VIDC_IRQn_Handler 0x00013ac5 Thumb Code 22 drv_vidc.o(i.app_VIDC_IRQn_Handler) + app_VPRE_IRQn_Handler 0x00013ae1 Thumb Code 22 drv_rxbr.o(i.app_VPRE_IRQn_Handler) + app_WDG_IRQn_Handler 0x00013afd Thumb Code 52 drv_wdg.o(i.app_WDG_IRQn_Handler) + app_dma_irq_handler 0x00013b35 Thumb Code 10 drv_dma.o(i.app_dma_irq_handler) + app_fls_ctrl_Handler 0x00013b45 Thumb Code 38 norflash.o(i.app_fls_ctrl_Handler) + app_tp_I2C_init 0x00013b75 Thumb Code 26 app_tp_transfer.o(i.app_tp_I2C_init) + app_tp_calibration_exec 0x00013b99 Thumb Code 78 app_tp_st_touch.o(i.app_tp_calibration_exec) + app_tp_init 0x00013c89 Thumb Code 68 app_tp_transfer.o(i.app_tp_init) + app_tp_m_read 0x00013cdd Thumb Code 32 app_tp_transfer.o(i.app_tp_m_read) + app_tp_m_write 0x00013cfd Thumb Code 8 app_tp_transfer.o(i.app_tp_m_write) + app_tp_phone_analysis_data 0x00013d05 Thumb Code 942 app_tp_for_custom_s21u.o(i.app_tp_phone_analysis_data) + app_tp_s_read 0x000140c1 Thumb Code 8 app_tp_transfer.o(i.app_tp_s_read) + app_tp_s_write 0x000140c9 Thumb Code 8 app_tp_transfer.o(i.app_tp_s_write) + app_tp_screen_analysis_int 0x000140d1 Thumb Code 460 app_tp_for_custom_s21u.o(i.app_tp_screen_analysis_int) + app_tp_screen_analysis_wake_up 0x000142c1 Thumb Code 150 app_tp_for_custom_s21u.o(i.app_tp_screen_analysis_wake_up) + app_tp_screen_analysis_wake_up_exec 0x00014361 Thumb Code 176 app_tp_for_custom_s21u.o(i.app_tp_screen_analysis_wake_up_exec) + app_tp_screen_init 0x00014455 Thumb Code 50 app_tp_transfer.o(i.app_tp_screen_init) + app_tp_transfer_screen_int 0x00014555 Thumb Code 122 app_tp_transfer.o(i.app_tp_transfer_screen_int) + app_tp_transfer_screen_restart 0x000145e1 Thumb Code 38 app_tp_transfer.o(i.app_tp_transfer_screen_restart) + app_tp_transfer_screen_start 0x00014615 Thumb Code 8 app_tp_transfer.o(i.app_tp_transfer_screen_start) + app_tp_transfer_screen_start_init 0x0001461d Thumb Code 16 app_tp_transfer.o(i.app_tp_transfer_screen_start_init) + board_Init 0x00014631 Thumb Code 30 board.o(i.board_Init) + calc_framebuffer_setting 0x00014655 Thumb Code 1416 hal_internal_vsync.o(i.calc_framebuffer_setting) + ceil 0x00014be1 Thumb Code 180 ceil.o(i.ceil) + dcs_packet_fifo_alloc 0x00014d59 Thumb Code 80 dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) + dcs_packet_fifo_init 0x00014db1 Thumb Code 18 dcs_packet_fifo.o(i.dcs_packet_fifo_init) + dcs_packet_free_fifo_header 0x00014dc9 Thumb Code 60 dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) + dcs_packet_get_fifo_header 0x00014e0d Thumb Code 26 dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) + delayMs 0x00014e5d Thumb Code 24 tau_delay.o(i.delayMs) + delayUs 0x00014e75 Thumb Code 34 tau_delay.o(i.delayUs) + drv_ap_rst_trig_edge_detect 0x00014e99 Thumb Code 46 drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) + drv_chip_info_get_info 0x00014ed1 Thumb Code 6 drv_chip_info.o(i.drv_chip_info_get_info) + drv_chip_info_init 0x00014edd Thumb Code 56 drv_chip_info.o(i.drv_chip_info_init) + drv_chip_rx_info_check 0x00014f1d Thumb Code 98 drv_chip_info.o(i.drv_chip_rx_info_check) + drv_chip_rx_init_done 0x00014fcd Thumb Code 16 drv_chip_info.o(i.drv_chip_rx_init_done) + drv_common_enable_systick 0x00014fe1 Thumb Code 70 drv_common.o(i.drv_common_enable_systick) + drv_common_get_tick 0x00015039 Thumb Code 6 drv_common.o(i.drv_common_get_tick) + drv_common_system_init 0x00015045 Thumb Code 8 drv_common.o(i.drv_common_system_init) + drv_crgu_config_reset_modules 0x0001504d Thumb Code 10 drv_crgu.o(i.drv_crgu_config_reset_modules) + drv_crgu_set_ahb_pre_div 0x0001505d Thumb Code 14 drv_crgu.o(i.drv_crgu_set_ahb_pre_div) + drv_crgu_set_ahb_src 0x00015071 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_ahb_src) + drv_crgu_set_clock 0x00015085 Thumb Code 26 drv_crgu.o(i.drv_crgu_set_clock) + drv_crgu_set_dpi_mux_src 0x000150a5 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dpi_mux_src) + drv_crgu_set_dpi_pre_div 0x000150b9 Thumb Code 18 drv_crgu.o(i.drv_crgu_set_dpi_pre_div) + drv_crgu_set_dpi_pre_src 0x000150d1 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dpi_pre_src) + drv_crgu_set_dsc_core_div 0x000150e5 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dsc_core_div) + drv_crgu_set_dsco_src 0x000150f9 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dsco_src) + drv_crgu_set_dsco_src_div 0x0001510d Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dsco_src_div) + drv_crgu_set_fb_div 0x00015121 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_fb_div) + drv_crgu_set_fb_src 0x00015135 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_fb_src) + drv_crgu_set_lcdc_div 0x00015149 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_lcdc_div) + drv_crgu_set_lcdc_src 0x0001515d Thumb Code 16 drv_crgu.o(i.drv_crgu_set_lcdc_src) + drv_crgu_set_mipi_cfg_src 0x00015171 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_mipi_cfg_src) + drv_crgu_set_mipi_ref_src 0x00015185 Thumb Code 18 drv_crgu.o(i.drv_crgu_set_mipi_ref_src) + drv_crgu_set_reset 0x0001519d Thumb Code 20 drv_crgu.o(i.drv_crgu_set_reset) + drv_crgu_set_rxbr_div 0x000151b5 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_rxbr_div) + drv_crgu_set_rxbr_src 0x000151c9 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_rxbr_src) + drv_crgu_set_swire_div 0x000151dd Thumb Code 16 drv_crgu.o(i.drv_crgu_set_swire_div) + drv_crgu_set_vidc_src 0x000151f1 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_vidc_src) + drv_dma_clear_flag 0x00015205 Thumb Code 24 drv_dma.o(i.drv_dma_clear_flag) + drv_dma_create_handle 0x0001521d Thumb Code 22 drv_dma.o(i.drv_dma_create_handle) + drv_dma_disenable_channel 0x00015239 Thumb Code 16 drv_dma.o(i.drv_dma_disenable_channel) + drv_dma_enable_channel 0x00015249 Thumb Code 16 drv_dma.o(i.drv_dma_enable_channel) + drv_dma_enable_channel_interrupts 0x00015259 Thumb Code 32 drv_dma.o(i.drv_dma_enable_channel_interrupts) + drv_dma_get_channel_flag 0x0001527d Thumb Code 12 drv_dma.o(i.drv_dma_get_channel_flag) + drv_dma_irq_handler 0x00015289 Thumb Code 138 drv_dma.o(i.drv_dma_irq_handler) + drv_dma_prepar_transfer 0x00015319 Thumb Code 18 drv_dma.o(i.drv_dma_prepar_transfer) + drv_dma_set_burst 0x0001532b Thumb Code 26 drv_dma.o(i.drv_dma_set_burst) + drv_dma_set_callback 0x00015345 Thumb Code 6 drv_dma.o(i.drv_dma_set_callback) + drv_dma_set_transfer 0x0001534d Thumb Code 62 drv_dma.o(i.drv_dma_set_transfer) + drv_dsc_dec_convert_pps_rc_parameter 0x00015391 Thumb Code 54 drv_dsc_dec.o(i.drv_dsc_dec_convert_pps_rc_parameter) + drv_dsc_dec_disable 0x000153c7 Thumb Code 12 drv_dsc_dec.o(i.drv_dsc_dec_disable) + drv_dsc_dec_enable 0x000153d5 Thumb Code 88 drv_dsc_dec.o(i.drv_dsc_dec_enable) + drv_dsc_dec_get_nslc 0x00015449 Thumb Code 10 drv_dsc_dec.o(i.drv_dsc_dec_get_nslc) + drv_dsc_dec_set_u8_pps 0x00015453 Thumb Code 40 drv_dsc_dec.o(i.drv_dsc_dec_set_u8_pps) + drv_dsi_rx_calc_ipi_tx_delay 0x0001547d Thumb Code 244 drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) + drv_dsi_rx_enable_irq 0x00015581 Thumb Code 58 drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) + drv_dsi_rx_get_bta_status 0x000155c1 Thumb Code 14 drv_dsi_rx.o(i.drv_dsi_rx_get_bta_status) + drv_dsi_rx_get_compression_en 0x0001563d Thumb Code 8 drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) + drv_dsi_rx_get_max_ret_size 0x00015645 Thumb Code 6 drv_dsi_rx.o(i.drv_dsi_rx_get_max_ret_size) + drv_dsi_rx_power_up 0x0001564b Thumb Code 14 drv_dsi_rx.o(i.drv_dsi_rx_power_up) + drv_dsi_rx_set_ctrl_cfg 0x00015659 Thumb Code 32 drv_dsi_rx.o(i.drv_dsi_rx_set_ctrl_cfg) + drv_dsi_rx_set_ddi_cfg 0x00015679 Thumb Code 16 drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) + drv_dsi_rx_set_ipi_cfg 0x00015689 Thumb Code 16 drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_cfg) + drv_dsi_rx_set_lane_swap 0x00015699 Thumb Code 70 drv_dsi_rx.o(i.drv_dsi_rx_set_lane_swap) + drv_dsi_rx_set_resp_cnt 0x000156df Thumb Code 38 drv_dsi_rx.o(i.drv_dsi_rx_set_resp_cnt) + drv_dsi_rx_set_up_phy 0x00015705 Thumb Code 256 drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) + drv_dsi_rx_shut_down 0x00015809 Thumb Code 14 drv_dsi_rx.o(i.drv_dsi_rx_shut_down) + drv_dsi_tx_command_header 0x00015817 Thumb Code 20 drv_dsi_tx.o(i.drv_dsi_tx_command_header) + drv_dsi_tx_command_mode_cfg 0x0001582b Thumb Code 108 drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) + drv_dsi_tx_command_put_payload 0x00015897 Thumb Code 4 drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) + drv_dsi_tx_config_eotp 0x0001589b Thumb Code 24 drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) + drv_dsi_tx_config_int 0x000158b3 Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_config_int) + drv_dsi_tx_dpi_lpcmd_time 0x000158bb Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_dpi_lpcmd_time) + drv_dsi_tx_dpi_mode 0x000158c3 Thumb Code 10 drv_dsi_tx.o(i.drv_dsi_tx_dpi_mode) + drv_dsi_tx_dpi_polarity 0x000158cd Thumb Code 36 drv_dsi_tx.o(i.drv_dsi_tx_dpi_polarity) + drv_dsi_tx_edpi_cmd_size 0x000158f1 Thumb Code 4 drv_dsi_tx.o(i.drv_dsi_tx_edpi_cmd_size) + drv_dsi_tx_get_cmd_status 0x000158f5 Thumb Code 4 drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) + drv_dsi_tx_mode 0x000158f9 Thumb Code 4 drv_dsi_tx.o(i.drv_dsi_tx_mode) + drv_dsi_tx_phy_clock_lane_auto_lp 0x000158fd Thumb Code 24 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_auto_lp) + drv_dsi_tx_phy_clock_lane_req_hs 0x00015915 Thumb Code 26 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) + drv_dsi_tx_phy_lane_mode 0x0001592f Thumb Code 12 drv_dsi_tx.o(i.drv_dsi_tx_phy_lane_mode) + drv_dsi_tx_phy_status_ready 0x0001593b Thumb Code 100 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ready) + drv_dsi_tx_phy_status_stopstate 0x0001599f Thumb Code 62 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) + drv_dsi_tx_phy_test_setup 0x000159dd Thumb Code 308 drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) + drv_dsi_tx_phy_time_cfg 0x00015b11 Thumb Code 30 drv_dsi_tx.o(i.drv_dsi_tx_phy_time_cfg) + drv_dsi_tx_powerup 0x00015b2f Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_powerup) + drv_dsi_tx_response_mode 0x00015b37 Thumb Code 28 drv_dsi_tx.o(i.drv_dsi_tx_response_mode) + drv_dsi_tx_set_bta_ack 0x00015b53 Thumb Code 24 drv_dsi_tx.o(i.drv_dsi_tx_set_bta_ack) + drv_dsi_tx_set_esc_div 0x00015b6b Thumb Code 12 drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) + drv_dsi_tx_set_int 0x00015b79 Thumb Code 58 drv_dsi_tx.o(i.drv_dsi_tx_set_int) + drv_dsi_tx_set_time_out_div 0x00015bb9 Thumb Code 16 drv_dsi_tx.o(i.drv_dsi_tx_set_time_out_div) + drv_dsi_tx_set_video_chunk 0x00015bc9 Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_set_video_chunk) + drv_dsi_tx_set_video_timing 0x00015bd1 Thumb Code 34 drv_dsi_tx.o(i.drv_dsi_tx_set_video_timing) + drv_dsi_tx_shutdown 0x00015bf3 Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_shutdown) + drv_dsi_tx_timeout_cfg 0x00015bfb Thumb Code 38 drv_dsi_tx.o(i.drv_dsi_tx_timeout_cfg) + drv_dsi_tx_video_mode_cfg 0x00015c21 Thumb Code 170 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_cfg) + drv_dsi_tx_video_mode_disable_hact_cmd 0x00015ccb Thumb Code 22 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_disable_hact_cmd) + drv_dsi_tx_video_mode_set_lp_cmd 0x00015ce1 Thumb Code 24 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_set_lp_cmd) + drv_efuse_enter_inactive 0x00015cf9 Thumb Code 46 drv_efuse.o(i.drv_efuse_enter_inactive) + drv_efuse_int_enable 0x00015d27 Thumb Code 12 drv_efuse.o(i.drv_efuse_int_enable) + drv_efuse_read 0x00015d33 Thumb Code 50 drv_efuse.o(i.drv_efuse_read) + drv_efuse_read_req 0x00015d65 Thumb Code 24 drv_efuse.o(i.drv_efuse_read_req) + drv_gpio_get_input_data 0x00015d7d Thumb Code 20 drv_gpio.o(i.drv_gpio_get_input_data) + drv_gpio_register_ap_reset_callback 0x00015d95 Thumb Code 6 drv_gpio.o(i.drv_gpio_register_ap_reset_callback) + drv_gpio_register_callback 0x00015da1 Thumb Code 14 drv_gpio.o(i.drv_gpio_register_callback) + drv_gpio_set_int 0x00015db5 Thumb Code 74 drv_gpio.o(i.drv_gpio_set_int) + drv_gpio_set_ioe 0x00015e05 Thumb Code 26 drv_gpio.o(i.drv_gpio_set_ioe) + drv_gpio_set_mode0 0x00015e25 Thumb Code 12 drv_gpio.o(i.drv_gpio_set_mode0) + drv_gpio_set_mode1 0x00015e35 Thumb Code 12 drv_gpio.o(i.drv_gpio_set_mode1) + drv_gpio_set_mode2 0x00015e45 Thumb Code 12 drv_gpio.o(i.drv_gpio_set_mode2) + drv_gpio_set_mode3 0x00015e55 Thumb Code 12 drv_gpio.o(i.drv_gpio_set_mode3) + drv_gpio_set_pull_state 0x00015e85 Thumb Code 298 drv_gpio.o(i.drv_gpio_set_pull_state) + drv_i2c0_set_callback 0x00015fb5 Thumb Code 6 drv_i2c_slave.o(i.drv_i2c0_set_callback) + drv_i2c1_set_callback 0x00015fc1 Thumb Code 6 drv_i2c_master.o(i.drv_i2c1_set_callback) + drv_i2c_dma_init 0x00016001 Thumb Code 146 drv_i2c_dma.o(i.drv_i2c_dma_init) + drv_i2c_enable_rx_dma 0x000160ad Thumb Code 26 drv_i2c_dma.o(i.drv_i2c_enable_rx_dma) + drv_i2c_enable_tx_dma 0x000160c7 Thumb Code 24 drv_i2c_dma.o(i.drv_i2c_enable_tx_dma) + drv_i2c_m_clear_it_pending_bit 0x000160e1 Thumb Code 86 drv_i2c_master.o(i.drv_i2c_m_clear_it_pending_bit) + drv_i2c_m_enable 0x00016141 Thumb Code 10 drv_i2c_master.o(i.drv_i2c_m_enable) + drv_i2c_m_enable_intr 0x00016151 Thumb Code 42 drv_i2c_master.o(i.drv_i2c_m_enable_intr) + drv_i2c_master_init 0x00016189 Thumb Code 118 drv_i2c_master.o(i.drv_i2c_master_init) + drv_i2c_master_read_dma 0x00016215 Thumb Code 82 drv_i2c_dma.o(i.drv_i2c_master_read_dma) + drv_i2c_master_write_dma 0x00016271 Thumb Code 50 drv_i2c_dma.o(i.drv_i2c_master_write_dma) + drv_i2c_s_clear_it_pending_bit 0x000162eb Thumb Code 66 drv_i2c_slave.o(i.drv_i2c_s_clear_it_pending_bit) + drv_i2c_s_config_intr 0x0001632d Thumb Code 4 drv_i2c_slave.o(i.drv_i2c_s_config_intr) + drv_i2c_s_enable 0x00016331 Thumb Code 8 drv_i2c_slave.o(i.drv_i2c_s_enable) + drv_i2c_s_get_fifo_status 0x00016339 Thumb Code 20 drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) + drv_i2c_s_set_intr 0x0001634d Thumb Code 74 drv_i2c_slave.o(i.drv_i2c_s_set_intr) + drv_i2c_s_write_data 0x0001639d Thumb Code 28 drv_i2c_slave.o(i.drv_i2c_s_write_data) + drv_i2c_set_dma_irq_callback 0x000163b9 Thumb Code 68 drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) + drv_i2c_slave_init 0x00016411 Thumb Code 50 drv_i2c_slave.o(i.drv_i2c_slave_init) + drv_i2c_slave_write_dma 0x00016445 Thumb Code 20 drv_i2c_dma.o(i.drv_i2c_slave_write_dma) + drv_lcdc_config_bypass 0x0001645d Thumb Code 24 drv_lcdc.o(i.drv_lcdc_config_bypass) + drv_lcdc_config_ccm 0x00016475 Thumb Code 48 drv_lcdc.o(i.drv_lcdc_config_ccm) + drv_lcdc_config_disp_mode 0x000164a5 Thumb Code 22 drv_lcdc.o(i.drv_lcdc_config_disp_mode) + drv_lcdc_config_dpi_polarity 0x000164bb Thumb Code 36 drv_lcdc.o(i.drv_lcdc_config_dpi_polarity) + drv_lcdc_config_dpi_timing 0x000164df Thumb Code 38 drv_lcdc.o(i.drv_lcdc_config_dpi_timing) + drv_lcdc_config_edpi_mode 0x00016505 Thumb Code 22 drv_lcdc.o(i.drv_lcdc_config_edpi_mode) + drv_lcdc_config_endianness 0x0001651b Thumb Code 22 drv_lcdc.o(i.drv_lcdc_config_endianness) + drv_lcdc_config_input_size 0x00016531 Thumb Code 12 drv_lcdc.o(i.drv_lcdc_config_input_size) + drv_lcdc_config_int 0x0001653d Thumb Code 30 drv_lcdc.o(i.drv_lcdc_config_int) + drv_lcdc_config_int_single 0x0001655b Thumb Code 34 drv_lcdc.o(i.drv_lcdc_config_int_single) + drv_lcdc_config_overwrite 0x0001657d Thumb Code 34 drv_lcdc.o(i.drv_lcdc_config_overwrite) + drv_lcdc_config_overwrite_rgb 0x0001659f Thumb Code 12 drv_lcdc.o(i.drv_lcdc_config_overwrite_rgb) + drv_lcdc_config_partial_display_area 0x000165ab Thumb Code 26 drv_lcdc.o(i.drv_lcdc_config_partial_display_area) + drv_lcdc_config_partial_display_enable 0x000165c5 Thumb Code 34 drv_lcdc.o(i.drv_lcdc_config_partial_display_enable) + drv_lcdc_config_scale_up_coef 0x000165e7 Thumb Code 26 drv_lcdc.o(i.drv_lcdc_config_scale_up_coef) + drv_lcdc_config_scale_up_step 0x00016601 Thumb Code 12 drv_lcdc.o(i.drv_lcdc_config_scale_up_step) + drv_lcdc_config_src_parameter 0x0001660d Thumb Code 76 drv_lcdc.o(i.drv_lcdc_config_src_parameter) + drv_lcdc_config_thresh 0x00016659 Thumb Code 6 drv_lcdc.o(i.drv_lcdc_config_thresh) + drv_lcdc_ctrl_flow 0x0001665f Thumb Code 18 drv_lcdc.o(i.drv_lcdc_ctrl_flow) + drv_lcdc_enable_shadow_reg 0x00016671 Thumb Code 32 drv_lcdc.o(i.drv_lcdc_enable_shadow_reg) + drv_lcdc_set_int 0x00016691 Thumb Code 58 drv_lcdc.o(i.drv_lcdc_set_int) + drv_lcdc_set_prefetch 0x000166d1 Thumb Code 24 drv_lcdc.o(i.drv_lcdc_set_prefetch) + drv_lcdc_set_video_hw_mode 0x000166e9 Thumb Code 20 drv_lcdc.o(i.drv_lcdc_set_video_hw_mode) + drv_lcdc_start 0x000166fd Thumb Code 32 drv_lcdc.o(i.drv_lcdc_start) + drv_memc_clear_status 0x0001671d Thumb Code 12 drv_memc.o(i.drv_memc_clear_status) + drv_memc_enable_irq 0x00016729 Thumb Code 58 drv_memc.o(i.drv_memc_enable_irq) + drv_memc_gen_a_tear_signal 0x00016769 Thumb Code 12 drv_memc.o(i.drv_memc_gen_a_tear_signal) + drv_memc_get_status 0x00016775 Thumb Code 18 drv_memc.o(i.drv_memc_get_status) + drv_memc_rate_transfer_sel 0x00016787 Thumb Code 16 drv_memc.o(i.drv_memc_rate_transfer_sel) + drv_memc_sel_vsync 0x00016797 Thumb Code 14 drv_memc.o(i.drv_memc_sel_vsync) + drv_memc_set_active_height 0x000167a5 Thumb Code 14 drv_memc.o(i.drv_memc_set_active_height) + drv_memc_set_data_mode 0x000167b9 Thumb Code 12 drv_memc.o(i.drv_memc_set_data_mode) + drv_memc_set_double_buffer 0x000167c5 Thumb Code 16 drv_memc.o(i.drv_memc_set_double_buffer) + drv_memc_set_double_buffer_reverse 0x000167d5 Thumb Code 18 drv_memc.o(i.drv_memc_set_double_buffer_reverse) + drv_memc_set_fs_en_conditions 0x000167e7 Thumb Code 16 drv_memc.o(i.drv_memc_set_fs_en_conditions) + drv_memc_set_inten 0x000167f7 Thumb Code 20 drv_memc.o(i.drv_memc_set_inten) + drv_memc_set_lcdc_st_conditions 0x0001680d Thumb Code 18 drv_memc.o(i.drv_memc_set_lcdc_st_conditions) + drv_memc_set_ltpo_mode 0x00016825 Thumb Code 26 drv_memc.o(i.drv_memc_set_ltpo_mode) + drv_memc_set_tear_mode 0x0001683f Thumb Code 14 drv_memc.o(i.drv_memc_set_tear_mode) + drv_memc_set_tear_waveform 0x0001684d Thumb Code 34 drv_memc.o(i.drv_memc_set_tear_waveform) + drv_memc_set_vidc_sync_cnt 0x00016875 Thumb Code 14 drv_memc.o(i.drv_memc_set_vidc_sync_cnt) + drv_param_init_get_ccm 0x00016885 Thumb Code 4 drv_param_init.o(i.drv_param_init_get_ccm) + drv_param_init_get_scld_filter_h 0x0001688d Thumb Code 12 drv_param_init.o(i.drv_param_init_get_scld_filter_h) + drv_param_init_get_scld_filter_v 0x000168a1 Thumb Code 12 drv_param_init.o(i.drv_param_init_get_scld_filter_v) + drv_param_init_get_sclu_filter 0x000168b5 Thumb Code 4 drv_param_init.o(i.drv_param_init_get_sclu_filter) + drv_param_init_set_ccm 0x000168bd Thumb Code 14 drv_param_init.o(i.drv_param_init_set_ccm) + drv_param_init_set_scld_filter 0x000168d1 Thumb Code 92 drv_param_init.o(i.drv_param_init_set_scld_filter) + drv_param_p2r_filter_init 0x00016935 Thumb Code 30 drv_param_init.o(i.drv_param_p2r_filter_init) + drv_phy_enable_calibration 0x00016959 Thumb Code 12 drv_phy_common.o(i.drv_phy_enable_calibration) + drv_phy_get_calibration 0x00016969 Thumb Code 50 drv_phy_common.o(i.drv_phy_get_calibration) + drv_phy_get_pll_para 0x000169a5 Thumb Code 88 drv_phy_common.o(i.drv_phy_get_pll_para) + drv_phy_get_rate_para 0x00016a05 Thumb Code 76 drv_phy_common.o(i.drv_phy_get_rate_para) + drv_phy_test_clear 0x00016a59 Thumb Code 16 drv_phy_common.o(i.drv_phy_test_clear) + drv_phy_test_lock 0x00016a69 Thumb Code 24 drv_phy_common.o(i.drv_phy_test_lock) + drv_phy_test_write_1_byte 0x00016a81 Thumb Code 32 drv_phy_common.o(i.drv_phy_test_write_1_byte) + drv_phy_test_write_2_byte 0x00016aa1 Thumb Code 38 drv_phy_common.o(i.drv_phy_test_write_2_byte) + drv_phy_test_write_code 0x00016ac7 Thumb Code 30 drv_phy_common.o(i.drv_phy_test_write_code) + drv_pwr_set_cp_mode 0x00016b05 Thumb Code 26 drv_pwr.o(i.drv_pwr_set_cp_mode) + drv_pwr_set_pvd_mode 0x00016b25 Thumb Code 18 drv_pwr.o(i.drv_pwr_set_pvd_mode) + drv_pwr_set_system_clk_src 0x00016b3d Thumb Code 44 drv_pwr.o(i.drv_pwr_set_system_clk_src) + drv_rxbr_clear_pkt_buffer 0x00016bbb Thumb Code 10 drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) + drv_rxbr_clear_status0 0x00016bc5 Thumb Code 4 drv_rxbr.o(i.drv_rxbr_clear_status0) + drv_rxbr_enable_irq 0x00016bc9 Thumb Code 90 drv_rxbr.o(i.drv_rxbr_enable_irq) + drv_rxbr_frame_drop_cfg 0x00016c25 Thumb Code 16 drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) + drv_rxbr_get_clk 0x00016c39 Thumb Code 66 drv_rxbr.o(i.drv_rxbr_get_clk) + drv_rxbr_get_col_addr 0x00016c9d Thumb Code 4 drv_rxbr.o(i.drv_rxbr_get_col_addr) + drv_rxbr_get_page_addr 0x00016cb3 Thumb Code 4 drv_rxbr.o(i.drv_rxbr_get_page_addr) + drv_rxbr_get_pkt_buf_error_status 0x00016cb7 Thumb Code 12 drv_rxbr.o(i.drv_rxbr_get_pkt_buf_error_status) + drv_rxbr_hline_rcv0_cfg 0x00016ceb Thumb Code 12 drv_rxbr.o(i.drv_rxbr_hline_rcv0_cfg) + drv_rxbr_hline_rcv1_cfg 0x00016cf7 Thumb Code 12 drv_rxbr.o(i.drv_rxbr_hline_rcv1_cfg) + drv_rxbr_hline_rcv_cfg 0x00016d03 Thumb Code 8 drv_rxbr.o(i.drv_rxbr_hline_rcv_cfg) + drv_rxbr_register_irq0_callback 0x00016d0d Thumb Code 6 drv_rxbr.o(i.drv_rxbr_register_irq0_callback) + drv_rxbr_register_irq1_callback 0x00016d19 Thumb Code 6 drv_rxbr.o(i.drv_rxbr_register_irq1_callback) + drv_rxbr_set_ack_pkt_header 0x00016d25 Thumb Code 20 drv_rxbr.o(i.drv_rxbr_set_ack_pkt_header) + drv_rxbr_set_color_format 0x00016d39 Thumb Code 20 drv_rxbr.o(i.drv_rxbr_set_color_format) + drv_rxbr_set_filter_regs 0x00016d4d Thumb Code 18 drv_rxbr.o(i.drv_rxbr_set_filter_regs) + drv_rxbr_set_inten 0x00016d5f Thumb Code 20 drv_rxbr.o(i.drv_rxbr_set_inten) + drv_rxbr_set_ltpo_drop_th 0x00016d73 Thumb Code 16 drv_rxbr.o(i.drv_rxbr_set_ltpo_drop_th) + drv_rxbr_set_usr_cfg 0x00016d83 Thumb Code 38 drv_rxbr.o(i.drv_rxbr_set_usr_cfg) + drv_rxbr_set_usr_col 0x00016da9 Thumb Code 8 drv_rxbr.o(i.drv_rxbr_set_usr_col) + drv_rxbr_set_usr_row 0x00016db1 Thumb Code 8 drv_rxbr.o(i.drv_rxbr_set_usr_row) + drv_spi_m_read_data 0x00016db9 Thumb Code 28 drv_spi_master.o(i.drv_spi_m_read_data) + drv_swire_enable 0x00016dd9 Thumb Code 24 drv_swire.o(i.drv_swire_enable) + drv_swire_register_callback 0x00016df5 Thumb Code 8 drv_swire.o(i.drv_swire_register_callback) + drv_swire_set_bit_time 0x00016e01 Thumb Code 18 drv_swire.o(i.drv_swire_set_bit_time) + drv_swire_set_int 0x00016e19 Thumb Code 76 drv_swire.o(i.drv_swire_set_int) + drv_swire_set_power_down 0x00016e6d Thumb Code 24 drv_swire.o(i.drv_swire_set_power_down) + drv_swire_set_pulse_count 0x00016e89 Thumb Code 6 drv_swire.o(i.drv_swire_set_pulse_count) + drv_sys_cfg_clear_all_int 0x00016e95 Thumb Code 8 drv_sys_cfg.o(i.drv_sys_cfg_clear_all_int) + drv_sys_cfg_clear_pending 0x00016ea1 Thumb Code 32 drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) + drv_sys_cfg_sel_ap_rst_lvl_trig 0x00016ec9 Thumb Code 18 drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_lvl_trig) + drv_sys_cfg_sel_ap_rst_trig 0x00016ee1 Thumb Code 22 drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) + drv_sys_cfg_sel_gpio_group 0x00016efd Thumb Code 30 drv_sys_cfg.o(i.drv_sys_cfg_sel_gpio_group) + drv_sys_cfg_sel_int_trig 0x00016f21 Thumb Code 30 drv_sys_cfg.o(i.drv_sys_cfg_sel_int_trig) + drv_sys_cfg_set_dma_rx_req 0x00016f45 Thumb Code 10 drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) + drv_sys_cfg_set_dma_tx_req 0x00016f55 Thumb Code 10 drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) + drv_sys_cfg_set_int 0x00016f65 Thumb Code 30 drv_sys_cfg.o(i.drv_sys_cfg_set_int) + drv_timer_enable 0x00016fa3 Thumb Code 32 drv_timer.o(i.drv_timer_enable) + drv_timer_get_instance 0x00016fc5 Thumb Code 10 drv_timer.o(i.drv_timer_get_instance) + drv_timer_get_prescaler 0x00016fd5 Thumb Code 12 drv_timer.o(i.drv_timer_get_prescaler) + drv_timer_register_callback 0x00017029 Thumb Code 14 drv_timer.o(i.drv_timer_register_callback) + drv_timer_set_compare_val 0x0001703d Thumb Code 16 drv_timer.o(i.drv_timer_set_compare_val) + drv_timer_set_int 0x0001704d Thumb Code 80 drv_timer.o(i.drv_timer_set_int) + drv_timer_set_prescaler 0x000170a1 Thumb Code 36 drv_timer.o(i.drv_timer_set_prescaler) + drv_timer_set_repeat 0x000170c9 Thumb Code 12 drv_timer.o(i.drv_timer_set_repeat) + drv_tx_phy_test_enter 0x000170e3 Thumb Code 28 drv_dsi_tx.o(i.drv_tx_phy_test_enter) + drv_tx_phy_test_exit 0x000170ff Thumb Code 28 drv_dsi_tx.o(i.drv_tx_phy_test_exit) + drv_vidc_clear_irq 0x00017151 Thumb Code 8 drv_vidc.o(i.drv_vidc_clear_irq) + drv_vidc_enable 0x00017159 Thumb Code 24 drv_vidc.o(i.drv_vidc_enable) + drv_vidc_enable_irq 0x00017171 Thumb Code 58 drv_vidc.o(i.drv_vidc_enable_irq) + drv_vidc_get_irq_status 0x000171b1 Thumb Code 18 drv_vidc.o(i.drv_vidc_get_irq_status) + drv_vidc_init_module_enable 0x000171c5 Thumb Code 36 drv_vidc.o(i.drv_vidc_init_module_enable) + drv_vidc_register_callback 0x000171ed Thumb Code 6 drv_vidc.o(i.drv_vidc_register_callback) + drv_vidc_reset 0x000171f9 Thumb Code 6 drv_vidc.o(i.drv_vidc_reset) + drv_vidc_set_dst_parameter 0x000171ff Thumb Code 60 drv_vidc.o(i.drv_vidc_set_dst_parameter) + drv_vidc_set_irqen 0x0001723b Thumb Code 20 drv_vidc.o(i.drv_vidc_set_irqen) + drv_vidc_set_mirror 0x0001724f Thumb Code 16 drv_vidc.o(i.drv_vidc_set_mirror) + drv_vidc_set_p2r_hcoef0 0x0001725f Thumb Code 8 drv_vidc.o(i.drv_vidc_set_p2r_hcoef0) + drv_vidc_set_p2r_hinitb 0x00017267 Thumb Code 38 drv_vidc.o(i.drv_vidc_set_p2r_hinitb) + drv_vidc_set_p2r_hinitr 0x0001728d Thumb Code 38 drv_vidc.o(i.drv_vidc_set_p2r_hinitr) + drv_vidc_set_pentile_swap 0x000172b5 Thumb Code 18 drv_vidc.o(i.drv_vidc_set_pentile_swap) + drv_vidc_set_pu_ctrl 0x000172cd Thumb Code 10 drv_vidc.o(i.drv_vidc_set_pu_ctrl) + drv_vidc_set_rotation 0x000172d7 Thumb Code 16 drv_vidc.o(i.drv_vidc_set_rotation) + drv_vidc_set_scld_hcoef0 0x000172e7 Thumb Code 10 drv_vidc.o(i.drv_vidc_set_scld_hcoef0) + drv_vidc_set_scld_hcoef1 0x000172f1 Thumb Code 10 drv_vidc.o(i.drv_vidc_set_scld_hcoef1) + drv_vidc_set_scld_step 0x000172fb Thumb Code 18 drv_vidc.o(i.drv_vidc_set_scld_step) + drv_vidc_set_scld_vcoef0 0x0001730d Thumb Code 10 drv_vidc.o(i.drv_vidc_set_scld_vcoef0) + drv_vidc_set_scld_vcoef1 0x00017317 Thumb Code 10 drv_vidc.o(i.drv_vidc_set_scld_vcoef1) + drv_vidc_set_src_parameter 0x00017321 Thumb Code 22 drv_vidc.o(i.drv_vidc_set_src_parameter) + drv_wdg_clear_counter 0x00017339 Thumb Code 12 drv_wdg.o(i.drv_wdg_clear_counter) + drv_wdg_set_int 0x00017369 Thumb Code 60 drv_wdg.o(i.drv_wdg_set_int) + fls_clr_interrupt_flag 0x000173a9 Thumb Code 10 drv_fls.o(i.fls_clr_interrupt_flag) + fputc 0x000173b3 Thumb Code 20 tau_log.o(i.fputc) + hal_dsi_rx_ctrl_create_handle 0x00017421 Thumb Code 48 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) + hal_dsi_rx_ctrl_deinit 0x00017455 Thumb Code 158 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) + hal_dsi_rx_ctrl_dsc_async_handler 0x00017505 Thumb Code 34 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) + hal_dsi_rx_ctrl_gen_a_tear_signal 0x0001752d Thumb Code 32 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) + hal_dsi_rx_ctrl_get_max_ret_size 0x00017555 Thumb Code 30 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) + hal_dsi_rx_ctrl_init 0x0001757d Thumb Code 144 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) + hal_dsi_rx_ctrl_pre_init_pps 0x00017d6d Thumb Code 56 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_pre_init_pps) + hal_dsi_rx_ctrl_restart 0x00017da9 Thumb Code 72 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) + hal_dsi_rx_ctrl_send_ack_cmd 0x00017df9 Thumb Code 212 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) + hal_dsi_rx_ctrl_set_cus_scld_filter 0x00017ee9 Thumb Code 98 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) + hal_dsi_rx_ctrl_set_cus_sync_line 0x00017f55 Thumb Code 44 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) + hal_dsi_rx_ctrl_set_sw_tear_mode 0x00018035 Thumb Code 42 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) + hal_dsi_rx_ctrl_set_tear_mode_ex 0x00018069 Thumb Code 14 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_tear_mode_ex) + hal_dsi_rx_ctrl_start 0x00018079 Thumb Code 46 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) + hal_dsi_rx_ctrl_stop 0x000180b5 Thumb Code 46 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) + hal_dsi_rx_ctrl_toggle_resolution_ex 0x000180f1 Thumb Code 28 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution_ex) + hal_dsi_tx_ctrl_create_handle 0x000186fd Thumb Code 34 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) + hal_dsi_tx_ctrl_deinit 0x00018729 Thumb Code 118 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) + hal_dsi_tx_ctrl_enter_init_panel_mode 0x000187ad Thumb Code 68 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) + hal_dsi_tx_ctrl_exit_init_panel_mode 0x000187f9 Thumb Code 32 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) + hal_dsi_tx_ctrl_init 0x00018821 Thumb Code 154 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) + hal_dsi_tx_ctrl_panel_reset_pin 0x000188e9 Thumb Code 12 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_panel_reset_pin) + hal_dsi_tx_ctrl_set_ccm 0x000188f5 Thumb Code 28 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) + hal_dsi_tx_ctrl_set_overwrite_rgb 0x00018915 Thumb Code 16 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) + hal_dsi_tx_ctrl_set_partial_disp 0x00018929 Thumb Code 12 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp) + hal_dsi_tx_ctrl_set_partial_disp_area 0x00018939 Thumb Code 30 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp_area) + hal_dsi_tx_ctrl_start 0x0001895d Thumb Code 150 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) + hal_dsi_tx_ctrl_stop 0x00018a05 Thumb Code 56 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) + hal_dsi_tx_ctrl_write_array_cmd 0x00018a49 Thumb Code 236 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) + hal_dsi_tx_ctrl_write_cmd 0x00018b39 Thumb Code 200 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) + hal_gpio_ctrl_eint 0x00018de9 Thumb Code 18 hal_gpio.o(i.hal_gpio_ctrl_eint) + hal_gpio_get_input_data 0x00018e01 Thumb Code 18 hal_gpio.o(i.hal_gpio_get_input_data) + hal_gpio_init_eint 0x00018e15 Thumb Code 58 hal_gpio.o(i.hal_gpio_init_eint) + hal_gpio_init_output 0x00018e55 Thumb Code 34 hal_gpio.o(i.hal_gpio_init_output) + hal_gpio_reg_eint_cb 0x00018e7d Thumb Code 20 hal_gpio.o(i.hal_gpio_reg_eint_cb) + hal_gpio_set_ap_reset_int 0x00018e95 Thumb Code 76 hal_gpio.o(i.hal_gpio_set_ap_reset_int) + hal_gpio_set_mode 0x00018ee5 Thumb Code 90 hal_gpio.o(i.hal_gpio_set_mode) + hal_gpio_set_output_data 0x00018f45 Thumb Code 8 hal_gpio.o(i.hal_gpio_set_output_data) + hal_gpio_set_pull_state 0x00018f4d Thumb Code 26 hal_gpio.o(i.hal_gpio_set_pull_state) + hal_i2c_m_dma_init 0x00018f6d Thumb Code 92 hal_i2c_master.o(i.hal_i2c_m_dma_init) + hal_i2c_m_dma_read 0x00018fd9 Thumb Code 26 hal_i2c_master.o(i.hal_i2c_m_dma_read) + hal_i2c_m_dma_write 0x00018ff9 Thumb Code 24 hal_i2c_master.o(i.hal_i2c_m_dma_write) + hal_i2c_m_transfer_complate 0x00019015 Thumb Code 6 hal_i2c_master.o(i.hal_i2c_m_transfer_complate) + hal_i2c_s_dma_write 0x00019051 Thumb Code 62 hal_i2c_slave.o(i.hal_i2c_s_dma_write) + hal_i2c_s_init 0x0001909d Thumb Code 176 hal_i2c_slave.o(i.hal_i2c_s_init) + hal_i2c_s_nonblocking_read 0x00019165 Thumb Code 14 hal_i2c_slave.o(i.hal_i2c_s_nonblocking_read) + hal_i2c_s_set_transfer 0x00019179 Thumb Code 6 hal_i2c_slave.o(i.hal_i2c_s_set_transfer) + hal_internal_check_video_auto_sync 0x000192f9 Thumb Code 18 hal_internal_vsync.o(i.hal_internal_check_video_auto_sync) + hal_internal_init_memc 0x00019311 Thumb Code 170 hal_internal_vsync.o(i.hal_internal_init_memc) + hal_internal_rx_dcs_async_handler 0x0001940d Thumb Code 42 hal_internal_vsync.o(i.hal_internal_rx_dcs_async_handler) + hal_internal_rx_dcs_polling 0x00019439 Thumb Code 78 hal_internal_vsync.o(i.hal_internal_rx_dcs_polling) + hal_internal_sync_get_fb_setting 0x00019491 Thumb Code 12 hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) + hal_internal_sync_get_hight_performan_mode 0x000194a1 Thumb Code 10 hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) + hal_internal_sync_input_resolution_change_ex 0x000194b1 Thumb Code 362 hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) + hal_internal_vsync_deinit 0x00019685 Thumb Code 30 hal_internal_vsync.o(i.hal_internal_vsync_deinit) + hal_internal_vsync_get_rx_state 0x000196ad Thumb Code 6 hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) + hal_internal_vsync_get_sync_line 0x000196b9 Thumb Code 18 hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) + hal_internal_vsync_get_tear_mode 0x000196d1 Thumb Code 6 hal_internal_vsync.o(i.hal_internal_vsync_get_tear_mode) + hal_internal_vsync_get_tx_state 0x000196dd Thumb Code 6 hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) + hal_internal_vsync_init_rx 0x000196e9 Thumb Code 274 hal_internal_vsync.o(i.hal_internal_vsync_init_rx) + hal_internal_vsync_init_tx 0x00019829 Thumb Code 172 hal_internal_vsync.o(i.hal_internal_vsync_init_tx) + hal_internal_vsync_set_auto_hw_filter 0x000198d9 Thumb Code 132 hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) + hal_internal_vsync_set_rx_state 0x00019969 Thumb Code 30 hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) + hal_internal_vsync_set_sync_line 0x0001998d Thumb Code 64 hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) + hal_internal_vsync_set_tear_mode 0x000199d1 Thumb Code 72 hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) + hal_internal_vsync_set_tx_state 0x00019a21 Thumb Code 122 hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) + hal_intl_svs_deinit_tx 0x00019aa5 Thumb Code 10 hal_internal_soft_sync.o(i.hal_intl_svs_deinit_tx) + hal_intl_svs_handle 0x00019ab5 Thumb Code 24 hal_internal_soft_sync.o(i.hal_intl_svs_handle) + hal_intl_svs_init_rx 0x00019ad9 Thumb Code 108 hal_internal_soft_sync.o(i.hal_intl_svs_init_rx) + hal_intl_svs_init_tx 0x00019b51 Thumb Code 16 hal_internal_soft_sync.o(i.hal_intl_svs_init_tx) + hal_intl_svs_set_sync_coef 0x00019b65 Thumb Code 8 hal_internal_soft_sync.o(i.hal_intl_svs_set_sync_coef) + hal_intl_svs_update_rxbr_clk 0x00019b71 Thumb Code 52 hal_internal_soft_sync.o(i.hal_intl_svs_update_rxbr_clk) + hal_spi_m_clear_rxfifo 0x0001a019 Thumb Code 14 hal_spi_master.o(i.hal_spi_m_clear_rxfifo) + hal_swire_deinit 0x0001a027 Thumb Code 18 hal_swire.o(i.hal_swire_deinit) + hal_swire_init 0x0001a039 Thumb Code 32 hal_swire.o(i.hal_swire_init) + hal_swire_open 0x0001a059 Thumb Code 22 hal_swire.o(i.hal_swire_open) + hal_swire_register_callback 0x0001a06f Thumb Code 10 hal_swire.o(i.hal_swire_register_callback) + hal_swire_start 0x0001a079 Thumb Code 100 hal_swire.o(i.hal_swire_start) + hal_system_enable_systick 0x0001a0e5 Thumb Code 8 hal_system.o(i.hal_system_enable_systick) + hal_system_get_tick 0x0001a0ed Thumb Code 8 hal_system.o(i.hal_system_get_tick) + hal_system_init 0x0001a0f5 Thumb Code 104 hal_system.o(i.hal_system_init) + hal_system_init_console 0x0001a17d Thumb Code 28 hal_system.o(i.hal_system_init_console) + hal_system_set_phy_calibration 0x0001a199 Thumb Code 8 hal_system.o(i.hal_system_set_phy_calibration) + hal_system_set_pvd 0x0001a1a1 Thumb Code 8 hal_system.o(i.hal_system_set_pvd) + hal_system_set_vcc 0x0001a1a9 Thumb Code 8 hal_system.o(i.hal_system_set_vcc) + hal_timer_deinit 0x0001a1b1 Thumb Code 46 hal_timer.o(i.hal_timer_deinit) + hal_timer_init 0x0001a1df Thumb Code 26 hal_timer.o(i.hal_timer_init) + hal_timer_start 0x0001a1f9 Thumb Code 66 hal_timer.o(i.hal_timer_start) + hal_timer_stop 0x0001a241 Thumb Code 40 hal_timer.o(i.hal_timer_stop) + hal_uart_init 0x0001a299 Thumb Code 126 hal_uart.o(i.hal_uart_init) + hal_uart_transmit_blocking 0x0001a325 Thumb Code 12 hal_uart.o(i.hal_uart_transmit_blocking) + handle_init 0x0001a511 Thumb Code 140 irq_redirect .o(i.handle_init) + main 0x0001a769 Thumb Code 10 main.o(i.main) + pps_updata_exec 0x0001a841 Thumb Code 40 ap_demo.o(i.pps_updata_exec) + rx_restart_exec 0x0001b08d Thumb Code 38 ap_demo.o(i.rx_restart_exec) + sqrt 0x0001b5b1 Thumb Code 66 sqrt.o(i.sqrt) + tp_heartbeat_exec 0x0001b96d Thumb Code 60 ap_demo.o(i.tp_heartbeat_exec) + panel_init_code 0x0001bdfc Data 10401 ap_demo.o(.constdata) + wCRCTalbeAbs 0x0001e6f8 Data 32 app_tp_st_touch.o(.constdata) + screen_86_data 0x0001e718 Data 1 app_tp_for_custom_s21u.o(.constdata) + screen_a0_00_01_data 0x0001e719 Data 3 app_tp_for_custom_s21u.o(.constdata) + screen_a2_03_00_data 0x0001e71c Data 6 app_tp_for_custom_s21u.o(.constdata) + screen_a2_02_00_data 0x0001e722 Data 3 app_tp_for_custom_s21u.o(.constdata) + screen_c0_07_01_data 0x0001e725 Data 3 app_tp_for_custom_s21u.o(.constdata) + screen_reg_start_data_size 0x0001e728 Data 1 app_tp_for_custom_s21u.o(.constdata) + Region$$Table$$Base 0x0001eb84 Number 0 anon$$obj.o(Region$$Table) + Region$$Table$$Limit 0x0001ebb4 Number 0 anon$$obj.o(Region$$Table) + g_fun_handle 0x00070100 Data 192 irq_redirect .o(.ARM.__AT_0x00070100) + phone_start_flag 0x000701d5 Data 1 ap_demo.o(.data) + phone_DisplayOFF_flag 0x000701d6 Data 1 ap_demo.o(.data) + s_restart_flag 0x000701d7 Data 1 ap_demo.o(.data) + s_pps_updata_allpixeloff_flag 0x000701d8 Data 1 ap_demo.o(.data) + panel_mode 0x000701da Data 1 ap_demo.o(.data) + phone_DisplayOFF_count 0x000701e4 Data 2 ap_demo.o(.data) + panel_r 0x000701ea Data 2 ap_demo.o(.data) + panel_g 0x000701ec Data 2 ap_demo.o(.data) + panel_b 0x000701ee Data 2 ap_demo.o(.data) + BaseTime 0x000701f8 Data 4 ap_demo.o(.data) + s_heartbeat 0x000701fc Data 4 ap_demo.o(.data) + curFrame 0x00070200 Data 4 ap_demo.o(.data) + rx_filter_1080_h_4_96 0x00070208 Data 256 ap_demo.o(.data) + rx_filter_2400_v_4_96 0x00070308 Data 256 ap_demo.o(.data) + rx_filter_1080_h_4_86 0x00070408 Data 256 ap_demo.o(.data) + rx_filter_2400_v_4_69 0x00070508 Data 256 ap_demo.o(.data) + rx_filter_1440_h_4_72 0x00070608 Data 256 ap_demo.o(.data) + rx_filter_3200_v_4_59 0x00070708 Data 256 ap_demo.o(.data) + s_screen_init_complate 0x0007080b Data 1 app_tp_transfer.o(.data) + s_tp_restart_count 0x00070818 Data 4 app_tp_transfer.o(.data) + st_touch_init_sensor_off 0x0007081e Data 3 app_tp_st_touch.o(.data) + st_touch_init_sensor_on 0x00070821 Data 3 app_tp_st_touch.o(.data) + st_touch_tp_tuning_reset 0x00070824 Data 3 app_tp_st_touch.o(.data) + st_touch_tp_tuning_FpnlInit 0x00070827 Data 3 app_tp_st_touch.o(.data) + st_touch_tp_tuning_PnlInit 0x0007082a Data 3 app_tp_st_touch.o(.data) + st_touch_tp_tuning_SvCfg 0x0007082d Data 3 app_tp_st_touch.o(.data) + st_touch_tp_tuning_SvCx 0x00070830 Data 3 app_tp_st_touch.o(.data) + st_touch_tp_tuning_SvPnl 0x00070833 Data 3 app_tp_st_touch.o(.data) + st_touch_tp_tuning_clearfifo 0x00070836 Data 3 app_tp_st_touch.o(.data) + st_touch_tp_tuning_clkreset 0x00070839 Data 3 app_tp_st_touch.o(.data) + st_touch_tp_tuning_TuneM 0x0007083c Data 4 app_tp_st_touch.o(.data) + st_touch_tp_tuning_TuneS 0x00070840 Data 4 app_tp_st_touch.o(.data) + g_screen_input_rst_pad 0x00070844 Data 1 app_tp_for_custom_s21u.o(.data) + g_screen_input_int_pad 0x00070845 Data 1 app_tp_for_custom_s21u.o(.data) + g_phone_output_int_pad 0x00070846 Data 1 app_tp_for_custom_s21u.o(.data) + g_screen_tp_init_start 0x00070847 Data 1 app_tp_for_custom_s21u.o(.data) + g_screen_tp_init_restart 0x00070848 Data 1 app_tp_for_custom_s21u.o(.data) + g_tp_sleep_in 0x00070849 Data 1 app_tp_for_custom_s21u.o(.data) + g_ap_tp_init_done 0x0007084a Data 1 app_tp_for_custom_s21u.o(.data) + g_ap_tp_init_E4 0x0007084b Data 1 app_tp_for_custom_s21u.o(.data) + g_tp_wakeup 0x0007084c Data 1 app_tp_for_custom_s21u.o(.data) + g_tp_sleep_delay_count 0x0007084d Data 1 app_tp_for_custom_s21u.o(.data) + phone_reg_coord_BUF_NUM 0x0007084e Data 1 app_tp_for_custom_s21u.o(.data) + SAMSUNG_s21u 0x0007084f Data 453 app_tp_for_custom_s21u.o(.data) + phone_reg_coord_back_X61 0x00070a14 Data 80 app_tp_for_custom_s21u.o(.data) + phone_reg_coord_back_BUF 0x00070a64 Data 100 app_tp_for_custom_s21u.o(.data) + screen_data_write_1 0x00070ac8 Data 1 app_tp_for_custom_s21u.o(.data) + screen_reg_int_data 0x00070acc Data 16 app_tp_for_custom_s21u.o(.data) + screen_reg_start_data 0x00070adc Data 100 app_tp_for_custom_s21u.o(.data) + tp_sleep_in 0x00070b40 Data 1 app_tp_for_custom_s21u.o(.data) + tp_sleep_count 0x00070b41 Data 1 app_tp_for_custom_s21u.o(.data) + g_sof_gen_te_func 0x00070b78 Data 4 hal_internal_vsync.o(.data) + g_systick_cb_func 0x00070b8c Data 4 drv_common.o(.data) + g_system_clock 0x00070b90 Data 4 drv_common.o(.data) + g_scld_fhd_filter_h 0x00070ba8 Data 256 drv_param_init.o(.data) + g_scld_fhd_filter_v 0x00070ca8 Data 256 drv_param_init.o(.data) + g_scld_hd_filter_h 0x00070da8 Data 256 drv_param_init.o(.data) + g_scld_hd_filter_v 0x00070ea8 Data 256 drv_param_init.o(.data) + g_sclu_lanczos_filter 0x00070fa8 Data 128 drv_param_init.o(.data) + g_ccm_setting 0x00071028 Data 36 drv_param_init.o(.data) + g_int_rxbr_irq0_cb_func 0x000710b8 Data 4 drv_rxbr.o(.data) + g_int_rxbr_irq1_cb_func 0x000710bc Data 4 drv_rxbr.o(.data) + g_int_vidc_cb_func 0x000710c0 Data 4 drv_vidc.o(.data) + g_fls_w_cmd 0x000710d4 Data 1 norflash.o(.data) + g_fls_r_cmd 0x000710d5 Data 1 norflash.o(.data) + g_fls_write_en_status 0x000710d6 Data 1 norflash.o(.data) + isFlsTransferEnd 0x000710d7 Data 1 norflash.o(.data) + isFlsFifoReq 0x000710d8 Data 1 norflash.o(.data) + isNandWriteCompleted 0x000710d9 Data 1 norflash.o(.data) + isNandReadCompleted 0x000710da Data 1 norflash.o(.data) + g_fls_error_info 0x000710e0 Data 6 norflash.o(.data) + __stdout 0x000710fc Data 4 stdout.o(.data) + tp_scan_data 0x000712f8 Data 12 app_tp_st_touch.o(.bss) + Touch 0x00071304 Data 72 app_tp_for_custom_s21u.o(.bss) + string 0x0007145c Data 256 tau_log.o(.bss) + hal_dmahandle 0x0007155c Data 160 hal_uart.o(.bss) + hal_uarthandle_dma 0x000715fc Data 32 hal_uart.o(.bss) + hal_uart_handle_global 0x0007161c Data 16 hal_uart.o(.bss) + g_vsync_hande 0x0007162c Data 84 hal_internal_vsync.o(.bss) + g_dcs_execute_table 0x00071680 Data 2048 hal_internal_vsync.o(.bss) + g_spis_ctrl_handle 0x0007217c Data 32 hal_spi_slave.o(.bss) + g_packet_fifo 0x0007219c Data 4144 dcs_packet_fifo.o(.bss) + __stack_limit 0x000731d0 Data 0 startup_armcm0.o(STACK) + __initial_sp 0x000741d0 Data 0 startup_armcm0.o(STACK) + + + +============================================================================== + +Memory Map of the image + + Image Entry point : 0x000100c1 + + Load Region LR_IROM2 (Base: 0x00010000, Size: 0x0000fae8, Max: 0x00010000, ABSOLUTE, COMPRESSED[0x0000f474]) + + Execution Region ER_IROM2 (Exec base: 0x00010000, Load base: 0x00010000, Size: 0x0000ebb4, Max: 0x00010000, ABSOLUTE) + + Exec Addr Load Addr Size Type Attr Idx E Section Name Object + + 0x00010000 0x00010000 0x000000c0 Data RO 707 RESET startup_armcm0.o + 0x000100c0 0x000100c0 0x00000000 Code RO 2840 * .ARM.Collect$$$$00000000 mc_p.l(entry.o) + 0x000100c0 0x000100c0 0x00000004 Code RO 3152 .ARM.Collect$$$$00000001 mc_p.l(entry2.o) + 0x000100c4 0x000100c4 0x00000004 Code RO 3155 .ARM.Collect$$$$00000004 mc_p.l(entry5.o) + 0x000100c8 0x000100c8 0x00000000 Code RO 3157 .ARM.Collect$$$$00000008 mc_p.l(entry7b.o) + 0x000100c8 0x000100c8 0x00000000 Code RO 3159 .ARM.Collect$$$$0000000A mc_p.l(entry8b.o) + 0x000100c8 0x000100c8 0x00000008 Code RO 3160 .ARM.Collect$$$$0000000B mc_p.l(entry9a.o) + 0x000100d0 0x000100d0 0x00000000 Code RO 3162 .ARM.Collect$$$$0000000D mc_p.l(entry10a.o) + 0x000100d0 0x000100d0 0x00000000 Code RO 3164 .ARM.Collect$$$$0000000F mc_p.l(entry11a.o) + 0x000100d0 0x000100d0 0x00000004 Code RO 3153 .ARM.Collect$$$$00002712 mc_p.l(entry2.o) + 0x000100d4 0x000100d4 0x00000078 Code RO 708 .text startup_armcm0.o + 0x0001014c 0x0001014c 0x0000002c Code RO 2843 .text mc_p.l(uidiv.o) + 0x00010178 0x00010178 0x00000028 Code RO 2845 .text mc_p.l(idiv.o) + 0x000101a0 0x000101a0 0x00000024 Code RO 2847 .text mc_p.l(memcpya.o) + 0x000101c4 0x000101c4 0x00000024 Code RO 2849 .text mc_p.l(memseta.o) + 0x000101e8 0x000101e8 0x000000b2 Code RO 3114 .text mf_p.l(fadd.o) + 0x0001029a 0x0001029a 0x0000007a Code RO 3116 .text mf_p.l(fmul.o) + 0x00010314 0x00010314 0x0000007c Code RO 3118 .text mf_p.l(fdiv.o) + 0x00010390 0x00010390 0x00000018 Code RO 3120 .text mf_p.l(fscalb.o) + 0x000103a8 0x000103a8 0x00000164 Code RO 3122 .text mf_p.l(dadd.o) + 0x0001050c 0x0001050c 0x000000d0 Code RO 3124 .text mf_p.l(dmul.o) + 0x000105dc 0x000105dc 0x000000f0 Code RO 3126 .text mf_p.l(ddiv.o) + 0x000106cc 0x000106cc 0x00000016 Code RO 3128 .text mf_p.l(fflti.o) + 0x000106e2 0x000106e2 0x0000000e Code RO 3130 .text mf_p.l(ffltui.o) + 0x000106f0 0x000106f0 0x0000001c Code RO 3134 .text mf_p.l(dfltui.o) + 0x0001070c 0x0001070c 0x00000032 Code RO 3136 .text mf_p.l(ffixi.o) + 0x0001073e 0x0001073e 0x00000028 Code RO 3138 .text mf_p.l(ffixui.o) + 0x00010766 0x00010766 0x00000002 PAD + 0x00010768 0x00010768 0x00000048 Code RO 3140 .text mf_p.l(dfixi.o) + 0x000107b0 0x000107b0 0x0000003c Code RO 3142 .text mf_p.l(dfixui.o) + 0x000107ec 0x000107ec 0x00000028 Code RO 3144 .text mf_p.l(f2d.o) + 0x00010814 0x00010814 0x00000028 Code RO 3146 .text mf_p.l(cdcmple.o) + 0x0001083c 0x0001083c 0x00000014 Code RO 3148 .text mf_p.l(cfcmple.o) + 0x00010850 0x00010850 0x00000014 Code RO 3150 .text mf_p.l(cfrcmple.o) + 0x00010864 0x00010864 0x00000060 Code RO 3167 .text mc_p.l(uldiv.o) + 0x000108c4 0x000108c4 0x00000020 Code RO 3169 .text mc_p.l(llshl.o) + 0x000108e4 0x000108e4 0x00000022 Code RO 3171 .text mc_p.l(llushr.o) + 0x00010906 0x00010906 0x00000026 Code RO 3173 .text mc_p.l(llsshr.o) + 0x0001092c 0x0001092c 0x00000000 Code RO 3182 .text mc_p.l(iusefp.o) + 0x0001092c 0x0001092c 0x00000082 Code RO 3183 .text mf_p.l(fepilogue.o) + 0x000109ae 0x000109ae 0x000000be Code RO 3185 .text mf_p.l(depilogue.o) + 0x00010a6c 0x00010a6c 0x000000a2 Code RO 3189 .text mf_p.l(dsqrt.o) + 0x00010b0e 0x00010b0e 0x00000002 PAD + 0x00010b10 0x00010b10 0x00000040 Code RO 3191 .text mf_p.l(dfixul.o) + 0x00010b50 0x00010b50 0x00000028 Code RO 3193 .text mf_p.l(cdrcmple.o) + 0x00010b78 0x00010b78 0x00000024 Code RO 3195 .text mc_p.l(init.o) + 0x00010b9c 0x00010b9c 0x00000056 Code RO 3205 .text mc_p.l(__dczerorl2.o) + 0x00010bf2 0x00010bf2 0x00000002 PAD + 0x00010bf4 0x00010bf4 0x00000018 Code RO 2377 i.ADC_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010c0c 0x00010c0c 0x00000018 Code RO 2378 i.AP_NRESET_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010c24 0x00010c24 0x00000040 Code RO 461 i.CRC16_2 app_tp_st_touch.o + 0x00010c64 0x00010c64 0x00000014 Code RO 2379 i.DMA_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010c78 0x00010c78 0x0000001c Code RO 2380 i.EXTI_INT0_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010c94 0x00010c94 0x0000001c Code RO 2381 i.EXTI_INT1_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010cb0 0x00010cb0 0x0000001c Code RO 2382 i.EXTI_INT2_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010ccc 0x00010ccc 0x0000001c Code RO 2383 i.EXTI_INT3_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010ce8 0x00010ce8 0x0000001c Code RO 2384 i.EXTI_INT4_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010d04 0x00010d04 0x0000001c Code RO 2385 i.EXTI_INT5_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010d20 0x00010d20 0x0000001c Code RO 2386 i.EXTI_INT6_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010d3c 0x00010d3c 0x0000001c Code RO 2387 i.EXTI_INT7_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010d58 0x00010d58 0x00000014 Code RO 2388 i.FLSCTRL_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010d6c 0x00010d6c 0x0000004e Code RO 103 i.Gpio_swire_output ap_demo.o + 0x00010dba 0x00010dba 0x00000002 PAD + 0x00010dbc 0x00010dbc 0x00000014 Code RO 2389 i.HardFault_Handler CVWL568.lib(irq_redirect .o) + 0x00010dd0 0x00010dd0 0x00000018 Code RO 2390 i.I2C0_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010de8 0x00010de8 0x00000018 Code RO 2391 i.I2C1_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010e00 0x00010e00 0x00000018 Code RO 2392 i.LCDC_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010e18 0x00010e18 0x00000028 Code RO 1169 i.LOG_printf CVWL568.lib(tau_log.o) + 0x00010e40 0x00010e40 0x00000018 Code RO 2393 i.MEMC_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010e58 0x00010e58 0x00000018 Code RO 2394 i.MIPI_RX_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010e70 0x00010e70 0x00000018 Code RO 2395 i.MIPI_TX_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010e88 0x00010e88 0x0000001c Code RO 2396 i.PWMDET_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010ea4 0x00010ea4 0x0000001c Code RO 2397 i.SPIM_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010ec0 0x00010ec0 0x0000001c Code RO 2398 i.SPIS_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010edc 0x00010edc 0x0000001c Code RO 2399 i.SWIRE_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010ef8 0x00010ef8 0x00000018 Code RO 2400 i.SysTick_Handler CVWL568.lib(irq_redirect .o) + 0x00010f10 0x00010f10 0x00000018 Code RO 2401 i.TIMER0_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010f28 0x00010f28 0x00000018 Code RO 2402 i.TIMER1_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010f40 0x00010f40 0x00000018 Code RO 2403 i.TIMER2_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010f58 0x00010f58 0x00000018 Code RO 2404 i.TIMER3_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010f70 0x00010f70 0x0000001c Code RO 2707 i.UART0_IRQ_Handle CVWL568.lib(drv_uart.o) + 0x00010f8c 0x00010f8c 0x00000002 Code RO 2711 i.UART_DisableDma CVWL568.lib(drv_uart.o) + 0x00010f8e 0x00010f8e 0x00000004 Code RO 2717 i.UART_GetInstance CVWL568.lib(drv_uart.o) + 0x00010f92 0x00010f92 0x00000002 PAD + 0x00010f94 0x00010f94 0x00000018 Code RO 2405 i.UART_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010fac 0x00010fac 0x00000024 Code RO 2725 i.UART_ResetRxFIFO CVWL568.lib(drv_uart.o) + 0x00010fd0 0x00010fd0 0x0000001a Code RO 2729 i.UART_SwitchSCLK CVWL568.lib(drv_uart.o) + 0x00010fea 0x00010fea 0x0000000e Code RO 3199 i.__scatterload_copy mc_p.l(handlers.o) + 0x00010ff8 0x00010ff8 0x00000002 Code RO 3200 i.__scatterload_null mc_p.l(handlers.o) + 0x00010ffa 0x00010ffa 0x00000006 Code RO 579 i.app_tp_screen_analysis_const app_tp_for_custom_s21u.o + 0x00011000 0x00011000 0x00000014 Data RO 1306 .ARM.__at_0x11000 CVWL568.lib(drv_common.o) + 0x00011014 0x00011014 0x00000004 Code RO 1954 i.drv_dsi_rx_set_inten CVWL568.lib(drv_dsi_rx.o) + 0x00011018 0x00011018 0x00000004 Data RO 1307 .ARM.__at_0x11018 CVWL568.lib(drv_common.o) + 0x0001101c 0x0001101c 0x00000048 Code RO 2728 i.UART_SetBaudRate CVWL568.lib(drv_uart.o) + 0x00011064 0x00011064 0x00000134 Code RO 2731 i.UART_TransferHandleIRQ CVWL568.lib(drv_uart.o) + 0x00011198 0x00011198 0x0000001a Code RO 2733 i.UART_WriteBlocking CVWL568.lib(drv_uart.o) + 0x000111b2 0x000111b2 0x00000002 PAD + 0x000111b4 0x000111b4 0x000000bc Code RO 2734 i.UART_init CVWL568.lib(drv_uart.o) + 0x00011270 0x00011270 0x00000018 Code RO 2406 i.VIDC_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00011288 0x00011288 0x00000018 Code RO 2407 i.VPRE_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x000112a0 0x000112a0 0x00000018 Code RO 2408 i.WDG_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x000112b8 0x000112b8 0x00000020 Code RO 3086 i.__0printf mc_p.l(printfa.o) + 0x000112d8 0x000112d8 0x00000024 Code RO 3092 i.__0vsprintf mc_p.l(printfa.o) + 0x000112fc 0x000112fc 0x0000002e Code RO 3187 i.__ARM_clz mf_p.l(depilogue.o) + 0x0001132a 0x0001132a 0x0000001a Code RO 807 i.__ARM_common_switch8 CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00011344 0x00011344 0x00000018 Code RO 1627 i.__NVIC_ClearPendingIRQ CVWL568.lib(drv_i2c_master.o) + 0x0001135c 0x0001135c 0x00000018 Code RO 1790 i.__NVIC_ClearPendingIRQ CVWL568.lib(drv_spi_master.o) + 0x00011374 0x00011374 0x00000020 Code RO 2225 i.__NVIC_DisableIRQ CVWL568.lib(drv_rxbr.o) + 0x00011394 0x00011394 0x00000018 Code RO 2226 i.__NVIC_EnableIRQ CVWL568.lib(drv_rxbr.o) + 0x000113ac 0x000113ac 0x00000044 Code RO 2527 i.__NVIC_SetPriority CVWL568.lib(hal_spi_slave.o) + 0x000113f0 0x000113f0 0x0000000e Code RO 3201 i.__scatterload_zeroinit mc_p.l(handlers.o) + 0x000113fe 0x000113fe 0x00000002 PAD + 0x00011400 0x00011400 0x0000000c Code RO 3177 i.__set_errno mc_p.l(errno.o) + 0x0001140c 0x0001140c 0x00000174 Code RO 3093 i._fp_digits mc_p.l(printfa.o) + 0x00011580 0x00011580 0x000006ec Code RO 3094 i._printf_core mc_p.l(printfa.o) + 0x00011c6c 0x00011c6c 0x00000020 Code RO 3095 i._printf_post_padding mc_p.l(printfa.o) + 0x00011c8c 0x00011c8c 0x0000002c Code RO 3096 i._printf_pre_padding mc_p.l(printfa.o) + 0x00011cb8 0x00011cb8 0x0000000a Code RO 3098 i._sputc mc_p.l(printfa.o) + 0x00011cc2 0x00011cc2 0x00000002 PAD + 0x00011cc4 0x00011cc4 0x00000c9c Code RO 106 i.ap_dcs_read ap_demo.o + 0x00012960 0x00012960 0x000001dc Code RO 107 i.ap_demo ap_demo.o + 0x00012b3c 0x00012b3c 0x0000008c Code RO 108 i.ap_get_reg_df ap_demo.o + 0x00012bc8 0x00012bc8 0x00000020 Code RO 462 i.ap_get_tp_calibration_status_01 app_tp_st_touch.o + 0x00012be8 0x00012be8 0x00000060 Code RO 109 i.ap_reset_cb ap_demo.o + 0x00012c48 0x00012c48 0x00000048 Code RO 110 i.ap_set_backlight_51 ap_demo.o + 0x00012c90 0x00012c90 0x00000044 Code RO 111 i.ap_set_display_off ap_demo.o + 0x00012cd4 0x00012cd4 0x00000034 Code RO 112 i.ap_set_display_on ap_demo.o + 0x00012d08 0x00012d08 0x0000007c Code RO 113 i.ap_set_enter_sleep_mode ap_demo.o + 0x00012d84 0x00012d84 0x00000044 Code RO 114 i.ap_set_exit_sleep_mode ap_demo.o + 0x00012dc8 0x00012dc8 0x0000001c Code RO 115 i.ap_set_hbm_53 ap_demo.o + 0x00012de4 0x00012de4 0x00000098 Code RO 463 i.ap_set_tp_calibration_04 app_tp_st_touch.o + 0x00012e7c 0x00012e7c 0x000000b0 Code RO 464 i.ap_tp_st_touch_calibration app_tp_st_touch.o + 0x00012f2c 0x00012f2c 0x000000a8 Code RO 468 i.ap_tp_st_touch_get_calibration_success_mark app_tp_st_touch.o + 0x00012fd4 0x00012fd4 0x000000c4 Code RO 469 i.ap_tp_st_touch_hardware_reset app_tp_st_touch.o + 0x00013098 0x00013098 0x0000001c Code RO 470 i.ap_tp_st_touch_scan_point_init app_tp_st_touch.o + 0x000130b4 0x000130b4 0x00000050 Code RO 472 i.ap_tp_st_touch_scan_point_record_event_exec app_tp_st_touch.o + 0x00013104 0x00013104 0x00000034 Code RO 473 i.ap_tp_st_touch_simulate_finger_release_event app_tp_st_touch.o + 0x00013138 0x00013138 0x0000002c Code RO 116 i.ap_update_frame_rate ap_demo.o + 0x00013164 0x00013164 0x0000001c Code RO 2227 i.app_ADC_IRQn_Handler CVWL568.lib(drv_rxbr.o) + 0x00013180 0x00013180 0x00000024 Code RO 1551 i.app_AP_NRESET_IRQn_Handler CVWL568.lib(drv_gpio.o) + 0x000131a4 0x000131a4 0x0000001c Code RO 1552 i.app_EXTI_INT0_IRQn_Handler CVWL568.lib(drv_gpio.o) + 0x000131c0 0x000131c0 0x0000001c Code RO 1553 i.app_EXTI_INT1_IRQn_Handler CVWL568.lib(drv_gpio.o) + 0x000131dc 0x000131dc 0x0000001c Code RO 1554 i.app_EXTI_INT2_IRQn_Handler CVWL568.lib(drv_gpio.o) + 0x000131f8 0x000131f8 0x0000001c Code RO 1555 i.app_EXTI_INT3_IRQn_Handler CVWL568.lib(drv_gpio.o) + 0x00013214 0x00013214 0x0000001c Code RO 1556 i.app_EXTI_INT4_IRQn_Handler CVWL568.lib(drv_gpio.o) + 0x00013230 0x00013230 0x0000001c Code RO 1557 i.app_EXTI_INT5_IRQn_Handler CVWL568.lib(drv_gpio.o) + 0x0001324c 0x0001324c 0x0000001c Code RO 1558 i.app_EXTI_INT6_IRQn_Handler CVWL568.lib(drv_gpio.o) + 0x00013268 0x00013268 0x0000001c Code RO 1559 i.app_EXTI_INT7_IRQn_Handler CVWL568.lib(drv_gpio.o) + 0x00013284 0x00013284 0x00000048 Code RO 1298 i.app_HardFault_Handler CVWL568.lib(drv_common.o) + 0x000132cc 0x000132cc 0x00000018 Code RO 1662 i.app_I2C0_IRQn_Handler CVWL568.lib(drv_i2c_slave.o) + 0x000132e4 0x000132e4 0x00000010 Code RO 1628 i.app_I2C1_IRQn_Handler CVWL568.lib(drv_i2c_master.o) + 0x000132f4 0x000132f4 0x00000130 Code RO 1199 i.app_LCDC_IRQn_Handler CVWL568.lib(hal_internal_vsync.o) + 0x00013424 0x00013424 0x00000088 Code RO 2169 i.app_MEMC_IRQn_Handler CVWL568.lib(drv_memc.o) + 0x000134ac 0x000134ac 0x00000298 Code RO 1939 i.app_MIPI_RX_IRQn_Handler CVWL568.lib(drv_dsi_rx.o) + 0x00013744 0x00013744 0x000000a0 Code RO 1997 i.app_MIPI_TX_IRQn_Handler CVWL568.lib(drv_dsi_tx.o) + 0x000137e4 0x000137e4 0x00000048 Code RO 1711 i.app_PWMDET_IRQn_Handler CVWL568.lib(drv_pwm.o) + 0x0001382c 0x0001382c 0x00000030 Code RO 1791 i.app_SPIM_IRQn_Handler CVWL568.lib(drv_spi_master.o) + 0x0001385c 0x0001385c 0x00000200 Code RO 2528 i.app_SPIS_IRQn_Handler CVWL568.lib(hal_spi_slave.o) + 0x00013a5c 0x00013a5c 0x00000020 Code RO 1823 i.app_SWIRE_IRQn_Handler CVWL568.lib(drv_swire.o) + 0x00013a7c 0x00013a7c 0x00000018 Code RO 1299 i.app_SysTick_Handler CVWL568.lib(drv_common.o) + 0x00013a94 0x00013a94 0x0000000a Code RO 1873 i.app_TIMER0_IRQn_Handler CVWL568.lib(drv_timer.o) + 0x00013a9e 0x00013a9e 0x0000000a Code RO 1874 i.app_TIMER1_IRQn_Handler CVWL568.lib(drv_timer.o) + 0x00013aa8 0x00013aa8 0x0000000a Code RO 1875 i.app_TIMER2_IRQn_Handler CVWL568.lib(drv_timer.o) + 0x00013ab2 0x00013ab2 0x0000000a Code RO 1876 i.app_TIMER3_IRQn_Handler CVWL568.lib(drv_timer.o) + 0x00013abc 0x00013abc 0x00000008 Code RO 2735 i.app_UART_IRQn_Handler CVWL568.lib(drv_uart.o) + 0x00013ac4 0x00013ac4 0x0000001c Code RO 2298 i.app_VIDC_IRQn_Handler CVWL568.lib(drv_vidc.o) + 0x00013ae0 0x00013ae0 0x0000001c Code RO 2228 i.app_VPRE_IRQn_Handler CVWL568.lib(drv_rxbr.o) + 0x00013afc 0x00013afc 0x00000038 Code RO 2794 i.app_WDG_IRQn_Handler CVWL568.lib(drv_wdg.o) + 0x00013b34 0x00013b34 0x00000010 Code RO 1413 i.app_dma_irq_handler CVWL568.lib(drv_dma.o) + 0x00013b44 0x00013b44 0x00000030 Code RO 2570 i.app_fls_ctrl_Handler CVWL568.lib(norflash.o) + 0x00013b74 0x00013b74 0x00000024 Code RO 311 i.app_tp_I2C_init app_tp_transfer.o + 0x00013b98 0x00013b98 0x000000a8 Code RO 475 i.app_tp_calibration_exec app_tp_st_touch.o + 0x00013c40 0x00013c40 0x00000048 Code RO 312 i.app_tp_i2cs_callback app_tp_transfer.o + 0x00013c88 0x00013c88 0x00000054 Code RO 313 i.app_tp_init app_tp_transfer.o + 0x00013cdc 0x00013cdc 0x00000020 Code RO 314 i.app_tp_m_read app_tp_transfer.o + 0x00013cfc 0x00013cfc 0x00000008 Code RO 316 i.app_tp_m_write app_tp_transfer.o + 0x00013d04 0x00013d04 0x000003bc Code RO 578 i.app_tp_phone_analysis_data app_tp_for_custom_s21u.o + 0x000140c0 0x000140c0 0x00000008 Code RO 319 i.app_tp_s_read app_tp_transfer.o + 0x000140c8 0x000140c8 0x00000008 Code RO 321 i.app_tp_s_write app_tp_transfer.o + 0x000140d0 0x000140d0 0x000001f0 Code RO 580 i.app_tp_screen_analysis_int app_tp_for_custom_s21u.o + 0x000142c0 0x000142c0 0x000000a0 Code RO 581 i.app_tp_screen_analysis_wake_up app_tp_for_custom_s21u.o + 0x00014360 0x00014360 0x000000f4 Code RO 582 i.app_tp_screen_analysis_wake_up_exec app_tp_for_custom_s21u.o + 0x00014454 0x00014454 0x00000038 Code RO 322 i.app_tp_screen_init app_tp_transfer.o + 0x0001448c 0x0001448c 0x0000000c Code RO 323 i.app_tp_screen_int_callback app_tp_transfer.o + 0x00014498 0x00014498 0x000000bc Code RO 324 i.app_tp_transfer_screen_const app_tp_transfer.o + 0x00014554 0x00014554 0x0000008c Code RO 325 i.app_tp_transfer_screen_int app_tp_transfer.o + 0x000145e0 0x000145e0 0x00000034 Code RO 326 i.app_tp_transfer_screen_restart app_tp_transfer.o + 0x00014614 0x00014614 0x00000008 Code RO 327 i.app_tp_transfer_screen_start app_tp_transfer.o + 0x0001461c 0x0001461c 0x00000014 Code RO 328 i.app_tp_transfer_screen_start_init app_tp_transfer.o + 0x00014630 0x00014630 0x00000024 Code RO 687 i.board_Init board.o + 0x00014654 0x00014654 0x0000058c Code RO 1200 i.calc_framebuffer_setting CVWL568.lib(hal_internal_vsync.o) + 0x00014be0 0x00014be0 0x000000c8 Code RO 2829 i.ceil m_ps.l(ceil.o) + 0x00014ca8 0x00014ca8 0x0000002c Code RO 1201 i.check_mipi_rx_tx_video_info CVWL568.lib(hal_internal_vsync.o) + 0x00014cd4 0x00014cd4 0x00000084 Code RO 1202 i.check_pkt_buf_rev CVWL568.lib(hal_internal_vsync.o) + 0x00014d58 0x00014d58 0x00000058 Code RO 2817 i.dcs_packet_fifo_alloc CVWL568.lib(dcs_packet_fifo.o) + 0x00014db0 0x00014db0 0x00000018 Code RO 2818 i.dcs_packet_fifo_init CVWL568.lib(dcs_packet_fifo.o) + 0x00014dc8 0x00014dc8 0x00000044 Code RO 2819 i.dcs_packet_free_fifo_header CVWL568.lib(dcs_packet_fifo.o) + 0x00014e0c 0x00014e0c 0x00000024 Code RO 2820 i.dcs_packet_get_fifo_header CVWL568.lib(dcs_packet_fifo.o) + 0x00014e30 0x00014e30 0x0000002c Code RO 1203 i.dcs_sw_filter CVWL568.lib(hal_internal_vsync.o) + 0x00014e5c 0x00014e5c 0x00000018 Code RO 1161 i.delayMs CVWL568.lib(tau_delay.o) + 0x00014e74 0x00014e74 0x00000022 Code RO 1162 i.delayUs CVWL568.lib(tau_delay.o) + 0x00014e96 0x00014e96 0x00000002 PAD + 0x00014e98 0x00014e98 0x00000038 Code RO 1842 i.drv_ap_rst_trig_edge_detect CVWL568.lib(drv_sys_cfg.o) + 0x00014ed0 0x00014ed0 0x0000000c Code RO 2498 i.drv_chip_info_get_info CVWL568.lib(drv_chip_info.o) + 0x00014edc 0x00014edc 0x00000040 Code RO 2499 i.drv_chip_info_init CVWL568.lib(drv_chip_info.o) + 0x00014f1c 0x00014f1c 0x000000b0 Code RO 2500 i.drv_chip_rx_info_check CVWL568.lib(drv_chip_info.o) + 0x00014fcc 0x00014fcc 0x00000014 Code RO 2501 i.drv_chip_rx_init_done CVWL568.lib(drv_chip_info.o) + 0x00014fe0 0x00014fe0 0x00000058 Code RO 1301 i.drv_common_enable_systick CVWL568.lib(drv_common.o) + 0x00015038 0x00015038 0x0000000c Code RO 1302 i.drv_common_get_tick CVWL568.lib(drv_common.o) + 0x00015044 0x00015044 0x00000008 Code RO 1304 i.drv_common_system_init CVWL568.lib(drv_common.o) + 0x0001504c 0x0001504c 0x00000010 Code RO 1326 i.drv_crgu_config_reset_modules CVWL568.lib(drv_crgu.o) + 0x0001505c 0x0001505c 0x00000014 Code RO 1339 i.drv_crgu_set_ahb_pre_div CVWL568.lib(drv_crgu.o) + 0x00015070 0x00015070 0x00000014 Code RO 1340 i.drv_crgu_set_ahb_src CVWL568.lib(drv_crgu.o) + 0x00015084 0x00015084 0x00000020 Code RO 1343 i.drv_crgu_set_clock CVWL568.lib(drv_crgu.o) + 0x000150a4 0x000150a4 0x00000014 Code RO 1344 i.drv_crgu_set_dpi_mux_src CVWL568.lib(drv_crgu.o) + 0x000150b8 0x000150b8 0x00000018 Code RO 1345 i.drv_crgu_set_dpi_pre_div CVWL568.lib(drv_crgu.o) + 0x000150d0 0x000150d0 0x00000014 Code RO 1346 i.drv_crgu_set_dpi_pre_src CVWL568.lib(drv_crgu.o) + 0x000150e4 0x000150e4 0x00000014 Code RO 1347 i.drv_crgu_set_dsc_core_div CVWL568.lib(drv_crgu.o) + 0x000150f8 0x000150f8 0x00000014 Code RO 1348 i.drv_crgu_set_dsco_src CVWL568.lib(drv_crgu.o) + 0x0001510c 0x0001510c 0x00000014 Code RO 1349 i.drv_crgu_set_dsco_src_div CVWL568.lib(drv_crgu.o) + 0x00015120 0x00015120 0x00000014 Code RO 1350 i.drv_crgu_set_fb_div CVWL568.lib(drv_crgu.o) + 0x00015134 0x00015134 0x00000014 Code RO 1351 i.drv_crgu_set_fb_src CVWL568.lib(drv_crgu.o) + 0x00015148 0x00015148 0x00000014 Code RO 1354 i.drv_crgu_set_lcdc_div CVWL568.lib(drv_crgu.o) + 0x0001515c 0x0001515c 0x00000014 Code RO 1355 i.drv_crgu_set_lcdc_src CVWL568.lib(drv_crgu.o) + 0x00015170 0x00015170 0x00000014 Code RO 1356 i.drv_crgu_set_mipi_cfg_src CVWL568.lib(drv_crgu.o) + 0x00015184 0x00015184 0x00000018 Code RO 1357 i.drv_crgu_set_mipi_ref_src CVWL568.lib(drv_crgu.o) + 0x0001519c 0x0001519c 0x00000018 Code RO 1360 i.drv_crgu_set_reset CVWL568.lib(drv_crgu.o) + 0x000151b4 0x000151b4 0x00000014 Code RO 1361 i.drv_crgu_set_rxbr_div CVWL568.lib(drv_crgu.o) + 0x000151c8 0x000151c8 0x00000014 Code RO 1362 i.drv_crgu_set_rxbr_src CVWL568.lib(drv_crgu.o) + 0x000151dc 0x000151dc 0x00000014 Code RO 1363 i.drv_crgu_set_swire_div CVWL568.lib(drv_crgu.o) + 0x000151f0 0x000151f0 0x00000014 Code RO 1364 i.drv_crgu_set_vidc_src CVWL568.lib(drv_crgu.o) + 0x00015204 0x00015204 0x00000018 Code RO 1417 i.drv_dma_clear_flag CVWL568.lib(drv_dma.o) + 0x0001521c 0x0001521c 0x0000001c Code RO 1418 i.drv_dma_create_handle CVWL568.lib(drv_dma.o) + 0x00015238 0x00015238 0x00000010 Code RO 1420 i.drv_dma_disenable_channel CVWL568.lib(drv_dma.o) + 0x00015248 0x00015248 0x00000010 Code RO 1422 i.drv_dma_enable_channel CVWL568.lib(drv_dma.o) + 0x00015258 0x00015258 0x00000024 Code RO 1423 i.drv_dma_enable_channel_interrupts CVWL568.lib(drv_dma.o) + 0x0001527c 0x0001527c 0x0000000c Code RO 1425 i.drv_dma_get_channel_flag CVWL568.lib(drv_dma.o) + 0x00015288 0x00015288 0x00000090 Code RO 1428 i.drv_dma_irq_handler CVWL568.lib(drv_dma.o) + 0x00015318 0x00015318 0x00000012 Code RO 1430 i.drv_dma_prepar_transfer CVWL568.lib(drv_dma.o) + 0x0001532a 0x0001532a 0x0000001a Code RO 1432 i.drv_dma_set_burst CVWL568.lib(drv_dma.o) + 0x00015344 0x00015344 0x00000006 Code RO 1433 i.drv_dma_set_callback CVWL568.lib(drv_dma.o) + 0x0001534a 0x0001534a 0x00000002 PAD + 0x0001534c 0x0001534c 0x00000044 Code RO 1435 i.drv_dma_set_transfer CVWL568.lib(drv_dma.o) + 0x00015390 0x00015390 0x00000036 Code RO 2511 i.drv_dsc_dec_convert_pps_rc_parameter CVWL568.lib(drv_dsc_dec.o) + 0x000153c6 0x000153c6 0x0000000c Code RO 2512 i.drv_dsc_dec_disable CVWL568.lib(drv_dsc_dec.o) + 0x000153d2 0x000153d2 0x00000002 PAD + 0x000153d4 0x000153d4 0x00000074 Code RO 2513 i.drv_dsc_dec_enable CVWL568.lib(drv_dsc_dec.o) + 0x00015448 0x00015448 0x0000000a Code RO 2514 i.drv_dsc_dec_get_nslc CVWL568.lib(drv_dsc_dec.o) + 0x00015452 0x00015452 0x00000028 Code RO 2516 i.drv_dsc_dec_set_u8_pps CVWL568.lib(drv_dsc_dec.o) + 0x0001547a 0x0001547a 0x00000002 PAD + 0x0001547c 0x0001547c 0x00000104 Code RO 1940 i.drv_dsi_rx_calc_ipi_tx_delay CVWL568.lib(drv_dsi_rx.o) + 0x00015580 0x00015580 0x00000040 Code RO 1941 i.drv_dsi_rx_enable_irq CVWL568.lib(drv_dsi_rx.o) + 0x000155c0 0x000155c0 0x0000000e Code RO 1942 i.drv_dsi_rx_get_bta_status CVWL568.lib(drv_dsi_rx.o) + 0x000155ce 0x000155ce 0x00000002 PAD + 0x000155d0 0x000155d0 0x00000050 Code RO 1943 i.drv_dsi_rx_get_color_bpp CVWL568.lib(drv_dsi_rx.o) + 0x00015620 0x00015620 0x0000001c Code RO 1944 i.drv_dsi_rx_get_color_pcc CVWL568.lib(drv_dsi_rx.o) + 0x0001563c 0x0001563c 0x00000008 Code RO 1945 i.drv_dsi_rx_get_compression_en CVWL568.lib(drv_dsi_rx.o) + 0x00015644 0x00015644 0x00000006 Code RO 1946 i.drv_dsi_rx_get_max_ret_size CVWL568.lib(drv_dsi_rx.o) + 0x0001564a 0x0001564a 0x0000000e Code RO 1950 i.drv_dsi_rx_power_up CVWL568.lib(drv_dsi_rx.o) + 0x00015658 0x00015658 0x00000020 Code RO 1951 i.drv_dsi_rx_set_ctrl_cfg CVWL568.lib(drv_dsi_rx.o) + 0x00015678 0x00015678 0x00000010 Code RO 1952 i.drv_dsi_rx_set_ddi_cfg CVWL568.lib(drv_dsi_rx.o) + 0x00015688 0x00015688 0x00000010 Code RO 1955 i.drv_dsi_rx_set_ipi_cfg CVWL568.lib(drv_dsi_rx.o) + 0x00015698 0x00015698 0x00000046 Code RO 1957 i.drv_dsi_rx_set_lane_swap CVWL568.lib(drv_dsi_rx.o) + 0x000156de 0x000156de 0x00000026 Code RO 1958 i.drv_dsi_rx_set_resp_cnt CVWL568.lib(drv_dsi_rx.o) + 0x00015704 0x00015704 0x00000104 Code RO 1959 i.drv_dsi_rx_set_up_phy CVWL568.lib(drv_dsi_rx.o) + 0x00015808 0x00015808 0x0000000e Code RO 1960 i.drv_dsi_rx_shut_down CVWL568.lib(drv_dsi_rx.o) + 0x00015816 0x00015816 0x00000014 Code RO 1999 i.drv_dsi_tx_command_header CVWL568.lib(drv_dsi_tx.o) + 0x0001582a 0x0001582a 0x0000006c Code RO 2000 i.drv_dsi_tx_command_mode_cfg CVWL568.lib(drv_dsi_tx.o) + 0x00015896 0x00015896 0x00000004 Code RO 2001 i.drv_dsi_tx_command_put_payload CVWL568.lib(drv_dsi_tx.o) + 0x0001589a 0x0001589a 0x00000018 Code RO 2002 i.drv_dsi_tx_config_eotp CVWL568.lib(drv_dsi_tx.o) + 0x000158b2 0x000158b2 0x00000008 Code RO 2003 i.drv_dsi_tx_config_int CVWL568.lib(drv_dsi_tx.o) + 0x000158ba 0x000158ba 0x00000008 Code RO 2004 i.drv_dsi_tx_dpi_lpcmd_time CVWL568.lib(drv_dsi_tx.o) + 0x000158c2 0x000158c2 0x0000000a Code RO 2005 i.drv_dsi_tx_dpi_mode CVWL568.lib(drv_dsi_tx.o) + 0x000158cc 0x000158cc 0x00000024 Code RO 2006 i.drv_dsi_tx_dpi_polarity CVWL568.lib(drv_dsi_tx.o) + 0x000158f0 0x000158f0 0x00000004 Code RO 2007 i.drv_dsi_tx_edpi_cmd_size CVWL568.lib(drv_dsi_tx.o) + 0x000158f4 0x000158f4 0x00000004 Code RO 2009 i.drv_dsi_tx_get_cmd_status CVWL568.lib(drv_dsi_tx.o) + 0x000158f8 0x000158f8 0x00000004 Code RO 2011 i.drv_dsi_tx_mode CVWL568.lib(drv_dsi_tx.o) + 0x000158fc 0x000158fc 0x00000018 Code RO 2012 i.drv_dsi_tx_phy_clock_lane_auto_lp CVWL568.lib(drv_dsi_tx.o) + 0x00015914 0x00015914 0x0000001a Code RO 2013 i.drv_dsi_tx_phy_clock_lane_req_hs CVWL568.lib(drv_dsi_tx.o) + 0x0001592e 0x0001592e 0x0000000c Code RO 2015 i.drv_dsi_tx_phy_lane_mode CVWL568.lib(drv_dsi_tx.o) + 0x0001593a 0x0001593a 0x00000064 Code RO 2019 i.drv_dsi_tx_phy_status_ready CVWL568.lib(drv_dsi_tx.o) + 0x0001599e 0x0001599e 0x0000003e Code RO 2020 i.drv_dsi_tx_phy_status_stopstate CVWL568.lib(drv_dsi_tx.o) + 0x000159dc 0x000159dc 0x00000134 Code RO 2022 i.drv_dsi_tx_phy_test_setup CVWL568.lib(drv_dsi_tx.o) + 0x00015b10 0x00015b10 0x0000001e Code RO 2023 i.drv_dsi_tx_phy_time_cfg CVWL568.lib(drv_dsi_tx.o) + 0x00015b2e 0x00015b2e 0x00000008 Code RO 2027 i.drv_dsi_tx_powerup CVWL568.lib(drv_dsi_tx.o) + 0x00015b36 0x00015b36 0x0000001c Code RO 2028 i.drv_dsi_tx_response_mode CVWL568.lib(drv_dsi_tx.o) + 0x00015b52 0x00015b52 0x00000018 Code RO 2031 i.drv_dsi_tx_set_bta_ack CVWL568.lib(drv_dsi_tx.o) + 0x00015b6a 0x00015b6a 0x0000000c Code RO 2032 i.drv_dsi_tx_set_esc_div CVWL568.lib(drv_dsi_tx.o) + 0x00015b76 0x00015b76 0x00000002 PAD + 0x00015b78 0x00015b78 0x00000040 Code RO 2033 i.drv_dsi_tx_set_int CVWL568.lib(drv_dsi_tx.o) + 0x00015bb8 0x00015bb8 0x00000010 Code RO 2034 i.drv_dsi_tx_set_time_out_div CVWL568.lib(drv_dsi_tx.o) + 0x00015bc8 0x00015bc8 0x00000008 Code RO 2035 i.drv_dsi_tx_set_video_chunk CVWL568.lib(drv_dsi_tx.o) + 0x00015bd0 0x00015bd0 0x00000022 Code RO 2036 i.drv_dsi_tx_set_video_timing CVWL568.lib(drv_dsi_tx.o) + 0x00015bf2 0x00015bf2 0x00000008 Code RO 2038 i.drv_dsi_tx_shutdown CVWL568.lib(drv_dsi_tx.o) + 0x00015bfa 0x00015bfa 0x00000026 Code RO 2039 i.drv_dsi_tx_timeout_cfg CVWL568.lib(drv_dsi_tx.o) + 0x00015c20 0x00015c20 0x000000aa Code RO 2042 i.drv_dsi_tx_video_mode_cfg CVWL568.lib(drv_dsi_tx.o) + 0x00015cca 0x00015cca 0x00000016 Code RO 2043 i.drv_dsi_tx_video_mode_disable_hact_cmd CVWL568.lib(drv_dsi_tx.o) + 0x00015ce0 0x00015ce0 0x00000018 Code RO 2044 i.drv_dsi_tx_video_mode_set_lp_cmd CVWL568.lib(drv_dsi_tx.o) + 0x00015cf8 0x00015cf8 0x0000002e Code RO 2449 i.drv_efuse_enter_inactive CVWL568.lib(drv_efuse.o) + 0x00015d26 0x00015d26 0x0000000c Code RO 2452 i.drv_efuse_int_enable CVWL568.lib(drv_efuse.o) + 0x00015d32 0x00015d32 0x00000032 Code RO 2453 i.drv_efuse_read CVWL568.lib(drv_efuse.o) + 0x00015d64 0x00015d64 0x00000018 Code RO 2454 i.drv_efuse_read_req CVWL568.lib(drv_efuse.o) + 0x00015d7c 0x00015d7c 0x00000018 Code RO 1560 i.drv_gpio_get_input_data CVWL568.lib(drv_gpio.o) + 0x00015d94 0x00015d94 0x0000000c Code RO 1562 i.drv_gpio_register_ap_reset_callback CVWL568.lib(drv_gpio.o) + 0x00015da0 0x00015da0 0x00000014 Code RO 1563 i.drv_gpio_register_callback CVWL568.lib(drv_gpio.o) + 0x00015db4 0x00015db4 0x00000050 Code RO 1565 i.drv_gpio_set_int CVWL568.lib(drv_gpio.o) + 0x00015e04 0x00015e04 0x00000020 Code RO 1566 i.drv_gpio_set_ioe CVWL568.lib(drv_gpio.o) + 0x00015e24 0x00015e24 0x00000010 Code RO 1567 i.drv_gpio_set_mode0 CVWL568.lib(drv_gpio.o) + 0x00015e34 0x00015e34 0x00000010 Code RO 1568 i.drv_gpio_set_mode1 CVWL568.lib(drv_gpio.o) + 0x00015e44 0x00015e44 0x00000010 Code RO 1569 i.drv_gpio_set_mode2 CVWL568.lib(drv_gpio.o) + 0x00015e54 0x00015e54 0x00000010 Code RO 1570 i.drv_gpio_set_mode3 CVWL568.lib(drv_gpio.o) + 0x00015e64 0x00015e64 0x00000020 Code RO 917 i.drv_gpio_set_output_data CVWL568.lib(hal_gpio.o) + 0x00015e84 0x00015e84 0x00000130 Code RO 1571 i.drv_gpio_set_pull_state CVWL568.lib(drv_gpio.o) + 0x00015fb4 0x00015fb4 0x0000000c Code RO 1663 i.drv_i2c0_set_callback CVWL568.lib(drv_i2c_slave.o) + 0x00015fc0 0x00015fc0 0x0000000c Code RO 1629 i.drv_i2c1_set_callback CVWL568.lib(drv_i2c_master.o) + 0x00015fcc 0x00015fcc 0x00000034 Code RO 1603 i.drv_i2c_dma_callback CVWL568.lib(drv_i2c_dma.o) + 0x00016000 0x00016000 0x000000ac Code RO 1604 i.drv_i2c_dma_init CVWL568.lib(drv_i2c_dma.o) + 0x000160ac 0x000160ac 0x0000001a Code RO 1605 i.drv_i2c_enable_rx_dma CVWL568.lib(drv_i2c_dma.o) + 0x000160c6 0x000160c6 0x00000018 Code RO 1606 i.drv_i2c_enable_tx_dma CVWL568.lib(drv_i2c_dma.o) + 0x000160de 0x000160de 0x00000002 PAD + 0x000160e0 0x000160e0 0x00000060 Code RO 1631 i.drv_i2c_m_clear_it_pending_bit CVWL568.lib(drv_i2c_master.o) + 0x00016140 0x00016140 0x00000010 Code RO 1634 i.drv_i2c_m_enable CVWL568.lib(drv_i2c_master.o) + 0x00016150 0x00016150 0x00000038 Code RO 1635 i.drv_i2c_m_enable_intr CVWL568.lib(drv_i2c_master.o) + 0x00016188 0x00016188 0x0000008c Code RO 1641 i.drv_i2c_master_init CVWL568.lib(drv_i2c_master.o) + 0x00016214 0x00016214 0x0000005c Code RO 1607 i.drv_i2c_master_read_dma CVWL568.lib(drv_i2c_dma.o) + 0x00016270 0x00016270 0x0000003c Code RO 1608 i.drv_i2c_master_write_dma CVWL568.lib(drv_i2c_dma.o) + 0x000162ac 0x000162ac 0x0000003e Code RO 1609 i.drv_i2c_master_write_read_cmd CVWL568.lib(drv_i2c_dma.o) + 0x000162ea 0x000162ea 0x00000042 Code RO 1664 i.drv_i2c_s_clear_it_pending_bit CVWL568.lib(drv_i2c_slave.o) + 0x0001632c 0x0001632c 0x00000004 Code RO 1665 i.drv_i2c_s_config_intr CVWL568.lib(drv_i2c_slave.o) + 0x00016330 0x00016330 0x00000008 Code RO 1666 i.drv_i2c_s_enable CVWL568.lib(drv_i2c_slave.o) + 0x00016338 0x00016338 0x00000014 Code RO 1667 i.drv_i2c_s_get_fifo_status CVWL568.lib(drv_i2c_slave.o) + 0x0001634c 0x0001634c 0x00000050 Code RO 1670 i.drv_i2c_s_set_intr CVWL568.lib(drv_i2c_slave.o) + 0x0001639c 0x0001639c 0x0000001c Code RO 1671 i.drv_i2c_s_write_data CVWL568.lib(drv_i2c_slave.o) + 0x000163b8 0x000163b8 0x00000058 Code RO 1610 i.drv_i2c_set_dma_irq_callback CVWL568.lib(drv_i2c_dma.o) + 0x00016410 0x00016410 0x00000032 Code RO 1672 i.drv_i2c_slave_init CVWL568.lib(drv_i2c_slave.o) + 0x00016442 0x00016442 0x00000002 PAD + 0x00016444 0x00016444 0x00000018 Code RO 1611 i.drv_i2c_slave_write_dma CVWL568.lib(drv_i2c_dma.o) + 0x0001645c 0x0001645c 0x00000018 Code RO 2111 i.drv_lcdc_config_bypass CVWL568.lib(drv_lcdc.o) + 0x00016474 0x00016474 0x00000030 Code RO 2112 i.drv_lcdc_config_ccm CVWL568.lib(drv_lcdc.o) + 0x000164a4 0x000164a4 0x00000016 Code RO 2113 i.drv_lcdc_config_disp_mode CVWL568.lib(drv_lcdc.o) + 0x000164ba 0x000164ba 0x00000024 Code RO 2114 i.drv_lcdc_config_dpi_polarity CVWL568.lib(drv_lcdc.o) + 0x000164de 0x000164de 0x00000026 Code RO 2115 i.drv_lcdc_config_dpi_timing CVWL568.lib(drv_lcdc.o) + 0x00016504 0x00016504 0x00000016 Code RO 2116 i.drv_lcdc_config_edpi_mode CVWL568.lib(drv_lcdc.o) + 0x0001651a 0x0001651a 0x00000016 Code RO 2117 i.drv_lcdc_config_endianness CVWL568.lib(drv_lcdc.o) + 0x00016530 0x00016530 0x0000000c Code RO 2118 i.drv_lcdc_config_input_size CVWL568.lib(drv_lcdc.o) + 0x0001653c 0x0001653c 0x0000001e Code RO 2119 i.drv_lcdc_config_int CVWL568.lib(drv_lcdc.o) + 0x0001655a 0x0001655a 0x00000022 Code RO 2120 i.drv_lcdc_config_int_single CVWL568.lib(drv_lcdc.o) + 0x0001657c 0x0001657c 0x00000022 Code RO 2121 i.drv_lcdc_config_overwrite CVWL568.lib(drv_lcdc.o) + 0x0001659e 0x0001659e 0x0000000c Code RO 2122 i.drv_lcdc_config_overwrite_rgb CVWL568.lib(drv_lcdc.o) + 0x000165aa 0x000165aa 0x0000001a Code RO 2123 i.drv_lcdc_config_partial_display_area CVWL568.lib(drv_lcdc.o) + 0x000165c4 0x000165c4 0x00000022 Code RO 2124 i.drv_lcdc_config_partial_display_enable CVWL568.lib(drv_lcdc.o) + 0x000165e6 0x000165e6 0x0000001a Code RO 2126 i.drv_lcdc_config_scale_up_coef CVWL568.lib(drv_lcdc.o) + 0x00016600 0x00016600 0x0000000c Code RO 2127 i.drv_lcdc_config_scale_up_step CVWL568.lib(drv_lcdc.o) + 0x0001660c 0x0001660c 0x0000004c Code RO 2128 i.drv_lcdc_config_src_parameter CVWL568.lib(drv_lcdc.o) + 0x00016658 0x00016658 0x00000006 Code RO 2129 i.drv_lcdc_config_thresh CVWL568.lib(drv_lcdc.o) + 0x0001665e 0x0001665e 0x00000012 Code RO 2130 i.drv_lcdc_ctrl_flow CVWL568.lib(drv_lcdc.o) + 0x00016670 0x00016670 0x00000020 Code RO 2132 i.drv_lcdc_enable_shadow_reg CVWL568.lib(drv_lcdc.o) + 0x00016690 0x00016690 0x00000040 Code RO 2133 i.drv_lcdc_set_int CVWL568.lib(drv_lcdc.o) + 0x000166d0 0x000166d0 0x00000018 Code RO 2134 i.drv_lcdc_set_prefetch CVWL568.lib(drv_lcdc.o) + 0x000166e8 0x000166e8 0x00000014 Code RO 2135 i.drv_lcdc_set_video_hw_mode CVWL568.lib(drv_lcdc.o) + 0x000166fc 0x000166fc 0x00000020 Code RO 2136 i.drv_lcdc_start CVWL568.lib(drv_lcdc.o) + 0x0001671c 0x0001671c 0x0000000c Code RO 2170 i.drv_memc_clear_status CVWL568.lib(drv_memc.o) + 0x00016728 0x00016728 0x00000040 Code RO 2171 i.drv_memc_enable_irq CVWL568.lib(drv_memc.o) + 0x00016768 0x00016768 0x0000000c Code RO 2172 i.drv_memc_gen_a_tear_signal CVWL568.lib(drv_memc.o) + 0x00016774 0x00016774 0x00000012 Code RO 2173 i.drv_memc_get_status CVWL568.lib(drv_memc.o) + 0x00016786 0x00016786 0x00000010 Code RO 2174 i.drv_memc_rate_transfer_sel CVWL568.lib(drv_memc.o) + 0x00016796 0x00016796 0x0000000e Code RO 2175 i.drv_memc_sel_vsync CVWL568.lib(drv_memc.o) + 0x000167a4 0x000167a4 0x00000014 Code RO 2176 i.drv_memc_set_active_height CVWL568.lib(drv_memc.o) + 0x000167b8 0x000167b8 0x0000000c Code RO 2177 i.drv_memc_set_data_mode CVWL568.lib(drv_memc.o) + 0x000167c4 0x000167c4 0x00000010 Code RO 2180 i.drv_memc_set_double_buffer CVWL568.lib(drv_memc.o) + 0x000167d4 0x000167d4 0x00000012 Code RO 2181 i.drv_memc_set_double_buffer_reverse CVWL568.lib(drv_memc.o) + 0x000167e6 0x000167e6 0x00000010 Code RO 2183 i.drv_memc_set_fs_en_conditions CVWL568.lib(drv_memc.o) + 0x000167f6 0x000167f6 0x00000014 Code RO 2184 i.drv_memc_set_inten CVWL568.lib(drv_memc.o) + 0x0001680a 0x0001680a 0x00000002 PAD + 0x0001680c 0x0001680c 0x00000018 Code RO 2185 i.drv_memc_set_lcdc_st_conditions CVWL568.lib(drv_memc.o) + 0x00016824 0x00016824 0x0000001a Code RO 2186 i.drv_memc_set_ltpo_mode CVWL568.lib(drv_memc.o) + 0x0001683e 0x0001683e 0x0000000e Code RO 2190 i.drv_memc_set_tear_mode CVWL568.lib(drv_memc.o) + 0x0001684c 0x0001684c 0x00000028 Code RO 2191 i.drv_memc_set_tear_waveform CVWL568.lib(drv_memc.o) + 0x00016874 0x00016874 0x0000000e Code RO 2193 i.drv_memc_set_vidc_sync_cnt CVWL568.lib(drv_memc.o) + 0x00016882 0x00016882 0x00000002 PAD + 0x00016884 0x00016884 0x00000008 Code RO 1689 i.drv_param_init_get_ccm CVWL568.lib(drv_param_init.o) + 0x0001688c 0x0001688c 0x00000014 Code RO 1690 i.drv_param_init_get_scld_filter_h CVWL568.lib(drv_param_init.o) + 0x000168a0 0x000168a0 0x00000014 Code RO 1691 i.drv_param_init_get_scld_filter_v CVWL568.lib(drv_param_init.o) + 0x000168b4 0x000168b4 0x00000008 Code RO 1692 i.drv_param_init_get_sclu_filter CVWL568.lib(drv_param_init.o) + 0x000168bc 0x000168bc 0x00000014 Code RO 1693 i.drv_param_init_set_ccm CVWL568.lib(drv_param_init.o) + 0x000168d0 0x000168d0 0x00000064 Code RO 1694 i.drv_param_init_set_scld_filter CVWL568.lib(drv_param_init.o) + 0x00016934 0x00016934 0x00000024 Code RO 1696 i.drv_param_p2r_filter_init CVWL568.lib(drv_param_init.o) + 0x00016958 0x00016958 0x00000010 Code RO 2470 i.drv_phy_enable_calibration CVWL568.lib(drv_phy_common.o) + 0x00016968 0x00016968 0x0000003c Code RO 2471 i.drv_phy_get_calibration CVWL568.lib(drv_phy_common.o) + 0x000169a4 0x000169a4 0x00000060 Code RO 2472 i.drv_phy_get_pll_para CVWL568.lib(drv_phy_common.o) + 0x00016a04 0x00016a04 0x00000054 Code RO 2473 i.drv_phy_get_rate_para CVWL568.lib(drv_phy_common.o) + 0x00016a58 0x00016a58 0x00000010 Code RO 2474 i.drv_phy_test_clear CVWL568.lib(drv_phy_common.o) + 0x00016a68 0x00016a68 0x00000018 Code RO 2475 i.drv_phy_test_lock CVWL568.lib(drv_phy_common.o) + 0x00016a80 0x00016a80 0x00000020 Code RO 2477 i.drv_phy_test_write_1_byte CVWL568.lib(drv_phy_common.o) + 0x00016aa0 0x00016aa0 0x00000026 Code RO 2478 i.drv_phy_test_write_2_byte CVWL568.lib(drv_phy_common.o) + 0x00016ac6 0x00016ac6 0x0000001e Code RO 2479 i.drv_phy_test_write_code CVWL568.lib(drv_phy_common.o) + 0x00016ae4 0x00016ae4 0x00000020 Code RO 2480 i.drv_phy_test_write_data CVWL568.lib(drv_phy_common.o) + 0x00016b04 0x00016b04 0x00000020 Code RO 1751 i.drv_pwr_set_cp_mode CVWL568.lib(drv_pwr.o) + 0x00016b24 0x00016b24 0x00000018 Code RO 1753 i.drv_pwr_set_pvd_mode CVWL568.lib(drv_pwr.o) + 0x00016b3c 0x00016b3c 0x00000038 Code RO 1754 i.drv_pwr_set_system_clk_src CVWL568.lib(drv_pwr.o) + 0x00016b74 0x00016b74 0x0000000c Code RO 1961 i.drv_rx_phy_test_clear CVWL568.lib(drv_dsi_rx.o) + 0x00016b80 0x00016b80 0x00000010 Code RO 1962 i.drv_rx_phy_test_lock CVWL568.lib(drv_dsi_rx.o) + 0x00016b90 0x00016b90 0x00000014 Code RO 1964 i.drv_rx_phy_test_write_1_byte CVWL568.lib(drv_dsi_rx.o) + 0x00016ba4 0x00016ba4 0x00000016 Code RO 1965 i.drv_rx_phy_test_write_2_byte CVWL568.lib(drv_dsi_rx.o) + 0x00016bba 0x00016bba 0x0000000a Code RO 2229 i.drv_rxbr_clear_pkt_buffer CVWL568.lib(drv_rxbr.o) + 0x00016bc4 0x00016bc4 0x00000004 Code RO 2230 i.drv_rxbr_clear_status0 CVWL568.lib(drv_rxbr.o) + 0x00016bc8 0x00016bc8 0x0000005a Code RO 2232 i.drv_rxbr_enable_irq CVWL568.lib(drv_rxbr.o) + 0x00016c22 0x00016c22 0x00000002 PAD + 0x00016c24 0x00016c24 0x00000014 Code RO 2233 i.drv_rxbr_frame_drop_cfg CVWL568.lib(drv_rxbr.o) + 0x00016c38 0x00016c38 0x00000064 Code RO 2234 i.drv_rxbr_get_clk CVWL568.lib(drv_rxbr.o) + 0x00016c9c 0x00016c9c 0x00000004 Code RO 2235 i.drv_rxbr_get_col_addr CVWL568.lib(drv_rxbr.o) + 0x00016ca0 0x00016ca0 0x00000012 Code RO 1204 i.drv_rxbr_get_int_source CVWL568.lib(hal_internal_vsync.o) + 0x00016cb2 0x00016cb2 0x00000004 Code RO 2238 i.drv_rxbr_get_page_addr CVWL568.lib(drv_rxbr.o) + 0x00016cb6 0x00016cb6 0x0000000c Code RO 2240 i.drv_rxbr_get_pkt_buf_error_status CVWL568.lib(drv_rxbr.o) + 0x00016cc2 0x00016cc2 0x00000012 Code RO 1205 i.drv_rxbr_get_status0 CVWL568.lib(hal_internal_vsync.o) + 0x00016cd4 0x00016cd4 0x00000016 Code RO 1206 i.drv_rxbr_get_status1 CVWL568.lib(hal_internal_vsync.o) + 0x00016cea 0x00016cea 0x0000000c Code RO 2241 i.drv_rxbr_hline_rcv0_cfg CVWL568.lib(drv_rxbr.o) + 0x00016cf6 0x00016cf6 0x0000000c Code RO 2242 i.drv_rxbr_hline_rcv1_cfg CVWL568.lib(drv_rxbr.o) + 0x00016d02 0x00016d02 0x00000008 Code RO 2243 i.drv_rxbr_hline_rcv_cfg CVWL568.lib(drv_rxbr.o) + 0x00016d0a 0x00016d0a 0x00000002 PAD + 0x00016d0c 0x00016d0c 0x0000000c Code RO 2244 i.drv_rxbr_register_irq0_callback CVWL568.lib(drv_rxbr.o) + 0x00016d18 0x00016d18 0x0000000c Code RO 2245 i.drv_rxbr_register_irq1_callback CVWL568.lib(drv_rxbr.o) + 0x00016d24 0x00016d24 0x00000014 Code RO 2246 i.drv_rxbr_set_ack_pkt_header CVWL568.lib(drv_rxbr.o) + 0x00016d38 0x00016d38 0x00000014 Code RO 2249 i.drv_rxbr_set_color_format CVWL568.lib(drv_rxbr.o) + 0x00016d4c 0x00016d4c 0x00000012 Code RO 2251 i.drv_rxbr_set_filter_regs CVWL568.lib(drv_rxbr.o) + 0x00016d5e 0x00016d5e 0x00000014 Code RO 2252 i.drv_rxbr_set_inten CVWL568.lib(drv_rxbr.o) + 0x00016d72 0x00016d72 0x00000010 Code RO 2253 i.drv_rxbr_set_ltpo_drop_th CVWL568.lib(drv_rxbr.o) + 0x00016d82 0x00016d82 0x00000026 Code RO 2255 i.drv_rxbr_set_usr_cfg CVWL568.lib(drv_rxbr.o) + 0x00016da8 0x00016da8 0x00000008 Code RO 2256 i.drv_rxbr_set_usr_col CVWL568.lib(drv_rxbr.o) + 0x00016db0 0x00016db0 0x00000008 Code RO 2257 i.drv_rxbr_set_usr_row CVWL568.lib(drv_rxbr.o) + 0x00016db8 0x00016db8 0x00000020 Code RO 1799 i.drv_spi_m_read_data CVWL568.lib(drv_spi_master.o) + 0x00016dd8 0x00016dd8 0x0000001c Code RO 1824 i.drv_swire_enable CVWL568.lib(drv_swire.o) + 0x00016df4 0x00016df4 0x0000000c Code RO 1825 i.drv_swire_register_callback CVWL568.lib(drv_swire.o) + 0x00016e00 0x00016e00 0x00000018 Code RO 1826 i.drv_swire_set_bit_time CVWL568.lib(drv_swire.o) + 0x00016e18 0x00016e18 0x00000054 Code RO 1827 i.drv_swire_set_int CVWL568.lib(drv_swire.o) + 0x00016e6c 0x00016e6c 0x0000001c Code RO 1828 i.drv_swire_set_power_down CVWL568.lib(drv_swire.o) + 0x00016e88 0x00016e88 0x0000000c Code RO 1829 i.drv_swire_set_pulse_count CVWL568.lib(drv_swire.o) + 0x00016e94 0x00016e94 0x0000000c Code RO 1843 i.drv_sys_cfg_clear_all_int CVWL568.lib(drv_sys_cfg.o) + 0x00016ea0 0x00016ea0 0x00000028 Code RO 1844 i.drv_sys_cfg_clear_pending CVWL568.lib(drv_sys_cfg.o) + 0x00016ec8 0x00016ec8 0x00000018 Code RO 1847 i.drv_sys_cfg_sel_ap_rst_lvl_trig CVWL568.lib(drv_sys_cfg.o) + 0x00016ee0 0x00016ee0 0x0000001c Code RO 1848 i.drv_sys_cfg_sel_ap_rst_trig CVWL568.lib(drv_sys_cfg.o) + 0x00016efc 0x00016efc 0x00000024 Code RO 1849 i.drv_sys_cfg_sel_gpio_group CVWL568.lib(drv_sys_cfg.o) + 0x00016f20 0x00016f20 0x00000024 Code RO 1850 i.drv_sys_cfg_sel_int_trig CVWL568.lib(drv_sys_cfg.o) + 0x00016f44 0x00016f44 0x00000010 Code RO 1852 i.drv_sys_cfg_set_dma_rx_req CVWL568.lib(drv_sys_cfg.o) + 0x00016f54 0x00016f54 0x00000010 Code RO 1853 i.drv_sys_cfg_set_dma_tx_req CVWL568.lib(drv_sys_cfg.o) + 0x00016f64 0x00016f64 0x00000024 Code RO 1854 i.drv_sys_cfg_set_int CVWL568.lib(drv_sys_cfg.o) + 0x00016f88 0x00016f88 0x0000001a Code RO 1877 i.drv_timer_clear_status_flags CVWL568.lib(drv_timer.o) + 0x00016fa2 0x00016fa2 0x00000020 Code RO 1878 i.drv_timer_enable CVWL568.lib(drv_timer.o) + 0x00016fc2 0x00016fc2 0x00000002 PAD + 0x00016fc4 0x00016fc4 0x00000010 Code RO 1879 i.drv_timer_get_instance CVWL568.lib(drv_timer.o) + 0x00016fd4 0x00016fd4 0x00000010 Code RO 1880 i.drv_timer_get_prescaler CVWL568.lib(drv_timer.o) + 0x00016fe4 0x00016fe4 0x00000044 Code RO 1882 i.drv_timer_handle_interrupt CVWL568.lib(drv_timer.o) + 0x00017028 0x00017028 0x00000014 Code RO 1883 i.drv_timer_register_callback CVWL568.lib(drv_timer.o) + 0x0001703c 0x0001703c 0x00000010 Code RO 1884 i.drv_timer_set_compare_val CVWL568.lib(drv_timer.o) + 0x0001704c 0x0001704c 0x00000054 Code RO 1885 i.drv_timer_set_int CVWL568.lib(drv_timer.o) + 0x000170a0 0x000170a0 0x00000028 Code RO 1886 i.drv_timer_set_prescaler CVWL568.lib(drv_timer.o) + 0x000170c8 0x000170c8 0x00000010 Code RO 1887 i.drv_timer_set_repeat CVWL568.lib(drv_timer.o) + 0x000170d8 0x000170d8 0x0000000a Code RO 2045 i.drv_tx_phy_test_clear CVWL568.lib(drv_dsi_tx.o) + 0x000170e2 0x000170e2 0x0000001c Code RO 2046 i.drv_tx_phy_test_enter CVWL568.lib(drv_dsi_tx.o) + 0x000170fe 0x000170fe 0x0000001c Code RO 2047 i.drv_tx_phy_test_exit CVWL568.lib(drv_dsi_tx.o) + 0x0001711a 0x0001711a 0x00000012 Code RO 2049 i.drv_tx_phy_test_write_1_byte CVWL568.lib(drv_dsi_tx.o) + 0x0001712c 0x0001712c 0x00000014 Code RO 2050 i.drv_tx_phy_test_write_2_byte CVWL568.lib(drv_dsi_tx.o) + 0x00017140 0x00017140 0x00000010 Code RO 2051 i.drv_tx_phy_test_write_code CVWL568.lib(drv_dsi_tx.o) + 0x00017150 0x00017150 0x00000008 Code RO 2299 i.drv_vidc_clear_irq CVWL568.lib(drv_vidc.o) + 0x00017158 0x00017158 0x00000018 Code RO 2303 i.drv_vidc_enable CVWL568.lib(drv_vidc.o) + 0x00017170 0x00017170 0x00000040 Code RO 2304 i.drv_vidc_enable_irq CVWL568.lib(drv_vidc.o) + 0x000171b0 0x000171b0 0x00000012 Code RO 2306 i.drv_vidc_get_irq_status CVWL568.lib(drv_vidc.o) + 0x000171c2 0x000171c2 0x00000002 PAD + 0x000171c4 0x000171c4 0x00000028 Code RO 2310 i.drv_vidc_init_module_enable CVWL568.lib(drv_vidc.o) + 0x000171ec 0x000171ec 0x0000000c Code RO 2311 i.drv_vidc_register_callback CVWL568.lib(drv_vidc.o) + 0x000171f8 0x000171f8 0x00000006 Code RO 2312 i.drv_vidc_reset CVWL568.lib(drv_vidc.o) + 0x000171fe 0x000171fe 0x0000003c Code RO 2314 i.drv_vidc_set_dst_parameter CVWL568.lib(drv_vidc.o) + 0x0001723a 0x0001723a 0x00000014 Code RO 2318 i.drv_vidc_set_irqen CVWL568.lib(drv_vidc.o) + 0x0001724e 0x0001724e 0x00000010 Code RO 2319 i.drv_vidc_set_mirror CVWL568.lib(drv_vidc.o) + 0x0001725e 0x0001725e 0x00000008 Code RO 2322 i.drv_vidc_set_p2r_hcoef0 CVWL568.lib(drv_vidc.o) + 0x00017266 0x00017266 0x00000026 Code RO 2323 i.drv_vidc_set_p2r_hinitb CVWL568.lib(drv_vidc.o) + 0x0001728c 0x0001728c 0x00000026 Code RO 2324 i.drv_vidc_set_p2r_hinitr CVWL568.lib(drv_vidc.o) + 0x000172b2 0x000172b2 0x00000002 PAD + 0x000172b4 0x000172b4 0x00000018 Code RO 2325 i.drv_vidc_set_pentile_swap CVWL568.lib(drv_vidc.o) + 0x000172cc 0x000172cc 0x0000000a Code RO 2326 i.drv_vidc_set_pu_ctrl CVWL568.lib(drv_vidc.o) + 0x000172d6 0x000172d6 0x00000010 Code RO 2327 i.drv_vidc_set_rotation CVWL568.lib(drv_vidc.o) + 0x000172e6 0x000172e6 0x0000000a Code RO 2328 i.drv_vidc_set_scld_hcoef0 CVWL568.lib(drv_vidc.o) + 0x000172f0 0x000172f0 0x0000000a Code RO 2329 i.drv_vidc_set_scld_hcoef1 CVWL568.lib(drv_vidc.o) + 0x000172fa 0x000172fa 0x00000012 Code RO 2330 i.drv_vidc_set_scld_step CVWL568.lib(drv_vidc.o) + 0x0001730c 0x0001730c 0x0000000a Code RO 2331 i.drv_vidc_set_scld_vcoef0 CVWL568.lib(drv_vidc.o) + 0x00017316 0x00017316 0x0000000a Code RO 2332 i.drv_vidc_set_scld_vcoef1 CVWL568.lib(drv_vidc.o) + 0x00017320 0x00017320 0x00000016 Code RO 2333 i.drv_vidc_set_src_parameter CVWL568.lib(drv_vidc.o) + 0x00017336 0x00017336 0x00000002 PAD + 0x00017338 0x00017338 0x00000010 Code RO 2795 i.drv_wdg_clear_counter CVWL568.lib(drv_wdg.o) + 0x00017348 0x00017348 0x00000010 Code RO 2796 i.drv_wdg_clear_edge_flag CVWL568.lib(drv_wdg.o) + 0x00017358 0x00017358 0x00000010 Code RO 2799 i.drv_wdg_read_edge_flag CVWL568.lib(drv_wdg.o) + 0x00017368 0x00017368 0x00000040 Code RO 2802 i.drv_wdg_set_int CVWL568.lib(drv_wdg.o) + 0x000173a8 0x000173a8 0x0000000a Code RO 1472 i.fls_clr_interrupt_flag CVWL568.lib(drv_fls.o) + 0x000173b2 0x000173b2 0x00000014 Code RO 1171 i.fputc CVWL568.lib(tau_log.o) + 0x000173c6 0x000173c6 0x00000002 PAD + 0x000173c8 0x000173c8 0x00000058 Code RO 117 i.frame_start_cb ap_demo.o + 0x00017420 0x00017420 0x00000034 Code RO 716 i.hal_dsi_rx_ctrl_create_handle CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00017454 0x00017454 0x000000b0 Code RO 718 i.hal_dsi_rx_ctrl_deinit CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00017504 0x00017504 0x00000028 Code RO 720 i.hal_dsi_rx_ctrl_dsc_async_handler CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x0001752c 0x0001752c 0x00000028 Code RO 722 i.hal_dsi_rx_ctrl_gen_a_tear_signal CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00017554 0x00017554 0x00000028 Code RO 724 i.hal_dsi_rx_ctrl_get_max_ret_size CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x0001757c 0x0001757c 0x00000098 Code RO 726 i.hal_dsi_rx_ctrl_init CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00017614 0x00017614 0x000001a4 Code RO 727 i.hal_dsi_rx_ctrl_init_clk CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x000177b8 0x000177b8 0x000000d8 Code RO 728 i.hal_dsi_rx_ctrl_init_dsi_rx CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00017890 0x00017890 0x00000160 Code RO 729 i.hal_dsi_rx_ctrl_init_memc CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x000179f0 0x000179f0 0x00000150 Code RO 730 i.hal_dsi_rx_ctrl_init_rxbr CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00017b40 0x00017b40 0x0000022c Code RO 731 i.hal_dsi_rx_ctrl_init_vidc CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00017d6c 0x00017d6c 0x0000003c Code RO 732 i.hal_dsi_rx_ctrl_pre_init_pps CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00017da8 0x00017da8 0x00000050 Code RO 735 i.hal_dsi_rx_ctrl_restart CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00017df8 0x00017df8 0x000000f0 Code RO 736 i.hal_dsi_rx_ctrl_send_ack_cmd CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00017ee8 0x00017ee8 0x0000006c Code RO 739 i.hal_dsi_rx_ctrl_set_cus_scld_filter CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00017f54 0x00017f54 0x00000034 Code RO 740 i.hal_dsi_rx_ctrl_set_cus_sync_line CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00017f88 0x00017f88 0x00000038 Code RO 744 i.hal_dsi_rx_ctrl_set_ipi_cfg CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00017fc0 0x00017fc0 0x00000072 Code RO 749 i.hal_dsi_rx_ctrl_set_rxbr_clk CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00018032 0x00018032 0x00000002 PAD + 0x00018034 0x00018034 0x00000034 Code RO 750 i.hal_dsi_rx_ctrl_set_sw_tear_mode CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00018068 0x00018068 0x0000000e Code RO 752 i.hal_dsi_rx_ctrl_set_tear_mode_ex CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00018076 0x00018076 0x00000002 PAD + 0x00018078 0x00018078 0x0000003c Code RO 753 i.hal_dsi_rx_ctrl_start CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x000180b4 0x000180b4 0x0000003c Code RO 754 i.hal_dsi_rx_ctrl_stop CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x000180f0 0x000180f0 0x00000020 Code RO 757 i.hal_dsi_rx_ctrl_toggle_resolution_ex CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00018110 0x00018110 0x00000190 Code RO 811 i.hal_dsi_tx_calc_video_chunks CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x000182a0 0x000182a0 0x00000034 Code RO 812 i.hal_dsi_tx_config_params_for_lane_rate CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x000182d4 0x000182d4 0x00000428 Code RO 813 i.hal_dsi_tx_count_lane_rate CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x000186fc 0x000186fc 0x0000002c Code RO 816 i.hal_dsi_tx_ctrl_create_handle CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018728 0x00018728 0x00000084 Code RO 817 i.hal_dsi_tx_ctrl_deinit CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x000187ac 0x000187ac 0x0000004c Code RO 821 i.hal_dsi_tx_ctrl_enter_init_panel_mode CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x000187f8 0x000187f8 0x00000028 Code RO 823 i.hal_dsi_tx_ctrl_exit_init_panel_mode CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018820 0x00018820 0x000000a4 Code RO 825 i.hal_dsi_tx_ctrl_init CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x000188c4 0x000188c4 0x00000024 Code RO 826 i.hal_dsi_tx_ctrl_init_clk CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x000188e8 0x000188e8 0x0000000c Code RO 827 i.hal_dsi_tx_ctrl_panel_reset_pin CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x000188f4 0x000188f4 0x00000020 Code RO 830 i.hal_dsi_tx_ctrl_set_ccm CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018914 0x00018914 0x00000014 Code RO 836 i.hal_dsi_tx_ctrl_set_overwrite_rgb CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018928 0x00018928 0x00000010 Code RO 837 i.hal_dsi_tx_ctrl_set_partial_disp CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018938 0x00018938 0x00000024 Code RO 838 i.hal_dsi_tx_ctrl_set_partial_disp_area CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x0001895c 0x0001895c 0x000000a8 Code RO 841 i.hal_dsi_tx_ctrl_start CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018a04 0x00018a04 0x00000044 Code RO 842 i.hal_dsi_tx_ctrl_stop CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018a48 0x00018a48 0x000000f0 Code RO 843 i.hal_dsi_tx_ctrl_write_array_cmd CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018b38 0x00018b38 0x000000cc Code RO 844 i.hal_dsi_tx_ctrl_write_cmd CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018c04 0x00018c04 0x00000044 Code RO 845 i.hal_dsi_tx_init_data_mode CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018c48 0x00018c48 0x00000030 Code RO 846 i.hal_dsi_tx_init_dpi_cfg CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018c78 0x00018c78 0x00000020 Code RO 847 i.hal_dsi_tx_init_interrupt CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018c98 0x00018c98 0x00000020 Code RO 848 i.hal_dsi_tx_init_phy_cfg CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018cb8 0x00018cb8 0x00000094 Code RO 849 i.hal_dsi_tx_init_remains CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018d4c 0x00018d4c 0x00000058 Code RO 850 i.hal_dsi_tx_init_video_mode CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018da4 0x00018da4 0x00000044 Code RO 851 i.hal_dsi_tx_send_cmd CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018de8 0x00018de8 0x00000018 Code RO 918 i.hal_gpio_ctrl_eint CVWL568.lib(hal_gpio.o) + 0x00018e00 0x00018e00 0x00000012 Code RO 919 i.hal_gpio_get_input_data CVWL568.lib(hal_gpio.o) + 0x00018e12 0x00018e12 0x00000002 PAD + 0x00018e14 0x00018e14 0x00000040 Code RO 922 i.hal_gpio_init_eint CVWL568.lib(hal_gpio.o) + 0x00018e54 0x00018e54 0x00000028 Code RO 924 i.hal_gpio_init_output CVWL568.lib(hal_gpio.o) + 0x00018e7c 0x00018e7c 0x00000018 Code RO 925 i.hal_gpio_reg_eint_cb CVWL568.lib(hal_gpio.o) + 0x00018e94 0x00018e94 0x00000050 Code RO 926 i.hal_gpio_set_ap_reset_int CVWL568.lib(hal_gpio.o) + 0x00018ee4 0x00018ee4 0x00000060 Code RO 928 i.hal_gpio_set_mode CVWL568.lib(hal_gpio.o) + 0x00018f44 0x00018f44 0x00000008 Code RO 929 i.hal_gpio_set_output_data CVWL568.lib(hal_gpio.o) + 0x00018f4c 0x00018f4c 0x00000020 Code RO 931 i.hal_gpio_set_pull_state CVWL568.lib(hal_gpio.o) + 0x00018f6c 0x00018f6c 0x0000006c Code RO 957 i.hal_i2c_m_dma_init CVWL568.lib(hal_i2c_master.o) + 0x00018fd8 0x00018fd8 0x00000020 Code RO 958 i.hal_i2c_m_dma_read CVWL568.lib(hal_i2c_master.o) + 0x00018ff8 0x00018ff8 0x0000001c Code RO 959 i.hal_i2c_m_dma_write CVWL568.lib(hal_i2c_master.o) + 0x00019014 0x00019014 0x0000000c Code RO 961 i.hal_i2c_m_transfer_complate CVWL568.lib(hal_i2c_master.o) + 0x00019020 0x00019020 0x00000020 Code RO 962 i.hal_i2c_master_irq_callback CVWL568.lib(hal_i2c_master.o) + 0x00019040 0x00019040 0x00000010 Code RO 976 i.hal_i2c_s_dma_user_callback CVWL568.lib(hal_i2c_slave.o) + 0x00019050 0x00019050 0x0000004c Code RO 977 i.hal_i2c_s_dma_write CVWL568.lib(hal_i2c_slave.o) + 0x0001909c 0x0001909c 0x000000c8 Code RO 979 i.hal_i2c_s_init CVWL568.lib(hal_i2c_slave.o) + 0x00019164 0x00019164 0x00000014 Code RO 980 i.hal_i2c_s_nonblocking_read CVWL568.lib(hal_i2c_slave.o) + 0x00019178 0x00019178 0x0000000c Code RO 988 i.hal_i2c_s_set_transfer CVWL568.lib(hal_i2c_slave.o) + 0x00019184 0x00019184 0x00000174 Code RO 991 i.hal_i2c_slave_irq_callback CVWL568.lib(hal_i2c_slave.o) + 0x000192f8 0x000192f8 0x00000018 Code RO 1207 i.hal_internal_check_video_auto_sync CVWL568.lib(hal_internal_vsync.o) + 0x00019310 0x00019310 0x000000fc Code RO 1208 i.hal_internal_init_memc CVWL568.lib(hal_internal_vsync.o) + 0x0001940c 0x0001940c 0x0000002a Code RO 1209 i.hal_internal_rx_dcs_async_handler CVWL568.lib(hal_internal_vsync.o) + 0x00019436 0x00019436 0x00000002 PAD + 0x00019438 0x00019438 0x00000058 Code RO 1210 i.hal_internal_rx_dcs_polling CVWL568.lib(hal_internal_vsync.o) + 0x00019490 0x00019490 0x00000010 Code RO 1212 i.hal_internal_sync_get_fb_setting CVWL568.lib(hal_internal_vsync.o) + 0x000194a0 0x000194a0 0x00000010 Code RO 1213 i.hal_internal_sync_get_hight_performan_mode CVWL568.lib(hal_internal_vsync.o) + 0x000194b0 0x000194b0 0x000001d4 Code RO 1215 i.hal_internal_sync_input_resolution_change_ex CVWL568.lib(hal_internal_vsync.o) + 0x00019684 0x00019684 0x00000028 Code RO 1217 i.hal_internal_vsync_deinit CVWL568.lib(hal_internal_vsync.o) + 0x000196ac 0x000196ac 0x0000000c Code RO 1218 i.hal_internal_vsync_get_rx_state CVWL568.lib(hal_internal_vsync.o) + 0x000196b8 0x000196b8 0x00000018 Code RO 1219 i.hal_internal_vsync_get_sync_line CVWL568.lib(hal_internal_vsync.o) + 0x000196d0 0x000196d0 0x0000000c Code RO 1220 i.hal_internal_vsync_get_tear_mode CVWL568.lib(hal_internal_vsync.o) + 0x000196dc 0x000196dc 0x0000000c Code RO 1221 i.hal_internal_vsync_get_tx_state CVWL568.lib(hal_internal_vsync.o) + 0x000196e8 0x000196e8 0x00000140 Code RO 1222 i.hal_internal_vsync_init_rx CVWL568.lib(hal_internal_vsync.o) + 0x00019828 0x00019828 0x000000b0 Code RO 1223 i.hal_internal_vsync_init_tx CVWL568.lib(hal_internal_vsync.o) + 0x000198d8 0x000198d8 0x00000090 Code RO 1225 i.hal_internal_vsync_set_auto_hw_filter CVWL568.lib(hal_internal_vsync.o) + 0x00019968 0x00019968 0x00000024 Code RO 1227 i.hal_internal_vsync_set_rx_state CVWL568.lib(hal_internal_vsync.o) + 0x0001998c 0x0001998c 0x00000044 Code RO 1228 i.hal_internal_vsync_set_sync_line CVWL568.lib(hal_internal_vsync.o) + 0x000199d0 0x000199d0 0x00000050 Code RO 1229 i.hal_internal_vsync_set_tear_mode CVWL568.lib(hal_internal_vsync.o) + 0x00019a20 0x00019a20 0x00000084 Code RO 1230 i.hal_internal_vsync_set_tx_state CVWL568.lib(hal_internal_vsync.o) + 0x00019aa4 0x00019aa4 0x00000010 Code RO 1909 i.hal_intl_svs_deinit_tx CVWL568.lib(hal_internal_soft_sync.o) + 0x00019ab4 0x00019ab4 0x00000024 Code RO 1910 i.hal_intl_svs_handle CVWL568.lib(hal_internal_soft_sync.o) + 0x00019ad8 0x00019ad8 0x00000078 Code RO 1911 i.hal_intl_svs_init_rx CVWL568.lib(hal_internal_soft_sync.o) + 0x00019b50 0x00019b50 0x00000014 Code RO 1912 i.hal_intl_svs_init_tx CVWL568.lib(hal_internal_soft_sync.o) + 0x00019b64 0x00019b64 0x0000000c Code RO 1914 i.hal_intl_svs_set_sync_coef CVWL568.lib(hal_internal_soft_sync.o) + 0x00019b70 0x00019b70 0x00000048 Code RO 1915 i.hal_intl_svs_update_rxbr_clk CVWL568.lib(hal_internal_soft_sync.o) + 0x00019bb8 0x00019bb8 0x00000024 Code RO 852 i.hal_lcdc_config_ccm CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00019bdc 0x00019bdc 0x00000064 Code RO 853 i.hal_lcdc_config_remains CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00019c40 0x00019c40 0x00000014 Code RO 854 i.hal_lcdc_config_rgb_to_pentile CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00019c54 0x00019c54 0x00000164 Code RO 855 i.hal_lcdc_config_upscaler CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00019db8 0x00019db8 0x00000054 Code RO 856 i.hal_lcdc_init_cfg CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00019e0c 0x00019e0c 0x000001cc Code RO 857 i.hal_lcdc_init_clk CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00019fd8 0x00019fd8 0x00000040 Code RO 858 i.hal_lcdc_init_interrupt CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x0001a018 0x0001a018 0x0000000e Code RO 1069 i.hal_spi_m_clear_rxfifo CVWL568.lib(hal_spi_master.o) + 0x0001a026 0x0001a026 0x00000012 Code RO 1093 i.hal_swire_deinit CVWL568.lib(hal_swire.o) + 0x0001a038 0x0001a038 0x00000020 Code RO 1094 i.hal_swire_init CVWL568.lib(hal_swire.o) + 0x0001a058 0x0001a058 0x00000016 Code RO 1095 i.hal_swire_open CVWL568.lib(hal_swire.o) + 0x0001a06e 0x0001a06e 0x0000000a Code RO 1096 i.hal_swire_register_callback CVWL568.lib(hal_swire.o) + 0x0001a078 0x0001a078 0x0000006c Code RO 1097 i.hal_swire_start CVWL568.lib(hal_swire.o) + 0x0001a0e4 0x0001a0e4 0x00000008 Code RO 1110 i.hal_system_enable_systick CVWL568.lib(hal_system.o) + 0x0001a0ec 0x0001a0ec 0x00000008 Code RO 1112 i.hal_system_get_tick CVWL568.lib(hal_system.o) + 0x0001a0f4 0x0001a0f4 0x00000088 Code RO 1114 i.hal_system_init CVWL568.lib(hal_system.o) + 0x0001a17c 0x0001a17c 0x0000001c Code RO 1115 i.hal_system_init_console CVWL568.lib(hal_system.o) + 0x0001a198 0x0001a198 0x00000008 Code RO 1118 i.hal_system_set_phy_calibration CVWL568.lib(hal_system.o) + 0x0001a1a0 0x0001a1a0 0x00000008 Code RO 1119 i.hal_system_set_pvd CVWL568.lib(hal_system.o) + 0x0001a1a8 0x0001a1a8 0x00000008 Code RO 1120 i.hal_system_set_vcc CVWL568.lib(hal_system.o) + 0x0001a1b0 0x0001a1b0 0x0000002e Code RO 1143 i.hal_timer_deinit CVWL568.lib(hal_timer.o) + 0x0001a1de 0x0001a1de 0x0000001a Code RO 1145 i.hal_timer_init CVWL568.lib(hal_timer.o) + 0x0001a1f8 0x0001a1f8 0x00000048 Code RO 1147 i.hal_timer_start CVWL568.lib(hal_timer.o) + 0x0001a240 0x0001a240 0x00000028 Code RO 1149 i.hal_timer_stop CVWL568.lib(hal_timer.o) + 0x0001a268 0x0001a268 0x00000030 Code RO 859 i.hal_tx_frame_rate_adjust CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x0001a298 0x0001a298 0x0000008c Code RO 1182 i.hal_uart_init CVWL568.lib(hal_uart.o) + 0x0001a324 0x0001a324 0x00000010 Code RO 1185 i.hal_uart_transmit_blocking CVWL568.lib(hal_uart.o) + 0x0001a334 0x0001a334 0x000001dc Code RO 1233 i.hal_vsync_reset_lcdc_scaler CVWL568.lib(hal_internal_vsync.o) + 0x0001a510 0x0001a510 0x00000110 Code RO 2409 i.handle_init CVWL568.lib(irq_redirect .o) + 0x0001a620 0x0001a620 0x00000070 Code RO 118 i.init_mipi_tx ap_demo.o + 0x0001a690 0x0001a690 0x000000d8 Code RO 119 i.init_panel ap_demo.o + 0x0001a768 0x0001a768 0x0000000a Code RO 3 i.main main.o + 0x0001a772 0x0001a772 0x00000002 PAD + 0x0001a774 0x0001a774 0x000000cc Code RO 120 i.open_mipi_rx ap_demo.o + 0x0001a840 0x0001a840 0x0000002c Code RO 121 i.pps_updata_exec ap_demo.o + 0x0001a86c 0x0001a86c 0x000000b4 Code RO 122 i.pps_update_handle ap_demo.o + 0x0001a920 0x0001a920 0x000003f4 Code RO 1234 i.rx_get_dcs_packet_data CVWL568.lib(hal_internal_vsync.o) + 0x0001ad14 0x0001ad14 0x0000016c Code RO 1235 i.rx_partial_update CVWL568.lib(hal_internal_vsync.o) + 0x0001ae80 0x0001ae80 0x0000008c Code RO 1236 i.rx_receive_packet CVWL568.lib(hal_internal_vsync.o) + 0x0001af0c 0x0001af0c 0x00000180 Code RO 1237 i.rx_receive_pps CVWL568.lib(hal_internal_vsync.o) + 0x0001b08c 0x0001b08c 0x00000054 Code RO 123 i.rx_restart_exec ap_demo.o + 0x0001b0e0 0x0001b0e0 0x000000cc Code RO 1238 i.rxbr_irq0_callback CVWL568.lib(hal_internal_vsync.o) + 0x0001b1ac 0x0001b1ac 0x00000244 Code RO 1239 i.rxbr_irq1_callback CVWL568.lib(hal_internal_vsync.o) + 0x0001b3f0 0x0001b3f0 0x000000c4 Code RO 1240 i.soft_gen_te CVWL568.lib(hal_internal_vsync.o) + 0x0001b4b4 0x0001b4b4 0x000000c0 Code RO 1241 i.soft_gen_te_double_buffer CVWL568.lib(hal_internal_vsync.o) + 0x0001b574 0x0001b574 0x0000003c Code RO 124 i.soft_timer3_cb ap_demo.o + 0x0001b5b0 0x0001b5b0 0x00000048 Code RO 2833 i.sqrt m_ps.l(sqrt.o) + 0x0001b5f8 0x0001b5f8 0x000000ac Code RO 1916 i.svs_direct_mode_setting CVWL568.lib(hal_internal_soft_sync.o) + 0x0001b6a4 0x0001b6a4 0x0000001c Code RO 1917 i.svs_get_rel_intv CVWL568.lib(hal_internal_soft_sync.o) + 0x0001b6c0 0x0001b6c0 0x000000b0 Code RO 1918 i.svs_sync_handle CVWL568.lib(hal_internal_soft_sync.o) + 0x0001b770 0x0001b770 0x000000f4 Code RO 1919 i.svs_wait_start CVWL568.lib(hal_internal_soft_sync.o) + 0x0001b864 0x0001b864 0x000000d8 Code RO 1920 i.svs_waite_fr_stab CVWL568.lib(hal_internal_soft_sync.o) + 0x0001b93c 0x0001b93c 0x00000014 Code RO 125 i.swire_callback ap_demo.o + 0x0001b950 0x0001b950 0x0000001c Code RO 126 i.swire_timer_callback ap_demo.o + 0x0001b96c 0x0001b96c 0x0000006c Code RO 128 i.tp_heartbeat_exec ap_demo.o + 0x0001b9d8 0x0001b9d8 0x00000108 Code RO 1242 i.vidc_callback CVWL568.lib(hal_internal_vsync.o) + 0x0001bae0 0x0001bae0 0x000000d8 Code RO 1243 i.vpre_err_reset CVWL568.lib(hal_internal_vsync.o) + 0x0001bbb8 0x0001bbb8 0x000001cc Code RO 1244 i.vsync_set_te_mode CVWL568.lib(hal_internal_vsync.o) + 0x0001bd84 0x0001bd84 0x00002974 Data RO 129 .constdata ap_demo.o + 0x0001e6f8 0x0001e6f8 0x00000020 Data RO 477 .constdata app_tp_st_touch.o + 0x0001e718 0x0001e718 0x00000001 Data RO 589 .constdata app_tp_for_custom_s21u.o + 0x0001e719 0x0001e719 0x00000003 Data RO 590 .constdata app_tp_for_custom_s21u.o + 0x0001e71c 0x0001e71c 0x00000006 Data RO 591 .constdata app_tp_for_custom_s21u.o + 0x0001e722 0x0001e722 0x00000003 Data RO 592 .constdata app_tp_for_custom_s21u.o + 0x0001e725 0x0001e725 0x00000003 Data RO 593 .constdata app_tp_for_custom_s21u.o + 0x0001e728 0x0001e728 0x00000001 Data RO 616 .constdata app_tp_for_custom_s21u.o + 0x0001e729 0x0001e729 0x00000003 PAD + 0x0001e72c 0x0001e72c 0x00000024 Data RO 861 .constdata CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x0001e750 0x0001e750 0x000000d2 Data RO 934 .constdata CVWL568.lib(hal_gpio.o) + 0x0001e822 0x0001e822 0x00000002 PAD + 0x0001e824 0x0001e824 0x00000020 Data RO 992 .constdata CVWL568.lib(hal_i2c_slave.o) + 0x0001e844 0x0001e844 0x00000008 Data RO 1697 .constdata CVWL568.lib(drv_param_init.o) + 0x0001e84c 0x0001e84c 0x00000186 Data RO 2481 .constdata CVWL568.lib(drv_phy_common.o) + 0x0001e9d2 0x0001e9d2 0x00000002 PAD + 0x0001e9d4 0x0001e9d4 0x00000048 Data RO 759 .conststring CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x0001ea1c 0x0001ea1c 0x00000043 Data RO 862 .conststring CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x0001ea5f 0x0001ea5f 0x00000001 PAD + 0x0001ea60 0x0001ea60 0x00000124 Data RO 1246 .conststring CVWL568.lib(hal_internal_vsync.o) + 0x0001eb84 0x0001eb84 0x00000030 Data RO 3197 Region$$Table anon$$obj.o + + + Execution Region RW_RAM1 (Exec base: 0x00070000, Load base: 0x0001ebb4, Size: 0x00000000, Max: 0x000000f0, ABSOLUTE) + + **** No section assigned to this execution region **** + + + Execution Region RW_RAM2 (Exec base: 0x00070100, Load base: 0x0001ebb4, Size: 0x000000c0, Max: 0x000000d0, ABSOLUTE) + + Exec Addr Load Addr Size Type Attr Idx E Section Name Object + + 0x00070100 - 0x000000c0 Zero RW 2410 .ARM.__AT_0x00070100 CVWL568.lib(irq_redirect .o) + + + Execution Region RW_RAM3 (Exec base: 0x000701d0, Load base: 0x0001ebb4, Size: 0x00004000, Max: 0x00007e30, ABSOLUTE, COMPRESSED[0x000008c0]) + + Exec Addr Load Addr Size Type Attr Idx E Section Name Object + + 0x000701d0 COMPRESSED 0x00000638 Data RW 130 .data ap_demo.o + 0x00070808 COMPRESSED 0x00000014 Data RW 330 .data app_tp_transfer.o + 0x0007081c COMPRESSED 0x00000028 Data RW 478 .data app_tp_st_touch.o + 0x00070844 COMPRESSED 0x00000001 Data RW 617 .data app_tp_for_custom_s21u.o + 0x00070845 COMPRESSED 0x00000001 Data RW 618 .data app_tp_for_custom_s21u.o + 0x00070846 COMPRESSED 0x00000282 Data RW 620 .data app_tp_for_custom_s21u.o + 0x00070ac8 COMPRESSED 0x00000001 Data RW 621 .data app_tp_for_custom_s21u.o + 0x00070ac9 COMPRESSED 0x00000003 PAD + 0x00070acc COMPRESSED 0x00000010 Data RW 624 .data app_tp_for_custom_s21u.o + 0x00070adc COMPRESSED 0x00000064 Data RW 625 .data app_tp_for_custom_s21u.o + 0x00070b40 COMPRESSED 0x00000001 Data RW 628 .data app_tp_for_custom_s21u.o + 0x00070b41 COMPRESSED 0x00000001 Data RW 629 .data app_tp_for_custom_s21u.o + 0x00070b42 COMPRESSED 0x00000002 PAD + 0x00070b44 COMPRESSED 0x00000008 Data RW 760 .data CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00070b4c COMPRESSED 0x00000003 Data RW 863 .data CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00070b4f COMPRESSED 0x00000001 Data RW 963 .data CVWL568.lib(hal_i2c_master.o) + 0x00070b50 COMPRESSED 0x00000020 Data RW 993 .data CVWL568.lib(hal_i2c_slave.o) + 0x00070b70 COMPRESSED 0x00000018 Data RW 1247 .data CVWL568.lib(hal_internal_vsync.o) + 0x00070b88 COMPRESSED 0x0000000c Data RW 1308 .data CVWL568.lib(drv_common.o) + 0x00070b94 COMPRESSED 0x00000004 Data RW 1575 .data CVWL568.lib(drv_gpio.o) + 0x00070b98 COMPRESSED 0x00000008 Data RW 1613 .data CVWL568.lib(drv_i2c_dma.o) + 0x00070ba0 COMPRESSED 0x00000004 Data RW 1642 .data CVWL568.lib(drv_i2c_master.o) + 0x00070ba4 COMPRESSED 0x00000004 Data RW 1673 .data CVWL568.lib(drv_i2c_slave.o) + 0x00070ba8 COMPRESSED 0x000004a4 Data RW 1698 .data CVWL568.lib(drv_param_init.o) + 0x0007104c COMPRESSED 0x0000000c Data RW 1728 .data CVWL568.lib(drv_pwm.o) + 0x00071058 COMPRESSED 0x00000004 Data RW 1804 .data CVWL568.lib(drv_spi_master.o) + 0x0007105c COMPRESSED 0x00000008 Data RW 1830 .data CVWL568.lib(drv_swire.o) + 0x00071064 COMPRESSED 0x00000001 Data RW 1855 .data CVWL568.lib(drv_sys_cfg.o) + 0x00071065 COMPRESSED 0x00000003 PAD + 0x00071068 COMPRESSED 0x00000050 Data RW 1888 .data CVWL568.lib(drv_timer.o) + 0x000710b8 COMPRESSED 0x00000008 Data RW 2259 .data CVWL568.lib(drv_rxbr.o) + 0x000710c0 COMPRESSED 0x00000004 Data RW 2335 .data CVWL568.lib(drv_vidc.o) + 0x000710c4 COMPRESSED 0x00000001 Data RW 2482 .data CVWL568.lib(drv_phy_common.o) + 0x000710c5 COMPRESSED 0x00000003 PAD + 0x000710c8 COMPRESSED 0x0000000c Data RW 2502 .data CVWL568.lib(drv_chip_info.o) + 0x000710d4 COMPRESSED 0x00000012 Data RW 2611 .data CVWL568.lib(norflash.o) + 0x000710e6 COMPRESSED 0x00000002 PAD + 0x000710e8 COMPRESSED 0x00000008 Data RW 2737 .data CVWL568.lib(drv_uart.o) + 0x000710f0 COMPRESSED 0x0000000c Data RW 2804 .data CVWL568.lib(drv_wdg.o) + 0x000710fc COMPRESSED 0x00000004 Data RW 3166 .data mc_p.l(stdout.o) + 0x00071100 COMPRESSED 0x00000004 Data RW 3178 .data mc_p.l(errno.o) + 0x00071104 - 0x000001f4 Zero RW 329 .bss app_tp_transfer.o + 0x000712f8 - 0x0000000c Zero RW 476 .bss app_tp_st_touch.o + 0x00071304 - 0x00000048 Zero RW 583 .bss app_tp_for_custom_s21u.o + 0x0007134c - 0x000000c4 Zero RW 758 .bss CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00071410 - 0x0000004c Zero RW 860 .bss CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x0007145c - 0x00000100 Zero RW 1172 .bss CVWL568.lib(tau_log.o) + 0x0007155c - 0x000000d0 Zero RW 1187 .bss CVWL568.lib(hal_uart.o) + 0x0007162c - 0x00000974 Zero RW 1245 .bss CVWL568.lib(hal_internal_vsync.o) + 0x00071fa0 - 0x0000001c Zero RW 1437 .bss CVWL568.lib(drv_dma.o) + 0x00071fbc - 0x00000040 Zero RW 1574 .bss CVWL568.lib(drv_gpio.o) + 0x00071ffc - 0x00000140 Zero RW 1612 .bss CVWL568.lib(drv_i2c_dma.o) + 0x0007213c - 0x00000040 Zero RW 1921 .bss CVWL568.lib(hal_internal_soft_sync.o) + 0x0007217c - 0x00000020 Zero RW 2546 .bss CVWL568.lib(hal_spi_slave.o) + 0x0007219c - 0x00001030 Zero RW 2822 .bss CVWL568.lib(dcs_packet_fifo.o) + 0x000731cc COMPRESSED 0x00000004 PAD + 0x000731d0 - 0x00001000 Zero RW 705 STACK startup_armcm0.o + + +============================================================================== + +Image component sizes + + + Code (inc. data) RO Data RW Data ZI Data Debug Object Name + + 5618 794 10612 1592 0 40524 ap_demo.o + 1862 128 17 763 72 14679 app_tp_for_custom_s21u.o + 1116 242 32 40 12 12021 app_tp_st_touch.o + 724 138 0 20 500 13409 app_tp_transfer.o + 36 6 0 0 0 561 board.o + 10 0 0 0 0 9751 main.o + 120 18 192 0 4096 2124 startup_armcm0.o + + ---------------------------------------------------------------------- + 9490 1326 10904 2420 4680 93069 Object Totals + 0 0 48 0 0 0 (incl. Generated) + 4 0 3 5 0 0 (incl. Padding) + + ---------------------------------------------------------------------- + + Code (inc. data) RO Data RW Data ZI Data Debug Library Member Name + + 216 32 0 0 4144 252 dcs_packet_fifo.o + 272 96 0 12 0 256 drv_chip_info.o + 204 88 24 12 0 324 drv_common.o + 440 94 0 0 0 1260 drv_crgu.o + 410 28 0 0 28 796 drv_dma.o + 232 28 0 0 0 340 drv_dsc_dec.o + 1658 494 0 0 0 1396 drv_dsi_rx.o + 1528 118 0 0 0 2428 drv_dsi_tx.o + 132 0 0 0 0 256 drv_efuse.o + 10 0 0 0 0 60 drv_fls.o + 796 112 0 4 64 1236 drv_gpio.o + 600 82 0 8 320 624 drv_i2c_dma.o + 360 86 0 4 0 456 drv_i2c_master.o + 292 36 0 4 0 580 drv_i2c_slave.o + 704 6 0 0 0 1504 drv_lcdc.o + 492 28 0 0 0 1112 drv_memc.o + 212 44 8 1188 0 452 drv_param_init.o + 428 30 390 1 0 664 drv_phy_common.o + 72 10 0 12 0 76 drv_pwm.o + 112 24 0 0 0 180 drv_pwr.o + 560 74 0 8 0 1560 drv_rxbr.o + 104 24 0 4 0 188 drv_spi_master.o + 220 36 0 8 0 440 drv_swire.o + 300 64 0 1 0 628 drv_sys_cfg.o + 374 34 0 80 0 932 drv_timer.o + 698 18 0 8 0 680 drv_uart.o + 510 28 0 4 0 1452 drv_vidc.o + 168 22 0 12 0 316 drv_wdg.o + 3334 326 72 8 196 1752 hal_dsi_rx_ctrl.o + 4456 314 103 3 76 2484 hal_dsi_tx_ctrl.o + 418 44 210 0 0 684 hal_gpio.o + 212 40 0 1 0 340 hal_i2c_master.o + 696 70 32 32 0 408 hal_i2c_slave.o + 1112 188 0 0 64 776 hal_internal_soft_sync.o + 8452 1632 292 24 2420 2820 hal_internal_vsync.o + 14 0 0 0 0 68 hal_spi_master.o + 580 32 0 0 32 136 hal_spi_slave.o + 190 8 0 0 0 352 hal_swire.o + 204 32 0 0 0 476 hal_system.o + 184 6 0 0 0 276 hal_timer.o + 156 18 0 0 208 144 hal_uart.o + 1076 324 0 0 192 1980 irq_redirect .o + 48 10 0 18 0 68 norflash.o + 58 0 0 0 0 128 tau_delay.o + 60 10 0 0 256 156 tau_log.o + 200 20 0 0 0 76 ceil.o + 72 6 0 0 0 76 sqrt.o + 86 0 0 0 0 0 __dczerorl2.o + 0 0 0 0 0 0 entry.o + 0 0 0 0 0 0 entry10a.o + 0 0 0 0 0 0 entry11a.o + 8 4 0 0 0 0 entry2.o + 4 0 0 0 0 0 entry5.o + 0 0 0 0 0 0 entry7b.o + 0 0 0 0 0 0 entry8b.o + 8 4 0 0 0 0 entry9a.o + 12 6 0 4 0 60 errno.o + 30 0 0 0 0 0 handlers.o + 40 0 0 0 0 72 idiv.o + 36 8 0 0 0 68 init.o + 0 0 0 0 0 0 iusefp.o + 32 0 0 0 0 68 llshl.o + 38 0 0 0 0 68 llsshr.o + 34 0 0 0 0 68 llushr.o + 36 0 0 0 0 60 memcpya.o + 36 0 0 0 0 100 memseta.o + 2298 104 0 0 0 544 printfa.o + 0 0 0 4 0 0 stdout.o + 44 0 0 0 0 72 uidiv.o + 96 0 0 0 0 84 uldiv.o + 40 2 0 0 0 68 cdcmple.o + 40 2 0 0 0 68 cdrcmple.o + 20 0 0 0 0 68 cfcmple.o + 20 0 0 0 0 68 cfrcmple.o + 356 4 0 0 0 140 dadd.o + 240 6 0 0 0 84 ddiv.o + 236 0 0 0 0 216 depilogue.o + 72 10 0 0 0 72 dfixi.o + 60 10 0 0 0 68 dfixui.o + 64 10 0 0 0 68 dfixul.o + 28 4 0 0 0 68 dfltui.o + 208 6 0 0 0 88 dmul.o + 162 0 0 0 0 80 dsqrt.o + 40 0 0 0 0 60 f2d.o + 178 0 0 0 0 108 fadd.o + 124 0 0 0 0 72 fdiv.o + 130 0 0 0 0 144 fepilogue.o + 50 0 0 0 0 60 ffixi.o + 40 0 0 0 0 60 ffixui.o + 22 0 0 0 0 68 fflti.o + 14 0 0 0 0 68 ffltui.o + 122 0 0 0 0 72 fmul.o + 24 0 0 0 0 60 fscalb.o + + ---------------------------------------------------------------------- + 38810 4996 1136 1472 8004 36840 Library Totals + 56 0 5 8 4 0 (incl. Padding) + + ---------------------------------------------------------------------- + + Code (inc. data) RO Data RW Data ZI Data Debug Library Name + + 33354 4790 1131 1456 8000 33496 CVWL568.lib + 272 26 0 0 0 152 m_ps.l + 2838 126 0 8 0 1264 mc_p.l + 2290 54 0 0 0 1928 mf_p.l + + ---------------------------------------------------------------------- + 38810 4996 1136 1472 8004 36840 Library Totals + + ---------------------------------------------------------------------- + +============================================================================== + + + Code (inc. data) RO Data RW Data ZI Data Debug + + 48300 6322 12040 3892 12684 103877 Grand Totals + 48300 6322 12040 2240 12684 103877 ELF Image Totals (compressed) + 48300 6322 12040 2240 0 0 ROM Totals + +============================================================================== + + Total RO Size (Code + RO Data) 60340 ( 58.93kB) + Total RW Size (RW Data + ZI Data) 16576 ( 16.19kB) + Total ROM Size (Code + RO Data + RW Data) 62580 ( 61.11kB) + +============================================================================== + diff --git a/project/ISP_568/Listings/ap_demo.txt b/project/ISP_568/Listings/ap_demo.txt index 6840b9c..317ea1d 100644 --- a/project/ISP_568/Listings/ap_demo.txt +++ b/project/ISP_568/Listings/ap_demo.txt @@ -5,97 +5,97 @@ AREA ||i.Gpio_swire_output||, CODE, READONLY, ALIGN=1 Gpio_swire_output PROC -;;;1319 *****************************************************************************/ -;;;1320 void Gpio_swire_output(uint8_t flag, uint8_t num) +;;;1323 *****************************************************************************/ +;;;1324 void Gpio_swire_output(uint8_t flag, uint8_t num) 000000 b570 PUSH {r4-r6,lr} -;;;1321 { +;;;1325 { 000002 460d MOV r5,r1 -;;;1322 uint8_t ii; -;;;1323 -;;;1324 if (flag) +;;;1326 uint8_t ii; +;;;1327 +;;;1328 if (flag) 000004 2800 CMP r0,#0 000006 d01d BEQ |L1.68| -;;;1325 { -;;;1326 if (flag ==2) +;;;1329 { +;;;1330 if (flag ==2) 000008 2802 CMP r0,#2 00000a d106 BNE |L1.26| -;;;1327 { -;;;1328 hal_gpio_init_output(IO_PAD_ADCIN, IO_LVL_HIGH); +;;;1331 { +;;;1332 hal_gpio_init_output(IO_PAD_ADCIN, IO_LVL_HIGH); 00000c 2101 MOVS r1,#1 00000e 2014 MOVS r0,#0x14 000010 f7fffffe BL hal_gpio_init_output -;;;1329 //hal_gpio_set_output_data(IO_PAD_ADCIN, IO_LVL_HIGH); -;;;1330 delayMs(20); +;;;1333 //hal_gpio_set_output_data(IO_PAD_ADCIN, IO_LVL_HIGH); +;;;1334 delayMs(20); 000014 2014 MOVS r0,#0x14 000016 f7fffffe BL delayMs |L1.26| -;;;1331 } -;;;1332 for (ii =0; ii< num; ii++) +;;;1335 } +;;;1336 for (ii =0; ii< num; ii++) 00001a 2400 MOVS r4,#0 00001c e00f B |L1.62| |L1.30| -;;;1333 { -;;;1334 hal_gpio_set_output_data(IO_PAD_ADCIN, IO_LVL_LOW); +;;;1337 { +;;;1338 hal_gpio_set_output_data(IO_PAD_ADCIN, IO_LVL_LOW); 00001e 2100 MOVS r1,#0 000020 2014 MOVS r0,#0x14 000022 f7fffffe BL hal_gpio_set_output_data -;;;1335 delayUs(10); +;;;1339 delayUs(10); 000026 200a MOVS r0,#0xa 000028 f7fffffe BL delayUs -;;;1336 hal_gpio_set_output_data(IO_PAD_ADCIN, IO_LVL_HIGH); +;;;1340 hal_gpio_set_output_data(IO_PAD_ADCIN, IO_LVL_HIGH); 00002c 2101 MOVS r1,#1 00002e 2014 MOVS r0,#0x14 000030 f7fffffe BL hal_gpio_set_output_data -;;;1337 delayUs(9); +;;;1341 delayUs(9); 000034 2009 MOVS r0,#9 000036 f7fffffe BL delayUs 00003a 1c64 ADDS r4,r4,#1 -00003c b2e4 UXTB r4,r4 ;1332 +00003c b2e4 UXTB r4,r4 ;1336 |L1.62| -00003e 42ac CMP r4,r5 ;1332 +00003e 42ac CMP r4,r5 ;1336 000040 d3ed BCC |L1.30| -;;;1338 } -;;;1339 } -;;;1340 else -;;;1341 { -;;;1342 hal_gpio_init_output(IO_PAD_ADCIN, IO_LVL_LOW); +;;;1342 } ;;;1343 } -;;;1344 } +;;;1344 else +;;;1345 { +;;;1346 hal_gpio_init_output(IO_PAD_ADCIN, IO_LVL_LOW); +;;;1347 } +;;;1348 } 000042 bd70 POP {r4-r6,pc} |L1.68| -000044 2100 MOVS r1,#0 ;1342 -000046 2014 MOVS r0,#0x14 ;1342 +000044 2100 MOVS r1,#0 ;1346 +000046 2014 MOVS r0,#0x14 ;1346 000048 f7fffffe BL hal_gpio_init_output 00004c bd70 POP {r4-r6,pc} -;;;1345 +;;;1349 ENDP AREA ||i.PWM_OUTPUT_TEST||, CODE, READONLY, ALIGN=2 PWM_OUTPUT_TEST PROC -;;;1387 -;;;1388 void PWM_OUTPUT_TEST(void) +;;;1391 +;;;1392 void PWM_OUTPUT_TEST(void) 000000 b510 PUSH {r4,lr} -;;;1389 { -;;;1390 test_pwm_out_adjust(true, true, 30, 20000); +;;;1393 { +;;;1394 test_pwm_out_adjust(true, true, 30, 20000); 000002 2101 MOVS r1,#1 000004 4b07 LDR r3,|L2.36| 000006 221e MOVS r2,#0x1e 000008 4608 MOV r0,r1 00000a f7fffffe BL test_pwm_out_adjust -;;;1391 delayMs(2); +;;;1395 delayMs(2); 00000e 2002 MOVS r0,#2 000010 f7fffffe BL delayMs -;;;1392 test_pwm_out_adjust(false, false, 40, 10000); +;;;1396 test_pwm_out_adjust(false, false, 40, 10000); 000014 2100 MOVS r1,#0 000016 4b04 LDR r3,|L2.40| 000018 2228 MOVS r2,#0x28 00001a 4608 MOV r0,r1 00001c f7fffffe BL test_pwm_out_adjust -;;;1393 } +;;;1397 } 000020 bd10 POP {r4,pc} -;;;1394 +;;;1398 ENDP 000022 0000 DCW 0x0000 @@ -107,31 +107,31 @@ AREA ||i.PWM_Task||, CODE, READONLY, ALIGN=2 PWM_Task PROC -;;;1405 static uint16_t read_bl_data_bak =0; -;;;1406 void PWM_Task(void) +;;;1409 static uint16_t read_bl_data_bak =0; +;;;1410 void PWM_Task(void) 000000 b51c PUSH {r2-r4,lr} -;;;1407 { -;;;1408 uint16_t pwm_h; -;;;1409 -;;;1410 #ifdef USE_FOR_SUMSUNG_S21U -;;;1411 -;;;1412 #if AMOLED_NT37701_CSOT667 -;;;1413 // s20: read_bl_data = 1~FD -;;;1414 uint8_t reg51_val_h=0; -;;;1415 uint8_t reg51_val_l=0; -;;;1416 if(Flag_blacklight_EN) +;;;1411 { +;;;1412 uint16_t pwm_h; +;;;1413 +;;;1414 #ifdef USE_FOR_SUMSUNG_S21U +;;;1415 +;;;1416 #if AMOLED_NT37701_CSOT667 +;;;1417 // s20: read_bl_data = 1~FD +;;;1418 uint8_t reg51_val_h=0; +;;;1419 uint8_t reg51_val_l=0; +;;;1420 if(Flag_blacklight_EN) 000002 4818 LDR r0,|L3.100| -;;;1417 { -;;;1418 read_bl_data_bak =0; -;;;1419 // hal_pwm_out_sync_thr(0, PWM_PERIOD+1); -;;;1420 hal_dsi_tx_ctrl_write_cmd(0x29, 0, 3, 0x51, 0x00, 0x3F); +;;;1421 { +;;;1422 read_bl_data_bak =0; +;;;1423 // hal_pwm_out_sync_thr(0, PWM_PERIOD+1); +;;;1424 hal_dsi_tx_ctrl_write_cmd(0x29, 0, 3, 0x51, 0x00, 0x3F); 000004 213f MOVS r1,#0x3f -000006 7802 LDRB r2,[r0,#0] ;1416 ; Flag_blacklight_EN -000008 2000 MOVS r0,#0 ;1416 +000006 7802 LDRB r2,[r0,#0] ;1420 ; Flag_blacklight_EN +000008 2000 MOVS r0,#0 ;1420 00000a 4c17 LDR r4,|L3.104| -00000c 2a00 CMP r2,#0 ;1416 +00000c 2a00 CMP r2,#0 ;1420 00000e d009 BEQ |L3.36| -000010 8320 STRH r0,[r4,#0x18] ;1418 +000010 8320 STRH r0,[r4,#0x18] ;1422 000012 9101 STR r1,[sp,#4] 000014 9000 STR r0,[sp,#0] 000016 2351 MOVS r3,#0x51 @@ -140,128 +140,128 @@ 00001c 2029 MOVS r0,#0x29 00001e f7fffffe BL hal_dsi_tx_ctrl_write_cmd |L3.34| -;;;1421 // printf("Flag_blacklight_EN!!!! read_bl_data[%4x] \n", read_bl_data); -;;;1422 return; -;;;1423 } -;;;1424 -;;;1425 if (g_need_enter_sleep_mode) -;;;1426 { -;;;1427 //ΪϨʱ -;;;1428 read_bl_data_bak =0; -;;;1429 // hal_pwm_out_sync_thr(0, PWM_PERIOD-PWM_MIN); //ΪС -;;;1430 hal_dsi_tx_ctrl_write_cmd(0x29, 0, 3, 0x51, 0x00, 0x3F); -;;;1431 // printf("tp_sleep_in!!!! read_bl_data[%4x] \n", read_bl_data); -;;;1432 // return; -;;;1433 } -;;;1434 -;;;1435 if(read_bl_data !=read_bl_data_bak) -;;;1436 { -;;;1437 #if 0 -;;;1438 #if 1//Բ -;;;1439 if (pwm_h >700) -;;;1440 pwm_h = 300+(pwm_h-700)*7/3; -;;;1441 else -;;;1442 pwm_h = 1+(pwm_h-1)*3/7; -;;;1443 #endif -;;;1444 if(pwm_h >8; -;;;1459 hal_dsi_tx_ctrl_write_cmd(0x29, 0, 3, 0x51, reg51_val_h, reg51_val_l); //0FFF -;;;1460 read_bl_data_bak =read_bl_data; -;;;1461 } -;;;1462 -;;;1463 #else -;;;1464 // s20: read_bl_data = 1~FD -;;;1465 -;;;1466 if(Flag_blacklight_EN) -;;;1467 { -;;;1468 read_bl_data_bak =0; -;;;1469 hal_pwm_out_sync_thr(0, PWM_PERIOD+1); -;;;1470 //printf("Flag_blacklight_EN!!!! read_bl_data[%4x] \n", read_bl_data); -;;;1471 return; -;;;1472 } -;;;1473 -;;;1474 if (g_need_enter_sleep_mode) -;;;1475 { -;;;1476 //ΪϨʱ -;;;1477 read_bl_data_bak =0; -;;;1478 hal_pwm_out_sync_thr(0, PWM_PERIOD-PWM_MIN); //ΪС -;;;1479 // printf("tp_sleep_in!!!! read_bl_data[%4x] \n", read_bl_data); -;;;1480 // return; -;;;1481 } -;;;1482 -;;;1483 if(read_bl_data !=read_bl_data_bak) -;;;1484 { -;;;1485 pwm_h = PWM_PERIOD*read_bl_data/0xFF; -;;;1486 #if 1//Բ -;;;1487 if (pwm_h >700) -;;;1488 pwm_h = 300+(pwm_h-700)*7/3; -;;;1489 else -;;;1490 pwm_h = 1+(pwm_h-1)*3/7; -;;;1491 #endif -;;;1492 if(pwm_h 700) +;;;1444 pwm_h = 300+(pwm_h-700)*7/3; +;;;1445 else +;;;1446 pwm_h = 1+(pwm_h-1)*3/7; +;;;1447 #endif +;;;1448 if(pwm_h >8; +;;;1463 hal_dsi_tx_ctrl_write_cmd(0x29, 0, 3, 0x51, reg51_val_h, reg51_val_l); //0FFF +;;;1464 read_bl_data_bak =read_bl_data; +;;;1465 } +;;;1466 +;;;1467 #else +;;;1468 // s20: read_bl_data = 1~FD +;;;1469 +;;;1470 if(Flag_blacklight_EN) +;;;1471 { +;;;1472 read_bl_data_bak =0; +;;;1473 hal_pwm_out_sync_thr(0, PWM_PERIOD+1); +;;;1474 //printf("Flag_blacklight_EN!!!! read_bl_data[%4x] \n", read_bl_data); +;;;1475 return; +;;;1476 } +;;;1477 +;;;1478 if (g_need_enter_sleep_mode) +;;;1479 { +;;;1480 //ΪϨʱ +;;;1481 read_bl_data_bak =0; +;;;1482 hal_pwm_out_sync_thr(0, PWM_PERIOD-PWM_MIN); //ΪС +;;;1483 // printf("tp_sleep_in!!!! read_bl_data[%4x] \n", read_bl_data); +;;;1484 // return; +;;;1485 } +;;;1486 +;;;1487 if(read_bl_data !=read_bl_data_bak) +;;;1488 { +;;;1489 pwm_h = PWM_PERIOD*read_bl_data/0xFF; +;;;1490 #if 1//Բ +;;;1491 if (pwm_h >700) +;;;1492 pwm_h = 300+(pwm_h-700)*7/3; +;;;1493 else +;;;1494 pwm_h = 1+(pwm_h-1)*3/7; +;;;1495 #endif +;;;1496 if(pwm_h 1600) -;;;3982 { -;;;3983 phone_DisplayOFF_count=0; -;;;3984 phone_start_flag=1; -;;;3985 } -;;;3986 } -;;;3987 else -;;;3988 { -;;;3989 if(phone_DisplayOFF_count>30) +;;;3985 { +;;;3986 if(phone_DisplayOFF_count>1600) +;;;3987 { +;;;3988 phone_DisplayOFF_count=0; +;;;3989 phone_start_flag=1; +;;;3990 } +;;;3991 } +;;;3992 else +;;;3993 { +;;;3994 if(phone_DisplayOFF_count>30) 0000ca 8aa0 LDRH r0,[r4,#0x14] ; phone_DisplayOFF_count 0000cc d045 BEQ |L5.346| 0000ce 281e CMP r0,#0x1e 0000d0 d905 BLS |L5.222| -;;;3990 { -;;;3991 phone_DisplayOFF_count=0; +;;;3995 { +;;;3996 phone_DisplayOFF_count=0; 0000d2 82a5 STRH r5,[r4,#0x14] -;;;3992 phone_start_flag=1; +;;;3997 phone_start_flag=1; 0000d4 7166 STRB r6,[r4,#5] -;;;3993 hal_gpio_set_output_data(IO_PAD_AP_INT, IO_LVL_LOW);//ͣ˫2~3s޴.jason_su +;;;3998 hal_gpio_set_output_data(IO_PAD_AP_INT, IO_LVL_LOW);//ͣ˫2~3s޴.jason_su 0000d6 2100 MOVS r1,#0 0000d8 2002 MOVS r0,#2 0000da f7fffffe BL hal_gpio_set_output_data |L5.222| -;;;3994 } -;;;3995 } -;;;3996 -;;;3997 pps_updata_exec(); // pps +;;;3999 } +;;;4000 } +;;;4001 +;;;4002 pps_updata_exec(); // pps 0000de f7fffffe BL pps_updata_exec -;;;3998 -;;;3999 #if ADD_TP_CALIBRATION -;;;4000 tp_heartbeat_exec(); +;;;4003 +;;;4004 #if ADD_TP_CALIBRATION +;;;4005 tp_heartbeat_exec(); 0000e2 f7fffffe BL tp_heartbeat_exec -;;;4001 app_tp_calibration_exec(); +;;;4006 app_tp_calibration_exec(); 0000e6 f7fffffe BL app_tp_calibration_exec -;;;4002 ap_tp_st_touch_scan_point_record_event_exec(); +;;;4007 ap_tp_st_touch_scan_point_record_event_exec(); 0000ea f7fffffe BL ap_tp_st_touch_scan_point_record_event_exec -;;;4003 #endif -;;;4004 -;;;4005 #ifndef DISABLE_TDDI_I2C_FUNCTION -;;;4006 /* ȴ TP жϱTP Эת */ -;;;4007 app_tp_transfer_screen_int(); +;;;4008 #endif +;;;4009 +;;;4010 #ifndef DISABLE_TDDI_I2C_FUNCTION +;;;4011 /* ȴ TP жϱTP Эת */ +;;;4012 app_tp_transfer_screen_int(); 0000ee f7fffffe BL app_tp_transfer_screen_int -;;;4008 #endif -;;;4009 rx_restart_exec(); +;;;4013 #endif +;;;4014 rx_restart_exec(); 0000f2 f7fffffe BL rx_restart_exec |L5.246| -;;;4010 while (hal_dsi_rx_ctrl_dsc_async_handler(g_rx_ctrl_handle)); +;;;4015 while (hal_dsi_rx_ctrl_dsc_async_handler(g_rx_ctrl_handle)); 0000f6 6a20 LDR r0,[r4,#0x20] ; g_rx_ctrl_handle 0000f8 f7fffffe BL hal_dsi_rx_ctrl_dsc_async_handler 0000fc 2800 CMP r0,#0 0000fe d1fa BNE |L5.246| -;;;4011 -;;;4012 #if ENABLE_TP_WAKE_UP -;;;4013 if (g_need_enter_sleep_mode) +;;;4016 +;;;4017 #if ENABLE_TP_WAKE_UP +;;;4018 if (g_need_enter_sleep_mode) 000100 7820 LDRB r0,[r4,#0] ; g_need_enter_sleep_mode 000102 2800 CMP r0,#0 000104 d0c5 BEQ |L5.146| -;;;4014 { -;;;4015 tp_sleep_in=1; +;;;4019 { +;;;4020 tp_sleep_in=1; 000106 482b LDR r0,|L5.436| -;;;4016 hal_gpio_set_output_data(IO_PAD_TD_LEDPWM, IO_LVL_HIGH); +;;;4021 hal_gpio_set_output_data(IO_PAD_TD_LEDPWM, IO_LVL_HIGH); 000108 2101 MOVS r1,#1 -00010a 7006 STRB r6,[r0,#0] ;4015 +00010a 7006 STRB r6,[r0,#0] ;4020 00010c 200a MOVS r0,#0xa 00010e f7fffffe BL hal_gpio_set_output_data -;;;4017 -;;;4018 /* FIXME stop more model */ -;;;4019 hal_dsi_tx_ctrl_stop(g_tx_ctrl_handle); +;;;4022 +;;;4023 /* FIXME stop more model */ +;;;4024 hal_dsi_tx_ctrl_stop(g_tx_ctrl_handle); 000112 6a60 LDR r0,[r4,#0x24] ; g_tx_ctrl_handle 000114 f7fffffe BL hal_dsi_tx_ctrl_stop -;;;4020 hal_dsi_tx_ctrl_deinit(g_tx_ctrl_handle); +;;;4025 hal_dsi_tx_ctrl_deinit(g_tx_ctrl_handle); 000118 6a60 LDR r0,[r4,#0x24] ; g_tx_ctrl_handle 00011a f7fffffe BL hal_dsi_tx_ctrl_deinit -;;;4021 hal_dsi_rx_ctrl_stop(g_rx_ctrl_handle); +;;;4026 hal_dsi_rx_ctrl_stop(g_rx_ctrl_handle); 00011e 6a20 LDR r0,[r4,#0x20] ; g_rx_ctrl_handle 000120 f7fffffe BL hal_dsi_rx_ctrl_stop -;;;4022 hal_dsi_rx_ctrl_deinit(g_rx_ctrl_handle); +;;;4027 hal_dsi_rx_ctrl_deinit(g_rx_ctrl_handle); 000124 6a20 LDR r0,[r4,#0x20] ; g_rx_ctrl_handle 000126 f7fffffe BL hal_dsi_rx_ctrl_deinit -;;;4023 -;;;4024 hal_swire_open(DISABLE); +;;;4028 +;;;4029 hal_swire_open(DISABLE); 00012a 2000 MOVS r0,#0 00012c f7fffffe BL hal_swire_open -;;;4025 hal_swire_deinit(); +;;;4030 hal_swire_deinit(); 000130 f7fffffe BL hal_swire_deinit -;;;4026 hal_timer_stop(SWIRE_TIMER); +;;;4031 hal_timer_stop(SWIRE_TIMER); 000134 2001 MOVS r0,#1 000136 f7fffffe BL hal_timer_stop -;;;4027 hal_timer_deinit(SWIRE_TIMER); +;;;4032 hal_timer_deinit(SWIRE_TIMER); 00013a 2001 MOVS r0,#1 00013c f7fffffe BL hal_timer_deinit -;;;4028 g_tp_sleep_in = true; +;;;4033 g_tp_sleep_in = true; 000140 481d LDR r0,|L5.440| 000142 7006 STRB r6,[r0,#0] -;;;4029 hal_system_set_vcc(false); +;;;4034 hal_system_set_vcc(false); 000144 2000 MOVS r0,#0 000146 f7fffffe BL hal_system_set_vcc -;;;4030 TAU_LOGD("disable video path\n"); +;;;4035 TAU_LOGD("disable video path\n"); 00014a 4a07 LDR r2,|L5.360| 00014c a107 ADR r1,|L5.364| 00014e 3256 ADDS r2,r2,#0x56 000150 a01a ADR r0,|L5.444| 000152 f7fffffe BL LOG_printf -;;;4031 g_need_enter_sleep_mode = false; +;;;4036 g_need_enter_sleep_mode = false; 000156 7025 STRB r5,[r4,#0] 000158 e79b B |L5.146| |L5.346| -00015a 2119 MOVS r1,#0x19 ;3981 -00015c 0189 LSLS r1,r1,#6 ;3981 -00015e 4288 CMP r0,r1 ;3981 +00015a 2119 MOVS r1,#0x19 ;3986 +00015c 0189 LSLS r1,r1,#6 ;3986 +00015e 4288 CMP r0,r1 ;3986 000160 d9bd BLS |L5.222| -000162 82a5 STRH r5,[r4,#0x14] ;3983 -000164 7166 STRB r6,[r4,#5] ;3984 +000162 82a5 STRH r5,[r4,#0x14] ;3988 +000164 7166 STRB r6,[r4,#5] ;3989 000166 e7ba B |L5.222| -;;;4032 } -;;;4033 #endif -;;;4034 -;;;4035 /* enter idle mode*/ -;;;4036 //hal_system_idle_mode(true); -;;;4037 } -;;;4038 -;;;4039 } +;;;4037 } +;;;4038 #endif +;;;4039 +;;;4040 /* enter idle mode*/ +;;;4041 //hal_system_idle_mode(true); +;;;4042 } +;;;4043 +;;;4044 } ENDP |L5.360| - DCD 0x00000f68 + DCD 0x00000f6d |L5.364| 00016c 53323155 DCB "S21U_demo",0 000170 5f64656d @@ -3007,33 +3015,33 @@ AREA ||i.ap_get_reg_df||, CODE, READONLY, ALIGN=2 ap_get_reg_df PROC -;;;1927 -;;;1928 static bool ap_get_reg_df(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +;;;1931 +;;;1932 static bool ap_get_reg_df(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) 000000 b570 PUSH {r4-r6,lr} -;;;1929 { +;;;1933 { 000002 b08e SUB sp,sp,#0x38 -;;;1930 ccm_coef_t ccm; -;;;1931 ccm.coef_c00 = 255; -;;;1932 ccm.coef_c01 = 0; +;;;1934 ccm_coef_t ccm; +;;;1935 ccm.coef_c00 = 255; +;;;1936 ccm.coef_c01 = 0; 000004 2000 MOVS r0,#0 -000006 22ff MOVS r2,#0xff ;1931 -;;;1933 ccm.coef_c02 = 0; +000006 22ff MOVS r2,#0xff ;1935 +;;;1937 ccm.coef_c02 = 0; 000008 9006 STR r0,[sp,#0x18] -;;;1934 ccm.coef_c10 = 0; +;;;1938 ccm.coef_c10 = 0; 00000a 9007 STR r0,[sp,#0x1c] -;;;1935 ccm.coef_c11 = 255; +;;;1939 ccm.coef_c11 = 255; 00000c 9205 STR r2,[sp,#0x14] -;;;1936 ccm.coef_c12 = 0; +;;;1940 ccm.coef_c12 = 0; 00000e 9008 STR r0,[sp,#0x20] -;;;1937 ccm.coef_c20 = 0; +;;;1941 ccm.coef_c20 = 0; 000010 900a STR r0,[sp,#0x28] -;;;1938 ccm.coef_c21 = 0; +;;;1942 ccm.coef_c21 = 0; 000012 900b STR r0,[sp,#0x2c] -;;;1939 ccm.coef_c22 = 255; +;;;1943 ccm.coef_c22 = 255; 000014 9209 STR r2,[sp,#0x24] -;;;1940 -;;;1941 #ifdef ADD_PANEL_DISPLAY_MODE -;;;1942 value_reg_df = (dcs_packet->packet_param[35] << 8) + dcs_packet->packet_param[33]; +;;;1944 +;;;1945 #ifdef ADD_PANEL_DISPLAY_MODE +;;;1946 value_reg_df = (dcs_packet->packet_param[35] << 8) + dcs_packet->packet_param[33]; 000016 920d STR r2,[sp,#0x34] 000018 900c STR r0,[sp,#0x30] 00001a 68cb LDR r3,[r1,#0xc] @@ -3044,246 +3052,246 @@ 000024 0200 LSLS r0,r0,#8 000026 1904 ADDS r4,r0,r4 000028 4817 LDR r0,|L6.136| -;;;1943 panel_mode = dcs_packet->packet_param[0]; +;;;1947 panel_mode = dcs_packet->packet_param[0]; 00002a 6344 STR r4,[r0,#0x34] ; value_reg_df 00002c 781d LDRB r5,[r3,#0] 00002e 7285 STRB r5,[r0,#0xa] -;;;1944 panel_r =dcs_packet->packet_param[49]; +;;;1948 panel_r =dcs_packet->packet_param[49]; 000030 7c4c LDRB r4,[r1,#0x11] 000032 8344 STRH r4,[r0,#0x1a] -;;;1945 panel_g =dcs_packet->packet_param[51]; +;;;1949 panel_g =dcs_packet->packet_param[51]; 000034 7ccb LDRB r3,[r1,#0x13] 000036 8383 STRH r3,[r0,#0x1c] -;;;1946 panel_b =dcs_packet->packet_param[53]; +;;;1950 panel_b =dcs_packet->packet_param[53]; 000038 7d4e LDRB r6,[r1,#0x15] 00003a 83c6 STRH r6,[r0,#0x1e] -00003c a909 ADD r1,sp,#0x24 ;1930 -;;;1947 // //TAU_LOGD("value_reg_df[%4x],panel_mode[%4x],panel_r[%4x],panel_g[%4x],panel_b[%4x]", value_reg_df,panel_mode,panel_r,panel_g,panel_b); -;;;1948 -;;;1949 if (panel_mode ==00) +00003c a909 ADD r1,sp,#0x24 ;1934 +;;;1951 // //TAU_LOGD("value_reg_df[%4x],panel_mode[%4x],panel_r[%4x],panel_g[%4x],panel_b[%4x]", value_reg_df,panel_mode,panel_r,panel_g,panel_b); +;;;1952 +;;;1953 if (panel_mode ==00) 00003e 2d00 CMP r5,#0 000040 d01d BEQ |L6.126| -;;;1950 { -;;;1951 //ģʽ -;;;1952 #ifdef USE_FOR_S10_BLUE_MODE -;;;1953 //panel_r =256-RATIO_VALUE*(0xFF-panel_r); -;;;1954 //panel_g =256-RATIO_VALUE*(0xFF-panel_g); -;;;1955 //panel_b =256-RATIO_VALUE*(0xFF-panel_b); -;;;1956 // hal_dsi_rx_ctrl_set_cus_pq_gain(g_rx_ctrl_handle,panel_r,panel_g,panel_b); -;;;1957 ccm.coef_c00 = panel_r; -;;;1958 ccm.coef_c11 = panel_g; -;;;1959 ccm.coef_c22 = panel_b; -;;;1960 hal_dsi_tx_ctrl_set_ccm(ccm); -;;;1961 -;;;1962 #else -;;;1963 value_reg_df =value_reg_df&0xFF; -;;;1964 switch(value_reg_df) -;;;1965 { -;;;1966 case 0xC1: -;;;1967 case 0xC3: -;;;1968 value_blue = BLUE_MIN; -;;;1969 break; -;;;1970 -;;;1971 case 0xCF: -;;;1972 case 0xD0: -;;;1973 value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)/BLUE_STEP; -;;;1974 break; -;;;1975 -;;;1976 case 0xD8: -;;;1977 value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*2/BLUE_STEP; +;;;1954 { +;;;1955 //ģʽ +;;;1956 #ifdef USE_FOR_S10_BLUE_MODE +;;;1957 //panel_r =256-RATIO_VALUE*(0xFF-panel_r); +;;;1958 //panel_g =256-RATIO_VALUE*(0xFF-panel_g); +;;;1959 //panel_b =256-RATIO_VALUE*(0xFF-panel_b); +;;;1960 // hal_dsi_rx_ctrl_set_cus_pq_gain(g_rx_ctrl_handle,panel_r,panel_g,panel_b); +;;;1961 ccm.coef_c00 = panel_r; +;;;1962 ccm.coef_c11 = panel_g; +;;;1963 ccm.coef_c22 = panel_b; +;;;1964 hal_dsi_tx_ctrl_set_ccm(ccm); +;;;1965 +;;;1966 #else +;;;1967 value_reg_df =value_reg_df&0xFF; +;;;1968 switch(value_reg_df) +;;;1969 { +;;;1970 case 0xC1: +;;;1971 case 0xC3: +;;;1972 value_blue = BLUE_MIN; +;;;1973 break; +;;;1974 +;;;1975 case 0xCF: +;;;1976 case 0xD0: +;;;1977 value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)/BLUE_STEP; ;;;1978 break; ;;;1979 -;;;1980 case 0xDE: -;;;1981 value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*3/BLUE_STEP; +;;;1980 case 0xD8: +;;;1981 value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*2/BLUE_STEP; ;;;1982 break; ;;;1983 -;;;1984 case 0xE4: -;;;1985 case 0xE5: -;;;1986 value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*4/BLUE_STEP; -;;;1987 break; -;;;1988 -;;;1989 case 0xE9: -;;;1990 case 0xEA: -;;;1991 value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*5/BLUE_STEP; -;;;1992 break; -;;;1993 -;;;1994 case 0xED: -;;;1995 case 0xEE: -;;;1996 value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*6/BLUE_STEP; -;;;1997 break; -;;;1998 -;;;1999 case 0xF1: -;;;2000 case 0xF2: -;;;2001 value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*7/BLUE_STEP; -;;;2002 break; -;;;2003 -;;;2004 case 0xF4: -;;;2005 case 0xF5: -;;;2006 value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*8/BLUE_STEP; -;;;2007 break; -;;;2008 -;;;2009 case 0xF7: -;;;2010 case 0xF8: -;;;2011 value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*9/BLUE_STEP; -;;;2012 break; -;;;2013 -;;;2014 case 0xFA: -;;;2015 value_blue = BLUE_MAX; +;;;1984 case 0xDE: +;;;1985 value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*3/BLUE_STEP; +;;;1986 break; +;;;1987 +;;;1988 case 0xE4: +;;;1989 case 0xE5: +;;;1990 value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*4/BLUE_STEP; +;;;1991 break; +;;;1992 +;;;1993 case 0xE9: +;;;1994 case 0xEA: +;;;1995 value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*5/BLUE_STEP; +;;;1996 break; +;;;1997 +;;;1998 case 0xED: +;;;1999 case 0xEE: +;;;2000 value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*6/BLUE_STEP; +;;;2001 break; +;;;2002 +;;;2003 case 0xF1: +;;;2004 case 0xF2: +;;;2005 value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*7/BLUE_STEP; +;;;2006 break; +;;;2007 +;;;2008 case 0xF4: +;;;2009 case 0xF5: +;;;2010 value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*8/BLUE_STEP; +;;;2011 break; +;;;2012 +;;;2013 case 0xF7: +;;;2014 case 0xF8: +;;;2015 value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*9/BLUE_STEP; ;;;2016 break; -;;;2017 -;;;2018 default: -;;;2019 case 0xFF: -;;;2020 value_blue = 0; -;;;2021 break; -;;;2022 -;;;2023 } -;;;2024 hal_dsi_rx_ctrl_set_cus_pq_gain(g_rx_ctrl_handle,256,256,256); -;;;2025 hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0x84, value_blue); -;;;2026 -;;;2027 #endif -;;;2028 -;;;2029 } -;;;2030 else -;;;2031 { -;;;2032 #ifndef USE_FOR_S10_BLUE_MODE -;;;2033 value_blue =0; -;;;2034 hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0x84, value_blue); //ģʽs8+/s9+ -;;;2035 #endif -;;;2036 -;;;2037 //һ㣬ЧԡҪݿͻҪϸ -;;;2038 -;;;2039 panel_r =256-RATIO_VALUE*(0xFF-panel_r); +;;;2017 +;;;2018 case 0xFA: +;;;2019 value_blue = BLUE_MAX; +;;;2020 break; +;;;2021 +;;;2022 default: +;;;2023 case 0xFF: +;;;2024 value_blue = 0; +;;;2025 break; +;;;2026 +;;;2027 } +;;;2028 hal_dsi_rx_ctrl_set_cus_pq_gain(g_rx_ctrl_handle,256,256,256); +;;;2029 hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0x84, value_blue); +;;;2030 +;;;2031 #endif +;;;2032 +;;;2033 } +;;;2034 else +;;;2035 { +;;;2036 #ifndef USE_FOR_S10_BLUE_MODE +;;;2037 value_blue =0; +;;;2038 hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0x84, value_blue); //ģʽs8+/s9+ +;;;2039 #endif +;;;2040 +;;;2041 //һ㣬ЧԡҪݿͻҪϸ +;;;2042 +;;;2043 panel_r =256-RATIO_VALUE*(0xFF-panel_r); 000042 1b14 SUBS r4,r2,r4 000044 0065 LSLS r5,r4,#1 000046 1c54 ADDS r4,r2,#1 -;;;2040 panel_g =256-RATIO_VALUE*(0xFF-panel_g); +;;;2044 panel_g =256-RATIO_VALUE*(0xFF-panel_g); 000048 1ad3 SUBS r3,r2,r3 -00004a 1b65 SUBS r5,r4,r5 ;2039 +00004a 1b65 SUBS r5,r4,r5 ;2043 00004c 005b LSLS r3,r3,#1 00004e 1ae3 SUBS r3,r4,r3 -;;;2041 panel_b =256-RATIO_VALUE*(0xFF-panel_b); +;;;2045 panel_b =256-RATIO_VALUE*(0xFF-panel_b); 000050 1b92 SUBS r2,r2,r6 -000052 b2ad UXTH r5,r5 ;2039 +000052 b2ad UXTH r5,r5 ;2043 000054 0052 LSLS r2,r2,#1 -000056 8345 STRH r5,[r0,#0x1a] ;2039 -000058 b29b UXTH r3,r3 ;2040 +000056 8345 STRH r5,[r0,#0x1a] ;2043 +000058 b29b UXTH r3,r3 ;2044 00005a 1aa2 SUBS r2,r4,r2 -00005c 8383 STRH r3,[r0,#0x1c] ;2040 +00005c 8383 STRH r3,[r0,#0x1c] ;2044 00005e b292 UXTH r2,r2 000060 83c2 STRH r2,[r0,#0x1e] -;;;2042 // hal_dsi_rx_ctrl_set_cus_pq_gain(g_rx_ctrl_handle,panel_r,panel_g,panel_b); -;;;2043 -;;;2044 ccm.coef_c00 = panel_r; -;;;2045 ccm.coef_c11 = panel_g; -;;;2046 ccm.coef_c22 = panel_b; +;;;2046 // hal_dsi_rx_ctrl_set_cus_pq_gain(g_rx_ctrl_handle,panel_r,panel_g,panel_b); +;;;2047 +;;;2048 ccm.coef_c00 = panel_r; +;;;2049 ccm.coef_c11 = panel_g; +;;;2050 ccm.coef_c22 = panel_b; 000062 9505 STR r5,[sp,#0x14] 000064 9309 STR r3,[sp,#0x24] 000066 920d STR r2,[sp,#0x34] |L6.104| -;;;2047 hal_dsi_tx_ctrl_set_ccm(ccm); +;;;2051 hal_dsi_tx_ctrl_set_ccm(ccm); 000068 2214 MOVS r2,#0x14 00006a 4668 MOV r0,sp 00006c f7fffffe BL __aeabi_memcpy4 000070 ad05 ADD r5,sp,#0x14 000072 cd0f LDM r5!,{r0-r3} 000074 f7fffffe BL hal_dsi_tx_ctrl_set_ccm -;;;2048 } -;;;2049 -;;;2050 #ifndef USE_FOR_S10_BLUE_MODE -;;;2051 if (blue_flag==0) -;;;2052 { -;;;2053 blue_flag =1; -;;;2054 delayMs(20); -;;;2055 hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0x84, value_blue); -;;;2056 } -;;;2057 #endif -;;;2058 -;;;2059 #else -;;;2060 value_reg_df = (dcs_packet->packet_param[35] << 8) + dcs_packet->packet_param[33]; -;;;2061 -;;;2062 value_reg_df =value_reg_df&0xFF; -;;;2063 switch(value_reg_df) -;;;2064 { -;;;2065 case 0xC1: -;;;2066 case 0xC3: -;;;2067 value_blue = BLUE_MIN; -;;;2068 break; -;;;2069 -;;;2070 case 0xCF: -;;;2071 case 0xD0: -;;;2072 value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)/BLUE_STEP; -;;;2073 break; -;;;2074 -;;;2075 case 0xD8: -;;;2076 value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*2/BLUE_STEP; +;;;2052 } +;;;2053 +;;;2054 #ifndef USE_FOR_S10_BLUE_MODE +;;;2055 if (blue_flag==0) +;;;2056 { +;;;2057 blue_flag =1; +;;;2058 delayMs(20); +;;;2059 hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0x84, value_blue); +;;;2060 } +;;;2061 #endif +;;;2062 +;;;2063 #else +;;;2064 value_reg_df = (dcs_packet->packet_param[35] << 8) + dcs_packet->packet_param[33]; +;;;2065 +;;;2066 value_reg_df =value_reg_df&0xFF; +;;;2067 switch(value_reg_df) +;;;2068 { +;;;2069 case 0xC1: +;;;2070 case 0xC3: +;;;2071 value_blue = BLUE_MIN; +;;;2072 break; +;;;2073 +;;;2074 case 0xCF: +;;;2075 case 0xD0: +;;;2076 value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)/BLUE_STEP; ;;;2077 break; ;;;2078 -;;;2079 case 0xDE: -;;;2080 value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*3/BLUE_STEP; +;;;2079 case 0xD8: +;;;2080 value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*2/BLUE_STEP; ;;;2081 break; ;;;2082 -;;;2083 case 0xE4: -;;;2084 case 0xE5: -;;;2085 value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*4/BLUE_STEP; -;;;2086 break; -;;;2087 -;;;2088 case 0xE9: -;;;2089 case 0xEA: -;;;2090 value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*5/BLUE_STEP; -;;;2091 break; -;;;2092 -;;;2093 case 0xED: -;;;2094 case 0xEE: -;;;2095 value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*6/BLUE_STEP; -;;;2096 break; -;;;2097 -;;;2098 case 0xF1: -;;;2099 case 0xF2: -;;;2100 value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*7/BLUE_STEP; -;;;2101 break; -;;;2102 -;;;2103 case 0xF4: -;;;2104 case 0xF5: -;;;2105 value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*8/BLUE_STEP; -;;;2106 break; -;;;2107 -;;;2108 case 0xF7: -;;;2109 case 0xF8: -;;;2110 value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*9/BLUE_STEP; -;;;2111 break; -;;;2112 -;;;2113 case 0xFA: -;;;2114 value_blue = BLUE_MAX; +;;;2083 case 0xDE: +;;;2084 value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*3/BLUE_STEP; +;;;2085 break; +;;;2086 +;;;2087 case 0xE4: +;;;2088 case 0xE5: +;;;2089 value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*4/BLUE_STEP; +;;;2090 break; +;;;2091 +;;;2092 case 0xE9: +;;;2093 case 0xEA: +;;;2094 value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*5/BLUE_STEP; +;;;2095 break; +;;;2096 +;;;2097 case 0xED: +;;;2098 case 0xEE: +;;;2099 value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*6/BLUE_STEP; +;;;2100 break; +;;;2101 +;;;2102 case 0xF1: +;;;2103 case 0xF2: +;;;2104 value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*7/BLUE_STEP; +;;;2105 break; +;;;2106 +;;;2107 case 0xF4: +;;;2108 case 0xF5: +;;;2109 value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*8/BLUE_STEP; +;;;2110 break; +;;;2111 +;;;2112 case 0xF7: +;;;2113 case 0xF8: +;;;2114 value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*9/BLUE_STEP; ;;;2115 break; -;;;2116 -;;;2117 default: -;;;2118 case 0xFF: -;;;2119 value_blue = 0; -;;;2120 break; -;;;2121 -;;;2122 } -;;;2123 -;;;2124 //TAU_LOGD("df[%4x]", value_reg_df); -;;;2125 hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0x84, value_blue); -;;;2126 if (blue_flag==0) -;;;2127 { -;;;2128 blue_flag =1; -;;;2129 delayMs(20); -;;;2130 hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0x84, value_blue); -;;;2131 } -;;;2132 #endif -;;;2133 -;;;2134 return true; +;;;2116 +;;;2117 case 0xFA: +;;;2118 value_blue = BLUE_MAX; +;;;2119 break; +;;;2120 +;;;2121 default: +;;;2122 case 0xFF: +;;;2123 value_blue = 0; +;;;2124 break; +;;;2125 +;;;2126 } +;;;2127 +;;;2128 //TAU_LOGD("df[%4x]", value_reg_df); +;;;2129 hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0x84, value_blue); +;;;2130 if (blue_flag==0) +;;;2131 { +;;;2132 blue_flag =1; +;;;2133 delayMs(20); +;;;2134 hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0x84, value_blue); +;;;2135 } +;;;2136 #endif +;;;2137 +;;;2138 return true; 000078 2001 MOVS r0,#1 -;;;2135 } +;;;2139 } 00007a b00e ADD sp,sp,#0x38 00007c bd70 POP {r4-r6,pc} |L6.126| -00007e 960d STR r6,[sp,#0x34] ;1960 -000080 9405 STR r4,[sp,#0x14] ;1960 -000082 9309 STR r3,[sp,#0x24] ;1960 +00007e 960d STR r6,[sp,#0x34] ;1964 +000080 9405 STR r4,[sp,#0x14] ;1964 +000082 9309 STR r3,[sp,#0x24] ;1964 000084 e7f0 B |L6.104| -;;;2136 #endif +;;;2140 #endif ENDP 000086 0000 DCW 0x0000 @@ -3351,22 +3359,22 @@ AREA ||i.ap_set_backlight_51||, CODE, READONLY, ALIGN=2 ap_set_backlight_51 PROC -;;;1576 #if 1 // -;;;1577 static bool ap_set_backlight_51(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +;;;1580 #if 1 // +;;;1581 static bool ap_set_backlight_51(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) 000000 b51c PUSH {r2-r4,lr} -;;;1578 { -;;;1579 #if 1 // video mode -;;;1580 uint16_t rd_51_val, rd_51_val2; -;;;1581 -;;;1582 rd_51_val = dcs_packet->packet_param[0]; +;;;1582 { +;;;1583 #if 1 // video mode +;;;1584 uint16_t rd_51_val, rd_51_val2; +;;;1585 +;;;1586 rd_51_val = dcs_packet->packet_param[0]; 000002 68c8 LDR r0,[r1,#0xc] 000004 7801 LDRB r1,[r0,#0] -;;;1583 rd_51_val = (rd_51_val<<8); -;;;1584 rd_51_val |= dcs_packet->packet_param[1]; +;;;1587 rd_51_val = (rd_51_val<<8); +;;;1588 rd_51_val |= dcs_packet->packet_param[1]; 000006 7840 LDRB r0,[r0,#1] -000008 0209 LSLS r1,r1,#8 ;1583 +000008 0209 LSLS r1,r1,#8 ;1587 00000a 4308 ORRS r0,r0,r1 -;;;1585 rd_51_val2 = (rd_51_val-0x04)*1945/2043+0x66; +;;;1589 rd_51_val2 = (rd_51_val-0x04)*1945/2043+0x66; 00000c 490d LDR r1,|L8.68| 00000e 1f00 SUBS r0,r0,#4 000010 4348 MULS r0,r1,r0 @@ -3375,21 +3383,21 @@ 000016 f7fffffe BL __aeabi_idivmod 00001a 3066 ADDS r0,r0,#0x66 00001c b280 UXTH r0,r0 -;;;1586 -;;;1587 if (rd_51_val2 < 0x220 && rd_51_val2 > 0x1B3){ +;;;1590 +;;;1591 if (rd_51_val2 < 0x220 && rd_51_val2 > 0x1B3){ 00001e 4601 MOV r1,r0 000020 39ff SUBS r1,r1,#0xff 000022 39b5 SUBS r1,r1,#0xb5 000024 296c CMP r1,#0x6c 000026 d201 BCS |L8.44| -;;;1588 rd_51_val2 = 0x1B3; +;;;1592 rd_51_val2 = 0x1B3; 000028 20ff MOVS r0,#0xff 00002a 30b4 ADDS r0,r0,#0xb4 |L8.44| -;;;1589 } -;;;1590 // TAU_LOGD("51[%04X][%04X]", rd_51_val, rd_51_val2); -;;;1591 -;;;1592 hal_dsi_tx_ctrl_write_cmd(0x39, 0, 3, 0x51, rd_51_val2>>8, rd_51_val2&0x00FF); +;;;1593 } +;;;1594 // TAU_LOGD("51[%04X][%04X]", rd_51_val, rd_51_val2); +;;;1595 +;;;1596 hal_dsi_tx_ctrl_write_cmd(0x39, 0, 3, 0x51, rd_51_val2>>8, rd_51_val2&0x00FF); 00002c b2c1 UXTB r1,r0 00002e 0a00 LSRS r0,r0,#8 000030 9101 STR r1,[sp,#4] @@ -3399,20 +3407,20 @@ 000038 2100 MOVS r1,#0 00003a 2039 MOVS r0,#0x39 00003c f7fffffe BL hal_dsi_tx_ctrl_write_cmd -;;;1593 -;;;1594 #else -;;;1595 uint8_t cmd_data[2]; -;;;1596 -;;;1597 cmd_data[0] = dcs_packet->packet_param[0]; -;;;1598 cmd_data[1] = dcs_packet->packet_param[1]; -;;;1599 hal_dsi_tx_ctrl_write_cmd(0x39, 0, 3, 0x51, cmd_data[0], cmd_data[1]); -;;;1600 //TAU_LOGD("51:[%x]", (cmd_data[0]<<8)|cmd_data[1]); -;;;1601 #endif -;;;1602 return true; +;;;1597 +;;;1598 #else +;;;1599 uint8_t cmd_data[2]; +;;;1600 +;;;1601 cmd_data[0] = dcs_packet->packet_param[0]; +;;;1602 cmd_data[1] = dcs_packet->packet_param[1]; +;;;1603 hal_dsi_tx_ctrl_write_cmd(0x39, 0, 3, 0x51, cmd_data[0], cmd_data[1]); +;;;1604 //TAU_LOGD("51:[%x]", (cmd_data[0]<<8)|cmd_data[1]); +;;;1605 #endif +;;;1606 return true; 000040 2001 MOVS r0,#1 -;;;1603 } +;;;1607 } 000042 bd1c POP {r2-r4,pc} -;;;1604 +;;;1608 ENDP |L8.68| @@ -3421,34 +3429,34 @@ AREA ||i.ap_set_display_off||, CODE, READONLY, ALIGN=2 ap_set_display_off PROC -;;;1270 -;;;1271 static bool ap_set_display_off(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +;;;1274 +;;;1275 static bool ap_set_display_off(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) 000000 b510 PUSH {r4,lr} -;;;1272 { -;;;1273 hal_dsi_tx_ctrl_write_cmd(0x05, 0, 1, 0x28); +;;;1276 { +;;;1277 hal_dsi_tx_ctrl_write_cmd(0x05, 0, 1, 0x28); 000002 2328 MOVS r3,#0x28 000004 2201 MOVS r2,#1 000006 2100 MOVS r1,#0 000008 2005 MOVS r0,#5 00000a f7fffffe BL hal_dsi_tx_ctrl_write_cmd -;;;1274 TAU_LOGD("disp off"); +;;;1278 TAU_LOGD("disp off"); 00000e 4a03 LDR r2,|L9.28| 000010 a103 ADR r1,|L9.32| 000012 a006 ADR r0,|L9.44| 000014 f7fffffe BL LOG_printf -;;;1275 -;;;1276 //#if ENABLE_TP_WAKE_UP -;;;1277 // hal_gpio_set_output_data(POWER_IO_A, IO_LVL_HIGH); -;;;1278 //#endif -;;;1279 return true; +;;;1279 +;;;1280 //#if ENABLE_TP_WAKE_UP +;;;1281 // hal_gpio_set_output_data(POWER_IO_A, IO_LVL_HIGH); +;;;1282 //#endif +;;;1283 return true; 000018 2001 MOVS r0,#1 -;;;1280 } +;;;1284 } 00001a bd10 POP {r4,pc} -;;;1281 +;;;1285 ENDP |L9.28| - DCD 0x000004fa + DCD 0x000004fe |L9.32| 000020 53323155 DCB "S21U_demo",0 000024 5f64656d @@ -3469,24 +3477,24 @@ AREA ||i.ap_set_display_on||, CODE, READONLY, ALIGN=2 ap_set_display_on PROC -;;;1264 -;;;1265 static bool ap_set_display_on(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +;;;1268 +;;;1269 static bool ap_set_display_on(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) 000000 b510 PUSH {r4,lr} -;;;1266 { -;;;1267 TAU_LOGD("disp on"); +;;;1270 { +;;;1271 TAU_LOGD("disp on"); 000002 4a03 LDR r2,|L10.16| 000004 a103 ADR r1,|L10.20| 000006 a006 ADR r0,|L10.32| 000008 f7fffffe BL LOG_printf -;;;1268 return true; +;;;1272 return true; 00000c 2001 MOVS r0,#1 -;;;1269 } +;;;1273 } 00000e bd10 POP {r4,pc} -;;;1270 +;;;1274 ENDP |L10.16| - DCD 0x000004f3 + DCD 0x000004f7 |L10.20| 000014 53323155 DCB "S21U_demo",0 000018 5f64656d @@ -3503,62 +3511,62 @@ AREA ||i.ap_set_enter_sleep_mode||, CODE, READONLY, ALIGN=2 ap_set_enter_sleep_mode PROC -;;;1282 -;;;1283 static bool ap_set_enter_sleep_mode(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +;;;1286 +;;;1287 static bool ap_set_enter_sleep_mode(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) 000000 b510 PUSH {r4,lr} -;;;1284 { -;;;1285 hal_dsi_rx_ctrl_set_sw_tear_mode(g_rx_ctrl_handle); +;;;1288 { +;;;1289 hal_dsi_rx_ctrl_set_sw_tear_mode(g_rx_ctrl_handle); 000002 4c11 LDR r4,|L11.72| 000004 6a20 LDR r0,[r4,#0x20] ; g_rx_ctrl_handle 000006 f7fffffe BL hal_dsi_rx_ctrl_set_sw_tear_mode -;;;1286 -;;;1287 Gpio_swire_output(0, 0); +;;;1290 +;;;1291 Gpio_swire_output(0, 0); 00000a 2100 MOVS r1,#0 00000c 4608 MOV r0,r1 00000e f7fffffe BL Gpio_swire_output -;;;1288 delayMs(50); +;;;1292 delayMs(50); 000012 2032 MOVS r0,#0x32 000014 f7fffffe BL delayMs -;;;1289 hal_dsi_tx_ctrl_write_cmd(0x05, 0, 1, 0x10); +;;;1293 hal_dsi_tx_ctrl_write_cmd(0x05, 0, 1, 0x10); 000018 2310 MOVS r3,#0x10 00001a 2201 MOVS r2,#1 00001c 2100 MOVS r1,#0 00001e 2005 MOVS r0,#5 000020 f7fffffe BL hal_dsi_tx_ctrl_write_cmd -;;;1290 delayMs(20); +;;;1294 delayMs(20); 000024 2014 MOVS r0,#0x14 000026 f7fffffe BL delayMs -;;;1291 hal_gpio_set_output_data(IO_PAD_PWMEN, IO_LVL_LOW); +;;;1295 hal_gpio_set_output_data(IO_PAD_PWMEN, IO_LVL_LOW); 00002a 2100 MOVS r1,#0 00002c 2013 MOVS r0,#0x13 00002e f7fffffe BL hal_gpio_set_output_data -;;;1292 -;;;1293 TAU_LOGD("enter sleep mode"); +;;;1296 +;;;1297 TAU_LOGD("enter sleep mode"); 000032 4a06 LDR r2,|L11.76| 000034 a106 ADR r1,|L11.80| 000036 a009 ADR r0,|L11.92| 000038 f7fffffe BL LOG_printf -;;;1294 -;;;1295 #if ENABLE_TP_WAKE_UP -;;;1296 g_need_enter_sleep_mode = true; +;;;1298 +;;;1299 #if ENABLE_TP_WAKE_UP +;;;1300 g_need_enter_sleep_mode = true; 00003c 2001 MOVS r0,#1 00003e 7020 STRB r0,[r4,#0] -;;;1297 #endif -;;;1298 g_exit_sleep_mode = false; +;;;1301 #endif +;;;1302 g_exit_sleep_mode = false; 000040 2000 MOVS r0,#0 000042 70e0 STRB r0,[r4,#3] -;;;1299 -;;;1300 return true; +;;;1303 +;;;1304 return true; 000044 2001 MOVS r0,#1 -;;;1301 } +;;;1305 } 000046 bd10 POP {r4,pc} -;;;1302 +;;;1306 ENDP |L11.72| DCD ||.data|| |L11.76| - DCD 0x0000050d + DCD 0x00000511 |L11.80| 000050 53323155 DCB "S21U_demo",0 000054 5f64656d @@ -3581,31 +3589,31 @@ AREA ||i.ap_set_exit_sleep_mode||, CODE, READONLY, ALIGN=2 ap_set_exit_sleep_mode PROC -;;;1302 -;;;1303 static bool ap_set_exit_sleep_mode(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +;;;1306 +;;;1307 static bool ap_set_exit_sleep_mode(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) 000000 b510 PUSH {r4,lr} -;;;1304 { -;;;1305 TAU_LOGD("exit sleep mode"); +;;;1308 { +;;;1309 TAU_LOGD("exit sleep mode"); 000002 4a04 LDR r2,|L12.20| 000004 a104 ADR r1,|L12.24| 000006 a007 ADR r0,|L12.36| 000008 f7fffffe BL LOG_printf -;;;1306 g_exit_sleep_mode = true; +;;;1310 g_exit_sleep_mode = true; 00000c 490c LDR r1,|L12.64| 00000e 2001 MOVS r0,#1 000010 70c8 STRB r0,[r1,#3] -;;;1307 -;;;1308 /* AVDD ϵ, ڽϢPPS */ -;;;1309 //hal_gpio_set_output_data(IO_PAD_PWMEN, IO_LVL_HIGH); -;;;1310 //hal_dsi_tx_ctrl_write_cmd(0x05, 0, 2, 0x11); -;;;1311 return true; -;;;1312 } +;;;1311 +;;;1312 /* AVDD ϵ, ڽϢPPS */ +;;;1313 //hal_gpio_set_output_data(IO_PAD_PWMEN, IO_LVL_HIGH); +;;;1314 //hal_dsi_tx_ctrl_write_cmd(0x05, 0, 2, 0x11); +;;;1315 return true; +;;;1316 } 000012 bd10 POP {r4,pc} -;;;1313 +;;;1317 ENDP |L12.20| - DCD 0x00000519 + DCD 0x0000051d |L12.24| 000018 53323155 DCB "S21U_demo",0 00001c 5f64656d @@ -3626,111 +3634,109 @@ AREA ||i.ap_set_hbm_53||, CODE, READONLY, ALIGN=2 ap_set_hbm_53 PROC -;;;2137 -;;;2138 static bool ap_set_hbm_53(hal_dsi_rx_ctrl_handle_t* handler, hal_dcs_packet_t* dcs_packet) +;;;2141 +;;;2142 static bool ap_set_hbm_53(hal_dsi_rx_ctrl_handle_t* handler, hal_dcs_packet_t* dcs_packet) 000000 68c8 LDR r0,[r1,#0xc] -;;;2139 { -;;;2140 -;;;2141 if(dcs_packet->packet_param[0] == 0x24 || dcs_packet->packet_param[0] == 0x23) // AODģʽ -000002 7801 LDRB r1,[r0,#0] -;;;2142 { -;;;2143 g_tp_sleep_in = true; -000004 4805 LDR r0,|L13.28| -000006 2924 CMP r1,#0x24 ;2141 -000008 d005 BEQ |L13.22| -00000a 2923 CMP r1,#0x23 ;2141 -00000c d003 BEQ |L13.22| -;;;2144 // hal_dsi_tx_ctrl_write_cmd(0x39, 0, 3, 0x51, 0x01, 0x80); -;;;2145 } -;;;2146 else -;;;2147 { -;;;2148 g_tp_sleep_in = false; -00000e 2100 MOVS r1,#0 - |L13.16| -000010 7001 STRB r1,[r0,#0] +;;;2143 { +;;;2144 +;;;2145 if(dcs_packet->packet_param[0] == 0x24 || dcs_packet->packet_param[0] == 0x23) // AODģʽ +000002 7800 LDRB r0,[r0,#0] +000004 2824 CMP r0,#0x24 +000006 d001 BEQ |L13.12| +000008 2823 CMP r0,#0x23 +00000a d102 BNE |L13.18| + |L13.12| +;;;2146 { +;;;2147 g_tp_sleep_in = true; +00000c 4902 LDR r1,|L13.24| +00000e 2001 MOVS r0,#1 +000010 7008 STRB r0,[r1,#0] + |L13.18| +;;;2148 // hal_dsi_tx_ctrl_write_cmd(0x39, 0, 3, 0x51, 0x01, 0x80); ;;;2149 } -;;;2150 // TAU_LOGD("53:[%2x]", dcs_packet->packet_param[0]); -;;;2151 -;;;2152 return true; +;;;2150 // else +;;;2151 // { +;;;2152 // g_tp_sleep_in = false; +;;;2153 // } +;;;2154 // TAU_LOGD("53:[%2x]", dcs_packet->packet_param[0]); +;;;2155 +;;;2156 return true; 000012 2001 MOVS r0,#1 -;;;2153 } +;;;2157 } 000014 4770 BX lr - |L13.22| -000016 2101 MOVS r1,#1 ;2143 -000018 e7fa B |L13.16| -;;;2154 +;;;2158 ENDP -00001a 0000 DCW 0x0000 - |L13.28| +000016 0000 DCW 0x0000 + |L13.24| DCD g_tp_sleep_in AREA ||i.ap_update_frame_rate||, CODE, READONLY, ALIGN=2 ap_update_frame_rate PROC -;;;1534 static uint8_t R60_Parma_backup = 0x00; -;;;1535 static bool ap_update_frame_rate(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +;;;1538 static uint8_t R60_Parma_backup = 0x00; +;;;1539 static bool ap_update_frame_rate(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) 000000 b510 PUSH {r4,lr} -;;;1536 { -;;;1537 #if 0 -;;;1538 static uint8_t frame_rate = 100; -;;;1539 if (frame_rate != dcs_packet->packet_param[0]) -;;;1540 { -;;;1541 frame_rate = dcs_packet->packet_param[0]; -;;;1542 if (frame_rate == 0x00) -;;;1543 { -;;;1544 hal_dsi_rx_ctrl_set_tear_mode_ex(g_rx_ctrl_handle, SYNC_LINE, TE_HW_MODE); -;;;1545 } -;;;1546 else +;;;1540 { +;;;1541 #if 0 +;;;1542 static uint8_t frame_rate = 100; +;;;1543 if (frame_rate != dcs_packet->packet_param[0]) +;;;1544 { +;;;1545 frame_rate = dcs_packet->packet_param[0]; +;;;1546 if (frame_rate == 0x00) ;;;1547 { -;;;1548 //0x08 120Hz -;;;1549 hal_dsi_rx_ctrl_set_tear_mode_ex(g_rx_ctrl_handle, SYNC_LINE, TE_SOFT_120HZ_MODE); -;;;1550 } -;;;1551 //TAU_LOGD("frame_rate:%02x", frame_rate); -;;;1552 } -;;;1553 #else -;;;1554 -;;;1555 if (R60_Parma_backup != dcs_packet->packet_param[0]) +;;;1548 hal_dsi_rx_ctrl_set_tear_mode_ex(g_rx_ctrl_handle, SYNC_LINE, TE_HW_MODE); +;;;1549 } +;;;1550 else +;;;1551 { +;;;1552 //0x08 120Hz +;;;1553 hal_dsi_rx_ctrl_set_tear_mode_ex(g_rx_ctrl_handle, SYNC_LINE, TE_SOFT_120HZ_MODE); +;;;1554 } +;;;1555 //TAU_LOGD("frame_rate:%02x", frame_rate); +;;;1556 } +;;;1557 #else +;;;1558 +;;;1559 if (R60_Parma_backup != dcs_packet->packet_param[0]) 000002 68c8 LDR r0,[r1,#0xc] 000004 7801 LDRB r1,[r0,#0] 000006 4808 LDR r0,|L14.40| 000008 7a42 LDRB r2,[r0,#9] ; R60_Parma_backup 00000a 4291 CMP r1,r2 00000c d007 BEQ |L14.30| -;;;1556 { -;;;1557 R60_Parma_backup = dcs_packet->packet_param[0]; +;;;1560 { +;;;1561 R60_Parma_backup = dcs_packet->packet_param[0]; 00000e 7241 STRB r1,[r0,#9] -;;;1558 -;;;1559 if (R60_Parma_backup == 0x08) -;;;1560 { -;;;1561 hal_dsi_rx_ctrl_set_tear_mode_ex(g_rx_ctrl_handle, g_rx_ctrl_handle->base_info.src_h, TE_SOFT_120HZ_MODE); +;;;1562 +;;;1563 if (R60_Parma_backup == 0x08) +;;;1564 { +;;;1565 hal_dsi_rx_ctrl_set_tear_mode_ex(g_rx_ctrl_handle, g_rx_ctrl_handle->base_info.src_h, TE_SOFT_120HZ_MODE); 000010 6a00 LDR r0,[r0,#0x20] -000012 2908 CMP r1,#8 ;1559 -000014 6841 LDR r1,[r0,#4] ;1559 +000012 2908 CMP r1,#8 ;1563 +000014 6841 LDR r1,[r0,#4] ;1563 000016 d004 BEQ |L14.34| -;;;1562 } -;;;1563 -;;;1564 else -;;;1565 { -;;;1566 hal_dsi_rx_ctrl_set_tear_mode_ex(g_rx_ctrl_handle, g_rx_ctrl_handle->base_info.src_h, TE_HW_MODE); +;;;1566 } +;;;1567 +;;;1568 else +;;;1569 { +;;;1570 hal_dsi_rx_ctrl_set_tear_mode_ex(g_rx_ctrl_handle, g_rx_ctrl_handle->base_info.src_h, TE_HW_MODE); 000018 2200 MOVS r2,#0 |L14.26| 00001a f7fffffe BL hal_dsi_rx_ctrl_set_tear_mode_ex |L14.30| -;;;1567 //hal_dsi_rx_ctrl_set_tear_mode_ex(g_rx_ctrl_handle,2000,TE_SOFT_120HZ_MODE); -;;;1568 } -;;;1569 } -;;;1570 -;;;1571 #endif -;;;1572 -;;;1573 return true; +;;;1571 //hal_dsi_rx_ctrl_set_tear_mode_ex(g_rx_ctrl_handle,2000,TE_SOFT_120HZ_MODE); +;;;1572 } +;;;1573 } +;;;1574 +;;;1575 #endif +;;;1576 +;;;1577 return true; 00001e 2001 MOVS r0,#1 -;;;1574 } +;;;1578 } 000020 bd10 POP {r4,pc} |L14.34| -000022 2205 MOVS r2,#5 ;1561 +000022 2205 MOVS r2,#5 ;1565 000024 e7f9 B |L14.26| -;;;1575 +;;;1579 ENDP 000026 0000 DCW 0x0000 @@ -3740,50 +3746,50 @@ AREA ||i.frame_start_cb||, CODE, READONLY, ALIGN=2 frame_start_cb PROC -;;;3627 } -;;;3628 static void frame_start_cb(void) +;;;3632 } +;;;3633 static void frame_start_cb(void) 000000 b510 PUSH {r4,lr} -;;;3629 { -;;;3630 if(curFrame<10) //ϵ򿪻һ restart rx +;;;3634 { +;;;3635 if(curFrame<10) //ϵ򿪻һ restart rx 000002 480a LDR r0,|L15.44| 000004 6b01 LDR r1,[r0,#0x30] ; curFrame 000006 290a CMP r1,#0xa 000008 d201 BCS |L15.14| -00000a 1c49 ADDS r1,r1,#1 ;3629 -;;;3631 curFrame++; +00000a 1c49 ADDS r1,r1,#1 ;3634 +;;;3636 curFrame++; 00000c 6301 STR r1,[r0,#0x30] ; curFrame |L15.14| -;;;3632 if((phone_DisplayOFF_flag) && (curFrame == 3)) +;;;3637 if((phone_DisplayOFF_flag) && (curFrame == 3)) 00000e 7981 LDRB r1,[r0,#6] ; phone_DisplayOFF_flag 000010 2900 CMP r1,#0 000012 d009 BEQ |L15.40| 000014 6b01 LDR r1,[r0,#0x30] ; curFrame 000016 2903 CMP r1,#3 000018 d106 BNE |L15.40| -;;;3633 { -;;;3634 s_restart_flag = true; +;;;3638 { +;;;3639 s_restart_flag = true; 00001a 2101 MOVS r1,#1 00001c 71c1 STRB r1,[r0,#7] -;;;3635 // hal_dsi_rx_ctrl_restart(g_rx_ctrl_handle); -;;;3636 -;;;3637 TAU_LOGD("restart rx1"); +;;;3640 // hal_dsi_rx_ctrl_restart(g_rx_ctrl_handle); +;;;3641 +;;;3642 TAU_LOGD("restart rx1"); 00001e 4a04 LDR r2,|L15.48| 000020 a104 ADR r1,|L15.52| 000022 a007 ADR r0,|L15.64| 000024 f7fffffe BL LOG_printf |L15.40| -;;;3638 -;;;3639 } -;;;3640 } +;;;3643 +;;;3644 } +;;;3645 } 000028 bd10 POP {r4,pc} -;;;3641 +;;;3646 ENDP 00002a 0000 DCW 0x0000 |L15.44| DCD ||.data|| |L15.48| - DCD 0x00000e35 + DCD 0x00000e3a |L15.52| 000034 53323155 DCB "S21U_demo",0 000038 5f64656d @@ -3801,85 +3807,85 @@ AREA ||i.init_mipi_tx||, CODE, READONLY, ALIGN=2 init_mipi_tx PROC -;;;3762 -;;;3763 static void init_mipi_tx(void) +;;;3767 +;;;3768 static void init_mipi_tx(void) 000000 b510 PUSH {r4,lr} -;;;3764 { -;;;3765 if (g_tx_ctrl_handle == NULL) +;;;3769 { +;;;3770 if (g_tx_ctrl_handle == NULL) 000002 4c18 LDR r4,|L16.100| 000004 6a60 LDR r0,[r4,#0x24] ; g_tx_ctrl_handle 000006 2800 CMP r0,#0 000008 d102 BNE |L16.16| -;;;3766 { -;;;3767 g_tx_ctrl_handle = hal_dsi_tx_ctrl_create_handle(); +;;;3771 { +;;;3772 g_tx_ctrl_handle = hal_dsi_tx_ctrl_create_handle(); 00000a f7fffffe BL hal_dsi_tx_ctrl_create_handle 00000e 6260 STR r0,[r4,#0x24] ; g_tx_ctrl_handle |L16.16| -;;;3768 } -;;;3769 g_tx_ctrl_handle->channel_id = OUTPUT_VC; +;;;3773 } +;;;3774 g_tx_ctrl_handle->channel_id = OUTPUT_VC; 000010 2100 MOVS r1,#0 000012 7081 STRB r1,[r0,#2] -;;;3770 g_tx_ctrl_handle->lane_num = OUTPUT_LANE_NUMBER; +;;;3775 g_tx_ctrl_handle->lane_num = OUTPUT_LANE_NUMBER; 000014 2204 MOVS r2,#4 000016 7042 STRB r2,[r0,#1] -;;;3771 g_tx_ctrl_handle->vid_mode = OUTPUT_VIDEO_MODEL; +;;;3776 g_tx_ctrl_handle->vid_mode = OUTPUT_VIDEO_MODEL; 000018 70c1 STRB r1,[r0,#3] -;;;3772 g_tx_ctrl_handle->cmd_tx_type = _CMD_TYPE; +;;;3777 g_tx_ctrl_handle->cmd_tx_type = _CMD_TYPE; 00001a 2301 MOVS r3,#1 00001c 7103 STRB r3,[r0,#4] -;;;3773 g_tx_ctrl_handle->dpi_vsa = OUTPUT_VSA; +;;;3778 g_tx_ctrl_handle->dpi_vsa = OUTPUT_VSA; 00001e 2408 MOVS r4,#8 -;;;3774 g_tx_ctrl_handle->dpi_vbp = OUTPUT_VBP; +;;;3779 g_tx_ctrl_handle->dpi_vbp = OUTPUT_VBP; 000020 6084 STR r4,[r0,#8] -;;;3775 g_tx_ctrl_handle->dpi_vfp = OUTPUT_VFP; -;;;3776 g_tx_ctrl_handle->dpi_hsa = OUTPUT_HSA; +;;;3780 g_tx_ctrl_handle->dpi_vfp = OUTPUT_VFP; +;;;3781 g_tx_ctrl_handle->dpi_hsa = OUTPUT_HSA; 000022 60c4 STR r4,[r0,#0xc] -000024 2238 MOVS r2,#0x38 ;3775 -;;;3777 g_tx_ctrl_handle->dpi_hbp = OUTPUT_HBP; +000024 2238 MOVS r2,#0x38 ;3780 +;;;3782 g_tx_ctrl_handle->dpi_hbp = OUTPUT_HBP; 000026 6144 STR r4,[r0,#0x14] 000028 6102 STR r2,[r0,#0x10] 00002a 2214 MOVS r2,#0x14 -;;;3778 g_tx_ctrl_handle->dpi_hfp = OUTPUT_HFP; +;;;3783 g_tx_ctrl_handle->dpi_hfp = OUTPUT_HFP; 00002c 6182 STR r2,[r0,#0x18] 00002e 2250 MOVS r2,#0x50 -;;;3779 g_tx_ctrl_handle->base_info.src_w = INPUT_WIDTH; +;;;3784 g_tx_ctrl_handle->base_info.src_w = INPUT_WIDTH; 000030 61c2 STR r2,[r0,#0x1c] 000032 2287 MOVS r2,#0x87 000034 00d2 LSLS r2,r2,#3 -;;;3780 g_tx_ctrl_handle->base_info.src_h = INPUT_HEIGHT; +;;;3785 g_tx_ctrl_handle->base_info.src_h = INPUT_HEIGHT; 000036 6202 STR r2,[r0,#0x20] 000038 224b MOVS r2,#0x4b 00003a 0152 LSLS r2,r2,#5 -;;;3781 g_tx_ctrl_handle->base_info.dst_w = OUTPUT_WIDTH; +;;;3786 g_tx_ctrl_handle->base_info.dst_w = OUTPUT_WIDTH; 00003c 6242 STR r2,[r0,#0x24] 00003e 1052 ASRS r2,r2,#1 -;;;3782 g_tx_ctrl_handle->base_info.dst_h = OUTPUT_HEIGHT; +;;;3787 g_tx_ctrl_handle->base_info.dst_h = OUTPUT_HEIGHT; 000040 6282 STR r2,[r0,#0x28] 000042 4a09 LDR r2,|L16.104| -;;;3783 g_tx_ctrl_handle->base_info.src_frate = INPUT_FRAME_RATE; +;;;3788 g_tx_ctrl_handle->base_info.src_frate = INPUT_FRAME_RATE; 000044 62c2 STR r2,[r0,#0x2c] 000046 4602 MOV r2,r0 000048 3220 ADDS r2,r2,#0x20 00004a 7411 STRB r1,[r2,#0x10] -;;;3784 g_tx_ctrl_handle->base_info.src_mode = INPUT_DATA_MODE; +;;;3789 g_tx_ctrl_handle->base_info.src_mode = INPUT_DATA_MODE; 00004c 7453 STRB r3,[r2,#0x11] -;;;3785 // g_tx_ctrl_handle->tx_clkawayshs = true; -;;;3786 // g_tx_ctrl_handle->tx_line_delay = 400; //45; -;;;3787 g_tx_ctrl_handle->tx_frame_rate = OUTPUT_FRAME_RATE; +;;;3790 // g_tx_ctrl_handle->tx_clkawayshs = true; +;;;3791 // g_tx_ctrl_handle->tx_line_delay = 400; //45; +;;;3792 g_tx_ctrl_handle->tx_frame_rate = OUTPUT_FRAME_RATE; 00004e 4907 LDR r1,|L16.108| -;;;3788 -;;;3789 hal_dsi_tx_ctrl_init(g_tx_ctrl_handle); +;;;3793 +;;;3794 hal_dsi_tx_ctrl_init(g_tx_ctrl_handle); 000050 6401 STR r1,[r0,#0x40] 000052 f7fffffe BL hal_dsi_tx_ctrl_init -;;;3790 /* AP ûзʱĬϵʾɫ, Ϊ0 0 0(ɫ), ɫΪdebugʹ */ -;;;3791 hal_dsi_tx_ctrl_set_overwrite_rgb(0x00, 0x00, 0x00); +;;;3795 /* AP ûзʱĬϵʾɫ, Ϊ0 0 0(ɫ), ɫΪdebugʹ */ +;;;3796 hal_dsi_tx_ctrl_set_overwrite_rgb(0x00, 0x00, 0x00); 000056 2200 MOVS r2,#0 000058 4611 MOV r1,r2 00005a 4610 MOV r0,r2 00005c f7fffffe BL hal_dsi_tx_ctrl_set_overwrite_rgb -;;;3792 } +;;;3797 } 000060 bd10 POP {r4,pc} -;;;3793 +;;;3798 ENDP 000062 0000 DCW 0x0000 @@ -3893,8 +3899,8 @@ AREA ||i.init_panel||, CODE, READONLY, ALIGN=2 init_panel PROC -;;;3598 -;;;3599 static void init_panel(void) +;;;3603 +;;;3604 static void init_panel(void) 000000 b5fe PUSH {r1-r7,lr} 000002 2001 MOVS r0,#1 000004 f7fffffe BL hal_dsi_tx_ctrl_panel_reset_pin @@ -3908,18 +3914,18 @@ 00001c f7fffffe BL hal_dsi_tx_ctrl_panel_reset_pin 000020 201e MOVS r0,#0x1e 000022 f7fffffe BL delayMs -;;;3600 { -;;;3601 /* reset panel*/ -;;;3602 tx_panel_reset(); -;;;3603 -;;;3604 /* enter send initial code mode*/ -;;;3605 hal_dsi_tx_ctrl_enter_init_panel_mode(); +;;;3605 { +;;;3606 /* reset panel*/ +;;;3607 tx_panel_reset(); +;;;3608 +;;;3609 /* enter send initial code mode*/ +;;;3610 hal_dsi_tx_ctrl_enter_init_panel_mode(); 000026 f7fffffe BL hal_dsi_tx_ctrl_enter_init_panel_mode -;;;3606 -;;;3607 #if AMOLED_NT37701_CSOT667 -;;;3608 -;;;3609 #if PANEL_INIT_CODE_ARRAY -;;;3610 send_panel_init_code(sizeof(panel_init_code), panel_init_code); +;;;3611 +;;;3612 #if AMOLED_NT37701_CSOT667 +;;;3613 +;;;3614 #if PANEL_INIT_CODE_ARRAY +;;;3615 send_panel_init_code(sizeof(panel_init_code), panel_init_code); 00002a 4f1d LDR r7,|L17.160| 00002c 4d1d LDR r5,|L17.164| 00002e 2400 MOVS r4,#0 @@ -3937,9 +3943,9 @@ 000046 f7fffffe BL delayUs 00004a 42bc CMP r4,r7 00004c d3f0 BCC |L17.48| -;;;3611 #endif -;;;3612 -;;;3613 hal_dsi_tx_ctrl_write_cmd(0x39, 0, 3, 0x51, 0x00, 0x01); //0FFF +;;;3616 #endif +;;;3617 +;;;3618 hal_dsi_tx_ctrl_write_cmd(0x39, 0, 3, 0x51, 0x00, 0x01); //0FFF 00004e 2101 MOVS r1,#1 000050 2000 MOVS r0,#0 000052 9101 STR r1,[sp,#4] @@ -3949,44 +3955,44 @@ 00005a 2203 MOVS r2,#3 00005c 2039 MOVS r0,#0x39 00005e f7fffffe BL hal_dsi_tx_ctrl_write_cmd -;;;3614 hal_dsi_tx_ctrl_write_cmd(0x05, 0, 1, 0x11); +;;;3619 hal_dsi_tx_ctrl_write_cmd(0x05, 0, 1, 0x11); 000062 2311 MOVS r3,#0x11 000064 2201 MOVS r2,#1 000066 2100 MOVS r1,#0 000068 2005 MOVS r0,#5 00006a f7fffffe BL hal_dsi_tx_ctrl_write_cmd -;;;3615 hal_gpio_init_output(IO_PAD_PWMEN, IO_LVL_HIGH); //LED_ON +;;;3620 hal_gpio_init_output(IO_PAD_PWMEN, IO_LVL_HIGH); //LED_ON 00006e 2101 MOVS r1,#1 000070 2013 MOVS r0,#0x13 000072 f7fffffe BL hal_gpio_init_output -;;;3616 delayMs(90); //90 +;;;3621 delayMs(90); //90 000076 205a MOVS r0,#0x5a 000078 f7fffffe BL delayMs -;;;3617 Gpio_swire_output(2, 32); //40 +;;;3622 Gpio_swire_output(2, 32); //40 00007c 2120 MOVS r1,#0x20 00007e 2002 MOVS r0,#2 000080 f7fffffe BL Gpio_swire_output -;;;3618 delayMs(20); +;;;3623 delayMs(20); 000084 2014 MOVS r0,#0x14 000086 f7fffffe BL delayMs -;;;3619 // hal_dsi_tx_ctrl_write_cmd(0x05, 0, 1, 0x29); -;;;3620 // delayMs(20); -;;;3621 #endif -;;;3622 -;;;3623 /* exit send initial code mode*/ -;;;3624 hal_dsi_tx_ctrl_exit_init_panel_mode(); +;;;3624 // hal_dsi_tx_ctrl_write_cmd(0x05, 0, 1, 0x29); +;;;3625 // delayMs(20); +;;;3626 #endif +;;;3627 +;;;3628 /* exit send initial code mode*/ +;;;3629 hal_dsi_tx_ctrl_exit_init_panel_mode(); 00008a f7fffffe BL hal_dsi_tx_ctrl_exit_init_panel_mode -;;;3625 TAU_LOGD("Pannel init done"); +;;;3630 TAU_LOGD("Pannel init done"); 00008e 4a06 LDR r2,|L17.168| 000090 a106 ADR r1,|L17.172| 000092 a009 ADR r0,|L17.184| 000094 f7fffffe BL LOG_printf -;;;3626 delayMs(20); +;;;3631 delayMs(20); 000098 2014 MOVS r0,#0x14 00009a f7fffffe BL delayMs -;;;3627 } +;;;3632 } 00009e bdfe POP {r1-r7,pc} -;;;3628 static void frame_start_cb(void) +;;;3633 static void frame_start_cb(void) ENDP |L17.160| @@ -3994,7 +4000,7 @@ |L17.164| DCD ||.constdata||+0x78 |L17.168| - DCD 0x00000e29 + DCD 0x00000e2e |L17.172| 0000ac 53323155 DCB "S21U_demo",0 0000b0 5f64656d @@ -4017,192 +4023,192 @@ AREA ||i.open_mipi_rx||, CODE, READONLY, ALIGN=2 open_mipi_rx PROC -;;;3652 -;;;3653 static void open_mipi_rx(void) +;;;3657 +;;;3658 static void open_mipi_rx(void) 000000 b530 PUSH {r4,r5,lr} -;;;3654 { +;;;3659 { 000002 b097 SUB sp,sp,#0x5c -;;;3655 /* TE */ -;;;3656 hal_gpio_set_mode(IO_PAD_AP_TE, IO_MODE_TEAR); +;;;3660 /* TE */ +;;;3661 hal_gpio_set_mode(IO_PAD_AP_TE, IO_MODE_TEAR); 000004 2100 MOVS r1,#0 000006 2003 MOVS r0,#3 000008 f7fffffe BL hal_gpio_set_mode -;;;3657 -;;;3658 if (g_rx_ctrl_handle == NULL) +;;;3662 +;;;3663 if (g_rx_ctrl_handle == NULL) 00000c 4d26 LDR r5,|L18.168| 00000e 6a28 LDR r0,[r5,#0x20] ; g_rx_ctrl_handle 000010 2800 CMP r0,#0 000012 d102 BNE |L18.26| -;;;3659 { -;;;3660 /* rx ctrl handle */ -;;;3661 g_rx_ctrl_handle = hal_dsi_rx_ctrl_create_handle(); +;;;3664 { +;;;3665 /* rx ctrl handle */ +;;;3666 g_rx_ctrl_handle = hal_dsi_rx_ctrl_create_handle(); 000014 f7fffffe BL hal_dsi_rx_ctrl_create_handle 000018 6228 STR r0,[r5,#0x20] ; g_rx_ctrl_handle |L18.26| -;;;3662 } -;;;3663 /* ò */ -;;;3664 g_rx_ctrl_handle->base_info.src_w = INPUT_WIDTH; +;;;3667 } +;;;3668 /* ò */ +;;;3669 g_rx_ctrl_handle->base_info.src_w = INPUT_WIDTH; 00001a 2087 MOVS r0,#0x87 00001c 6a2c LDR r4,[r5,#0x20] ; g_rx_ctrl_handle 00001e 00c0 LSLS r0,r0,#3 -;;;3665 g_rx_ctrl_handle->base_info.src_h = INPUT_HEIGHT; +;;;3670 g_rx_ctrl_handle->base_info.src_h = INPUT_HEIGHT; 000020 6020 STR r0,[r4,#0] 000022 204b MOVS r0,#0x4b 000024 0140 LSLS r0,r0,#5 -;;;3666 g_rx_ctrl_handle->base_info.dst_w = OUTPUT_WIDTH; +;;;3671 g_rx_ctrl_handle->base_info.dst_w = OUTPUT_WIDTH; 000026 6060 STR r0,[r4,#4] 000028 1040 ASRS r0,r0,#1 -;;;3667 g_rx_ctrl_handle->base_info.dst_h = OUTPUT_HEIGHT; +;;;3672 g_rx_ctrl_handle->base_info.dst_h = OUTPUT_HEIGHT; 00002a 60a0 STR r0,[r4,#8] 00002c 481f LDR r0,|L18.172| -;;;3668 g_rx_ctrl_handle->base_info.src_frate = INPUT_FRAME_RATE; +;;;3673 g_rx_ctrl_handle->base_info.src_frate = INPUT_FRAME_RATE; 00002e 60e0 STR r0,[r4,#0xc] 000030 2100 MOVS r1,#0 000032 7421 STRB r1,[r4,#0x10] -;;;3669 g_rx_ctrl_handle->base_info.src_mode = INPUT_DATA_MODE; +;;;3674 g_rx_ctrl_handle->base_info.src_mode = INPUT_DATA_MODE; 000034 2201 MOVS r2,#1 000036 7462 STRB r2,[r4,#0x11] -;;;3670 g_rx_ctrl_handle->rx_color_mode = INPUT_COLOR_MODE; +;;;3675 g_rx_ctrl_handle->rx_color_mode = INPUT_COLOR_MODE; 000038 2004 MOVS r0,#4 00003a 7720 STRB r0,[r4,#0x1c] -;;;3671 g_rx_ctrl_handle->rx_lanes = INPUT_MIPI_LANE_NUM; +;;;3676 g_rx_ctrl_handle->rx_lanes = INPUT_MIPI_LANE_NUM; 00003c 7760 STRB r0,[r4,#0x1d] -;;;3672 g_rx_ctrl_handle->rx_nonburst_models = INPUT_VIDEO_MODEL; /* ɲ */ +;;;3677 g_rx_ctrl_handle->rx_nonburst_models = INPUT_VIDEO_MODEL; /* ɲ */ 00003e 77a2 STRB r2,[r4,#0x1e] -;;;3673 g_rx_ctrl_handle->rx_vc = INPUT_VC; +;;;3678 g_rx_ctrl_handle->rx_vc = INPUT_VC; 000040 77e1 STRB r1,[r4,#0x1f] -;;;3674 g_rx_ctrl_handle->compress_en = INPUT_COMPRESS; +;;;3679 g_rx_ctrl_handle->compress_en = INPUT_COMPRESS; 000042 2020 MOVS r0,#0x20 000044 5502 STRB r2,[r0,r4] -;;;3675 g_rx_ctrl_handle->rx_hsclk_rate = INPUT_MIPI_LANE_RATE; +;;;3680 g_rx_ctrl_handle->rx_hsclk_rate = INPUT_MIPI_LANE_RATE; 000046 481a LDR r0,|L18.176| -;;;3676 g_rx_ctrl_handle->cus_dcs_entry_table = g_cus_rx_dcs_execute_table; /* ע DCSб */ +;;;3681 g_rx_ctrl_handle->cus_dcs_entry_table = g_cus_rx_dcs_execute_table; /* ע DCSб */ 000048 6260 STR r0,[r4,#0x24] 00004a 4620 MOV r0,r4 00004c 4b19 LDR r3,|L18.180| 00004e 3080 ADDS r0,r0,#0x80 -;;;3677 g_rx_ctrl_handle->rx_dcs_read_entry = ap_dcs_read; /* עdsc read ص,ѡ,˺Ϊʱcus_dcs_entry_tableִ */ +;;;3682 g_rx_ctrl_handle->rx_dcs_read_entry = ap_dcs_read; /* עdsc read ص,ѡ,˺Ϊʱcus_dcs_entry_tableִ */ 000050 6283 STR r3,[r0,#0x28] 000052 4b19 LDR r3,|L18.184| -;;;3678 g_rx_ctrl_handle->pps_update_entry = pps_update_handle; +;;;3683 g_rx_ctrl_handle->pps_update_entry = pps_update_handle; 000054 62c3 STR r3,[r0,#0x2c] 000056 4b19 LDR r3,|L18.188| -;;;3679 g_rx_ctrl_handle->rx_debug_cb = frame_start_cb; +;;;3684 g_rx_ctrl_handle->rx_debug_cb = frame_start_cb; 000058 6303 STR r3,[r0,#0x30] 00005a 4b19 LDR r3,|L18.192| -;;;3680 //򿪻ᵼ¿ӡϢTX -;;;3681 // g_rx_ctrl_handle->pq_marginal = PQ_TYPE_2; -;;;3682 -;;;3683 #if defined(ISP_568) || defined(ISP_368) -;;;3684 g_rx_ctrl_handle->base_info.extra_info.rot_angle = VIDOE_ROT_ANGLE_0; +;;;3685 //򿪻ᵼ¿ӡϢTX +;;;3686 // g_rx_ctrl_handle->pq_marginal = PQ_TYPE_2; +;;;3687 +;;;3688 #if defined(ISP_568) || defined(ISP_368) +;;;3689 g_rx_ctrl_handle->base_info.extra_info.rot_angle = VIDOE_ROT_ANGLE_0; 00005c 6383 STR r3,[r0,#0x38] 00005e 75a1 STRB r1,[r4,#0x16] -;;;3685 g_rx_ctrl_handle->base_info.extra_info.mirror_en = false; +;;;3690 g_rx_ctrl_handle->base_info.extra_info.mirror_en = false; 000060 7561 STRB r1,[r4,#0x15] -;;;3686 -;;;3687 g_rx_ctrl_handle->hight_performan_mode = HIGHT_PERFORMAN_L2; +;;;3691 +;;;3692 g_rx_ctrl_handle->hight_performan_mode = HIGHT_PERFORMAN_L2; 000062 2002 MOVS r0,#2 000064 21bf MOVS r1,#0xbf 000066 5508 STRB r0,[r1,r4] -;;;3688 g_rx_ctrl_handle->base_info.extra_info.ltpo = LTPO_MODE_2; +;;;3693 g_rx_ctrl_handle->base_info.extra_info.ltpo = LTPO_MODE_2; 000068 7520 STRB r0,[r4,#0x14] -;;;3689 g_rx_ctrl_handle->pu_optimize = true; +;;;3694 g_rx_ctrl_handle->pu_optimize = true; 00006a 20c0 MOVS r0,#0xc0 00006c 5502 STRB r2,[r0,r4] -;;;3690 -;;;3691 #endif -;;;3692 -;;;3693 /* ǰԤPPS, AP PPS cmdҲ */ -;;;3694 if (g_rx_ctrl_handle->compress_en == true) -;;;3695 { -;;;3696 //720*1600 -;;;3697 // uint8_t pps[88] = { 0x11,0x00,0x00,0x89,0x30,0x80,0x06,0x40,0x02,0xD0,0x00,0x50,0x01,0x68,0x01,0x68, -;;;3698 // 0x02,0x00,0x01,0xB4,0x00,0x20,0x06,0x2F,0x00,0x05,0x00,0x0C,0x01,0x38,0x01,0xE9, -;;;3699 // 0x18,0x00,0x10,0xF0,0x03,0x0C,0x20,0x00,0x06,0x0B,0x0B,0x33,0x0E,0x1C,0x2A,0x38, -;;;3700 // 0x46,0x54,0x62,0x69,0x70,0x77,0x79,0x7B,0x7D,0x7E,0x01,0x02,0x01,0x00,0x09,0x40, -;;;3701 // 0x09,0xBE,0x19,0xFC,0x19,0xFA,0x19,0xF8,0x1A,0x38,0x1A,0x78,0x1A,0xB6,0x2A,0xF6, -;;;3702 // 0x2B,0x34,0x2B,0x74,0x3B,0x74,0x6B,0xF4}; -;;;3703 -;;;3704 -;;;3705 //1080*2400 -;;;3706 uint8_t pps[88] = { 0x11,0x00,0x00,0x89,0x30,0x80,0x09,0x60,0x04,0x38,0x00,0x28,0x02,0x1C,0x02,0x1C, +;;;3695 +;;;3696 #endif +;;;3697 +;;;3698 /* ǰԤPPS, AP PPS cmdҲ */ +;;;3699 if (g_rx_ctrl_handle->compress_en == true) +;;;3700 { +;;;3701 //720*1600 +;;;3702 // uint8_t pps[88] = { 0x11,0x00,0x00,0x89,0x30,0x80,0x06,0x40,0x02,0xD0,0x00,0x50,0x01,0x68,0x01,0x68, +;;;3703 // 0x02,0x00,0x01,0xB4,0x00,0x20,0x06,0x2F,0x00,0x05,0x00,0x0C,0x01,0x38,0x01,0xE9, +;;;3704 // 0x18,0x00,0x10,0xF0,0x03,0x0C,0x20,0x00,0x06,0x0B,0x0B,0x33,0x0E,0x1C,0x2A,0x38, +;;;3705 // 0x46,0x54,0x62,0x69,0x70,0x77,0x79,0x7B,0x7D,0x7E,0x01,0x02,0x01,0x00,0x09,0x40, +;;;3706 // 0x09,0xBE,0x19,0xFC,0x19,0xFA,0x19,0xF8,0x1A,0x38,0x1A,0x78,0x1A,0xB6,0x2A,0xF6, +;;;3707 // 0x2B,0x34,0x2B,0x74,0x3B,0x74,0x6B,0xF4}; +;;;3708 +;;;3709 +;;;3710 //1080*2400 +;;;3711 uint8_t pps[88] = { 0x11,0x00,0x00,0x89,0x30,0x80,0x09,0x60,0x04,0x38,0x00,0x28,0x02,0x1C,0x02,0x1C, 00006e 2258 MOVS r2,#0x58 000070 4914 LDR r1,|L18.196| 000072 4668 MOV r0,sp 000074 f7fffffe BL __aeabi_memcpy4 -;;;3707 0x02,0x00,0x02,0x0E,0x00,0x20,0x03,0xDD,0x00,0x07,0x00,0x0C,0x02,0x77,0x02,0x8B, -;;;3708 0x18,0x00,0x10,0xF0,0x03,0x0C,0x20,0x00,0x06,0x0B,0x0B,0x33,0x0E,0x1C,0x2A,0x38, -;;;3709 0x46,0x54,0x62,0x69,0x70,0x77,0x79,0x7B,0x7D,0x7E,0x01,0x02,0x01,0x00,0x09,0x40, -;;;3710 0x09,0xBE,0x19,0xFC,0x19,0xFA,0x19,0xF8,0x1A,0x38,0x1A,0x78,0x1A,0xB6,0x2A,0xF6, -;;;3711 0x2B,0x34,0x2B,0x74,0x3B,0x74,0x6B,0xF4}; -;;;3712 -;;;3713 //1440*3200 -;;;3714 // uint8_t pps[88] = { 0x11,0x00,0x00,0x89,0x30,0x80,0x0C,0x80,0x05,0xA0,0x00,0x28,0x02,0xD0,0x02,0xD0, -;;;3715 // 0x02,0x00,0x02,0x68,0x00,0x20,0x04,0x6C,0x00,0x0A,0x00,0x0C,0x02,0x77,0x01,0xE9, -;;;3716 // 0x18,0x00,0x10,0xF0,0x03,0x0C,0x20,0x00,0x06,0x0B,0x0B,0x33,0x0E,0x1C,0x2A,0x38, -;;;3717 // 0x46,0x54,0x62,0x69,0x70,0x77,0x79,0x7B,0x7D,0x7E,0x01,0x02,0x01,0x00,0x09,0x40, -;;;3718 // 0x09,0xBE,0x19,0xFC,0x19,0xFA,0x19,0xF8,0x1A,0x38,0x1A,0x78,0x1A,0xB6,0x2A,0xF6, -;;;3719 // 0x2B,0x34,0x2B,0x74,0x3B,0x74,0x6B,0xF4}; -;;;3720 -;;;3721 // uint8_t pps[128] = -;;;3722 // { -;;;3723 // 0x11, 0x00, 0x00, 0x89, 0x30, 0x80, 0x0C, 0x80, -;;;3724 // 0x05, 0xA0, 0x00, 0x28, 0x02, 0xD0, 0x02, 0xD0, -;;;3725 // 0x02, 0x00, 0x02, 0x0E, 0x00, 0x20, 0x03, 0xDD, -;;;3726 // 0x00, 0x07, 0x00, 0x0C, 0x02, 0x77, 0x02, 0x8B, -;;;3727 // 0x18, 0x00, 0x10, 0xF0, 0x03, 0x0C, 0x20, 0x00, -;;;3728 // 0x06, 0x0B, 0x0B, 0x33, 0x0E, 0x1C, 0x2A, 0x38, -;;;3729 // 0x46, 0x54, 0x62, 0x69, 0x70, 0x77, 0x79, 0x7B, -;;;3730 // 0x7D, 0x7E, 0x01, 0x02, 0x01, 0x00, 0x09, 0x40, -;;;3731 // 0x09, 0xBE, 0x19, 0xFC, 0x19, 0xFA, 0x19, 0xF8, -;;;3732 // 0x1A, 0x38, 0x1A, 0x78, 0x1A, 0xB6, 0x2A, 0xF6, -;;;3733 // 0x2B, 0x34, 0x2B, 0x74, 0x3B, 0x74, 0x6B, 0xF4, -;;;3734 // 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -;;;3735 // 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -;;;3736 // 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -;;;3737 // 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -;;;3738 // 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 -;;;3739 // }; -;;;3740 -;;;3741 hal_dsi_rx_ctrl_pre_init_pps(g_rx_ctrl_handle, pps, 88); +;;;3712 0x02,0x00,0x02,0x0E,0x00,0x20,0x03,0xDD,0x00,0x07,0x00,0x0C,0x02,0x77,0x02,0x8B, +;;;3713 0x18,0x00,0x10,0xF0,0x03,0x0C,0x20,0x00,0x06,0x0B,0x0B,0x33,0x0E,0x1C,0x2A,0x38, +;;;3714 0x46,0x54,0x62,0x69,0x70,0x77,0x79,0x7B,0x7D,0x7E,0x01,0x02,0x01,0x00,0x09,0x40, +;;;3715 0x09,0xBE,0x19,0xFC,0x19,0xFA,0x19,0xF8,0x1A,0x38,0x1A,0x78,0x1A,0xB6,0x2A,0xF6, +;;;3716 0x2B,0x34,0x2B,0x74,0x3B,0x74,0x6B,0xF4}; +;;;3717 +;;;3718 //1440*3200 +;;;3719 // uint8_t pps[88] = { 0x11,0x00,0x00,0x89,0x30,0x80,0x0C,0x80,0x05,0xA0,0x00,0x28,0x02,0xD0,0x02,0xD0, +;;;3720 // 0x02,0x00,0x02,0x68,0x00,0x20,0x04,0x6C,0x00,0x0A,0x00,0x0C,0x02,0x77,0x01,0xE9, +;;;3721 // 0x18,0x00,0x10,0xF0,0x03,0x0C,0x20,0x00,0x06,0x0B,0x0B,0x33,0x0E,0x1C,0x2A,0x38, +;;;3722 // 0x46,0x54,0x62,0x69,0x70,0x77,0x79,0x7B,0x7D,0x7E,0x01,0x02,0x01,0x00,0x09,0x40, +;;;3723 // 0x09,0xBE,0x19,0xFC,0x19,0xFA,0x19,0xF8,0x1A,0x38,0x1A,0x78,0x1A,0xB6,0x2A,0xF6, +;;;3724 // 0x2B,0x34,0x2B,0x74,0x3B,0x74,0x6B,0xF4}; +;;;3725 +;;;3726 // uint8_t pps[128] = +;;;3727 // { +;;;3728 // 0x11, 0x00, 0x00, 0x89, 0x30, 0x80, 0x0C, 0x80, +;;;3729 // 0x05, 0xA0, 0x00, 0x28, 0x02, 0xD0, 0x02, 0xD0, +;;;3730 // 0x02, 0x00, 0x02, 0x0E, 0x00, 0x20, 0x03, 0xDD, +;;;3731 // 0x00, 0x07, 0x00, 0x0C, 0x02, 0x77, 0x02, 0x8B, +;;;3732 // 0x18, 0x00, 0x10, 0xF0, 0x03, 0x0C, 0x20, 0x00, +;;;3733 // 0x06, 0x0B, 0x0B, 0x33, 0x0E, 0x1C, 0x2A, 0x38, +;;;3734 // 0x46, 0x54, 0x62, 0x69, 0x70, 0x77, 0x79, 0x7B, +;;;3735 // 0x7D, 0x7E, 0x01, 0x02, 0x01, 0x00, 0x09, 0x40, +;;;3736 // 0x09, 0xBE, 0x19, 0xFC, 0x19, 0xFA, 0x19, 0xF8, +;;;3737 // 0x1A, 0x38, 0x1A, 0x78, 0x1A, 0xB6, 0x2A, 0xF6, +;;;3738 // 0x2B, 0x34, 0x2B, 0x74, 0x3B, 0x74, 0x6B, 0xF4, +;;;3739 // 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +;;;3740 // 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +;;;3741 // 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +;;;3742 // 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +;;;3743 // 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 +;;;3744 // }; +;;;3745 +;;;3746 hal_dsi_rx_ctrl_pre_init_pps(g_rx_ctrl_handle, pps, 88); 000078 2258 MOVS r2,#0x58 00007a 4669 MOV r1,sp 00007c 4620 MOV r0,r4 00007e f7fffffe BL hal_dsi_rx_ctrl_pre_init_pps -;;;3742 } -;;;3743 -;;;3744 /* ʼrx ctrl */ -;;;3745 hal_dsi_rx_ctrl_init(g_rx_ctrl_handle); +;;;3747 } +;;;3748 +;;;3749 /* ʼrx ctrl */ +;;;3750 hal_dsi_rx_ctrl_init(g_rx_ctrl_handle); 000082 6a28 LDR r0,[r5,#0x20] ; g_rx_ctrl_handle 000084 f7fffffe BL hal_dsi_rx_ctrl_init -;;;3746 -;;;3747 hal_dsi_rx_ctrl_set_cus_sync_line(g_rx_ctrl_handle, g_rx_ctrl_handle->base_info.src_h); // lss add, ˺1600 +;;;3751 +;;;3752 hal_dsi_rx_ctrl_set_cus_sync_line(g_rx_ctrl_handle, g_rx_ctrl_handle->base_info.src_h); // lss add, ˺1600 000088 6a28 LDR r0,[r5,#0x20] ; g_rx_ctrl_handle 00008a 6841 LDR r1,[r0,#4] 00008c f7fffffe BL hal_dsi_rx_ctrl_set_cus_sync_line -;;;3748 // hal_dsi_rx_ctrl_hight_performan_mode(g_rx_ctrl_handle); -;;;3749 /* rx ctrl */ -;;;3750 //hal_dsi_rx_ctrl_set_cus_esc_clk(g_rx_ctrl_handle,20000000); -;;;3751 -;;;3752 //hal_dsi_rx_ctrl_set_cus_pq_gain(g_rx_ctrl_handle,256, 256, 211); -;;;3753 -;;;3754 //hal_dsi_rx_ctrl_set_hw_cmd_filter(g_rx_ctrl_handle, HAL_RX_DCS_FILTER_0, 0x4C, 0x4C); -;;;3755 //hal_dsi_rx_ctrl_set_hw_cmd_filter(g_rx_ctrl_handle, HAL_RX_DCS_FILTER_1, 0x5C, 0x5C); -;;;3756 #if CUS_SCLD_FILTER -;;;3757 hal_dsi_rx_ctrl_set_cus_scld_filter( g_rx_ctrl_handle, rx_filter_1440_h_4_72, rx_filter_3200_v_4_59 ); +;;;3753 // hal_dsi_rx_ctrl_hight_performan_mode(g_rx_ctrl_handle); +;;;3754 /* rx ctrl */ +;;;3755 //hal_dsi_rx_ctrl_set_cus_esc_clk(g_rx_ctrl_handle,20000000); +;;;3756 +;;;3757 //hal_dsi_rx_ctrl_set_cus_pq_gain(g_rx_ctrl_handle,256, 256, 211); +;;;3758 +;;;3759 //hal_dsi_rx_ctrl_set_hw_cmd_filter(g_rx_ctrl_handle, HAL_RX_DCS_FILTER_0, 0x4C, 0x4C); +;;;3760 //hal_dsi_rx_ctrl_set_hw_cmd_filter(g_rx_ctrl_handle, HAL_RX_DCS_FILTER_1, 0x5C, 0x5C); +;;;3761 #if CUS_SCLD_FILTER +;;;3762 hal_dsi_rx_ctrl_set_cus_scld_filter( g_rx_ctrl_handle, rx_filter_1440_h_4_72, rx_filter_3200_v_4_59 ); 000090 4a0d LDR r2,|L18.200| 000092 6a28 LDR r0,[r5,#0x20] ; g_rx_ctrl_handle 000094 1fd1 SUBS r1,r2,#7 000096 39f9 SUBS r1,r1,#0xf9 000098 f7fffffe BL hal_dsi_rx_ctrl_set_cus_scld_filter -;;;3758 #endif -;;;3759 hal_dsi_rx_ctrl_start(g_rx_ctrl_handle); +;;;3763 #endif +;;;3764 hal_dsi_rx_ctrl_start(g_rx_ctrl_handle); 00009c 6a28 LDR r0,[r5,#0x20] ; g_rx_ctrl_handle 00009e f7fffffe BL hal_dsi_rx_ctrl_start -;;;3760 } +;;;3765 } 0000a2 b017 ADD sp,sp,#0x5c 0000a4 bd30 POP {r4,r5,pc} -;;;3761 +;;;3766 ENDP 0000a6 0000 DCW 0x0000 @@ -4228,38 +4234,38 @@ AREA ||i.pps_updata_exec||, CODE, READONLY, ALIGN=2 pps_updata_exec PROC -;;;3918 -;;;3919 void pps_updata_exec(void) +;;;3923 +;;;3924 void pps_updata_exec(void) 000000 b510 PUSH {r4,lr} -;;;3920 { -;;;3921 if( true == s_pps_updata_allpixeloff_flag) // PPS ???? +;;;3925 { +;;;3926 if( true == s_pps_updata_allpixeloff_flag) // PPS ???? 000002 4c09 LDR r4,|L19.40| 000004 7a20 LDRB r0,[r4,#8] ; s_pps_updata_allpixeloff_flag 000006 2800 CMP r0,#0 000008 d00d BEQ |L19.38| -;;;3922 { -;;;3923 if( hal_system_get_tick() - BaseTime > 50 ) +;;;3927 { +;;;3928 if( hal_system_get_tick() - BaseTime > 80 ) 00000a f7fffffe BL hal_system_get_tick 00000e 6aa1 LDR r1,[r4,#0x28] ; BaseTime 000010 1a40 SUBS r0,r0,r1 -000012 2832 CMP r0,#0x32 +000012 2850 CMP r0,#0x50 000014 d907 BLS |L19.38| -;;;3924 { -;;;3925 hal_dsi_tx_ctrl_write_cmd(0x05, 0, 1, 0x13); +;;;3929 { +;;;3930 hal_dsi_tx_ctrl_write_cmd(0x05, 0, 1, 0x13); 000016 2313 MOVS r3,#0x13 000018 2201 MOVS r2,#1 00001a 2100 MOVS r1,#0 00001c 2005 MOVS r0,#5 00001e f7fffffe BL hal_dsi_tx_ctrl_write_cmd -;;;3926 s_pps_updata_allpixeloff_flag = false; +;;;3931 s_pps_updata_allpixeloff_flag = false; 000022 2000 MOVS r0,#0 000024 7220 STRB r0,[r4,#8] |L19.38| -;;;3927 } -;;;3928 } -;;;3929 } +;;;3932 } +;;;3933 } +;;;3934 } 000026 bd10 POP {r4,pc} -;;;3930 +;;;3935 ENDP |L19.40| @@ -4268,18 +4274,18 @@ AREA ||i.pps_update_handle||, CODE, READONLY, ALIGN=2 pps_update_handle PROC -;;;1202 /* PPS update callback ڷֱлcase */ -;;;1203 static bool pps_update_handle(uint8_t *pps, uint8_t size, uint32_t pic_width, uint32_t pic_height) +;;;1206 /* PPS update callback ڷֱлcase */ +;;;1207 static bool pps_update_handle(uint8_t *pps, uint8_t size, uint32_t pic_width, uint32_t pic_height) 000000 b5f8 PUSH {r3-r7,lr} -;;;1204 { -;;;1205 /* AVDD ϵ, ڽϢPPS */ -;;;1206 // hal_gpio_set_output_data(IO_PAD_PWMEN, IO_LVL_HIGH); -;;;1207 -;;;1208 if (pic_width != g_rx_ctrl_handle->base_info.src_w || pic_height != g_rx_ctrl_handle->base_info.src_h) -000002 4c1e LDR r4,|L20.124| -000004 4615 MOV r5,r2 ;1204 +;;;1208 { +;;;1209 /* AVDD ϵ, ڽϢPPS */ +;;;1210 // hal_gpio_set_output_data(IO_PAD_PWMEN, IO_LVL_HIGH); +;;;1211 +;;;1212 if (pic_width != g_rx_ctrl_handle->base_info.src_w || pic_height != g_rx_ctrl_handle->base_info.src_h) +000002 4c1f LDR r4,|L20.128| +000004 4615 MOV r5,r2 ;1208 000006 6a20 LDR r0,[r4,#0x20] ; g_rx_ctrl_handle -000008 461e MOV r6,r3 ;1204 +000008 461e MOV r6,r3 ;1208 00000a 6801 LDR r1,[r0,#0] 00000c 42a9 CMP r1,r5 00000e d102 BNE |L20.22| @@ -4287,123 +4293,123 @@ 000012 42b0 CMP r0,r6 000014 d02b BEQ |L20.110| |L20.22| -;;;1209 { -;;;1210 //hal_dsi_rx_ctrl_set_sw_tear_mode(g_rx_ctrl_handle); -;;;1211 /* PPS Update ҷֱʷ仯 */ -;;;1212 hal_dsi_tx_ctrl_write_cmd(0x05, 0, 1, 0x22); +;;;1213 { +;;;1214 //hal_dsi_rx_ctrl_set_sw_tear_mode(g_rx_ctrl_handle); +;;;1215 /* PPS Update ҷֱʷ仯 */ +;;;1216 hal_dsi_tx_ctrl_write_cmd(0x05, 0, 1, 0x22); 000016 2322 MOVS r3,#0x22 000018 2201 MOVS r2,#1 00001a 2100 MOVS r1,#0 00001c 2005 MOVS r0,#5 00001e f7fffffe BL hal_dsi_tx_ctrl_write_cmd -;;;1213 s_pps_updata_allpixeloff_flag = true; +;;;1217 s_pps_updata_allpixeloff_flag = true; 000022 2701 MOVS r7,#1 000024 7227 STRB r7,[r4,#8] -;;;1214 BaseTime = hal_system_get_tick(); +;;;1218 BaseTime = hal_system_get_tick(); 000026 f7fffffe BL hal_system_get_tick -;;;1215 g_rx_ctrl_handle->base_info.src_w = pic_width; +;;;1219 g_rx_ctrl_handle->base_info.src_w = pic_width; 00002a 62a0 STR r0,[r4,#0x28] ; BaseTime -;;;1216 g_rx_ctrl_handle->base_info.src_h = pic_height; -;;;1217 /* עⲿֻPPSǰ Compression Mode Command */ -;;;1218 g_rx_ctrl_handle->compress_en = true; //hal_dsi_rx_ctrl_get_compressen_en(g_rx_ctrl_handle); +;;;1220 g_rx_ctrl_handle->base_info.src_h = pic_height; +;;;1221 /* עⲿֻPPSǰ Compression Mode Command */ +;;;1222 g_rx_ctrl_handle->compress_en = true; //hal_dsi_rx_ctrl_get_compressen_en(g_rx_ctrl_handle); 00002c 6a20 LDR r0,[r4,#0x20] ; g_rx_ctrl_handle 00002e 4601 MOV r1,r0 000030 c060 STM r0!,{r5,r6} 000032 3120 ADDS r1,r1,#0x20 000034 700f STRB r7,[r1,#0] -;;;1219 g_tx_ctrl_handle->base_info.src_w = pic_width; +;;;1223 g_tx_ctrl_handle->base_info.src_w = pic_width; 000036 6a61 LDR r1,[r4,#0x24] ; g_tx_ctrl_handle -;;;1220 g_tx_ctrl_handle->base_info.src_h = pic_height; +;;;1224 g_tx_ctrl_handle->base_info.src_h = pic_height; 000038 3808 SUBS r0,r0,#8 -;;;1221 -;;;1222 // hal_dsi_rx_ctrl_toggle_resolution(g_rx_ctrl_handle); -;;;1223 hal_dsi_rx_ctrl_toggle_resolution_ex(g_rx_ctrl_handle); +;;;1225 +;;;1226 // hal_dsi_rx_ctrl_toggle_resolution(g_rx_ctrl_handle); +;;;1227 hal_dsi_rx_ctrl_toggle_resolution_ex(g_rx_ctrl_handle); 00003a 624e STR r6,[r1,#0x24] 00003c 620d STR r5,[r1,#0x20] 00003e f7fffffe BL hal_dsi_rx_ctrl_toggle_resolution_ex -;;;1224 // delayMs(20); -;;;1225 // hal_dsi_tx_ctrl_write_cmd(0x05, 0, 1, 0x13); -;;;1226 #if 0 -;;;1227 if (pic_width == 720 && pic_height == 1600) -;;;1228 { -;;;1229 hal_dsi_rx_ctrl_pre_init_pps(g_rx_ctrl_handle, pps_1, 88); -;;;1230 } -;;;1231 else if (pic_width == 1080 && pic_height == 2400) +;;;1228 // delayMs(20); +;;;1229 // hal_dsi_tx_ctrl_write_cmd(0x05, 0, 1, 0x13); +;;;1230 #if 0 +;;;1231 if (pic_width == 720 && pic_height == 1600) ;;;1232 { -;;;1233 //hal_dsi_rx_ctrl_pre_init_pps(g_rx_ctrl_handle, pps_2, 88); +;;;1233 hal_dsi_rx_ctrl_pre_init_pps(g_rx_ctrl_handle, pps_1, 88); ;;;1234 } -;;;1235 else if (pic_width == 1440 && pic_height == 3200) +;;;1235 else if (pic_width == 1080 && pic_height == 2400) ;;;1236 { -;;;1237 //hal_dsi_rx_ctrl_pre_init_pps(g_rx_ctrl_handle, pps_3, 88);; +;;;1237 //hal_dsi_rx_ctrl_pre_init_pps(g_rx_ctrl_handle, pps_2, 88); ;;;1238 } -;;;1239 #endif -;;;1240 //hal_dsi_rx_ctrl_set_hw_tear_mode(g_rx_ctrl_handle); -;;;1241 // TAU_LOGD("resolution update w[%d] h[%d] compress[%d]", pic_width, pic_height, g_rx_ctrl_handle->compress_en); -;;;1242 #if CUS_SCLD_FILTER // ݲͬķֱʣѡͬ // -;;;1243 if( 720 == pic_width ) +;;;1239 else if (pic_width == 1440 && pic_height == 3200) +;;;1240 { +;;;1241 //hal_dsi_rx_ctrl_pre_init_pps(g_rx_ctrl_handle, pps_3, 88);; +;;;1242 } +;;;1243 #endif +;;;1244 //hal_dsi_rx_ctrl_set_hw_tear_mode(g_rx_ctrl_handle); +;;;1245 // TAU_LOGD("resolution update w[%d] h[%d] compress[%d]", pic_width, pic_height, g_rx_ctrl_handle->compress_en); +;;;1246 #if CUS_SCLD_FILTER // ݲͬķֱʣѡͬ // +;;;1247 if( 720 == pic_width ) 000042 202d MOVS r0,#0x2d 000044 0100 LSLS r0,r0,#4 000046 4285 CMP r5,r0 000048 d103 BNE |L20.82| -;;;1244 { -;;;1245 hal_dsi_rx_ctrl_set_cus_scld_filter( g_rx_ctrl_handle, rx_filter_1080_h_4_96, rx_filter_2400_v_4_96 ); -00004a 4a0d LDR r2,|L20.128| +;;;1248 { +;;;1249 hal_dsi_rx_ctrl_set_cus_scld_filter( g_rx_ctrl_handle, rx_filter_1080_h_4_96, rx_filter_2400_v_4_96 ); +00004a 4a0e LDR r2,|L20.132| 00004c 1fd1 SUBS r1,r2,#7 00004e 39f9 SUBS r1,r1,#0xf9 000050 e00a B |L20.104| |L20.82| -;;;1246 } -;;;1247 else if( 1080 == pic_width ) +;;;1250 } +;;;1251 else if( 1080 == pic_width ) 000052 2087 MOVS r0,#0x87 000054 00c0 LSLS r0,r0,#3 000056 4285 CMP r5,r0 000058 d103 BNE |L20.98| -;;;1248 { -;;;1249 hal_dsi_rx_ctrl_set_cus_scld_filter( g_rx_ctrl_handle, rx_filter_1080_h_4_86, rx_filter_2400_v_4_69 ); -00005a 4a0a LDR r2,|L20.132| +;;;1252 { +;;;1253 hal_dsi_rx_ctrl_set_cus_scld_filter( g_rx_ctrl_handle, rx_filter_1080_h_4_86, rx_filter_2400_v_4_69 ); +00005a 4a0b LDR r2,|L20.136| 00005c 1fd1 SUBS r1,r2,#7 00005e 39f9 SUBS r1,r1,#0xf9 000060 e002 B |L20.104| |L20.98| -;;;1250 } -;;;1251 else -;;;1252 { -;;;1253 hal_dsi_rx_ctrl_set_cus_scld_filter( g_rx_ctrl_handle, rx_filter_1440_h_4_72, rx_filter_3200_v_4_59 ); -000062 4a09 LDR r2,|L20.136| +;;;1254 } +;;;1255 else +;;;1256 { +;;;1257 hal_dsi_rx_ctrl_set_cus_scld_filter( g_rx_ctrl_handle, rx_filter_1440_h_4_72, rx_filter_3200_v_4_59 ); +000062 4a0a LDR r2,|L20.140| 000064 1fd1 SUBS r1,r2,#7 000066 39f9 SUBS r1,r1,#0xf9 |L20.104| -000068 6a20 LDR r0,[r4,#0x20] ;1249 ; g_rx_ctrl_handle +000068 6a20 LDR r0,[r4,#0x20] ;1253 ; g_rx_ctrl_handle 00006a f7fffffe BL hal_dsi_rx_ctrl_set_cus_scld_filter |L20.110| -;;;1254 } -;;;1255 -;;;1256 #endif -;;;1257 -;;;1258 } -;;;1259 -;;;1260 TAU_LOGD("PPS Update"); -00006e 4a07 LDR r2,|L20.140| -000070 a107 ADR r1,|L20.144| -000072 a00a ADR r0,|L20.156| -000074 f7fffffe BL LOG_printf -;;;1261 return true; -000078 2001 MOVS r0,#1 -;;;1262 } -00007a bdf8 POP {r3-r7,pc} -;;;1263 +;;;1258 } +;;;1259 +;;;1260 #endif +;;;1261 +;;;1262 } +;;;1263 +;;;1264 TAU_LOGD("PPS Update"); +00006e 224f MOVS r2,#0x4f +000070 0112 LSLS r2,r2,#4 +000072 a107 ADR r1,|L20.144| +000074 a009 ADR r0,|L20.156| +000076 f7fffffe BL LOG_printf +;;;1265 return true; +00007a 2001 MOVS r0,#1 +;;;1266 } +00007c bdf8 POP {r3-r7,pc} +;;;1267 ENDP - |L20.124| - DCD ||.data|| +00007e 0000 DCW 0x0000 |L20.128| - DCD ||.data||+0x138 + DCD ||.data|| |L20.132| - DCD ||.data||+0x338 + DCD ||.data||+0x138 |L20.136| - DCD ||.data||+0x538 + DCD ||.data||+0x338 |L20.140| - DCD 0x000004ec + DCD ||.data||+0x538 |L20.144| 000090 53323155 DCB "S21U_demo",0 000094 5f64656d @@ -4422,42 +4428,42 @@ AREA ||i.rx_restart_exec||, CODE, READONLY, ALIGN=2 rx_restart_exec PROC -;;;3641 -;;;3642 void rx_restart_exec(void) +;;;3646 +;;;3647 void rx_restart_exec(void) 000000 b510 PUSH {r4,lr} -;;;3643 { -;;;3644 if(s_restart_flag == true) +;;;3648 { +;;;3649 if(s_restart_flag == true) 000002 4c09 LDR r4,|L21.40| 000004 79e0 LDRB r0,[r4,#7] ; s_restart_flag 000006 2800 CMP r0,#0 000008 d00c BEQ |L21.36| -;;;3645 { -;;;3646 delayMs(50); +;;;3650 { +;;;3651 delayMs(50); 00000a 2032 MOVS r0,#0x32 00000c f7fffffe BL delayMs -;;;3647 TAU_LOGD("restart rx2"); +;;;3652 TAU_LOGD("restart rx2"); 000010 4a06 LDR r2,|L21.44| 000012 a107 ADR r1,|L21.48| 000014 a009 ADR r0,|L21.60| 000016 f7fffffe BL LOG_printf -;;;3648 s_restart_flag = false; +;;;3653 s_restart_flag = false; 00001a 2000 MOVS r0,#0 00001c 71e0 STRB r0,[r4,#7] -;;;3649 hal_dsi_rx_ctrl_restart(g_rx_ctrl_handle); +;;;3654 hal_dsi_rx_ctrl_restart(g_rx_ctrl_handle); 00001e 6a20 LDR r0,[r4,#0x20] ; g_rx_ctrl_handle 000020 f7fffffe BL hal_dsi_rx_ctrl_restart |L21.36| -;;;3650 } -;;;3651 } +;;;3655 } +;;;3656 } 000024 bd10 POP {r4,pc} -;;;3652 +;;;3657 ENDP 000026 0000 DCW 0x0000 |L21.40| DCD ||.data|| |L21.44| - DCD 0x00000e3f + DCD 0x00000e44 |L21.48| 000030 53323155 DCB "S21U_demo",0 000034 5f64656d @@ -4475,54 +4481,54 @@ AREA ||i.soft_timer3_cb||, CODE, READONLY, ALIGN=2 soft_timer3_cb PROC -;;;3868 #ifdef ADD_TIMER3_FUNCTION -;;;3869 static void soft_timer3_cb(void *data) +;;;3873 #ifdef ADD_TIMER3_FUNCTION +;;;3874 static void soft_timer3_cb(void *data) 000000 b510 PUSH {r4,lr} -;;;3870 { -;;;3871 hal_timer_start(TIMER_NUM3, 10, soft_timer3_cb, NULL); +;;;3875 { +;;;3876 hal_timer_start(TIMER_NUM3, 10, soft_timer3_cb, NULL); 000002 2300 MOVS r3,#0 000004 4a09 LDR r2,|L22.44| 000006 210a MOVS r1,#0xa 000008 2003 MOVS r0,#3 00000a f7fffffe BL hal_timer_start -;;;3872 g_tp_sleep_delay_count++; +;;;3877 g_tp_sleep_delay_count++; 00000e 4908 LDR r1,|L22.48| 000010 7808 LDRB r0,[r1,#0] ; g_tp_sleep_delay_count 000012 1c40 ADDS r0,r0,#1 000014 7008 STRB r0,[r1,#0] -;;;3873 tp_sleep_count++; +;;;3878 tp_sleep_count++; 000016 4907 LDR r1,|L22.52| 000018 7808 LDRB r0,[r1,#0] ; tp_sleep_count 00001a 1c40 ADDS r0,r0,#1 00001c 7008 STRB r0,[r1,#0] -;;;3874 if(phone_DisplayOFF_count>0) +;;;3879 if(phone_DisplayOFF_count>0) 00001e 4906 LDR r1,|L22.56| 000020 8a88 LDRH r0,[r1,#0x14] ; phone_DisplayOFF_count 000022 2800 CMP r0,#0 000024 d001 BEQ |L22.42| 000026 1c40 ADDS r0,r0,#1 -;;;3875 { -;;;3876 phone_DisplayOFF_count++; +;;;3880 { +;;;3881 phone_DisplayOFF_count++; 000028 8288 STRH r0,[r1,#0x14] |L22.42| -;;;3877 } -;;;3878 -;;;3879 #if AUTO_CAL_TP -;;;3880 if (g_exit_sleep_mode) -;;;3881 { -;;;3882 if (g_cal_cnt > 0) -;;;3883 { -;;;3884 g_cal_cnt--; -;;;3885 if (g_cal_cnt == 0){ -;;;3886 g_calibration_flag = true; -;;;3887 //TAU_LOGD("Start cal tp!\n"); -;;;3888 } -;;;3889 } -;;;3890 } -;;;3891 #endif -;;;3892 } +;;;3882 } +;;;3883 +;;;3884 #if AUTO_CAL_TP +;;;3885 if (g_exit_sleep_mode) +;;;3886 { +;;;3887 if (g_cal_cnt > 0) +;;;3888 { +;;;3889 g_cal_cnt--; +;;;3890 if (g_cal_cnt == 0){ +;;;3891 g_calibration_flag = true; +;;;3892 //TAU_LOGD("Start cal tp!\n"); +;;;3893 } +;;;3894 } +;;;3895 } +;;;3896 #endif +;;;3897 } 00002a bd10 POP {r4,pc} -;;;3893 #endif +;;;3898 #endif ENDP |L22.44| @@ -4537,23 +4543,23 @@ AREA ||i.swire_callback||, CODE, READONLY, ALIGN=2 swire_callback PROC -;;;3820 -;;;3821 static void swire_callback(void *data) +;;;3825 +;;;3826 static void swire_callback(void *data) 000000 b510 PUSH {r4,lr} -;;;3822 { -;;;3823 /* swire ǷҪһֱҪֻֻͬͬ */ -;;;3824 //if(start_display_on == false) -;;;3825 { -;;;3826 hal_timer_start(SWIRE_TIMER, 17, swire_timer_callback, NULL); +;;;3827 { +;;;3828 /* swire ǷҪһֱҪֻֻͬͬ */ +;;;3829 //if(start_display_on == false) +;;;3830 { +;;;3831 hal_timer_start(SWIRE_TIMER, 17, swire_timer_callback, NULL); 000002 2300 MOVS r3,#0 000004 4a02 LDR r2,|L23.16| 000006 2111 MOVS r1,#0x11 000008 2001 MOVS r0,#1 00000a f7fffffe BL hal_timer_start -;;;3827 } -;;;3828 } +;;;3832 } +;;;3833 } 00000e bd10 POP {r4,pc} -;;;3829 +;;;3834 ENDP |L23.16| @@ -4562,23 +4568,23 @@ AREA ||i.swire_timer_callback||, CODE, READONLY, ALIGN=2 swire_timer_callback PROC -;;;3802 -;;;3803 static void swire_timer_callback(void *data) +;;;3807 +;;;3808 static void swire_timer_callback(void *data) 000000 b508 PUSH {r3,lr} -;;;3804 { -;;;3805 #if 0 //def USE_FOR_SUMSUNG_S21U -;;;3806 if(Flag_blacklight_EN) -;;;3807 { -;;;3808 hal_swire_start(12, 12, 12, 12, SWIRE_DEFAULT_NUM); -;;;3809 } -;;;3810 else if(s20_power_on_flag) -;;;3811 { -;;;3812 hal_swire_start(12, 12, 12, 12, SWIRE_DEFAULT_NUM); -;;;3813 } -;;;3814 else -;;;3815 #endif +;;;3809 { +;;;3810 #if 0 //def USE_FOR_SUMSUNG_S21U +;;;3811 if(Flag_blacklight_EN) +;;;3812 { +;;;3813 hal_swire_start(12, 12, 12, 12, SWIRE_DEFAULT_NUM); +;;;3814 } +;;;3815 else if(s20_power_on_flag) ;;;3816 { -;;;3817 hal_swire_start(12, 12, 12, 12, swire_num); +;;;3817 hal_swire_start(12, 12, 12, 12, SWIRE_DEFAULT_NUM); +;;;3818 } +;;;3819 else +;;;3820 #endif +;;;3821 { +;;;3822 hal_swire_start(12, 12, 12, 12, swire_num); 000002 4805 LDR r0,|L24.24| 000004 230c MOVS r3,#0xc 000006 7840 LDRB r0,[r0,#1] ; swire_num @@ -4587,10 +4593,10 @@ 00000c 4619 MOV r1,r3 00000e 4618 MOV r0,r3 000010 f7fffffe BL hal_swire_start -;;;3818 } -;;;3819 } +;;;3823 } +;;;3824 } 000014 bd08 POP {r3,pc} -;;;3820 +;;;3825 ENDP 000016 0000 DCW 0x0000 @@ -4600,33 +4606,33 @@ AREA ||i.test_pwm_out_adjust||, CODE, READONLY, ALIGN=2 test_pwm_out_adjust PROC -;;;1358 *****************************************************************************/ -;;;1359 static void test_pwm_out_adjust(bool init, bool polarity, uint8_t duty_ratio, uint32_t frequency) +;;;1362 *****************************************************************************/ +;;;1363 static void test_pwm_out_adjust(bool init, bool polarity, uint8_t duty_ratio, uint32_t frequency) 000000 b5ff PUSH {r0-r7,lr} -;;;1360 { -;;;1361 pwm_out_ctrl_e ctl0 = PWMO_CTRL_HIGH; +;;;1364 { +;;;1365 pwm_out_ctrl_e ctl0 = PWMO_CTRL_HIGH; 000002 2602 MOVS r6,#2 -;;;1362 pwm_out_ctrl_e ctl1 = PWMO_CTRL_LOW; +;;;1366 pwm_out_ctrl_e ctl1 = PWMO_CTRL_LOW; 000004 2501 MOVS r5,#1 -000006 b083 SUB sp,sp,#0xc ;1360 -;;;1363 if (polarity) +000006 b083 SUB sp,sp,#0xc ;1364 +;;;1367 if (polarity) 000008 2900 CMP r1,#0 00000a d001 BEQ |L25.16| -;;;1364 { -;;;1365 ctl0 = PWMO_CTRL_LOW; +;;;1368 { +;;;1369 ctl0 = PWMO_CTRL_LOW; 00000c 2601 MOVS r6,#1 -;;;1366 ctl1 = PWMO_CTRL_HIGH; +;;;1370 ctl1 = PWMO_CTRL_HIGH; 00000e 2502 MOVS r5,#2 |L25.16| -;;;1367 } -;;;1368 uint32_t period = 1000000 / frequency; //λus +;;;1371 } +;;;1372 uint32_t period = 1000000 / frequency; //λus 000010 4619 MOV r1,r3 000012 4814 LDR r0,|L25.100| 000014 f7fffffe BL __aeabi_uidivmod 000018 4604 MOV r4,r0 -;;;1369 uint32_t thr0 = 0; +;;;1373 uint32_t thr0 = 0; 00001a 2000 MOVS r0,#0 -;;;1370 uint32_t thr1 = (period * duty_ratio / 100); +;;;1374 uint32_t thr1 = (period * duty_ratio / 100); 00001c 9001 STR r0,[sp,#4] 00001e 9905 LDR r1,[sp,#0x14] 000020 4620 MOV r0,r4 @@ -4634,26 +4640,26 @@ 000024 2164 MOVS r1,#0x64 000026 f7fffffe BL __aeabi_uidivmod 00002a 4607 MOV r7,r0 -;;;1371 -;;;1372 if (duty_ratio == 100) +;;;1375 +;;;1376 if (duty_ratio == 100) 00002c 9805 LDR r0,[sp,#0x14] 00002e 2864 CMP r0,#0x64 000030 d101 BNE |L25.54| -;;;1373 { -;;;1374 ctl1 = ctl0; +;;;1377 { +;;;1378 ctl1 = ctl0; 000032 4635 MOV r5,r6 -;;;1375 thr1 = period / 2; +;;;1379 thr1 = period / 2; 000034 0867 LSRS r7,r4,#1 |L25.54| -;;;1376 } -;;;1377 if (init) +;;;1380 } +;;;1381 if (init) 000036 9803 LDR r0,[sp,#0xc] 000038 2800 CMP r0,#0 00003a d00a BEQ |L25.82| -;;;1378 { -;;;1379 hal_pwm_out_init(); +;;;1382 { +;;;1383 hal_pwm_out_init(); 00003c f7fffffe BL hal_pwm_out_init -;;;1380 hal_pwm_out_config_all(ctl0, ctl1, thr0, thr1, period); +;;;1384 hal_pwm_out_config_all(ctl0, ctl1, thr0, thr1, period); 000040 463b MOV r3,r7 000042 9400 STR r4,[sp,#0] 000044 4629 MOV r1,r5 @@ -4661,23 +4667,23 @@ 000048 9a01 LDR r2,[sp,#4] 00004a f7fffffe BL hal_pwm_out_config_all |L25.78| -;;;1381 } -;;;1382 else -;;;1383 { -;;;1384 hal_pwm_out_sync_all(ctl0, ctl1, thr0, thr1, period); ;;;1385 } -;;;1386 } +;;;1386 else +;;;1387 { +;;;1388 hal_pwm_out_sync_all(ctl0, ctl1, thr0, thr1, period); +;;;1389 } +;;;1390 } 00004e b007 ADD sp,sp,#0x1c 000050 bdf0 POP {r4-r7,pc} |L25.82| -000052 463b MOV r3,r7 ;1384 -000054 9400 STR r4,[sp,#0] ;1384 -000056 4629 MOV r1,r5 ;1384 -000058 4630 MOV r0,r6 ;1384 -00005a 9a01 LDR r2,[sp,#4] ;1384 +000052 463b MOV r3,r7 ;1388 +000054 9400 STR r4,[sp,#0] ;1388 +000056 4629 MOV r1,r5 ;1388 +000058 4630 MOV r0,r6 ;1388 +00005a 9a01 LDR r2,[sp,#4] ;1388 00005c f7fffffe BL hal_pwm_out_sync_all 000060 e7f5 B |L25.78| -;;;1387 +;;;1391 ENDP 000062 0000 DCW 0x0000 @@ -4687,61 +4693,61 @@ AREA ||i.tp_heartbeat_exec||, CODE, READONLY, ALIGN=2 tp_heartbeat_exec PROC -;;;3894 -;;;3895 void tp_heartbeat_exec(void) +;;;3899 +;;;3900 void tp_heartbeat_exec(void) 000000 b570 PUSH {r4-r6,lr} -;;;3896 { -;;;3897 if (s_screen_init_complate) +;;;3901 { +;;;3902 if (s_screen_init_complate) 000002 480e LDR r0,|L26.60| 000004 7800 LDRB r0,[r0,#0] ; s_screen_init_complate 000006 2800 CMP r0,#0 000008 d007 BEQ |L26.26| -;;;3898 { -;;;3899 if(hal_gpio_get_input_data(IO_PAD_TD_INT)) +;;;3903 { +;;;3904 if(hal_gpio_get_input_data(IO_PAD_TD_INT)) 00000a 2009 MOVS r0,#9 00000c f7fffffe BL hal_gpio_get_input_data 000010 2500 MOVS r5,#0 -;;;3900 { -;;;3901 s_heartbeat = 0; +;;;3905 { +;;;3906 s_heartbeat = 0; 000012 4c0b LDR r4,|L26.64| -000014 2800 CMP r0,#0 ;3899 +000014 2800 CMP r0,#0 ;3904 000016 d001 BEQ |L26.28| 000018 62e5 STR r5,[r4,#0x2c] ; s_heartbeat |L26.26| -;;;3902 } -;;;3903 else -;;;3904 { -;;;3905 if(s_heartbeat < (65536/50)) // 65536*3 = 900ms 65536/50 = 6ms -;;;3906 { -;;;3907 s_heartbeat ++; -;;;3908 }else -;;;3909 { -;;;3910 TAU_LOGD("hb..."); -;;;3911 s_heartbeat = 0; -;;;3912 // ap_tp_st_touch_software_reset(); -;;;3913 ap_tp_st_touch_hardware_reset(); -;;;3914 } -;;;3915 } -;;;3916 } -;;;3917 } +;;;3907 } +;;;3908 else +;;;3909 { +;;;3910 if(s_heartbeat < (65536/50)) // 65536*3 = 900ms 65536/50 = 6ms +;;;3911 { +;;;3912 s_heartbeat ++; +;;;3913 }else +;;;3914 { +;;;3915 TAU_LOGD("hb..."); +;;;3916 s_heartbeat = 0; +;;;3917 // ap_tp_st_touch_software_reset(); +;;;3918 ap_tp_st_touch_hardware_reset(); +;;;3919 } +;;;3920 } +;;;3921 } +;;;3922 } 00001a bd70 POP {r4-r6,pc} |L26.28| 00001c 4909 LDR r1,|L26.68| -00001e 6ae0 LDR r0,[r4,#0x2c] ;3905 ; s_heartbeat -000020 4288 CMP r0,r1 ;3905 +00001e 6ae0 LDR r0,[r4,#0x2c] ;3910 ; s_heartbeat +000020 4288 CMP r0,r1 ;3910 000022 d202 BCS |L26.42| -000024 1c40 ADDS r0,r0,#1 ;3905 -000026 62e0 STR r0,[r4,#0x2c] ;3907 ; s_heartbeat +000024 1c40 ADDS r0,r0,#1 ;3910 +000026 62e0 STR r0,[r4,#0x2c] ;3912 ; s_heartbeat 000028 bd70 POP {r4-r6,pc} |L26.42| 00002a 4a07 LDR r2,|L26.72| 00002c a107 ADR r1,|L26.76| 00002e a00a ADR r0,|L26.88| 000030 f7fffffe BL LOG_printf -000034 62e5 STR r5,[r4,#0x2c] ;3913 ; s_heartbeat +000034 62e5 STR r5,[r4,#0x2c] ;3918 ; s_heartbeat 000036 f7fffffe BL ap_tp_st_touch_hardware_reset 00003a bd70 POP {r4-r6,pc} -;;;3918 +;;;3923 ENDP |L26.60| @@ -4751,7 +4757,7 @@ |L26.68| DCD 0x0000051e |L26.72| - DCD 0x00000f46 + DCD 0x00000f4b |L26.76| 00004c 53323155 DCB "S21U_demo",0 000050 5f64656d diff --git a/project/ISP_568/Listings/app_tp_for_custom_s21u.txt b/project/ISP_568/Listings/app_tp_for_custom_s21u.txt index f087d3f..8ca0823 100644 --- a/project/ISP_568/Listings/app_tp_for_custom_s21u.txt +++ b/project/ISP_568/Listings/app_tp_for_custom_s21u.txt @@ -7,20 +7,20 @@ app_tp_phone_analysis_data PROC ;;;659 **************************************************************************/ ;;;660 void app_tp_phone_analysis_data(uint8_t *rxbuffer, size_t rxbuffer_size, const uint8_t **txbuffer, size_t *txbuffer_size) -000000 b5ff PUSH {r0-r7,lr} +000000 b5f8 PUSH {r3-r7,lr} ;;;661 { -000002 4607 MOV r7,r0 -000004 b081 SUB sp,sp,#4 +000002 4606 MOV r6,r0 ;;;662 ;;;663 *txbuffer_size = 0; -000006 2000 MOVS r0,#0 +000004 2000 MOVS r0,#0 ;;;664 // if ((!((rxbuffer[0] == 0x60) || (rxbuffer[0] == 0x61))) || (SAMSUNG_s21u.Phone_Init_Done == false)) ;;;665 if (!((rxbuffer[0] == 0x60) || (rxbuffer[0] == 0x61))) -000008 6018 STR r0,[r3,#0] -00000a 7839 LDRB r1,[r7,#0] +000006 6018 STR r0,[r3,#0] +000008 460f MOV r7,r1 ;661 +00000a 7831 LDRB r1,[r6,#0] ;;;666 { ;;;667 SAMSUNG_s21u.Touch_ON[0] = 0; -00000c 48e1 LDR r0,|L1.916| +00000c 48e8 LDR r0,|L1.944| 00000e 461c MOV r4,r3 ;661 000010 4615 MOV r5,r2 ;661 000012 9000 STR r0,[sp,#0] ;665 @@ -34,19 +34,24 @@ |L1.34| ;;;668 } ;;;669 if(phone_reg_coord_BUF_NUM<2) // 单点触摸 -000022 48dd LDR r0,|L1.920| +000022 48e4 LDR r0,|L1.948| 000024 7a00 LDRB r0,[r0,#8] ; phone_reg_coord_BUF_NUM 000026 2802 CMP r0,#2 000028 d204 BCS |L1.52| ;;;670 hal_gpio_set_output_data(g_phone_output_int_pad, IO_LVL_HIGH); -00002a 48db LDR r0,|L1.920| +00002a 48e2 LDR r0,|L1.948| 00002c 2101 MOVS r1,#1 00002e 7800 LDRB r0,[r0,#0] ; g_phone_output_int_pad 000030 f7fffffe BL hal_gpio_set_output_data |L1.52| -000034 48d8 LDR r0,|L1.920| +000034 48df LDR r0,|L1.948| ;;;671 switch (rxbuffer[0]) -000036 783a LDRB r2,[r7,#0] +000036 7832 LDRB r2,[r6,#0] +000038 3009 ADDS r0,r0,#9 ;667 +00003a 2101 MOVS r1,#1 ;670 +00003c 2a90 CMP r2,#0x90 +00003e d078 BEQ |L1.306| +000040 dc53 BGT |L1.234| ;;;672 { ;;;673 case 0x60: ;;;674 { @@ -60,12 +65,6 @@ ;;;682 { ;;;683 ;;;684 if (SAMSUNG_s21u.D60_count == 0) -000038 2602 MOVS r6,#2 -00003a 3009 ADDS r0,r0,#9 ;667 -00003c 2101 MOVS r1,#1 ;670 -00003e 2a90 CMP r2,#0x90 ;671 -000040 d072 BEQ |L1.296| -000042 dc55 BGT |L1.240| ;;;685 { ;;;686 if(g_screen_tp_init_start == true) //开机 ;;;687 { @@ -102,17 +101,17 @@ ;;;718 *txbuffer = SAMSUNG_s21u.reg_60_4; ;;;719 *txbuffer_size = sizeof(SAMSUNG_s21u.reg_60_4); ;;;720 SAMSUNG_s21u.D60_count = 5; -000044 2305 MOVS r3,#5 -000046 2a52 CMP r2,#0x52 ;671 -000048 d06f BEQ |L1.298| -00004a dc10 BGT |L1.110| -00004c 2a22 CMP r2,#0x22 ;671 -00004e d06d BEQ |L1.300| -000050 dc06 BGT |L1.96| -000052 2a11 CMP r2,#0x11 ;671 -000054 d06b BEQ |L1.302| -000056 2a21 CMP r2,#0x21 ;671 -000058 d148 BNE |L1.236| +000042 2305 MOVS r3,#5 +000044 2a52 CMP r2,#0x52 ;671 +000046 d075 BEQ |L1.308| +000048 dc10 BGT |L1.108| +00004a 2a22 CMP r2,#0x22 ;671 +00004c d073 BEQ |L1.310| +00004e dc06 BGT |L1.94| +000050 2a11 CMP r2,#0x11 ;671 +000052 d071 BEQ |L1.312| +000054 2a21 CMP r2,#0x21 ;671 +000056 d147 BNE |L1.232| ;;;721 } ;;;722 else if (SAMSUNG_s21u.D60_count == 5) ;;;723 { @@ -218,17 +217,17 @@ ;;;823 case 0x21: ;;;824 { ;;;825 *txbuffer = SAMSUNG_s21u.reg_21; -00005a 48ce LDR r0,|L1.916| -00005c 3838 SUBS r0,r0,#0x38 +000058 48d5 LDR r0,|L1.944| +00005a 3838 SUBS r0,r0,#0x38 ;;;826 *txbuffer_size = sizeof(SAMSUNG_s21u.reg_21); ;;;827 } ;;;828 break; -00005e e112 B |L1.646| - |L1.96| -000060 2a23 CMP r2,#0x23 ;671 -000062 d077 BEQ |L1.340| -000064 2a30 CMP r2,#0x30 ;671 -000066 d141 BNE |L1.236| +00005c e11b B |L1.662| + |L1.94| +00005e 2a23 CMP r2,#0x23 ;671 +000060 d06b BEQ |L1.314| +000062 2a30 CMP r2,#0x30 ;671 +000064 d140 BNE |L1.232| ;;;829 case 0x55: ;;;830 { ;;;831 *txbuffer = SAMSUNG_s21u.reg_55; @@ -280,68 +279,69 @@ ;;;877 case 0x30: ;;;878 { ;;;879 *txbuffer = SAMSUNG_s21u.reg_30; -000068 48ca LDR r0,|L1.916| -00006a 3814 SUBS r0,r0,#0x14 +000066 48d2 LDR r0,|L1.944| +000068 3814 SUBS r0,r0,#0x14 ;;;880 *txbuffer_size = sizeof(SAMSUNG_s21u.reg_30); ;;;881 } ;;;882 break; -00006c e079 B |L1.354| - |L1.110| -00006e 2610 MOVS r6,#0x10 ;678 -000070 2a61 CMP r2,#0x61 ;671 -000072 d070 BEQ |L1.342| -000074 dc2c BGT |L1.208| -000076 2a55 CMP r2,#0x55 ;671 -000078 d06e BEQ |L1.344| -00007a 2a60 CMP r2,#0x60 ;671 -00007c d136 BNE |L1.236| -00007e 9a00 LDR r2,[sp,#0] ;675 -000080 7dd2 LDRB r2,[r2,#0x17] ;675 ; SAMSUNG_s21u -000082 2a01 CMP r2,#1 ;675 -000084 d06b BEQ |L1.350| -000086 7802 LDRB r2,[r0,#0] ;684 ; SAMSUNG_s21u -000088 2a00 CMP r2,#0 ;684 -00008a d06d BEQ |L1.360| -00008c 2a01 CMP r2,#1 ;699 -00008e d072 BEQ |L1.374| -000090 2a02 CMP r2,#2 ;704 -000092 d071 BEQ |L1.376| -000094 2a03 CMP r2,#3 ;710 -000096 d070 BEQ |L1.378| -000098 2a04 CMP r2,#4 ;716 -00009a d06f BEQ |L1.380| -00009c 2a05 CMP r2,#5 ;722 -00009e d06e BEQ |L1.382| -0000a0 2a06 CMP r2,#6 ;732 -0000a2 d06d BEQ |L1.384| -0000a4 2a07 CMP r2,#7 ;738 -0000a6 d06c BEQ |L1.386| -0000a8 2a08 CMP r2,#8 ;744 -0000aa d06b BEQ |L1.388| -0000ac 2a09 CMP r2,#9 ;750 -0000ae d06a BEQ |L1.390| -0000b0 4bb9 LDR r3,|L1.920| -0000b2 33ac ADDS r3,r3,#0xac ;667 -0000b4 2a0a CMP r2,#0xa ;756 -0000b6 d067 BEQ |L1.392| -0000b8 270c MOVS r7,#0xc ;766 -0000ba 2a0b CMP r2,#0xb ;762 -0000bc d074 BEQ |L1.424| -0000be 2a0c CMP r2,#0xc ;768 -0000c0 d073 BEQ |L1.426| -0000c2 2a0d CMP r2,#0xd ;774 -0000c4 d112 BNE |L1.236| -0000c6 461a MOV r2,r3 ;776 -0000c8 3220 ADDS r2,r2,#0x20 ;776 +00006a e158 B |L1.798| + |L1.108| +00006c 2a61 CMP r2,#0x61 ;671 +00006e d070 BEQ |L1.338| +000070 dc2d BGT |L1.206| +000072 2a55 CMP r2,#0x55 ;671 +000074 d06e BEQ |L1.340| +000076 2a60 CMP r2,#0x60 ;671 +000078 d136 BNE |L1.232| +00007a 9a00 LDR r2,[sp,#0] ;675 +00007c 7dd2 LDRB r2,[r2,#0x17] ;675 ; SAMSUNG_s21u +00007e 2a01 CMP r2,#1 ;675 +000080 d06b BEQ |L1.346| +000082 7802 LDRB r2,[r0,#0] ;684 ; SAMSUNG_s21u +000084 2a00 CMP r2,#0 ;684 +000086 d06b BEQ |L1.352| +000088 2a01 CMP r2,#1 ;699 +00008a d07f BEQ |L1.396| +00008c 2a02 CMP r2,#2 ;704 +00008e d06f BEQ |L1.368| +000090 2a03 CMP r2,#3 ;710 +000092 d06e BEQ |L1.370| +000094 2a04 CMP r2,#4 ;716 +000096 d06d BEQ |L1.372| +000098 2a05 CMP r2,#5 ;722 +00009a d06c BEQ |L1.374| +00009c 2a06 CMP r2,#6 ;732 +00009e d06b BEQ |L1.376| +0000a0 2a07 CMP r2,#7 ;738 +0000a2 d06a BEQ |L1.378| +0000a4 2a08 CMP r2,#8 ;744 +0000a6 d069 BEQ |L1.380| +0000a8 2a09 CMP r2,#9 ;750 +0000aa d068 BEQ |L1.382| +0000ac 4bc1 LDR r3,|L1.948| +0000ae 33ac ADDS r3,r3,#0xac ;667 +0000b0 2a0a CMP r2,#0xa ;756 +0000b2 d06e BEQ |L1.402| +0000b4 260c MOVS r6,#0xc ;766 +0000b6 2a0b CMP r2,#0xb ;762 +0000b8 d06c BEQ |L1.404| +0000ba 2a0c CMP r2,#0xc ;768 +0000bc d06b BEQ |L1.406| +0000be 2a0d CMP r2,#0xd ;774 +0000c0 d112 BNE |L1.232| +0000c2 461a MOV r2,r3 ;776 +0000c4 3220 ADDS r2,r2,#0x20 ;776 + |L1.198| +0000c6 602a STR r2,[r5,#0] ;689 +0000c8 2210 MOVS r2,#0x10 ;689 |L1.202| -0000ca 602a STR r2,[r5,#0] ;777 -0000cc 6026 STR r6,[r4,#0] ;777 -0000ce e060 B |L1.402| - |L1.208| -0000d0 2a74 CMP r2,#0x74 ;671 -0000d2 d06b BEQ |L1.428| -0000d4 2a85 CMP r2,#0x85 ;671 -0000d6 d109 BNE |L1.236| +0000ca 6022 STR r2,[r4,#0] ;777 +0000cc e058 B |L1.384| + |L1.206| +0000ce 2a74 CMP r2,#0x74 ;671 +0000d0 d06f BEQ |L1.434| +0000d2 2a85 CMP r2,#0x85 ;671 +0000d4 d108 BNE |L1.232| ;;;883 case 0x90: ;;;884 { ;;;885 *txbuffer = SAMSUNG_s21u.reg_90; @@ -356,21 +356,20 @@ ;;;894 case 0x85: ;;;895 { ;;;896 if (rxbuffer_size > 1) -0000d8 9a02 LDR r2,[sp,#8] -0000da 2a01 CMP r2,#1 -0000dc d967 BLS |L1.430| +0000d6 2f01 CMP r7,#1 +0000d8 d96c BLS |L1.436| ;;;897 { ;;;898 if ((rxbuffer[1] == 0x00) && (rxbuffer[2] == 0x00)) -0000de 787a LDRB r2,[r7,#1] -0000e0 2a00 CMP r2,#0 -0000e2 d103 BNE |L1.236| -0000e4 78ba LDRB r2,[r7,#2] -0000e6 2a00 CMP r2,#0 -0000e8 d100 BNE |L1.236| +0000da 7872 LDRB r2,[r6,#1] +0000dc 2a00 CMP r2,#0 +0000de d103 BNE |L1.232| +0000e0 78b2 LDRB r2,[r6,#2] +0000e2 2a00 CMP r2,#0 +0000e4 d100 BNE |L1.232| ;;;899 { ;;;900 SAMSUNG_s21u.D85_count = 1; -0000ea 7041 STRB r1,[r0,#1] - |L1.236| +0000e6 7041 STRB r1,[r0,#1] + |L1.232| ;;;901 } ;;;902 return; ;;;903 } @@ -446,7 +445,7 @@ ;;;973 // break; ;;;974 case 0xE4: ;;;975 { -;;;976 // g_tp_sleep_in = false; // 退出息屏状态 +;;;976 g_tp_sleep_in = false; // 退出息屏状态 ;;;977 g_ap_tp_init_done = true; ;;;978 if (rxbuffer_size == 2) ;;;979 { @@ -511,444 +510,471 @@ ;;;1038 } ;;;1039 } ;;;1040 break; -;;;1041 -;;;1042 } -;;;1043 //hal_gpio_set_output_data(IO_PAD_AP_SPIS_MISO,0); -;;;1044 -;;;1045 } -0000ec b005 ADD sp,sp,#0x14 -0000ee bdf0 POP {r4-r7,pc} - |L1.240| -0000f0 2aaf CMP r2,#0xaf ;671 -0000f2 d074 BEQ |L1.478| -0000f4 dc1c BGT |L1.304| -0000f6 2aa4 CMP r2,#0xa4 ;671 -0000f8 d072 BEQ |L1.480| -0000fa dc06 BGT |L1.266| -0000fc 2a92 CMP r2,#0x92 ;671 -0000fe d070 BEQ |L1.482| -000100 2aa3 CMP r2,#0xa3 ;671 -000102 d1f3 BNE |L1.236| -000104 48a3 LDR r0,|L1.916| -000106 382e SUBS r0,r0,#0x2e ;855 -000108 e0c5 B |L1.662| - |L1.266| -00010a 2aa5 CMP r2,#0xa5 ;671 -00010c d06a BEQ |L1.484| -00010e 2aae CMP r2,#0xae ;671 -000110 d1ec BNE |L1.236| -000112 9902 LDR r1,[sp,#8] ;1019 -000114 2901 CMP r1,#1 ;1019 -000116 d9e9 BLS |L1.236| -000118 7879 LDRB r1,[r7,#1] ;1021 -00011a 29a3 CMP r1,#0xa3 ;1021 -00011c d1e6 BNE |L1.236| -00011e 78b9 LDRB r1,[r7,#2] ;1021 -000120 2940 CMP r1,#0x40 ;1021 -000122 d1e3 BNE |L1.236| - |L1.292| -000124 2104 MOVS r1,#4 ;1025 -000126 e034 B |L1.402| - |L1.296| -000128 e0c8 B |L1.700| - |L1.298| -00012a e0bd B |L1.680| - |L1.300| -00012c e0a3 B |L1.630| - |L1.302| -00012e e0cb B |L1.712| +;;;1041 case 0x9B: +;;;1042 { +;;;1043 if (rxbuffer_size == 2) +;;;1044 { +;;;1045 g_tp_sleep_in = true; // 进入息屏状态 +;;;1046 } +;;;1047 } +;;;1048 break; +;;;1049 +;;;1050 } +;;;1051 //hal_gpio_set_output_data(IO_PAD_AP_SPIS_MISO,0); +;;;1052 +;;;1053 } +0000e8 bdf8 POP {r3-r7,pc} + |L1.234| +0000ea 2aae CMP r2,#0xae ;671 +0000ec d077 BEQ |L1.478| +0000ee dc12 BGT |L1.278| +0000f0 2aa3 CMP r2,#0xa3 ;671 +0000f2 d075 BEQ |L1.480| +0000f4 dc08 BGT |L1.264| +0000f6 2a92 CMP r2,#0x92 ;671 +0000f8 d073 BEQ |L1.482| +0000fa 2a9b CMP r2,#0x9b ;671 +0000fc d1f4 BNE |L1.232| +0000fe 2f02 CMP r7,#2 ;1043 +000100 d1f2 BNE |L1.232| +000102 48ac LDR r0,|L1.948| +000104 70c1 STRB r1,[r0,#3] ;1045 + |L1.262| +000106 bdf8 POP {r3-r7,pc} + |L1.264| +000108 2aa4 CMP r2,#0xa4 ;671 +00010a d06b BEQ |L1.484| +00010c 2aa5 CMP r2,#0xa5 ;671 +00010e d1fa BNE |L1.262| +000110 48a7 LDR r0,|L1.944| +000112 3826 SUBS r0,r0,#0x26 ;849 +000114 e0c7 B |L1.678| + |L1.278| +000116 4ba6 LDR r3,|L1.944| +000118 3320 ADDS r3,r3,#0x20 ;667 +00011a 469c MOV r12,r3 ;996 +00011c 2ae4 CMP r2,#0xe4 ;671 +00011e d06f BEQ |L1.512| +000120 dc0c BGT |L1.316| +000122 2aaf CMP r2,#0xaf ;671 +000124 d06d BEQ |L1.514| +000126 2abe CMP r2,#0xbe ;671 +000128 d1ed BNE |L1.262| +00012a 2f02 CMP r7,#2 ;1035 +00012c d1eb BNE |L1.262| +00012e 7119 STRB r1,[r3,#4] ;1037 |L1.304| -000130 4b98 LDR r3,|L1.916| -000132 3320 ADDS r3,r3,#0x20 ;667 -000134 2abe CMP r2,#0xbe ;671 -000136 d071 BEQ |L1.540| -000138 2ae4 CMP r2,#0xe4 ;671 -00013a d070 BEQ |L1.542| +000130 bdf8 POP {r3-r7,pc} + |L1.306| +000132 e0cb B |L1.716| + |L1.308| +000134 e0c0 B |L1.696| + |L1.310| +000136 e0a6 B |L1.646| + |L1.312| +000138 e0ce B |L1.728| + |L1.314| +00013a e0c2 B |L1.706| + |L1.316| 00013c 2af1 CMP r2,#0xf1 ;671 00013e d06f BEQ |L1.544| 000140 2af3 CMP r2,#0xf3 ;671 -000142 d1d3 BNE |L1.236| -000144 9902 LDR r1,[sp,#8] ;1010 -000146 2902 CMP r1,#2 ;1010 -000148 d1d0 BNE |L1.236| -00014a 7879 LDRB r1,[r7,#1] ;1012 -00014c 2900 CMP r1,#0 ;1012 -00014e d1cd BNE |L1.236| -000150 2109 MOVS r1,#9 ;1013 -000152 e01e B |L1.402| +000142 d1f5 BNE |L1.304| +000144 2f02 CMP r7,#2 ;1010 +000146 d1f3 BNE |L1.304| +000148 7871 LDRB r1,[r6,#1] ;1012 +00014a 2900 CMP r1,#0 ;1012 +00014c d1f0 BNE |L1.304| +00014e 2109 MOVS r1,#9 ;1013 +000150 e016 B |L1.384| + |L1.338| +000152 e074 B |L1.574| |L1.340| -000154 e0ad B |L1.690| - |L1.342| -000156 e06c B |L1.562| - |L1.344| -000158 e093 B |L1.642| -00015a e000 B |L1.350| -00015c e004 B |L1.360| - |L1.350| -00015e 488d LDR r0,|L1.916| -000160 3025 ADDS r0,r0,#0x25 ;677 - |L1.354| -000162 6028 STR r0,[r5,#0] ;880 -000164 6026 STR r6,[r4,#0] ;880 -000166 e7c1 B |L1.236| - |L1.360| -000168 4a8b LDR r2,|L1.920| -00016a 7852 LDRB r2,[r2,#1] ;686 ; g_screen_tp_init_start -00016c 2a00 CMP r2,#0 ;686 -00016e 4a8b LDR r2,|L1.924| -000170 d00b BEQ |L1.394| -000172 1cd2 ADDS r2,r2,#3 ;686 -000174 e7a9 B |L1.202| +000154 e09d B |L1.658| +000156 e000 B |L1.346| +000158 e002 B |L1.352| + |L1.346| +00015a 4895 LDR r0,|L1.944| +00015c 3025 ADDS r0,r0,#0x25 ;677 +00015e e07f B |L1.608| + |L1.352| +000160 4a94 LDR r2,|L1.948| +000162 7852 LDRB r2,[r2,#1] ;686 ; g_screen_tp_init_start +000164 2a00 CMP r2,#0 ;686 +000166 4a94 LDR r2,|L1.952| +000168 d00c BEQ |L1.388| +00016a 1cd2 ADDS r2,r2,#3 ;686 +00016c e7ab B |L1.198| +00016e e00d B |L1.396| + |L1.368| +000170 e012 B |L1.408| + |L1.370| +000172 e018 B |L1.422| + |L1.372| +000174 e01f B |L1.438| |L1.374| -000176 e00e B |L1.406| +000176 e024 B |L1.450| |L1.376| -000178 e010 B |L1.412| +000178 e035 B |L1.486| |L1.378| -00017a e019 B |L1.432| +00017a e03a B |L1.498| |L1.380| -00017c e01d B |L1.442| +00017c e042 B |L1.516| |L1.382| -00017e e021 B |L1.452| +00017e e048 B |L1.530| |L1.384| -000180 e031 B |L1.486| - |L1.386| -000182 e035 B |L1.496| +000180 7001 STRB r1,[r0,#0] ;891 +000182 e7d5 B |L1.304| |L1.388| -000184 e03a B |L1.508| - |L1.390| -000186 e03f B |L1.520| - |L1.392| -000188 e044 B |L1.532| - |L1.394| -00018a 32d3 ADDS r2,r2,#0xd3 ;690 -00018c 602a STR r2,[r5,#0] ;695 -00018e 2230 MOVS r2,#0x30 ;695 -000190 6022 STR r2,[r4,#0] ;695 +000184 32d3 ADDS r2,r2,#0xd3 +000186 602a STR r2,[r5,#0] ;695 +000188 2230 MOVS r2,#0x30 ;695 +00018a e79e B |L1.202| + |L1.396| +00018c 488a LDR r0,|L1.952| +00018e 3013 ADDS r0,r0,#0x13 ;701 +000190 e066 B |L1.608| |L1.402| -000192 7001 STRB r1,[r0,#0] ;690 -000194 e7aa B |L1.236| +000192 e046 B |L1.546| + |L1.404| +000194 e04a B |L1.556| |L1.406| -000196 4881 LDR r0,|L1.924| -000198 3013 ADDS r0,r0,#0x13 ;701 -00019a e7e2 B |L1.354| - |L1.412| -00019c 497f LDR r1,|L1.924| -00019e 3123 ADDS r1,r1,#0x23 ;706 -0001a0 6029 STR r1,[r5,#0] ;707 +000196 e04b B |L1.560| + |L1.408| +000198 4987 LDR r1,|L1.952| +00019a 3123 ADDS r1,r1,#0x23 ;706 +00019c 6029 STR r1,[r5,#0] ;707 +00019e 2110 MOVS r1,#0x10 ;707 +0001a0 6021 STR r1,[r4,#0] ;708 0001a2 2103 MOVS r1,#3 ;708 -0001a4 6026 STR r6,[r4,#0] ;708 -0001a6 e7f4 B |L1.402| - |L1.424| -0001a8 e03b B |L1.546| - |L1.426| -0001aa e03c B |L1.550| - |L1.428| -0001ac e0bd B |L1.810| - |L1.430| -0001ae e08d B |L1.716| - |L1.432| -0001b0 497a LDR r1,|L1.924| -0001b2 3133 ADDS r1,r1,#0x33 ;712 -0001b4 6029 STR r1,[r5,#0] ;713 -0001b6 6026 STR r6,[r4,#0] ;714 -0001b8 e7b4 B |L1.292| - |L1.442| -0001ba 4978 LDR r1,|L1.924| -0001bc 3143 ADDS r1,r1,#0x43 ;718 -0001be 6029 STR r1,[r5,#0] ;719 -0001c0 6026 STR r6,[r4,#0] ;720 -0001c2 e0be B |L1.834| - |L1.452| -0001c4 4875 LDR r0,|L1.924| -0001c6 3053 ADDS r0,r0,#0x53 ;724 -0001c8 6028 STR r0,[r5,#0] ;725 -0001ca 385c SUBS r0,r0,#0x5c ;726 -0001cc 6026 STR r6,[r4,#0] ;726 +0001a4 e7ec B |L1.384| + |L1.422| +0001a6 4984 LDR r1,|L1.952| +0001a8 3133 ADDS r1,r1,#0x33 ;712 +0001aa 6029 STR r1,[r5,#0] ;713 +0001ac 2110 MOVS r1,#0x10 ;713 +0001ae 6021 STR r1,[r4,#0] ;714 +0001b0 e0fb B |L1.938| + |L1.434| +0001b2 e0c3 B |L1.828| + |L1.436| +0001b4 e092 B |L1.732| + |L1.438| +0001b6 4980 LDR r1,|L1.952| +0001b8 3143 ADDS r1,r1,#0x43 ;718 +0001ba 6029 STR r1,[r5,#0] ;719 +0001bc 2110 MOVS r1,#0x10 ;719 +0001be 6021 STR r1,[r4,#0] ;720 +0001c0 e0c7 B |L1.850| + |L1.450| +0001c2 487d LDR r0,|L1.952| +0001c4 3053 ADDS r0,r0,#0x53 ;724 +0001c6 6028 STR r0,[r5,#0] ;725 +0001c8 2010 MOVS r0,#0x10 ;725 +0001ca 6020 STR r0,[r4,#0] ;726 +0001cc 4879 LDR r0,|L1.948| 0001ce 7941 LDRB r1,[r0,#5] ;726 ; g_ap_tp_init_E4 0001d0 2900 CMP r1,#0 ;726 -0001d2 d08b BEQ |L1.236| +0001d2 d0ad BEQ |L1.304| 0001d4 2100 MOVS r1,#0 ;728 0001d6 7141 STRB r1,[r0,#5] ;728 0001d8 2101 MOVS r1,#1 ;729 0001da 7800 LDRB r0,[r0,#0] ;729 ; g_phone_output_int_pad -0001dc e0ca B |L1.884| +0001dc e0d4 B |L1.904| |L1.478| -0001de e055 B |L1.652| +0001de e0dc B |L1.922| |L1.480| -0001e0 e05f B |L1.674| +0001e0 e064 B |L1.684| |L1.482| -0001e2 e080 B |L1.742| +0001e2 e088 B |L1.758| |L1.484| -0001e4 e05a B |L1.668| +0001e4 e065 B |L1.690| |L1.486| -0001e6 496d LDR r1,|L1.924| +0001e6 4974 LDR r1,|L1.952| 0001e8 3163 ADDS r1,r1,#0x63 ;734 0001ea 6029 STR r1,[r5,#0] ;735 -0001ec 6026 STR r6,[r4,#0] ;736 -0001ee e0a6 B |L1.830| - |L1.496| -0001f0 496a LDR r1,|L1.924| -0001f2 3173 ADDS r1,r1,#0x73 ;740 -0001f4 6029 STR r1,[r5,#0] ;741 -0001f6 2107 MOVS r1,#7 ;742 -0001f8 6026 STR r6,[r4,#0] ;742 -0001fa e7ca B |L1.402| - |L1.508| -0001fc 4967 LDR r1,|L1.924| -0001fe 3183 ADDS r1,r1,#0x83 ;746 -000200 6029 STR r1,[r5,#0] ;747 -000202 2108 MOVS r1,#8 ;748 -000204 6026 STR r6,[r4,#0] ;748 -000206 e7c4 B |L1.402| - |L1.520| -000208 4964 LDR r1,|L1.924| -00020a 3193 ADDS r1,r1,#0x93 ;752 -00020c 6029 STR r1,[r5,#0] ;753 -00020e 210a MOVS r1,#0xa ;754 -000210 6026 STR r6,[r4,#0] ;754 -000212 e7be B |L1.402| - |L1.532| -000214 602b STR r3,[r5,#0] ;759 -000216 210b MOVS r1,#0xb ;760 -000218 6026 STR r6,[r4,#0] ;760 -00021a e7ba B |L1.402| - |L1.540| -00021c e0b4 B |L1.904| - |L1.542| -00021e e092 B |L1.838| +0001ec 2110 MOVS r1,#0x10 ;735 +0001ee 6021 STR r1,[r4,#0] ;736 +0001f0 e0ad B |L1.846| + |L1.498| +0001f2 4971 LDR r1,|L1.952| +0001f4 3173 ADDS r1,r1,#0x73 ;740 +0001f6 6029 STR r1,[r5,#0] ;741 +0001f8 2110 MOVS r1,#0x10 ;741 +0001fa 6021 STR r1,[r4,#0] ;742 +0001fc 2107 MOVS r1,#7 ;742 +0001fe e7bf B |L1.384| + |L1.512| +000200 e0a9 B |L1.854| + |L1.514| +000202 e04b B |L1.668| + |L1.516| +000204 496c LDR r1,|L1.952| +000206 3183 ADDS r1,r1,#0x83 ;746 +000208 6029 STR r1,[r5,#0] ;747 +00020a 2110 MOVS r1,#0x10 ;747 +00020c 6021 STR r1,[r4,#0] ;748 +00020e 2108 MOVS r1,#8 ;748 +000210 e7b6 B |L1.384| + |L1.530| +000212 4969 LDR r1,|L1.952| +000214 3193 ADDS r1,r1,#0x93 ;752 +000216 6029 STR r1,[r5,#0] ;753 +000218 2110 MOVS r1,#0x10 ;753 +00021a 6021 STR r1,[r4,#0] ;754 +00021c 210a MOVS r1,#0xa ;754 +00021e e7af B |L1.384| |L1.544| -000220 e037 B |L1.658| +000220 e03f B |L1.674| |L1.546| -000222 602b STR r3,[r5,#0] ;766 -000224 e002 B |L1.556| - |L1.550| -000226 495d LDR r1,|L1.924| -000228 31b3 ADDS r1,r1,#0xb3 ;770 -00022a 6029 STR r1,[r5,#0] ;770 +000222 2110 MOVS r1,#0x10 ;759 +000224 602b STR r3,[r5,#0] ;759 +000226 6021 STR r1,[r4,#0] ;760 +000228 210b MOVS r1,#0xb ;760 +00022a e7a9 B |L1.384| |L1.556| -00022c 6026 STR r6,[r4,#0] ;766 -00022e 7007 STRB r7,[r0,#0] ;766 +00022c 602b STR r3,[r5,#0] ;766 +00022e e002 B |L1.566| |L1.560| -000230 e75c B |L1.236| - |L1.562| -000232 9800 LDR r0,[sp,#0] ;786 -000234 7dc0 LDRB r0,[r0,#0x17] ;786 ; SAMSUNG_s21u -000236 2801 CMP r0,#1 ;786 -000238 d00d BEQ |L1.598| -00023a 4f57 LDR r7,|L1.920| -00023c 2101 MOVS r1,#1 ;795 -00023e 7838 LDRB r0,[r7,#0] ;795 ; g_phone_output_int_pad -000240 f7fffffe BL hal_gpio_set_output_data -000244 7978 LDRB r0,[r7,#5] ;796 ; g_ap_tp_init_E4 -000246 2801 CMP r0,#1 ;796 -000248 d00f BEQ |L1.618| -00024a 2802 CMP r0,#2 ;801 -00024c 4853 LDR r0,|L1.924| -00024e d00f BEQ |L1.624| -000250 30ff ADDS r0,r0,#0xff ;801 -000252 3024 ADDS r0,r0,#0x24 ;801 -000254 e785 B |L1.354| - |L1.598| -000256 4850 LDR r0,|L1.920| -000258 2101 MOVS r1,#1 ;788 -00025a 7800 LDRB r0,[r0,#0] ;788 ; g_phone_output_int_pad -00025c f7fffffe BL hal_gpio_set_output_data -000260 484c LDR r0,|L1.916| -000262 3035 ADDS r0,r0,#0x35 ;790 -000264 6028 STR r0,[r5,#0] ;791 -000266 2040 MOVS r0,#0x40 ;791 -000268 e02c B |L1.708| - |L1.618| -00026a 484a LDR r0,|L1.916| -00026c 384d SUBS r0,r0,#0x4d ;798 -00026e e778 B |L1.354| - |L1.624| -000270 30ff ADDS r0,r0,#0xff ;799 -000272 3044 ADDS r0,r0,#0x44 ;799 -000274 e775 B |L1.354| - |L1.630| -000276 4847 LDR r0,|L1.916| -000278 383d SUBS r0,r0,#0x3d ;816 -00027a 6028 STR r0,[r5,#0] ;817 -00027c 4846 LDR r0,|L1.920| -00027e 6023 STR r3,[r4,#0] ;822 -000280 e04b B |L1.794| - |L1.642| -000282 4844 LDR r0,|L1.916| -000284 3837 SUBS r0,r0,#0x37 ;831 +000230 4961 LDR r1,|L1.952| +000232 31b3 ADDS r1,r1,#0xb3 ;770 +000234 6029 STR r1,[r5,#0] ;770 + |L1.566| +000236 2110 MOVS r1,#0x10 ;765 +000238 6021 STR r1,[r4,#0] ;766 +00023a 7006 STRB r6,[r0,#0] ;766 + |L1.572| +00023c e778 B |L1.304| + |L1.574| +00023e 9800 LDR r0,[sp,#0] ;786 +000240 7dc0 LDRB r0,[r0,#0x17] ;786 ; SAMSUNG_s21u +000242 2801 CMP r0,#1 ;786 +000244 d00f BEQ |L1.614| +000246 4e5b LDR r6,|L1.948| +000248 2101 MOVS r1,#1 ;795 +00024a 7830 LDRB r0,[r6,#0] ;795 ; g_phone_output_int_pad +00024c f7fffffe BL hal_gpio_set_output_data +000250 7970 LDRB r0,[r6,#5] ;796 ; g_ap_tp_init_E4 +000252 2801 CMP r0,#1 ;796 +000254 d011 BEQ |L1.634| +000256 2802 CMP r0,#2 ;801 +000258 4857 LDR r0,|L1.952| +00025a d011 BEQ |L1.640| +00025c 30ff ADDS r0,r0,#0xff ;801 +00025e 3024 ADDS r0,r0,#0x24 ;801 + |L1.608| +000260 6028 STR r0,[r5,#0] ;804 +000262 2010 MOVS r0,#0x10 ;804 +000264 e036 B |L1.724| + |L1.614| +000266 4853 LDR r0,|L1.948| +000268 2101 MOVS r1,#1 ;788 +00026a 7800 LDRB r0,[r0,#0] ;788 ; g_phone_output_int_pad +00026c f7fffffe BL hal_gpio_set_output_data +000270 484f LDR r0,|L1.944| +000272 3035 ADDS r0,r0,#0x35 ;790 +000274 6028 STR r0,[r5,#0] ;791 +000276 2040 MOVS r0,#0x40 ;791 +000278 e02c B |L1.724| + |L1.634| +00027a 484d LDR r0,|L1.944| +00027c 384d SUBS r0,r0,#0x4d ;798 +00027e e7ef B |L1.608| + |L1.640| +000280 30ff ADDS r0,r0,#0xff ;799 +000282 3044 ADDS r0,r0,#0x44 ;799 +000284 e7ec B |L1.608| |L1.646| -000286 6028 STR r0,[r5,#0] ;832 -000288 6021 STR r1,[r4,#0] ;832 - |L1.650| -00028a e72f B |L1.236| - |L1.652| -00028c 4841 LDR r0,|L1.916| -00028e 3836 SUBS r0,r0,#0x36 ;837 -000290 e001 B |L1.662| +000286 484a LDR r0,|L1.944| +000288 383d SUBS r0,r0,#0x3d ;816 +00028a 6028 STR r0,[r5,#0] ;817 +00028c 4849 LDR r0,|L1.948| +00028e 6023 STR r3,[r4,#0] ;822 +000290 e03c B |L1.780| |L1.658| -000292 4840 LDR r0,|L1.916| -000294 3832 SUBS r0,r0,#0x32 ;843 +000292 4847 LDR r0,|L1.944| +000294 3837 SUBS r0,r0,#0x37 ;831 |L1.662| -000296 6028 STR r0,[r5,#0] ;838 -000298 2004 MOVS r0,#4 ;838 -00029a e013 B |L1.708| +000296 6028 STR r0,[r5,#0] ;832 +000298 6021 STR r1,[r4,#0] ;832 + |L1.666| +00029a e749 B |L1.304| |L1.668| -00029c 483d LDR r0,|L1.916| -00029e 3826 SUBS r0,r0,#0x26 ;849 -0002a0 e7f9 B |L1.662| +00029c 4844 LDR r0,|L1.944| +00029e 3836 SUBS r0,r0,#0x36 ;837 +0002a0 e001 B |L1.678| |L1.674| -0002a2 483c LDR r0,|L1.916| -0002a4 382a SUBS r0,r0,#0x2a ;861 -0002a6 e7f6 B |L1.662| - |L1.680| -0002a8 483a LDR r0,|L1.916| -0002aa 3822 SUBS r0,r0,#0x22 ;867 -0002ac 6028 STR r0,[r5,#0] ;868 -0002ae 2003 MOVS r0,#3 ;868 -0002b0 e008 B |L1.708| +0002a2 4843 LDR r0,|L1.944| +0002a4 3832 SUBS r0,r0,#0x32 ;843 + |L1.678| +0002a6 6028 STR r0,[r5,#0] ;838 +0002a8 2004 MOVS r0,#4 ;838 +0002aa e013 B |L1.724| + |L1.684| +0002ac 4840 LDR r0,|L1.944| +0002ae 382e SUBS r0,r0,#0x2e ;855 +0002b0 e7f9 B |L1.678| |L1.690| -0002b2 4838 LDR r0,|L1.916| -0002b4 381f SUBS r0,r0,#0x1f ;873 -0002b6 6028 STR r0,[r5,#0] ;874 -0002b8 200b MOVS r0,#0xb ;874 -0002ba e003 B |L1.708| - |L1.700| -0002bc 4835 LDR r0,|L1.916| -0002be 3812 SUBS r0,r0,#0x12 ;885 -0002c0 6028 STR r0,[r5,#0] ;886 -0002c2 200a MOVS r0,#0xa ;886 - |L1.708| -0002c4 6020 STR r0,[r4,#0] ;886 - |L1.710| -0002c6 e711 B |L1.236| - |L1.712| -0002c8 7006 STRB r6,[r0,#0] ;891 -0002ca e70f B |L1.236| +0002b2 483f LDR r0,|L1.944| +0002b4 382a SUBS r0,r0,#0x2a ;861 +0002b6 e7f6 B |L1.678| + |L1.696| +0002b8 483d LDR r0,|L1.944| +0002ba 3822 SUBS r0,r0,#0x22 ;867 +0002bc 6028 STR r0,[r5,#0] ;868 +0002be 2003 MOVS r0,#3 ;868 +0002c0 e008 B |L1.724| + |L1.706| +0002c2 483b LDR r0,|L1.944| +0002c4 381f SUBS r0,r0,#0x1f ;873 +0002c6 6028 STR r0,[r5,#0] ;874 +0002c8 200b MOVS r0,#0xb ;874 +0002ca e003 B |L1.724| |L1.716| -0002cc 7840 LDRB r0,[r0,#1] ;906 ; SAMSUNG_s21u -0002ce 2800 CMP r0,#0 ;906 -0002d0 d004 BEQ |L1.732| -0002d2 2801 CMP r0,#1 ;911 -0002d4 d1ac BNE |L1.560| -0002d6 482f LDR r0,|L1.916| -0002d8 3014 ADDS r0,r0,#0x14 ;913 -0002da e7d4 B |L1.646| +0002cc 4838 LDR r0,|L1.944| +0002ce 3812 SUBS r0,r0,#0x12 ;885 +0002d0 6028 STR r0,[r5,#0] ;886 +0002d2 200a MOVS r0,#0xa ;886 + |L1.724| +0002d4 6020 STR r0,[r4,#0] ;886 + |L1.726| +0002d6 e72b B |L1.304| + |L1.728| +0002d8 2102 MOVS r1,#2 ;891 +0002da e751 B |L1.384| |L1.732| -0002dc 482d LDR r0,|L1.916| -0002de 3808 SUBS r0,r0,#8 ;908 -0002e0 6028 STR r0,[r5,#0] ;909 -0002e2 201c MOVS r0,#0x1c ;909 -0002e4 e7ee B |L1.708| - |L1.742| -0002e6 9a02 LDR r2,[sp,#8] ;921 -0002e8 2a01 CMP r2,#1 ;921 -0002ea d009 BEQ |L1.768| -0002ec 2a03 CMP r2,#3 ;943 -0002ee d19f BNE |L1.560| -0002f0 7879 LDRB r1,[r7,#1] ;945 -0002f2 29f0 CMP r1,#0xf0 ;945 -0002f4 d19c BNE |L1.560| -0002f6 78b9 LDRB r1,[r7,#2] ;945 -0002f8 2900 CMP r1,#0 ;945 -0002fa d199 BNE |L1.560| - |L1.764| -0002fc 7086 STRB r6,[r0,#2] ;947 -0002fe e6f5 B |L1.236| - |L1.768| -000300 7882 LDRB r2,[r0,#2] ;923 ; SAMSUNG_s21u -000302 2a00 CMP r2,#0 ;923 -000304 d004 BEQ |L1.784| -000306 2a01 CMP r2,#1 ;929 -000308 d009 BEQ |L1.798| -00030a 4822 LDR r0,|L1.916| -00030c 3022 ADDS r0,r0,#0x22 ;937 -00030e e728 B |L1.354| +0002dc 7840 LDRB r0,[r0,#1] ;906 ; SAMSUNG_s21u +0002de 2800 CMP r0,#0 ;906 +0002e0 d004 BEQ |L1.748| +0002e2 2801 CMP r0,#1 ;911 +0002e4 d1aa BNE |L1.572| +0002e6 4832 LDR r0,|L1.944| +0002e8 3014 ADDS r0,r0,#0x14 ;913 +0002ea e7d4 B |L1.662| + |L1.748| +0002ec 4830 LDR r0,|L1.944| +0002ee 3808 SUBS r0,r0,#8 ;908 +0002f0 6028 STR r0,[r5,#0] ;909 +0002f2 201c MOVS r0,#0x1c ;909 +0002f4 e7ee B |L1.724| + |L1.758| +0002f6 2f01 CMP r7,#1 ;921 +0002f8 d00a BEQ |L1.784| +0002fa 2f03 CMP r7,#3 ;943 +0002fc d19e BNE |L1.572| +0002fe 7871 LDRB r1,[r6,#1] ;945 +000300 29f0 CMP r1,#0xf0 ;945 +000302 d19b BNE |L1.572| +000304 78b1 LDRB r1,[r6,#2] ;945 +000306 2900 CMP r1,#0 ;945 +000308 d198 BNE |L1.572| + |L1.778| +00030a 2102 MOVS r1,#2 ;947 + |L1.780| +00030c 7081 STRB r1,[r0,#2] ;819 +00030e e70f B |L1.304| |L1.784| -000310 4a20 LDR r2,|L1.916| -000312 3218 ADDS r2,r2,#0x18 ;925 -000314 602a STR r2,[r5,#0] ;926 -000316 2206 MOVS r2,#6 ;926 -000318 6022 STR r2,[r4,#0] ;926 - |L1.794| -00031a 7081 STRB r1,[r0,#2] ;819 -00031c e6e6 B |L1.236| +000310 7882 LDRB r2,[r0,#2] ;923 ; SAMSUNG_s21u +000312 2a00 CMP r2,#0 ;923 +000314 d006 BEQ |L1.804| +000316 2a01 CMP r2,#1 ;929 +000318 d00a BEQ |L1.816| +00031a 4825 LDR r0,|L1.944| +00031c 3022 ADDS r0,r0,#0x22 ;937 |L1.798| -00031e 491d LDR r1,|L1.916| -000320 311e ADDS r1,r1,#0x1e ;931 -000322 6029 STR r1,[r5,#0] ;932 -000324 2104 MOVS r1,#4 ;932 -000326 6021 STR r1,[r4,#0] ;933 -000328 e7e8 B |L1.764| - |L1.810| -00032a 9902 LDR r1,[sp,#8] ;959 -00032c 2902 CMP r1,#2 ;959 -00032e d1ac BNE |L1.650| -000330 7879 LDRB r1,[r7,#1] ;961 -000332 2901 CMP r1,#1 ;961 -000334 d005 BEQ |L1.834| -000336 2902 CMP r1,#2 ;963 -000338 d001 BEQ |L1.830| -00033a 2903 CMP r1,#3 ;963 -00033c d1a5 BNE |L1.650| - |L1.830| -00033e 2106 MOVS r1,#6 ;964 -000340 e727 B |L1.402| - |L1.834| -000342 7003 STRB r3,[r0,#0] ;962 -000344 e6d2 B |L1.236| - |L1.838| -000346 4a14 LDR r2,|L1.920| -000348 7111 STRB r1,[r2,#4] ;977 -00034a 9a02 LDR r2,[sp,#8] ;978 -00034c 2a02 CMP r2,#2 ;978 -00034e d006 BEQ |L1.862| -000350 7918 LDRB r0,[r3,#4] ;996 ; SAMSUNG_s21u -000352 2800 CMP r0,#0 ;996 -000354 4811 LDR r0,|L1.924| -000356 d014 BEQ |L1.898| -000358 30ff ADDS r0,r0,#0xff ;996 -00035a 30b7 ADDS r0,r0,#0xb7 ;996 -00035c e793 B |L1.646| - |L1.862| -00035e 787a LDRB r2,[r7,#1] ;980 -000360 2a00 CMP r2,#0 ;980 -000362 d00a BEQ |L1.890| -000364 2a01 CMP r2,#1 ;986 -000366 d190 BNE |L1.650| -000368 4a0b LDR r2,|L1.920| -00036a 210f MOVS r1,#0xf ;989 -00036c 7156 STRB r6,[r2,#5] ;988 - |L1.878| -00036e 7001 STRB r1,[r0,#0] ;983 -000370 2100 MOVS r1,#0 ;984 -000372 7810 LDRB r0,[r2,#0] ;984 ; g_phone_output_int_pad - |L1.884| -000374 f7fffffe BL hal_gpio_set_output_data -000378 e6b8 B |L1.236| - |L1.890| -00037a 4a07 LDR r2,|L1.920| -00037c 7151 STRB r1,[r2,#5] ;982 -00037e 2100 MOVS r1,#0 ;983 -000380 e7f5 B |L1.878| - |L1.898| -000382 30ff ADDS r0,r0,#0xff ;984 -000384 30b6 ADDS r0,r0,#0xb6 ;984 -000386 e77e B |L1.646| +00031e 6028 STR r0,[r5,#0] ;938 +000320 2002 MOVS r0,#2 ;938 +000322 e7d7 B |L1.724| + |L1.804| +000324 4a22 LDR r2,|L1.944| +000326 3218 ADDS r2,r2,#0x18 ;925 +000328 602a STR r2,[r5,#0] ;926 +00032a 2206 MOVS r2,#6 ;926 +00032c 6022 STR r2,[r4,#0] ;927 +00032e e7ed B |L1.780| + |L1.816| +000330 491f LDR r1,|L1.944| +000332 311e ADDS r1,r1,#0x1e ;931 +000334 6029 STR r1,[r5,#0] ;932 +000336 2104 MOVS r1,#4 ;932 +000338 6021 STR r1,[r4,#0] ;933 +00033a e7e6 B |L1.778| + |L1.828| +00033c 2f02 CMP r7,#2 ;959 +00033e d1ac BNE |L1.666| +000340 7871 LDRB r1,[r6,#1] ;961 +000342 2901 CMP r1,#1 ;961 +000344 d005 BEQ |L1.850| +000346 2902 CMP r1,#2 ;963 +000348 d001 BEQ |L1.846| +00034a 2903 CMP r1,#3 ;963 +00034c d1a5 BNE |L1.666| + |L1.846| +00034e 2106 MOVS r1,#6 ;964 +000350 e716 B |L1.384| + |L1.850| +000352 7003 STRB r3,[r0,#0] ;962 +000354 e6ec B |L1.304| + |L1.854| +000356 2300 MOVS r3,#0 ;976 +000358 4a16 LDR r2,|L1.948| +00035a 2f02 CMP r7,#2 ;978 +00035c 70d3 STRB r3,[r2,#3] ;976 +00035e 7111 STRB r1,[r2,#4] ;977 +000360 d007 BEQ |L1.882| +000362 4660 MOV r0,r12 ;978 +000364 7900 LDRB r0,[r0,#4] ;996 ; SAMSUNG_s21u +000366 2800 CMP r0,#0 ;996 +000368 4813 LDR r0,|L1.952| +00036a d013 BEQ |L1.916| +00036c 30ff ADDS r0,r0,#0xff ;996 +00036e 30b7 ADDS r0,r0,#0xb7 ;996 +000370 e791 B |L1.662| + |L1.882| +000372 7874 LDRB r4,[r6,#1] ;980 +000374 2c00 CMP r4,#0 ;980 +000376 d00a BEQ |L1.910| +000378 2c01 CMP r4,#1 ;986 +00037a d18e BNE |L1.666| +00037c 2102 MOVS r1,#2 ;988 +00037e 7151 STRB r1,[r2,#5] ;988 +000380 210f MOVS r1,#0xf ;989 +000382 7001 STRB r1,[r0,#0] ;989 + |L1.900| +000384 2100 MOVS r1,#0 ;984 +000386 7810 LDRB r0,[r2,#0] ;984 ; g_phone_output_int_pad |L1.904| -000388 9802 LDR r0,[sp,#8] ;1035 -00038a 2802 CMP r0,#2 ;1035 -00038c d19b BNE |L1.710| -00038e 7119 STRB r1,[r3,#4] ;1037 -000390 e6ac B |L1.236| -;;;1046 +000388 f7fffffe BL hal_gpio_set_output_data +00038c e6d0 B |L1.304| + |L1.910| +00038e 7151 STRB r1,[r2,#5] ;982 +000390 7003 STRB r3,[r0,#0] ;983 +000392 e7f7 B |L1.900| + |L1.916| +000394 30ff ADDS r0,r0,#0xff ;984 +000396 30b6 ADDS r0,r0,#0xb6 ;984 +000398 e77d B |L1.662| + |L1.922| +00039a 2f01 CMP r7,#1 ;1019 +00039c d99b BLS |L1.726| +00039e 7871 LDRB r1,[r6,#1] ;1021 +0003a0 29a3 CMP r1,#0xa3 ;1021 +0003a2 d198 BNE |L1.726| +0003a4 78b1 LDRB r1,[r6,#2] ;1021 +0003a6 2940 CMP r1,#0x40 ;1021 +0003a8 d195 BNE |L1.726| + |L1.938| +0003aa 2104 MOVS r1,#4 ;1025 +0003ac e6e8 B |L1.384| +;;;1054 ENDP -000392 0000 DCW 0x0000 - |L1.916| +0003ae 0000 DCW 0x0000 + |L1.944| DCD ||area_number.45||+0x1a9 - |L1.920| + |L1.948| DCD ||area_number.45|| - |L1.924| + |L1.952| DCD ||area_number.45||+0x9 AREA ||i.app_tp_screen_analysis_const||, CODE, READONLY, ALIGN=1 diff --git a/project/ISP_568/Objects/CVWL568_S21U_20230921.bin b/project/ISP_568/Objects/CVWL568_S21U_20230921.bin new file mode 100644 index 0000000..3be605a Binary files /dev/null and b/project/ISP_568/Objects/CVWL568_S21U_20230921.bin differ diff --git a/src/app/demo/ap_demo.c b/src/app/demo/ap_demo.c index 8cd908a..4c158c1 100644 --- a/src/app/demo/ap_demo.c +++ b/src/app/demo/ap_demo.c @@ -1156,6 +1156,10 @@ static bool ap_dcs_read(uint8_t data_type, uint8_t dcs_cmd, uint8_t param) //TAU_LOGD("r[%x] [%d] err!!!!!!\n", dcs_cmd, return_size); } } + else if (dcs_cmd == 0x01) + { + ap_get_tp_calibration_status_01(g_rx_ctrl_handle,param); + } else { uint32_t return_size = hal_dsi_rx_ctrl_get_max_ret_size(g_rx_ctrl_handle); @@ -2143,15 +2147,16 @@ static bool ap_set_hbm_53(hal_dsi_rx_ctrl_handle_t* handler, hal_dcs_packet_t* d g_tp_sleep_in = true; // hal_dsi_tx_ctrl_write_cmd(0x39, 0, 3, 0x51, 0x01, 0x80); } - else - { - g_tp_sleep_in = false; - } +// else +// { +// g_tp_sleep_in = false; +// } // TAU_LOGD("53:[%2x]", dcs_packet->packet_param[0]); return true; } + /* ƻDCS command */ static const hal_dcs_execute_entry_t g_cus_rx_dcs_execute_table[] = { @@ -3920,7 +3925,7 @@ void pps_updata_exec(void) { if( true == s_pps_updata_allpixeloff_flag) // PPS ???? { - if( hal_system_get_tick() - BaseTime > 50 ) + if( hal_system_get_tick() - BaseTime > 80 ) { hal_dsi_tx_ctrl_write_cmd(0x05, 0, 1, 0x13); s_pps_updata_allpixeloff_flag = false; diff --git a/src/app/demo/ap_demo_version.txt b/src/app/demo/ap_demo_version.txt index 797274c..abc4b0a 100644 --- a/src/app/demo/ap_demo_version.txt +++ b/src/app/demo/ap_demo_version.txt @@ -1,4 +1,12 @@ //////////////////////////////////////////////////////////////////////// +//////////////////////////////////////////////////////////////////////// + + ISP568_S21U_NT37701AH_TM678_20230921 + + 1、使用触摸判断进入AOD状态，解决不进主界面直接进入AOD，双击无法进主界面问题 + 2、 + + //////////////////////////////////////////////////////////////////////// ISP568_S21U_NT37701AH_TM678_20230918 diff --git a/src/app/demo/app_tp_for_custom_s21u.c b/src/app/demo/app_tp_for_custom_s21u.c index e1a99a8..e705c15 100644 --- a/src/app/demo/app_tp_for_custom_s21u.c +++ b/src/app/demo/app_tp_for_custom_s21u.c @@ -973,7 +973,7 @@ void app_tp_phone_analysis_data(uint8_t *rxbuffer, size_t rxbuffer_size, const u // break; case 0xE4: { -// g_tp_sleep_in = false; // 退出息屏状态 + g_tp_sleep_in = false; // 退出息屏状态 g_ap_tp_init_done = true; if (rxbuffer_size == 2) { @@ -1037,6 +1037,14 @@ void app_tp_phone_analysis_data(uint8_t *rxbuffer, size_t rxbuffer_size, const u SAMSUNG_s21u.Phone_Init_Done = true; } } + break; + case 0x9B: + { + if (rxbuffer_size == 2) + { + g_tp_sleep_in = true; // 进入息屏状态 + } + } break; }