PVD_IRQn_Handler ⇒ PVD_IRQn_Handler
Function Pointers
- ADC_IRQn_Handler from irq_redirect .o(i.ADC_IRQn_Handler) referenced from startup_armcm0.o(RESET)
- AP_NRESET_IRQn_Handler from irq_redirect .o(i.AP_NRESET_IRQn_Handler) referenced from startup_armcm0.o(RESET)
- DMA_IRQn_Handler from irq_redirect .o(i.DMA_IRQn_Handler) referenced from startup_armcm0.o(RESET)
- EXTI_INT0_IRQn_Handler from irq_redirect .o(i.EXTI_INT0_IRQn_Handler) referenced from startup_armcm0.o(RESET)
- EXTI_INT1_IRQn_Handler from irq_redirect .o(i.EXTI_INT1_IRQn_Handler) referenced from startup_armcm0.o(RESET)
- EXTI_INT2_IRQn_Handler from irq_redirect .o(i.EXTI_INT2_IRQn_Handler) referenced from startup_armcm0.o(RESET)
- EXTI_INT3_IRQn_Handler from irq_redirect .o(i.EXTI_INT3_IRQn_Handler) referenced from startup_armcm0.o(RESET)
- EXTI_INT4_IRQn_Handler from irq_redirect .o(i.EXTI_INT4_IRQn_Handler) referenced from startup_armcm0.o(RESET)
- EXTI_INT5_IRQn_Handler from irq_redirect .o(i.EXTI_INT5_IRQn_Handler) referenced from startup_armcm0.o(RESET)
- EXTI_INT6_IRQn_Handler from irq_redirect .o(i.EXTI_INT6_IRQn_Handler) referenced from startup_armcm0.o(RESET)
- EXTI_INT7_IRQn_Handler from irq_redirect .o(i.EXTI_INT7_IRQn_Handler) referenced from startup_armcm0.o(RESET)
- FLSCTRL_IRQn_Handler from irq_redirect .o(i.FLSCTRL_IRQn_Handler) referenced from startup_armcm0.o(RESET)
- HardFault_Handler from irq_redirect .o(i.HardFault_Handler) referenced from startup_armcm0.o(RESET)
- I2C0_IRQn_Handler from irq_redirect .o(i.I2C0_IRQn_Handler) referenced from startup_armcm0.o(RESET)
- I2C1_IRQn_Handler from irq_redirect .o(i.I2C1_IRQn_Handler) referenced from startup_armcm0.o(RESET)
- LCDC_IRQn_Handler from irq_redirect .o(i.LCDC_IRQn_Handler) referenced from startup_armcm0.o(RESET)
- MEMC_IRQn_Handler from irq_redirect .o(i.MEMC_IRQn_Handler) referenced from startup_armcm0.o(RESET)
- MIPI_RX_IRQn_Handler from irq_redirect .o(i.MIPI_RX_IRQn_Handler) referenced from startup_armcm0.o(RESET)
- MIPI_TX_IRQn_Handler from irq_redirect .o(i.MIPI_TX_IRQn_Handler) referenced from startup_armcm0.o(RESET)
- NMI_Handler from startup_armcm0.o(.text) referenced from startup_armcm0.o(RESET)
- OTP_IRQn_Handler from startup_armcm0.o(.text) referenced from startup_armcm0.o(RESET)
- PVD_IRQn_Handler from startup_armcm0.o(.text) referenced from startup_armcm0.o(RESET)
- PWMDET_IRQn_Handler from irq_redirect .o(i.PWMDET_IRQn_Handler) referenced from startup_armcm0.o(RESET)
- PendSV_Handler from startup_armcm0.o(.text) referenced from startup_armcm0.o(RESET)
- Reset_Handler from startup_armcm0.o(.text) referenced from startup_armcm0.o(RESET)
- SPIM_IRQn_Handler from irq_redirect .o(i.SPIM_IRQn_Handler) referenced from startup_armcm0.o(RESET)
- SPIS_IRQn_Handler from irq_redirect .o(i.SPIS_IRQn_Handler) referenced from startup_armcm0.o(RESET)
- SVC_Handler from startup_armcm0.o(.text) referenced from startup_armcm0.o(RESET)
- SWIRE_IRQn_Handler from irq_redirect .o(i.SWIRE_IRQn_Handler) referenced from startup_armcm0.o(RESET)
- SysTick_Handler from irq_redirect .o(i.SysTick_Handler) referenced from startup_armcm0.o(RESET)
- TIMER0_IRQn_Handler from irq_redirect .o(i.TIMER0_IRQn_Handler) referenced from startup_armcm0.o(RESET)
- TIMER1_IRQn_Handler from irq_redirect .o(i.TIMER1_IRQn_Handler) referenced from startup_armcm0.o(RESET)
- TIMER2_IRQn_Handler from irq_redirect .o(i.TIMER2_IRQn_Handler) referenced from startup_armcm0.o(RESET)
- TIMER3_IRQn_Handler from irq_redirect .o(i.TIMER3_IRQn_Handler) referenced from startup_armcm0.o(RESET)
- UART_IRQn_Handler from irq_redirect .o(i.UART_IRQn_Handler) referenced from startup_armcm0.o(RESET)
- VIDC_IRQn_Handler from irq_redirect .o(i.VIDC_IRQn_Handler) referenced from startup_armcm0.o(RESET)
- VPRE_IRQn_Handler from irq_redirect .o(i.VPRE_IRQn_Handler) referenced from startup_armcm0.o(RESET)
- WDG_IRQn_Handler from irq_redirect .o(i.WDG_IRQn_Handler) referenced from startup_armcm0.o(RESET)
- __main from entry.o(.ARM.Collect$$$$00000000) referenced from startup_armcm0.o(.text)
- _sputc from printfa.o(i._sputc) referenced from printfa.o(i.__0vsprintf)
- ap_dcs_read from ap_demo.o(i.ap_dcs_read) referenced from ap_demo.o(i.open_mipi_rx)
- ap_get_reg_df from ap_demo.o(i.ap_get_reg_df) referenced from ap_demo.o(.constdata)
- ap_reset_cb from ap_demo.o(i.ap_reset_cb) referenced from ap_demo.o(i.ap_demo)
- ap_set_backlight_51 from ap_demo.o(i.ap_set_backlight_51) referenced from ap_demo.o(.constdata)
- ap_set_display_off from ap_demo.o(i.ap_set_display_off) referenced from ap_demo.o(.constdata)
- ap_set_display_on from ap_demo.o(i.ap_set_display_on) referenced from ap_demo.o(.constdata)
- ap_set_enter_sleep_mode from ap_demo.o(i.ap_set_enter_sleep_mode) referenced from ap_demo.o(.constdata)
- ap_set_exit_sleep_mode from ap_demo.o(i.ap_set_exit_sleep_mode) referenced from ap_demo.o(.constdata)
- ap_set_tp_calibration_04 from ap_demo.o(i.ap_set_tp_calibration_04) referenced from ap_demo.o(.constdata)
- ap_update_frame_rate from ap_demo.o(i.ap_update_frame_rate) referenced from ap_demo.o(.constdata)
- app_ADC_IRQn_Handler from drv_rxbr.o(i.app_ADC_IRQn_Handler) referenced from irq_redirect .o(i.handle_init)
- app_AP_NRESET_IRQn_Handler from drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) referenced from irq_redirect .o(i.handle_init)
- app_EXTI_INT0_IRQn_Handler from drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) referenced from irq_redirect .o(i.handle_init)
- app_EXTI_INT1_IRQn_Handler from drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) referenced from irq_redirect .o(i.handle_init)
- app_EXTI_INT2_IRQn_Handler from drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) referenced from irq_redirect .o(i.handle_init)
- app_EXTI_INT3_IRQn_Handler from drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) referenced from irq_redirect .o(i.handle_init)
- app_EXTI_INT4_IRQn_Handler from drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) referenced from irq_redirect .o(i.handle_init)
- app_EXTI_INT5_IRQn_Handler from drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) referenced from irq_redirect .o(i.handle_init)
- app_EXTI_INT6_IRQn_Handler from drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) referenced from irq_redirect .o(i.handle_init)
- app_EXTI_INT7_IRQn_Handler from drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) referenced from irq_redirect .o(i.handle_init)
- app_HardFault_Handler from drv_common.o(i.app_HardFault_Handler) referenced from irq_redirect .o(i.handle_init)
- app_I2C0_IRQn_Handler from drv_i2c_slave.o(i.app_I2C0_IRQn_Handler) referenced from irq_redirect .o(i.handle_init)
- app_I2C1_IRQn_Handler from drv_i2c_master.o(i.app_I2C1_IRQn_Handler) referenced from irq_redirect .o(i.handle_init)
- app_LCDC_IRQn_Handler from hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) referenced from irq_redirect .o(i.handle_init)
- app_MEMC_IRQn_Handler from drv_memc.o(i.app_MEMC_IRQn_Handler) referenced from irq_redirect .o(i.handle_init)
- app_MIPI_RX_IRQn_Handler from drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) referenced from irq_redirect .o(i.handle_init)
- app_MIPI_TX_IRQn_Handler from drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) referenced from irq_redirect .o(i.handle_init)
- app_PWMDET_IRQn_Handler from drv_pwm.o(i.app_PWMDET_IRQn_Handler) referenced from irq_redirect .o(i.handle_init)
- app_SPIM_IRQn_Handler from drv_spi_master.o(i.app_SPIM_IRQn_Handler) referenced from irq_redirect .o(i.handle_init)
- app_SPIS_IRQn_Handler from hal_spi_slave.o(i.app_SPIS_IRQn_Handler) referenced from irq_redirect .o(i.handle_init)
- app_SWIRE_IRQn_Handler from drv_swire.o(i.app_SWIRE_IRQn_Handler) referenced from irq_redirect .o(i.handle_init)
- app_SysTick_Handler from drv_common.o(i.app_SysTick_Handler) referenced from irq_redirect .o(i.handle_init)
- app_TIMER0_IRQn_Handler from drv_timer.o(i.app_TIMER0_IRQn_Handler) referenced from irq_redirect .o(i.handle_init)
- app_TIMER1_IRQn_Handler from drv_timer.o(i.app_TIMER1_IRQn_Handler) referenced from irq_redirect .o(i.handle_init)
- app_TIMER2_IRQn_Handler from drv_timer.o(i.app_TIMER2_IRQn_Handler) referenced from irq_redirect .o(i.handle_init)
- app_TIMER3_IRQn_Handler from drv_timer.o(i.app_TIMER3_IRQn_Handler) referenced from irq_redirect .o(i.handle_init)
- app_UART_IRQn_Handler from drv_uart.o(i.app_UART_IRQn_Handler) referenced from irq_redirect .o(i.handle_init)
- app_VIDC_IRQn_Handler from drv_vidc.o(i.app_VIDC_IRQn_Handler) referenced from irq_redirect .o(i.handle_init)
- app_VPRE_IRQn_Handler from drv_rxbr.o(i.app_VPRE_IRQn_Handler) referenced from irq_redirect .o(i.handle_init)
- app_WDG_IRQn_Handler from drv_wdg.o(i.app_WDG_IRQn_Handler) referenced from irq_redirect .o(i.handle_init)
- app_dma_irq_handler from drv_dma.o(i.app_dma_irq_handler) referenced from irq_redirect .o(i.handle_init)
- app_fls_ctrl_Handler from norflash.o(i.app_fls_ctrl_Handler) referenced from irq_redirect .o(i.handle_init)
- app_tp_i2cs_callback from app_tp_transfer.o(i.app_tp_i2cs_callback) referenced from app_tp_transfer.o(i.app_tp_I2C_init)
- app_tp_screen_int_callback from app_tp_transfer.o(i.app_tp_screen_int_callback) referenced from app_tp_transfer.o(i.S20_Start_init)
- drv_i2c_dma_callback from drv_i2c_dma.o(i.drv_i2c_dma_callback) referenced from drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback)
- fputc from tau_log.o(i.fputc) referenced from printfa.o(i.__0printf)
- hal_i2c_master_irq_callback from hal_i2c_master.o(i.hal_i2c_master_irq_callback) referenced from hal_i2c_master.o(i.hal_i2c_m_dma_init)
- hal_i2c_s_dma_user_callback from hal_i2c_slave.o(i.hal_i2c_s_dma_user_callback) referenced from hal_i2c_slave.o(i.hal_i2c_s_init)
- hal_i2c_slave_irq_callback from hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) referenced from hal_i2c_slave.o(i.hal_i2c_s_init)
- main from main.o(i.main) referenced from entry9a.o(.ARM.Collect$$$$0000000B)
- pps_update_handle from ap_demo.o(i.pps_update_handle) referenced from ap_demo.o(i.open_mipi_rx)
- rxbr_irq0_callback from hal_internal_vsync.o(i.rxbr_irq0_callback) referenced from hal_internal_vsync.o(i.hal_internal_vsync_init_rx)
- rxbr_irq1_callback from hal_internal_vsync.o(i.rxbr_irq1_callback) referenced from hal_internal_vsync.o(i.hal_internal_vsync_init_rx)
- soft_timer3_cb from ap_demo.o(i.soft_timer3_cb) referenced from ap_demo.o(i.ap_demo)
- soft_timer3_cb from ap_demo.o(i.soft_timer3_cb) referenced from ap_demo.o(i.soft_timer3_cb)
- vidc_callback from hal_internal_vsync.o(i.vidc_callback) referenced from hal_internal_vsync.o(i.hal_internal_vsync_init_rx)
Global Symbols
__main (Thumb, 0 bytes, Stack size unknown bytes, entry.o(.ARM.Collect$$$$00000000))
[Address Reference Count : 1]
_main_stk (Thumb, 0 bytes, Stack size unknown bytes, entry2.o(.ARM.Collect$$$$00000001))
_main_scatterload (Thumb, 0 bytes, Stack size unknown bytes, entry5.o(.ARM.Collect$$$$00000004))
[Calls]
__main_after_scatterload (Thumb, 0 bytes, Stack size unknown bytes, entry5.o(.ARM.Collect$$$$00000004))
[Called By]
_main_clock (Thumb, 0 bytes, Stack size unknown bytes, entry7b.o(.ARM.Collect$$$$00000008))
_main_cpp_init (Thumb, 0 bytes, Stack size unknown bytes, entry8b.o(.ARM.Collect$$$$0000000A))
_main_init (Thumb, 0 bytes, Stack size unknown bytes, entry9a.o(.ARM.Collect$$$$0000000B))
__rt_final_cpp (Thumb, 0 bytes, Stack size unknown bytes, entry10a.o(.ARM.Collect$$$$0000000D))
__rt_final_exit (Thumb, 0 bytes, Stack size unknown bytes, entry11a.o(.ARM.Collect$$$$0000000F))
Reset_Handler (Thumb, 28 bytes, Stack size 0 bytes, startup_armcm0.o(.text))
[Address Reference Count : 1]
NMI_Handler (Thumb, 2 bytes, Stack size 0 bytes, startup_armcm0.o(.text))
[Calls]
[Called By]
[Address Reference Count : 1]
SVC_Handler (Thumb, 2 bytes, Stack size 0 bytes, startup_armcm0.o(.text))
[Calls]
[Called By]
[Address Reference Count : 1]
PendSV_Handler (Thumb, 2 bytes, Stack size 0 bytes, startup_armcm0.o(.text))
[Calls]
[Called By]
[Address Reference Count : 1]
OTP_IRQn_Handler (Thumb, 2 bytes, Stack size 0 bytes, startup_armcm0.o(.text))
[Calls]
[Called By]
[Address Reference Count : 1]
PVD_IRQn_Handler (Thumb, 2 bytes, Stack size 0 bytes, startup_armcm0.o(.text))
[Calls]
[Called By]
[Address Reference Count : 1]
__aeabi_uidiv (Thumb, 0 bytes, Stack size 12 bytes, uidiv.o(.text), UNUSED)
__aeabi_uidivmod (Thumb, 44 bytes, Stack size 12 bytes, uidiv.o(.text))
[Stack]
- Max Depth = 12
- Call Chain = __aeabi_uidivmod
[Called By]- >> hal_dsi_tx_count_lane_rate
- >> hal_internal_vsync_set_tear_mode
- >> hal_internal_vsync_set_sync_line
- >> drv_dsi_rx_set_up_phy
- >> hal_dsi_rx_ctrl_init_vidc
- >> hal_dsi_rx_ctrl_init_dsi_rx
- >> app_tp_screen_analysis_int
- >> hal_timer_start
- >> hal_dsi_rx_ctrl_set_cus_esc_clk
- >> hal_dsi_rx_ctrl_init
- >> drv_common_enable_systick
- >> drv_i2c_master_init
- >> drv_phy_get_rate_para
- >> drv_dsi_tx_phy_test_setup
- >> hal_lcdc_config_upscaler
- >> vsync_set_te_mode
- >> rx_receive_pps
- >> rx_partial_update
- >> UART_SetBaudRate
- >> _printf_core
- >> __aeabi_idivmod
__aeabi_idiv (Thumb, 0 bytes, Stack size 16 bytes, idiv.o(.text), UNUSED)
__aeabi_idivmod (Thumb, 40 bytes, Stack size 16 bytes, idiv.o(.text))
[Stack]
- Max Depth = 28
- Call Chain = __aeabi_idivmod ⇒ __aeabi_uidivmod
[Calls]
[Called By]- >> hal_dsi_tx_count_lane_rate
- >> hal_dsi_tx_calc_video_chunks
- >> hal_lcdc_init_clk
__aeabi_memcpy (Thumb, 36 bytes, Stack size 0 bytes, memcpya.o(.text), UNUSED)
__aeabi_memcpy4 (Thumb, 0 bytes, Stack size 0 bytes, memcpya.o(.text))
[Called By]
- >> hal_dsi_tx_calc_video_chunks
- >> hal_internal_vsync_init_rx
- >> hal_internal_sync_get_fb_setting
- >> hal_dsi_rx_ctrl_init_vidc
- >> open_mipi_rx
- >> ap_get_reg_df
- >> hal_internal_vsync_init_tx
- >> drv_param_init_set_ccm
- >> hal_lcdc_init_clk
__aeabi_memcpy8 (Thumb, 0 bytes, Stack size 0 bytes, memcpya.o(.text), UNUSED)
__aeabi_memset (Thumb, 14 bytes, Stack size 0 bytes, memseta.o(.text), UNUSED)
[Called By]
- >> _memset$wrapper
- >> __aeabi_memclr
__aeabi_memset4 (Thumb, 0 bytes, Stack size 0 bytes, memseta.o(.text), UNUSED)
__aeabi_memset8 (Thumb, 0 bytes, Stack size 0 bytes, memseta.o(.text), UNUSED)
__aeabi_memclr (Thumb, 4 bytes, Stack size 0 bytes, memseta.o(.text), UNUSED)
[Calls]
__aeabi_memclr4 (Thumb, 0 bytes, Stack size 0 bytes, memseta.o(.text))
[Called By]
- >> hal_dsi_tx_calc_video_chunks
- >> hal_dsi_tx_ctrl_init
- >> hal_dsi_tx_ctrl_create_handle
- >> hal_dsi_rx_ctrl_create_handle
- >> hal_uart_init
- >> hal_lcdc_init_clk
- >> hal_internal_vsync_deinit
- >> rx_receive_pps
__aeabi_memclr8 (Thumb, 0 bytes, Stack size 0 bytes, memseta.o(.text), UNUSED)
_memset$wrapper (Thumb, 18 bytes, Stack size 8 bytes, memseta.o(.text), UNUSED)
[Calls]
__aeabi_fadd (Thumb, 162 bytes, Stack size 24 bytes, fadd.o(.text))
[Stack]
- Max Depth = 36
- Call Chain = __aeabi_fadd ⇒ _float_epilogue
[Calls]- >> _float_round
- >> _float_epilogue
[Called By]- >> hal_dsi_tx_count_lane_rate
- >> hal_dsi_tx_config_params_for_lane_rate
- >> hal_dsi_tx_calc_video_chunks
- >> drv_dsi_rx_calc_ipi_tx_delay
- >> __aeabi_fsub
- >> __aeabi_frsub
__aeabi_fsub (Thumb, 8 bytes, Stack size 0 bytes, fadd.o(.text))
[Stack]
- Max Depth = 36
- Call Chain = __aeabi_fsub ⇒ __aeabi_fadd ⇒ _float_epilogue
[Calls]
[Called By]- >> hal_dsi_tx_count_lane_rate
- >> hal_dsi_tx_calc_video_chunks
- >> drv_dsi_rx_calc_ipi_tx_delay
__aeabi_frsub (Thumb, 8 bytes, Stack size 0 bytes, fadd.o(.text), UNUSED)
[Calls]
__aeabi_fmul (Thumb, 122 bytes, Stack size 16 bytes, fmul.o(.text))
[Stack]
- Max Depth = 16
- Call Chain = __aeabi_fmul
[Called By]- >> hal_dsi_tx_count_lane_rate
- >> hal_dsi_tx_calc_video_chunks
- >> drv_dsi_rx_calc_ipi_tx_delay
- >> hal_lcdc_init_clk
__aeabi_fdiv (Thumb, 124 bytes, Stack size 16 bytes, fdiv.o(.text))
[Stack]
- Max Depth = 16
- Call Chain = __aeabi_fdiv
[Calls]
[Called By]- >> hal_dsi_tx_count_lane_rate
- >> hal_dsi_tx_calc_video_chunks
- >> drv_dsi_rx_calc_ipi_tx_delay
- >> hal_lcdc_init_clk
__ARM_scalbnf (Thumb, 24 bytes, Stack size 0 bytes, fscalb.o(.text))
[Called By]
- >> hal_dsi_tx_calc_video_chunks
scalbnf (Thumb, 0 bytes, Stack size 0 bytes, fscalb.o(.text), UNUSED)
__aeabi_dadd (Thumb, 328 bytes, Stack size 48 bytes, dadd.o(.text))
[Stack]
- Max Depth = 104
- Call Chain = __aeabi_dadd ⇒ _double_epilogue ⇒ __aeabi_llsr
[Calls]- >> __aeabi_lasr
- >> __aeabi_llsl
- >> _double_round
- >> _double_epilogue
[Called By]- >> drv_dsi_rx_calc_ipi_tx_delay
- >> hal_dsi_rx_ctrl_init_vidc
- >> hal_lcdc_config_upscaler
- >> __aeabi_dsub
- >> _fp_digits
- >> __aeabi_drsub
- >> ceil
__aeabi_dsub (Thumb, 12 bytes, Stack size 8 bytes, dadd.o(.text), UNUSED)
[Calls]
__aeabi_drsub (Thumb, 12 bytes, Stack size 8 bytes, dadd.o(.text))
[Stack]
- Max Depth = 112
- Call Chain = __aeabi_drsub ⇒ __aeabi_dadd ⇒ _double_epilogue ⇒ __aeabi_llsr
[Calls]
[Called By]
__aeabi_dmul (Thumb, 202 bytes, Stack size 72 bytes, dmul.o(.text))
[Stack]
- Max Depth = 128
- Call Chain = __aeabi_dmul ⇒ _double_epilogue ⇒ __aeabi_llsr
[Calls]
[Called By]- >> calc_framebuffer_setting
- >> _fp_digits
__aeabi_ddiv (Thumb, 234 bytes, Stack size 40 bytes, ddiv.o(.text))
[Stack]
- Max Depth = 48
- Call Chain = __aeabi_ddiv ⇒ _double_round
[Calls]
[Called By]- >> calc_framebuffer_setting
- >> _fp_digits
__aeabi_i2f (Thumb, 22 bytes, Stack size 8 bytes, fflti.o(.text))
[Stack]
- Max Depth = 20
- Call Chain = __aeabi_i2f ⇒ _float_epilogue
[Calls]
[Called By]- >> hal_dsi_tx_calc_video_chunks
__aeabi_ui2f (Thumb, 14 bytes, Stack size 8 bytes, ffltui.o(.text))
[Stack]
- Max Depth = 20
- Call Chain = __aeabi_ui2f ⇒ _float_epilogue
[Calls]
[Called By]- >> hal_dsi_tx_count_lane_rate
- >> hal_dsi_tx_calc_video_chunks
- >> drv_dsi_rx_calc_ipi_tx_delay
- >> hal_lcdc_init_clk
__aeabi_ui2d (Thumb, 24 bytes, Stack size 16 bytes, dfltui.o(.text))
[Stack]
- Max Depth = 72
- Call Chain = __aeabi_ui2d ⇒ _double_epilogue ⇒ __aeabi_llsr
[Calls]
[Called By]- >> hal_dsi_tx_count_lane_rate
- >> hal_dsi_rx_ctrl_init_vidc
- >> hal_lcdc_config_upscaler
- >> calc_framebuffer_setting
__aeabi_f2iz (Thumb, 50 bytes, Stack size 0 bytes, ffixi.o(.text))
[Called By]
- >> hal_dsi_tx_calc_video_chunks
- >> hal_lcdc_init_clk
__aeabi_f2uiz (Thumb, 40 bytes, Stack size 0 bytes, ffixui.o(.text))
[Called By]
- >> hal_dsi_tx_count_lane_rate
__aeabi_d2iz (Thumb, 62 bytes, Stack size 16 bytes, dfixi.o(.text))
[Stack]
- Max Depth = 24
- Call Chain = __aeabi_d2iz ⇒ __aeabi_llsr
[Calls]
[Called By]- >> hal_dsi_tx_count_lane_rate
- >> hal_dsi_tx_calc_video_chunks
__aeabi_d2uiz (Thumb, 50 bytes, Stack size 8 bytes, dfixui.o(.text))
[Stack]
- Max Depth = 16
- Call Chain = __aeabi_d2uiz ⇒ __aeabi_llsr
[Calls]
[Called By]- >> hal_dsi_tx_count_lane_rate
- >> drv_dsi_rx_calc_ipi_tx_delay
- >> hal_dsi_rx_ctrl_init_vidc
- >> hal_lcdc_init_clk
- >> hal_lcdc_config_upscaler
- >> calc_framebuffer_setting
__aeabi_f2d (Thumb, 40 bytes, Stack size 0 bytes, f2d.o(.text))
[Called By]
- >> hal_dsi_tx_count_lane_rate
- >> hal_dsi_tx_calc_video_chunks
- >> drv_dsi_rx_calc_ipi_tx_delay
- >> hal_lcdc_init_clk
__aeabi_cdcmpeq (Thumb, 0 bytes, Stack size 0 bytes, cdcmple.o(.text), UNUSED)
__aeabi_cdcmple (Thumb, 38 bytes, Stack size 0 bytes, cdcmple.o(.text))
[Called By]
- >> calc_framebuffer_setting
__aeabi_cfrcmple (Thumb, 20 bytes, Stack size 0 bytes, cfrcmple.o(.text))
[Called By]
- >> drv_dsi_rx_calc_ipi_tx_delay
- >> hal_lcdc_init_clk
__aeabi_uldivmod (Thumb, 96 bytes, Stack size 48 bytes, uldiv.o(.text), UNUSED)
[Calls]
- >> __aeabi_llsr
- >> __aeabi_llsl
[Called By]- >> _printf_core
- >> _fp_digits
__aeabi_llsl (Thumb, 32 bytes, Stack size 8 bytes, llshl.o(.text))
[Stack]
- Max Depth = 8
- Call Chain = __aeabi_llsl
[Called By]- >> __aeabi_dadd
- >> __aeabi_uldivmod
- >> _double_epilogue
- >> __aeabi_d2ulz
_ll_shift_l (Thumb, 0 bytes, Stack size 8 bytes, llshl.o(.text), UNUSED)
__aeabi_llsr (Thumb, 34 bytes, Stack size 8 bytes, llushr.o(.text))
[Stack]
- Max Depth = 8
- Call Chain = __aeabi_llsr
[Called By]- >> __aeabi_d2uiz
- >> __aeabi_d2iz
- >> __aeabi_uldivmod
- >> _double_epilogue
- >> __aeabi_d2ulz
- >> _dsqrt
_ll_ushift_r (Thumb, 0 bytes, Stack size 8 bytes, llushr.o(.text), UNUSED)
__aeabi_lasr (Thumb, 38 bytes, Stack size 8 bytes, llsshr.o(.text))
[Stack]
- Max Depth = 8
- Call Chain = __aeabi_lasr
[Called By]
_ll_sshift_r (Thumb, 0 bytes, Stack size 8 bytes, llsshr.o(.text), UNUSED)
__I$use$fp (Thumb, 0 bytes, Stack size 0 bytes, iusefp.o(.text), UNUSED)
_float_round (Thumb, 16 bytes, Stack size 0 bytes, fepilogue.o(.text))
[Called By]
- >> __aeabi_fdiv
- >> __aeabi_fadd
_float_epilogue (Thumb, 114 bytes, Stack size 12 bytes, fepilogue.o(.text))
[Stack]
- Max Depth = 12
- Call Chain = _float_epilogue
[Called By]- >> __aeabi_ui2f
- >> __aeabi_i2f
- >> __aeabi_fadd
_double_round (Thumb, 26 bytes, Stack size 8 bytes, depilogue.o(.text))
[Stack]
- Max Depth = 8
- Call Chain = _double_round
[Called By]- >> __aeabi_ddiv
- >> __aeabi_dadd
- >> _double_epilogue
- >> _dsqrt
_double_epilogue (Thumb, 164 bytes, Stack size 48 bytes, depilogue.o(.text))
[Stack]
- Max Depth = 56
- Call Chain = _double_epilogue ⇒ __aeabi_llsr
[Calls]- >> __ARM_clz
- >> __aeabi_llsr
- >> __aeabi_llsl
- >> _double_round
[Called By]- >> __aeabi_ui2d
- >> __aeabi_dmul
- >> __aeabi_dadd
_dsqrt (Thumb, 162 bytes, Stack size 32 bytes, dsqrt.o(.text))
[Stack]
- Max Depth = 40
- Call Chain = _dsqrt ⇒ __aeabi_llsr
[Calls]- >> __aeabi_llsr
- >> _double_round
[Called By]
__aeabi_d2ulz (Thumb, 54 bytes, Stack size 8 bytes, dfixul.o(.text), UNUSED)
[Calls]
- >> __aeabi_llsr
- >> __aeabi_llsl
[Called By]
__aeabi_cdrcmple (Thumb, 38 bytes, Stack size 0 bytes, cdrcmple.o(.text))
[Called By]
__scatterload (Thumb, 28 bytes, Stack size 0 bytes, init.o(.text))
[Calls]
- >> __main_after_scatterload
[Called By]
__scatterload_rt2 (Thumb, 0 bytes, Stack size 0 bytes, init.o(.text), UNUSED)
__decompress (Thumb, 0 bytes, Stack size unknown bytes, __dczerorl2.o(.text), UNUSED)
__decompress1 (Thumb, 86 bytes, Stack size unknown bytes, __dczerorl2.o(.text), UNUSED)
ADC_IRQn_Handler (Thumb, 18 bytes, Stack size 0 bytes, irq_redirect .o(i.ADC_IRQn_Handler))
[Address Reference Count : 1]
AP_NRESET_IRQn_Handler (Thumb, 18 bytes, Stack size 0 bytes, irq_redirect .o(i.AP_NRESET_IRQn_Handler))
[Address Reference Count : 1]
DMA_IRQn_Handler (Thumb, 14 bytes, Stack size 0 bytes, irq_redirect .o(i.DMA_IRQn_Handler))
[Address Reference Count : 1]
EXTI_INT0_IRQn_Handler (Thumb, 22 bytes, Stack size 0 bytes, irq_redirect .o(i.EXTI_INT0_IRQn_Handler))
[Address Reference Count : 1]
EXTI_INT1_IRQn_Handler (Thumb, 22 bytes, Stack size 0 bytes, irq_redirect .o(i.EXTI_INT1_IRQn_Handler))
[Address Reference Count : 1]
EXTI_INT2_IRQn_Handler (Thumb, 22 bytes, Stack size 0 bytes, irq_redirect .o(i.EXTI_INT2_IRQn_Handler))
[Address Reference Count : 1]
EXTI_INT3_IRQn_Handler (Thumb, 22 bytes, Stack size 0 bytes, irq_redirect .o(i.EXTI_INT3_IRQn_Handler))
[Address Reference Count : 1]
EXTI_INT4_IRQn_Handler (Thumb, 22 bytes, Stack size 0 bytes, irq_redirect .o(i.EXTI_INT4_IRQn_Handler))
[Address Reference Count : 1]
EXTI_INT5_IRQn_Handler (Thumb, 22 bytes, Stack size 0 bytes, irq_redirect .o(i.EXTI_INT5_IRQn_Handler))
[Address Reference Count : 1]
EXTI_INT6_IRQn_Handler (Thumb, 22 bytes, Stack size 0 bytes, irq_redirect .o(i.EXTI_INT6_IRQn_Handler))
[Address Reference Count : 1]
EXTI_INT7_IRQn_Handler (Thumb, 22 bytes, Stack size 0 bytes, irq_redirect .o(i.EXTI_INT7_IRQn_Handler))
[Address Reference Count : 1]
FLSCTRL_IRQn_Handler (Thumb, 14 bytes, Stack size 0 bytes, irq_redirect .o(i.FLSCTRL_IRQn_Handler))
[Address Reference Count : 1]
Gpio_swire_output (Thumb, 78 bytes, Stack size 16 bytes, ap_demo.o(i.Gpio_swire_output))
[Stack]
- Max Depth = 32
- Call Chain = Gpio_swire_output ⇒ hal_gpio_init_output ⇒ hal_gpio_set_mode
[Calls]- >> hal_gpio_set_output_data
- >> hal_gpio_init_output
- >> delayUs
- >> delayMs
[Called By]- >> init_panel
- >> ap_set_enter_sleep_mode
HardFault_Handler (Thumb, 14 bytes, Stack size 0 bytes, irq_redirect .o(i.HardFault_Handler))
[Address Reference Count : 1]
I2C0_IRQn_Handler (Thumb, 18 bytes, Stack size 0 bytes, irq_redirect .o(i.I2C0_IRQn_Handler))
[Address Reference Count : 1]
I2C1_IRQn_Handler (Thumb, 18 bytes, Stack size 0 bytes, irq_redirect .o(i.I2C1_IRQn_Handler))
[Address Reference Count : 1]
LCDC_IRQn_Handler (Thumb, 18 bytes, Stack size 0 bytes, irq_redirect .o(i.LCDC_IRQn_Handler))
[Address Reference Count : 1]
LOG_printf (Thumb, 30 bytes, Stack size 24 bytes, tau_log.o(i.LOG_printf))
[Stack]
- Max Depth = 48
- Call Chain = LOG_printf ⇒ vsprintf
[Calls]
[Called By]- >> hal_dsi_tx_count_lane_rate
- >> hal_internal_vsync_set_auto_hw_filter
- >> hal_internal_sync_input_resolution_change
- >> hal_dsi_rx_ctrl_init_clk
- >> hal_dsi_rx_ctrl_send_ack_cmd
- >> app_tp_transfer_screen_int
- >> app_tp_calibration_exec
- >> pps_update_handle
- >> ap_update_frame_rate
- >> ap_set_exit_sleep_mode
- >> ap_set_enter_sleep_mode
- >> ap_set_display_on
- >> ap_set_display_off
- >> ap_reset_cb
- >> ap_dcs_read
- >> ap_demo
- >> app_MIPI_RX_IRQn_Handler
- >> app_LCDC_IRQn_Handler
- >> drv_chip_rx_info_check
- >> hal_internal_init_memc
- >> vsync_set_te_mode
- >> vidc_callback
- >> rxbr_irq1_callback
- >> rx_receive_pps
- >> rx_get_dcs_packet_data
- >> check_pkt_buf_rev
- >> calc_framebuffer_setting
- >> app_HardFault_Handler
- >> app_MIPI_TX_IRQn_Handler
MEMC_IRQn_Handler (Thumb, 18 bytes, Stack size 0 bytes, irq_redirect .o(i.MEMC_IRQn_Handler))
[Address Reference Count : 1]
MIPI_RX_IRQn_Handler (Thumb, 18 bytes, Stack size 0 bytes, irq_redirect .o(i.MIPI_RX_IRQn_Handler))
[Address Reference Count : 1]
MIPI_TX_IRQn_Handler (Thumb, 18 bytes, Stack size 0 bytes, irq_redirect .o(i.MIPI_TX_IRQn_Handler))
[Address Reference Count : 1]
PWMDET_IRQn_Handler (Thumb, 22 bytes, Stack size 0 bytes, irq_redirect .o(i.PWMDET_IRQn_Handler))
[Address Reference Count : 1]
S20_Start_init (Thumb, 300 bytes, Stack size 16 bytes, app_tp_transfer.o(i.S20_Start_init))
[Stack]
- Max Depth = 120
- Call Chain = S20_Start_init ⇒ app_tp_m_read ⇒ hal_i2c_m_dma_read ⇒ drv_i2c_master_read_dma ⇒ drv_dma_set_transfer ⇒ drv_dma_set_burst
[Calls]- >> hal_i2c_m_transfer_complate
- >> hal_gpio_set_pull_state
- >> hal_gpio_reg_eint_cb
- >> hal_gpio_init_eint
- >> hal_gpio_get_input_data
- >> hal_gpio_ctrl_eint
- >> app_tp_m_write
- >> app_tp_m_read
- >> delayMs
[Called By]- >> app_tp_transfer_screen_const
SPIM_IRQn_Handler (Thumb, 22 bytes, Stack size 0 bytes, irq_redirect .o(i.SPIM_IRQn_Handler))
[Address Reference Count : 1]
SPIS_IRQn_Handler (Thumb, 22 bytes, Stack size 0 bytes, irq_redirect .o(i.SPIS_IRQn_Handler))
[Address Reference Count : 1]
SWIRE_IRQn_Handler (Thumb, 22 bytes, Stack size 0 bytes, irq_redirect .o(i.SWIRE_IRQn_Handler))
[Address Reference Count : 1]
SysTick_Handler (Thumb, 18 bytes, Stack size 0 bytes, irq_redirect .o(i.SysTick_Handler))
[Address Reference Count : 1]
TIMER0_IRQn_Handler (Thumb, 18 bytes, Stack size 0 bytes, irq_redirect .o(i.TIMER0_IRQn_Handler))
[Address Reference Count : 1]
TIMER1_IRQn_Handler (Thumb, 18 bytes, Stack size 0 bytes, irq_redirect .o(i.TIMER1_IRQn_Handler))
[Address Reference Count : 1]
TIMER2_IRQn_Handler (Thumb, 18 bytes, Stack size 0 bytes, irq_redirect .o(i.TIMER2_IRQn_Handler))
[Address Reference Count : 1]
TIMER3_IRQn_Handler (Thumb, 18 bytes, Stack size 0 bytes, irq_redirect .o(i.TIMER3_IRQn_Handler))
[Address Reference Count : 1]
UART0_IRQ_Handle (Thumb, 20 bytes, Stack size 8 bytes, drv_uart.o(i.UART0_IRQ_Handle))
[Stack]
- Max Depth = 48
- Call Chain = UART0_IRQ_Handle ⇒ UART_TransferHandleIRQ ⇒ UART_ResetRxFIFO
[Calls]- >> drv_sys_cfg_clear_pending
- >> UART_TransferHandleIRQ
[Called By]
UART_DisableDma (Thumb, 2 bytes, Stack size 0 bytes, drv_uart.o(i.UART_DisableDma))
[Called By]
UART_GetInstance (Thumb, 4 bytes, Stack size 0 bytes, drv_uart.o(i.UART_GetInstance))
[Called By]
- >> UART_init
- >> UART_ResetRxFIFO
UART_IRQn_Handler (Thumb, 18 bytes, Stack size 0 bytes, irq_redirect .o(i.UART_IRQn_Handler))
[Address Reference Count : 1]
UART_ResetRxFIFO (Thumb, 32 bytes, Stack size 8 bytes, drv_uart.o(i.UART_ResetRxFIFO))
[Stack]
- Max Depth = 8
- Call Chain = UART_ResetRxFIFO
[Calls]
[Called By]- >> UART_TransferHandleIRQ
UART_SetBaudRate (Thumb, 72 bytes, Stack size 24 bytes, drv_uart.o(i.UART_SetBaudRate))
[Stack]
- Max Depth = 36
- Call Chain = UART_SetBaudRate ⇒ __aeabi_uidivmod
[Calls]
[Called By]
UART_SwitchSCLK (Thumb, 26 bytes, Stack size 8 bytes, drv_uart.o(i.UART_SwitchSCLK))
[Stack]
- Max Depth = 8
- Call Chain = UART_SwitchSCLK
[Calls]
[Called By]
UART_TransferHandleIRQ (Thumb, 308 bytes, Stack size 32 bytes, drv_uart.o(i.UART_TransferHandleIRQ))
[Stack]
- Max Depth = 40
- Call Chain = UART_TransferHandleIRQ ⇒ UART_ResetRxFIFO
[Calls]
[Called By]
UART_WriteBlocking (Thumb, 26 bytes, Stack size 0 bytes, drv_uart.o(i.UART_WriteBlocking))
[Called By]
- >> hal_uart_transmit_blocking
UART_init (Thumb, 182 bytes, Stack size 24 bytes, drv_uart.o(i.UART_init))
[Stack]
- Max Depth = 60
- Call Chain = UART_init ⇒ UART_SetBaudRate ⇒ __aeabi_uidivmod
[Calls]- >> drv_sys_cfg_set_int
- >> UART_SwitchSCLK
- >> UART_SetBaudRate
- >> UART_GetInstance
- >> UART_DisableDma
[Called By]
VIDC_IRQn_Handler (Thumb, 18 bytes, Stack size 0 bytes, irq_redirect .o(i.VIDC_IRQn_Handler))
[Address Reference Count : 1]
VPRE_IRQn_Handler (Thumb, 18 bytes, Stack size 0 bytes, irq_redirect .o(i.VPRE_IRQn_Handler))
[Address Reference Count : 1]
WDG_IRQn_Handler (Thumb, 18 bytes, Stack size 0 bytes, irq_redirect .o(i.WDG_IRQn_Handler))
[Address Reference Count : 1]
__0printf (Thumb, 24 bytes, Stack size 24 bytes, printfa.o(i.__0printf), UNUSED)
[Calls]
__1printf (Thumb, 0 bytes, Stack size 24 bytes, printfa.o(i.__0printf), UNUSED)
__2printf (Thumb, 0 bytes, Stack size 24 bytes, printfa.o(i.__0printf))
[Stack]
- Max Depth = 24
- Call Chain = __2printf
[Called By]- >> drv_dsc_dec_enable
- >> LOG_printf
- >> drv_chip_rx_info_check
__c89printf (Thumb, 0 bytes, Stack size 24 bytes, printfa.o(i.__0printf), UNUSED)
printf (Thumb, 0 bytes, Stack size 24 bytes, printfa.o(i.__0printf), UNUSED)
__0vsprintf (Thumb, 30 bytes, Stack size 24 bytes, printfa.o(i.__0vsprintf), UNUSED)
[Calls]
- >> _sputc
- >> _printf_core
__1vsprintf (Thumb, 0 bytes, Stack size 24 bytes, printfa.o(i.__0vsprintf), UNUSED)
__2vsprintf (Thumb, 0 bytes, Stack size 24 bytes, printfa.o(i.__0vsprintf), UNUSED)
__c89vsprintf (Thumb, 0 bytes, Stack size 24 bytes, printfa.o(i.__0vsprintf), UNUSED)
vsprintf (Thumb, 0 bytes, Stack size 24 bytes, printfa.o(i.__0vsprintf))
[Stack]
- Max Depth = 24
- Call Chain = vsprintf
[Called By]
__ARM_clz (Thumb, 46 bytes, Stack size 0 bytes, depilogue.o(i.__ARM_clz))
[Called By]
__ARM_common_switch8 (Thumb, 26 bytes, Stack size 8 bytes, hal_dsi_rx_ctrl.o(i.__ARM_common_switch8))
[Stack]
- Max Depth = 8
- Call Chain = __ARM_common_switch8
[Called By]- >> drv_rxbr_set_cmd_filter
- >> hal_dsi_rx_ctrl_init_memc
- >> drv_i2c_s_clear_it_pending_bit
- >> drv_i2c_m_clear_it_pending_bit
- >> drv_gpio_set_pull_state
- >> drv_dsi_tx_phy_status_stopstate
- >> drv_dsi_rx_get_color_bpp
- >> app_SPIS_IRQn_Handler
__scatterload_copy (Thumb, 14 bytes, Stack size unknown bytes, handlers.o(i.__scatterload_copy), UNUSED)
__scatterload_null (Thumb, 2 bytes, Stack size unknown bytes, handlers.o(i.__scatterload_null), UNUSED)
__scatterload_zeroinit (Thumb, 14 bytes, Stack size unknown bytes, handlers.o(i.__scatterload_zeroinit), UNUSED)
__set_errno (Thumb, 6 bytes, Stack size 0 bytes, errno.o(i.__set_errno))
[Called By]
ap_demo (Thumb, 292 bytes, Stack size 0 bytes, ap_demo.o(i.ap_demo))
[Stack]
- Max Depth = 432
- Call Chain = ap_demo ⇒ open_mipi_rx ⇒ hal_dsi_rx_ctrl_init ⇒ hal_internal_vsync_init_rx ⇒ calc_framebuffer_setting ⇒ __aeabi_dmul ⇒ _double_epilogue ⇒ __aeabi_llsr
[Calls]- >> hal_timer_start
- >> hal_timer_init
- >> hal_system_set_vcc
- >> hal_gpio_set_output_data
- >> hal_gpio_set_ap_reset_int
- >> hal_gpio_init_output
- >> hal_dsi_tx_ctrl_write_cmd
- >> hal_dsi_tx_ctrl_stop
- >> hal_dsi_tx_ctrl_start
- >> hal_dsi_tx_ctrl_deinit
- >> hal_dsi_rx_ctrl_stop
- >> hal_dsi_rx_ctrl_dsc_async_handler
- >> hal_dsi_rx_ctrl_deinit
- >> delayMs
- >> app_tp_transfer_screen_start
- >> app_tp_transfer_screen_int
- >> app_tp_phone_clear_reset_on
- >> app_tp_init
- >> app_tp_I2C_init
- >> LOG_printf
- >> app_tp_calibration_exec
- >> open_mipi_rx
- >> init_panel
- >> init_mipi_tx
- >> __NVIC_SetPriority
[Called By]
ap_tp_calibration (Thumb, 170 bytes, Stack size 8 bytes, app_tp_transfer.o(i.ap_tp_calibration))
[Stack]
- Max Depth = 72
- Call Chain = ap_tp_calibration ⇒ app_tp_m_write ⇒ hal_i2c_m_dma_write ⇒ drv_i2c_master_write_dma ⇒ drv_dma_set_transfer ⇒ drv_dma_set_burst
[Calls]- >> hal_i2c_m_transfer_complate
- >> app_tp_m_write
- >> delayMs
[Called By]- >> app_tp_calibration_exec
ap_tp_scan_point_init (Thumb, 24 bytes, Stack size 0 bytes, app_tp_transfer.o(i.ap_tp_scan_point_init))
[Called By]
ap_tp_simulate_finger_release_event (Thumb, 44 bytes, Stack size 16 bytes, app_tp_transfer.o(i.ap_tp_simulate_finger_release_event))
[Stack]
- Max Depth = 84
- Call Chain = ap_tp_simulate_finger_release_event ⇒ app_tp_screen_analysis_int ⇒ __aeabi_uidivmod
[Calls]- >> app_tp_screen_analysis_int
- >> delayMs
[Called By]
app_ADC_IRQn_Handler (Thumb, 22 bytes, Stack size 8 bytes, drv_rxbr.o(i.app_ADC_IRQn_Handler))
[Stack]
- Max Depth = 16
- Call Chain = app_ADC_IRQn_Handler ⇒ drv_sys_cfg_clear_pending
[Calls]- >> drv_sys_cfg_clear_pending
[Address Reference Count : 1]- irq_redirect .o(i.handle_init)
app_AP_NRESET_IRQn_Handler (Thumb, 32 bytes, Stack size 8 bytes, drv_gpio.o(i.app_AP_NRESET_IRQn_Handler))
[Stack]
- Max Depth = 20
- Call Chain = app_AP_NRESET_IRQn_Handler ⇒ drv_ap_rst_trig_edge_detect
[Calls]- >> drv_sys_cfg_clear_pending
- >> drv_ap_rst_trig_edge_detect
[Address Reference Count : 1]- irq_redirect .o(i.handle_init)
app_EXTI_INT0_IRQn_Handler (Thumb, 22 bytes, Stack size 8 bytes, drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler))
[Stack]
- Max Depth = 16
- Call Chain = app_EXTI_INT0_IRQn_Handler ⇒ drv_sys_cfg_clear_pending
[Calls]- >> drv_sys_cfg_clear_pending
[Address Reference Count : 1]- irq_redirect .o(i.handle_init)
app_EXTI_INT1_IRQn_Handler (Thumb, 22 bytes, Stack size 8 bytes, drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler))
[Stack]
- Max Depth = 16
- Call Chain = app_EXTI_INT1_IRQn_Handler ⇒ drv_sys_cfg_clear_pending
[Calls]- >> drv_sys_cfg_clear_pending
[Address Reference Count : 1]- irq_redirect .o(i.handle_init)
app_EXTI_INT2_IRQn_Handler (Thumb, 22 bytes, Stack size 8 bytes, drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler))
[Stack]
- Max Depth = 16
- Call Chain = app_EXTI_INT2_IRQn_Handler ⇒ drv_sys_cfg_clear_pending
[Calls]- >> drv_sys_cfg_clear_pending
[Address Reference Count : 1]- irq_redirect .o(i.handle_init)
app_EXTI_INT3_IRQn_Handler (Thumb, 22 bytes, Stack size 8 bytes, drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler))
[Stack]
- Max Depth = 16
- Call Chain = app_EXTI_INT3_IRQn_Handler ⇒ drv_sys_cfg_clear_pending
[Calls]- >> drv_sys_cfg_clear_pending
[Address Reference Count : 1]- irq_redirect .o(i.handle_init)
app_EXTI_INT4_IRQn_Handler (Thumb, 22 bytes, Stack size 8 bytes, drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler))
[Stack]
- Max Depth = 16
- Call Chain = app_EXTI_INT4_IRQn_Handler ⇒ drv_sys_cfg_clear_pending
[Calls]- >> drv_sys_cfg_clear_pending
[Address Reference Count : 1]- irq_redirect .o(i.handle_init)
app_EXTI_INT5_IRQn_Handler (Thumb, 22 bytes, Stack size 8 bytes, drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler))
[Stack]
- Max Depth = 16
- Call Chain = app_EXTI_INT5_IRQn_Handler ⇒ drv_sys_cfg_clear_pending
[Calls]- >> drv_sys_cfg_clear_pending
[Address Reference Count : 1]- irq_redirect .o(i.handle_init)
app_EXTI_INT6_IRQn_Handler (Thumb, 22 bytes, Stack size 8 bytes, drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler))
[Stack]
- Max Depth = 16
- Call Chain = app_EXTI_INT6_IRQn_Handler ⇒ drv_sys_cfg_clear_pending
[Calls]- >> drv_sys_cfg_clear_pending
[Address Reference Count : 1]- irq_redirect .o(i.handle_init)
app_EXTI_INT7_IRQn_Handler (Thumb, 22 bytes, Stack size 8 bytes, drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler))
[Stack]
- Max Depth = 16
- Call Chain = app_EXTI_INT7_IRQn_Handler ⇒ drv_sys_cfg_clear_pending
[Calls]- >> drv_sys_cfg_clear_pending
[Address Reference Count : 1]- irq_redirect .o(i.handle_init)
app_HardFault_Handler (Thumb, 12 bytes, Stack size 0 bytes, drv_common.o(i.app_HardFault_Handler))
[Stack]
- Max Depth = 48
- Call Chain = app_HardFault_Handler ⇒ LOG_printf ⇒ vsprintf
[Calls]
[Address Reference Count : 1]- irq_redirect .o(i.handle_init)
app_I2C0_IRQn_Handler (Thumb, 8 bytes, Stack size 0 bytes, drv_i2c_slave.o(i.app_I2C0_IRQn_Handler))
[Address Reference Count : 1]
- irq_redirect .o(i.handle_init)
app_I2C1_IRQn_Handler (Thumb, 8 bytes, Stack size 0 bytes, drv_i2c_master.o(i.app_I2C1_IRQn_Handler))
[Address Reference Count : 1]
- irq_redirect .o(i.handle_init)
app_LCDC_IRQn_Handler (Thumb, 98 bytes, Stack size 16 bytes, hal_internal_vsync.o(i.app_LCDC_IRQn_Handler))
[Stack]
- Max Depth = 64
- Call Chain = app_LCDC_IRQn_Handler ⇒ LOG_printf ⇒ vsprintf
[Calls]- >> LOG_printf
- >> drv_sys_cfg_clear_pending
- >> drv_param_init_get_ccm
- >> drv_lcdc_config_int_single
- >> drv_lcdc_config_ccm
- >> soft_gen_te
[Address Reference Count : 1]- irq_redirect .o(i.handle_init)
app_MEMC_IRQn_Handler (Thumb, 132 bytes, Stack size 8 bytes, drv_memc.o(i.app_MEMC_IRQn_Handler))
[Stack]
- Max Depth = 16
- Call Chain = app_MEMC_IRQn_Handler ⇒ drv_sys_cfg_clear_pending
[Calls]- >> drv_sys_cfg_clear_pending
- >> drv_memc_get_status
- >> drv_memc_clear_status
[Address Reference Count : 1]- irq_redirect .o(i.handle_init)
app_MIPI_RX_IRQn_Handler (Thumb, 232 bytes, Stack size 24 bytes, drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler))
[Stack]
- Max Depth = 72
- Call Chain = app_MIPI_RX_IRQn_Handler ⇒ LOG_printf ⇒ vsprintf
[Calls]- >> LOG_printf
- >> drv_sys_cfg_clear_pending
[Address Reference Count : 1]- irq_redirect .o(i.handle_init)
app_MIPI_TX_IRQn_Handler (Thumb, 56 bytes, Stack size 16 bytes, drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler))
[Stack]
- Max Depth = 64
- Call Chain = app_MIPI_TX_IRQn_Handler ⇒ LOG_printf ⇒ vsprintf
[Calls]- >> LOG_printf
- >> drv_sys_cfg_clear_pending
[Address Reference Count : 1]- irq_redirect .o(i.handle_init)
app_PWMDET_IRQn_Handler (Thumb, 62 bytes, Stack size 24 bytes, drv_pwm.o(i.app_PWMDET_IRQn_Handler))
[Stack]
- Max Depth = 32
- Call Chain = app_PWMDET_IRQn_Handler ⇒ drv_sys_cfg_clear_pending
[Calls]- >> drv_sys_cfg_clear_pending
[Address Reference Count : 1]- irq_redirect .o(i.handle_init)
app_SPIM_IRQn_Handler (Thumb, 34 bytes, Stack size 8 bytes, drv_spi_master.o(i.app_SPIM_IRQn_Handler))
[Stack]
- Max Depth = 8
- Call Chain = app_SPIM_IRQn_Handler
[Calls]- >> __NVIC_ClearPendingIRQ
[Address Reference Count : 1]- irq_redirect .o(i.handle_init)
app_SPIS_IRQn_Handler (Thumb, 500 bytes, Stack size 24 bytes, hal_spi_slave.o(i.app_SPIS_IRQn_Handler))
[Stack]
- Max Depth = 32
- Call Chain = app_SPIS_IRQn_Handler ⇒ __ARM_common_switch8
[Calls]- >> __ARM_common_switch8
- >> drv_sys_cfg_clear_pending
- >> __NVIC_SetPriority
[Address Reference Count : 1]- irq_redirect .o(i.handle_init)
app_SWIRE_IRQn_Handler (Thumb, 28 bytes, Stack size 8 bytes, drv_swire.o(i.app_SWIRE_IRQn_Handler))
[Stack]
- Max Depth = 24
- Call Chain = app_SWIRE_IRQn_Handler ⇒ drv_swire_set_int
[Calls]- >> drv_sys_cfg_clear_pending
- >> drv_swire_set_int
[Address Reference Count : 1]- irq_redirect .o(i.handle_init)
app_SysTick_Handler (Thumb, 20 bytes, Stack size 0 bytes, drv_common.o(i.app_SysTick_Handler))
[Address Reference Count : 1]
- irq_redirect .o(i.handle_init)
app_TIMER0_IRQn_Handler (Thumb, 10 bytes, Stack size 8 bytes, drv_timer.o(i.app_TIMER0_IRQn_Handler))
[Stack]
- Max Depth = 40
- Call Chain = app_TIMER0_IRQn_Handler ⇒ drv_timer_handle_interrupt ⇒ drv_timer_set_int
[Calls]- >> drv_timer_handle_interrupt
[Address Reference Count : 1]- irq_redirect .o(i.handle_init)
app_TIMER1_IRQn_Handler (Thumb, 10 bytes, Stack size 8 bytes, drv_timer.o(i.app_TIMER1_IRQn_Handler))
[Stack]
- Max Depth = 40
- Call Chain = app_TIMER1_IRQn_Handler ⇒ drv_timer_handle_interrupt ⇒ drv_timer_set_int
[Calls]- >> drv_timer_handle_interrupt
[Address Reference Count : 1]- irq_redirect .o(i.handle_init)
app_TIMER2_IRQn_Handler (Thumb, 10 bytes, Stack size 8 bytes, drv_timer.o(i.app_TIMER2_IRQn_Handler))
[Stack]
- Max Depth = 40
- Call Chain = app_TIMER2_IRQn_Handler ⇒ drv_timer_handle_interrupt ⇒ drv_timer_set_int
[Calls]- >> drv_timer_handle_interrupt
[Address Reference Count : 1]- irq_redirect .o(i.handle_init)
app_TIMER3_IRQn_Handler (Thumb, 10 bytes, Stack size 8 bytes, drv_timer.o(i.app_TIMER3_IRQn_Handler))
[Stack]
- Max Depth = 40
- Call Chain = app_TIMER3_IRQn_Handler ⇒ drv_timer_handle_interrupt ⇒ drv_timer_set_int
[Calls]- >> drv_timer_handle_interrupt
[Address Reference Count : 1]- irq_redirect .o(i.handle_init)
app_UART_IRQn_Handler (Thumb, 8 bytes, Stack size 8 bytes, drv_uart.o(i.app_UART_IRQn_Handler))
[Stack]
- Max Depth = 56
- Call Chain = app_UART_IRQn_Handler ⇒ UART0_IRQ_Handle ⇒ UART_TransferHandleIRQ ⇒ UART_ResetRxFIFO
[Calls]
[Address Reference Count : 1]- irq_redirect .o(i.handle_init)
app_VIDC_IRQn_Handler (Thumb, 22 bytes, Stack size 8 bytes, drv_vidc.o(i.app_VIDC_IRQn_Handler))
[Stack]
- Max Depth = 16
- Call Chain = app_VIDC_IRQn_Handler ⇒ drv_sys_cfg_clear_pending
[Calls]- >> drv_sys_cfg_clear_pending
[Address Reference Count : 1]- irq_redirect .o(i.handle_init)
app_VPRE_IRQn_Handler (Thumb, 22 bytes, Stack size 8 bytes, drv_rxbr.o(i.app_VPRE_IRQn_Handler))
[Stack]
- Max Depth = 16
- Call Chain = app_VPRE_IRQn_Handler ⇒ drv_sys_cfg_clear_pending
[Calls]- >> drv_sys_cfg_clear_pending
[Address Reference Count : 1]- irq_redirect .o(i.handle_init)
app_WDG_IRQn_Handler (Thumb, 52 bytes, Stack size 8 bytes, drv_wdg.o(i.app_WDG_IRQn_Handler))
[Stack]
- Max Depth = 16
- Call Chain = app_WDG_IRQn_Handler ⇒ drv_sys_cfg_clear_pending
[Calls]- >> drv_sys_cfg_clear_pending
- >> drv_wdg_set_int
- >> drv_wdg_clear_counter
- >> drv_wdg_read_edge_flag
- >> drv_wdg_clear_edge_flag
[Address Reference Count : 1]- irq_redirect .o(i.handle_init)
app_dma_irq_handler (Thumb, 10 bytes, Stack size 8 bytes, drv_dma.o(i.app_dma_irq_handler))
[Stack]
- Max Depth = 56
- Call Chain = app_dma_irq_handler ⇒ drv_dma_irq_handler ⇒ drv_dma_clear_flag ⇒ drv_sys_cfg_clear_pending
[Calls]
[Address Reference Count : 1]- irq_redirect .o(i.handle_init)
app_fls_ctrl_Handler (Thumb, 38 bytes, Stack size 8 bytes, norflash.o(i.app_fls_ctrl_Handler))
[Stack]
- Max Depth = 16
- Call Chain = app_fls_ctrl_Handler ⇒ drv_sys_cfg_clear_pending
[Calls]- >> fls_clr_interrupt_flag
- >> drv_sys_cfg_clear_pending
[Address Reference Count : 1]- irq_redirect .o(i.handle_init)
app_tp_I2C_init (Thumb, 26 bytes, Stack size 8 bytes, app_tp_transfer.o(i.app_tp_I2C_init))
[Stack]
- Max Depth = 44
- Call Chain = app_tp_I2C_init ⇒ hal_i2c_s_init ⇒ drv_i2c_dma_init
[Calls]- >> hal_i2c_s_set_transfer
- >> hal_i2c_s_nonblocking_read
- >> hal_i2c_s_init
[Called By]
app_tp_calibration_exec (Thumb, 30 bytes, Stack size 8 bytes, ap_demo.o(i.app_tp_calibration_exec))
[Stack]
- Max Depth = 80
- Call Chain = app_tp_calibration_exec ⇒ ap_tp_calibration ⇒ app_tp_m_write ⇒ hal_i2c_m_dma_write ⇒ drv_i2c_master_write_dma ⇒ drv_dma_set_transfer ⇒ drv_dma_set_burst
[Calls]- >> ap_tp_calibration
- >> LOG_printf
[Called By]
app_tp_init (Thumb, 56 bytes, Stack size 8 bytes, app_tp_transfer.o(i.app_tp_init))
[Stack]
- Max Depth = 60
- Call Chain = app_tp_init ⇒ hal_i2c_m_dma_init ⇒ drv_i2c_master_init ⇒ __aeabi_uidivmod
[Calls]- >> hal_i2c_m_dma_init
- >> hal_gpio_set_pull_state
- >> hal_gpio_init_input
- >> app_tp_screen_init
- >> hal_gpio_init_output
[Called By]
app_tp_phone_analysis_data (Thumb, 806 bytes, Stack size 24 bytes, app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data))
[Stack]
- Max Depth = 32
- Call Chain = app_tp_phone_analysis_data ⇒ hal_gpio_set_output_data
[Calls]- >> hal_gpio_set_output_data
[Called By]
app_tp_phone_clear_reset_on (Thumb, 8 bytes, Stack size 0 bytes, app_tp_transfer.o(i.app_tp_phone_clear_reset_on))
[Called By]
app_tp_s_read (Thumb, 8 bytes, Stack size 8 bytes, app_tp_transfer.o(i.app_tp_s_read))
[Stack]
- Max Depth = 8
- Call Chain = app_tp_s_read
[Calls]- >> hal_i2c_s_nonblocking_read
[Called By]
app_tp_s_write (Thumb, 8 bytes, Stack size 8 bytes, app_tp_transfer.o(i.app_tp_s_write))
[Stack]
- Max Depth = 44
- Call Chain = app_tp_s_write ⇒ hal_i2c_s_dma_write ⇒ drv_i2c_slave_write_dma ⇒ drv_dma_prepar_transfer
[Calls]
[Called By]
app_tp_screen_analysis_int (Thumb, 670 bytes, Stack size 56 bytes, app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int))
[Stack]
- Max Depth = 68
- Call Chain = app_tp_screen_analysis_int ⇒ __aeabi_uidivmod
[Calls]- >> hal_gpio_set_output_data
- >> __aeabi_uidivmod
[Called By]- >> ap_tp_simulate_finger_release_event
- >> app_tp_transfer_screen_int
app_tp_screen_init (Thumb, 42 bytes, Stack size 8 bytes, app_tp_transfer.o(i.app_tp_screen_init))
[Stack]
- Max Depth = 24
- Call Chain = app_tp_screen_init ⇒ hal_gpio_init_output ⇒ hal_gpio_set_mode
[Calls]- >> hal_gpio_set_output_data
- >> hal_gpio_init_output
- >> delayUs
[Called By]
app_tp_screen_reset (Thumb, 150 bytes, Stack size 8 bytes, app_tp_transfer.o(i.app_tp_screen_reset))
[Stack]
- Max Depth = 92
- Call Chain = app_tp_screen_reset ⇒ ap_tp_simulate_finger_release_event ⇒ app_tp_screen_analysis_int ⇒ __aeabi_uidivmod
[Calls]- >> hal_i2c_m_transfer_complate
- >> ap_tp_simulate_finger_release_event
- >> ap_tp_scan_point_init
- >> app_tp_m_write
- >> hal_gpio_set_output_data
- >> delayMs
[Called By]- >> app_tp_transfer_screen_int
app_tp_transfer_screen_int (Thumb, 306 bytes, Stack size 24 bytes, app_tp_transfer.o(i.app_tp_transfer_screen_int))
[Stack]
- Max Depth = 152
- Call Chain = app_tp_transfer_screen_int ⇒ app_tp_transfer_screen_const ⇒ S20_Start_init ⇒ app_tp_m_read ⇒ hal_i2c_m_dma_read ⇒ drv_i2c_master_read_dma ⇒ drv_dma_set_transfer ⇒ drv_dma_set_burst
[Calls]- >> hal_i2c_m_transfer_complate
- >> hal_gpio_get_input_data
- >> app_tp_screen_analysis_int
- >> app_tp_screen_reset
- >> app_tp_transfer_screen_const
- >> app_tp_m_read
- >> delayUs
- >> delayMs
- >> LOG_printf
[Called By]
app_tp_transfer_screen_start (Thumb, 18 bytes, Stack size 16 bytes, app_tp_transfer.o(i.app_tp_transfer_screen_start))
[Stack]
- Max Depth = 144
- Call Chain = app_tp_transfer_screen_start ⇒ app_tp_transfer_screen_const ⇒ S20_Start_init ⇒ app_tp_m_read ⇒ hal_i2c_m_dma_read ⇒ drv_i2c_master_read_dma ⇒ drv_dma_set_transfer ⇒ drv_dma_set_burst
[Calls]- >> app_tp_transfer_screen_const
[Called By]
board_Init (Thumb, 30 bytes, Stack size 8 bytes, board.o(i.board_Init))
[Stack]
- Max Depth = 132
- Call Chain = board_Init ⇒ hal_system_init_console ⇒ hal_uart_init ⇒ UART_init ⇒ UART_SetBaudRate ⇒ __aeabi_uidivmod
[Calls]- >> hal_system_set_phy_calibration
- >> hal_system_init_console
- >> hal_system_init
- >> hal_system_enable_systick
[Called By]
ceil (Thumb, 180 bytes, Stack size 24 bytes, ceil.o(i.ceil))
[Stack]
- Max Depth = 136
- Call Chain = ceil ⇒ __aeabi_drsub ⇒ __aeabi_dadd ⇒ _double_epilogue ⇒ __aeabi_llsr
[Calls]- >> __aeabi_dadd
- >> __aeabi_drsub
- >> __aeabi_cdrcmple
[Called By]- >> hal_dsi_tx_count_lane_rate
- >> hal_dsi_tx_calc_video_chunks
- >> hal_lcdc_init_clk
dcs_packet_fifo_alloc (Thumb, 80 bytes, Stack size 12 bytes, dcs_packet_fifo.o(i.dcs_packet_fifo_alloc))
[Stack]
- Max Depth = 12
- Call Chain = dcs_packet_fifo_alloc
[Called By]- >> rx_get_dcs_packet_data
dcs_packet_fifo_init (Thumb, 18 bytes, Stack size 0 bytes, dcs_packet_fifo.o(i.dcs_packet_fifo_init))
[Called By]
- >> hal_internal_vsync_init_rx
dcs_packet_free_fifo_header (Thumb, 60 bytes, Stack size 0 bytes, dcs_packet_fifo.o(i.dcs_packet_free_fifo_header))
[Called By]
- >> hal_dsi_rx_ctrl_dsc_async_handler
dcs_packet_get_fifo_header (Thumb, 26 bytes, Stack size 0 bytes, dcs_packet_fifo.o(i.dcs_packet_get_fifo_header))
[Called By]
- >> hal_dsi_rx_ctrl_dsc_async_handler
delayMs (Thumb, 24 bytes, Stack size 8 bytes, tau_delay.o(i.delayMs))
[Stack]
- Max Depth = 8
- Call Chain = delayMs
[Calls]
[Called By]- >> app_tp_screen_reset
- >> ap_tp_simulate_finger_release_event
- >> S20_Start_init
- >> app_tp_transfer_screen_int
- >> ap_tp_calibration
- >> Gpio_swire_output
- >> init_panel
- >> ap_set_exit_sleep_mode
- >> ap_set_enter_sleep_mode
- >> ap_demo
delayUs (Thumb, 34 bytes, Stack size 0 bytes, tau_delay.o(i.delayUs))
[Called By]
- >> hal_internal_sync_input_resolution_change
- >> app_tp_screen_init
- >> delayMs
- >> app_tp_transfer_screen_int
- >> Gpio_swire_output
- >> init_panel
drv_ap_rst_trig_edge_detect (Thumb, 46 bytes, Stack size 12 bytes, drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect))
[Stack]
- Max Depth = 12
- Call Chain = drv_ap_rst_trig_edge_detect
[Calls]- >> drv_sys_cfg_sel_ap_rst_lvl_trig
[Called By]- >> app_AP_NRESET_IRQn_Handler
drv_chip_info_get_info (Thumb, 6 bytes, Stack size 0 bytes, drv_chip_info.o(i.drv_chip_info_get_info))
[Called By]
- >> drv_dsi_rx_set_up_phy
- >> drv_dsi_rx_set_lane_swap
- >> drv_phy_get_calibration
drv_chip_info_init (Thumb, 56 bytes, Stack size 8 bytes, drv_chip_info.o(i.drv_chip_info_init))
[Stack]
- Max Depth = 16
- Call Chain = drv_chip_info_init ⇒ drv_efuse_read
[Calls]- >> drv_efuse_enter_inactive
- >> drv_efuse_read
[Called By]- >> drv_common_system_init
drv_chip_rx_info_check (Thumb, 122 bytes, Stack size 8 bytes, drv_chip_info.o(i.drv_chip_rx_info_check))
[Stack]
- Max Depth = 56
- Call Chain = drv_chip_rx_info_check ⇒ LOG_printf ⇒ vsprintf
[Calls]- >> LOG_printf
- >> __2printf
[Called By]- >> hal_internal_vsync_init_rx
drv_chip_rx_init_done (Thumb, 16 bytes, Stack size 0 bytes, drv_chip_info.o(i.drv_chip_rx_init_done))
[Called By]
drv_common_enable_systick (Thumb, 70 bytes, Stack size 16 bytes, drv_common.o(i.drv_common_enable_systick))
[Stack]
- Max Depth = 28
- Call Chain = drv_common_enable_systick ⇒ __aeabi_uidivmod
[Calls]
[Called By]- >> hal_system_enable_systick
drv_common_system_init (Thumb, 8 bytes, Stack size 8 bytes, drv_common.o(i.drv_common_system_init))
[Stack]
- Max Depth = 24
- Call Chain = drv_common_system_init ⇒ drv_chip_info_init ⇒ drv_efuse_read
[Calls]
[Called By]
drv_crgu_config_reset_modules (Thumb, 10 bytes, Stack size 0 bytes, drv_crgu.o(i.drv_crgu_config_reset_modules))
[Called By]
- >> hal_internal_sync_input_resolution_change
- >> hal_dsi_tx_ctrl_deinit
- >> hal_dsi_rx_ctrl_deinit
drv_crgu_set_ahb_pre_div (Thumb, 14 bytes, Stack size 0 bytes, drv_crgu.o(i.drv_crgu_set_ahb_pre_div))
[Called By]
drv_crgu_set_ahb_src (Thumb, 16 bytes, Stack size 0 bytes, drv_crgu.o(i.drv_crgu_set_ahb_src))
[Called By]
drv_crgu_set_clock (Thumb, 26 bytes, Stack size 0 bytes, drv_crgu.o(i.drv_crgu_set_clock))
[Called By]
- >> hal_dsi_tx_ctrl_init_clk
- >> hal_dsi_rx_ctrl_set_rxbr_clk
- >> hal_dsi_rx_ctrl_init_clk
- >> hal_system_init
- >> hal_timer_init
- >> hal_dsi_tx_ctrl_deinit
- >> hal_dsi_rx_ctrl_deinit
- >> UART_SwitchSCLK
drv_crgu_set_dpi_mux_src (Thumb, 16 bytes, Stack size 0 bytes, drv_crgu.o(i.drv_crgu_set_dpi_mux_src))
[Called By]
drv_crgu_set_dpi_pre_div (Thumb, 18 bytes, Stack size 0 bytes, drv_crgu.o(i.drv_crgu_set_dpi_pre_div))
[Called By]
drv_crgu_set_dpi_pre_src (Thumb, 16 bytes, Stack size 0 bytes, drv_crgu.o(i.drv_crgu_set_dpi_pre_src))
[Called By]
drv_crgu_set_dsc_core_div (Thumb, 16 bytes, Stack size 0 bytes, drv_crgu.o(i.drv_crgu_set_dsc_core_div))
[Called By]
- >> hal_dsi_rx_ctrl_set_rxbr_clk
- >> rx_partial_update
drv_crgu_set_dsco_src (Thumb, 16 bytes, Stack size 0 bytes, drv_crgu.o(i.drv_crgu_set_dsco_src))
[Called By]
- >> hal_dsi_rx_ctrl_set_rxbr_clk
- >> rx_partial_update
drv_crgu_set_dsco_src_div (Thumb, 16 bytes, Stack size 0 bytes, drv_crgu.o(i.drv_crgu_set_dsco_src_div))
[Called By]
- >> hal_dsi_rx_ctrl_set_rxbr_clk
- >> rx_partial_update
drv_crgu_set_fb_div (Thumb, 16 bytes, Stack size 0 bytes, drv_crgu.o(i.drv_crgu_set_fb_div))
[Called By]
- >> hal_dsi_rx_ctrl_init_clk
drv_crgu_set_fb_src (Thumb, 16 bytes, Stack size 0 bytes, drv_crgu.o(i.drv_crgu_set_fb_src))
[Called By]
- >> hal_dsi_rx_ctrl_init_clk
drv_crgu_set_lcdc_div (Thumb, 16 bytes, Stack size 0 bytes, drv_crgu.o(i.drv_crgu_set_lcdc_div))
[Called By]
drv_crgu_set_lcdc_src (Thumb, 16 bytes, Stack size 0 bytes, drv_crgu.o(i.drv_crgu_set_lcdc_src))
[Called By]
drv_crgu_set_mipi_cfg_src (Thumb, 16 bytes, Stack size 0 bytes, drv_crgu.o(i.drv_crgu_set_mipi_cfg_src))
[Called By]
- >> drv_dsi_tx_phy_test_setup
drv_crgu_set_mipi_ref_src (Thumb, 18 bytes, Stack size 0 bytes, drv_crgu.o(i.drv_crgu_set_mipi_ref_src))
[Called By]
- >> drv_dsi_tx_phy_test_setup
drv_crgu_set_reset (Thumb, 20 bytes, Stack size 0 bytes, drv_crgu.o(i.drv_crgu_set_reset))
[Called By]
drv_crgu_set_rxbr_div (Thumb, 16 bytes, Stack size 0 bytes, drv_crgu.o(i.drv_crgu_set_rxbr_div))
[Called By]
- >> hal_dsi_rx_ctrl_set_rxbr_clk
drv_crgu_set_rxbr_src (Thumb, 16 bytes, Stack size 0 bytes, drv_crgu.o(i.drv_crgu_set_rxbr_src))
[Called By]
- >> hal_dsi_rx_ctrl_set_rxbr_clk
drv_crgu_set_vidc_src (Thumb, 16 bytes, Stack size 0 bytes, drv_crgu.o(i.drv_crgu_set_vidc_src))
[Called By]
- >> hal_dsi_rx_ctrl_init_clk
drv_dma_clear_flag (Thumb, 24 bytes, Stack size 8 bytes, drv_dma.o(i.drv_dma_clear_flag))
[Stack]
- Max Depth = 16
- Call Chain = drv_dma_clear_flag ⇒ drv_sys_cfg_clear_pending
[Calls]- >> drv_sys_cfg_clear_pending
[Called By]
drv_dma_create_handle (Thumb, 22 bytes, Stack size 0 bytes, drv_dma.o(i.drv_dma_create_handle))
[Called By]
- >> drv_i2c_set_dma_irq_callback
drv_dma_disenable_channel (Thumb, 16 bytes, Stack size 0 bytes, drv_dma.o(i.drv_dma_disenable_channel))
[Called By]
- >> hal_i2c_s_dma_write
- >> hal_i2c_slave_irq_callback
- >> drv_dma_set_burst
drv_dma_enable_channel (Thumb, 16 bytes, Stack size 0 bytes, drv_dma.o(i.drv_dma_enable_channel))
[Called By]
- >> hal_i2c_slave_irq_callback
- >> drv_i2c_master_write_dma
- >> drv_i2c_master_read_dma
drv_dma_enable_channel_interrupts (Thumb, 32 bytes, Stack size 8 bytes, drv_dma.o(i.drv_dma_enable_channel_interrupts))
[Stack]
- Max Depth = 8
- Call Chain = drv_dma_enable_channel_interrupts
[Calls]
[Called By]
drv_dma_get_channel_flag (Thumb, 12 bytes, Stack size 0 bytes, drv_dma.o(i.drv_dma_get_channel_flag))
[Called By]
drv_dma_irq_handler (Thumb, 138 bytes, Stack size 32 bytes, drv_dma.o(i.drv_dma_irq_handler))
[Stack]
- Max Depth = 48
- Call Chain = drv_dma_irq_handler ⇒ drv_dma_clear_flag ⇒ drv_sys_cfg_clear_pending
[Calls]- >> drv_dma_get_channel_flag
- >> drv_dma_clear_flag
[Called By]
drv_dma_prepar_transfer (Thumb, 18 bytes, Stack size 12 bytes, drv_dma.o(i.drv_dma_prepar_transfer))
[Stack]
- Max Depth = 12
- Call Chain = drv_dma_prepar_transfer
[Called By]- >> drv_i2c_slave_write_dma
- >> drv_i2c_master_write_dma
- >> drv_i2c_master_read_dma
drv_dma_set_burst (Thumb, 26 bytes, Stack size 12 bytes, drv_dma.o(i.drv_dma_set_burst))
[Stack]
- Max Depth = 12
- Call Chain = drv_dma_set_burst
[Calls]- >> drv_dma_disenable_channel
[Called By]
drv_dma_set_callback (Thumb, 6 bytes, Stack size 0 bytes, drv_dma.o(i.drv_dma_set_callback))
[Called By]
- >> drv_i2c_set_dma_irq_callback
drv_dma_set_transfer (Thumb, 62 bytes, Stack size 12 bytes, drv_dma.o(i.drv_dma_set_transfer))
[Stack]
- Max Depth = 24
- Call Chain = drv_dma_set_transfer ⇒ drv_dma_set_burst
[Calls]
[Called By]- >> drv_i2c_master_write_dma
- >> drv_i2c_master_read_dma
drv_dsc_dec_convert_pps_rc_parameter (Thumb, 54 bytes, Stack size 20 bytes, drv_dsc_dec.o(i.drv_dsc_dec_convert_pps_rc_parameter))
[Stack]
- Max Depth = 20
- Call Chain = drv_dsc_dec_convert_pps_rc_parameter
[Called By]- >> hal_dsi_rx_ctrl_pre_init_pps
- >> rx_receive_pps
drv_dsc_dec_disable (Thumb, 12 bytes, Stack size 0 bytes, drv_dsc_dec.o(i.drv_dsc_dec_disable))
[Called By]
- >> hal_dsi_rx_ctrl_init
- >> hal_dsi_rx_ctrl_deinit
drv_dsc_dec_enable (Thumb, 88 bytes, Stack size 40 bytes, drv_dsc_dec.o(i.drv_dsc_dec_enable))
[Stack]
- Max Depth = 64
- Call Chain = drv_dsc_dec_enable ⇒ __2printf
[Calls]- >> drv_efuse_enter_inactive
- >> drv_efuse_read
- >> __2printf
[Called By]- >> hal_dsi_rx_ctrl_init
- >> rx_receive_pps
drv_dsc_dec_get_nslc (Thumb, 10 bytes, Stack size 0 bytes, drv_dsc_dec.o(i.drv_dsc_dec_get_nslc))
[Called By]
drv_dsc_dec_set_u8_pps (Thumb, 40 bytes, Stack size 8 bytes, drv_dsc_dec.o(i.drv_dsc_dec_set_u8_pps))
[Stack]
- Max Depth = 8
- Call Chain = drv_dsc_dec_set_u8_pps
[Called By]- >> hal_dsi_rx_ctrl_init
- >> vpre_err_reset
- >> rx_receive_pps
drv_dsi_rx_calc_ipi_tx_delay (Thumb, 244 bytes, Stack size 56 bytes, drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay))
[Stack]
- Max Depth = 160
- Call Chain = drv_dsi_rx_calc_ipi_tx_delay ⇒ __aeabi_dadd ⇒ _double_epilogue ⇒ __aeabi_llsr
[Calls]- >> __aeabi_dadd
- >> __aeabi_d2uiz
- >> __aeabi_ui2f
- >> __aeabi_fsub
- >> __aeabi_fmul
- >> __aeabi_fdiv
- >> __aeabi_fadd
- >> __aeabi_f2d
- >> __aeabi_cfrcmple
- >> drv_dsi_rx_get_color_pcc
- >> drv_dsi_rx_get_color_bpp
[Called By]- >> hal_dsi_rx_ctrl_set_ipi_cfg
drv_dsi_rx_enable_irq (Thumb, 58 bytes, Stack size 8 bytes, drv_dsi_rx.o(i.drv_dsi_rx_enable_irq))
[Stack]
- Max Depth = 16
- Call Chain = drv_dsi_rx_enable_irq ⇒ drv_sys_cfg_clear_pending
[Calls]- >> drv_sys_cfg_set_int
- >> drv_sys_cfg_clear_pending
[Called By]- >> hal_dsi_rx_ctrl_init_dsi_rx
- >> hal_dsi_rx_ctrl_deinit
drv_dsi_rx_get_compression_en (Thumb, 8 bytes, Stack size 0 bytes, drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en))
[Called By]
drv_dsi_rx_get_max_ret_size (Thumb, 6 bytes, Stack size 0 bytes, drv_dsi_rx.o(i.drv_dsi_rx_get_max_ret_size))
[Called By]
- >> hal_dsi_rx_ctrl_get_max_ret_size
drv_dsi_rx_power_up (Thumb, 14 bytes, Stack size 0 bytes, drv_dsi_rx.o(i.drv_dsi_rx_power_up))
[Called By]
drv_dsi_rx_set_ctrl_cfg (Thumb, 32 bytes, Stack size 12 bytes, drv_dsi_rx.o(i.drv_dsi_rx_set_ctrl_cfg))
[Stack]
- Max Depth = 12
- Call Chain = drv_dsi_rx_set_ctrl_cfg
[Called By]- >> hal_dsi_rx_ctrl_init_dsi_rx
drv_dsi_rx_set_ddi_cfg (Thumb, 16 bytes, Stack size 0 bytes, drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg))
[Called By]
- >> hal_dsi_rx_ctrl_init_dsi_rx
- >> hal_dsi_rx_ctrl_set_cus_esc_clk
drv_dsi_rx_set_inten (Thumb, 4 bytes, Stack size 0 bytes, drv_dsi_rx.o(i.drv_dsi_rx_set_inten))
[Called By]
- >> hal_dsi_rx_ctrl_init_dsi_rx
drv_dsi_rx_set_ipi_cfg (Thumb, 16 bytes, Stack size 8 bytes, drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_cfg))
[Stack]
- Max Depth = 8
- Call Chain = drv_dsi_rx_set_ipi_cfg
[Called By]- >> hal_dsi_rx_ctrl_set_ipi_cfg
drv_dsi_rx_set_lane_swap (Thumb, 70 bytes, Stack size 16 bytes, drv_dsi_rx.o(i.drv_dsi_rx_set_lane_swap))
[Stack]
- Max Depth = 16
- Call Chain = drv_dsi_rx_set_lane_swap
[Calls]- >> drv_chip_info_get_info
[Called By]- >> hal_dsi_rx_ctrl_init_dsi_rx
drv_dsi_rx_set_resp_cnt (Thumb, 38 bytes, Stack size 0 bytes, drv_dsi_rx.o(i.drv_dsi_rx_set_resp_cnt))
[Called By]
- >> hal_dsi_rx_ctrl_init_dsi_rx
drv_dsi_rx_set_up_phy (Thumb, 236 bytes, Stack size 32 bytes, drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy))
[Stack]
- Max Depth = 72
- Call Chain = drv_dsi_rx_set_up_phy ⇒ drv_rx_phy_test_write_2_byte ⇒ drv_phy_test_write_2_byte ⇒ drv_phy_test_write_data
[Calls]- >> drv_phy_get_rate_para
- >> drv_phy_get_calibration
- >> drv_chip_info_get_info
- >> drv_rx_phy_test_write_2_byte
- >> drv_rx_phy_test_write_1_byte
- >> drv_rx_phy_test_lock
- >> drv_rx_phy_test_clear
- >> __aeabi_uidivmod
[Called By]- >> hal_dsi_rx_ctrl_init_dsi_rx
drv_dsi_rx_shut_down (Thumb, 14 bytes, Stack size 0 bytes, drv_dsi_rx.o(i.drv_dsi_rx_shut_down))
[Called By]
drv_dsi_tx_command_header (Thumb, 20 bytes, Stack size 8 bytes, drv_dsi_tx.o(i.drv_dsi_tx_command_header))
[Stack]
- Max Depth = 8
- Call Chain = drv_dsi_tx_command_header
[Called By]
drv_dsi_tx_command_mode_cfg (Thumb, 108 bytes, Stack size 16 bytes, drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg))
[Stack]
- Max Depth = 16
- Call Chain = drv_dsi_tx_command_mode_cfg
[Called By]- >> hal_dsi_tx_ctrl_exit_init_panel_mode
- >> hal_dsi_tx_ctrl_enter_init_panel_mode
drv_dsi_tx_command_put_payload (Thumb, 4 bytes, Stack size 0 bytes, drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload))
[Called By]
- >> hal_dsi_tx_ctrl_write_cmd
- >> hal_dsi_tx_ctrl_write_array_cmd
- >> rx_get_dcs_packet_data
drv_dsi_tx_config_eotp (Thumb, 24 bytes, Stack size 0 bytes, drv_dsi_tx.o(i.drv_dsi_tx_config_eotp))
[Called By]
- >> hal_dsi_tx_ctrl_start
- >> hal_dsi_tx_init_remains
drv_dsi_tx_config_int (Thumb, 8 bytes, Stack size 0 bytes, drv_dsi_tx.o(i.drv_dsi_tx_config_int))
[Called By]
- >> hal_dsi_tx_init_interrupt
drv_dsi_tx_dpi_lpcmd_time (Thumb, 8 bytes, Stack size 0 bytes, drv_dsi_tx.o(i.drv_dsi_tx_dpi_lpcmd_time))
[Called By]
- >> hal_dsi_tx_init_dpi_cfg
drv_dsi_tx_dpi_mode (Thumb, 10 bytes, Stack size 0 bytes, drv_dsi_tx.o(i.drv_dsi_tx_dpi_mode))
[Called By]
- >> hal_dsi_tx_init_dpi_cfg
drv_dsi_tx_dpi_polarity (Thumb, 36 bytes, Stack size 16 bytes, drv_dsi_tx.o(i.drv_dsi_tx_dpi_polarity))
[Stack]
- Max Depth = 16
- Call Chain = drv_dsi_tx_dpi_polarity
[Called By]- >> hal_dsi_tx_init_dpi_cfg
drv_dsi_tx_edpi_cmd_size (Thumb, 4 bytes, Stack size 0 bytes, drv_dsi_tx.o(i.drv_dsi_tx_edpi_cmd_size))
[Called By]
- >> hal_dsi_tx_init_data_mode
drv_dsi_tx_get_cmd_status (Thumb, 4 bytes, Stack size 0 bytes, drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status))
[Called By]
- >> hal_dsi_tx_ctrl_write_cmd
- >> hal_dsi_tx_ctrl_write_array_cmd
- >> hal_dsi_tx_send_cmd
drv_dsi_tx_mode (Thumb, 4 bytes, Stack size 0 bytes, drv_dsi_tx.o(i.drv_dsi_tx_mode))
[Called By]
- >> hal_dsi_tx_ctrl_exit_init_panel_mode
- >> hal_dsi_tx_ctrl_enter_init_panel_mode
- >> hal_dsi_tx_init_data_mode
drv_dsi_tx_phy_clock_lane_auto_lp (Thumb, 24 bytes, Stack size 0 bytes, drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_auto_lp))
[Called By]
- >> hal_dsi_tx_init_remains
drv_dsi_tx_phy_clock_lane_req_hs (Thumb, 26 bytes, Stack size 0 bytes, drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs))
[Called By]
- >> hal_dsi_tx_ctrl_start
- >> hal_dsi_tx_init_remains
drv_dsi_tx_phy_lane_mode (Thumb, 12 bytes, Stack size 0 bytes, drv_dsi_tx.o(i.drv_dsi_tx_phy_lane_mode))
[Called By]
- >> hal_dsi_tx_init_phy_cfg
drv_dsi_tx_phy_status_ready (Thumb, 100 bytes, Stack size 0 bytes, drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ready))
[Called By]
drv_dsi_tx_phy_status_stopstate (Thumb, 62 bytes, Stack size 4 bytes, drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate))
[Stack]
- Max Depth = 12
- Call Chain = drv_dsi_tx_phy_status_stopstate ⇒ __ARM_common_switch8
[Calls]
[Called By]
drv_dsi_tx_phy_test_setup (Thumb, 268 bytes, Stack size 40 bytes, drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup))
[Stack]
- Max Depth = 80
- Call Chain = drv_dsi_tx_phy_test_setup ⇒ drv_tx_phy_test_write_2_byte ⇒ drv_phy_test_write_2_byte ⇒ drv_phy_test_write_data
[Calls]- >> drv_phy_get_rate_para
- >> drv_phy_get_calibration
- >> drv_crgu_set_mipi_ref_src
- >> drv_crgu_set_mipi_cfg_src
- >> drv_phy_get_pll_para
- >> drv_tx_phy_test_exit
- >> drv_tx_phy_test_enter
- >> drv_tx_phy_test_write_code
- >> drv_tx_phy_test_write_2_byte
- >> drv_tx_phy_test_write_1_byte
- >> drv_tx_phy_test_clear
- >> __aeabi_uidivmod
[Called By]
drv_dsi_tx_phy_time_cfg (Thumb, 30 bytes, Stack size 8 bytes, drv_dsi_tx.o(i.drv_dsi_tx_phy_time_cfg))
[Stack]
- Max Depth = 8
- Call Chain = drv_dsi_tx_phy_time_cfg
[Called By]- >> hal_dsi_tx_init_phy_cfg
drv_dsi_tx_powerup (Thumb, 8 bytes, Stack size 0 bytes, drv_dsi_tx.o(i.drv_dsi_tx_powerup))
[Called By]
drv_dsi_tx_response_mode (Thumb, 28 bytes, Stack size 16 bytes, drv_dsi_tx.o(i.drv_dsi_tx_response_mode))
[Stack]
- Max Depth = 16
- Call Chain = drv_dsi_tx_response_mode
[Called By]- >> hal_dsi_tx_init_remains
drv_dsi_tx_set_bta_ack (Thumb, 24 bytes, Stack size 0 bytes, drv_dsi_tx.o(i.drv_dsi_tx_set_bta_ack))
[Called By]
- >> hal_dsi_tx_init_video_mode
drv_dsi_tx_set_esc_div (Thumb, 12 bytes, Stack size 0 bytes, drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div))
[Called By]
- >> hal_dsi_tx_init_remains
drv_dsi_tx_set_int (Thumb, 46 bytes, Stack size 8 bytes, drv_dsi_tx.o(i.drv_dsi_tx_set_int))
[Stack]
- Max Depth = 8
- Call Chain = drv_dsi_tx_set_int
[Calls]
[Called By]- >> hal_dsi_tx_ctrl_stop
- >> hal_dsi_tx_init_interrupt
drv_dsi_tx_set_time_out_div (Thumb, 16 bytes, Stack size 0 bytes, drv_dsi_tx.o(i.drv_dsi_tx_set_time_out_div))
[Called By]
- >> hal_dsi_tx_init_remains
drv_dsi_tx_set_video_chunk (Thumb, 8 bytes, Stack size 0 bytes, drv_dsi_tx.o(i.drv_dsi_tx_set_video_chunk))
[Called By]
- >> hal_dsi_tx_calc_video_chunks
drv_dsi_tx_set_video_timing (Thumb, 34 bytes, Stack size 16 bytes, drv_dsi_tx.o(i.drv_dsi_tx_set_video_timing))
[Stack]
- Max Depth = 16
- Call Chain = drv_dsi_tx_set_video_timing
[Called By]- >> hal_dsi_tx_calc_video_chunks
drv_dsi_tx_shutdown (Thumb, 8 bytes, Stack size 0 bytes, drv_dsi_tx.o(i.drv_dsi_tx_shutdown))
[Called By]
- >> hal_internal_sync_input_resolution_change
- >> hal_dsi_tx_ctrl_stop
drv_dsi_tx_timeout_cfg (Thumb, 38 bytes, Stack size 16 bytes, drv_dsi_tx.o(i.drv_dsi_tx_timeout_cfg))
[Stack]
- Max Depth = 16
- Call Chain = drv_dsi_tx_timeout_cfg
[Called By]- >> hal_dsi_tx_init_remains
drv_dsi_tx_video_mode_cfg (Thumb, 170 bytes, Stack size 20 bytes, drv_dsi_tx.o(i.drv_dsi_tx_video_mode_cfg))
[Stack]
- Max Depth = 20
- Call Chain = drv_dsi_tx_video_mode_cfg
[Called By]- >> hal_dsi_tx_init_video_mode
drv_dsi_tx_video_mode_disable_hact_cmd (Thumb, 22 bytes, Stack size 0 bytes, drv_dsi_tx.o(i.drv_dsi_tx_video_mode_disable_hact_cmd))
[Called By]
- >> hal_dsi_tx_init_video_mode
drv_dsi_tx_video_mode_set_lp_cmd (Thumb, 24 bytes, Stack size 0 bytes, drv_dsi_tx.o(i.drv_dsi_tx_video_mode_set_lp_cmd))
[Called By]
- >> hal_dsi_tx_init_video_mode
drv_efuse_enter_inactive (Thumb, 32 bytes, Stack size 4 bytes, drv_efuse.o(i.drv_efuse_enter_inactive))
[Stack]
- Max Depth = 4
- Call Chain = drv_efuse_enter_inactive
[Calls]
[Called By]- >> drv_dsc_dec_enable
- >> drv_chip_info_init
drv_efuse_int_enable (Thumb, 12 bytes, Stack size 0 bytes, drv_efuse.o(i.drv_efuse_int_enable))
[Called By]
- >> drv_efuse_enter_inactive
drv_efuse_read (Thumb, 50 bytes, Stack size 8 bytes, drv_efuse.o(i.drv_efuse_read))
[Stack]
- Max Depth = 8
- Call Chain = drv_efuse_read
[Calls]
[Called By]- >> drv_dsc_dec_enable
- >> drv_phy_get_calibration
- >> drv_chip_info_init
drv_efuse_read_req (Thumb, 24 bytes, Stack size 0 bytes, drv_efuse.o(i.drv_efuse_read_req))
[Called By]
drv_gpio_get_input_data (Thumb, 20 bytes, Stack size 0 bytes, drv_gpio.o(i.drv_gpio_get_input_data))
[Called By]
- >> hal_gpio_get_input_data
drv_gpio_register_ap_reset_callback (Thumb, 6 bytes, Stack size 0 bytes, drv_gpio.o(i.drv_gpio_register_ap_reset_callback))
[Called By]
- >> hal_gpio_set_ap_reset_int
drv_gpio_register_callback (Thumb, 14 bytes, Stack size 0 bytes, drv_gpio.o(i.drv_gpio_register_callback))
[Called By]
drv_gpio_set_int (Thumb, 62 bytes, Stack size 16 bytes, drv_gpio.o(i.drv_gpio_set_int))
[Stack]
- Max Depth = 16
- Call Chain = drv_gpio_set_int
[Calls]
[Called By]
drv_gpio_set_ioe (Thumb, 26 bytes, Stack size 0 bytes, drv_gpio.o(i.drv_gpio_set_ioe))
[Called By]
- >> hal_gpio_init_input
- >> hal_gpio_init_eint
- >> hal_gpio_init_output
drv_gpio_set_mode0 (Thumb, 12 bytes, Stack size 0 bytes, drv_gpio.o(i.drv_gpio_set_mode0))
[Called By]
drv_gpio_set_mode1 (Thumb, 12 bytes, Stack size 0 bytes, drv_gpio.o(i.drv_gpio_set_mode1))
[Called By]
drv_gpio_set_mode2 (Thumb, 12 bytes, Stack size 0 bytes, drv_gpio.o(i.drv_gpio_set_mode2))
[Called By]
drv_gpio_set_mode3 (Thumb, 12 bytes, Stack size 0 bytes, drv_gpio.o(i.drv_gpio_set_mode3))
[Called By]
drv_gpio_set_pull_state (Thumb, 298 bytes, Stack size 16 bytes, drv_gpio.o(i.drv_gpio_set_pull_state))
[Stack]
- Max Depth = 24
- Call Chain = drv_gpio_set_pull_state ⇒ __ARM_common_switch8
[Calls]
[Called By]- >> hal_gpio_set_pull_state
drv_i2c_dma_init (Thumb, 146 bytes, Stack size 20 bytes, drv_i2c_dma.o(i.drv_i2c_dma_init))
[Stack]
- Max Depth = 20
- Call Chain = drv_i2c_dma_init
[Called By]- >> hal_i2c_s_init
- >> hal_i2c_m_dma_init
drv_i2c_enable_rx_dma (Thumb, 26 bytes, Stack size 0 bytes, drv_i2c_dma.o(i.drv_i2c_enable_rx_dma))
[Called By]
drv_i2c_enable_tx_dma (Thumb, 24 bytes, Stack size 0 bytes, drv_i2c_dma.o(i.drv_i2c_enable_tx_dma))
[Called By]
- >> hal_i2c_s_init
- >> hal_i2c_m_dma_init
drv_i2c_m_clear_it_pending_bit (Thumb, 86 bytes, Stack size 8 bytes, drv_i2c_master.o(i.drv_i2c_m_clear_it_pending_bit))
[Stack]
- Max Depth = 16
- Call Chain = drv_i2c_m_clear_it_pending_bit ⇒ __ARM_common_switch8
[Calls]- >> __ARM_common_switch8
- >> __NVIC_ClearPendingIRQ
[Called By]- >> hal_i2c_master_irq_callback
drv_i2c_m_enable (Thumb, 10 bytes, Stack size 0 bytes, drv_i2c_master.o(i.drv_i2c_m_enable))
[Called By]
- >> drv_i2c_master_read_dma
drv_i2c_m_enable_intr (Thumb, 42 bytes, Stack size 16 bytes, drv_i2c_master.o(i.drv_i2c_m_enable_intr))
[Stack]
- Max Depth = 16
- Call Chain = drv_i2c_m_enable_intr
[Calls]- >> __NVIC_ClearPendingIRQ
[Called By]
drv_i2c_m_set_callback (Thumb, 6 bytes, Stack size 0 bytes, drv_i2c_master.o(i.drv_i2c_m_set_callback))
[Called By]
drv_i2c_master_init (Thumb, 118 bytes, Stack size 24 bytes, drv_i2c_master.o(i.drv_i2c_master_init))
[Stack]
- Max Depth = 36
- Call Chain = drv_i2c_master_init ⇒ __aeabi_uidivmod
[Calls]
[Called By]
drv_i2c_master_read_dma (Thumb, 82 bytes, Stack size 40 bytes, drv_i2c_dma.o(i.drv_i2c_master_read_dma))
[Stack]
- Max Depth = 64
- Call Chain = drv_i2c_master_read_dma ⇒ drv_dma_set_transfer ⇒ drv_dma_set_burst
[Calls]- >> drv_sys_cfg_set_dma_rx_req
- >> drv_dma_enable_channel
- >> drv_i2c_m_enable
- >> drv_i2c_master_write_read_cmd
- >> drv_dma_set_transfer
- >> drv_dma_prepar_transfer
[Called By]
drv_i2c_master_write_dma (Thumb, 50 bytes, Stack size 24 bytes, drv_i2c_dma.o(i.drv_i2c_master_write_dma))
[Stack]
- Max Depth = 48
- Call Chain = drv_i2c_master_write_dma ⇒ drv_dma_set_transfer ⇒ drv_dma_set_burst
[Calls]- >> drv_sys_cfg_set_dma_tx_req
- >> drv_dma_enable_channel
- >> drv_dma_set_transfer
- >> drv_dma_prepar_transfer
[Called By]
drv_i2c_s_clear_it_pending_bit (Thumb, 84 bytes, Stack size 8 bytes, drv_i2c_slave.o(i.drv_i2c_s_clear_it_pending_bit))
[Stack]
- Max Depth = 16
- Call Chain = drv_i2c_s_clear_it_pending_bit ⇒ __ARM_common_switch8
[Calls]- >> __ARM_common_switch8
- >> __NVIC_ClearPendingIRQ
[Called By]- >> hal_i2c_slave_irq_callback
drv_i2c_s_enable_intr (Thumb, 40 bytes, Stack size 16 bytes, drv_i2c_slave.o(i.drv_i2c_s_enable_intr))
[Stack]
- Max Depth = 16
- Call Chain = drv_i2c_s_enable_intr
[Calls]- >> __NVIC_ClearPendingIRQ
[Called By]
drv_i2c_s_get_fifo_status (Thumb, 22 bytes, Stack size 0 bytes, drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status))
[Called By]
- >> drv_i2c_s_write_data
- >> hal_i2c_slave_irq_callback
drv_i2c_s_set_callback (Thumb, 6 bytes, Stack size 0 bytes, drv_i2c_slave.o(i.drv_i2c_s_set_callback))
[Called By]
drv_i2c_s_write_data (Thumb, 26 bytes, Stack size 4 bytes, drv_i2c_slave.o(i.drv_i2c_s_write_data))
[Stack]
- Max Depth = 4
- Call Chain = drv_i2c_s_write_data
[Calls]- >> drv_i2c_s_get_fifo_status
[Called By]- >> hal_i2c_slave_irq_callback
drv_i2c_set_dma_irq_callback (Thumb, 68 bytes, Stack size 8 bytes, drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback))
[Stack]
- Max Depth = 8
- Call Chain = drv_i2c_set_dma_irq_callback
[Calls]- >> drv_dma_create_handle
- >> drv_dma_set_callback
[Called By]
drv_i2c_slave_init (Thumb, 60 bytes, Stack size 8 bytes, drv_i2c_slave.o(i.drv_i2c_slave_init))
[Stack]
- Max Depth = 8
- Call Chain = drv_i2c_slave_init
[Called By]
drv_i2c_slave_write_dma (Thumb, 18 bytes, Stack size 8 bytes, drv_i2c_dma.o(i.drv_i2c_slave_write_dma))
[Stack]
- Max Depth = 20
- Call Chain = drv_i2c_slave_write_dma ⇒ drv_dma_prepar_transfer
[Calls]- >> drv_dma_prepar_transfer
[Called By]
drv_lcdc_config_bypass (Thumb, 24 bytes, Stack size 0 bytes, drv_lcdc.o(i.drv_lcdc_config_bypass))
[Called By]
- >> hal_lcdc_init_cfg
- >> hal_lcdc_config_upscaler
- >> hal_lcdc_config_rgb_to_pentile
- >> hal_lcdc_config_ccm
drv_lcdc_config_ccm (Thumb, 48 bytes, Stack size 0 bytes, drv_lcdc.o(i.drv_lcdc_config_ccm))
[Called By]
- >> hal_lcdc_config_ccm
- >> app_LCDC_IRQn_Handler
drv_lcdc_config_disp_mode (Thumb, 22 bytes, Stack size 0 bytes, drv_lcdc.o(i.drv_lcdc_config_disp_mode))
[Called By]
- >> hal_lcdc_config_remains
drv_lcdc_config_dpi_polarity (Thumb, 36 bytes, Stack size 16 bytes, drv_lcdc.o(i.drv_lcdc_config_dpi_polarity))
[Stack]
- Max Depth = 16
- Call Chain = drv_lcdc_config_dpi_polarity
[Called By]- >> hal_lcdc_config_remains
drv_lcdc_config_dpi_timing (Thumb, 38 bytes, Stack size 16 bytes, drv_lcdc.o(i.drv_lcdc_config_dpi_timing))
[Stack]
- Max Depth = 16
- Call Chain = drv_lcdc_config_dpi_timing
[Called By]
drv_lcdc_config_edpi_mode (Thumb, 22 bytes, Stack size 0 bytes, drv_lcdc.o(i.drv_lcdc_config_edpi_mode))
[Called By]
- >> hal_lcdc_config_remains
drv_lcdc_config_endianness (Thumb, 22 bytes, Stack size 0 bytes, drv_lcdc.o(i.drv_lcdc_config_endianness))
[Called By]
- >> hal_lcdc_config_remains
drv_lcdc_config_input_size (Thumb, 12 bytes, Stack size 0 bytes, drv_lcdc.o(i.drv_lcdc_config_input_size))
[Called By]
- >> drv_lcdc_config_src_parameter
drv_lcdc_config_int (Thumb, 30 bytes, Stack size 12 bytes, drv_lcdc.o(i.drv_lcdc_config_int))
[Stack]
- Max Depth = 12
- Call Chain = drv_lcdc_config_int
[Called By]- >> hal_lcdc_init_interrupt
drv_lcdc_config_int_single (Thumb, 34 bytes, Stack size 8 bytes, drv_lcdc.o(i.drv_lcdc_config_int_single))
[Stack]
- Max Depth = 8
- Call Chain = drv_lcdc_config_int_single
[Called By]- >> hal_dsi_tx_ctrl_set_ccm
- >> app_LCDC_IRQn_Handler
- >> vsync_set_te_mode
drv_lcdc_config_overwrite (Thumb, 34 bytes, Stack size 0 bytes, drv_lcdc.o(i.drv_lcdc_config_overwrite))
[Called By]
- >> hal_dsi_tx_ctrl_start
- >> hal_internal_vsync_set_tx_state
- >> vidc_callback
drv_lcdc_config_overwrite_rgb (Thumb, 12 bytes, Stack size 0 bytes, drv_lcdc.o(i.drv_lcdc_config_overwrite_rgb))
[Called By]
- >> hal_dsi_tx_ctrl_set_overwrite_rgb
drv_lcdc_config_partial_display_area (Thumb, 26 bytes, Stack size 16 bytes, drv_lcdc.o(i.drv_lcdc_config_partial_display_area))
[Stack]
- Max Depth = 16
- Call Chain = drv_lcdc_config_partial_display_area
[Called By]- >> hal_dsi_tx_ctrl_set_partial_disp_area
drv_lcdc_config_partial_display_enable (Thumb, 34 bytes, Stack size 0 bytes, drv_lcdc.o(i.drv_lcdc_config_partial_display_enable))
[Called By]
- >> hal_dsi_tx_ctrl_set_partial_disp
drv_lcdc_config_scale_up_coef (Thumb, 26 bytes, Stack size 8 bytes, drv_lcdc.o(i.drv_lcdc_config_scale_up_coef))
[Stack]
- Max Depth = 8
- Call Chain = drv_lcdc_config_scale_up_coef
[Called By]- >> hal_lcdc_config_upscaler
drv_lcdc_config_scale_up_step (Thumb, 12 bytes, Stack size 0 bytes, drv_lcdc.o(i.drv_lcdc_config_scale_up_step))
[Called By]
- >> hal_lcdc_config_upscaler
drv_lcdc_config_src_parameter (Thumb, 76 bytes, Stack size 8 bytes, drv_lcdc.o(i.drv_lcdc_config_src_parameter))
[Stack]
- Max Depth = 8
- Call Chain = drv_lcdc_config_src_parameter
[Calls]- >> drv_lcdc_config_input_size
[Called By]- >> hal_lcdc_config_remains
drv_lcdc_config_thresh (Thumb, 6 bytes, Stack size 0 bytes, drv_lcdc.o(i.drv_lcdc_config_thresh))
[Called By]
- >> hal_lcdc_config_remains
drv_lcdc_ctrl_flow (Thumb, 18 bytes, Stack size 0 bytes, drv_lcdc.o(i.drv_lcdc_ctrl_flow))
[Called By]
- >> hal_lcdc_init_interrupt
- >> vsync_set_te_mode
drv_lcdc_enable_shadow_reg (Thumb, 32 bytes, Stack size 0 bytes, drv_lcdc.o(i.drv_lcdc_enable_shadow_reg))
[Called By]
drv_lcdc_set_int (Thumb, 46 bytes, Stack size 8 bytes, drv_lcdc.o(i.drv_lcdc_set_int))
[Stack]
- Max Depth = 8
- Call Chain = drv_lcdc_set_int
[Calls]
[Called By]- >> hal_dsi_tx_ctrl_stop
- >> hal_lcdc_init_interrupt
drv_lcdc_set_video_hw_mode (Thumb, 20 bytes, Stack size 0 bytes, drv_lcdc.o(i.drv_lcdc_set_video_hw_mode))
[Called By]
drv_lcdc_start (Thumb, 32 bytes, Stack size 0 bytes, drv_lcdc.o(i.drv_lcdc_start))
[Called By]
- >> hal_dsi_tx_ctrl_stop
- >> hal_dsi_tx_ctrl_start
drv_memc_clear_status (Thumb, 12 bytes, Stack size 0 bytes, drv_memc.o(i.drv_memc_clear_status))
[Called By]
drv_memc_enable_irq (Thumb, 58 bytes, Stack size 8 bytes, drv_memc.o(i.drv_memc_enable_irq))
[Stack]
- Max Depth = 16
- Call Chain = drv_memc_enable_irq ⇒ drv_sys_cfg_clear_pending
[Calls]- >> drv_sys_cfg_set_int
- >> drv_sys_cfg_clear_pending
[Called By]- >> hal_dsi_rx_ctrl_init_memc
- >> hal_dsi_rx_ctrl_deinit
- >> hal_internal_init_memc
drv_memc_gen_a_tear_signal (Thumb, 12 bytes, Stack size 0 bytes, drv_memc.o(i.drv_memc_gen_a_tear_signal))
[Called By]
- >> hal_dsi_rx_ctrl_gen_a_tear_signal
drv_memc_get_status (Thumb, 18 bytes, Stack size 0 bytes, drv_memc.o(i.drv_memc_get_status))
[Called By]
drv_memc_rate_transfer_sel (Thumb, 16 bytes, Stack size 0 bytes, drv_memc.o(i.drv_memc_rate_transfer_sel))
[Called By]
- >> hal_dsi_rx_ctrl_init_memc
drv_memc_sel_vsync (Thumb, 14 bytes, Stack size 0 bytes, drv_memc.o(i.drv_memc_sel_vsync))
[Called By]
- >> hal_dsi_rx_ctrl_init_memc
drv_memc_set_active_height (Thumb, 14 bytes, Stack size 0 bytes, drv_memc.o(i.drv_memc_set_active_height))
[Called By]
- >> hal_dsi_rx_ctrl_init_memc
- >> hal_internal_init_memc
drv_memc_set_data_mode (Thumb, 12 bytes, Stack size 0 bytes, drv_memc.o(i.drv_memc_set_data_mode))
[Called By]
- >> hal_dsi_rx_ctrl_init_memc
- >> hal_internal_init_memc
drv_memc_set_double_buffer (Thumb, 16 bytes, Stack size 0 bytes, drv_memc.o(i.drv_memc_set_double_buffer))
[Called By]
- >> hal_dsi_rx_ctrl_init_memc
- >> hal_internal_init_memc
drv_memc_set_double_buffer_reverse (Thumb, 18 bytes, Stack size 0 bytes, drv_memc.o(i.drv_memc_set_double_buffer_reverse))
[Called By]
drv_memc_set_fs_en_conditions (Thumb, 16 bytes, Stack size 0 bytes, drv_memc.o(i.drv_memc_set_fs_en_conditions))
[Called By]
- >> hal_dsi_rx_ctrl_init_memc
drv_memc_set_inten (Thumb, 20 bytes, Stack size 0 bytes, drv_memc.o(i.drv_memc_set_inten))
[Called By]
- >> hal_dsi_rx_ctrl_init_memc
- >> hal_internal_init_memc
drv_memc_set_lcdc_st_conditions (Thumb, 18 bytes, Stack size 0 bytes, drv_memc.o(i.drv_memc_set_lcdc_st_conditions))
[Called By]
- >> hal_dsi_rx_ctrl_init_memc
drv_memc_set_ltpo_mode (Thumb, 26 bytes, Stack size 8 bytes, drv_memc.o(i.drv_memc_set_ltpo_mode))
[Stack]
- Max Depth = 8
- Call Chain = drv_memc_set_ltpo_mode
[Called By]- >> hal_dsi_rx_ctrl_init_memc
- >> hal_internal_init_memc
drv_memc_set_tear_mode (Thumb, 14 bytes, Stack size 0 bytes, drv_memc.o(i.drv_memc_set_tear_mode))
[Called By]
- >> hal_internal_sync_input_resolution_change
- >> hal_dsi_rx_ctrl_init_memc
- >> hal_dsi_rx_ctrl_set_sw_tear_mode
- >> hal_internal_init_memc
- >> vsync_set_te_mode
drv_memc_set_tear_waveform (Thumb, 34 bytes, Stack size 8 bytes, drv_memc.o(i.drv_memc_set_tear_waveform))
[Stack]
- Max Depth = 8
- Call Chain = drv_memc_set_tear_waveform
[Called By]- >> hal_dsi_rx_ctrl_init_memc
- >> hal_internal_init_memc
drv_memc_set_vidc_sync_cnt (Thumb, 14 bytes, Stack size 0 bytes, drv_memc.o(i.drv_memc_set_vidc_sync_cnt))
[Called By]
- >> hal_dsi_rx_ctrl_init_memc
drv_param_init_get_ccm (Thumb, 4 bytes, Stack size 0 bytes, drv_param_init.o(i.drv_param_init_get_ccm))
[Called By]
- >> hal_lcdc_config_ccm
- >> app_LCDC_IRQn_Handler
drv_param_init_get_scld_filter_h (Thumb, 12 bytes, Stack size 0 bytes, drv_param_init.o(i.drv_param_init_get_scld_filter_h))
[Called By]
- >> hal_dsi_rx_ctrl_init_vidc
drv_param_init_get_scld_filter_v (Thumb, 12 bytes, Stack size 0 bytes, drv_param_init.o(i.drv_param_init_get_scld_filter_v))
[Called By]
- >> hal_dsi_rx_ctrl_init_vidc
drv_param_init_get_sclu_filter (Thumb, 4 bytes, Stack size 0 bytes, drv_param_init.o(i.drv_param_init_get_sclu_filter))
[Called By]
- >> hal_lcdc_config_upscaler
drv_param_init_set_ccm (Thumb, 14 bytes, Stack size 8 bytes, drv_param_init.o(i.drv_param_init_set_ccm))
[Stack]
- Max Depth = 8
- Call Chain = drv_param_init_set_ccm
[Calls]
[Called By]- >> hal_dsi_tx_ctrl_set_ccm
drv_param_init_set_scld_filter (Thumb, 92 bytes, Stack size 20 bytes, drv_param_init.o(i.drv_param_init_set_scld_filter))
[Stack]
- Max Depth = 20
- Call Chain = drv_param_init_set_scld_filter
[Called By]- >> hal_dsi_rx_ctrl_set_cus_scld_filter
drv_param_p2r_filter_init (Thumb, 30 bytes, Stack size 16 bytes, drv_param_init.o(i.drv_param_p2r_filter_init))
[Stack]
- Max Depth = 16
- Call Chain = drv_param_p2r_filter_init
[Called By]- >> hal_dsi_rx_ctrl_init_vidc
drv_phy_enable_calibration (Thumb, 12 bytes, Stack size 0 bytes, drv_phy_common.o(i.drv_phy_enable_calibration))
[Called By]
- >> hal_system_set_phy_calibration
drv_phy_get_calibration (Thumb, 50 bytes, Stack size 16 bytes, drv_phy_common.o(i.drv_phy_get_calibration))
[Stack]
- Max Depth = 24
- Call Chain = drv_phy_get_calibration ⇒ drv_efuse_read
[Calls]- >> drv_chip_info_get_info
- >> drv_efuse_read
[Called By]- >> drv_dsi_rx_set_up_phy
- >> drv_dsi_tx_phy_test_setup
drv_phy_get_pll_para (Thumb, 88 bytes, Stack size 0 bytes, drv_phy_common.o(i.drv_phy_get_pll_para))
[Called By]
- >> drv_dsi_tx_phy_test_setup
drv_phy_get_rate_para (Thumb, 76 bytes, Stack size 8 bytes, drv_phy_common.o(i.drv_phy_get_rate_para))
[Stack]
- Max Depth = 20
- Call Chain = drv_phy_get_rate_para ⇒ __aeabi_uidivmod
[Calls]
[Called By]- >> hal_dsi_tx_count_lane_rate
- >> drv_dsi_rx_set_up_phy
- >> drv_dsi_tx_phy_test_setup
drv_phy_test_clear (Thumb, 16 bytes, Stack size 0 bytes, drv_phy_common.o(i.drv_phy_test_clear))
[Called By]
- >> drv_rx_phy_test_clear
- >> drv_tx_phy_test_clear
drv_phy_test_lock (Thumb, 24 bytes, Stack size 0 bytes, drv_phy_common.o(i.drv_phy_test_lock))
[Called By]
drv_phy_test_write_1_byte (Thumb, 32 bytes, Stack size 16 bytes, drv_phy_common.o(i.drv_phy_test_write_1_byte))
[Stack]
- Max Depth = 32
- Call Chain = drv_phy_test_write_1_byte ⇒ drv_phy_test_write_data
[Calls]- >> drv_phy_test_write_data
- >> drv_phy_test_write_code
[Called By]- >> drv_rx_phy_test_write_1_byte
- >> drv_tx_phy_test_write_1_byte
drv_phy_test_write_2_byte (Thumb, 38 bytes, Stack size 16 bytes, drv_phy_common.o(i.drv_phy_test_write_2_byte))
[Stack]
- Max Depth = 32
- Call Chain = drv_phy_test_write_2_byte ⇒ drv_phy_test_write_data
[Calls]- >> drv_phy_test_write_data
- >> drv_phy_test_write_code
[Called By]- >> drv_rx_phy_test_write_2_byte
- >> drv_tx_phy_test_write_2_byte
drv_phy_test_write_code (Thumb, 30 bytes, Stack size 8 bytes, drv_phy_common.o(i.drv_phy_test_write_code))
[Stack]
- Max Depth = 8
- Call Chain = drv_phy_test_write_code
[Called By]- >> drv_phy_test_write_2_byte
- >> drv_phy_test_write_1_byte
- >> drv_tx_phy_test_write_code
drv_pwr_set_cp_mode (Thumb, 26 bytes, Stack size 0 bytes, drv_pwr.o(i.drv_pwr_set_cp_mode))
[Called By]
drv_pwr_set_pvd_mode (Thumb, 18 bytes, Stack size 0 bytes, drv_pwr.o(i.drv_pwr_set_pvd_mode))
[Called By]
- >> hal_system_init
- >> hal_system_set_pvd
drv_pwr_set_system_clk_src (Thumb, 36 bytes, Stack size 0 bytes, drv_pwr.o(i.drv_pwr_set_system_clk_src))
[Called By]
drv_rxbr_clear_pkt_buffer (Thumb, 10 bytes, Stack size 0 bytes, drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer))
[Called By]
- >> rxbr_irq1_callback
- >> rx_receive_pps
- >> rx_receive_packet
- >> check_pkt_buf_rev
drv_rxbr_clear_status0 (Thumb, 4 bytes, Stack size 0 bytes, drv_rxbr.o(i.drv_rxbr_clear_status0))
[Called By]
- >> hal_internal_sync_input_resolution_change
- >> rxbr_irq1_callback
- >> rxbr_irq0_callback
- >> rx_receive_packet
- >> check_pkt_buf_rev
drv_rxbr_enable_irq (Thumb, 90 bytes, Stack size 8 bytes, drv_rxbr.o(i.drv_rxbr_enable_irq))
[Stack]
- Max Depth = 16
- Call Chain = drv_rxbr_enable_irq ⇒ drv_sys_cfg_clear_pending
[Calls]- >> drv_sys_cfg_set_int
- >> drv_sys_cfg_clear_pending
- >> __NVIC_EnableIRQ
- >> __NVIC_DisableIRQ
[Called By]- >> hal_dsi_rx_ctrl_init_rxbr
- >> hal_dsi_rx_ctrl_deinit
drv_rxbr_frame_drop_cfg (Thumb, 16 bytes, Stack size 0 bytes, drv_rxbr.o(i.drv_rxbr_frame_drop_cfg))
[Called By]
- >> hal_dsi_rx_ctrl_init_rxbr
drv_rxbr_get_clk (Thumb, 44 bytes, Stack size 0 bytes, drv_rxbr.o(i.drv_rxbr_get_clk))
[Called By]
- >> hal_dsi_rx_ctrl_init_dsi_rx
- >> hal_dsi_rx_ctrl_set_cus_esc_clk
drv_rxbr_get_col_addr (Thumb, 4 bytes, Stack size 0 bytes, drv_rxbr.o(i.drv_rxbr_get_col_addr))
[Called By]
drv_rxbr_get_page_addr (Thumb, 4 bytes, Stack size 0 bytes, drv_rxbr.o(i.drv_rxbr_get_page_addr))
[Called By]
drv_rxbr_hline_rcv0_cfg (Thumb, 12 bytes, Stack size 0 bytes, drv_rxbr.o(i.drv_rxbr_hline_rcv0_cfg))
[Called By]
- >> hal_dsi_rx_ctrl_set_cus_sync_line
drv_rxbr_hline_rcv_cfg (Thumb, 8 bytes, Stack size 0 bytes, drv_rxbr.o(i.drv_rxbr_hline_rcv_cfg))
[Called By]
- >> hal_dsi_rx_ctrl_init_rxbr
drv_rxbr_register_irq0_callback (Thumb, 6 bytes, Stack size 0 bytes, drv_rxbr.o(i.drv_rxbr_register_irq0_callback))
[Called By]
- >> hal_internal_vsync_init_rx
drv_rxbr_register_irq1_callback (Thumb, 6 bytes, Stack size 0 bytes, drv_rxbr.o(i.drv_rxbr_register_irq1_callback))
[Called By]
- >> hal_internal_vsync_init_rx
drv_rxbr_set_ack_pkt_header (Thumb, 20 bytes, Stack size 8 bytes, drv_rxbr.o(i.drv_rxbr_set_ack_pkt_header))
[Stack]
- Max Depth = 8
- Call Chain = drv_rxbr_set_ack_pkt_header
[Called By]- >> hal_dsi_rx_ctrl_send_ack_cmd
drv_rxbr_set_cmd_filter (Thumb, 204 bytes, Stack size 20 bytes, drv_rxbr.o(i.drv_rxbr_set_cmd_filter))
[Stack]
- Max Depth = 28
- Call Chain = drv_rxbr_set_cmd_filter ⇒ __ARM_common_switch8
[Calls]
[Called By]- >> hal_internal_vsync_set_auto_hw_filter
drv_rxbr_set_color_format (Thumb, 20 bytes, Stack size 8 bytes, drv_rxbr.o(i.drv_rxbr_set_color_format))
[Stack]
- Max Depth = 8
- Call Chain = drv_rxbr_set_color_format
[Called By]- >> hal_dsi_rx_ctrl_init_rxbr
drv_rxbr_set_inten (Thumb, 20 bytes, Stack size 0 bytes, drv_rxbr.o(i.drv_rxbr_set_inten))
[Called By]
- >> hal_dsi_rx_ctrl_init_rxbr
- >> hal_dsi_rx_ctrl_dsc_async_handler
- >> rxbr_irq0_callback
drv_rxbr_set_ltpo_drop_th (Thumb, 16 bytes, Stack size 0 bytes, drv_rxbr.o(i.drv_rxbr_set_ltpo_drop_th))
[Called By]
- >> hal_dsi_rx_ctrl_init_rxbr
drv_rxbr_set_usr_cfg (Thumb, 38 bytes, Stack size 16 bytes, drv_rxbr.o(i.drv_rxbr_set_usr_cfg))
[Stack]
- Max Depth = 16
- Call Chain = drv_rxbr_set_usr_cfg
[Called By]- >> hal_dsi_rx_ctrl_init_rxbr
drv_rxbr_set_usr_col (Thumb, 8 bytes, Stack size 0 bytes, drv_rxbr.o(i.drv_rxbr_set_usr_col))
[Called By]
- >> hal_dsi_rx_ctrl_init_rxbr
drv_rxbr_set_usr_row (Thumb, 8 bytes, Stack size 0 bytes, drv_rxbr.o(i.drv_rxbr_set_usr_row))
[Called By]
- >> hal_dsi_rx_ctrl_init_rxbr
drv_spi_m_read_data (Thumb, 28 bytes, Stack size 0 bytes, drv_spi_master.o(i.drv_spi_m_read_data))
[Called By]
- >> hal_spi_m_clear_rxfifo
drv_swire_set_int (Thumb, 64 bytes, Stack size 16 bytes, drv_swire.o(i.drv_swire_set_int))
[Stack]
- Max Depth = 16
- Call Chain = drv_swire_set_int
[Calls]
[Called By]- >> app_SWIRE_IRQn_Handler
drv_sys_cfg_clear_all_int (Thumb, 8 bytes, Stack size 0 bytes, drv_sys_cfg.o(i.drv_sys_cfg_clear_all_int))
[Called By]
drv_sys_cfg_clear_pending (Thumb, 32 bytes, Stack size 8 bytes, drv_sys_cfg.o(i.drv_sys_cfg_clear_pending))
[Stack]
- Max Depth = 8
- Call Chain = drv_sys_cfg_clear_pending
[Called By]- >> drv_vidc_enable_irq
- >> drv_rxbr_enable_irq
- >> drv_memc_enable_irq
- >> drv_dsi_rx_enable_irq
- >> hal_gpio_init_eint
- >> hal_gpio_set_ap_reset_int
- >> app_fls_ctrl_Handler
- >> app_MIPI_RX_IRQn_Handler
- >> app_LCDC_IRQn_Handler
- >> drv_timer_clear_status_flags
- >> app_EXTI_INT7_IRQn_Handler
- >> app_EXTI_INT6_IRQn_Handler
- >> app_EXTI_INT5_IRQn_Handler
- >> app_EXTI_INT4_IRQn_Handler
- >> app_EXTI_INT3_IRQn_Handler
- >> app_EXTI_INT2_IRQn_Handler
- >> app_EXTI_INT1_IRQn_Handler
- >> app_EXTI_INT0_IRQn_Handler
- >> app_AP_NRESET_IRQn_Handler
- >> drv_dma_clear_flag
- >> UART0_IRQ_Handle
- >> app_WDG_IRQn_Handler
- >> app_SWIRE_IRQn_Handler
- >> app_SPIS_IRQn_Handler
- >> app_PWMDET_IRQn_Handler
- >> app_VIDC_IRQn_Handler
- >> app_VPRE_IRQn_Handler
- >> app_ADC_IRQn_Handler
- >> app_MEMC_IRQn_Handler
- >> app_MIPI_TX_IRQn_Handler
drv_sys_cfg_sel_ap_rst_lvl_trig (Thumb, 18 bytes, Stack size 0 bytes, drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_lvl_trig))
[Called By]
- >> drv_sys_cfg_sel_ap_rst_trig
- >> drv_ap_rst_trig_edge_detect
drv_sys_cfg_sel_ap_rst_trig (Thumb, 22 bytes, Stack size 4 bytes, drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig))
[Stack]
- Max Depth = 4
- Call Chain = drv_sys_cfg_sel_ap_rst_trig
[Calls]- >> drv_sys_cfg_sel_ap_rst_lvl_trig
[Called By]- >> hal_gpio_set_ap_reset_int
drv_sys_cfg_sel_gpio_group (Thumb, 30 bytes, Stack size 0 bytes, drv_sys_cfg.o(i.drv_sys_cfg_sel_gpio_group))
[Called By]
drv_sys_cfg_sel_int_trig (Thumb, 30 bytes, Stack size 0 bytes, drv_sys_cfg.o(i.drv_sys_cfg_sel_int_trig))
[Called By]
drv_sys_cfg_set_dma_rx_req (Thumb, 10 bytes, Stack size 0 bytes, drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req))
[Called By]
- >> drv_i2c_master_read_dma
drv_sys_cfg_set_dma_tx_req (Thumb, 10 bytes, Stack size 0 bytes, drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req))
[Called By]
- >> hal_i2c_s_init
- >> drv_i2c_master_write_dma
drv_sys_cfg_set_int (Thumb, 30 bytes, Stack size 0 bytes, drv_sys_cfg.o(i.drv_sys_cfg_set_int))
[Called By]
- >> drv_vidc_enable_irq
- >> drv_rxbr_enable_irq
- >> drv_memc_enable_irq
- >> drv_dsi_rx_enable_irq
- >> hal_gpio_set_ap_reset_int
- >> UART_init
- >> drv_timer_set_int
- >> drv_dma_enable_channel_interrupts
- >> drv_gpio_set_int
- >> drv_lcdc_set_int
- >> drv_dsi_tx_set_int
- >> drv_swire_set_int
- >> drv_wdg_set_int
drv_timer_clear_status_flags (Thumb, 26 bytes, Stack size 8 bytes, drv_timer.o(i.drv_timer_clear_status_flags))
[Stack]
- Max Depth = 16
- Call Chain = drv_timer_clear_status_flags ⇒ drv_sys_cfg_clear_pending
[Calls]- >> drv_sys_cfg_clear_pending
- >> drv_timer_get_instance
[Called By]- >> drv_timer_handle_interrupt
drv_timer_enable (Thumb, 32 bytes, Stack size 4 bytes, drv_timer.o(i.drv_timer_enable))
[Stack]
- Max Depth = 4
- Call Chain = drv_timer_enable
[Calls]- >> drv_timer_get_instance
[Called By]
drv_timer_get_instance (Thumb, 10 bytes, Stack size 0 bytes, drv_timer.o(i.drv_timer_get_instance))
[Called By]
- >> drv_timer_set_prescaler
- >> drv_timer_set_match
- >> drv_timer_set_current_count
- >> drv_timer_get_prescaler
- >> drv_timer_enable
- >> drv_timer_clear_status_flags
drv_timer_get_prescaler (Thumb, 14 bytes, Stack size 4 bytes, drv_timer.o(i.drv_timer_get_prescaler))
[Stack]
- Max Depth = 4
- Call Chain = drv_timer_get_prescaler
[Calls]- >> drv_timer_get_instance
[Called By]
drv_timer_register_callback (Thumb, 14 bytes, Stack size 0 bytes, drv_timer.o(i.drv_timer_register_callback))
[Called By]
drv_timer_set_current_count (Thumb, 12 bytes, Stack size 4 bytes, drv_timer.o(i.drv_timer_set_current_count))
[Stack]
- Max Depth = 4
- Call Chain = drv_timer_set_current_count
[Calls]- >> drv_timer_get_instance
[Called By]- >> hal_timer_start
- >> drv_timer_handle_interrupt
drv_timer_set_int (Thumb, 68 bytes, Stack size 16 bytes, drv_timer.o(i.drv_timer_set_int))
[Stack]
- Max Depth = 16
- Call Chain = drv_timer_set_int
[Calls]
[Called By]- >> hal_timer_start
- >> drv_timer_handle_interrupt
drv_timer_set_match (Thumb, 12 bytes, Stack size 4 bytes, drv_timer.o(i.drv_timer_set_match))
[Stack]
- Max Depth = 4
- Call Chain = drv_timer_set_match
[Calls]- >> drv_timer_get_instance
[Called By]- >> hal_timer_start
- >> drv_timer_handle_interrupt
drv_timer_set_prescaler (Thumb, 22 bytes, Stack size 4 bytes, drv_timer.o(i.drv_timer_set_prescaler))
[Stack]
- Max Depth = 4
- Call Chain = drv_timer_set_prescaler
[Calls]- >> drv_timer_get_instance
[Called By]
drv_tx_phy_test_enter (Thumb, 28 bytes, Stack size 0 bytes, drv_dsi_tx.o(i.drv_tx_phy_test_enter))
[Called By]
- >> drv_dsi_tx_phy_test_setup
drv_tx_phy_test_exit (Thumb, 28 bytes, Stack size 0 bytes, drv_dsi_tx.o(i.drv_tx_phy_test_exit))
[Called By]
- >> drv_dsi_tx_phy_test_setup
drv_vidc_clear_irq (Thumb, 8 bytes, Stack size 0 bytes, drv_vidc.o(i.drv_vidc_clear_irq))
[Called By]
drv_vidc_enable (Thumb, 24 bytes, Stack size 0 bytes, drv_vidc.o(i.drv_vidc_enable))
[Called By]
- >> hal_internal_vsync_set_tear_mode
- >> hal_internal_sync_input_resolution_change
- >> hal_dsi_rx_ctrl_stop
- >> hal_dsi_rx_ctrl_start
drv_vidc_enable_irq (Thumb, 58 bytes, Stack size 8 bytes, drv_vidc.o(i.drv_vidc_enable_irq))
[Stack]
- Max Depth = 16
- Call Chain = drv_vidc_enable_irq ⇒ drv_sys_cfg_clear_pending
[Calls]- >> drv_sys_cfg_set_int
- >> drv_sys_cfg_clear_pending
[Called By]- >> hal_dsi_rx_ctrl_init_vidc
- >> hal_dsi_rx_ctrl_deinit
drv_vidc_get_irq_status (Thumb, 18 bytes, Stack size 0 bytes, drv_vidc.o(i.drv_vidc_get_irq_status))
[Called By]
drv_vidc_init_module_enable (Thumb, 36 bytes, Stack size 16 bytes, drv_vidc.o(i.drv_vidc_init_module_enable))
[Stack]
- Max Depth = 16
- Call Chain = drv_vidc_init_module_enable
[Called By]- >> hal_dsi_rx_ctrl_init_vidc
drv_vidc_register_callback (Thumb, 6 bytes, Stack size 0 bytes, drv_vidc.o(i.drv_vidc_register_callback))
[Called By]
- >> hal_internal_vsync_init_rx
drv_vidc_reset (Thumb, 6 bytes, Stack size 0 bytes, drv_vidc.o(i.drv_vidc_reset))
[Called By]
- >> hal_internal_sync_input_resolution_change
- >> vpre_err_reset
drv_vidc_set_dst_parameter (Thumb, 60 bytes, Stack size 16 bytes, drv_vidc.o(i.drv_vidc_set_dst_parameter))
[Stack]
- Max Depth = 16
- Call Chain = drv_vidc_set_dst_parameter
[Called By]- >> hal_dsi_rx_ctrl_init_vidc
drv_vidc_set_irqen (Thumb, 20 bytes, Stack size 0 bytes, drv_vidc.o(i.drv_vidc_set_irqen))
[Called By]
- >> hal_dsi_rx_ctrl_init_vidc
- >> vidc_callback
drv_vidc_set_mirror (Thumb, 16 bytes, Stack size 0 bytes, drv_vidc.o(i.drv_vidc_set_mirror))
[Called By]
- >> hal_dsi_rx_ctrl_init_vidc
drv_vidc_set_p2r_hcoef0 (Thumb, 8 bytes, Stack size 0 bytes, drv_vidc.o(i.drv_vidc_set_p2r_hcoef0))
[Called By]
- >> hal_dsi_rx_ctrl_init_vidc
drv_vidc_set_p2r_hinitb (Thumb, 38 bytes, Stack size 12 bytes, drv_vidc.o(i.drv_vidc_set_p2r_hinitb))
[Stack]
- Max Depth = 12
- Call Chain = drv_vidc_set_p2r_hinitb
[Called By]- >> hal_dsi_rx_ctrl_init_vidc
drv_vidc_set_p2r_hinitr (Thumb, 38 bytes, Stack size 12 bytes, drv_vidc.o(i.drv_vidc_set_p2r_hinitr))
[Stack]
- Max Depth = 12
- Call Chain = drv_vidc_set_p2r_hinitr
[Called By]- >> hal_dsi_rx_ctrl_init_vidc
drv_vidc_set_pentile_swap (Thumb, 18 bytes, Stack size 0 bytes, drv_vidc.o(i.drv_vidc_set_pentile_swap))
[Called By]
- >> hal_dsi_rx_ctrl_init_vidc
drv_vidc_set_pu_ctrl (Thumb, 10 bytes, Stack size 0 bytes, drv_vidc.o(i.drv_vidc_set_pu_ctrl))
[Called By]
- >> hal_dsi_rx_ctrl_init_vidc
drv_vidc_set_rotation (Thumb, 16 bytes, Stack size 0 bytes, drv_vidc.o(i.drv_vidc_set_rotation))
[Called By]
- >> hal_dsi_rx_ctrl_init_vidc
drv_vidc_set_scld_hcoef0 (Thumb, 10 bytes, Stack size 0 bytes, drv_vidc.o(i.drv_vidc_set_scld_hcoef0))
[Called By]
- >> hal_dsi_rx_ctrl_init_vidc
- >> hal_dsi_rx_ctrl_set_cus_scld_filter
drv_vidc_set_scld_hcoef1 (Thumb, 10 bytes, Stack size 0 bytes, drv_vidc.o(i.drv_vidc_set_scld_hcoef1))
[Called By]
- >> hal_dsi_rx_ctrl_init_vidc
- >> hal_dsi_rx_ctrl_set_cus_scld_filter
drv_vidc_set_scld_step (Thumb, 18 bytes, Stack size 0 bytes, drv_vidc.o(i.drv_vidc_set_scld_step))
[Called By]
- >> hal_dsi_rx_ctrl_init_vidc
drv_vidc_set_scld_vcoef0 (Thumb, 10 bytes, Stack size 0 bytes, drv_vidc.o(i.drv_vidc_set_scld_vcoef0))
[Called By]
- >> hal_dsi_rx_ctrl_init_vidc
- >> hal_dsi_rx_ctrl_set_cus_scld_filter
drv_vidc_set_scld_vcoef1 (Thumb, 10 bytes, Stack size 0 bytes, drv_vidc.o(i.drv_vidc_set_scld_vcoef1))
[Called By]
- >> hal_dsi_rx_ctrl_init_vidc
- >> hal_dsi_rx_ctrl_set_cus_scld_filter
drv_vidc_set_src_parameter (Thumb, 22 bytes, Stack size 12 bytes, drv_vidc.o(i.drv_vidc_set_src_parameter))
[Stack]
- Max Depth = 12
- Call Chain = drv_vidc_set_src_parameter
[Called By]- >> hal_dsi_rx_ctrl_init_vidc
drv_wdg_clear_counter (Thumb, 12 bytes, Stack size 0 bytes, drv_wdg.o(i.drv_wdg_clear_counter))
[Called By]
drv_wdg_set_int (Thumb, 48 bytes, Stack size 8 bytes, drv_wdg.o(i.drv_wdg_set_int))
[Stack]
- Max Depth = 8
- Call Chain = drv_wdg_set_int
[Calls]
[Called By]
fls_clr_interrupt_flag (Thumb, 10 bytes, Stack size 0 bytes, drv_fls.o(i.fls_clr_interrupt_flag))
[Called By]
fputc (Thumb, 20 bytes, Stack size 32 bytes, tau_log.o(i.fputc))
[Stack]
- Max Depth = 40
- Call Chain = fputc ⇒ hal_uart_transmit_blocking
[Calls]- >> hal_uart_transmit_blocking
[Address Reference Count : 1]
hal_dsi_rx_ctrl_create_handle (Thumb, 42 bytes, Stack size 8 bytes, hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle))
[Stack]
- Max Depth = 8
- Call Chain = hal_dsi_rx_ctrl_create_handle
[Calls]
[Called By]
hal_dsi_rx_ctrl_deinit (Thumb, 148 bytes, Stack size 8 bytes, hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit))
[Stack]
- Max Depth = 32
- Call Chain = hal_dsi_rx_ctrl_deinit ⇒ hal_internal_vsync_set_rx_state ⇒ hal_internal_vsync_deinit
[Calls]- >> hal_internal_vsync_set_rx_state
- >> hal_internal_vsync_get_tx_state
- >> hal_internal_vsync_get_rx_state
- >> drv_vidc_enable_irq
- >> drv_rxbr_enable_irq
- >> drv_memc_enable_irq
- >> drv_dsi_rx_enable_irq
- >> drv_dsc_dec_disable
- >> drv_crgu_set_clock
- >> drv_crgu_config_reset_modules
[Called By]
hal_dsi_rx_ctrl_dsc_async_handler (Thumb, 120 bytes, Stack size 16 bytes, hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler))
[Stack]
- Max Depth = 16
- Call Chain = hal_dsi_rx_ctrl_dsc_async_handler
[Calls]- >> drv_rxbr_set_inten
- >> dcs_packet_get_fifo_header
- >> dcs_packet_free_fifo_header
[Called By]- >> ap_demo
- >> rx_get_dcs_packet_data
hal_dsi_rx_ctrl_gen_a_tear_signal (Thumb, 32 bytes, Stack size 8 bytes, hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal))
[Stack]
- Max Depth = 8
- Call Chain = hal_dsi_rx_ctrl_gen_a_tear_signal
[Calls]- >> drv_memc_gen_a_tear_signal
[Called By]- >> hal_internal_sync_input_resolution_change
hal_dsi_rx_ctrl_get_max_ret_size (Thumb, 30 bytes, Stack size 8 bytes, hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size))
[Stack]
- Max Depth = 8
- Call Chain = hal_dsi_rx_ctrl_get_max_ret_size
[Calls]- >> drv_dsi_rx_get_max_ret_size
[Called By]
hal_dsi_rx_ctrl_init (Thumb, 144 bytes, Stack size 16 bytes, hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init))
[Stack]
- Max Depth = 288
- Call Chain = hal_dsi_rx_ctrl_init ⇒ hal_internal_vsync_init_rx ⇒ calc_framebuffer_setting ⇒ __aeabi_dmul ⇒ _double_epilogue ⇒ __aeabi_llsr
[Calls]- >> hal_internal_vsync_set_rx_state
- >> hal_internal_vsync_init_rx
- >> drv_dsc_dec_set_u8_pps
- >> drv_dsc_dec_enable
- >> drv_dsc_dec_disable
- >> drv_chip_rx_init_done
- >> hal_dsi_rx_ctrl_init_vidc
- >> hal_dsi_rx_ctrl_init_rxbr
- >> hal_dsi_rx_ctrl_init_memc
- >> hal_dsi_rx_ctrl_init_dsi_rx
- >> hal_dsi_rx_ctrl_init_clk
- >> __aeabi_uidivmod
[Called By]- >> hal_internal_sync_input_resolution_change
- >> open_mipi_rx
hal_dsi_rx_ctrl_pre_init_pps (Thumb, 56 bytes, Stack size 16 bytes, hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_pre_init_pps))
[Stack]
- Max Depth = 36
- Call Chain = hal_dsi_rx_ctrl_pre_init_pps ⇒ drv_dsc_dec_convert_pps_rc_parameter
[Calls]- >> drv_dsc_dec_convert_pps_rc_parameter
[Called By]
hal_dsi_rx_ctrl_send_ack_cmd (Thumb, 212 bytes, Stack size 48 bytes, hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd))
[Stack]
- Max Depth = 96
- Call Chain = hal_dsi_rx_ctrl_send_ack_cmd ⇒ LOG_printf ⇒ vsprintf
[Calls]- >> drv_rxbr_set_ack_pkt_header
- >> LOG_printf
[Called By]
hal_dsi_rx_ctrl_set_cus_esc_clk (Thumb, 34 bytes, Stack size 16 bytes, hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk))
[Stack]
- Max Depth = 28
- Call Chain = hal_dsi_rx_ctrl_set_cus_esc_clk ⇒ __aeabi_uidivmod
[Calls]- >> drv_rxbr_get_clk
- >> drv_dsi_rx_set_ddi_cfg
- >> __aeabi_uidivmod
[Called By]
hal_dsi_rx_ctrl_set_cus_scld_filter (Thumb, 98 bytes, Stack size 56 bytes, hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter))
[Stack]
- Max Depth = 76
- Call Chain = hal_dsi_rx_ctrl_set_cus_scld_filter ⇒ drv_param_init_set_scld_filter
[Calls]- >> hal_internal_sync_get_fb_setting
- >> drv_vidc_set_scld_vcoef1
- >> drv_vidc_set_scld_vcoef0
- >> drv_vidc_set_scld_hcoef1
- >> drv_vidc_set_scld_hcoef0
- >> drv_param_init_set_scld_filter
[Called By]
hal_dsi_rx_ctrl_set_cus_sync_line (Thumb, 44 bytes, Stack size 8 bytes, hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line))
[Stack]
- Max Depth = 28
- Call Chain = hal_dsi_rx_ctrl_set_cus_sync_line ⇒ hal_internal_vsync_set_sync_line ⇒ __aeabi_uidivmod
[Calls]- >> hal_internal_vsync_set_sync_line
- >> drv_rxbr_hline_rcv0_cfg
[Called By]
hal_dsi_rx_ctrl_set_sw_tear_mode (Thumb, 42 bytes, Stack size 8 bytes, hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode))
[Stack]
- Max Depth = 104
- Call Chain = hal_dsi_rx_ctrl_set_sw_tear_mode ⇒ hal_internal_vsync_set_tear_mode ⇒ vsync_set_te_mode ⇒ LOG_printf ⇒ vsprintf
[Calls]- >> hal_internal_vsync_set_tear_mode
- >> drv_memc_set_tear_mode
[Called By]- >> ap_set_enter_sleep_mode
hal_dsi_rx_ctrl_set_tear_mode_ex (Thumb, 14 bytes, Stack size 8 bytes, hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_tear_mode_ex))
[Stack]
- Max Depth = 104
- Call Chain = hal_dsi_rx_ctrl_set_tear_mode_ex ⇒ hal_internal_vsync_set_tear_mode ⇒ vsync_set_te_mode ⇒ LOG_printf ⇒ vsprintf
[Calls]- >> hal_internal_vsync_set_tear_mode
[Called By]
hal_dsi_rx_ctrl_start (Thumb, 46 bytes, Stack size 8 bytes, hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start))
[Stack]
- Max Depth = 32
- Call Chain = hal_dsi_rx_ctrl_start ⇒ hal_internal_vsync_set_rx_state ⇒ hal_internal_vsync_deinit
[Calls]- >> hal_internal_vsync_set_rx_state
- >> drv_vidc_enable
- >> drv_dsi_rx_power_up
[Called By]- >> hal_internal_sync_input_resolution_change
- >> open_mipi_rx
hal_dsi_rx_ctrl_stop (Thumb, 46 bytes, Stack size 8 bytes, hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop))
[Stack]
- Max Depth = 32
- Call Chain = hal_dsi_rx_ctrl_stop ⇒ hal_internal_vsync_set_rx_state ⇒ hal_internal_vsync_deinit
[Calls]- >> hal_internal_vsync_set_rx_state
- >> drv_vidc_enable
- >> drv_dsi_rx_shut_down
[Called By]
hal_dsi_rx_ctrl_toggle_resolution (Thumb, 28 bytes, Stack size 8 bytes, hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution))
[Stack]
- Max Depth = 448
- Call Chain = hal_dsi_rx_ctrl_toggle_resolution ⇒ hal_internal_sync_input_resolution_change ⇒ hal_dsi_tx_ctrl_init ⇒ hal_dsi_tx_init_data_mode ⇒ hal_dsi_tx_init_video_mode ⇒ hal_dsi_tx_calc_video_chunks ⇒ ceil ⇒ __aeabi_drsub ⇒ __aeabi_dadd ⇒ _double_epilogue ⇒ __aeabi_llsr
[Calls]- >> hal_internal_sync_input_resolution_change
[Called By]- >> pps_update_handle
- >> ap_set_exit_sleep_mode
hal_dsi_tx_ctrl_create_handle (Thumb, 34 bytes, Stack size 8 bytes, hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle))
[Stack]
- Max Depth = 8
- Call Chain = hal_dsi_tx_ctrl_create_handle
[Calls]
[Called By]
hal_dsi_tx_ctrl_deinit (Thumb, 68 bytes, Stack size 8 bytes, hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit))
[Stack]
- Max Depth = 104
- Call Chain = hal_dsi_tx_ctrl_deinit ⇒ hal_internal_vsync_set_tx_state ⇒ vsync_set_te_mode ⇒ LOG_printf ⇒ vsprintf
[Calls]- >> drv_crgu_set_clock
- >> drv_crgu_config_reset_modules
- >> hal_internal_vsync_set_tx_state
[Called By]
hal_dsi_tx_ctrl_enter_init_panel_mode (Thumb, 68 bytes, Stack size 32 bytes, hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode))
[Stack]
- Max Depth = 48
- Call Chain = hal_dsi_tx_ctrl_enter_init_panel_mode ⇒ drv_dsi_tx_command_mode_cfg
[Calls]- >> drv_dsi_tx_mode
- >> drv_dsi_tx_command_mode_cfg
[Called By]
hal_dsi_tx_ctrl_exit_init_panel_mode (Thumb, 32 bytes, Stack size 16 bytes, hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode))
[Stack]
- Max Depth = 32
- Call Chain = hal_dsi_tx_ctrl_exit_init_panel_mode ⇒ drv_dsi_tx_command_mode_cfg
[Calls]- >> drv_dsi_tx_mode
- >> drv_dsi_tx_command_mode_cfg
[Called By]
hal_dsi_tx_ctrl_init (Thumb, 188 bytes, Stack size 72 bytes, hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init))
[Stack]
- Max Depth = 392
- Call Chain = hal_dsi_tx_ctrl_init ⇒ hal_dsi_tx_init_data_mode ⇒ hal_dsi_tx_init_video_mode ⇒ hal_dsi_tx_calc_video_chunks ⇒ ceil ⇒ __aeabi_drsub ⇒ __aeabi_dadd ⇒ _double_epilogue ⇒ __aeabi_llsr
[Calls]- >> hal_dsi_tx_ctrl_init_clk
- >> hal_dsi_tx_count_lane_rate
- >> hal_dsi_tx_config_params_for_lane_rate
- >> hal_internal_vsync_set_tx_state
- >> hal_internal_vsync_init_tx
- >> drv_dsi_tx_powerup
- >> drv_dsi_tx_phy_test_setup
- >> drv_dsi_tx_phy_status_ready
- >> hal_lcdc_init_clk
- >> hal_lcdc_init_cfg
- >> hal_dsi_tx_init_remains
- >> hal_dsi_tx_init_phy_cfg
- >> hal_dsi_tx_init_interrupt
- >> hal_dsi_tx_init_dpi_cfg
- >> hal_dsi_tx_init_data_mode
- >> __aeabi_memclr4
[Called By]- >> hal_internal_sync_input_resolution_change
- >> init_mipi_tx
hal_dsi_tx_ctrl_panel_reset_pin (Thumb, 12 bytes, Stack size 8 bytes, hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_panel_reset_pin))
[Stack]
- Max Depth = 16
- Call Chain = hal_dsi_tx_ctrl_panel_reset_pin ⇒ hal_gpio_set_output_data
[Calls]- >> hal_gpio_set_output_data
[Called By]
hal_dsi_tx_ctrl_set_ccm (Thumb, 28 bytes, Stack size 24 bytes, hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm))
[Stack]
- Max Depth = 32
- Call Chain = hal_dsi_tx_ctrl_set_ccm ⇒ drv_param_init_set_ccm
[Calls]- >> drv_param_init_set_ccm
- >> drv_lcdc_config_int_single
[Called By]
hal_dsi_tx_ctrl_set_overwrite_rgb (Thumb, 16 bytes, Stack size 8 bytes, hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb))
[Stack]
- Max Depth = 8
- Call Chain = hal_dsi_tx_ctrl_set_overwrite_rgb
[Calls]- >> drv_lcdc_config_overwrite_rgb
[Called By]
hal_dsi_tx_ctrl_set_partial_disp (Thumb, 12 bytes, Stack size 8 bytes, hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp))
[Stack]
- Max Depth = 8
- Call Chain = hal_dsi_tx_ctrl_set_partial_disp
[Calls]- >> drv_lcdc_config_partial_display_enable
[Called By]- >> hal_lcdc_config_upscaler
hal_dsi_tx_ctrl_set_partial_disp_area (Thumb, 30 bytes, Stack size 24 bytes, hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp_area))
[Stack]
- Max Depth = 40
- Call Chain = hal_dsi_tx_ctrl_set_partial_disp_area ⇒ drv_lcdc_config_partial_display_area
[Calls]- >> drv_lcdc_config_partial_display_area
[Called By]- >> hal_lcdc_config_upscaler
hal_dsi_tx_ctrl_start (Thumb, 94 bytes, Stack size 16 bytes, hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start))
[Stack]
- Max Depth = 112
- Call Chain = hal_dsi_tx_ctrl_start ⇒ hal_internal_vsync_set_tx_state ⇒ vsync_set_te_mode ⇒ LOG_printf ⇒ vsprintf
[Calls]- >> hal_internal_vsync_set_tx_state
- >> drv_lcdc_start
- >> drv_lcdc_set_video_hw_mode
- >> drv_lcdc_enable_shadow_reg
- >> drv_lcdc_config_overwrite
- >> drv_dsi_tx_phy_clock_lane_req_hs
- >> drv_dsi_tx_config_eotp
[Called By]- >> hal_internal_sync_input_resolution_change
- >> ap_demo
hal_dsi_tx_ctrl_stop (Thumb, 54 bytes, Stack size 8 bytes, hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop))
[Stack]
- Max Depth = 104
- Call Chain = hal_dsi_tx_ctrl_stop ⇒ hal_internal_vsync_set_tx_state ⇒ vsync_set_te_mode ⇒ LOG_printf ⇒ vsprintf
[Calls]- >> hal_internal_vsync_set_tx_state
- >> drv_lcdc_start
- >> drv_lcdc_set_int
- >> drv_dsi_tx_shutdown
- >> drv_dsi_tx_set_int
[Called By]
hal_dsi_tx_ctrl_write_array_cmd (Thumb, 210 bytes, Stack size 48 bytes, hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd))
[Stack]
- Max Depth = 100
- Call Chain = hal_dsi_tx_ctrl_write_array_cmd ⇒ hal_dsi_tx_send_cmd ⇒ drv_dsi_tx_phy_status_stopstate ⇒ __ARM_common_switch8
[Calls]- >> drv_dsi_tx_get_cmd_status
- >> drv_dsi_tx_command_put_payload
- >> hal_dsi_tx_send_cmd
[Called By]
hal_dsi_tx_ctrl_write_cmd (Thumb, 172 bytes, Stack size 48 bytes, hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd))
[Stack]
- Max Depth = 100
- Call Chain = hal_dsi_tx_ctrl_write_cmd ⇒ hal_dsi_tx_send_cmd ⇒ drv_dsi_tx_phy_status_stopstate ⇒ __ARM_common_switch8
[Calls]- >> drv_dsi_tx_get_cmd_status
- >> drv_dsi_tx_command_put_payload
- >> hal_dsi_tx_send_cmd
[Called By]- >> init_panel
- >> ap_set_exit_sleep_mode
- >> ap_set_enter_sleep_mode
- >> ap_set_display_off
- >> ap_set_backlight_51
- >> ap_demo
hal_gpio_ctrl_eint (Thumb, 18 bytes, Stack size 8 bytes, hal_gpio.o(i.hal_gpio_ctrl_eint))
[Stack]
- Max Depth = 24
- Call Chain = hal_gpio_ctrl_eint ⇒ drv_gpio_set_int
[Calls]
[Called By]
hal_gpio_get_input_data (Thumb, 18 bytes, Stack size 8 bytes, hal_gpio.o(i.hal_gpio_get_input_data))
[Stack]
- Max Depth = 8
- Call Chain = hal_gpio_get_input_data
[Calls]- >> drv_gpio_get_input_data
[Called By]- >> S20_Start_init
- >> app_tp_transfer_screen_int
hal_gpio_init_eint (Thumb, 58 bytes, Stack size 24 bytes, hal_gpio.o(i.hal_gpio_init_eint))
[Stack]
- Max Depth = 32
- Call Chain = hal_gpio_init_eint ⇒ hal_gpio_set_mode
[Calls]- >> hal_gpio_set_mode
- >> drv_sys_cfg_sel_int_trig
- >> drv_sys_cfg_sel_gpio_group
- >> drv_sys_cfg_clear_pending
- >> drv_gpio_set_ioe
[Called By]
hal_gpio_init_input (Thumb, 28 bytes, Stack size 8 bytes, hal_gpio.o(i.hal_gpio_init_input))
[Stack]
- Max Depth = 16
- Call Chain = hal_gpio_init_input ⇒ hal_gpio_set_mode
[Calls]- >> hal_gpio_set_mode
- >> drv_gpio_set_ioe
[Called By]
hal_gpio_init_output (Thumb, 34 bytes, Stack size 8 bytes, hal_gpio.o(i.hal_gpio_init_output))
[Stack]
- Max Depth = 16
- Call Chain = hal_gpio_init_output ⇒ hal_gpio_set_mode
[Calls]- >> hal_gpio_set_mode
- >> drv_gpio_set_ioe
- >> drv_gpio_set_output_data
[Called By]- >> app_tp_screen_init
- >> app_tp_init
- >> Gpio_swire_output
- >> init_panel
- >> ap_demo
hal_gpio_reg_eint_cb (Thumb, 20 bytes, Stack size 8 bytes, hal_gpio.o(i.hal_gpio_reg_eint_cb))
[Stack]
- Max Depth = 8
- Call Chain = hal_gpio_reg_eint_cb
[Calls]- >> drv_gpio_register_callback
[Called By]
hal_gpio_set_ap_reset_int (Thumb, 76 bytes, Stack size 16 bytes, hal_gpio.o(i.hal_gpio_set_ap_reset_int))
[Stack]
- Max Depth = 24
- Call Chain = hal_gpio_set_ap_reset_int ⇒ drv_sys_cfg_clear_pending
[Calls]- >> drv_sys_cfg_set_int
- >> drv_sys_cfg_sel_ap_rst_trig
- >> drv_sys_cfg_clear_pending
- >> drv_gpio_register_ap_reset_callback
[Called By]
hal_gpio_set_mode (Thumb, 90 bytes, Stack size 8 bytes, hal_gpio.o(i.hal_gpio_set_mode))
[Stack]
- Max Depth = 8
- Call Chain = hal_gpio_set_mode
[Calls]- >> drv_gpio_set_mode3
- >> drv_gpio_set_mode2
- >> drv_gpio_set_mode1
- >> drv_gpio_set_mode0
[Called By]- >> hal_i2c_s_init
- >> hal_i2c_m_dma_init
- >> hal_gpio_init_input
- >> hal_gpio_init_eint
- >> hal_gpio_init_output
- >> open_mipi_rx
- >> hal_uart_init
hal_gpio_set_output_data (Thumb, 8 bytes, Stack size 8 bytes, hal_gpio.o(i.hal_gpio_set_output_data))
[Stack]
- Max Depth = 8
- Call Chain = hal_gpio_set_output_data
[Calls]- >> drv_gpio_set_output_data
[Called By]- >> app_tp_screen_analysis_int
- >> app_tp_phone_analysis_data
- >> app_tp_screen_reset
- >> app_tp_screen_init
- >> hal_dsi_tx_ctrl_panel_reset_pin
- >> Gpio_swire_output
- >> ap_set_enter_sleep_mode
- >> ap_demo
hal_gpio_set_pull_state (Thumb, 26 bytes, Stack size 8 bytes, hal_gpio.o(i.hal_gpio_set_pull_state))
[Stack]
- Max Depth = 32
- Call Chain = hal_gpio_set_pull_state ⇒ drv_gpio_set_pull_state ⇒ __ARM_common_switch8
[Calls]- >> drv_gpio_set_pull_state
[Called By]- >> S20_Start_init
- >> app_tp_init
hal_i2c_m_dma_init (Thumb, 92 bytes, Stack size 16 bytes, hal_i2c_master.o(i.hal_i2c_m_dma_init))
[Stack]
- Max Depth = 52
- Call Chain = hal_i2c_m_dma_init ⇒ drv_i2c_master_init ⇒ __aeabi_uidivmod
[Calls]- >> hal_gpio_set_mode
- >> drv_i2c_master_init
- >> drv_i2c_m_set_callback
- >> drv_i2c_m_enable_intr
- >> drv_i2c_enable_tx_dma
- >> drv_i2c_enable_rx_dma
- >> drv_i2c_dma_init
[Called By]
hal_i2c_m_dma_read (Thumb, 26 bytes, Stack size 16 bytes, hal_i2c_master.o(i.hal_i2c_m_dma_read))
[Stack]
- Max Depth = 80
- Call Chain = hal_i2c_m_dma_read ⇒ drv_i2c_master_read_dma ⇒ drv_dma_set_transfer ⇒ drv_dma_set_burst
[Calls]- >> drv_i2c_master_read_dma
[Called By]
hal_i2c_m_dma_write (Thumb, 24 bytes, Stack size 8 bytes, hal_i2c_master.o(i.hal_i2c_m_dma_write))
[Stack]
- Max Depth = 56
- Call Chain = hal_i2c_m_dma_write ⇒ drv_i2c_master_write_dma ⇒ drv_dma_set_transfer ⇒ drv_dma_set_burst
[Calls]- >> drv_i2c_master_write_dma
[Called By]
hal_i2c_m_transfer_complate (Thumb, 6 bytes, Stack size 0 bytes, hal_i2c_master.o(i.hal_i2c_m_transfer_complate))
[Called By]
- >> app_tp_screen_reset
- >> S20_Start_init
- >> app_tp_transfer_screen_const
- >> app_tp_transfer_screen_int
- >> ap_tp_calibration
hal_i2c_s_dma_write (Thumb, 46 bytes, Stack size 16 bytes, hal_i2c_slave.o(i.hal_i2c_s_dma_write))
[Stack]
- Max Depth = 36
- Call Chain = hal_i2c_s_dma_write ⇒ drv_i2c_slave_write_dma ⇒ drv_dma_prepar_transfer
[Calls]- >> drv_i2c_slave_write_dma
- >> drv_dma_disenable_channel
[Called By]
hal_i2c_s_init (Thumb, 86 bytes, Stack size 16 bytes, hal_i2c_slave.o(i.hal_i2c_s_init))
[Stack]
- Max Depth = 36
- Call Chain = hal_i2c_s_init ⇒ drv_i2c_dma_init
[Calls]- >> hal_gpio_set_mode
- >> drv_sys_cfg_set_dma_tx_req
- >> drv_i2c_slave_init
- >> drv_i2c_set_dma_irq_callback
- >> drv_i2c_s_set_callback
- >> drv_i2c_s_enable_intr
- >> drv_dma_enable_channel_interrupts
- >> drv_i2c_enable_tx_dma
- >> drv_i2c_dma_init
[Called By]
hal_i2c_s_nonblocking_read (Thumb, 14 bytes, Stack size 0 bytes, hal_i2c_slave.o(i.hal_i2c_s_nonblocking_read))
[Called By]
- >> app_tp_s_read
- >> app_tp_I2C_init
hal_i2c_s_set_transfer (Thumb, 6 bytes, Stack size 0 bytes, hal_i2c_slave.o(i.hal_i2c_s_set_transfer))
[Called By]
hal_internal_init_memc (Thumb, 146 bytes, Stack size 16 bytes, hal_internal_vsync.o(i.hal_internal_init_memc))
[Stack]
- Max Depth = 64
- Call Chain = hal_internal_init_memc ⇒ LOG_printf ⇒ vsprintf
[Calls]- >> drv_memc_set_tear_waveform
- >> drv_memc_set_tear_mode
- >> drv_memc_set_ltpo_mode
- >> drv_memc_set_inten
- >> drv_memc_set_double_buffer
- >> drv_memc_set_data_mode
- >> drv_memc_set_active_height
- >> drv_memc_enable_irq
- >> LOG_printf
[Called By]- >> hal_internal_sync_input_resolution_change
hal_internal_sync_get_fb_setting (Thumb, 12 bytes, Stack size 8 bytes, hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting))
[Stack]
- Max Depth = 8
- Call Chain = hal_internal_sync_get_fb_setting
[Calls]
[Called By]- >> hal_dsi_rx_ctrl_init_vidc
- >> hal_dsi_rx_ctrl_init_memc
- >> hal_dsi_rx_ctrl_set_cus_scld_filter
- >> hal_lcdc_init_clk
- >> hal_lcdc_init_cfg
hal_internal_sync_input_resolution_change (Thumb, 418 bytes, Stack size 48 bytes, hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change))
[Stack]
- Max Depth = 440
- Call Chain = hal_internal_sync_input_resolution_change ⇒ hal_dsi_tx_ctrl_init ⇒ hal_dsi_tx_init_data_mode ⇒ hal_dsi_tx_init_video_mode ⇒ hal_dsi_tx_calc_video_chunks ⇒ ceil ⇒ __aeabi_drsub ⇒ __aeabi_dadd ⇒ _double_epilogue ⇒ __aeabi_llsr
[Calls]- >> drv_vidc_enable
- >> drv_memc_set_tear_mode
- >> drv_crgu_config_reset_modules
- >> hal_dsi_rx_ctrl_gen_a_tear_signal
- >> hal_dsi_tx_ctrl_start
- >> hal_dsi_tx_ctrl_init
- >> hal_dsi_rx_ctrl_start
- >> hal_dsi_rx_ctrl_init
- >> delayUs
- >> LOG_printf
- >> drv_dsi_tx_shutdown
- >> drv_vidc_reset
- >> drv_rxbr_clear_status0
- >> hal_internal_init_memc
- >> calc_framebuffer_setting
[Called By]- >> hal_dsi_rx_ctrl_toggle_resolution
hal_internal_vsync_deinit (Thumb, 24 bytes, Stack size 16 bytes, hal_internal_vsync.o(i.hal_internal_vsync_deinit))
[Stack]
- Max Depth = 16
- Call Chain = hal_internal_vsync_deinit
[Calls]
[Called By]- >> hal_internal_vsync_set_rx_state
- >> hal_internal_vsync_set_tx_state
hal_internal_vsync_get_rx_state (Thumb, 6 bytes, Stack size 0 bytes, hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state))
[Called By]
- >> hal_dsi_rx_ctrl_deinit
hal_internal_vsync_get_sync_line (Thumb, 18 bytes, Stack size 0 bytes, hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line))
[Called By]
- >> hal_lcdc_init_interrupt
hal_internal_vsync_get_tx_state (Thumb, 6 bytes, Stack size 0 bytes, hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state))
[Called By]
- >> hal_dsi_rx_ctrl_deinit
hal_internal_vsync_init_rx (Thumb, 220 bytes, Stack size 72 bytes, hal_internal_vsync.o(i.hal_internal_vsync_init_rx))
[Stack]
- Max Depth = 272
- Call Chain = hal_internal_vsync_init_rx ⇒ calc_framebuffer_setting ⇒ __aeabi_dmul ⇒ _double_epilogue ⇒ __aeabi_llsr
[Calls]- >> drv_vidc_register_callback
- >> drv_rxbr_register_irq1_callback
- >> drv_rxbr_register_irq0_callback
- >> drv_chip_rx_info_check
- >> dcs_packet_fifo_init
- >> check_mipi_rx_tx_video_info
- >> calc_framebuffer_setting
- >> __aeabi_memcpy4
[Called By]
hal_internal_vsync_init_tx (Thumb, 172 bytes, Stack size 56 bytes, hal_internal_vsync.o(i.hal_internal_vsync_init_tx))
[Stack]
- Max Depth = 256
- Call Chain = hal_internal_vsync_init_tx ⇒ calc_framebuffer_setting ⇒ __aeabi_dmul ⇒ _double_epilogue ⇒ __aeabi_llsr
[Calls]- >> check_mipi_rx_tx_video_info
- >> calc_framebuffer_setting
- >> __aeabi_memcpy4
[Called By]
hal_internal_vsync_set_auto_hw_filter (Thumb, 222 bytes, Stack size 32 bytes, hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter))
[Stack]
- Max Depth = 80
- Call Chain = hal_internal_vsync_set_auto_hw_filter ⇒ LOG_printf ⇒ vsprintf
[Calls]- >> drv_rxbr_set_cmd_filter
- >> LOG_printf
[Called By]- >> hal_dsi_rx_ctrl_init_rxbr
hal_internal_vsync_set_rx_state (Thumb, 16 bytes, Stack size 8 bytes, hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state))
[Stack]
- Max Depth = 24
- Call Chain = hal_internal_vsync_set_rx_state ⇒ hal_internal_vsync_deinit
[Calls]- >> hal_internal_vsync_deinit
[Called By]- >> hal_dsi_rx_ctrl_stop
- >> hal_dsi_rx_ctrl_start
- >> hal_dsi_rx_ctrl_init
- >> hal_dsi_rx_ctrl_deinit
hal_internal_vsync_set_sync_line (Thumb, 22 bytes, Stack size 8 bytes, hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line))
[Stack]
- Max Depth = 20
- Call Chain = hal_internal_vsync_set_sync_line ⇒ __aeabi_uidivmod
[Calls]
[Called By]- >> hal_dsi_rx_ctrl_set_cus_sync_line
hal_internal_vsync_set_tear_mode (Thumb, 64 bytes, Stack size 16 bytes, hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode))
[Stack]
- Max Depth = 96
- Call Chain = hal_internal_vsync_set_tear_mode ⇒ vsync_set_te_mode ⇒ LOG_printf ⇒ vsprintf
[Calls]- >> drv_vidc_enable
- >> vsync_set_te_mode
- >> __aeabi_uidivmod
[Called By]- >> hal_dsi_rx_ctrl_set_tear_mode_ex
- >> hal_dsi_rx_ctrl_set_sw_tear_mode
hal_internal_vsync_set_tx_state (Thumb, 54 bytes, Stack size 16 bytes, hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state))
[Stack]
- Max Depth = 96
- Call Chain = hal_internal_vsync_set_tx_state ⇒ vsync_set_te_mode ⇒ LOG_printf ⇒ vsprintf
[Calls]- >> drv_lcdc_config_overwrite
- >> hal_internal_vsync_deinit
- >> vsync_set_te_mode
[Called By]- >> hal_dsi_tx_ctrl_stop
- >> hal_dsi_tx_ctrl_start
- >> hal_dsi_tx_ctrl_init
- >> hal_dsi_tx_ctrl_deinit
hal_spi_m_clear_rxfifo (Thumb, 14 bytes, Stack size 8 bytes, hal_spi_master.o(i.hal_spi_m_clear_rxfifo))
[Stack]
- Max Depth = 8
- Call Chain = hal_spi_m_clear_rxfifo
[Calls]
[Called By]- >> app_tp_transfer_screen_const
hal_system_enable_systick (Thumb, 8 bytes, Stack size 8 bytes, hal_system.o(i.hal_system_enable_systick))
[Stack]
- Max Depth = 36
- Call Chain = hal_system_enable_systick ⇒ drv_common_enable_systick ⇒ __aeabi_uidivmod
[Calls]- >> drv_common_enable_systick
[Called By]
hal_system_init (Thumb, 104 bytes, Stack size 8 bytes, hal_system.o(i.hal_system_init))
[Stack]
- Max Depth = 32
- Call Chain = hal_system_init ⇒ drv_common_system_init ⇒ drv_chip_info_init ⇒ drv_efuse_read
[Calls]- >> drv_crgu_set_clock
- >> handle_init
- >> drv_sys_cfg_clear_all_int
- >> drv_pwr_set_system_clk_src
- >> drv_pwr_set_pvd_mode
- >> drv_crgu_set_ahb_src
- >> drv_crgu_set_ahb_pre_div
- >> drv_common_system_init
[Called By]
hal_system_init_console (Thumb, 28 bytes, Stack size 24 bytes, hal_system.o(i.hal_system_init_console))
[Stack]
- Max Depth = 124
- Call Chain = hal_system_init_console ⇒ hal_uart_init ⇒ UART_init ⇒ UART_SetBaudRate ⇒ __aeabi_uidivmod
[Calls]
[Called By]
hal_system_set_phy_calibration (Thumb, 8 bytes, Stack size 8 bytes, hal_system.o(i.hal_system_set_phy_calibration))
[Stack]
- Max Depth = 8
- Call Chain = hal_system_set_phy_calibration
[Calls]- >> drv_phy_enable_calibration
[Called By]
hal_system_set_pvd (Thumb, 8 bytes, Stack size 8 bytes, hal_system.o(i.hal_system_set_pvd))
[Stack]
- Max Depth = 8
- Call Chain = hal_system_set_pvd
[Calls]
[Called By]
hal_system_set_vcc (Thumb, 8 bytes, Stack size 8 bytes, hal_system.o(i.hal_system_set_vcc))
[Stack]
- Max Depth = 8
- Call Chain = hal_system_set_vcc
[Calls]
[Called By]- >> ap_reset_cb
- >> ap_demo
hal_timer_init (Thumb, 26 bytes, Stack size 8 bytes, hal_timer.o(i.hal_timer_init))
[Stack]
- Max Depth = 12
- Call Chain = hal_timer_init ⇒ drv_timer_set_prescaler
[Calls]- >> drv_crgu_set_clock
- >> drv_timer_set_prescaler
[Called By]
hal_timer_start (Thumb, 74 bytes, Stack size 16 bytes, hal_timer.o(i.hal_timer_start))
[Stack]
- Max Depth = 32
- Call Chain = hal_timer_start ⇒ drv_timer_set_int
[Calls]- >> drv_timer_set_match
- >> drv_timer_set_int
- >> drv_timer_set_current_count
- >> drv_timer_register_callback
- >> drv_timer_get_prescaler
- >> drv_timer_enable
- >> __aeabi_uidivmod
[Called By]- >> soft_timer3_cb
- >> ap_demo
hal_uart_init (Thumb, 126 bytes, Stack size 40 bytes, hal_uart.o(i.hal_uart_init))
[Stack]
- Max Depth = 100
- Call Chain = hal_uart_init ⇒ UART_init ⇒ UART_SetBaudRate ⇒ __aeabi_uidivmod
[Calls]- >> hal_gpio_set_mode
- >> UART_init
- >> __aeabi_memclr4
[Called By]- >> hal_system_init_console
hal_uart_transmit_blocking (Thumb, 12 bytes, Stack size 8 bytes, hal_uart.o(i.hal_uart_transmit_blocking))
[Stack]
- Max Depth = 8
- Call Chain = hal_uart_transmit_blocking
[Calls]
[Called By]
handle_init (Thumb, 140 bytes, Stack size 0 bytes, irq_redirect .o(i.handle_init))
[Called By]
main (Thumb, 10 bytes, Stack size 0 bytes, main.o(i.main))
[Stack]
- Max Depth = 432
- Call Chain = main ⇒ ap_demo ⇒ open_mipi_rx ⇒ hal_dsi_rx_ctrl_init ⇒ hal_internal_vsync_init_rx ⇒ calc_framebuffer_setting ⇒ __aeabi_dmul ⇒ _double_epilogue ⇒ __aeabi_llsr
[Calls]
[Address Reference Count : 1]- entry9a.o(.ARM.Collect$$$$0000000B)
sqrt (Thumb, 66 bytes, Stack size 24 bytes, sqrt.o(i.sqrt))
[Stack]
- Max Depth = 64
- Call Chain = sqrt ⇒ _dsqrt ⇒ __aeabi_llsr
[Calls]
[Called By]- >> calc_framebuffer_setting
Local Symbols
__NVIC_SetPriority (Thumb, 60 bytes, Stack size 0 bytes, ap_demo.o(i.__NVIC_SetPriority))
[Called By]
ap_dcs_read (Thumb, 3950 bytes, Stack size 192 bytes, ap_demo.o(i.ap_dcs_read))
[Stack]
- Max Depth = 288
- Call Chain = ap_dcs_read ⇒ hal_dsi_rx_ctrl_send_ack_cmd ⇒ LOG_printf ⇒ vsprintf
[Calls]- >> hal_dsi_rx_ctrl_send_ack_cmd
- >> hal_dsi_rx_ctrl_get_max_ret_size
- >> LOG_printf
[Address Reference Count : 1]- ap_demo.o(i.open_mipi_rx)
ap_get_reg_df (Thumb, 136 bytes, Stack size 72 bytes, ap_demo.o(i.ap_get_reg_df))
[Stack]
- Max Depth = 104
- Call Chain = ap_get_reg_df ⇒ hal_dsi_tx_ctrl_set_ccm ⇒ drv_param_init_set_ccm
[Calls]- >> hal_dsi_tx_ctrl_set_ccm
- >> __aeabi_memcpy4
[Address Reference Count : 1]
ap_reset_cb (Thumb, 42 bytes, Stack size 0 bytes, ap_demo.o(i.ap_reset_cb))
[Stack]
- Max Depth = 48
- Call Chain = ap_reset_cb ⇒ LOG_printf ⇒ vsprintf
[Calls]- >> hal_system_set_vcc
- >> hal_system_set_pvd
- >> LOG_printf
[Address Reference Count : 1]
ap_set_backlight_51 (Thumb, 28 bytes, Stack size 16 bytes, ap_demo.o(i.ap_set_backlight_51))
[Stack]
- Max Depth = 116
- Call Chain = ap_set_backlight_51 ⇒ hal_dsi_tx_ctrl_write_cmd ⇒ hal_dsi_tx_send_cmd ⇒ drv_dsi_tx_phy_status_stopstate ⇒ __ARM_common_switch8
[Calls]- >> hal_dsi_tx_ctrl_write_cmd
[Address Reference Count : 1]
ap_set_display_off (Thumb, 30 bytes, Stack size 8 bytes, ap_demo.o(i.ap_set_display_off))
[Stack]
- Max Depth = 108
- Call Chain = ap_set_display_off ⇒ hal_dsi_tx_ctrl_write_cmd ⇒ hal_dsi_tx_send_cmd ⇒ drv_dsi_tx_phy_status_stopstate ⇒ __ARM_common_switch8
[Calls]- >> hal_dsi_tx_ctrl_write_cmd
- >> LOG_printf
[Address Reference Count : 1]
ap_set_display_on (Thumb, 16 bytes, Stack size 8 bytes, ap_demo.o(i.ap_set_display_on))
[Stack]
- Max Depth = 56
- Call Chain = ap_set_display_on ⇒ LOG_printf ⇒ vsprintf
[Calls]
[Address Reference Count : 1]
ap_set_enter_sleep_mode (Thumb, 72 bytes, Stack size 8 bytes, ap_demo.o(i.ap_set_enter_sleep_mode))
[Stack]
- Max Depth = 112
- Call Chain = ap_set_enter_sleep_mode ⇒ hal_dsi_rx_ctrl_set_sw_tear_mode ⇒ hal_internal_vsync_set_tear_mode ⇒ vsync_set_te_mode ⇒ LOG_printf ⇒ vsprintf
[Calls]- >> hal_gpio_set_output_data
- >> hal_dsi_tx_ctrl_write_cmd
- >> hal_dsi_rx_ctrl_set_sw_tear_mode
- >> delayMs
- >> LOG_printf
- >> Gpio_swire_output
[Address Reference Count : 1]
ap_set_exit_sleep_mode (Thumb, 58 bytes, Stack size 8 bytes, ap_demo.o(i.ap_set_exit_sleep_mode))
[Stack]
- Max Depth = 456
- Call Chain = ap_set_exit_sleep_mode ⇒ hal_dsi_rx_ctrl_toggle_resolution ⇒ hal_internal_sync_input_resolution_change ⇒ hal_dsi_tx_ctrl_init ⇒ hal_dsi_tx_init_data_mode ⇒ hal_dsi_tx_init_video_mode ⇒ hal_dsi_tx_calc_video_chunks ⇒ ceil ⇒ __aeabi_drsub ⇒ __aeabi_dadd ⇒ _double_epilogue ⇒ __aeabi_llsr
[Calls]- >> hal_dsi_tx_ctrl_write_cmd
- >> hal_dsi_rx_ctrl_toggle_resolution
- >> delayMs
- >> LOG_printf
[Address Reference Count : 1]
ap_set_tp_calibration_04 (Thumb, 22 bytes, Stack size 0 bytes, ap_demo.o(i.ap_set_tp_calibration_04))
[Address Reference Count : 1]
ap_update_frame_rate (Thumb, 58 bytes, Stack size 8 bytes, ap_demo.o(i.ap_update_frame_rate))
[Stack]
- Max Depth = 112
- Call Chain = ap_update_frame_rate ⇒ hal_dsi_rx_ctrl_set_tear_mode_ex ⇒ hal_internal_vsync_set_tear_mode ⇒ vsync_set_te_mode ⇒ LOG_printf ⇒ vsprintf
[Calls]- >> hal_dsi_rx_ctrl_set_tear_mode_ex
- >> LOG_printf
[Address Reference Count : 1]
init_mipi_tx (Thumb, 104 bytes, Stack size 16 bytes, ap_demo.o(i.init_mipi_tx))
[Stack]
- Max Depth = 408
- Call Chain = init_mipi_tx ⇒ hal_dsi_tx_ctrl_init ⇒ hal_dsi_tx_init_data_mode ⇒ hal_dsi_tx_init_video_mode ⇒ hal_dsi_tx_calc_video_chunks ⇒ ceil ⇒ __aeabi_drsub ⇒ __aeabi_dadd ⇒ _double_epilogue ⇒ __aeabi_llsr
[Calls]- >> hal_dsi_tx_ctrl_set_overwrite_rgb
- >> hal_dsi_tx_ctrl_init
- >> hal_dsi_tx_ctrl_create_handle
[Called By]
init_panel (Thumb, 142 bytes, Stack size 32 bytes, ap_demo.o(i.init_panel))
[Stack]
- Max Depth = 132
- Call Chain = init_panel ⇒ hal_dsi_tx_ctrl_write_cmd ⇒ hal_dsi_tx_send_cmd ⇒ drv_dsi_tx_phy_status_stopstate ⇒ __ARM_common_switch8
[Calls]- >> hal_gpio_init_output
- >> hal_dsi_tx_ctrl_write_cmd
- >> hal_dsi_tx_ctrl_write_array_cmd
- >> hal_dsi_tx_ctrl_panel_reset_pin
- >> hal_dsi_tx_ctrl_exit_init_panel_mode
- >> hal_dsi_tx_ctrl_enter_init_panel_mode
- >> delayUs
- >> delayMs
- >> Gpio_swire_output
[Called By]
open_mipi_rx (Thumb, 162 bytes, Stack size 144 bytes, ap_demo.o(i.open_mipi_rx))
[Stack]
- Max Depth = 432
- Call Chain = open_mipi_rx ⇒ hal_dsi_rx_ctrl_init ⇒ hal_internal_vsync_init_rx ⇒ calc_framebuffer_setting ⇒ __aeabi_dmul ⇒ _double_epilogue ⇒ __aeabi_llsr
[Calls]- >> hal_gpio_set_mode
- >> hal_dsi_rx_ctrl_start
- >> hal_dsi_rx_ctrl_set_cus_sync_line
- >> hal_dsi_rx_ctrl_set_cus_scld_filter
- >> hal_dsi_rx_ctrl_set_cus_esc_clk
- >> hal_dsi_rx_ctrl_pre_init_pps
- >> hal_dsi_rx_ctrl_init
- >> hal_dsi_rx_ctrl_create_handle
- >> __aeabi_memcpy4
[Called By]
pps_update_handle (Thumb, 90 bytes, Stack size 24 bytes, ap_demo.o(i.pps_update_handle))
[Stack]
- Max Depth = 472
- Call Chain = pps_update_handle ⇒ hal_dsi_rx_ctrl_toggle_resolution ⇒ hal_internal_sync_input_resolution_change ⇒ hal_dsi_tx_ctrl_init ⇒ hal_dsi_tx_init_data_mode ⇒ hal_dsi_tx_init_video_mode ⇒ hal_dsi_tx_calc_video_chunks ⇒ ceil ⇒ __aeabi_drsub ⇒ __aeabi_dadd ⇒ _double_epilogue ⇒ __aeabi_llsr
[Calls]- >> hal_dsi_rx_ctrl_toggle_resolution
- >> LOG_printf
[Address Reference Count : 1]- ap_demo.o(i.open_mipi_rx)
soft_timer3_cb (Thumb, 36 bytes, Stack size 8 bytes, ap_demo.o(i.soft_timer3_cb))
[Stack]
- Max Depth = 40
- Call Chain = soft_timer3_cb ⇒ hal_timer_start ⇒ drv_timer_set_int
[Calls]
[Address Reference Count : 2]- ap_demo.o(i.soft_timer3_cb)
- ap_demo.o(i.ap_demo)
app_tp_i2cs_callback (Thumb, 42 bytes, Stack size 16 bytes, app_tp_transfer.o(i.app_tp_i2cs_callback))
[Stack]
- Max Depth = 60
- Call Chain = app_tp_i2cs_callback ⇒ app_tp_s_write ⇒ hal_i2c_s_dma_write ⇒ drv_i2c_slave_write_dma ⇒ drv_dma_prepar_transfer
[Calls]- >> app_tp_phone_analysis_data
- >> app_tp_s_write
- >> app_tp_s_read
[Address Reference Count : 1]- app_tp_transfer.o(i.app_tp_I2C_init)
app_tp_m_read (Thumb, 32 bytes, Stack size 24 bytes, app_tp_transfer.o(i.app_tp_m_read))
[Stack]
- Max Depth = 104
- Call Chain = app_tp_m_read ⇒ hal_i2c_m_dma_read ⇒ drv_i2c_master_read_dma ⇒ drv_dma_set_transfer ⇒ drv_dma_set_burst
[Calls]
[Called By]- >> S20_Start_init
- >> app_tp_transfer_screen_int
app_tp_m_write (Thumb, 8 bytes, Stack size 8 bytes, app_tp_transfer.o(i.app_tp_m_write))
[Stack]
- Max Depth = 64
- Call Chain = app_tp_m_write ⇒ hal_i2c_m_dma_write ⇒ drv_i2c_master_write_dma ⇒ drv_dma_set_transfer ⇒ drv_dma_set_burst
[Calls]
[Called By]- >> app_tp_screen_reset
- >> S20_Start_init
- >> ap_tp_calibration
app_tp_screen_int_callback (Thumb, 8 bytes, Stack size 0 bytes, app_tp_transfer.o(i.app_tp_screen_int_callback))
[Address Reference Count : 1]
- app_tp_transfer.o(i.S20_Start_init)
app_tp_transfer_screen_const (Thumb, 50 bytes, Stack size 8 bytes, app_tp_transfer.o(i.app_tp_transfer_screen_const))
[Stack]
- Max Depth = 128
- Call Chain = app_tp_transfer_screen_const ⇒ S20_Start_init ⇒ app_tp_m_read ⇒ hal_i2c_m_dma_read ⇒ drv_i2c_master_read_dma ⇒ drv_dma_set_transfer ⇒ drv_dma_set_burst
[Calls]- >> hal_spi_m_clear_rxfifo
- >> hal_i2c_m_transfer_complate
- >> S20_Start_init
[Called By]- >> app_tp_transfer_screen_start
- >> app_tp_transfer_screen_int
hal_dsi_rx_ctrl_init_clk (Thumb, 232 bytes, Stack size 24 bytes, hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk))
[Stack]
- Max Depth = 72
- Call Chain = hal_dsi_rx_ctrl_init_clk ⇒ LOG_printf ⇒ vsprintf
[Calls]- >> drv_crgu_set_vidc_src
- >> drv_crgu_set_fb_src
- >> drv_crgu_set_fb_div
- >> drv_crgu_set_clock
- >> hal_dsi_rx_ctrl_set_rxbr_clk
- >> LOG_printf
[Called By]
hal_dsi_rx_ctrl_init_dsi_rx (Thumb, 180 bytes, Stack size 24 bytes, hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx))
[Stack]
- Max Depth = 200
- Call Chain = hal_dsi_rx_ctrl_init_dsi_rx ⇒ hal_dsi_rx_ctrl_set_ipi_cfg ⇒ drv_dsi_rx_calc_ipi_tx_delay ⇒ __aeabi_dadd ⇒ _double_epilogue ⇒ __aeabi_llsr
[Calls]- >> drv_rxbr_get_clk
- >> drv_dsi_rx_set_up_phy
- >> drv_dsi_rx_set_resp_cnt
- >> drv_dsi_rx_set_lane_swap
- >> drv_dsi_rx_set_inten
- >> drv_dsi_rx_set_ddi_cfg
- >> drv_dsi_rx_set_ctrl_cfg
- >> drv_dsi_rx_enable_irq
- >> hal_dsi_rx_ctrl_set_ipi_cfg
- >> __aeabi_uidivmod
[Called By]
hal_dsi_rx_ctrl_init_memc (Thumb, 308 bytes, Stack size 48 bytes, hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc))
[Stack]
- Max Depth = 64
- Call Chain = hal_dsi_rx_ctrl_init_memc ⇒ drv_memc_enable_irq ⇒ drv_sys_cfg_clear_pending
[Calls]- >> hal_internal_sync_get_fb_setting
- >> drv_memc_set_vidc_sync_cnt
- >> drv_memc_set_tear_waveform
- >> drv_memc_set_tear_mode
- >> drv_memc_set_ltpo_mode
- >> drv_memc_set_lcdc_st_conditions
- >> drv_memc_set_inten
- >> drv_memc_set_fs_en_conditions
- >> drv_memc_set_double_buffer
- >> drv_memc_set_data_mode
- >> drv_memc_set_active_height
- >> drv_memc_sel_vsync
- >> drv_memc_rate_transfer_sel
- >> drv_memc_enable_irq
- >> __ARM_common_switch8
[Called By]
hal_dsi_rx_ctrl_init_rxbr (Thumb, 288 bytes, Stack size 48 bytes, hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr))
[Stack]
- Max Depth = 128
- Call Chain = hal_dsi_rx_ctrl_init_rxbr ⇒ hal_internal_vsync_set_auto_hw_filter ⇒ LOG_printf ⇒ vsprintf
[Calls]- >> hal_internal_vsync_set_auto_hw_filter
- >> drv_rxbr_set_usr_row
- >> drv_rxbr_set_usr_col
- >> drv_rxbr_set_usr_cfg
- >> drv_rxbr_set_ltpo_drop_th
- >> drv_rxbr_set_inten
- >> drv_rxbr_set_color_format
- >> drv_rxbr_hline_rcv_cfg
- >> drv_rxbr_frame_drop_cfg
- >> drv_rxbr_enable_irq
[Called By]
hal_dsi_rx_ctrl_init_vidc (Thumb, 544 bytes, Stack size 80 bytes, hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc))
[Stack]
- Max Depth = 184
- Call Chain = hal_dsi_rx_ctrl_init_vidc ⇒ __aeabi_dadd ⇒ _double_epilogue ⇒ __aeabi_llsr
[Calls]- >> hal_internal_sync_get_fb_setting
- >> drv_vidc_set_src_parameter
- >> drv_vidc_set_scld_vcoef1
- >> drv_vidc_set_scld_vcoef0
- >> drv_vidc_set_scld_step
- >> drv_vidc_set_scld_hcoef1
- >> drv_vidc_set_scld_hcoef0
- >> drv_vidc_set_rotation
- >> drv_vidc_set_pu_ctrl
- >> drv_vidc_set_pentile_swap
- >> drv_vidc_set_p2r_hinitr
- >> drv_vidc_set_p2r_hinitb
- >> drv_vidc_set_p2r_hcoef0
- >> drv_vidc_set_mirror
- >> drv_vidc_set_irqen
- >> drv_vidc_set_dst_parameter
- >> drv_vidc_init_module_enable
- >> drv_vidc_enable_irq
- >> drv_param_p2r_filter_init
- >> drv_param_init_get_scld_filter_v
- >> drv_param_init_get_scld_filter_h
- >> __aeabi_ui2d
- >> __aeabi_dadd
- >> __aeabi_d2uiz
- >> __aeabi_memcpy4
- >> __aeabi_uidivmod
[Called By]
hal_dsi_rx_ctrl_set_ipi_cfg (Thumb, 50 bytes, Stack size 16 bytes, hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg))
[Stack]
- Max Depth = 176
- Call Chain = hal_dsi_rx_ctrl_set_ipi_cfg ⇒ drv_dsi_rx_calc_ipi_tx_delay ⇒ __aeabi_dadd ⇒ _double_epilogue ⇒ __aeabi_llsr
[Calls]- >> drv_dsi_rx_set_ipi_cfg
- >> drv_dsi_rx_calc_ipi_tx_delay
[Called By]- >> hal_dsi_rx_ctrl_init_dsi_rx
hal_dsi_rx_ctrl_set_rxbr_clk (Thumb, 114 bytes, Stack size 16 bytes, hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk))
[Stack]
- Max Depth = 16
- Call Chain = hal_dsi_rx_ctrl_set_rxbr_clk
[Calls]- >> drv_crgu_set_rxbr_src
- >> drv_crgu_set_rxbr_div
- >> drv_crgu_set_dsco_src_div
- >> drv_crgu_set_dsco_src
- >> drv_crgu_set_dsc_core_div
- >> drv_crgu_set_clock
[Called By]- >> hal_dsi_rx_ctrl_init_clk
hal_dsi_tx_calc_video_chunks (Thumb, 384 bytes, Stack size 136 bytes, hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks))
[Stack]
- Max Depth = 272
- Call Chain = hal_dsi_tx_calc_video_chunks ⇒ ceil ⇒ __aeabi_drsub ⇒ __aeabi_dadd ⇒ _double_epilogue ⇒ __aeabi_llsr
[Calls]- >> __aeabi_d2iz
- >> drv_dsi_tx_set_video_timing
- >> drv_dsi_tx_set_video_chunk
- >> __aeabi_ui2f
- >> __aeabi_i2f
- >> __aeabi_fsub
- >> __aeabi_fmul
- >> __aeabi_fdiv
- >> __aeabi_fadd
- >> __aeabi_f2iz
- >> __aeabi_f2d
- >> __ARM_scalbnf
- >> __aeabi_memclr4
- >> __aeabi_memcpy4
- >> __aeabi_idivmod
- >> ceil
[Called By]- >> hal_dsi_tx_init_video_mode
hal_dsi_tx_config_params_for_lane_rate (Thumb, 42 bytes, Stack size 8 bytes, hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate))
[Stack]
- Max Depth = 44
- Call Chain = hal_dsi_tx_config_params_for_lane_rate ⇒ __aeabi_fadd ⇒ _float_epilogue
[Calls]
[Called By]
hal_dsi_tx_count_lane_rate (Thumb, 1160 bytes, Stack size 120 bytes, hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate))
[Stack]
- Max Depth = 256
- Call Chain = hal_dsi_tx_count_lane_rate ⇒ ceil ⇒ __aeabi_drsub ⇒ __aeabi_dadd ⇒ _double_epilogue ⇒ __aeabi_llsr
[Calls]- >> __aeabi_ui2d
- >> __aeabi_d2uiz
- >> __aeabi_d2iz
- >> LOG_printf
- >> drv_phy_get_rate_para
- >> __aeabi_ui2f
- >> __aeabi_fsub
- >> __aeabi_fmul
- >> __aeabi_fdiv
- >> __aeabi_fadd
- >> __aeabi_f2uiz
- >> __aeabi_f2d
- >> __aeabi_idivmod
- >> __aeabi_uidivmod
- >> ceil
[Called By]
hal_dsi_tx_ctrl_init_clk (Thumb, 36 bytes, Stack size 8 bytes, hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk))
[Stack]
- Max Depth = 8
- Call Chain = hal_dsi_tx_ctrl_init_clk
[Calls]
[Called By]
hal_dsi_tx_init_data_mode (Thumb, 58 bytes, Stack size 24 bytes, hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode))
[Stack]
- Max Depth = 320
- Call Chain = hal_dsi_tx_init_data_mode ⇒ hal_dsi_tx_init_video_mode ⇒ hal_dsi_tx_calc_video_chunks ⇒ ceil ⇒ __aeabi_drsub ⇒ __aeabi_dadd ⇒ _double_epilogue ⇒ __aeabi_llsr
[Calls]- >> drv_dsi_tx_mode
- >> drv_dsi_tx_edpi_cmd_size
- >> hal_dsi_tx_init_video_mode
[Called By]
hal_dsi_tx_init_dpi_cfg (Thumb, 42 bytes, Stack size 16 bytes, hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg))
[Stack]
- Max Depth = 32
- Call Chain = hal_dsi_tx_init_dpi_cfg ⇒ drv_dsi_tx_dpi_polarity
[Calls]- >> drv_dsi_tx_dpi_polarity
- >> drv_dsi_tx_dpi_mode
- >> drv_dsi_tx_dpi_lpcmd_time
[Called By]
hal_dsi_tx_init_interrupt (Thumb, 28 bytes, Stack size 8 bytes, hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt))
[Stack]
- Max Depth = 16
- Call Chain = hal_dsi_tx_init_interrupt ⇒ drv_dsi_tx_set_int
[Calls]- >> drv_dsi_tx_set_int
- >> drv_dsi_tx_config_int
[Called By]
hal_dsi_tx_init_phy_cfg (Thumb, 28 bytes, Stack size 16 bytes, hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg))
[Stack]
- Max Depth = 24
- Call Chain = hal_dsi_tx_init_phy_cfg ⇒ drv_dsi_tx_phy_time_cfg
[Calls]- >> drv_dsi_tx_phy_time_cfg
- >> drv_dsi_tx_phy_lane_mode
[Called By]
hal_dsi_tx_init_remains (Thumb, 142 bytes, Stack size 56 bytes, hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains))
[Stack]
- Max Depth = 72
- Call Chain = hal_dsi_tx_init_remains ⇒ drv_dsi_tx_timeout_cfg
[Calls]- >> drv_dsi_tx_timeout_cfg
- >> drv_dsi_tx_set_time_out_div
- >> drv_dsi_tx_set_esc_div
- >> drv_dsi_tx_response_mode
- >> drv_dsi_tx_phy_clock_lane_req_hs
- >> drv_dsi_tx_phy_clock_lane_auto_lp
- >> drv_dsi_tx_config_eotp
[Called By]
hal_dsi_tx_init_video_mode (Thumb, 82 bytes, Stack size 24 bytes, hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode))
[Stack]
- Max Depth = 296
- Call Chain = hal_dsi_tx_init_video_mode ⇒ hal_dsi_tx_calc_video_chunks ⇒ ceil ⇒ __aeabi_drsub ⇒ __aeabi_dadd ⇒ _double_epilogue ⇒ __aeabi_llsr
[Calls]- >> hal_dsi_tx_calc_video_chunks
- >> drv_dsi_tx_video_mode_set_lp_cmd
- >> drv_dsi_tx_video_mode_disable_hact_cmd
- >> drv_dsi_tx_video_mode_cfg
- >> drv_dsi_tx_set_bta_ack
[Called By]- >> hal_dsi_tx_init_data_mode
hal_dsi_tx_send_cmd (Thumb, 60 bytes, Stack size 40 bytes, hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd))
[Stack]
- Max Depth = 52
- Call Chain = hal_dsi_tx_send_cmd ⇒ drv_dsi_tx_phy_status_stopstate ⇒ __ARM_common_switch8
[Calls]- >> drv_dsi_tx_phy_status_stopstate
- >> drv_dsi_tx_get_cmd_status
- >> drv_dsi_tx_command_header
[Called By]- >> hal_dsi_tx_ctrl_write_cmd
- >> hal_dsi_tx_ctrl_write_array_cmd
hal_lcdc_config_ccm (Thumb, 30 bytes, Stack size 16 bytes, hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm))
[Stack]
- Max Depth = 16
- Call Chain = hal_lcdc_config_ccm
[Calls]- >> drv_param_init_get_ccm
- >> drv_lcdc_config_ccm
- >> drv_lcdc_config_bypass
[Called By]
hal_lcdc_config_remains (Thumb, 68 bytes, Stack size 24 bytes, hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains))
[Stack]
- Max Depth = 40
- Call Chain = hal_lcdc_config_remains ⇒ drv_lcdc_config_dpi_polarity
[Calls]- >> drv_lcdc_config_thresh
- >> drv_lcdc_config_src_parameter
- >> drv_lcdc_config_endianness
- >> drv_lcdc_config_edpi_mode
- >> drv_lcdc_config_dpi_polarity
- >> drv_lcdc_config_disp_mode
[Called By]
hal_lcdc_config_rgb_to_pentile (Thumb, 14 bytes, Stack size 8 bytes, hal_dsi_tx_ctrl.o(i.hal_lcdc_config_rgb_to_pentile))
[Stack]
- Max Depth = 8
- Call Chain = hal_lcdc_config_rgb_to_pentile
[Calls]- >> drv_lcdc_config_bypass
[Called By]
hal_lcdc_config_upscaler (Thumb, 348 bytes, Stack size 40 bytes, hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler))
[Stack]
- Max Depth = 144
- Call Chain = hal_lcdc_config_upscaler ⇒ __aeabi_dadd ⇒ _double_epilogue ⇒ __aeabi_llsr
[Calls]- >> __aeabi_ui2d
- >> __aeabi_dadd
- >> __aeabi_d2uiz
- >> drv_param_init_get_sclu_filter
- >> drv_lcdc_config_scale_up_step
- >> drv_lcdc_config_scale_up_coef
- >> drv_lcdc_config_bypass
- >> hal_dsi_tx_ctrl_set_partial_disp_area
- >> hal_dsi_tx_ctrl_set_partial_disp
- >> __aeabi_uidivmod
[Called By]
hal_lcdc_init_cfg (Thumb, 60 bytes, Stack size 40 bytes, hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg))
[Stack]
- Max Depth = 184
- Call Chain = hal_lcdc_init_cfg ⇒ hal_lcdc_config_upscaler ⇒ __aeabi_dadd ⇒ _double_epilogue ⇒ __aeabi_llsr
[Calls]- >> hal_internal_sync_get_fb_setting
- >> drv_lcdc_config_bypass
- >> hal_lcdc_init_interrupt
- >> hal_lcdc_config_upscaler
- >> hal_lcdc_config_rgb_to_pentile
- >> hal_lcdc_config_remains
- >> hal_lcdc_config_ccm
[Called By]
hal_lcdc_init_clk (Thumb, 376 bytes, Stack size 120 bytes, hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk))
[Stack]
- Max Depth = 256
- Call Chain = hal_lcdc_init_clk ⇒ ceil ⇒ __aeabi_drsub ⇒ __aeabi_dadd ⇒ _double_epilogue ⇒ __aeabi_llsr
[Calls]- >> hal_internal_sync_get_fb_setting
- >> __aeabi_d2uiz
- >> drv_lcdc_config_dpi_timing
- >> drv_crgu_set_lcdc_src
- >> drv_crgu_set_lcdc_div
- >> drv_crgu_set_dpi_pre_src
- >> drv_crgu_set_dpi_pre_div
- >> drv_crgu_set_dpi_mux_src
- >> __aeabi_ui2f
- >> __aeabi_fmul
- >> __aeabi_fdiv
- >> __aeabi_f2iz
- >> __aeabi_f2d
- >> __aeabi_cfrcmple
- >> __aeabi_memclr4
- >> __aeabi_memcpy4
- >> __aeabi_idivmod
- >> ceil
[Called By]
hal_lcdc_init_interrupt (Thumb, 58 bytes, Stack size 16 bytes, hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt))
[Stack]
- Max Depth = 28
- Call Chain = hal_lcdc_init_interrupt ⇒ drv_lcdc_config_int
[Calls]- >> hal_internal_vsync_get_sync_line
- >> drv_lcdc_set_int
- >> drv_lcdc_ctrl_flow
- >> drv_lcdc_config_int
[Called By]
drv_gpio_set_output_data (Thumb, 26 bytes, Stack size 0 bytes, hal_gpio.o(i.drv_gpio_set_output_data))
[Called By]
- >> hal_gpio_set_output_data
- >> hal_gpio_init_output
hal_i2c_master_irq_callback (Thumb, 24 bytes, Stack size 8 bytes, hal_i2c_master.o(i.hal_i2c_master_irq_callback))
[Stack]
- Max Depth = 24
- Call Chain = hal_i2c_master_irq_callback ⇒ drv_i2c_m_clear_it_pending_bit ⇒ __ARM_common_switch8
[Calls]- >> drv_i2c_m_clear_it_pending_bit
[Address Reference Count : 1]- hal_i2c_master.o(i.hal_i2c_m_dma_init)
hal_i2c_s_dma_user_callback (Thumb, 12 bytes, Stack size 0 bytes, hal_i2c_slave.o(i.hal_i2c_s_dma_user_callback))
[Address Reference Count : 1]
- hal_i2c_slave.o(i.hal_i2c_s_init)
hal_i2c_slave_irq_callback (Thumb, 304 bytes, Stack size 24 bytes, hal_i2c_slave.o(i.hal_i2c_slave_irq_callback))
[Stack]
- Max Depth = 40
- Call Chain = hal_i2c_slave_irq_callback ⇒ drv_i2c_s_clear_it_pending_bit ⇒ __ARM_common_switch8
[Calls]- >> drv_i2c_s_write_data
- >> drv_i2c_s_get_fifo_status
- >> drv_i2c_s_clear_it_pending_bit
- >> drv_dma_enable_channel
- >> drv_dma_disenable_channel
[Address Reference Count : 1]- hal_i2c_slave.o(i.hal_i2c_s_init)
drv_i2c_dma_callback (Thumb, 40 bytes, Stack size 0 bytes, drv_i2c_dma.o(i.drv_i2c_dma_callback))
[Address Reference Count : 1]
- drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback)
drv_i2c_master_write_read_cmd (Thumb, 46 bytes, Stack size 20 bytes, drv_i2c_dma.o(i.drv_i2c_master_write_read_cmd))
[Stack]
- Max Depth = 20
- Call Chain = drv_i2c_master_write_read_cmd
[Called By]- >> drv_i2c_master_read_dma
__NVIC_ClearPendingIRQ (Thumb, 18 bytes, Stack size 0 bytes, drv_i2c_master.o(i.__NVIC_ClearPendingIRQ))
[Called By]
- >> drv_i2c_m_enable_intr
- >> drv_i2c_m_clear_it_pending_bit
__NVIC_ClearPendingIRQ (Thumb, 18 bytes, Stack size 0 bytes, drv_i2c_slave.o(i.__NVIC_ClearPendingIRQ))
[Called By]
- >> drv_i2c_s_enable_intr
- >> drv_i2c_s_clear_it_pending_bit
__NVIC_ClearPendingIRQ (Thumb, 18 bytes, Stack size 0 bytes, drv_spi_master.o(i.__NVIC_ClearPendingIRQ))
[Called By]
drv_timer_handle_interrupt (Thumb, 62 bytes, Stack size 16 bytes, drv_timer.o(i.drv_timer_handle_interrupt))
[Stack]
- Max Depth = 32
- Call Chain = drv_timer_handle_interrupt ⇒ drv_timer_set_int
[Calls]- >> drv_timer_set_match
- >> drv_timer_set_int
- >> drv_timer_set_current_count
- >> drv_timer_clear_status_flags
[Called By]- >> app_TIMER3_IRQn_Handler
- >> app_TIMER2_IRQn_Handler
- >> app_TIMER1_IRQn_Handler
- >> app_TIMER0_IRQn_Handler
calc_framebuffer_setting (Thumb, 902 bytes, Stack size 72 bytes, hal_internal_vsync.o(i.calc_framebuffer_setting))
[Stack]
- Max Depth = 200
- Call Chain = calc_framebuffer_setting ⇒ __aeabi_dmul ⇒ _double_epilogue ⇒ __aeabi_llsr
[Calls]- >> __aeabi_ui2d
- >> __aeabi_dmul
- >> __aeabi_ddiv
- >> __aeabi_d2uiz
- >> LOG_printf
- >> __aeabi_cdcmple
- >> sqrt
[Called By]- >> hal_internal_vsync_init_rx
- >> hal_internal_sync_input_resolution_change
- >> hal_internal_vsync_init_tx
check_mipi_rx_tx_video_info (Thumb, 44 bytes, Stack size 16 bytes, hal_internal_vsync.o(i.check_mipi_rx_tx_video_info))
[Stack]
- Max Depth = 16
- Call Chain = check_mipi_rx_tx_video_info
[Called By]- >> hal_internal_vsync_init_rx
- >> hal_internal_vsync_init_tx
check_pkt_buf_rev (Thumb, 90 bytes, Stack size 16 bytes, hal_internal_vsync.o(i.check_pkt_buf_rev))
[Stack]
- Max Depth = 64
- Call Chain = check_pkt_buf_rev ⇒ LOG_printf ⇒ vsprintf
[Calls]- >> LOG_printf
- >> drv_rxbr_clear_status0
- >> drv_rxbr_clear_pkt_buffer
- >> drv_rxbr_get_status0
[Called By]- >> rx_receive_pps
- >> rx_get_dcs_packet_data
dcs_sw_filter (Thumb, 24 bytes, Stack size 0 bytes, hal_internal_vsync.o(i.dcs_sw_filter))
[Called By]
- >> rx_get_dcs_packet_data
drv_rxbr_get_int_source (Thumb, 18 bytes, Stack size 0 bytes, hal_internal_vsync.o(i.drv_rxbr_get_int_source))
[Called By]
- >> rxbr_irq1_callback
- >> rxbr_irq0_callback
drv_rxbr_get_status0 (Thumb, 18 bytes, Stack size 0 bytes, hal_internal_vsync.o(i.drv_rxbr_get_status0))
[Called By]
- >> rxbr_irq0_callback
- >> check_pkt_buf_rev
rx_get_dcs_packet_data (Thumb, 654 bytes, Stack size 56 bytes, hal_internal_vsync.o(i.rx_get_dcs_packet_data))
[Stack]
- Max Depth = 120
- Call Chain = rx_get_dcs_packet_data ⇒ check_pkt_buf_rev ⇒ LOG_printf ⇒ vsprintf
[Calls]- >> hal_dsi_rx_ctrl_dsc_async_handler
- >> LOG_printf
- >> drv_dsi_tx_command_put_payload
- >> dcs_packet_fifo_alloc
- >> dcs_sw_filter
- >> check_pkt_buf_rev
[Called By]
rx_partial_update (Thumb, 304 bytes, Stack size 24 bytes, hal_internal_vsync.o(i.rx_partial_update))
[Stack]
- Max Depth = 36
- Call Chain = rx_partial_update ⇒ __aeabi_uidivmod
[Calls]- >> drv_crgu_set_dsco_src_div
- >> drv_crgu_set_dsco_src
- >> drv_crgu_set_dsc_core_div
- >> drv_rxbr_get_page_addr
- >> drv_rxbr_get_col_addr
- >> drv_dsc_dec_get_nslc
- >> __aeabi_uidivmod
[Called By]
rx_receive_packet (Thumb, 128 bytes, Stack size 8 bytes, hal_internal_vsync.o(i.rx_receive_packet))
[Stack]
- Max Depth = 224
- Call Chain = rx_receive_packet ⇒ rx_receive_pps ⇒ drv_dsc_dec_enable ⇒ __2printf
[Calls]- >> drv_rxbr_clear_status0
- >> drv_rxbr_clear_pkt_buffer
- >> rx_receive_pps
- >> rx_get_dcs_packet_data
[Called By]
rx_receive_pps (Thumb, 268 bytes, Stack size 152 bytes, hal_internal_vsync.o(i.rx_receive_pps))
[Stack]
- Max Depth = 216
- Call Chain = rx_receive_pps ⇒ drv_dsc_dec_enable ⇒ __2printf
[Calls]- >> drv_dsi_rx_get_compression_en
- >> drv_dsc_dec_set_u8_pps
- >> drv_dsc_dec_enable
- >> drv_dsc_dec_convert_pps_rc_parameter
- >> LOG_printf
- >> drv_rxbr_clear_pkt_buffer
- >> check_pkt_buf_rev
- >> __aeabi_memclr4
- >> __aeabi_uidivmod
[Called By]
rxbr_irq0_callback (Thumb, 158 bytes, Stack size 24 bytes, hal_internal_vsync.o(i.rxbr_irq0_callback))
[Stack]
- Max Depth = 248
- Call Chain = rxbr_irq0_callback ⇒ rx_receive_packet ⇒ rx_receive_pps ⇒ drv_dsc_dec_enable ⇒ __2printf
[Calls]- >> drv_rxbr_set_inten
- >> drv_rxbr_clear_status0
- >> rx_receive_packet
- >> rx_partial_update
- >> drv_rxbr_get_status0
- >> drv_rxbr_get_int_source
[Address Reference Count : 1]- hal_internal_vsync.o(i.hal_internal_vsync_init_rx)
rxbr_irq1_callback (Thumb, 222 bytes, Stack size 32 bytes, hal_internal_vsync.o(i.rxbr_irq1_callback))
[Stack]
- Max Depth = 104
- Call Chain = rxbr_irq1_callback ⇒ vpre_err_reset ⇒ drv_dsc_dec_set_u8_pps
[Calls]- >> LOG_printf
- >> drv_rxbr_clear_status0
- >> drv_rxbr_clear_pkt_buffer
- >> drv_memc_set_double_buffer_reverse
- >> vpre_err_reset
- >> drv_rxbr_get_int_source
[Address Reference Count : 1]- hal_internal_vsync.o(i.hal_internal_vsync_init_rx)
soft_gen_te (Thumb, 116 bytes, Stack size 20 bytes, hal_internal_vsync.o(i.soft_gen_te))
[Stack]
- Max Depth = 20
- Call Chain = soft_gen_te
[Called By]
vidc_callback (Thumb, 194 bytes, Stack size 24 bytes, hal_internal_vsync.o(i.vidc_callback))
[Stack]
- Max Depth = 72
- Call Chain = vidc_callback ⇒ LOG_printf ⇒ vsprintf
[Calls]- >> drv_vidc_set_irqen
- >> LOG_printf
- >> drv_lcdc_config_overwrite
- >> drv_vidc_get_irq_status
- >> drv_vidc_clear_irq
[Address Reference Count : 1]- hal_internal_vsync.o(i.hal_internal_vsync_init_rx)
vpre_err_reset (Thumb, 184 bytes, Stack size 64 bytes, hal_internal_vsync.o(i.vpre_err_reset))
[Stack]
- Max Depth = 72
- Call Chain = vpre_err_reset ⇒ drv_dsc_dec_set_u8_pps
[Calls]- >> drv_dsc_dec_set_u8_pps
- >> drv_crgu_set_reset
- >> drv_vidc_reset
[Called By]
vsync_set_te_mode (Thumb, 254 bytes, Stack size 32 bytes, hal_internal_vsync.o(i.vsync_set_te_mode))
[Stack]
- Max Depth = 80
- Call Chain = vsync_set_te_mode ⇒ LOG_printf ⇒ vsprintf
[Calls]- >> drv_memc_set_tear_mode
- >> LOG_printf
- >> drv_lcdc_ctrl_flow
- >> drv_lcdc_config_int_single
- >> __aeabi_uidivmod
[Called By]- >> hal_internal_vsync_set_tear_mode
- >> hal_internal_vsync_set_tx_state
drv_dsi_rx_get_color_bpp (Thumb, 62 bytes, Stack size 4 bytes, drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp))
[Stack]
- Max Depth = 12
- Call Chain = drv_dsi_rx_get_color_bpp ⇒ __ARM_common_switch8
[Calls]
[Called By]- >> drv_dsi_rx_calc_ipi_tx_delay
drv_dsi_rx_get_color_pcc (Thumb, 24 bytes, Stack size 0 bytes, drv_dsi_rx.o(i.drv_dsi_rx_get_color_pcc))
[Called By]
- >> drv_dsi_rx_calc_ipi_tx_delay
drv_rx_phy_test_clear (Thumb, 12 bytes, Stack size 8 bytes, drv_dsi_rx.o(i.drv_rx_phy_test_clear))
[Stack]
- Max Depth = 8
- Call Chain = drv_rx_phy_test_clear
[Calls]
[Called By]
drv_rx_phy_test_lock (Thumb, 16 bytes, Stack size 8 bytes, drv_dsi_rx.o(i.drv_rx_phy_test_lock))
[Stack]
- Max Depth = 8
- Call Chain = drv_rx_phy_test_lock
[Calls]
[Called By]
drv_rx_phy_test_write_1_byte (Thumb, 20 bytes, Stack size 8 bytes, drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte))
[Stack]
- Max Depth = 40
- Call Chain = drv_rx_phy_test_write_1_byte ⇒ drv_phy_test_write_1_byte ⇒ drv_phy_test_write_data
[Calls]- >> drv_phy_test_write_1_byte
[Called By]
drv_rx_phy_test_write_2_byte (Thumb, 22 bytes, Stack size 8 bytes, drv_dsi_rx.o(i.drv_rx_phy_test_write_2_byte))
[Stack]
- Max Depth = 40
- Call Chain = drv_rx_phy_test_write_2_byte ⇒ drv_phy_test_write_2_byte ⇒ drv_phy_test_write_data
[Calls]- >> drv_phy_test_write_2_byte
[Called By]
drv_tx_phy_test_clear (Thumb, 10 bytes, Stack size 8 bytes, drv_dsi_tx.o(i.drv_tx_phy_test_clear))
[Stack]
- Max Depth = 8
- Call Chain = drv_tx_phy_test_clear
[Calls]
[Called By]- >> drv_dsi_tx_phy_test_setup
drv_tx_phy_test_write_1_byte (Thumb, 18 bytes, Stack size 8 bytes, drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte))
[Stack]
- Max Depth = 40
- Call Chain = drv_tx_phy_test_write_1_byte ⇒ drv_phy_test_write_1_byte ⇒ drv_phy_test_write_data
[Calls]- >> drv_phy_test_write_1_byte
[Called By]- >> drv_dsi_tx_phy_test_setup
drv_tx_phy_test_write_2_byte (Thumb, 20 bytes, Stack size 8 bytes, drv_dsi_tx.o(i.drv_tx_phy_test_write_2_byte))
[Stack]
- Max Depth = 40
- Call Chain = drv_tx_phy_test_write_2_byte ⇒ drv_phy_test_write_2_byte ⇒ drv_phy_test_write_data
[Calls]- >> drv_phy_test_write_2_byte
[Called By]- >> drv_dsi_tx_phy_test_setup
drv_tx_phy_test_write_code (Thumb, 16 bytes, Stack size 8 bytes, drv_dsi_tx.o(i.drv_tx_phy_test_write_code))
[Stack]
- Max Depth = 16
- Call Chain = drv_tx_phy_test_write_code ⇒ drv_phy_test_write_code
[Calls]- >> drv_phy_test_write_code
[Called By]- >> drv_dsi_tx_phy_test_setup
__NVIC_DisableIRQ (Thumb, 26 bytes, Stack size 0 bytes, drv_rxbr.o(i.__NVIC_DisableIRQ))
[Called By]
__NVIC_EnableIRQ (Thumb, 18 bytes, Stack size 0 bytes, drv_rxbr.o(i.__NVIC_EnableIRQ))
[Called By]
drv_phy_test_write_data (Thumb, 32 bytes, Stack size 16 bytes, drv_phy_common.o(i.drv_phy_test_write_data))
[Stack]
- Max Depth = 16
- Call Chain = drv_phy_test_write_data
[Called By]- >> drv_phy_test_write_2_byte
- >> drv_phy_test_write_1_byte
__NVIC_SetPriority (Thumb, 60 bytes, Stack size 0 bytes, hal_spi_slave.o(i.__NVIC_SetPriority))
[Called By]
drv_wdg_clear_edge_flag (Thumb, 12 bytes, Stack size 0 bytes, drv_wdg.o(i.drv_wdg_clear_edge_flag))
[Called By]
drv_wdg_read_edge_flag (Thumb, 10 bytes, Stack size 0 bytes, drv_wdg.o(i.drv_wdg_read_edge_flag))
[Called By]
_fp_digits (Thumb, 344 bytes, Stack size 64 bytes, printfa.o(i._fp_digits), UNUSED)
[Calls]
- >> __aeabi_dmul
- >> __aeabi_ddiv
- >> __aeabi_dadd
- >> __aeabi_uldivmod
- >> __aeabi_d2ulz
- >> __aeabi_cdrcmple
[Called By]
_printf_core (Thumb, 1754 bytes, Stack size 128 bytes, printfa.o(i._printf_core), UNUSED)
[Calls]
- >> __aeabi_uldivmod
- >> _printf_pre_padding
- >> _printf_post_padding
- >> _fp_digits
- >> __aeabi_uidivmod
[Called By]- >> __0vsprintf
- >> __0printf
_printf_post_padding (Thumb, 32 bytes, Stack size 24 bytes, printfa.o(i._printf_post_padding), UNUSED)
[Called By]
_printf_pre_padding (Thumb, 44 bytes, Stack size 40 bytes, printfa.o(i._printf_pre_padding), UNUSED)
[Called By]
_sputc (Thumb, 10 bytes, Stack size 0 bytes, printfa.o(i._sputc))
[Called By]
[Address Reference Count : 1]
Undefined Global Symbols