diff --git a/project/ISP568.uvprojx b/project/ISP568.uvprojx index 8b16bcc..688a05f 100644 --- a/project/ISP568.uvprojx +++ b/project/ISP568.uvprojx @@ -10,14 +10,14 @@ ISP568 0x4 ARM-ADS - 5060750::V5.06 update 6 (build 750)::.\Arm Compiler 5.06 update 6 (build 750) - 5060750::V5.06 update 6 (build 750)::.\Arm Compiler 5.06 update 6 (build 750) + 5060750::V5.06 update 6 (build 750)::ARMCC + 5060750::V5.06 update 6 (build 750)::ARMCC 0 ARMCM0 ARM - ARM.CMSIS.5.8.0 + ARM.CMSIS.5.5.1 http://www.keil.com/pack/ IRAM(0x20000000,0x00020000) IROM(0x00000000,0x00040000) CPUTYPE("Cortex-M0") CLOCK(12000000) ESEL ELITTLE @@ -186,7 +186,6 @@ 0 0 0 - 0 0 0 16 @@ -353,7 +352,7 @@ 0 0 0 - 4 + 0 @@ -466,7 +465,7 @@ 2 2 2 - 0 + 2 @@ -512,13 +511,4 @@ - - - - ISP568 - 1 - - - - diff --git a/project/Listings/WL568_S21_NT37701_20230522.map b/project/Listings/WL568_S21_NT37701_20230522.map index 1e14063..6c9bc84 100644 --- a/project/Listings/WL568_S21_NT37701_20230522.map +++ b/project/Listings/WL568_S21_NT37701_20230522.map @@ -40,7 +40,6 @@ Section Cross References ap_demo.o(i.ap_demo) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) for hal_dsi_tx_ctrl_deinit ap_demo.o(i.ap_demo) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) for hal_dsi_rx_ctrl_stop ap_demo.o(i.ap_demo) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) for hal_dsi_rx_ctrl_deinit - ap_demo.o(i.ap_demo) refers to hal_system.o(i.hal_system_set_vcc) for hal_system_set_vcc ap_demo.o(i.ap_demo) refers to app_tp_for_custom_s8.o(.data) for tp_sleep_in ap_demo.o(i.ap_demo) refers to ap_demo.o(.data) for .data ap_demo.o(i.ap_demo) refers to ap_demo.o(i.soft_timer3_cb) for soft_timer3_cb @@ -2920,564 +2919,564 @@ Image Symbol Table i.ap_dcs_read 0x00011e10 Section 0 ap_demo.o(i.ap_dcs_read) ap_dcs_read 0x00011e11 Thumb Code 4050 ap_demo.o(i.ap_dcs_read) i.ap_demo 0x00012dec Section 0 ap_demo.o(i.ap_demo) - i.ap_get_reg_df 0x00012f88 Section 0 ap_demo.o(i.ap_get_reg_df) - ap_get_reg_df 0x00012f89 Thumb Code 136 ap_demo.o(i.ap_get_reg_df) - i.ap_get_tp_calibration_status_01 0x00013014 Section 0 app_tp_st_touch.o(i.ap_get_tp_calibration_status_01) - i.ap_reset_cb 0x00013034 Section 0 ap_demo.o(i.ap_reset_cb) - ap_reset_cb 0x00013035 Thumb Code 42 ap_demo.o(i.ap_reset_cb) - i.ap_set_backlight_51 0x0001309c Section 0 ap_demo.o(i.ap_set_backlight_51) - ap_set_backlight_51 0x0001309d Thumb Code 28 ap_demo.o(i.ap_set_backlight_51) - i.ap_set_display_off 0x000130b8 Section 0 ap_demo.o(i.ap_set_display_off) - ap_set_display_off 0x000130b9 Thumb Code 30 ap_demo.o(i.ap_set_display_off) - i.ap_set_display_on 0x000130fc Section 0 ap_demo.o(i.ap_set_display_on) - ap_set_display_on 0x000130fd Thumb Code 16 ap_demo.o(i.ap_set_display_on) - i.ap_set_enter_sleep_mode 0x00013134 Section 0 ap_demo.o(i.ap_set_enter_sleep_mode) - ap_set_enter_sleep_mode 0x00013135 Thumb Code 72 ap_demo.o(i.ap_set_enter_sleep_mode) - i.ap_set_exit_sleep_mode 0x000131b0 Section 0 ap_demo.o(i.ap_set_exit_sleep_mode) - ap_set_exit_sleep_mode 0x000131b1 Thumb Code 58 ap_demo.o(i.ap_set_exit_sleep_mode) - i.ap_set_tp_calibration_04 0x00013220 Section 0 app_tp_st_touch.o(i.ap_set_tp_calibration_04) - i.ap_tp_st_touch_calibration 0x000132b8 Section 0 app_tp_st_touch.o(i.ap_tp_st_touch_calibration) - i.ap_tp_st_touch_error_handler_F3 0x00013368 Section 0 app_tp_st_touch.o(i.ap_tp_st_touch_error_handler_F3) - i.ap_tp_st_touch_error_handler_FF 0x00013382 Section 0 app_tp_st_touch.o(i.ap_tp_st_touch_error_handler_FF) - i.ap_tp_st_touch_get_calibration_success_mark 0x000133a4 Section 0 app_tp_st_touch.o(i.ap_tp_st_touch_get_calibration_success_mark) - i.ap_tp_st_touch_scan_point_init 0x0001344c Section 0 app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_init) - i.ap_tp_st_touch_scan_point_record_event 0x00013468 Section 0 app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_record_event) - i.ap_tp_st_touch_scan_point_record_event_exec 0x000134fc Section 0 app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_record_event_exec) - i.ap_tp_st_touch_simulate_finger_release_event 0x0001354c Section 0 app_tp_st_touch.o(i.ap_tp_st_touch_simulate_finger_release_event) - i.ap_tp_st_touch_software_reset 0x00013580 Section 0 app_tp_st_touch.o(i.ap_tp_st_touch_software_reset) - i.ap_update_frame_rate 0x0001362c Section 0 ap_demo.o(i.ap_update_frame_rate) - ap_update_frame_rate 0x0001362d Thumb Code 58 ap_demo.o(i.ap_update_frame_rate) - i.app_ADC_IRQn_Handler 0x00013698 Section 0 drv_rxbr.o(i.app_ADC_IRQn_Handler) - i.app_AP_NRESET_IRQn_Handler 0x000136b4 Section 0 drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) - i.app_EXTI_INT0_IRQn_Handler 0x000136d8 Section 0 drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) - i.app_EXTI_INT1_IRQn_Handler 0x000136f4 Section 0 drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) - i.app_EXTI_INT2_IRQn_Handler 0x00013710 Section 0 drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) - i.app_EXTI_INT3_IRQn_Handler 0x0001372c Section 0 drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) - i.app_EXTI_INT4_IRQn_Handler 0x00013748 Section 0 drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) - i.app_EXTI_INT5_IRQn_Handler 0x00013764 Section 0 drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) - i.app_EXTI_INT6_IRQn_Handler 0x00013780 Section 0 drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) - i.app_EXTI_INT7_IRQn_Handler 0x0001379c Section 0 drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) - i.app_HardFault_Handler 0x000137b8 Section 0 drv_common.o(i.app_HardFault_Handler) - i.app_I2C0_IRQn_Handler 0x00013800 Section 0 drv_i2c_slave.o(i.app_I2C0_IRQn_Handler) - i.app_I2C1_IRQn_Handler 0x00013810 Section 0 drv_i2c_master.o(i.app_I2C1_IRQn_Handler) - i.app_LCDC_IRQn_Handler 0x00013820 Section 0 hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) - i.app_MEMC_IRQn_Handler 0x00013900 Section 0 drv_memc.o(i.app_MEMC_IRQn_Handler) - i.app_MIPI_RX_IRQn_Handler 0x00013988 Section 0 drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) - i.app_MIPI_TX_IRQn_Handler 0x00013c20 Section 0 drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) - i.app_PWMDET_IRQn_Handler 0x00013cc0 Section 0 drv_pwm.o(i.app_PWMDET_IRQn_Handler) - i.app_SPIM_IRQn_Handler 0x00013d08 Section 0 drv_spi_master.o(i.app_SPIM_IRQn_Handler) - i.app_SPIS_IRQn_Handler 0x00013d38 Section 0 hal_spi_slave.o(i.app_SPIS_IRQn_Handler) - i.app_SWIRE_IRQn_Handler 0x00013f38 Section 0 drv_swire.o(i.app_SWIRE_IRQn_Handler) - i.app_SysTick_Handler 0x00013f58 Section 0 drv_common.o(i.app_SysTick_Handler) - i.app_TIMER0_IRQn_Handler 0x00013f70 Section 0 drv_timer.o(i.app_TIMER0_IRQn_Handler) - i.app_TIMER1_IRQn_Handler 0x00013f7a Section 0 drv_timer.o(i.app_TIMER1_IRQn_Handler) - i.app_TIMER2_IRQn_Handler 0x00013f84 Section 0 drv_timer.o(i.app_TIMER2_IRQn_Handler) - i.app_TIMER3_IRQn_Handler 0x00013f8e Section 0 drv_timer.o(i.app_TIMER3_IRQn_Handler) - i.app_UART_IRQn_Handler 0x00013f98 Section 0 drv_uart.o(i.app_UART_IRQn_Handler) - i.app_VIDC_IRQn_Handler 0x00013fa0 Section 0 drv_vidc.o(i.app_VIDC_IRQn_Handler) - i.app_VPRE_IRQn_Handler 0x00013fbc Section 0 drv_rxbr.o(i.app_VPRE_IRQn_Handler) - i.app_WDG_IRQn_Handler 0x00013fd8 Section 0 drv_wdg.o(i.app_WDG_IRQn_Handler) - i.app_dma_irq_handler 0x00014010 Section 0 drv_dma.o(i.app_dma_irq_handler) - i.app_fls_ctrl_Handler 0x00014020 Section 0 norflash.o(i.app_fls_ctrl_Handler) - i.app_tp_I2C_init 0x00014050 Section 0 app_tp_transfer.o(i.app_tp_I2C_init) - i.app_tp_calibration_exec 0x00014074 Section 0 app_tp_st_touch.o(i.app_tp_calibration_exec) - i.app_tp_i2cs_callback 0x0001411c Section 0 app_tp_transfer.o(i.app_tp_i2cs_callback) - app_tp_i2cs_callback 0x0001411d Thumb Code 42 app_tp_transfer.o(i.app_tp_i2cs_callback) - i.app_tp_init 0x0001414c Section 0 app_tp_transfer.o(i.app_tp_init) - i.app_tp_m_read 0x00014190 Section 0 app_tp_transfer.o(i.app_tp_m_read) - i.app_tp_m_write 0x000141b0 Section 0 app_tp_transfer.o(i.app_tp_m_write) - i.app_tp_phone_analysis_data 0x000141b8 Section 0 app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) - i.app_tp_phone_clear_reset_on 0x0001450c Section 0 app_tp_transfer.o(i.app_tp_phone_clear_reset_on) - i.app_tp_s_read 0x00014518 Section 0 app_tp_transfer.o(i.app_tp_s_read) - i.app_tp_s_write 0x00014520 Section 0 app_tp_transfer.o(i.app_tp_s_write) - i.app_tp_screen_analysis_int 0x00014528 Section 0 app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) - i.app_tp_screen_init 0x000147d4 Section 0 app_tp_transfer.o(i.app_tp_screen_init) - i.app_tp_screen_int_callback 0x00014804 Section 0 app_tp_transfer.o(i.app_tp_screen_int_callback) - app_tp_screen_int_callback 0x00014805 Thumb Code 8 app_tp_transfer.o(i.app_tp_screen_int_callback) - i.app_tp_transfer_screen_const 0x00014810 Section 0 app_tp_transfer.o(i.app_tp_transfer_screen_const) - app_tp_transfer_screen_const 0x00014811 Thumb Code 50 app_tp_transfer.o(i.app_tp_transfer_screen_const) - i.app_tp_transfer_screen_int 0x00014850 Section 0 app_tp_transfer.o(i.app_tp_transfer_screen_int) - i.app_tp_transfer_screen_start 0x00014984 Section 0 app_tp_transfer.o(i.app_tp_transfer_screen_start) - i.board_Init 0x0001499c Section 0 board.o(i.board_Init) - i.calc_framebuffer_setting 0x000149c0 Section 0 hal_internal_vsync.o(i.calc_framebuffer_setting) - calc_framebuffer_setting 0x000149c1 Thumb Code 902 hal_internal_vsync.o(i.calc_framebuffer_setting) - i.ceil 0x00014d8c Section 0 ceil.o(i.ceil) - i.check_mipi_rx_tx_video_info 0x00014e54 Section 0 hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) - check_mipi_rx_tx_video_info 0x00014e55 Thumb Code 44 hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) - i.check_pkt_buf_rev 0x00014e80 Section 0 hal_internal_vsync.o(i.check_pkt_buf_rev) - check_pkt_buf_rev 0x00014e81 Thumb Code 90 hal_internal_vsync.o(i.check_pkt_buf_rev) - i.dcs_packet_fifo_alloc 0x00014f14 Section 0 dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) - i.dcs_packet_fifo_init 0x00014f6c Section 0 dcs_packet_fifo.o(i.dcs_packet_fifo_init) - i.dcs_packet_free_fifo_header 0x00014f84 Section 0 dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) - i.dcs_packet_get_fifo_header 0x00014fc8 Section 0 dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) - i.dcs_sw_filter 0x00014fec Section 0 hal_internal_vsync.o(i.dcs_sw_filter) - dcs_sw_filter 0x00014fed Thumb Code 24 hal_internal_vsync.o(i.dcs_sw_filter) - i.delayMs 0x00015008 Section 0 tau_delay.o(i.delayMs) - i.delayUs 0x00015020 Section 0 tau_delay.o(i.delayUs) - i.drv_ap_rst_trig_edge_detect 0x00015044 Section 0 drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) - i.drv_chip_info_get_info 0x0001507c Section 0 drv_chip_info.o(i.drv_chip_info_get_info) - i.drv_chip_info_init 0x00015088 Section 0 drv_chip_info.o(i.drv_chip_info_init) - i.drv_chip_rx_info_check 0x000150c8 Section 0 drv_chip_info.o(i.drv_chip_rx_info_check) - i.drv_chip_rx_init_done 0x00015190 Section 0 drv_chip_info.o(i.drv_chip_rx_init_done) - i.drv_common_enable_systick 0x000151a4 Section 0 drv_common.o(i.drv_common_enable_systick) - i.drv_common_system_init 0x000151fc Section 0 drv_common.o(i.drv_common_system_init) - i.drv_crgu_config_reset_modules 0x00015204 Section 0 drv_crgu.o(i.drv_crgu_config_reset_modules) - i.drv_crgu_set_ahb_pre_div 0x00015214 Section 0 drv_crgu.o(i.drv_crgu_set_ahb_pre_div) - i.drv_crgu_set_ahb_src 0x00015228 Section 0 drv_crgu.o(i.drv_crgu_set_ahb_src) - i.drv_crgu_set_clock 0x0001523c Section 0 drv_crgu.o(i.drv_crgu_set_clock) - i.drv_crgu_set_dpi_mux_src 0x0001525c Section 0 drv_crgu.o(i.drv_crgu_set_dpi_mux_src) - i.drv_crgu_set_dpi_pre_div 0x00015270 Section 0 drv_crgu.o(i.drv_crgu_set_dpi_pre_div) - i.drv_crgu_set_dpi_pre_src 0x00015288 Section 0 drv_crgu.o(i.drv_crgu_set_dpi_pre_src) - i.drv_crgu_set_dsc_core_div 0x0001529c Section 0 drv_crgu.o(i.drv_crgu_set_dsc_core_div) - i.drv_crgu_set_dsco_src 0x000152b0 Section 0 drv_crgu.o(i.drv_crgu_set_dsco_src) - i.drv_crgu_set_dsco_src_div 0x000152c4 Section 0 drv_crgu.o(i.drv_crgu_set_dsco_src_div) - i.drv_crgu_set_fb_div 0x000152d8 Section 0 drv_crgu.o(i.drv_crgu_set_fb_div) - i.drv_crgu_set_fb_src 0x000152ec Section 0 drv_crgu.o(i.drv_crgu_set_fb_src) - i.drv_crgu_set_lcdc_div 0x00015300 Section 0 drv_crgu.o(i.drv_crgu_set_lcdc_div) - i.drv_crgu_set_lcdc_src 0x00015314 Section 0 drv_crgu.o(i.drv_crgu_set_lcdc_src) - i.drv_crgu_set_mipi_cfg_src 0x00015328 Section 0 drv_crgu.o(i.drv_crgu_set_mipi_cfg_src) - i.drv_crgu_set_mipi_ref_src 0x0001533c Section 0 drv_crgu.o(i.drv_crgu_set_mipi_ref_src) - i.drv_crgu_set_reset 0x00015354 Section 0 drv_crgu.o(i.drv_crgu_set_reset) - i.drv_crgu_set_rxbr_div 0x0001536c Section 0 drv_crgu.o(i.drv_crgu_set_rxbr_div) - i.drv_crgu_set_rxbr_src 0x00015380 Section 0 drv_crgu.o(i.drv_crgu_set_rxbr_src) - i.drv_crgu_set_vidc_src 0x00015394 Section 0 drv_crgu.o(i.drv_crgu_set_vidc_src) - i.drv_dma_clear_flag 0x000153a8 Section 0 drv_dma.o(i.drv_dma_clear_flag) - i.drv_dma_create_handle 0x000153c0 Section 0 drv_dma.o(i.drv_dma_create_handle) - i.drv_dma_disenable_channel 0x000153dc Section 0 drv_dma.o(i.drv_dma_disenable_channel) - i.drv_dma_enable_channel 0x000153ec Section 0 drv_dma.o(i.drv_dma_enable_channel) - i.drv_dma_enable_channel_interrupts 0x000153fc Section 0 drv_dma.o(i.drv_dma_enable_channel_interrupts) - i.drv_dma_get_channel_flag 0x00015420 Section 0 drv_dma.o(i.drv_dma_get_channel_flag) - i.drv_dma_irq_handler 0x0001542c Section 0 drv_dma.o(i.drv_dma_irq_handler) - i.drv_dma_prepar_transfer 0x000154bc Section 0 drv_dma.o(i.drv_dma_prepar_transfer) - i.drv_dma_set_burst 0x000154ce Section 0 drv_dma.o(i.drv_dma_set_burst) - i.drv_dma_set_callback 0x000154e8 Section 0 drv_dma.o(i.drv_dma_set_callback) - i.drv_dma_set_transfer 0x000154f0 Section 0 drv_dma.o(i.drv_dma_set_transfer) - i.drv_dsc_dec_convert_pps_rc_parameter 0x00015534 Section 0 drv_dsc_dec.o(i.drv_dsc_dec_convert_pps_rc_parameter) - i.drv_dsc_dec_disable 0x0001556a Section 0 drv_dsc_dec.o(i.drv_dsc_dec_disable) - i.drv_dsc_dec_enable 0x00015578 Section 0 drv_dsc_dec.o(i.drv_dsc_dec_enable) - i.drv_dsc_dec_get_nslc 0x000155ec Section 0 drv_dsc_dec.o(i.drv_dsc_dec_get_nslc) - i.drv_dsc_dec_set_u8_pps 0x000155f6 Section 0 drv_dsc_dec.o(i.drv_dsc_dec_set_u8_pps) - i.drv_dsi_rx_calc_ipi_tx_delay 0x00015620 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) - i.drv_dsi_rx_enable_irq 0x00015724 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) - i.drv_dsi_rx_get_color_bpp 0x00015764 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) - drv_dsi_rx_get_color_bpp 0x00015765 Thumb Code 62 drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) - i.drv_dsi_rx_get_color_pcc 0x000157b4 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_color_pcc) - drv_dsi_rx_get_color_pcc 0x000157b5 Thumb Code 24 drv_dsi_rx.o(i.drv_dsi_rx_get_color_pcc) - i.drv_dsi_rx_get_compression_en 0x000157d0 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) - i.drv_dsi_rx_get_max_ret_size 0x000157d8 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_max_ret_size) - i.drv_dsi_rx_power_up 0x000157de Section 0 drv_dsi_rx.o(i.drv_dsi_rx_power_up) - i.drv_dsi_rx_set_ctrl_cfg 0x000157ec Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_ctrl_cfg) - i.drv_dsi_rx_set_ddi_cfg 0x0001580c Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) - i.drv_dsi_rx_set_inten 0x0001581c Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_inten) - i.drv_dsi_rx_set_ipi_cfg 0x00015820 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_cfg) - i.drv_dsi_rx_set_lane_swap 0x00015830 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_lane_swap) - i.drv_dsi_rx_set_resp_cnt 0x00015876 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_resp_cnt) - i.drv_dsi_rx_set_up_phy 0x0001589c Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) - i.drv_dsi_rx_shut_down 0x0001598c Section 0 drv_dsi_rx.o(i.drv_dsi_rx_shut_down) - i.drv_dsi_tx_command_header 0x0001599a Section 0 drv_dsi_tx.o(i.drv_dsi_tx_command_header) - i.drv_dsi_tx_command_mode_cfg 0x000159ae Section 0 drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) - i.drv_dsi_tx_command_put_payload 0x00015a1a Section 0 drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) - i.drv_dsi_tx_config_eotp 0x00015a1e Section 0 drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) - i.drv_dsi_tx_config_int 0x00015a36 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_config_int) - i.drv_dsi_tx_dpi_lpcmd_time 0x00015a3e Section 0 drv_dsi_tx.o(i.drv_dsi_tx_dpi_lpcmd_time) - i.drv_dsi_tx_dpi_mode 0x00015a46 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_dpi_mode) - i.drv_dsi_tx_dpi_polarity 0x00015a50 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_dpi_polarity) - i.drv_dsi_tx_edpi_cmd_size 0x00015a74 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_edpi_cmd_size) - i.drv_dsi_tx_get_cmd_status 0x00015a78 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) - i.drv_dsi_tx_mode 0x00015a7c Section 0 drv_dsi_tx.o(i.drv_dsi_tx_mode) - i.drv_dsi_tx_phy_clock_lane_auto_lp 0x00015a80 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_auto_lp) - i.drv_dsi_tx_phy_clock_lane_req_hs 0x00015a98 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) - i.drv_dsi_tx_phy_lane_mode 0x00015ab2 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_lane_mode) - i.drv_dsi_tx_phy_status_ready 0x00015abe Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ready) - i.drv_dsi_tx_phy_status_stopstate 0x00015b22 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) - i.drv_dsi_tx_phy_test_setup 0x00015b60 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) - i.drv_dsi_tx_phy_time_cfg 0x00015c6c Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_time_cfg) - i.drv_dsi_tx_powerup 0x00015c8a Section 0 drv_dsi_tx.o(i.drv_dsi_tx_powerup) - i.drv_dsi_tx_response_mode 0x00015c92 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_response_mode) - i.drv_dsi_tx_set_bta_ack 0x00015cae Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_bta_ack) - i.drv_dsi_tx_set_esc_div 0x00015cc6 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) - i.drv_dsi_tx_set_int 0x00015cd4 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_int) - i.drv_dsi_tx_set_time_out_div 0x00015d08 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_time_out_div) - i.drv_dsi_tx_set_video_chunk 0x00015d18 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_video_chunk) - i.drv_dsi_tx_set_video_timing 0x00015d20 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_video_timing) - i.drv_dsi_tx_shutdown 0x00015d42 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_shutdown) - i.drv_dsi_tx_timeout_cfg 0x00015d4a Section 0 drv_dsi_tx.o(i.drv_dsi_tx_timeout_cfg) - i.drv_dsi_tx_video_mode_cfg 0x00015d70 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_cfg) - i.drv_dsi_tx_video_mode_disable_hact_cmd 0x00015e1a Section 0 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_disable_hact_cmd) - i.drv_dsi_tx_video_mode_set_lp_cmd 0x00015e30 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_set_lp_cmd) - i.drv_efuse_enter_inactive 0x00015e48 Section 0 drv_efuse.o(i.drv_efuse_enter_inactive) - i.drv_efuse_int_enable 0x00015e68 Section 0 drv_efuse.o(i.drv_efuse_int_enable) - i.drv_efuse_read 0x00015e74 Section 0 drv_efuse.o(i.drv_efuse_read) - i.drv_efuse_read_req 0x00015ea6 Section 0 drv_efuse.o(i.drv_efuse_read_req) - i.drv_gpio_get_input_data 0x00015ec0 Section 0 drv_gpio.o(i.drv_gpio_get_input_data) - i.drv_gpio_register_ap_reset_callback 0x00015ed8 Section 0 drv_gpio.o(i.drv_gpio_register_ap_reset_callback) - i.drv_gpio_register_callback 0x00015ee4 Section 0 drv_gpio.o(i.drv_gpio_register_callback) - i.drv_gpio_set_int 0x00015ef8 Section 0 drv_gpio.o(i.drv_gpio_set_int) - i.drv_gpio_set_ioe 0x00015f3c Section 0 drv_gpio.o(i.drv_gpio_set_ioe) - i.drv_gpio_set_mode0 0x00015f5c Section 0 drv_gpio.o(i.drv_gpio_set_mode0) - i.drv_gpio_set_mode1 0x00015f6c Section 0 drv_gpio.o(i.drv_gpio_set_mode1) - i.drv_gpio_set_mode2 0x00015f7c Section 0 drv_gpio.o(i.drv_gpio_set_mode2) - i.drv_gpio_set_mode3 0x00015f8c Section 0 drv_gpio.o(i.drv_gpio_set_mode3) - i.drv_gpio_set_output_data 0x00015f9c Section 0 hal_gpio.o(i.drv_gpio_set_output_data) - drv_gpio_set_output_data 0x00015f9d Thumb Code 26 hal_gpio.o(i.drv_gpio_set_output_data) - i.drv_gpio_set_pull_state 0x00015fbc Section 0 drv_gpio.o(i.drv_gpio_set_pull_state) - i.drv_i2c_dma_callback 0x000160ec Section 0 drv_i2c_dma.o(i.drv_i2c_dma_callback) - drv_i2c_dma_callback 0x000160ed Thumb Code 40 drv_i2c_dma.o(i.drv_i2c_dma_callback) - i.drv_i2c_dma_init 0x00016120 Section 0 drv_i2c_dma.o(i.drv_i2c_dma_init) - i.drv_i2c_enable_rx_dma 0x000161cc Section 0 drv_i2c_dma.o(i.drv_i2c_enable_rx_dma) - i.drv_i2c_enable_tx_dma 0x000161e6 Section 0 drv_i2c_dma.o(i.drv_i2c_enable_tx_dma) - i.drv_i2c_m_clear_it_pending_bit 0x00016200 Section 0 drv_i2c_master.o(i.drv_i2c_m_clear_it_pending_bit) - i.drv_i2c_m_enable 0x00016260 Section 0 drv_i2c_master.o(i.drv_i2c_m_enable) - i.drv_i2c_m_enable_intr 0x00016270 Section 0 drv_i2c_master.o(i.drv_i2c_m_enable_intr) - i.drv_i2c_m_set_callback 0x000162a8 Section 0 drv_i2c_master.o(i.drv_i2c_m_set_callback) - i.drv_i2c_master_init 0x000162b4 Section 0 drv_i2c_master.o(i.drv_i2c_master_init) - i.drv_i2c_master_read_dma 0x00016340 Section 0 drv_i2c_dma.o(i.drv_i2c_master_read_dma) - i.drv_i2c_master_write_dma 0x0001639c Section 0 drv_i2c_dma.o(i.drv_i2c_master_write_dma) - i.drv_i2c_master_write_read_cmd 0x000163d8 Section 0 drv_i2c_dma.o(i.drv_i2c_master_write_read_cmd) - drv_i2c_master_write_read_cmd 0x000163d9 Thumb Code 46 drv_i2c_dma.o(i.drv_i2c_master_write_read_cmd) - i.drv_i2c_s_clear_it_pending_bit 0x00016408 Section 0 drv_i2c_slave.o(i.drv_i2c_s_clear_it_pending_bit) - i.drv_i2c_s_enable_intr 0x00016464 Section 0 drv_i2c_slave.o(i.drv_i2c_s_enable_intr) - i.drv_i2c_s_get_fifo_status 0x00016498 Section 0 drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) - i.drv_i2c_s_set_callback 0x000164b4 Section 0 drv_i2c_slave.o(i.drv_i2c_s_set_callback) - i.drv_i2c_s_write_data 0x000164c0 Section 0 drv_i2c_slave.o(i.drv_i2c_s_write_data) - i.drv_i2c_set_dma_irq_callback 0x000164e0 Section 0 drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) - i.drv_i2c_slave_init 0x00016538 Section 0 drv_i2c_slave.o(i.drv_i2c_slave_init) - i.drv_i2c_slave_write_dma 0x0001657c Section 0 drv_i2c_dma.o(i.drv_i2c_slave_write_dma) - i.drv_lcdc_config_bypass 0x00016598 Section 0 drv_lcdc.o(i.drv_lcdc_config_bypass) - i.drv_lcdc_config_ccm 0x000165b0 Section 0 drv_lcdc.o(i.drv_lcdc_config_ccm) - i.drv_lcdc_config_disp_mode 0x000165e0 Section 0 drv_lcdc.o(i.drv_lcdc_config_disp_mode) - i.drv_lcdc_config_dpi_polarity 0x000165f6 Section 0 drv_lcdc.o(i.drv_lcdc_config_dpi_polarity) - i.drv_lcdc_config_dpi_timing 0x0001661a Section 0 drv_lcdc.o(i.drv_lcdc_config_dpi_timing) - i.drv_lcdc_config_edpi_mode 0x00016640 Section 0 drv_lcdc.o(i.drv_lcdc_config_edpi_mode) - i.drv_lcdc_config_endianness 0x00016656 Section 0 drv_lcdc.o(i.drv_lcdc_config_endianness) - i.drv_lcdc_config_input_size 0x0001666c Section 0 drv_lcdc.o(i.drv_lcdc_config_input_size) - i.drv_lcdc_config_int 0x00016678 Section 0 drv_lcdc.o(i.drv_lcdc_config_int) - i.drv_lcdc_config_int_single 0x00016696 Section 0 drv_lcdc.o(i.drv_lcdc_config_int_single) - i.drv_lcdc_config_overwrite 0x000166b8 Section 0 drv_lcdc.o(i.drv_lcdc_config_overwrite) - i.drv_lcdc_config_overwrite_rgb 0x000166da Section 0 drv_lcdc.o(i.drv_lcdc_config_overwrite_rgb) - i.drv_lcdc_config_partial_display_area 0x000166e6 Section 0 drv_lcdc.o(i.drv_lcdc_config_partial_display_area) - i.drv_lcdc_config_partial_display_enable 0x00016700 Section 0 drv_lcdc.o(i.drv_lcdc_config_partial_display_enable) - i.drv_lcdc_config_scale_up_coef 0x00016722 Section 0 drv_lcdc.o(i.drv_lcdc_config_scale_up_coef) - i.drv_lcdc_config_scale_up_step 0x0001673c Section 0 drv_lcdc.o(i.drv_lcdc_config_scale_up_step) - i.drv_lcdc_config_src_parameter 0x00016748 Section 0 drv_lcdc.o(i.drv_lcdc_config_src_parameter) - i.drv_lcdc_config_thresh 0x00016794 Section 0 drv_lcdc.o(i.drv_lcdc_config_thresh) - i.drv_lcdc_ctrl_flow 0x0001679a Section 0 drv_lcdc.o(i.drv_lcdc_ctrl_flow) - i.drv_lcdc_enable_shadow_reg 0x000167ac Section 0 drv_lcdc.o(i.drv_lcdc_enable_shadow_reg) - i.drv_lcdc_set_int 0x000167cc Section 0 drv_lcdc.o(i.drv_lcdc_set_int) - i.drv_lcdc_set_video_hw_mode 0x00016800 Section 0 drv_lcdc.o(i.drv_lcdc_set_video_hw_mode) - i.drv_lcdc_start 0x00016814 Section 0 drv_lcdc.o(i.drv_lcdc_start) - i.drv_memc_clear_status 0x00016834 Section 0 drv_memc.o(i.drv_memc_clear_status) - i.drv_memc_enable_irq 0x00016840 Section 0 drv_memc.o(i.drv_memc_enable_irq) - i.drv_memc_gen_a_tear_signal 0x00016880 Section 0 drv_memc.o(i.drv_memc_gen_a_tear_signal) - i.drv_memc_get_status 0x0001688c Section 0 drv_memc.o(i.drv_memc_get_status) - i.drv_memc_rate_transfer_sel 0x0001689e Section 0 drv_memc.o(i.drv_memc_rate_transfer_sel) - i.drv_memc_sel_vsync 0x000168ae Section 0 drv_memc.o(i.drv_memc_sel_vsync) - i.drv_memc_set_active_height 0x000168bc Section 0 drv_memc.o(i.drv_memc_set_active_height) - i.drv_memc_set_data_mode 0x000168d0 Section 0 drv_memc.o(i.drv_memc_set_data_mode) - i.drv_memc_set_double_buffer 0x000168dc Section 0 drv_memc.o(i.drv_memc_set_double_buffer) - i.drv_memc_set_double_buffer_reverse 0x000168ec Section 0 drv_memc.o(i.drv_memc_set_double_buffer_reverse) - i.drv_memc_set_fs_en_conditions 0x000168fe Section 0 drv_memc.o(i.drv_memc_set_fs_en_conditions) - i.drv_memc_set_inten 0x0001690e Section 0 drv_memc.o(i.drv_memc_set_inten) - i.drv_memc_set_lcdc_st_conditions 0x00016924 Section 0 drv_memc.o(i.drv_memc_set_lcdc_st_conditions) - i.drv_memc_set_ltpo_mode 0x0001693c Section 0 drv_memc.o(i.drv_memc_set_ltpo_mode) - i.drv_memc_set_tear_mode 0x00016956 Section 0 drv_memc.o(i.drv_memc_set_tear_mode) - i.drv_memc_set_tear_waveform 0x00016964 Section 0 drv_memc.o(i.drv_memc_set_tear_waveform) - i.drv_memc_set_vidc_sync_cnt 0x0001698c Section 0 drv_memc.o(i.drv_memc_set_vidc_sync_cnt) - i.drv_param_init_get_ccm 0x0001699c Section 0 drv_param_init.o(i.drv_param_init_get_ccm) - i.drv_param_init_get_scld_filter_h 0x000169a4 Section 0 drv_param_init.o(i.drv_param_init_get_scld_filter_h) - i.drv_param_init_get_scld_filter_v 0x000169b8 Section 0 drv_param_init.o(i.drv_param_init_get_scld_filter_v) - i.drv_param_init_get_sclu_filter 0x000169cc Section 0 drv_param_init.o(i.drv_param_init_get_sclu_filter) - i.drv_param_init_set_ccm 0x000169d4 Section 0 drv_param_init.o(i.drv_param_init_set_ccm) - i.drv_param_init_set_scld_filter 0x000169e8 Section 0 drv_param_init.o(i.drv_param_init_set_scld_filter) - i.drv_param_p2r_filter_init 0x00016a4c Section 0 drv_param_init.o(i.drv_param_p2r_filter_init) - i.drv_phy_enable_calibration 0x00016a70 Section 0 drv_phy_common.o(i.drv_phy_enable_calibration) - i.drv_phy_get_calibration 0x00016a80 Section 0 drv_phy_common.o(i.drv_phy_get_calibration) - i.drv_phy_get_pll_para 0x00016abc Section 0 drv_phy_common.o(i.drv_phy_get_pll_para) - i.drv_phy_get_rate_para 0x00016b1c Section 0 drv_phy_common.o(i.drv_phy_get_rate_para) - i.drv_phy_test_clear 0x00016b70 Section 0 drv_phy_common.o(i.drv_phy_test_clear) - i.drv_phy_test_lock 0x00016b80 Section 0 drv_phy_common.o(i.drv_phy_test_lock) - i.drv_phy_test_write_1_byte 0x00016b98 Section 0 drv_phy_common.o(i.drv_phy_test_write_1_byte) - i.drv_phy_test_write_2_byte 0x00016bb8 Section 0 drv_phy_common.o(i.drv_phy_test_write_2_byte) - i.drv_phy_test_write_code 0x00016bde Section 0 drv_phy_common.o(i.drv_phy_test_write_code) - i.drv_phy_test_write_data 0x00016bfc Section 0 drv_phy_common.o(i.drv_phy_test_write_data) - drv_phy_test_write_data 0x00016bfd Thumb Code 32 drv_phy_common.o(i.drv_phy_test_write_data) - i.drv_pwr_set_cp_mode 0x00016c1c Section 0 drv_pwr.o(i.drv_pwr_set_cp_mode) - i.drv_pwr_set_pvd_mode 0x00016c3c Section 0 drv_pwr.o(i.drv_pwr_set_pvd_mode) - i.drv_pwr_set_system_clk_src 0x00016c54 Section 0 drv_pwr.o(i.drv_pwr_set_system_clk_src) - i.drv_rx_phy_test_clear 0x00016c84 Section 0 drv_dsi_rx.o(i.drv_rx_phy_test_clear) - drv_rx_phy_test_clear 0x00016c85 Thumb Code 12 drv_dsi_rx.o(i.drv_rx_phy_test_clear) - i.drv_rx_phy_test_lock 0x00016c90 Section 0 drv_dsi_rx.o(i.drv_rx_phy_test_lock) - drv_rx_phy_test_lock 0x00016c91 Thumb Code 16 drv_dsi_rx.o(i.drv_rx_phy_test_lock) - i.drv_rx_phy_test_write_1_byte 0x00016ca0 Section 0 drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) - drv_rx_phy_test_write_1_byte 0x00016ca1 Thumb Code 20 drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) - i.drv_rx_phy_test_write_2_byte 0x00016cb4 Section 0 drv_dsi_rx.o(i.drv_rx_phy_test_write_2_byte) - drv_rx_phy_test_write_2_byte 0x00016cb5 Thumb Code 22 drv_dsi_rx.o(i.drv_rx_phy_test_write_2_byte) - i.drv_rxbr_clear_pkt_buffer 0x00016cca Section 0 drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) - i.drv_rxbr_clear_status0 0x00016cd4 Section 0 drv_rxbr.o(i.drv_rxbr_clear_status0) - i.drv_rxbr_enable_irq 0x00016cd8 Section 0 drv_rxbr.o(i.drv_rxbr_enable_irq) - i.drv_rxbr_frame_drop_cfg 0x00016d34 Section 0 drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) - i.drv_rxbr_get_clk 0x00016d48 Section 0 drv_rxbr.o(i.drv_rxbr_get_clk) - i.drv_rxbr_get_col_addr 0x00016d84 Section 0 drv_rxbr.o(i.drv_rxbr_get_col_addr) - i.drv_rxbr_get_int_source 0x00016d88 Section 0 hal_internal_vsync.o(i.drv_rxbr_get_int_source) - drv_rxbr_get_int_source 0x00016d89 Thumb Code 18 hal_internal_vsync.o(i.drv_rxbr_get_int_source) - i.drv_rxbr_get_page_addr 0x00016d9a Section 0 drv_rxbr.o(i.drv_rxbr_get_page_addr) - i.drv_rxbr_get_status0 0x00016d9e Section 0 hal_internal_vsync.o(i.drv_rxbr_get_status0) - drv_rxbr_get_status0 0x00016d9f Thumb Code 18 hal_internal_vsync.o(i.drv_rxbr_get_status0) - i.drv_rxbr_hline_rcv0_cfg 0x00016db0 Section 0 drv_rxbr.o(i.drv_rxbr_hline_rcv0_cfg) - i.drv_rxbr_hline_rcv_cfg 0x00016dbc Section 0 drv_rxbr.o(i.drv_rxbr_hline_rcv_cfg) - i.drv_rxbr_register_irq0_callback 0x00016dc4 Section 0 drv_rxbr.o(i.drv_rxbr_register_irq0_callback) - i.drv_rxbr_register_irq1_callback 0x00016dd0 Section 0 drv_rxbr.o(i.drv_rxbr_register_irq1_callback) - i.drv_rxbr_set_ack_pkt_header 0x00016ddc Section 0 drv_rxbr.o(i.drv_rxbr_set_ack_pkt_header) - i.drv_rxbr_set_cmd_filter 0x00016df0 Section 0 drv_rxbr.o(i.drv_rxbr_set_cmd_filter) - i.drv_rxbr_set_color_format 0x00016ebc Section 0 drv_rxbr.o(i.drv_rxbr_set_color_format) - i.drv_rxbr_set_inten 0x00016ed0 Section 0 drv_rxbr.o(i.drv_rxbr_set_inten) - i.drv_rxbr_set_ltpo_drop_th 0x00016ee4 Section 0 drv_rxbr.o(i.drv_rxbr_set_ltpo_drop_th) - i.drv_rxbr_set_usr_cfg 0x00016ef4 Section 0 drv_rxbr.o(i.drv_rxbr_set_usr_cfg) - i.drv_rxbr_set_usr_col 0x00016f1a Section 0 drv_rxbr.o(i.drv_rxbr_set_usr_col) - i.drv_rxbr_set_usr_row 0x00016f22 Section 0 drv_rxbr.o(i.drv_rxbr_set_usr_row) - i.drv_spi_m_read_data 0x00016f2c Section 0 drv_spi_master.o(i.drv_spi_m_read_data) - i.drv_swire_set_int 0x00016f4c Section 0 drv_swire.o(i.drv_swire_set_int) - i.drv_sys_cfg_clear_all_int 0x00016f94 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_clear_all_int) - i.drv_sys_cfg_clear_pending 0x00016fa0 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) - i.drv_sys_cfg_sel_ap_rst_lvl_trig 0x00016fc8 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_lvl_trig) - i.drv_sys_cfg_sel_ap_rst_trig 0x00016fe0 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) - i.drv_sys_cfg_sel_gpio_group 0x00016ffc Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_gpio_group) - i.drv_sys_cfg_sel_int_trig 0x00017020 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_int_trig) - i.drv_sys_cfg_set_dma_rx_req 0x00017044 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) - i.drv_sys_cfg_set_dma_tx_req 0x00017054 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) - i.drv_sys_cfg_set_int 0x00017064 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_set_int) - i.drv_timer_clear_status_flags 0x00017088 Section 0 drv_timer.o(i.drv_timer_clear_status_flags) - i.drv_timer_enable 0x000170a2 Section 0 drv_timer.o(i.drv_timer_enable) - i.drv_timer_get_instance 0x000170c4 Section 0 drv_timer.o(i.drv_timer_get_instance) - i.drv_timer_get_prescaler 0x000170d4 Section 0 drv_timer.o(i.drv_timer_get_prescaler) - i.drv_timer_handle_interrupt 0x000170e4 Section 0 drv_timer.o(i.drv_timer_handle_interrupt) - drv_timer_handle_interrupt 0x000170e5 Thumb Code 62 drv_timer.o(i.drv_timer_handle_interrupt) - i.drv_timer_register_callback 0x00017128 Section 0 drv_timer.o(i.drv_timer_register_callback) - i.drv_timer_set_current_count 0x0001713c Section 0 drv_timer.o(i.drv_timer_set_current_count) - i.drv_timer_set_int 0x00017148 Section 0 drv_timer.o(i.drv_timer_set_int) - i.drv_timer_set_match 0x00017190 Section 0 drv_timer.o(i.drv_timer_set_match) - i.drv_timer_set_prescaler 0x0001719c Section 0 drv_timer.o(i.drv_timer_set_prescaler) - i.drv_tx_phy_test_clear 0x000171b2 Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_clear) - drv_tx_phy_test_clear 0x000171b3 Thumb Code 10 drv_dsi_tx.o(i.drv_tx_phy_test_clear) - i.drv_tx_phy_test_enter 0x000171bc Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_enter) - i.drv_tx_phy_test_exit 0x000171d8 Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_exit) - i.drv_tx_phy_test_write_1_byte 0x000171f4 Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) - drv_tx_phy_test_write_1_byte 0x000171f5 Thumb Code 18 drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) - i.drv_tx_phy_test_write_2_byte 0x00017206 Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_write_2_byte) - drv_tx_phy_test_write_2_byte 0x00017207 Thumb Code 20 drv_dsi_tx.o(i.drv_tx_phy_test_write_2_byte) - i.drv_tx_phy_test_write_code 0x0001721a Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_write_code) - drv_tx_phy_test_write_code 0x0001721b Thumb Code 16 drv_dsi_tx.o(i.drv_tx_phy_test_write_code) - i.drv_vidc_clear_irq 0x0001722a Section 0 drv_vidc.o(i.drv_vidc_clear_irq) - i.drv_vidc_enable 0x00017232 Section 0 drv_vidc.o(i.drv_vidc_enable) - i.drv_vidc_enable_irq 0x0001724c Section 0 drv_vidc.o(i.drv_vidc_enable_irq) - i.drv_vidc_get_irq_status 0x0001728c Section 0 drv_vidc.o(i.drv_vidc_get_irq_status) - i.drv_vidc_init_module_enable 0x000172a0 Section 0 drv_vidc.o(i.drv_vidc_init_module_enable) - i.drv_vidc_register_callback 0x000172c8 Section 0 drv_vidc.o(i.drv_vidc_register_callback) - i.drv_vidc_reset 0x000172d4 Section 0 drv_vidc.o(i.drv_vidc_reset) - i.drv_vidc_set_dst_parameter 0x000172da Section 0 drv_vidc.o(i.drv_vidc_set_dst_parameter) - i.drv_vidc_set_irqen 0x00017316 Section 0 drv_vidc.o(i.drv_vidc_set_irqen) - i.drv_vidc_set_mirror 0x0001732a Section 0 drv_vidc.o(i.drv_vidc_set_mirror) - i.drv_vidc_set_p2r_hcoef0 0x0001733a Section 0 drv_vidc.o(i.drv_vidc_set_p2r_hcoef0) - i.drv_vidc_set_p2r_hinitb 0x00017342 Section 0 drv_vidc.o(i.drv_vidc_set_p2r_hinitb) - i.drv_vidc_set_p2r_hinitr 0x00017368 Section 0 drv_vidc.o(i.drv_vidc_set_p2r_hinitr) - i.drv_vidc_set_pentile_swap 0x00017390 Section 0 drv_vidc.o(i.drv_vidc_set_pentile_swap) - i.drv_vidc_set_pu_ctrl 0x000173a8 Section 0 drv_vidc.o(i.drv_vidc_set_pu_ctrl) - i.drv_vidc_set_rotation 0x000173b2 Section 0 drv_vidc.o(i.drv_vidc_set_rotation) - i.drv_vidc_set_scld_hcoef0 0x000173c2 Section 0 drv_vidc.o(i.drv_vidc_set_scld_hcoef0) - i.drv_vidc_set_scld_hcoef1 0x000173cc Section 0 drv_vidc.o(i.drv_vidc_set_scld_hcoef1) - i.drv_vidc_set_scld_step 0x000173d6 Section 0 drv_vidc.o(i.drv_vidc_set_scld_step) - i.drv_vidc_set_scld_vcoef0 0x000173e8 Section 0 drv_vidc.o(i.drv_vidc_set_scld_vcoef0) - i.drv_vidc_set_scld_vcoef1 0x000173f2 Section 0 drv_vidc.o(i.drv_vidc_set_scld_vcoef1) - i.drv_vidc_set_src_parameter 0x000173fc Section 0 drv_vidc.o(i.drv_vidc_set_src_parameter) - i.drv_wdg_clear_counter 0x00017414 Section 0 drv_wdg.o(i.drv_wdg_clear_counter) - i.drv_wdg_clear_edge_flag 0x00017424 Section 0 drv_wdg.o(i.drv_wdg_clear_edge_flag) - drv_wdg_clear_edge_flag 0x00017425 Thumb Code 12 drv_wdg.o(i.drv_wdg_clear_edge_flag) - i.drv_wdg_read_edge_flag 0x00017434 Section 0 drv_wdg.o(i.drv_wdg_read_edge_flag) - drv_wdg_read_edge_flag 0x00017435 Thumb Code 10 drv_wdg.o(i.drv_wdg_read_edge_flag) - i.drv_wdg_set_int 0x00017444 Section 0 drv_wdg.o(i.drv_wdg_set_int) - i.fls_clr_interrupt_flag 0x00017478 Section 0 drv_fls.o(i.fls_clr_interrupt_flag) - i.fputc 0x00017482 Section 0 tau_log.o(i.fputc) - i.frame_start_cb 0x00017498 Section 0 ap_demo.o(i.frame_start_cb) - frame_start_cb 0x00017499 Thumb Code 50 ap_demo.o(i.frame_start_cb) - i.hal_dsi_rx_ctrl_create_handle 0x000174f4 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) - i.hal_dsi_rx_ctrl_deinit 0x00017524 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) - i.hal_dsi_rx_ctrl_dsc_async_handler 0x000175c0 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) - i.hal_dsi_rx_ctrl_gen_a_tear_signal 0x00017644 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) - i.hal_dsi_rx_ctrl_get_max_ret_size 0x0001766c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) - i.hal_dsi_rx_ctrl_init 0x00017694 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) - i.hal_dsi_rx_ctrl_init_clk 0x0001772c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) - hal_dsi_rx_ctrl_init_clk 0x0001772d Thumb Code 232 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) - i.hal_dsi_rx_ctrl_init_dsi_rx 0x0001785c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) - hal_dsi_rx_ctrl_init_dsi_rx 0x0001785d Thumb Code 180 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) - i.hal_dsi_rx_ctrl_init_memc 0x00017930 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) - hal_dsi_rx_ctrl_init_memc 0x00017931 Thumb Code 308 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) - i.hal_dsi_rx_ctrl_init_rxbr 0x00017a6c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) - hal_dsi_rx_ctrl_init_rxbr 0x00017a6d Thumb Code 288 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) - i.hal_dsi_rx_ctrl_init_vidc 0x00017b9c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) - hal_dsi_rx_ctrl_init_vidc 0x00017b9d Thumb Code 544 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) - i.hal_dsi_rx_ctrl_pre_init_pps 0x00017dc8 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_pre_init_pps) - i.hal_dsi_rx_ctrl_send_ack_cmd 0x00017e04 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) - i.hal_dsi_rx_ctrl_set_cus_esc_clk 0x00017ef4 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) - i.hal_dsi_rx_ctrl_set_cus_scld_filter 0x00017f20 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) - i.hal_dsi_rx_ctrl_set_cus_sync_line 0x00017f8c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) - i.hal_dsi_rx_ctrl_set_ipi_cfg 0x00017fc0 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) - hal_dsi_rx_ctrl_set_ipi_cfg 0x00017fc1 Thumb Code 50 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) - i.hal_dsi_rx_ctrl_set_rxbr_clk 0x00017ff8 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) - hal_dsi_rx_ctrl_set_rxbr_clk 0x00017ff9 Thumb Code 114 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) - i.hal_dsi_rx_ctrl_set_sw_tear_mode 0x0001806c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) - i.hal_dsi_rx_ctrl_set_tear_mode_ex 0x000180a0 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_tear_mode_ex) - i.hal_dsi_rx_ctrl_start 0x000180b0 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) - i.hal_dsi_rx_ctrl_stop 0x000180ec Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) - i.hal_dsi_rx_ctrl_toggle_resolution 0x00018128 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) - i.hal_dsi_tx_calc_video_chunks 0x00018148 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) - hal_dsi_tx_calc_video_chunks 0x00018149 Thumb Code 384 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) - i.hal_dsi_tx_config_params_for_lane_rate 0x000182d8 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) - hal_dsi_tx_config_params_for_lane_rate 0x000182d9 Thumb Code 42 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) - i.hal_dsi_tx_count_lane_rate 0x0001830c Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) - hal_dsi_tx_count_lane_rate 0x0001830d Thumb Code 1160 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) - i.hal_dsi_tx_ctrl_create_handle 0x000187dc Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) - i.hal_dsi_tx_ctrl_deinit 0x00018808 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) - i.hal_dsi_tx_ctrl_enter_init_panel_mode 0x00018850 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) - i.hal_dsi_tx_ctrl_exit_init_panel_mode 0x0001889c Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) - i.hal_dsi_tx_ctrl_init 0x000188c4 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) - i.hal_dsi_tx_ctrl_init_clk 0x00018988 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) - hal_dsi_tx_ctrl_init_clk 0x00018989 Thumb Code 36 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) - i.hal_dsi_tx_ctrl_panel_reset_pin 0x000189ac Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_panel_reset_pin) - i.hal_dsi_tx_ctrl_set_ccm 0x000189b8 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) - i.hal_dsi_tx_ctrl_set_overwrite_rgb 0x000189d8 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) - i.hal_dsi_tx_ctrl_set_partial_disp 0x000189ec Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp) - i.hal_dsi_tx_ctrl_set_partial_disp_area 0x000189fc Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp_area) - i.hal_dsi_tx_ctrl_start 0x00018a20 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) - i.hal_dsi_tx_ctrl_stop 0x00018a8c Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) - i.hal_dsi_tx_ctrl_write_array_cmd 0x00018ad0 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) - i.hal_dsi_tx_ctrl_write_cmd 0x00018ba8 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) - i.hal_dsi_tx_init_data_mode 0x00018c58 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) - hal_dsi_tx_init_data_mode 0x00018c59 Thumb Code 58 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) - i.hal_dsi_tx_init_dpi_cfg 0x00018c9c Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) - hal_dsi_tx_init_dpi_cfg 0x00018c9d Thumb Code 42 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) - i.hal_dsi_tx_init_interrupt 0x00018ccc Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) - hal_dsi_tx_init_interrupt 0x00018ccd Thumb Code 28 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) - i.hal_dsi_tx_init_phy_cfg 0x00018cec Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) - hal_dsi_tx_init_phy_cfg 0x00018ced Thumb Code 28 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) - i.hal_dsi_tx_init_remains 0x00018d0c Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) - hal_dsi_tx_init_remains 0x00018d0d Thumb Code 142 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) - i.hal_dsi_tx_init_video_mode 0x00018da0 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) - hal_dsi_tx_init_video_mode 0x00018da1 Thumb Code 82 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) - i.hal_dsi_tx_send_cmd 0x00018df8 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) - hal_dsi_tx_send_cmd 0x00018df9 Thumb Code 60 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) - i.hal_gpio_ctrl_eint 0x00018e3c Section 0 hal_gpio.o(i.hal_gpio_ctrl_eint) - i.hal_gpio_get_input_data 0x00018e54 Section 0 hal_gpio.o(i.hal_gpio_get_input_data) - i.hal_gpio_init_eint 0x00018e68 Section 0 hal_gpio.o(i.hal_gpio_init_eint) - i.hal_gpio_init_input 0x00018ea8 Section 0 hal_gpio.o(i.hal_gpio_init_input) - i.hal_gpio_init_output 0x00018ec8 Section 0 hal_gpio.o(i.hal_gpio_init_output) - i.hal_gpio_reg_eint_cb 0x00018ef0 Section 0 hal_gpio.o(i.hal_gpio_reg_eint_cb) - i.hal_gpio_set_ap_reset_int 0x00018f08 Section 0 hal_gpio.o(i.hal_gpio_set_ap_reset_int) - i.hal_gpio_set_mode 0x00018f58 Section 0 hal_gpio.o(i.hal_gpio_set_mode) - i.hal_gpio_set_output_data 0x00018fb8 Section 0 hal_gpio.o(i.hal_gpio_set_output_data) - i.hal_gpio_set_pull_state 0x00018fc0 Section 0 hal_gpio.o(i.hal_gpio_set_pull_state) - i.hal_i2c_m_dma_init 0x00018fe0 Section 0 hal_i2c_master.o(i.hal_i2c_m_dma_init) - i.hal_i2c_m_dma_read 0x0001904c Section 0 hal_i2c_master.o(i.hal_i2c_m_dma_read) - i.hal_i2c_m_dma_write 0x0001906c Section 0 hal_i2c_master.o(i.hal_i2c_m_dma_write) - i.hal_i2c_m_transfer_complate 0x00019088 Section 0 hal_i2c_master.o(i.hal_i2c_m_transfer_complate) - i.hal_i2c_master_irq_callback 0x00019094 Section 0 hal_i2c_master.o(i.hal_i2c_master_irq_callback) - hal_i2c_master_irq_callback 0x00019095 Thumb Code 24 hal_i2c_master.o(i.hal_i2c_master_irq_callback) - i.hal_i2c_s_dma_user_callback 0x000190b4 Section 0 hal_i2c_slave.o(i.hal_i2c_s_dma_user_callback) - hal_i2c_s_dma_user_callback 0x000190b5 Thumb Code 12 hal_i2c_slave.o(i.hal_i2c_s_dma_user_callback) - i.hal_i2c_s_dma_write 0x000190c4 Section 0 hal_i2c_slave.o(i.hal_i2c_s_dma_write) - i.hal_i2c_s_init 0x000190fc Section 0 hal_i2c_slave.o(i.hal_i2c_s_init) - i.hal_i2c_s_nonblocking_read 0x00019168 Section 0 hal_i2c_slave.o(i.hal_i2c_s_nonblocking_read) - i.hal_i2c_s_set_transfer 0x0001917c Section 0 hal_i2c_slave.o(i.hal_i2c_s_set_transfer) - i.hal_i2c_slave_irq_callback 0x00019188 Section 0 hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) - hal_i2c_slave_irq_callback 0x00019189 Thumb Code 304 hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) - i.hal_internal_init_memc 0x000192d4 Section 0 hal_internal_vsync.o(i.hal_internal_init_memc) - i.hal_internal_sync_get_fb_setting 0x000193b8 Section 0 hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) - i.hal_internal_sync_input_resolution_change 0x000193c8 Section 0 hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) - i.hal_internal_vsync_deinit 0x000195dc Section 0 hal_internal_vsync.o(i.hal_internal_vsync_deinit) - i.hal_internal_vsync_get_rx_state 0x000195f8 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) - i.hal_internal_vsync_get_sync_line 0x00019604 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) - i.hal_internal_vsync_get_tx_state 0x0001961c Section 0 hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) - i.hal_internal_vsync_init_rx 0x00019628 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_init_rx) - i.hal_internal_vsync_init_tx 0x00019724 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_init_tx) - i.hal_internal_vsync_set_auto_hw_filter 0x000197d4 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) - i.hal_internal_vsync_set_rx_state 0x000198f0 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) - i.hal_internal_vsync_set_sync_line 0x00019904 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) - i.hal_internal_vsync_set_tear_mode 0x00019920 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) - i.hal_internal_vsync_set_tx_state 0x00019968 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) - i.hal_lcdc_config_ccm 0x000199a8 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) - hal_lcdc_config_ccm 0x000199a9 Thumb Code 30 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) - i.hal_lcdc_config_remains 0x000199cc Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) - hal_lcdc_config_remains 0x000199cd Thumb Code 68 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) - i.hal_lcdc_config_rgb_to_pentile 0x00019a14 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_rgb_to_pentile) - hal_lcdc_config_rgb_to_pentile 0x00019a15 Thumb Code 14 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_rgb_to_pentile) - i.hal_lcdc_config_upscaler 0x00019a28 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) - hal_lcdc_config_upscaler 0x00019a29 Thumb Code 348 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) - i.hal_lcdc_init_cfg 0x00019b8c Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) - hal_lcdc_init_cfg 0x00019b8d Thumb Code 60 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) - i.hal_lcdc_init_clk 0x00019bcc Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) - hal_lcdc_init_clk 0x00019bcd Thumb Code 376 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) - i.hal_lcdc_init_interrupt 0x00019d4c Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) - hal_lcdc_init_interrupt 0x00019d4d Thumb Code 58 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) - i.hal_spi_m_clear_rxfifo 0x00019d8c Section 0 hal_spi_master.o(i.hal_spi_m_clear_rxfifo) - i.hal_system_enable_systick 0x00019d9a Section 0 hal_system.o(i.hal_system_enable_systick) - i.hal_system_init 0x00019da4 Section 0 hal_system.o(i.hal_system_init) - i.hal_system_init_console 0x00019e2c Section 0 hal_system.o(i.hal_system_init_console) - i.hal_system_set_phy_calibration 0x00019e48 Section 0 hal_system.o(i.hal_system_set_phy_calibration) - i.hal_system_set_pvd 0x00019e50 Section 0 hal_system.o(i.hal_system_set_pvd) - i.hal_system_set_vcc 0x00019e58 Section 0 hal_system.o(i.hal_system_set_vcc) - i.hal_timer_init 0x00019e60 Section 0 hal_timer.o(i.hal_timer_init) - i.hal_timer_start 0x00019e7c Section 0 hal_timer.o(i.hal_timer_start) - i.hal_uart_init 0x00019ecc Section 0 hal_uart.o(i.hal_uart_init) - i.hal_uart_transmit_blocking 0x00019f58 Section 0 hal_uart.o(i.hal_uart_transmit_blocking) - i.handle_init 0x00019f68 Section 0 irq_redirect .o(i.handle_init) - i.init_mipi_tx 0x0001a078 Section 0 ap_demo.o(i.init_mipi_tx) - init_mipi_tx 0x0001a079 Thumb Code 104 ap_demo.o(i.init_mipi_tx) - i.init_panel 0x0001a0e8 Section 0 ap_demo.o(i.init_panel) - init_panel 0x0001a0e9 Thumb Code 142 ap_demo.o(i.init_panel) - i.main 0x0001a180 Section 0 main.o(i.main) - i.open_mipi_rx 0x0001a18c Section 0 ap_demo.o(i.open_mipi_rx) - open_mipi_rx 0x0001a18d Thumb Code 166 ap_demo.o(i.open_mipi_rx) - i.pps_update_handle 0x0001a25c Section 0 ap_demo.o(i.pps_update_handle) - pps_update_handle 0x0001a25d Thumb Code 90 ap_demo.o(i.pps_update_handle) - i.rx_get_dcs_packet_data 0x0001a31c Section 0 hal_internal_vsync.o(i.rx_get_dcs_packet_data) - rx_get_dcs_packet_data 0x0001a31d Thumb Code 654 hal_internal_vsync.o(i.rx_get_dcs_packet_data) - i.rx_partial_update 0x0001a710 Section 0 hal_internal_vsync.o(i.rx_partial_update) - rx_partial_update 0x0001a711 Thumb Code 304 hal_internal_vsync.o(i.rx_partial_update) - i.rx_receive_packet 0x0001a850 Section 0 hal_internal_vsync.o(i.rx_receive_packet) - rx_receive_packet 0x0001a851 Thumb Code 128 hal_internal_vsync.o(i.rx_receive_packet) - i.rx_receive_pps 0x0001a8dc Section 0 hal_internal_vsync.o(i.rx_receive_pps) - rx_receive_pps 0x0001a8dd Thumb Code 268 hal_internal_vsync.o(i.rx_receive_pps) - i.rxbr_irq0_callback 0x0001aa5c Section 0 hal_internal_vsync.o(i.rxbr_irq0_callback) - rxbr_irq0_callback 0x0001aa5d Thumb Code 158 hal_internal_vsync.o(i.rxbr_irq0_callback) - i.rxbr_irq1_callback 0x0001ab00 Section 0 hal_internal_vsync.o(i.rxbr_irq1_callback) - rxbr_irq1_callback 0x0001ab01 Thumb Code 222 hal_internal_vsync.o(i.rxbr_irq1_callback) - i.soft_gen_te 0x0001ac70 Section 0 hal_internal_vsync.o(i.soft_gen_te) - soft_gen_te 0x0001ac71 Thumb Code 116 hal_internal_vsync.o(i.soft_gen_te) - i.soft_timer3_cb 0x0001acfc Section 0 ap_demo.o(i.soft_timer3_cb) - soft_timer3_cb 0x0001acfd Thumb Code 36 ap_demo.o(i.soft_timer3_cb) - i.sqrt 0x0001ad2c Section 0 sqrt.o(i.sqrt) - i.tp_heartbeat_exec 0x0001ad74 Section 0 ap_demo.o(i.tp_heartbeat_exec) - i.vidc_callback 0x0001addc Section 0 hal_internal_vsync.o(i.vidc_callback) - vidc_callback 0x0001addd Thumb Code 194 hal_internal_vsync.o(i.vidc_callback) - i.vpre_err_reset 0x0001aec4 Section 0 hal_internal_vsync.o(i.vpre_err_reset) - vpre_err_reset 0x0001aec5 Thumb Code 184 hal_internal_vsync.o(i.vpre_err_reset) - i.vsync_set_te_mode 0x0001af94 Section 0 hal_internal_vsync.o(i.vsync_set_te_mode) - vsync_set_te_mode 0x0001af95 Thumb Code 254 hal_internal_vsync.o(i.vsync_set_te_mode) - .constdata 0x0001b130 Section 9400 ap_demo.o(.constdata) - g_cus_rx_dcs_execute_table 0x0001b130 Data 108 ap_demo.o(.constdata) - .constdata 0x0001d5e8 Section 32 app_tp_st_touch.o(.constdata) - .constdata 0x0001d608 Section 210 hal_gpio.o(.constdata) - s_gpio_map 0x0001d608 Data 120 hal_gpio.o(.constdata) - s_gpio_perf 0x0001d680 Data 90 hal_gpio.o(.constdata) - .constdata 0x0001d6da Section 5286 app_tp_for_custom_s8.o(.constdata) - .constdata 0x0001eb80 Section 1 app_tp_for_custom_s8.o(.constdata) - .constdata 0x0001eb84 Section 8 drv_param_init.o(.constdata) - .constdata 0x0001eb8c Section 390 drv_phy_common.o(.constdata) - phy_para_mapping_h 0x0001eb8c Data 184 drv_phy_common.o(.constdata) - phy_para_mapping_l 0x0001ec44 Data 128 drv_phy_common.o(.constdata) - phy_data_high_map 0x0001ecc4 Data 48 drv_phy_common.o(.constdata) - phy_data_lp_map 0x0001ecf4 Data 30 drv_phy_common.o(.constdata) - .conststring 0x0001ed14 Section 72 hal_dsi_rx_ctrl.o(.conststring) - .conststring 0x0001ed5c Section 308 hal_internal_vsync.o(.conststring) + i.ap_get_reg_df 0x00012f84 Section 0 ap_demo.o(i.ap_get_reg_df) + ap_get_reg_df 0x00012f85 Thumb Code 136 ap_demo.o(i.ap_get_reg_df) + i.ap_get_tp_calibration_status_01 0x00013010 Section 0 app_tp_st_touch.o(i.ap_get_tp_calibration_status_01) + i.ap_reset_cb 0x00013030 Section 0 ap_demo.o(i.ap_reset_cb) + ap_reset_cb 0x00013031 Thumb Code 42 ap_demo.o(i.ap_reset_cb) + i.ap_set_backlight_51 0x00013098 Section 0 ap_demo.o(i.ap_set_backlight_51) + ap_set_backlight_51 0x00013099 Thumb Code 28 ap_demo.o(i.ap_set_backlight_51) + i.ap_set_display_off 0x000130b4 Section 0 ap_demo.o(i.ap_set_display_off) + ap_set_display_off 0x000130b5 Thumb Code 30 ap_demo.o(i.ap_set_display_off) + i.ap_set_display_on 0x000130f8 Section 0 ap_demo.o(i.ap_set_display_on) + ap_set_display_on 0x000130f9 Thumb Code 16 ap_demo.o(i.ap_set_display_on) + i.ap_set_enter_sleep_mode 0x00013130 Section 0 ap_demo.o(i.ap_set_enter_sleep_mode) + ap_set_enter_sleep_mode 0x00013131 Thumb Code 72 ap_demo.o(i.ap_set_enter_sleep_mode) + i.ap_set_exit_sleep_mode 0x000131ac Section 0 ap_demo.o(i.ap_set_exit_sleep_mode) + ap_set_exit_sleep_mode 0x000131ad Thumb Code 58 ap_demo.o(i.ap_set_exit_sleep_mode) + i.ap_set_tp_calibration_04 0x0001321c Section 0 app_tp_st_touch.o(i.ap_set_tp_calibration_04) + i.ap_tp_st_touch_calibration 0x000132b4 Section 0 app_tp_st_touch.o(i.ap_tp_st_touch_calibration) + i.ap_tp_st_touch_error_handler_F3 0x00013364 Section 0 app_tp_st_touch.o(i.ap_tp_st_touch_error_handler_F3) + i.ap_tp_st_touch_error_handler_FF 0x0001337e Section 0 app_tp_st_touch.o(i.ap_tp_st_touch_error_handler_FF) + i.ap_tp_st_touch_get_calibration_success_mark 0x000133a0 Section 0 app_tp_st_touch.o(i.ap_tp_st_touch_get_calibration_success_mark) + i.ap_tp_st_touch_scan_point_init 0x00013448 Section 0 app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_init) + i.ap_tp_st_touch_scan_point_record_event 0x00013464 Section 0 app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_record_event) + i.ap_tp_st_touch_scan_point_record_event_exec 0x000134f8 Section 0 app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_record_event_exec) + i.ap_tp_st_touch_simulate_finger_release_event 0x00013548 Section 0 app_tp_st_touch.o(i.ap_tp_st_touch_simulate_finger_release_event) + i.ap_tp_st_touch_software_reset 0x0001357c Section 0 app_tp_st_touch.o(i.ap_tp_st_touch_software_reset) + i.ap_update_frame_rate 0x00013628 Section 0 ap_demo.o(i.ap_update_frame_rate) + ap_update_frame_rate 0x00013629 Thumb Code 58 ap_demo.o(i.ap_update_frame_rate) + i.app_ADC_IRQn_Handler 0x00013694 Section 0 drv_rxbr.o(i.app_ADC_IRQn_Handler) + i.app_AP_NRESET_IRQn_Handler 0x000136b0 Section 0 drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) + i.app_EXTI_INT0_IRQn_Handler 0x000136d4 Section 0 drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) + i.app_EXTI_INT1_IRQn_Handler 0x000136f0 Section 0 drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) + i.app_EXTI_INT2_IRQn_Handler 0x0001370c Section 0 drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) + i.app_EXTI_INT3_IRQn_Handler 0x00013728 Section 0 drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) + i.app_EXTI_INT4_IRQn_Handler 0x00013744 Section 0 drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) + i.app_EXTI_INT5_IRQn_Handler 0x00013760 Section 0 drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) + i.app_EXTI_INT6_IRQn_Handler 0x0001377c Section 0 drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) + i.app_EXTI_INT7_IRQn_Handler 0x00013798 Section 0 drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) + i.app_HardFault_Handler 0x000137b4 Section 0 drv_common.o(i.app_HardFault_Handler) + i.app_I2C0_IRQn_Handler 0x000137fc Section 0 drv_i2c_slave.o(i.app_I2C0_IRQn_Handler) + i.app_I2C1_IRQn_Handler 0x0001380c Section 0 drv_i2c_master.o(i.app_I2C1_IRQn_Handler) + i.app_LCDC_IRQn_Handler 0x0001381c Section 0 hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) + i.app_MEMC_IRQn_Handler 0x000138fc Section 0 drv_memc.o(i.app_MEMC_IRQn_Handler) + i.app_MIPI_RX_IRQn_Handler 0x00013984 Section 0 drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) + i.app_MIPI_TX_IRQn_Handler 0x00013c1c Section 0 drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) + i.app_PWMDET_IRQn_Handler 0x00013cbc Section 0 drv_pwm.o(i.app_PWMDET_IRQn_Handler) + i.app_SPIM_IRQn_Handler 0x00013d04 Section 0 drv_spi_master.o(i.app_SPIM_IRQn_Handler) + i.app_SPIS_IRQn_Handler 0x00013d34 Section 0 hal_spi_slave.o(i.app_SPIS_IRQn_Handler) + i.app_SWIRE_IRQn_Handler 0x00013f34 Section 0 drv_swire.o(i.app_SWIRE_IRQn_Handler) + i.app_SysTick_Handler 0x00013f54 Section 0 drv_common.o(i.app_SysTick_Handler) + i.app_TIMER0_IRQn_Handler 0x00013f6c Section 0 drv_timer.o(i.app_TIMER0_IRQn_Handler) + i.app_TIMER1_IRQn_Handler 0x00013f76 Section 0 drv_timer.o(i.app_TIMER1_IRQn_Handler) + i.app_TIMER2_IRQn_Handler 0x00013f80 Section 0 drv_timer.o(i.app_TIMER2_IRQn_Handler) + i.app_TIMER3_IRQn_Handler 0x00013f8a Section 0 drv_timer.o(i.app_TIMER3_IRQn_Handler) + i.app_UART_IRQn_Handler 0x00013f94 Section 0 drv_uart.o(i.app_UART_IRQn_Handler) + i.app_VIDC_IRQn_Handler 0x00013f9c Section 0 drv_vidc.o(i.app_VIDC_IRQn_Handler) + i.app_VPRE_IRQn_Handler 0x00013fb8 Section 0 drv_rxbr.o(i.app_VPRE_IRQn_Handler) + i.app_WDG_IRQn_Handler 0x00013fd4 Section 0 drv_wdg.o(i.app_WDG_IRQn_Handler) + i.app_dma_irq_handler 0x0001400c Section 0 drv_dma.o(i.app_dma_irq_handler) + i.app_fls_ctrl_Handler 0x0001401c Section 0 norflash.o(i.app_fls_ctrl_Handler) + i.app_tp_I2C_init 0x0001404c Section 0 app_tp_transfer.o(i.app_tp_I2C_init) + i.app_tp_calibration_exec 0x00014070 Section 0 app_tp_st_touch.o(i.app_tp_calibration_exec) + i.app_tp_i2cs_callback 0x00014118 Section 0 app_tp_transfer.o(i.app_tp_i2cs_callback) + app_tp_i2cs_callback 0x00014119 Thumb Code 42 app_tp_transfer.o(i.app_tp_i2cs_callback) + i.app_tp_init 0x00014148 Section 0 app_tp_transfer.o(i.app_tp_init) + i.app_tp_m_read 0x0001418c Section 0 app_tp_transfer.o(i.app_tp_m_read) + i.app_tp_m_write 0x000141ac Section 0 app_tp_transfer.o(i.app_tp_m_write) + i.app_tp_phone_analysis_data 0x000141b4 Section 0 app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) + i.app_tp_phone_clear_reset_on 0x00014508 Section 0 app_tp_transfer.o(i.app_tp_phone_clear_reset_on) + i.app_tp_s_read 0x00014514 Section 0 app_tp_transfer.o(i.app_tp_s_read) + i.app_tp_s_write 0x0001451c Section 0 app_tp_transfer.o(i.app_tp_s_write) + i.app_tp_screen_analysis_int 0x00014524 Section 0 app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) + i.app_tp_screen_init 0x000147d0 Section 0 app_tp_transfer.o(i.app_tp_screen_init) + i.app_tp_screen_int_callback 0x00014800 Section 0 app_tp_transfer.o(i.app_tp_screen_int_callback) + app_tp_screen_int_callback 0x00014801 Thumb Code 8 app_tp_transfer.o(i.app_tp_screen_int_callback) + i.app_tp_transfer_screen_const 0x0001480c Section 0 app_tp_transfer.o(i.app_tp_transfer_screen_const) + app_tp_transfer_screen_const 0x0001480d Thumb Code 50 app_tp_transfer.o(i.app_tp_transfer_screen_const) + i.app_tp_transfer_screen_int 0x0001484c Section 0 app_tp_transfer.o(i.app_tp_transfer_screen_int) + i.app_tp_transfer_screen_start 0x00014980 Section 0 app_tp_transfer.o(i.app_tp_transfer_screen_start) + i.board_Init 0x00014998 Section 0 board.o(i.board_Init) + i.calc_framebuffer_setting 0x000149bc Section 0 hal_internal_vsync.o(i.calc_framebuffer_setting) + calc_framebuffer_setting 0x000149bd Thumb Code 902 hal_internal_vsync.o(i.calc_framebuffer_setting) + i.ceil 0x00014d88 Section 0 ceil.o(i.ceil) + i.check_mipi_rx_tx_video_info 0x00014e50 Section 0 hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) + check_mipi_rx_tx_video_info 0x00014e51 Thumb Code 44 hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) + i.check_pkt_buf_rev 0x00014e7c Section 0 hal_internal_vsync.o(i.check_pkt_buf_rev) + check_pkt_buf_rev 0x00014e7d Thumb Code 90 hal_internal_vsync.o(i.check_pkt_buf_rev) + i.dcs_packet_fifo_alloc 0x00014f10 Section 0 dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) + i.dcs_packet_fifo_init 0x00014f68 Section 0 dcs_packet_fifo.o(i.dcs_packet_fifo_init) + i.dcs_packet_free_fifo_header 0x00014f80 Section 0 dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) + i.dcs_packet_get_fifo_header 0x00014fc4 Section 0 dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) + i.dcs_sw_filter 0x00014fe8 Section 0 hal_internal_vsync.o(i.dcs_sw_filter) + dcs_sw_filter 0x00014fe9 Thumb Code 24 hal_internal_vsync.o(i.dcs_sw_filter) + i.delayMs 0x00015004 Section 0 tau_delay.o(i.delayMs) + i.delayUs 0x0001501c Section 0 tau_delay.o(i.delayUs) + i.drv_ap_rst_trig_edge_detect 0x00015040 Section 0 drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) + i.drv_chip_info_get_info 0x00015078 Section 0 drv_chip_info.o(i.drv_chip_info_get_info) + i.drv_chip_info_init 0x00015084 Section 0 drv_chip_info.o(i.drv_chip_info_init) + i.drv_chip_rx_info_check 0x000150c4 Section 0 drv_chip_info.o(i.drv_chip_rx_info_check) + i.drv_chip_rx_init_done 0x0001518c Section 0 drv_chip_info.o(i.drv_chip_rx_init_done) + i.drv_common_enable_systick 0x000151a0 Section 0 drv_common.o(i.drv_common_enable_systick) + i.drv_common_system_init 0x000151f8 Section 0 drv_common.o(i.drv_common_system_init) + i.drv_crgu_config_reset_modules 0x00015200 Section 0 drv_crgu.o(i.drv_crgu_config_reset_modules) + i.drv_crgu_set_ahb_pre_div 0x00015210 Section 0 drv_crgu.o(i.drv_crgu_set_ahb_pre_div) + i.drv_crgu_set_ahb_src 0x00015224 Section 0 drv_crgu.o(i.drv_crgu_set_ahb_src) + i.drv_crgu_set_clock 0x00015238 Section 0 drv_crgu.o(i.drv_crgu_set_clock) + i.drv_crgu_set_dpi_mux_src 0x00015258 Section 0 drv_crgu.o(i.drv_crgu_set_dpi_mux_src) + i.drv_crgu_set_dpi_pre_div 0x0001526c Section 0 drv_crgu.o(i.drv_crgu_set_dpi_pre_div) + i.drv_crgu_set_dpi_pre_src 0x00015284 Section 0 drv_crgu.o(i.drv_crgu_set_dpi_pre_src) + i.drv_crgu_set_dsc_core_div 0x00015298 Section 0 drv_crgu.o(i.drv_crgu_set_dsc_core_div) + i.drv_crgu_set_dsco_src 0x000152ac Section 0 drv_crgu.o(i.drv_crgu_set_dsco_src) + i.drv_crgu_set_dsco_src_div 0x000152c0 Section 0 drv_crgu.o(i.drv_crgu_set_dsco_src_div) + i.drv_crgu_set_fb_div 0x000152d4 Section 0 drv_crgu.o(i.drv_crgu_set_fb_div) + i.drv_crgu_set_fb_src 0x000152e8 Section 0 drv_crgu.o(i.drv_crgu_set_fb_src) + i.drv_crgu_set_lcdc_div 0x000152fc Section 0 drv_crgu.o(i.drv_crgu_set_lcdc_div) + i.drv_crgu_set_lcdc_src 0x00015310 Section 0 drv_crgu.o(i.drv_crgu_set_lcdc_src) + i.drv_crgu_set_mipi_cfg_src 0x00015324 Section 0 drv_crgu.o(i.drv_crgu_set_mipi_cfg_src) + i.drv_crgu_set_mipi_ref_src 0x00015338 Section 0 drv_crgu.o(i.drv_crgu_set_mipi_ref_src) + i.drv_crgu_set_reset 0x00015350 Section 0 drv_crgu.o(i.drv_crgu_set_reset) + i.drv_crgu_set_rxbr_div 0x00015368 Section 0 drv_crgu.o(i.drv_crgu_set_rxbr_div) + i.drv_crgu_set_rxbr_src 0x0001537c Section 0 drv_crgu.o(i.drv_crgu_set_rxbr_src) + i.drv_crgu_set_vidc_src 0x00015390 Section 0 drv_crgu.o(i.drv_crgu_set_vidc_src) + i.drv_dma_clear_flag 0x000153a4 Section 0 drv_dma.o(i.drv_dma_clear_flag) + i.drv_dma_create_handle 0x000153bc Section 0 drv_dma.o(i.drv_dma_create_handle) + i.drv_dma_disenable_channel 0x000153d8 Section 0 drv_dma.o(i.drv_dma_disenable_channel) + i.drv_dma_enable_channel 0x000153e8 Section 0 drv_dma.o(i.drv_dma_enable_channel) + i.drv_dma_enable_channel_interrupts 0x000153f8 Section 0 drv_dma.o(i.drv_dma_enable_channel_interrupts) + i.drv_dma_get_channel_flag 0x0001541c Section 0 drv_dma.o(i.drv_dma_get_channel_flag) + i.drv_dma_irq_handler 0x00015428 Section 0 drv_dma.o(i.drv_dma_irq_handler) + i.drv_dma_prepar_transfer 0x000154b8 Section 0 drv_dma.o(i.drv_dma_prepar_transfer) + i.drv_dma_set_burst 0x000154ca Section 0 drv_dma.o(i.drv_dma_set_burst) + i.drv_dma_set_callback 0x000154e4 Section 0 drv_dma.o(i.drv_dma_set_callback) + i.drv_dma_set_transfer 0x000154ec Section 0 drv_dma.o(i.drv_dma_set_transfer) + i.drv_dsc_dec_convert_pps_rc_parameter 0x00015530 Section 0 drv_dsc_dec.o(i.drv_dsc_dec_convert_pps_rc_parameter) + i.drv_dsc_dec_disable 0x00015566 Section 0 drv_dsc_dec.o(i.drv_dsc_dec_disable) + i.drv_dsc_dec_enable 0x00015574 Section 0 drv_dsc_dec.o(i.drv_dsc_dec_enable) + i.drv_dsc_dec_get_nslc 0x000155e8 Section 0 drv_dsc_dec.o(i.drv_dsc_dec_get_nslc) + i.drv_dsc_dec_set_u8_pps 0x000155f2 Section 0 drv_dsc_dec.o(i.drv_dsc_dec_set_u8_pps) + i.drv_dsi_rx_calc_ipi_tx_delay 0x0001561c Section 0 drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) + i.drv_dsi_rx_enable_irq 0x00015720 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) + i.drv_dsi_rx_get_color_bpp 0x00015760 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) + drv_dsi_rx_get_color_bpp 0x00015761 Thumb Code 62 drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) + i.drv_dsi_rx_get_color_pcc 0x000157b0 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_color_pcc) + drv_dsi_rx_get_color_pcc 0x000157b1 Thumb Code 24 drv_dsi_rx.o(i.drv_dsi_rx_get_color_pcc) + i.drv_dsi_rx_get_compression_en 0x000157cc Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) + i.drv_dsi_rx_get_max_ret_size 0x000157d4 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_max_ret_size) + i.drv_dsi_rx_power_up 0x000157da Section 0 drv_dsi_rx.o(i.drv_dsi_rx_power_up) + i.drv_dsi_rx_set_ctrl_cfg 0x000157e8 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_ctrl_cfg) + i.drv_dsi_rx_set_ddi_cfg 0x00015808 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) + i.drv_dsi_rx_set_inten 0x00015818 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_inten) + i.drv_dsi_rx_set_ipi_cfg 0x0001581c Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_cfg) + i.drv_dsi_rx_set_lane_swap 0x0001582c Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_lane_swap) + i.drv_dsi_rx_set_resp_cnt 0x00015872 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_resp_cnt) + i.drv_dsi_rx_set_up_phy 0x00015898 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) + i.drv_dsi_rx_shut_down 0x00015988 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_shut_down) + i.drv_dsi_tx_command_header 0x00015996 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_command_header) + i.drv_dsi_tx_command_mode_cfg 0x000159aa Section 0 drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) + i.drv_dsi_tx_command_put_payload 0x00015a16 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) + i.drv_dsi_tx_config_eotp 0x00015a1a Section 0 drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) + i.drv_dsi_tx_config_int 0x00015a32 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_config_int) + i.drv_dsi_tx_dpi_lpcmd_time 0x00015a3a Section 0 drv_dsi_tx.o(i.drv_dsi_tx_dpi_lpcmd_time) + i.drv_dsi_tx_dpi_mode 0x00015a42 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_dpi_mode) + i.drv_dsi_tx_dpi_polarity 0x00015a4c Section 0 drv_dsi_tx.o(i.drv_dsi_tx_dpi_polarity) + i.drv_dsi_tx_edpi_cmd_size 0x00015a70 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_edpi_cmd_size) + i.drv_dsi_tx_get_cmd_status 0x00015a74 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) + i.drv_dsi_tx_mode 0x00015a78 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_mode) + i.drv_dsi_tx_phy_clock_lane_auto_lp 0x00015a7c Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_auto_lp) + i.drv_dsi_tx_phy_clock_lane_req_hs 0x00015a94 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) + i.drv_dsi_tx_phy_lane_mode 0x00015aae Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_lane_mode) + i.drv_dsi_tx_phy_status_ready 0x00015aba Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ready) + i.drv_dsi_tx_phy_status_stopstate 0x00015b1e Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) + i.drv_dsi_tx_phy_test_setup 0x00015b5c Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) + i.drv_dsi_tx_phy_time_cfg 0x00015c68 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_time_cfg) + i.drv_dsi_tx_powerup 0x00015c86 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_powerup) + i.drv_dsi_tx_response_mode 0x00015c8e Section 0 drv_dsi_tx.o(i.drv_dsi_tx_response_mode) + i.drv_dsi_tx_set_bta_ack 0x00015caa Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_bta_ack) + i.drv_dsi_tx_set_esc_div 0x00015cc2 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) + i.drv_dsi_tx_set_int 0x00015cd0 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_int) + i.drv_dsi_tx_set_time_out_div 0x00015d04 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_time_out_div) + i.drv_dsi_tx_set_video_chunk 0x00015d14 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_video_chunk) + i.drv_dsi_tx_set_video_timing 0x00015d1c Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_video_timing) + i.drv_dsi_tx_shutdown 0x00015d3e Section 0 drv_dsi_tx.o(i.drv_dsi_tx_shutdown) + i.drv_dsi_tx_timeout_cfg 0x00015d46 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_timeout_cfg) + i.drv_dsi_tx_video_mode_cfg 0x00015d6c Section 0 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_cfg) + i.drv_dsi_tx_video_mode_disable_hact_cmd 0x00015e16 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_disable_hact_cmd) + i.drv_dsi_tx_video_mode_set_lp_cmd 0x00015e2c Section 0 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_set_lp_cmd) + i.drv_efuse_enter_inactive 0x00015e44 Section 0 drv_efuse.o(i.drv_efuse_enter_inactive) + i.drv_efuse_int_enable 0x00015e64 Section 0 drv_efuse.o(i.drv_efuse_int_enable) + i.drv_efuse_read 0x00015e70 Section 0 drv_efuse.o(i.drv_efuse_read) + i.drv_efuse_read_req 0x00015ea2 Section 0 drv_efuse.o(i.drv_efuse_read_req) + i.drv_gpio_get_input_data 0x00015ebc Section 0 drv_gpio.o(i.drv_gpio_get_input_data) + i.drv_gpio_register_ap_reset_callback 0x00015ed4 Section 0 drv_gpio.o(i.drv_gpio_register_ap_reset_callback) + i.drv_gpio_register_callback 0x00015ee0 Section 0 drv_gpio.o(i.drv_gpio_register_callback) + i.drv_gpio_set_int 0x00015ef4 Section 0 drv_gpio.o(i.drv_gpio_set_int) + i.drv_gpio_set_ioe 0x00015f38 Section 0 drv_gpio.o(i.drv_gpio_set_ioe) + i.drv_gpio_set_mode0 0x00015f58 Section 0 drv_gpio.o(i.drv_gpio_set_mode0) + i.drv_gpio_set_mode1 0x00015f68 Section 0 drv_gpio.o(i.drv_gpio_set_mode1) + i.drv_gpio_set_mode2 0x00015f78 Section 0 drv_gpio.o(i.drv_gpio_set_mode2) + i.drv_gpio_set_mode3 0x00015f88 Section 0 drv_gpio.o(i.drv_gpio_set_mode3) + i.drv_gpio_set_output_data 0x00015f98 Section 0 hal_gpio.o(i.drv_gpio_set_output_data) + drv_gpio_set_output_data 0x00015f99 Thumb Code 26 hal_gpio.o(i.drv_gpio_set_output_data) + i.drv_gpio_set_pull_state 0x00015fb8 Section 0 drv_gpio.o(i.drv_gpio_set_pull_state) + i.drv_i2c_dma_callback 0x000160e8 Section 0 drv_i2c_dma.o(i.drv_i2c_dma_callback) + drv_i2c_dma_callback 0x000160e9 Thumb Code 40 drv_i2c_dma.o(i.drv_i2c_dma_callback) + i.drv_i2c_dma_init 0x0001611c Section 0 drv_i2c_dma.o(i.drv_i2c_dma_init) + i.drv_i2c_enable_rx_dma 0x000161c8 Section 0 drv_i2c_dma.o(i.drv_i2c_enable_rx_dma) + i.drv_i2c_enable_tx_dma 0x000161e2 Section 0 drv_i2c_dma.o(i.drv_i2c_enable_tx_dma) + i.drv_i2c_m_clear_it_pending_bit 0x000161fc Section 0 drv_i2c_master.o(i.drv_i2c_m_clear_it_pending_bit) + i.drv_i2c_m_enable 0x0001625c Section 0 drv_i2c_master.o(i.drv_i2c_m_enable) + i.drv_i2c_m_enable_intr 0x0001626c Section 0 drv_i2c_master.o(i.drv_i2c_m_enable_intr) + i.drv_i2c_m_set_callback 0x000162a4 Section 0 drv_i2c_master.o(i.drv_i2c_m_set_callback) + i.drv_i2c_master_init 0x000162b0 Section 0 drv_i2c_master.o(i.drv_i2c_master_init) + i.drv_i2c_master_read_dma 0x0001633c Section 0 drv_i2c_dma.o(i.drv_i2c_master_read_dma) + i.drv_i2c_master_write_dma 0x00016398 Section 0 drv_i2c_dma.o(i.drv_i2c_master_write_dma) + i.drv_i2c_master_write_read_cmd 0x000163d4 Section 0 drv_i2c_dma.o(i.drv_i2c_master_write_read_cmd) + drv_i2c_master_write_read_cmd 0x000163d5 Thumb Code 46 drv_i2c_dma.o(i.drv_i2c_master_write_read_cmd) + i.drv_i2c_s_clear_it_pending_bit 0x00016404 Section 0 drv_i2c_slave.o(i.drv_i2c_s_clear_it_pending_bit) + i.drv_i2c_s_enable_intr 0x00016460 Section 0 drv_i2c_slave.o(i.drv_i2c_s_enable_intr) + i.drv_i2c_s_get_fifo_status 0x00016494 Section 0 drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) + i.drv_i2c_s_set_callback 0x000164b0 Section 0 drv_i2c_slave.o(i.drv_i2c_s_set_callback) + i.drv_i2c_s_write_data 0x000164bc Section 0 drv_i2c_slave.o(i.drv_i2c_s_write_data) + i.drv_i2c_set_dma_irq_callback 0x000164dc Section 0 drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) + i.drv_i2c_slave_init 0x00016534 Section 0 drv_i2c_slave.o(i.drv_i2c_slave_init) + i.drv_i2c_slave_write_dma 0x00016578 Section 0 drv_i2c_dma.o(i.drv_i2c_slave_write_dma) + i.drv_lcdc_config_bypass 0x00016594 Section 0 drv_lcdc.o(i.drv_lcdc_config_bypass) + i.drv_lcdc_config_ccm 0x000165ac Section 0 drv_lcdc.o(i.drv_lcdc_config_ccm) + i.drv_lcdc_config_disp_mode 0x000165dc Section 0 drv_lcdc.o(i.drv_lcdc_config_disp_mode) + i.drv_lcdc_config_dpi_polarity 0x000165f2 Section 0 drv_lcdc.o(i.drv_lcdc_config_dpi_polarity) + i.drv_lcdc_config_dpi_timing 0x00016616 Section 0 drv_lcdc.o(i.drv_lcdc_config_dpi_timing) + i.drv_lcdc_config_edpi_mode 0x0001663c Section 0 drv_lcdc.o(i.drv_lcdc_config_edpi_mode) + i.drv_lcdc_config_endianness 0x00016652 Section 0 drv_lcdc.o(i.drv_lcdc_config_endianness) + i.drv_lcdc_config_input_size 0x00016668 Section 0 drv_lcdc.o(i.drv_lcdc_config_input_size) + i.drv_lcdc_config_int 0x00016674 Section 0 drv_lcdc.o(i.drv_lcdc_config_int) + i.drv_lcdc_config_int_single 0x00016692 Section 0 drv_lcdc.o(i.drv_lcdc_config_int_single) + i.drv_lcdc_config_overwrite 0x000166b4 Section 0 drv_lcdc.o(i.drv_lcdc_config_overwrite) + i.drv_lcdc_config_overwrite_rgb 0x000166d6 Section 0 drv_lcdc.o(i.drv_lcdc_config_overwrite_rgb) + i.drv_lcdc_config_partial_display_area 0x000166e2 Section 0 drv_lcdc.o(i.drv_lcdc_config_partial_display_area) + i.drv_lcdc_config_partial_display_enable 0x000166fc Section 0 drv_lcdc.o(i.drv_lcdc_config_partial_display_enable) + i.drv_lcdc_config_scale_up_coef 0x0001671e Section 0 drv_lcdc.o(i.drv_lcdc_config_scale_up_coef) + i.drv_lcdc_config_scale_up_step 0x00016738 Section 0 drv_lcdc.o(i.drv_lcdc_config_scale_up_step) + i.drv_lcdc_config_src_parameter 0x00016744 Section 0 drv_lcdc.o(i.drv_lcdc_config_src_parameter) + i.drv_lcdc_config_thresh 0x00016790 Section 0 drv_lcdc.o(i.drv_lcdc_config_thresh) + i.drv_lcdc_ctrl_flow 0x00016796 Section 0 drv_lcdc.o(i.drv_lcdc_ctrl_flow) + i.drv_lcdc_enable_shadow_reg 0x000167a8 Section 0 drv_lcdc.o(i.drv_lcdc_enable_shadow_reg) + i.drv_lcdc_set_int 0x000167c8 Section 0 drv_lcdc.o(i.drv_lcdc_set_int) + i.drv_lcdc_set_video_hw_mode 0x000167fc Section 0 drv_lcdc.o(i.drv_lcdc_set_video_hw_mode) + i.drv_lcdc_start 0x00016810 Section 0 drv_lcdc.o(i.drv_lcdc_start) + i.drv_memc_clear_status 0x00016830 Section 0 drv_memc.o(i.drv_memc_clear_status) + i.drv_memc_enable_irq 0x0001683c Section 0 drv_memc.o(i.drv_memc_enable_irq) + i.drv_memc_gen_a_tear_signal 0x0001687c Section 0 drv_memc.o(i.drv_memc_gen_a_tear_signal) + i.drv_memc_get_status 0x00016888 Section 0 drv_memc.o(i.drv_memc_get_status) + i.drv_memc_rate_transfer_sel 0x0001689a Section 0 drv_memc.o(i.drv_memc_rate_transfer_sel) + i.drv_memc_sel_vsync 0x000168aa Section 0 drv_memc.o(i.drv_memc_sel_vsync) + i.drv_memc_set_active_height 0x000168b8 Section 0 drv_memc.o(i.drv_memc_set_active_height) + i.drv_memc_set_data_mode 0x000168cc Section 0 drv_memc.o(i.drv_memc_set_data_mode) + i.drv_memc_set_double_buffer 0x000168d8 Section 0 drv_memc.o(i.drv_memc_set_double_buffer) + i.drv_memc_set_double_buffer_reverse 0x000168e8 Section 0 drv_memc.o(i.drv_memc_set_double_buffer_reverse) + i.drv_memc_set_fs_en_conditions 0x000168fa Section 0 drv_memc.o(i.drv_memc_set_fs_en_conditions) + i.drv_memc_set_inten 0x0001690a Section 0 drv_memc.o(i.drv_memc_set_inten) + i.drv_memc_set_lcdc_st_conditions 0x00016920 Section 0 drv_memc.o(i.drv_memc_set_lcdc_st_conditions) + i.drv_memc_set_ltpo_mode 0x00016938 Section 0 drv_memc.o(i.drv_memc_set_ltpo_mode) + i.drv_memc_set_tear_mode 0x00016952 Section 0 drv_memc.o(i.drv_memc_set_tear_mode) + i.drv_memc_set_tear_waveform 0x00016960 Section 0 drv_memc.o(i.drv_memc_set_tear_waveform) + i.drv_memc_set_vidc_sync_cnt 0x00016988 Section 0 drv_memc.o(i.drv_memc_set_vidc_sync_cnt) + i.drv_param_init_get_ccm 0x00016998 Section 0 drv_param_init.o(i.drv_param_init_get_ccm) + i.drv_param_init_get_scld_filter_h 0x000169a0 Section 0 drv_param_init.o(i.drv_param_init_get_scld_filter_h) + i.drv_param_init_get_scld_filter_v 0x000169b4 Section 0 drv_param_init.o(i.drv_param_init_get_scld_filter_v) + i.drv_param_init_get_sclu_filter 0x000169c8 Section 0 drv_param_init.o(i.drv_param_init_get_sclu_filter) + i.drv_param_init_set_ccm 0x000169d0 Section 0 drv_param_init.o(i.drv_param_init_set_ccm) + i.drv_param_init_set_scld_filter 0x000169e4 Section 0 drv_param_init.o(i.drv_param_init_set_scld_filter) + i.drv_param_p2r_filter_init 0x00016a48 Section 0 drv_param_init.o(i.drv_param_p2r_filter_init) + i.drv_phy_enable_calibration 0x00016a6c Section 0 drv_phy_common.o(i.drv_phy_enable_calibration) + i.drv_phy_get_calibration 0x00016a7c Section 0 drv_phy_common.o(i.drv_phy_get_calibration) + i.drv_phy_get_pll_para 0x00016ab8 Section 0 drv_phy_common.o(i.drv_phy_get_pll_para) + i.drv_phy_get_rate_para 0x00016b18 Section 0 drv_phy_common.o(i.drv_phy_get_rate_para) + i.drv_phy_test_clear 0x00016b6c Section 0 drv_phy_common.o(i.drv_phy_test_clear) + i.drv_phy_test_lock 0x00016b7c Section 0 drv_phy_common.o(i.drv_phy_test_lock) + i.drv_phy_test_write_1_byte 0x00016b94 Section 0 drv_phy_common.o(i.drv_phy_test_write_1_byte) + i.drv_phy_test_write_2_byte 0x00016bb4 Section 0 drv_phy_common.o(i.drv_phy_test_write_2_byte) + i.drv_phy_test_write_code 0x00016bda Section 0 drv_phy_common.o(i.drv_phy_test_write_code) + i.drv_phy_test_write_data 0x00016bf8 Section 0 drv_phy_common.o(i.drv_phy_test_write_data) + drv_phy_test_write_data 0x00016bf9 Thumb Code 32 drv_phy_common.o(i.drv_phy_test_write_data) + i.drv_pwr_set_cp_mode 0x00016c18 Section 0 drv_pwr.o(i.drv_pwr_set_cp_mode) + i.drv_pwr_set_pvd_mode 0x00016c38 Section 0 drv_pwr.o(i.drv_pwr_set_pvd_mode) + i.drv_pwr_set_system_clk_src 0x00016c50 Section 0 drv_pwr.o(i.drv_pwr_set_system_clk_src) + i.drv_rx_phy_test_clear 0x00016c80 Section 0 drv_dsi_rx.o(i.drv_rx_phy_test_clear) + drv_rx_phy_test_clear 0x00016c81 Thumb Code 12 drv_dsi_rx.o(i.drv_rx_phy_test_clear) + i.drv_rx_phy_test_lock 0x00016c8c Section 0 drv_dsi_rx.o(i.drv_rx_phy_test_lock) + drv_rx_phy_test_lock 0x00016c8d Thumb Code 16 drv_dsi_rx.o(i.drv_rx_phy_test_lock) + i.drv_rx_phy_test_write_1_byte 0x00016c9c Section 0 drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) + drv_rx_phy_test_write_1_byte 0x00016c9d Thumb Code 20 drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) + i.drv_rx_phy_test_write_2_byte 0x00016cb0 Section 0 drv_dsi_rx.o(i.drv_rx_phy_test_write_2_byte) + drv_rx_phy_test_write_2_byte 0x00016cb1 Thumb Code 22 drv_dsi_rx.o(i.drv_rx_phy_test_write_2_byte) + i.drv_rxbr_clear_pkt_buffer 0x00016cc6 Section 0 drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) + i.drv_rxbr_clear_status0 0x00016cd0 Section 0 drv_rxbr.o(i.drv_rxbr_clear_status0) + i.drv_rxbr_enable_irq 0x00016cd4 Section 0 drv_rxbr.o(i.drv_rxbr_enable_irq) + i.drv_rxbr_frame_drop_cfg 0x00016d30 Section 0 drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) + i.drv_rxbr_get_clk 0x00016d44 Section 0 drv_rxbr.o(i.drv_rxbr_get_clk) + i.drv_rxbr_get_col_addr 0x00016d80 Section 0 drv_rxbr.o(i.drv_rxbr_get_col_addr) + i.drv_rxbr_get_int_source 0x00016d84 Section 0 hal_internal_vsync.o(i.drv_rxbr_get_int_source) + drv_rxbr_get_int_source 0x00016d85 Thumb Code 18 hal_internal_vsync.o(i.drv_rxbr_get_int_source) + i.drv_rxbr_get_page_addr 0x00016d96 Section 0 drv_rxbr.o(i.drv_rxbr_get_page_addr) + i.drv_rxbr_get_status0 0x00016d9a Section 0 hal_internal_vsync.o(i.drv_rxbr_get_status0) + drv_rxbr_get_status0 0x00016d9b Thumb Code 18 hal_internal_vsync.o(i.drv_rxbr_get_status0) + i.drv_rxbr_hline_rcv0_cfg 0x00016dac Section 0 drv_rxbr.o(i.drv_rxbr_hline_rcv0_cfg) + i.drv_rxbr_hline_rcv_cfg 0x00016db8 Section 0 drv_rxbr.o(i.drv_rxbr_hline_rcv_cfg) + i.drv_rxbr_register_irq0_callback 0x00016dc0 Section 0 drv_rxbr.o(i.drv_rxbr_register_irq0_callback) + i.drv_rxbr_register_irq1_callback 0x00016dcc Section 0 drv_rxbr.o(i.drv_rxbr_register_irq1_callback) + i.drv_rxbr_set_ack_pkt_header 0x00016dd8 Section 0 drv_rxbr.o(i.drv_rxbr_set_ack_pkt_header) + i.drv_rxbr_set_cmd_filter 0x00016dec Section 0 drv_rxbr.o(i.drv_rxbr_set_cmd_filter) + i.drv_rxbr_set_color_format 0x00016eb8 Section 0 drv_rxbr.o(i.drv_rxbr_set_color_format) + i.drv_rxbr_set_inten 0x00016ecc Section 0 drv_rxbr.o(i.drv_rxbr_set_inten) + i.drv_rxbr_set_ltpo_drop_th 0x00016ee0 Section 0 drv_rxbr.o(i.drv_rxbr_set_ltpo_drop_th) + i.drv_rxbr_set_usr_cfg 0x00016ef0 Section 0 drv_rxbr.o(i.drv_rxbr_set_usr_cfg) + i.drv_rxbr_set_usr_col 0x00016f16 Section 0 drv_rxbr.o(i.drv_rxbr_set_usr_col) + i.drv_rxbr_set_usr_row 0x00016f1e Section 0 drv_rxbr.o(i.drv_rxbr_set_usr_row) + i.drv_spi_m_read_data 0x00016f28 Section 0 drv_spi_master.o(i.drv_spi_m_read_data) + i.drv_swire_set_int 0x00016f48 Section 0 drv_swire.o(i.drv_swire_set_int) + i.drv_sys_cfg_clear_all_int 0x00016f90 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_clear_all_int) + i.drv_sys_cfg_clear_pending 0x00016f9c Section 0 drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) + i.drv_sys_cfg_sel_ap_rst_lvl_trig 0x00016fc4 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_lvl_trig) + i.drv_sys_cfg_sel_ap_rst_trig 0x00016fdc Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) + i.drv_sys_cfg_sel_gpio_group 0x00016ff8 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_gpio_group) + i.drv_sys_cfg_sel_int_trig 0x0001701c Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_int_trig) + i.drv_sys_cfg_set_dma_rx_req 0x00017040 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) + i.drv_sys_cfg_set_dma_tx_req 0x00017050 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) + i.drv_sys_cfg_set_int 0x00017060 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_set_int) + i.drv_timer_clear_status_flags 0x00017084 Section 0 drv_timer.o(i.drv_timer_clear_status_flags) + i.drv_timer_enable 0x0001709e Section 0 drv_timer.o(i.drv_timer_enable) + i.drv_timer_get_instance 0x000170c0 Section 0 drv_timer.o(i.drv_timer_get_instance) + i.drv_timer_get_prescaler 0x000170d0 Section 0 drv_timer.o(i.drv_timer_get_prescaler) + i.drv_timer_handle_interrupt 0x000170e0 Section 0 drv_timer.o(i.drv_timer_handle_interrupt) + drv_timer_handle_interrupt 0x000170e1 Thumb Code 62 drv_timer.o(i.drv_timer_handle_interrupt) + i.drv_timer_register_callback 0x00017124 Section 0 drv_timer.o(i.drv_timer_register_callback) + i.drv_timer_set_current_count 0x00017138 Section 0 drv_timer.o(i.drv_timer_set_current_count) + i.drv_timer_set_int 0x00017144 Section 0 drv_timer.o(i.drv_timer_set_int) + i.drv_timer_set_match 0x0001718c Section 0 drv_timer.o(i.drv_timer_set_match) + i.drv_timer_set_prescaler 0x00017198 Section 0 drv_timer.o(i.drv_timer_set_prescaler) + i.drv_tx_phy_test_clear 0x000171ae Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_clear) + drv_tx_phy_test_clear 0x000171af Thumb Code 10 drv_dsi_tx.o(i.drv_tx_phy_test_clear) + i.drv_tx_phy_test_enter 0x000171b8 Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_enter) + i.drv_tx_phy_test_exit 0x000171d4 Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_exit) + i.drv_tx_phy_test_write_1_byte 0x000171f0 Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) + drv_tx_phy_test_write_1_byte 0x000171f1 Thumb Code 18 drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) + i.drv_tx_phy_test_write_2_byte 0x00017202 Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_write_2_byte) + drv_tx_phy_test_write_2_byte 0x00017203 Thumb Code 20 drv_dsi_tx.o(i.drv_tx_phy_test_write_2_byte) + i.drv_tx_phy_test_write_code 0x00017216 Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_write_code) + drv_tx_phy_test_write_code 0x00017217 Thumb Code 16 drv_dsi_tx.o(i.drv_tx_phy_test_write_code) + i.drv_vidc_clear_irq 0x00017226 Section 0 drv_vidc.o(i.drv_vidc_clear_irq) + i.drv_vidc_enable 0x0001722e Section 0 drv_vidc.o(i.drv_vidc_enable) + i.drv_vidc_enable_irq 0x00017248 Section 0 drv_vidc.o(i.drv_vidc_enable_irq) + i.drv_vidc_get_irq_status 0x00017288 Section 0 drv_vidc.o(i.drv_vidc_get_irq_status) + i.drv_vidc_init_module_enable 0x0001729c Section 0 drv_vidc.o(i.drv_vidc_init_module_enable) + i.drv_vidc_register_callback 0x000172c4 Section 0 drv_vidc.o(i.drv_vidc_register_callback) + i.drv_vidc_reset 0x000172d0 Section 0 drv_vidc.o(i.drv_vidc_reset) + i.drv_vidc_set_dst_parameter 0x000172d6 Section 0 drv_vidc.o(i.drv_vidc_set_dst_parameter) + i.drv_vidc_set_irqen 0x00017312 Section 0 drv_vidc.o(i.drv_vidc_set_irqen) + i.drv_vidc_set_mirror 0x00017326 Section 0 drv_vidc.o(i.drv_vidc_set_mirror) + i.drv_vidc_set_p2r_hcoef0 0x00017336 Section 0 drv_vidc.o(i.drv_vidc_set_p2r_hcoef0) + i.drv_vidc_set_p2r_hinitb 0x0001733e Section 0 drv_vidc.o(i.drv_vidc_set_p2r_hinitb) + i.drv_vidc_set_p2r_hinitr 0x00017364 Section 0 drv_vidc.o(i.drv_vidc_set_p2r_hinitr) + i.drv_vidc_set_pentile_swap 0x0001738c Section 0 drv_vidc.o(i.drv_vidc_set_pentile_swap) + i.drv_vidc_set_pu_ctrl 0x000173a4 Section 0 drv_vidc.o(i.drv_vidc_set_pu_ctrl) + i.drv_vidc_set_rotation 0x000173ae Section 0 drv_vidc.o(i.drv_vidc_set_rotation) + i.drv_vidc_set_scld_hcoef0 0x000173be Section 0 drv_vidc.o(i.drv_vidc_set_scld_hcoef0) + i.drv_vidc_set_scld_hcoef1 0x000173c8 Section 0 drv_vidc.o(i.drv_vidc_set_scld_hcoef1) + i.drv_vidc_set_scld_step 0x000173d2 Section 0 drv_vidc.o(i.drv_vidc_set_scld_step) + i.drv_vidc_set_scld_vcoef0 0x000173e4 Section 0 drv_vidc.o(i.drv_vidc_set_scld_vcoef0) + i.drv_vidc_set_scld_vcoef1 0x000173ee Section 0 drv_vidc.o(i.drv_vidc_set_scld_vcoef1) + i.drv_vidc_set_src_parameter 0x000173f8 Section 0 drv_vidc.o(i.drv_vidc_set_src_parameter) + i.drv_wdg_clear_counter 0x00017410 Section 0 drv_wdg.o(i.drv_wdg_clear_counter) + i.drv_wdg_clear_edge_flag 0x00017420 Section 0 drv_wdg.o(i.drv_wdg_clear_edge_flag) + drv_wdg_clear_edge_flag 0x00017421 Thumb Code 12 drv_wdg.o(i.drv_wdg_clear_edge_flag) + i.drv_wdg_read_edge_flag 0x00017430 Section 0 drv_wdg.o(i.drv_wdg_read_edge_flag) + drv_wdg_read_edge_flag 0x00017431 Thumb Code 10 drv_wdg.o(i.drv_wdg_read_edge_flag) + i.drv_wdg_set_int 0x00017440 Section 0 drv_wdg.o(i.drv_wdg_set_int) + i.fls_clr_interrupt_flag 0x00017474 Section 0 drv_fls.o(i.fls_clr_interrupt_flag) + i.fputc 0x0001747e Section 0 tau_log.o(i.fputc) + i.frame_start_cb 0x00017494 Section 0 ap_demo.o(i.frame_start_cb) + frame_start_cb 0x00017495 Thumb Code 50 ap_demo.o(i.frame_start_cb) + i.hal_dsi_rx_ctrl_create_handle 0x000174f0 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) + i.hal_dsi_rx_ctrl_deinit 0x00017520 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) + i.hal_dsi_rx_ctrl_dsc_async_handler 0x000175bc Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) + i.hal_dsi_rx_ctrl_gen_a_tear_signal 0x00017640 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) + i.hal_dsi_rx_ctrl_get_max_ret_size 0x00017668 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) + i.hal_dsi_rx_ctrl_init 0x00017690 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) + i.hal_dsi_rx_ctrl_init_clk 0x00017728 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) + hal_dsi_rx_ctrl_init_clk 0x00017729 Thumb Code 232 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) + i.hal_dsi_rx_ctrl_init_dsi_rx 0x00017858 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) + hal_dsi_rx_ctrl_init_dsi_rx 0x00017859 Thumb Code 180 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) + i.hal_dsi_rx_ctrl_init_memc 0x0001792c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) + hal_dsi_rx_ctrl_init_memc 0x0001792d Thumb Code 308 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) + i.hal_dsi_rx_ctrl_init_rxbr 0x00017a68 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) + hal_dsi_rx_ctrl_init_rxbr 0x00017a69 Thumb Code 288 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) + i.hal_dsi_rx_ctrl_init_vidc 0x00017b98 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) + hal_dsi_rx_ctrl_init_vidc 0x00017b99 Thumb Code 544 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) + i.hal_dsi_rx_ctrl_pre_init_pps 0x00017dc4 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_pre_init_pps) + i.hal_dsi_rx_ctrl_send_ack_cmd 0x00017e00 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) + i.hal_dsi_rx_ctrl_set_cus_esc_clk 0x00017ef0 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) + i.hal_dsi_rx_ctrl_set_cus_scld_filter 0x00017f1c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) + i.hal_dsi_rx_ctrl_set_cus_sync_line 0x00017f88 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) + i.hal_dsi_rx_ctrl_set_ipi_cfg 0x00017fbc Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) + hal_dsi_rx_ctrl_set_ipi_cfg 0x00017fbd Thumb Code 50 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) + i.hal_dsi_rx_ctrl_set_rxbr_clk 0x00017ff4 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) + hal_dsi_rx_ctrl_set_rxbr_clk 0x00017ff5 Thumb Code 114 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) + i.hal_dsi_rx_ctrl_set_sw_tear_mode 0x00018068 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) + i.hal_dsi_rx_ctrl_set_tear_mode_ex 0x0001809c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_tear_mode_ex) + i.hal_dsi_rx_ctrl_start 0x000180ac Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) + i.hal_dsi_rx_ctrl_stop 0x000180e8 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) + i.hal_dsi_rx_ctrl_toggle_resolution 0x00018124 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) + i.hal_dsi_tx_calc_video_chunks 0x00018144 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) + hal_dsi_tx_calc_video_chunks 0x00018145 Thumb Code 384 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) + i.hal_dsi_tx_config_params_for_lane_rate 0x000182d4 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) + hal_dsi_tx_config_params_for_lane_rate 0x000182d5 Thumb Code 42 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) + i.hal_dsi_tx_count_lane_rate 0x00018308 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) + hal_dsi_tx_count_lane_rate 0x00018309 Thumb Code 1160 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) + i.hal_dsi_tx_ctrl_create_handle 0x000187d8 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) + i.hal_dsi_tx_ctrl_deinit 0x00018804 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) + i.hal_dsi_tx_ctrl_enter_init_panel_mode 0x0001884c Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) + i.hal_dsi_tx_ctrl_exit_init_panel_mode 0x00018898 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) + i.hal_dsi_tx_ctrl_init 0x000188c0 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) + i.hal_dsi_tx_ctrl_init_clk 0x00018984 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) + hal_dsi_tx_ctrl_init_clk 0x00018985 Thumb Code 36 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) + i.hal_dsi_tx_ctrl_panel_reset_pin 0x000189a8 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_panel_reset_pin) + i.hal_dsi_tx_ctrl_set_ccm 0x000189b4 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) + i.hal_dsi_tx_ctrl_set_overwrite_rgb 0x000189d4 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) + i.hal_dsi_tx_ctrl_set_partial_disp 0x000189e8 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp) + i.hal_dsi_tx_ctrl_set_partial_disp_area 0x000189f8 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp_area) + i.hal_dsi_tx_ctrl_start 0x00018a1c Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) + i.hal_dsi_tx_ctrl_stop 0x00018a88 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) + i.hal_dsi_tx_ctrl_write_array_cmd 0x00018acc Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) + i.hal_dsi_tx_ctrl_write_cmd 0x00018ba4 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) + i.hal_dsi_tx_init_data_mode 0x00018c54 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) + hal_dsi_tx_init_data_mode 0x00018c55 Thumb Code 58 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) + i.hal_dsi_tx_init_dpi_cfg 0x00018c98 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) + hal_dsi_tx_init_dpi_cfg 0x00018c99 Thumb Code 42 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) + i.hal_dsi_tx_init_interrupt 0x00018cc8 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) + hal_dsi_tx_init_interrupt 0x00018cc9 Thumb Code 28 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) + i.hal_dsi_tx_init_phy_cfg 0x00018ce8 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) + hal_dsi_tx_init_phy_cfg 0x00018ce9 Thumb Code 28 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) + i.hal_dsi_tx_init_remains 0x00018d08 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) + hal_dsi_tx_init_remains 0x00018d09 Thumb Code 142 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) + i.hal_dsi_tx_init_video_mode 0x00018d9c Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) + hal_dsi_tx_init_video_mode 0x00018d9d Thumb Code 82 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) + i.hal_dsi_tx_send_cmd 0x00018df4 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) + hal_dsi_tx_send_cmd 0x00018df5 Thumb Code 60 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) + i.hal_gpio_ctrl_eint 0x00018e38 Section 0 hal_gpio.o(i.hal_gpio_ctrl_eint) + i.hal_gpio_get_input_data 0x00018e50 Section 0 hal_gpio.o(i.hal_gpio_get_input_data) + i.hal_gpio_init_eint 0x00018e64 Section 0 hal_gpio.o(i.hal_gpio_init_eint) + i.hal_gpio_init_input 0x00018ea4 Section 0 hal_gpio.o(i.hal_gpio_init_input) + i.hal_gpio_init_output 0x00018ec4 Section 0 hal_gpio.o(i.hal_gpio_init_output) + i.hal_gpio_reg_eint_cb 0x00018eec Section 0 hal_gpio.o(i.hal_gpio_reg_eint_cb) + i.hal_gpio_set_ap_reset_int 0x00018f04 Section 0 hal_gpio.o(i.hal_gpio_set_ap_reset_int) + i.hal_gpio_set_mode 0x00018f54 Section 0 hal_gpio.o(i.hal_gpio_set_mode) + i.hal_gpio_set_output_data 0x00018fb4 Section 0 hal_gpio.o(i.hal_gpio_set_output_data) + i.hal_gpio_set_pull_state 0x00018fbc Section 0 hal_gpio.o(i.hal_gpio_set_pull_state) + i.hal_i2c_m_dma_init 0x00018fdc Section 0 hal_i2c_master.o(i.hal_i2c_m_dma_init) + i.hal_i2c_m_dma_read 0x00019048 Section 0 hal_i2c_master.o(i.hal_i2c_m_dma_read) + i.hal_i2c_m_dma_write 0x00019068 Section 0 hal_i2c_master.o(i.hal_i2c_m_dma_write) + i.hal_i2c_m_transfer_complate 0x00019084 Section 0 hal_i2c_master.o(i.hal_i2c_m_transfer_complate) + i.hal_i2c_master_irq_callback 0x00019090 Section 0 hal_i2c_master.o(i.hal_i2c_master_irq_callback) + hal_i2c_master_irq_callback 0x00019091 Thumb Code 24 hal_i2c_master.o(i.hal_i2c_master_irq_callback) + i.hal_i2c_s_dma_user_callback 0x000190b0 Section 0 hal_i2c_slave.o(i.hal_i2c_s_dma_user_callback) + hal_i2c_s_dma_user_callback 0x000190b1 Thumb Code 12 hal_i2c_slave.o(i.hal_i2c_s_dma_user_callback) + i.hal_i2c_s_dma_write 0x000190c0 Section 0 hal_i2c_slave.o(i.hal_i2c_s_dma_write) + i.hal_i2c_s_init 0x000190f8 Section 0 hal_i2c_slave.o(i.hal_i2c_s_init) + i.hal_i2c_s_nonblocking_read 0x00019164 Section 0 hal_i2c_slave.o(i.hal_i2c_s_nonblocking_read) + i.hal_i2c_s_set_transfer 0x00019178 Section 0 hal_i2c_slave.o(i.hal_i2c_s_set_transfer) + i.hal_i2c_slave_irq_callback 0x00019184 Section 0 hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) + hal_i2c_slave_irq_callback 0x00019185 Thumb Code 304 hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) + i.hal_internal_init_memc 0x000192d0 Section 0 hal_internal_vsync.o(i.hal_internal_init_memc) + i.hal_internal_sync_get_fb_setting 0x000193b4 Section 0 hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) + i.hal_internal_sync_input_resolution_change 0x000193c4 Section 0 hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) + i.hal_internal_vsync_deinit 0x000195d8 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_deinit) + i.hal_internal_vsync_get_rx_state 0x000195f4 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) + i.hal_internal_vsync_get_sync_line 0x00019600 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) + i.hal_internal_vsync_get_tx_state 0x00019618 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) + i.hal_internal_vsync_init_rx 0x00019624 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_init_rx) + i.hal_internal_vsync_init_tx 0x00019720 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_init_tx) + i.hal_internal_vsync_set_auto_hw_filter 0x000197d0 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) + i.hal_internal_vsync_set_rx_state 0x000198ec Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) + i.hal_internal_vsync_set_sync_line 0x00019900 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) + i.hal_internal_vsync_set_tear_mode 0x0001991c Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) + i.hal_internal_vsync_set_tx_state 0x00019964 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) + i.hal_lcdc_config_ccm 0x000199a4 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) + hal_lcdc_config_ccm 0x000199a5 Thumb Code 30 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) + i.hal_lcdc_config_remains 0x000199c8 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) + hal_lcdc_config_remains 0x000199c9 Thumb Code 68 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) + i.hal_lcdc_config_rgb_to_pentile 0x00019a10 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_rgb_to_pentile) + hal_lcdc_config_rgb_to_pentile 0x00019a11 Thumb Code 14 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_rgb_to_pentile) + i.hal_lcdc_config_upscaler 0x00019a24 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) + hal_lcdc_config_upscaler 0x00019a25 Thumb Code 348 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) + i.hal_lcdc_init_cfg 0x00019b88 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) + hal_lcdc_init_cfg 0x00019b89 Thumb Code 60 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) + i.hal_lcdc_init_clk 0x00019bc8 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) + hal_lcdc_init_clk 0x00019bc9 Thumb Code 376 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) + i.hal_lcdc_init_interrupt 0x00019d48 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) + hal_lcdc_init_interrupt 0x00019d49 Thumb Code 58 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) + i.hal_spi_m_clear_rxfifo 0x00019d88 Section 0 hal_spi_master.o(i.hal_spi_m_clear_rxfifo) + i.hal_system_enable_systick 0x00019d96 Section 0 hal_system.o(i.hal_system_enable_systick) + i.hal_system_init 0x00019da0 Section 0 hal_system.o(i.hal_system_init) + i.hal_system_init_console 0x00019e28 Section 0 hal_system.o(i.hal_system_init_console) + i.hal_system_set_phy_calibration 0x00019e44 Section 0 hal_system.o(i.hal_system_set_phy_calibration) + i.hal_system_set_pvd 0x00019e4c Section 0 hal_system.o(i.hal_system_set_pvd) + i.hal_system_set_vcc 0x00019e54 Section 0 hal_system.o(i.hal_system_set_vcc) + i.hal_timer_init 0x00019e5c Section 0 hal_timer.o(i.hal_timer_init) + i.hal_timer_start 0x00019e78 Section 0 hal_timer.o(i.hal_timer_start) + i.hal_uart_init 0x00019ec8 Section 0 hal_uart.o(i.hal_uart_init) + i.hal_uart_transmit_blocking 0x00019f54 Section 0 hal_uart.o(i.hal_uart_transmit_blocking) + i.handle_init 0x00019f64 Section 0 irq_redirect .o(i.handle_init) + i.init_mipi_tx 0x0001a074 Section 0 ap_demo.o(i.init_mipi_tx) + init_mipi_tx 0x0001a075 Thumb Code 104 ap_demo.o(i.init_mipi_tx) + i.init_panel 0x0001a0e4 Section 0 ap_demo.o(i.init_panel) + init_panel 0x0001a0e5 Thumb Code 142 ap_demo.o(i.init_panel) + i.main 0x0001a17c Section 0 main.o(i.main) + i.open_mipi_rx 0x0001a188 Section 0 ap_demo.o(i.open_mipi_rx) + open_mipi_rx 0x0001a189 Thumb Code 164 ap_demo.o(i.open_mipi_rx) + i.pps_update_handle 0x0001a254 Section 0 ap_demo.o(i.pps_update_handle) + pps_update_handle 0x0001a255 Thumb Code 90 ap_demo.o(i.pps_update_handle) + i.rx_get_dcs_packet_data 0x0001a314 Section 0 hal_internal_vsync.o(i.rx_get_dcs_packet_data) + rx_get_dcs_packet_data 0x0001a315 Thumb Code 654 hal_internal_vsync.o(i.rx_get_dcs_packet_data) + i.rx_partial_update 0x0001a708 Section 0 hal_internal_vsync.o(i.rx_partial_update) + rx_partial_update 0x0001a709 Thumb Code 304 hal_internal_vsync.o(i.rx_partial_update) + i.rx_receive_packet 0x0001a848 Section 0 hal_internal_vsync.o(i.rx_receive_packet) + rx_receive_packet 0x0001a849 Thumb Code 128 hal_internal_vsync.o(i.rx_receive_packet) + i.rx_receive_pps 0x0001a8d4 Section 0 hal_internal_vsync.o(i.rx_receive_pps) + rx_receive_pps 0x0001a8d5 Thumb Code 268 hal_internal_vsync.o(i.rx_receive_pps) + i.rxbr_irq0_callback 0x0001aa54 Section 0 hal_internal_vsync.o(i.rxbr_irq0_callback) + rxbr_irq0_callback 0x0001aa55 Thumb Code 158 hal_internal_vsync.o(i.rxbr_irq0_callback) + i.rxbr_irq1_callback 0x0001aaf8 Section 0 hal_internal_vsync.o(i.rxbr_irq1_callback) + rxbr_irq1_callback 0x0001aaf9 Thumb Code 222 hal_internal_vsync.o(i.rxbr_irq1_callback) + i.soft_gen_te 0x0001ac68 Section 0 hal_internal_vsync.o(i.soft_gen_te) + soft_gen_te 0x0001ac69 Thumb Code 116 hal_internal_vsync.o(i.soft_gen_te) + i.soft_timer3_cb 0x0001acf4 Section 0 ap_demo.o(i.soft_timer3_cb) + soft_timer3_cb 0x0001acf5 Thumb Code 36 ap_demo.o(i.soft_timer3_cb) + i.sqrt 0x0001ad24 Section 0 sqrt.o(i.sqrt) + i.tp_heartbeat_exec 0x0001ad6c Section 0 ap_demo.o(i.tp_heartbeat_exec) + i.vidc_callback 0x0001add4 Section 0 hal_internal_vsync.o(i.vidc_callback) + vidc_callback 0x0001add5 Thumb Code 194 hal_internal_vsync.o(i.vidc_callback) + i.vpre_err_reset 0x0001aebc Section 0 hal_internal_vsync.o(i.vpre_err_reset) + vpre_err_reset 0x0001aebd Thumb Code 184 hal_internal_vsync.o(i.vpre_err_reset) + i.vsync_set_te_mode 0x0001af8c Section 0 hal_internal_vsync.o(i.vsync_set_te_mode) + vsync_set_te_mode 0x0001af8d Thumb Code 254 hal_internal_vsync.o(i.vsync_set_te_mode) + .constdata 0x0001b128 Section 9400 ap_demo.o(.constdata) + g_cus_rx_dcs_execute_table 0x0001b128 Data 108 ap_demo.o(.constdata) + .constdata 0x0001d5e0 Section 32 app_tp_st_touch.o(.constdata) + .constdata 0x0001d600 Section 210 hal_gpio.o(.constdata) + s_gpio_map 0x0001d600 Data 120 hal_gpio.o(.constdata) + s_gpio_perf 0x0001d678 Data 90 hal_gpio.o(.constdata) + .constdata 0x0001d6d2 Section 5286 app_tp_for_custom_s8.o(.constdata) + .constdata 0x0001eb78 Section 1 app_tp_for_custom_s8.o(.constdata) + .constdata 0x0001eb7c Section 8 drv_param_init.o(.constdata) + .constdata 0x0001eb84 Section 390 drv_phy_common.o(.constdata) + phy_para_mapping_h 0x0001eb84 Data 184 drv_phy_common.o(.constdata) + phy_para_mapping_l 0x0001ec3c Data 128 drv_phy_common.o(.constdata) + phy_data_high_map 0x0001ecbc Data 48 drv_phy_common.o(.constdata) + phy_data_lp_map 0x0001ecec Data 30 drv_phy_common.o(.constdata) + .conststring 0x0001ed0c Section 72 hal_dsi_rx_ctrl.o(.conststring) + .conststring 0x0001ed54 Section 308 hal_internal_vsync.o(.conststring) .ARM.__AT_0x00070100 0x00070100 Section 192 irq_redirect .o(.ARM.__AT_0x00070100) .data 0x000701d0 Section 560 ap_demo.o(.data) start_display_on 0x000701d0 Data 1 ap_demo.o(.data) @@ -3804,435 +3803,435 @@ Image Symbol Table __scatterload_null 0x0001153b Thumb Code 2 handlers.o(i.__scatterload_null) __scatterload_zeroinit 0x0001153d Thumb Code 14 handlers.o(i.__scatterload_zeroinit) __set_errno 0x0001154d Thumb Code 6 errno.o(i.__set_errno) - ap_demo 0x00012ded Thumb Code 284 ap_demo.o(i.ap_demo) - ap_get_tp_calibration_status_01 0x00013015 Thumb Code 28 app_tp_st_touch.o(i.ap_get_tp_calibration_status_01) - ap_set_tp_calibration_04 0x00013221 Thumb Code 138 app_tp_st_touch.o(i.ap_set_tp_calibration_04) - ap_tp_st_touch_calibration 0x000132b9 Thumb Code 170 app_tp_st_touch.o(i.ap_tp_st_touch_calibration) - ap_tp_st_touch_error_handler_F3 0x00013369 Thumb Code 26 app_tp_st_touch.o(i.ap_tp_st_touch_error_handler_F3) - ap_tp_st_touch_error_handler_FF 0x00013383 Thumb Code 32 app_tp_st_touch.o(i.ap_tp_st_touch_error_handler_FF) - ap_tp_st_touch_get_calibration_success_mark 0x000133a5 Thumb Code 150 app_tp_st_touch.o(i.ap_tp_st_touch_get_calibration_success_mark) - ap_tp_st_touch_scan_point_init 0x0001344d Thumb Code 24 app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_init) - ap_tp_st_touch_scan_point_record_event 0x00013469 Thumb Code 142 app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_record_event) - ap_tp_st_touch_scan_point_record_event_exec 0x000134fd Thumb Code 50 app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_record_event_exec) - ap_tp_st_touch_simulate_finger_release_event 0x0001354d Thumb Code 44 app_tp_st_touch.o(i.ap_tp_st_touch_simulate_finger_release_event) - ap_tp_st_touch_software_reset 0x00013581 Thumb Code 118 app_tp_st_touch.o(i.ap_tp_st_touch_software_reset) - app_ADC_IRQn_Handler 0x00013699 Thumb Code 22 drv_rxbr.o(i.app_ADC_IRQn_Handler) - app_AP_NRESET_IRQn_Handler 0x000136b5 Thumb Code 32 drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) - app_EXTI_INT0_IRQn_Handler 0x000136d9 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) - app_EXTI_INT1_IRQn_Handler 0x000136f5 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) - app_EXTI_INT2_IRQn_Handler 0x00013711 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) - app_EXTI_INT3_IRQn_Handler 0x0001372d Thumb Code 22 drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) - app_EXTI_INT4_IRQn_Handler 0x00013749 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) - app_EXTI_INT5_IRQn_Handler 0x00013765 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) - app_EXTI_INT6_IRQn_Handler 0x00013781 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) - app_EXTI_INT7_IRQn_Handler 0x0001379d Thumb Code 22 drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) - app_HardFault_Handler 0x000137b9 Thumb Code 12 drv_common.o(i.app_HardFault_Handler) - app_I2C0_IRQn_Handler 0x00013801 Thumb Code 8 drv_i2c_slave.o(i.app_I2C0_IRQn_Handler) - app_I2C1_IRQn_Handler 0x00013811 Thumb Code 8 drv_i2c_master.o(i.app_I2C1_IRQn_Handler) - app_LCDC_IRQn_Handler 0x00013821 Thumb Code 98 hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) - app_MEMC_IRQn_Handler 0x00013901 Thumb Code 132 drv_memc.o(i.app_MEMC_IRQn_Handler) - app_MIPI_RX_IRQn_Handler 0x00013989 Thumb Code 232 drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) - app_MIPI_TX_IRQn_Handler 0x00013c21 Thumb Code 56 drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) - app_PWMDET_IRQn_Handler 0x00013cc1 Thumb Code 62 drv_pwm.o(i.app_PWMDET_IRQn_Handler) - app_SPIM_IRQn_Handler 0x00013d09 Thumb Code 34 drv_spi_master.o(i.app_SPIM_IRQn_Handler) - app_SPIS_IRQn_Handler 0x00013d39 Thumb Code 500 hal_spi_slave.o(i.app_SPIS_IRQn_Handler) - app_SWIRE_IRQn_Handler 0x00013f39 Thumb Code 28 drv_swire.o(i.app_SWIRE_IRQn_Handler) - app_SysTick_Handler 0x00013f59 Thumb Code 20 drv_common.o(i.app_SysTick_Handler) - app_TIMER0_IRQn_Handler 0x00013f71 Thumb Code 10 drv_timer.o(i.app_TIMER0_IRQn_Handler) - app_TIMER1_IRQn_Handler 0x00013f7b Thumb Code 10 drv_timer.o(i.app_TIMER1_IRQn_Handler) - app_TIMER2_IRQn_Handler 0x00013f85 Thumb Code 10 drv_timer.o(i.app_TIMER2_IRQn_Handler) - app_TIMER3_IRQn_Handler 0x00013f8f Thumb Code 10 drv_timer.o(i.app_TIMER3_IRQn_Handler) - app_UART_IRQn_Handler 0x00013f99 Thumb Code 8 drv_uart.o(i.app_UART_IRQn_Handler) - app_VIDC_IRQn_Handler 0x00013fa1 Thumb Code 22 drv_vidc.o(i.app_VIDC_IRQn_Handler) - app_VPRE_IRQn_Handler 0x00013fbd Thumb Code 22 drv_rxbr.o(i.app_VPRE_IRQn_Handler) - app_WDG_IRQn_Handler 0x00013fd9 Thumb Code 52 drv_wdg.o(i.app_WDG_IRQn_Handler) - app_dma_irq_handler 0x00014011 Thumb Code 10 drv_dma.o(i.app_dma_irq_handler) - app_fls_ctrl_Handler 0x00014021 Thumb Code 38 norflash.o(i.app_fls_ctrl_Handler) - app_tp_I2C_init 0x00014051 Thumb Code 26 app_tp_transfer.o(i.app_tp_I2C_init) - app_tp_calibration_exec 0x00014075 Thumb Code 78 app_tp_st_touch.o(i.app_tp_calibration_exec) - app_tp_init 0x0001414d Thumb Code 56 app_tp_transfer.o(i.app_tp_init) - app_tp_m_read 0x00014191 Thumb Code 32 app_tp_transfer.o(i.app_tp_m_read) - app_tp_m_write 0x000141b1 Thumb Code 8 app_tp_transfer.o(i.app_tp_m_write) - app_tp_phone_analysis_data 0x000141b9 Thumb Code 806 app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) - app_tp_phone_clear_reset_on 0x0001450d Thumb Code 8 app_tp_transfer.o(i.app_tp_phone_clear_reset_on) - app_tp_s_read 0x00014519 Thumb Code 8 app_tp_transfer.o(i.app_tp_s_read) - app_tp_s_write 0x00014521 Thumb Code 8 app_tp_transfer.o(i.app_tp_s_write) - app_tp_screen_analysis_int 0x00014529 Thumb Code 670 app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) - app_tp_screen_init 0x000147d5 Thumb Code 42 app_tp_transfer.o(i.app_tp_screen_init) - app_tp_transfer_screen_int 0x00014851 Thumb Code 252 app_tp_transfer.o(i.app_tp_transfer_screen_int) - app_tp_transfer_screen_start 0x00014985 Thumb Code 18 app_tp_transfer.o(i.app_tp_transfer_screen_start) - board_Init 0x0001499d Thumb Code 30 board.o(i.board_Init) - ceil 0x00014d8d Thumb Code 180 ceil.o(i.ceil) - dcs_packet_fifo_alloc 0x00014f15 Thumb Code 80 dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) - dcs_packet_fifo_init 0x00014f6d Thumb Code 18 dcs_packet_fifo.o(i.dcs_packet_fifo_init) - dcs_packet_free_fifo_header 0x00014f85 Thumb Code 60 dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) - dcs_packet_get_fifo_header 0x00014fc9 Thumb Code 26 dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) - delayMs 0x00015009 Thumb Code 24 tau_delay.o(i.delayMs) - delayUs 0x00015021 Thumb Code 34 tau_delay.o(i.delayUs) - drv_ap_rst_trig_edge_detect 0x00015045 Thumb Code 46 drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) - drv_chip_info_get_info 0x0001507d Thumb Code 6 drv_chip_info.o(i.drv_chip_info_get_info) - drv_chip_info_init 0x00015089 Thumb Code 56 drv_chip_info.o(i.drv_chip_info_init) - drv_chip_rx_info_check 0x000150c9 Thumb Code 122 drv_chip_info.o(i.drv_chip_rx_info_check) - drv_chip_rx_init_done 0x00015191 Thumb Code 16 drv_chip_info.o(i.drv_chip_rx_init_done) - drv_common_enable_systick 0x000151a5 Thumb Code 70 drv_common.o(i.drv_common_enable_systick) - drv_common_system_init 0x000151fd Thumb Code 8 drv_common.o(i.drv_common_system_init) - drv_crgu_config_reset_modules 0x00015205 Thumb Code 10 drv_crgu.o(i.drv_crgu_config_reset_modules) - drv_crgu_set_ahb_pre_div 0x00015215 Thumb Code 14 drv_crgu.o(i.drv_crgu_set_ahb_pre_div) - drv_crgu_set_ahb_src 0x00015229 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_ahb_src) - drv_crgu_set_clock 0x0001523d Thumb Code 26 drv_crgu.o(i.drv_crgu_set_clock) - drv_crgu_set_dpi_mux_src 0x0001525d Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dpi_mux_src) - drv_crgu_set_dpi_pre_div 0x00015271 Thumb Code 18 drv_crgu.o(i.drv_crgu_set_dpi_pre_div) - drv_crgu_set_dpi_pre_src 0x00015289 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dpi_pre_src) - drv_crgu_set_dsc_core_div 0x0001529d Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dsc_core_div) - drv_crgu_set_dsco_src 0x000152b1 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dsco_src) - drv_crgu_set_dsco_src_div 0x000152c5 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dsco_src_div) - drv_crgu_set_fb_div 0x000152d9 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_fb_div) - drv_crgu_set_fb_src 0x000152ed Thumb Code 16 drv_crgu.o(i.drv_crgu_set_fb_src) - drv_crgu_set_lcdc_div 0x00015301 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_lcdc_div) - drv_crgu_set_lcdc_src 0x00015315 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_lcdc_src) - drv_crgu_set_mipi_cfg_src 0x00015329 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_mipi_cfg_src) - drv_crgu_set_mipi_ref_src 0x0001533d Thumb Code 18 drv_crgu.o(i.drv_crgu_set_mipi_ref_src) - drv_crgu_set_reset 0x00015355 Thumb Code 20 drv_crgu.o(i.drv_crgu_set_reset) - drv_crgu_set_rxbr_div 0x0001536d Thumb Code 16 drv_crgu.o(i.drv_crgu_set_rxbr_div) - drv_crgu_set_rxbr_src 0x00015381 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_rxbr_src) - drv_crgu_set_vidc_src 0x00015395 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_vidc_src) - drv_dma_clear_flag 0x000153a9 Thumb Code 24 drv_dma.o(i.drv_dma_clear_flag) - drv_dma_create_handle 0x000153c1 Thumb Code 22 drv_dma.o(i.drv_dma_create_handle) - drv_dma_disenable_channel 0x000153dd Thumb Code 16 drv_dma.o(i.drv_dma_disenable_channel) - drv_dma_enable_channel 0x000153ed Thumb Code 16 drv_dma.o(i.drv_dma_enable_channel) - drv_dma_enable_channel_interrupts 0x000153fd Thumb Code 32 drv_dma.o(i.drv_dma_enable_channel_interrupts) - drv_dma_get_channel_flag 0x00015421 Thumb Code 12 drv_dma.o(i.drv_dma_get_channel_flag) - drv_dma_irq_handler 0x0001542d Thumb Code 138 drv_dma.o(i.drv_dma_irq_handler) - drv_dma_prepar_transfer 0x000154bd Thumb Code 18 drv_dma.o(i.drv_dma_prepar_transfer) - drv_dma_set_burst 0x000154cf Thumb Code 26 drv_dma.o(i.drv_dma_set_burst) - drv_dma_set_callback 0x000154e9 Thumb Code 6 drv_dma.o(i.drv_dma_set_callback) - drv_dma_set_transfer 0x000154f1 Thumb Code 62 drv_dma.o(i.drv_dma_set_transfer) - drv_dsc_dec_convert_pps_rc_parameter 0x00015535 Thumb Code 54 drv_dsc_dec.o(i.drv_dsc_dec_convert_pps_rc_parameter) - drv_dsc_dec_disable 0x0001556b Thumb Code 12 drv_dsc_dec.o(i.drv_dsc_dec_disable) - drv_dsc_dec_enable 0x00015579 Thumb Code 88 drv_dsc_dec.o(i.drv_dsc_dec_enable) - drv_dsc_dec_get_nslc 0x000155ed Thumb Code 10 drv_dsc_dec.o(i.drv_dsc_dec_get_nslc) - drv_dsc_dec_set_u8_pps 0x000155f7 Thumb Code 40 drv_dsc_dec.o(i.drv_dsc_dec_set_u8_pps) - drv_dsi_rx_calc_ipi_tx_delay 0x00015621 Thumb Code 244 drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) - drv_dsi_rx_enable_irq 0x00015725 Thumb Code 58 drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) - drv_dsi_rx_get_compression_en 0x000157d1 Thumb Code 8 drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) - drv_dsi_rx_get_max_ret_size 0x000157d9 Thumb Code 6 drv_dsi_rx.o(i.drv_dsi_rx_get_max_ret_size) - drv_dsi_rx_power_up 0x000157df Thumb Code 14 drv_dsi_rx.o(i.drv_dsi_rx_power_up) - drv_dsi_rx_set_ctrl_cfg 0x000157ed Thumb Code 32 drv_dsi_rx.o(i.drv_dsi_rx_set_ctrl_cfg) - drv_dsi_rx_set_ddi_cfg 0x0001580d Thumb Code 16 drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) - drv_dsi_rx_set_inten 0x0001581d Thumb Code 4 drv_dsi_rx.o(i.drv_dsi_rx_set_inten) - drv_dsi_rx_set_ipi_cfg 0x00015821 Thumb Code 16 drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_cfg) - drv_dsi_rx_set_lane_swap 0x00015831 Thumb Code 70 drv_dsi_rx.o(i.drv_dsi_rx_set_lane_swap) - drv_dsi_rx_set_resp_cnt 0x00015877 Thumb Code 38 drv_dsi_rx.o(i.drv_dsi_rx_set_resp_cnt) - drv_dsi_rx_set_up_phy 0x0001589d Thumb Code 236 drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) - drv_dsi_rx_shut_down 0x0001598d Thumb Code 14 drv_dsi_rx.o(i.drv_dsi_rx_shut_down) - drv_dsi_tx_command_header 0x0001599b Thumb Code 20 drv_dsi_tx.o(i.drv_dsi_tx_command_header) - drv_dsi_tx_command_mode_cfg 0x000159af Thumb Code 108 drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) - drv_dsi_tx_command_put_payload 0x00015a1b Thumb Code 4 drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) - drv_dsi_tx_config_eotp 0x00015a1f Thumb Code 24 drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) - drv_dsi_tx_config_int 0x00015a37 Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_config_int) - drv_dsi_tx_dpi_lpcmd_time 0x00015a3f Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_dpi_lpcmd_time) - drv_dsi_tx_dpi_mode 0x00015a47 Thumb Code 10 drv_dsi_tx.o(i.drv_dsi_tx_dpi_mode) - drv_dsi_tx_dpi_polarity 0x00015a51 Thumb Code 36 drv_dsi_tx.o(i.drv_dsi_tx_dpi_polarity) - drv_dsi_tx_edpi_cmd_size 0x00015a75 Thumb Code 4 drv_dsi_tx.o(i.drv_dsi_tx_edpi_cmd_size) - drv_dsi_tx_get_cmd_status 0x00015a79 Thumb Code 4 drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) - drv_dsi_tx_mode 0x00015a7d Thumb Code 4 drv_dsi_tx.o(i.drv_dsi_tx_mode) - drv_dsi_tx_phy_clock_lane_auto_lp 0x00015a81 Thumb Code 24 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_auto_lp) - drv_dsi_tx_phy_clock_lane_req_hs 0x00015a99 Thumb Code 26 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) - drv_dsi_tx_phy_lane_mode 0x00015ab3 Thumb Code 12 drv_dsi_tx.o(i.drv_dsi_tx_phy_lane_mode) - drv_dsi_tx_phy_status_ready 0x00015abf Thumb Code 100 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ready) - drv_dsi_tx_phy_status_stopstate 0x00015b23 Thumb Code 62 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) - drv_dsi_tx_phy_test_setup 0x00015b61 Thumb Code 268 drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) - drv_dsi_tx_phy_time_cfg 0x00015c6d Thumb Code 30 drv_dsi_tx.o(i.drv_dsi_tx_phy_time_cfg) - drv_dsi_tx_powerup 0x00015c8b Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_powerup) - drv_dsi_tx_response_mode 0x00015c93 Thumb Code 28 drv_dsi_tx.o(i.drv_dsi_tx_response_mode) - drv_dsi_tx_set_bta_ack 0x00015caf Thumb Code 24 drv_dsi_tx.o(i.drv_dsi_tx_set_bta_ack) - drv_dsi_tx_set_esc_div 0x00015cc7 Thumb Code 12 drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) - drv_dsi_tx_set_int 0x00015cd5 Thumb Code 46 drv_dsi_tx.o(i.drv_dsi_tx_set_int) - drv_dsi_tx_set_time_out_div 0x00015d09 Thumb Code 16 drv_dsi_tx.o(i.drv_dsi_tx_set_time_out_div) - drv_dsi_tx_set_video_chunk 0x00015d19 Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_set_video_chunk) - drv_dsi_tx_set_video_timing 0x00015d21 Thumb Code 34 drv_dsi_tx.o(i.drv_dsi_tx_set_video_timing) - drv_dsi_tx_shutdown 0x00015d43 Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_shutdown) - drv_dsi_tx_timeout_cfg 0x00015d4b Thumb Code 38 drv_dsi_tx.o(i.drv_dsi_tx_timeout_cfg) - drv_dsi_tx_video_mode_cfg 0x00015d71 Thumb Code 170 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_cfg) - drv_dsi_tx_video_mode_disable_hact_cmd 0x00015e1b Thumb Code 22 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_disable_hact_cmd) - drv_dsi_tx_video_mode_set_lp_cmd 0x00015e31 Thumb Code 24 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_set_lp_cmd) - drv_efuse_enter_inactive 0x00015e49 Thumb Code 32 drv_efuse.o(i.drv_efuse_enter_inactive) - drv_efuse_int_enable 0x00015e69 Thumb Code 12 drv_efuse.o(i.drv_efuse_int_enable) - drv_efuse_read 0x00015e75 Thumb Code 50 drv_efuse.o(i.drv_efuse_read) - drv_efuse_read_req 0x00015ea7 Thumb Code 24 drv_efuse.o(i.drv_efuse_read_req) - drv_gpio_get_input_data 0x00015ec1 Thumb Code 20 drv_gpio.o(i.drv_gpio_get_input_data) - drv_gpio_register_ap_reset_callback 0x00015ed9 Thumb Code 6 drv_gpio.o(i.drv_gpio_register_ap_reset_callback) - drv_gpio_register_callback 0x00015ee5 Thumb Code 14 drv_gpio.o(i.drv_gpio_register_callback) - drv_gpio_set_int 0x00015ef9 Thumb Code 62 drv_gpio.o(i.drv_gpio_set_int) - drv_gpio_set_ioe 0x00015f3d Thumb Code 26 drv_gpio.o(i.drv_gpio_set_ioe) - drv_gpio_set_mode0 0x00015f5d Thumb Code 12 drv_gpio.o(i.drv_gpio_set_mode0) - drv_gpio_set_mode1 0x00015f6d Thumb Code 12 drv_gpio.o(i.drv_gpio_set_mode1) - drv_gpio_set_mode2 0x00015f7d Thumb Code 12 drv_gpio.o(i.drv_gpio_set_mode2) - drv_gpio_set_mode3 0x00015f8d Thumb Code 12 drv_gpio.o(i.drv_gpio_set_mode3) - drv_gpio_set_pull_state 0x00015fbd Thumb Code 298 drv_gpio.o(i.drv_gpio_set_pull_state) - drv_i2c_dma_init 0x00016121 Thumb Code 146 drv_i2c_dma.o(i.drv_i2c_dma_init) - drv_i2c_enable_rx_dma 0x000161cd Thumb Code 26 drv_i2c_dma.o(i.drv_i2c_enable_rx_dma) - drv_i2c_enable_tx_dma 0x000161e7 Thumb Code 24 drv_i2c_dma.o(i.drv_i2c_enable_tx_dma) - drv_i2c_m_clear_it_pending_bit 0x00016201 Thumb Code 86 drv_i2c_master.o(i.drv_i2c_m_clear_it_pending_bit) - drv_i2c_m_enable 0x00016261 Thumb Code 10 drv_i2c_master.o(i.drv_i2c_m_enable) - drv_i2c_m_enable_intr 0x00016271 Thumb Code 42 drv_i2c_master.o(i.drv_i2c_m_enable_intr) - drv_i2c_m_set_callback 0x000162a9 Thumb Code 6 drv_i2c_master.o(i.drv_i2c_m_set_callback) - drv_i2c_master_init 0x000162b5 Thumb Code 118 drv_i2c_master.o(i.drv_i2c_master_init) - drv_i2c_master_read_dma 0x00016341 Thumb Code 82 drv_i2c_dma.o(i.drv_i2c_master_read_dma) - drv_i2c_master_write_dma 0x0001639d Thumb Code 50 drv_i2c_dma.o(i.drv_i2c_master_write_dma) - drv_i2c_s_clear_it_pending_bit 0x00016409 Thumb Code 84 drv_i2c_slave.o(i.drv_i2c_s_clear_it_pending_bit) - drv_i2c_s_enable_intr 0x00016465 Thumb Code 40 drv_i2c_slave.o(i.drv_i2c_s_enable_intr) - drv_i2c_s_get_fifo_status 0x00016499 Thumb Code 22 drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) - drv_i2c_s_set_callback 0x000164b5 Thumb Code 6 drv_i2c_slave.o(i.drv_i2c_s_set_callback) - drv_i2c_s_write_data 0x000164c1 Thumb Code 26 drv_i2c_slave.o(i.drv_i2c_s_write_data) - drv_i2c_set_dma_irq_callback 0x000164e1 Thumb Code 68 drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) - drv_i2c_slave_init 0x00016539 Thumb Code 60 drv_i2c_slave.o(i.drv_i2c_slave_init) - drv_i2c_slave_write_dma 0x0001657d Thumb Code 18 drv_i2c_dma.o(i.drv_i2c_slave_write_dma) - drv_lcdc_config_bypass 0x00016599 Thumb Code 24 drv_lcdc.o(i.drv_lcdc_config_bypass) - drv_lcdc_config_ccm 0x000165b1 Thumb Code 48 drv_lcdc.o(i.drv_lcdc_config_ccm) - drv_lcdc_config_disp_mode 0x000165e1 Thumb Code 22 drv_lcdc.o(i.drv_lcdc_config_disp_mode) - drv_lcdc_config_dpi_polarity 0x000165f7 Thumb Code 36 drv_lcdc.o(i.drv_lcdc_config_dpi_polarity) - drv_lcdc_config_dpi_timing 0x0001661b Thumb Code 38 drv_lcdc.o(i.drv_lcdc_config_dpi_timing) - drv_lcdc_config_edpi_mode 0x00016641 Thumb Code 22 drv_lcdc.o(i.drv_lcdc_config_edpi_mode) - drv_lcdc_config_endianness 0x00016657 Thumb Code 22 drv_lcdc.o(i.drv_lcdc_config_endianness) - drv_lcdc_config_input_size 0x0001666d Thumb Code 12 drv_lcdc.o(i.drv_lcdc_config_input_size) - drv_lcdc_config_int 0x00016679 Thumb Code 30 drv_lcdc.o(i.drv_lcdc_config_int) - drv_lcdc_config_int_single 0x00016697 Thumb Code 34 drv_lcdc.o(i.drv_lcdc_config_int_single) - drv_lcdc_config_overwrite 0x000166b9 Thumb Code 34 drv_lcdc.o(i.drv_lcdc_config_overwrite) - drv_lcdc_config_overwrite_rgb 0x000166db Thumb Code 12 drv_lcdc.o(i.drv_lcdc_config_overwrite_rgb) - drv_lcdc_config_partial_display_area 0x000166e7 Thumb Code 26 drv_lcdc.o(i.drv_lcdc_config_partial_display_area) - drv_lcdc_config_partial_display_enable 0x00016701 Thumb Code 34 drv_lcdc.o(i.drv_lcdc_config_partial_display_enable) - drv_lcdc_config_scale_up_coef 0x00016723 Thumb Code 26 drv_lcdc.o(i.drv_lcdc_config_scale_up_coef) - drv_lcdc_config_scale_up_step 0x0001673d Thumb Code 12 drv_lcdc.o(i.drv_lcdc_config_scale_up_step) - drv_lcdc_config_src_parameter 0x00016749 Thumb Code 76 drv_lcdc.o(i.drv_lcdc_config_src_parameter) - drv_lcdc_config_thresh 0x00016795 Thumb Code 6 drv_lcdc.o(i.drv_lcdc_config_thresh) - drv_lcdc_ctrl_flow 0x0001679b Thumb Code 18 drv_lcdc.o(i.drv_lcdc_ctrl_flow) - drv_lcdc_enable_shadow_reg 0x000167ad Thumb Code 32 drv_lcdc.o(i.drv_lcdc_enable_shadow_reg) - drv_lcdc_set_int 0x000167cd Thumb Code 46 drv_lcdc.o(i.drv_lcdc_set_int) - drv_lcdc_set_video_hw_mode 0x00016801 Thumb Code 20 drv_lcdc.o(i.drv_lcdc_set_video_hw_mode) - drv_lcdc_start 0x00016815 Thumb Code 32 drv_lcdc.o(i.drv_lcdc_start) - drv_memc_clear_status 0x00016835 Thumb Code 12 drv_memc.o(i.drv_memc_clear_status) - drv_memc_enable_irq 0x00016841 Thumb Code 58 drv_memc.o(i.drv_memc_enable_irq) - drv_memc_gen_a_tear_signal 0x00016881 Thumb Code 12 drv_memc.o(i.drv_memc_gen_a_tear_signal) - drv_memc_get_status 0x0001688d Thumb Code 18 drv_memc.o(i.drv_memc_get_status) - drv_memc_rate_transfer_sel 0x0001689f Thumb Code 16 drv_memc.o(i.drv_memc_rate_transfer_sel) - drv_memc_sel_vsync 0x000168af Thumb Code 14 drv_memc.o(i.drv_memc_sel_vsync) - drv_memc_set_active_height 0x000168bd Thumb Code 14 drv_memc.o(i.drv_memc_set_active_height) - drv_memc_set_data_mode 0x000168d1 Thumb Code 12 drv_memc.o(i.drv_memc_set_data_mode) - drv_memc_set_double_buffer 0x000168dd Thumb Code 16 drv_memc.o(i.drv_memc_set_double_buffer) - drv_memc_set_double_buffer_reverse 0x000168ed Thumb Code 18 drv_memc.o(i.drv_memc_set_double_buffer_reverse) - drv_memc_set_fs_en_conditions 0x000168ff Thumb Code 16 drv_memc.o(i.drv_memc_set_fs_en_conditions) - drv_memc_set_inten 0x0001690f Thumb Code 20 drv_memc.o(i.drv_memc_set_inten) - drv_memc_set_lcdc_st_conditions 0x00016925 Thumb Code 18 drv_memc.o(i.drv_memc_set_lcdc_st_conditions) - drv_memc_set_ltpo_mode 0x0001693d Thumb Code 26 drv_memc.o(i.drv_memc_set_ltpo_mode) - drv_memc_set_tear_mode 0x00016957 Thumb Code 14 drv_memc.o(i.drv_memc_set_tear_mode) - drv_memc_set_tear_waveform 0x00016965 Thumb Code 34 drv_memc.o(i.drv_memc_set_tear_waveform) - drv_memc_set_vidc_sync_cnt 0x0001698d Thumb Code 14 drv_memc.o(i.drv_memc_set_vidc_sync_cnt) - drv_param_init_get_ccm 0x0001699d Thumb Code 4 drv_param_init.o(i.drv_param_init_get_ccm) - drv_param_init_get_scld_filter_h 0x000169a5 Thumb Code 12 drv_param_init.o(i.drv_param_init_get_scld_filter_h) - drv_param_init_get_scld_filter_v 0x000169b9 Thumb Code 12 drv_param_init.o(i.drv_param_init_get_scld_filter_v) - drv_param_init_get_sclu_filter 0x000169cd Thumb Code 4 drv_param_init.o(i.drv_param_init_get_sclu_filter) - drv_param_init_set_ccm 0x000169d5 Thumb Code 14 drv_param_init.o(i.drv_param_init_set_ccm) - drv_param_init_set_scld_filter 0x000169e9 Thumb Code 92 drv_param_init.o(i.drv_param_init_set_scld_filter) - drv_param_p2r_filter_init 0x00016a4d Thumb Code 30 drv_param_init.o(i.drv_param_p2r_filter_init) - drv_phy_enable_calibration 0x00016a71 Thumb Code 12 drv_phy_common.o(i.drv_phy_enable_calibration) - drv_phy_get_calibration 0x00016a81 Thumb Code 50 drv_phy_common.o(i.drv_phy_get_calibration) - drv_phy_get_pll_para 0x00016abd Thumb Code 88 drv_phy_common.o(i.drv_phy_get_pll_para) - drv_phy_get_rate_para 0x00016b1d Thumb Code 76 drv_phy_common.o(i.drv_phy_get_rate_para) - drv_phy_test_clear 0x00016b71 Thumb Code 16 drv_phy_common.o(i.drv_phy_test_clear) - drv_phy_test_lock 0x00016b81 Thumb Code 24 drv_phy_common.o(i.drv_phy_test_lock) - drv_phy_test_write_1_byte 0x00016b99 Thumb Code 32 drv_phy_common.o(i.drv_phy_test_write_1_byte) - drv_phy_test_write_2_byte 0x00016bb9 Thumb Code 38 drv_phy_common.o(i.drv_phy_test_write_2_byte) - drv_phy_test_write_code 0x00016bdf Thumb Code 30 drv_phy_common.o(i.drv_phy_test_write_code) - drv_pwr_set_cp_mode 0x00016c1d Thumb Code 26 drv_pwr.o(i.drv_pwr_set_cp_mode) - drv_pwr_set_pvd_mode 0x00016c3d Thumb Code 18 drv_pwr.o(i.drv_pwr_set_pvd_mode) - drv_pwr_set_system_clk_src 0x00016c55 Thumb Code 36 drv_pwr.o(i.drv_pwr_set_system_clk_src) - drv_rxbr_clear_pkt_buffer 0x00016ccb Thumb Code 10 drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) - drv_rxbr_clear_status0 0x00016cd5 Thumb Code 4 drv_rxbr.o(i.drv_rxbr_clear_status0) - drv_rxbr_enable_irq 0x00016cd9 Thumb Code 90 drv_rxbr.o(i.drv_rxbr_enable_irq) - drv_rxbr_frame_drop_cfg 0x00016d35 Thumb Code 16 drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) - drv_rxbr_get_clk 0x00016d49 Thumb Code 44 drv_rxbr.o(i.drv_rxbr_get_clk) - drv_rxbr_get_col_addr 0x00016d85 Thumb Code 4 drv_rxbr.o(i.drv_rxbr_get_col_addr) - drv_rxbr_get_page_addr 0x00016d9b Thumb Code 4 drv_rxbr.o(i.drv_rxbr_get_page_addr) - drv_rxbr_hline_rcv0_cfg 0x00016db1 Thumb Code 12 drv_rxbr.o(i.drv_rxbr_hline_rcv0_cfg) - drv_rxbr_hline_rcv_cfg 0x00016dbd Thumb Code 8 drv_rxbr.o(i.drv_rxbr_hline_rcv_cfg) - drv_rxbr_register_irq0_callback 0x00016dc5 Thumb Code 6 drv_rxbr.o(i.drv_rxbr_register_irq0_callback) - drv_rxbr_register_irq1_callback 0x00016dd1 Thumb Code 6 drv_rxbr.o(i.drv_rxbr_register_irq1_callback) - drv_rxbr_set_ack_pkt_header 0x00016ddd Thumb Code 20 drv_rxbr.o(i.drv_rxbr_set_ack_pkt_header) - drv_rxbr_set_cmd_filter 0x00016df1 Thumb Code 204 drv_rxbr.o(i.drv_rxbr_set_cmd_filter) - drv_rxbr_set_color_format 0x00016ebd Thumb Code 20 drv_rxbr.o(i.drv_rxbr_set_color_format) - drv_rxbr_set_inten 0x00016ed1 Thumb Code 20 drv_rxbr.o(i.drv_rxbr_set_inten) - drv_rxbr_set_ltpo_drop_th 0x00016ee5 Thumb Code 16 drv_rxbr.o(i.drv_rxbr_set_ltpo_drop_th) - drv_rxbr_set_usr_cfg 0x00016ef5 Thumb Code 38 drv_rxbr.o(i.drv_rxbr_set_usr_cfg) - drv_rxbr_set_usr_col 0x00016f1b Thumb Code 8 drv_rxbr.o(i.drv_rxbr_set_usr_col) - drv_rxbr_set_usr_row 0x00016f23 Thumb Code 8 drv_rxbr.o(i.drv_rxbr_set_usr_row) - drv_spi_m_read_data 0x00016f2d Thumb Code 28 drv_spi_master.o(i.drv_spi_m_read_data) - drv_swire_set_int 0x00016f4d Thumb Code 64 drv_swire.o(i.drv_swire_set_int) - drv_sys_cfg_clear_all_int 0x00016f95 Thumb Code 8 drv_sys_cfg.o(i.drv_sys_cfg_clear_all_int) - drv_sys_cfg_clear_pending 0x00016fa1 Thumb Code 32 drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) - drv_sys_cfg_sel_ap_rst_lvl_trig 0x00016fc9 Thumb Code 18 drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_lvl_trig) - drv_sys_cfg_sel_ap_rst_trig 0x00016fe1 Thumb Code 22 drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) - drv_sys_cfg_sel_gpio_group 0x00016ffd Thumb Code 30 drv_sys_cfg.o(i.drv_sys_cfg_sel_gpio_group) - drv_sys_cfg_sel_int_trig 0x00017021 Thumb Code 30 drv_sys_cfg.o(i.drv_sys_cfg_sel_int_trig) - drv_sys_cfg_set_dma_rx_req 0x00017045 Thumb Code 10 drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) - drv_sys_cfg_set_dma_tx_req 0x00017055 Thumb Code 10 drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) - drv_sys_cfg_set_int 0x00017065 Thumb Code 30 drv_sys_cfg.o(i.drv_sys_cfg_set_int) - drv_timer_clear_status_flags 0x00017089 Thumb Code 26 drv_timer.o(i.drv_timer_clear_status_flags) - drv_timer_enable 0x000170a3 Thumb Code 32 drv_timer.o(i.drv_timer_enable) - drv_timer_get_instance 0x000170c5 Thumb Code 10 drv_timer.o(i.drv_timer_get_instance) - drv_timer_get_prescaler 0x000170d5 Thumb Code 14 drv_timer.o(i.drv_timer_get_prescaler) - drv_timer_register_callback 0x00017129 Thumb Code 14 drv_timer.o(i.drv_timer_register_callback) - drv_timer_set_current_count 0x0001713d Thumb Code 12 drv_timer.o(i.drv_timer_set_current_count) - drv_timer_set_int 0x00017149 Thumb Code 68 drv_timer.o(i.drv_timer_set_int) - drv_timer_set_match 0x00017191 Thumb Code 12 drv_timer.o(i.drv_timer_set_match) - drv_timer_set_prescaler 0x0001719d Thumb Code 22 drv_timer.o(i.drv_timer_set_prescaler) - drv_tx_phy_test_enter 0x000171bd Thumb Code 28 drv_dsi_tx.o(i.drv_tx_phy_test_enter) - drv_tx_phy_test_exit 0x000171d9 Thumb Code 28 drv_dsi_tx.o(i.drv_tx_phy_test_exit) - drv_vidc_clear_irq 0x0001722b Thumb Code 8 drv_vidc.o(i.drv_vidc_clear_irq) - drv_vidc_enable 0x00017233 Thumb Code 24 drv_vidc.o(i.drv_vidc_enable) - drv_vidc_enable_irq 0x0001724d Thumb Code 58 drv_vidc.o(i.drv_vidc_enable_irq) - drv_vidc_get_irq_status 0x0001728d Thumb Code 18 drv_vidc.o(i.drv_vidc_get_irq_status) - drv_vidc_init_module_enable 0x000172a1 Thumb Code 36 drv_vidc.o(i.drv_vidc_init_module_enable) - drv_vidc_register_callback 0x000172c9 Thumb Code 6 drv_vidc.o(i.drv_vidc_register_callback) - drv_vidc_reset 0x000172d5 Thumb Code 6 drv_vidc.o(i.drv_vidc_reset) - drv_vidc_set_dst_parameter 0x000172db Thumb Code 60 drv_vidc.o(i.drv_vidc_set_dst_parameter) - drv_vidc_set_irqen 0x00017317 Thumb Code 20 drv_vidc.o(i.drv_vidc_set_irqen) - drv_vidc_set_mirror 0x0001732b Thumb Code 16 drv_vidc.o(i.drv_vidc_set_mirror) - drv_vidc_set_p2r_hcoef0 0x0001733b Thumb Code 8 drv_vidc.o(i.drv_vidc_set_p2r_hcoef0) - drv_vidc_set_p2r_hinitb 0x00017343 Thumb Code 38 drv_vidc.o(i.drv_vidc_set_p2r_hinitb) - drv_vidc_set_p2r_hinitr 0x00017369 Thumb Code 38 drv_vidc.o(i.drv_vidc_set_p2r_hinitr) - drv_vidc_set_pentile_swap 0x00017391 Thumb Code 18 drv_vidc.o(i.drv_vidc_set_pentile_swap) - drv_vidc_set_pu_ctrl 0x000173a9 Thumb Code 10 drv_vidc.o(i.drv_vidc_set_pu_ctrl) - drv_vidc_set_rotation 0x000173b3 Thumb Code 16 drv_vidc.o(i.drv_vidc_set_rotation) - drv_vidc_set_scld_hcoef0 0x000173c3 Thumb Code 10 drv_vidc.o(i.drv_vidc_set_scld_hcoef0) - drv_vidc_set_scld_hcoef1 0x000173cd Thumb Code 10 drv_vidc.o(i.drv_vidc_set_scld_hcoef1) - drv_vidc_set_scld_step 0x000173d7 Thumb Code 18 drv_vidc.o(i.drv_vidc_set_scld_step) - drv_vidc_set_scld_vcoef0 0x000173e9 Thumb Code 10 drv_vidc.o(i.drv_vidc_set_scld_vcoef0) - drv_vidc_set_scld_vcoef1 0x000173f3 Thumb Code 10 drv_vidc.o(i.drv_vidc_set_scld_vcoef1) - drv_vidc_set_src_parameter 0x000173fd Thumb Code 22 drv_vidc.o(i.drv_vidc_set_src_parameter) - drv_wdg_clear_counter 0x00017415 Thumb Code 12 drv_wdg.o(i.drv_wdg_clear_counter) - drv_wdg_set_int 0x00017445 Thumb Code 48 drv_wdg.o(i.drv_wdg_set_int) - fls_clr_interrupt_flag 0x00017479 Thumb Code 10 drv_fls.o(i.fls_clr_interrupt_flag) - fputc 0x00017483 Thumb Code 20 tau_log.o(i.fputc) - hal_dsi_rx_ctrl_create_handle 0x000174f5 Thumb Code 42 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) - hal_dsi_rx_ctrl_deinit 0x00017525 Thumb Code 148 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) - hal_dsi_rx_ctrl_dsc_async_handler 0x000175c1 Thumb Code 120 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) - hal_dsi_rx_ctrl_gen_a_tear_signal 0x00017645 Thumb Code 32 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) - hal_dsi_rx_ctrl_get_max_ret_size 0x0001766d Thumb Code 30 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) - hal_dsi_rx_ctrl_init 0x00017695 Thumb Code 144 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) - hal_dsi_rx_ctrl_pre_init_pps 0x00017dc9 Thumb Code 56 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_pre_init_pps) - hal_dsi_rx_ctrl_send_ack_cmd 0x00017e05 Thumb Code 212 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) - hal_dsi_rx_ctrl_set_cus_esc_clk 0x00017ef5 Thumb Code 34 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) - hal_dsi_rx_ctrl_set_cus_scld_filter 0x00017f21 Thumb Code 98 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) - hal_dsi_rx_ctrl_set_cus_sync_line 0x00017f8d Thumb Code 44 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) - hal_dsi_rx_ctrl_set_sw_tear_mode 0x0001806d Thumb Code 42 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) - hal_dsi_rx_ctrl_set_tear_mode_ex 0x000180a1 Thumb Code 14 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_tear_mode_ex) - hal_dsi_rx_ctrl_start 0x000180b1 Thumb Code 46 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) - hal_dsi_rx_ctrl_stop 0x000180ed Thumb Code 46 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) - hal_dsi_rx_ctrl_toggle_resolution 0x00018129 Thumb Code 28 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) - hal_dsi_tx_ctrl_create_handle 0x000187dd Thumb Code 34 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) - hal_dsi_tx_ctrl_deinit 0x00018809 Thumb Code 68 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) - hal_dsi_tx_ctrl_enter_init_panel_mode 0x00018851 Thumb Code 68 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) - hal_dsi_tx_ctrl_exit_init_panel_mode 0x0001889d Thumb Code 32 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) - hal_dsi_tx_ctrl_init 0x000188c5 Thumb Code 188 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) - hal_dsi_tx_ctrl_panel_reset_pin 0x000189ad Thumb Code 12 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_panel_reset_pin) - hal_dsi_tx_ctrl_set_ccm 0x000189b9 Thumb Code 28 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) - hal_dsi_tx_ctrl_set_overwrite_rgb 0x000189d9 Thumb Code 16 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) - hal_dsi_tx_ctrl_set_partial_disp 0x000189ed Thumb Code 12 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp) - hal_dsi_tx_ctrl_set_partial_disp_area 0x000189fd Thumb Code 30 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp_area) - hal_dsi_tx_ctrl_start 0x00018a21 Thumb Code 94 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) - hal_dsi_tx_ctrl_stop 0x00018a8d Thumb Code 54 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) - hal_dsi_tx_ctrl_write_array_cmd 0x00018ad1 Thumb Code 210 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) - hal_dsi_tx_ctrl_write_cmd 0x00018ba9 Thumb Code 172 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) - hal_gpio_ctrl_eint 0x00018e3d Thumb Code 18 hal_gpio.o(i.hal_gpio_ctrl_eint) - hal_gpio_get_input_data 0x00018e55 Thumb Code 18 hal_gpio.o(i.hal_gpio_get_input_data) - hal_gpio_init_eint 0x00018e69 Thumb Code 58 hal_gpio.o(i.hal_gpio_init_eint) - hal_gpio_init_input 0x00018ea9 Thumb Code 28 hal_gpio.o(i.hal_gpio_init_input) - hal_gpio_init_output 0x00018ec9 Thumb Code 34 hal_gpio.o(i.hal_gpio_init_output) - hal_gpio_reg_eint_cb 0x00018ef1 Thumb Code 20 hal_gpio.o(i.hal_gpio_reg_eint_cb) - hal_gpio_set_ap_reset_int 0x00018f09 Thumb Code 76 hal_gpio.o(i.hal_gpio_set_ap_reset_int) - hal_gpio_set_mode 0x00018f59 Thumb Code 90 hal_gpio.o(i.hal_gpio_set_mode) - hal_gpio_set_output_data 0x00018fb9 Thumb Code 8 hal_gpio.o(i.hal_gpio_set_output_data) - hal_gpio_set_pull_state 0x00018fc1 Thumb Code 26 hal_gpio.o(i.hal_gpio_set_pull_state) - hal_i2c_m_dma_init 0x00018fe1 Thumb Code 92 hal_i2c_master.o(i.hal_i2c_m_dma_init) - hal_i2c_m_dma_read 0x0001904d Thumb Code 26 hal_i2c_master.o(i.hal_i2c_m_dma_read) - hal_i2c_m_dma_write 0x0001906d Thumb Code 24 hal_i2c_master.o(i.hal_i2c_m_dma_write) - hal_i2c_m_transfer_complate 0x00019089 Thumb Code 6 hal_i2c_master.o(i.hal_i2c_m_transfer_complate) - hal_i2c_s_dma_write 0x000190c5 Thumb Code 46 hal_i2c_slave.o(i.hal_i2c_s_dma_write) - hal_i2c_s_init 0x000190fd Thumb Code 86 hal_i2c_slave.o(i.hal_i2c_s_init) - hal_i2c_s_nonblocking_read 0x00019169 Thumb Code 14 hal_i2c_slave.o(i.hal_i2c_s_nonblocking_read) - hal_i2c_s_set_transfer 0x0001917d Thumb Code 6 hal_i2c_slave.o(i.hal_i2c_s_set_transfer) - hal_internal_init_memc 0x000192d5 Thumb Code 146 hal_internal_vsync.o(i.hal_internal_init_memc) - hal_internal_sync_get_fb_setting 0x000193b9 Thumb Code 12 hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) - hal_internal_sync_input_resolution_change 0x000193c9 Thumb Code 418 hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) - hal_internal_vsync_deinit 0x000195dd Thumb Code 24 hal_internal_vsync.o(i.hal_internal_vsync_deinit) - hal_internal_vsync_get_rx_state 0x000195f9 Thumb Code 6 hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) - hal_internal_vsync_get_sync_line 0x00019605 Thumb Code 18 hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) - hal_internal_vsync_get_tx_state 0x0001961d Thumb Code 6 hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) - hal_internal_vsync_init_rx 0x00019629 Thumb Code 220 hal_internal_vsync.o(i.hal_internal_vsync_init_rx) - hal_internal_vsync_init_tx 0x00019725 Thumb Code 172 hal_internal_vsync.o(i.hal_internal_vsync_init_tx) - hal_internal_vsync_set_auto_hw_filter 0x000197d5 Thumb Code 222 hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) - hal_internal_vsync_set_rx_state 0x000198f1 Thumb Code 16 hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) - hal_internal_vsync_set_sync_line 0x00019905 Thumb Code 22 hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) - hal_internal_vsync_set_tear_mode 0x00019921 Thumb Code 64 hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) - hal_internal_vsync_set_tx_state 0x00019969 Thumb Code 54 hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) - hal_spi_m_clear_rxfifo 0x00019d8d Thumb Code 14 hal_spi_master.o(i.hal_spi_m_clear_rxfifo) - hal_system_enable_systick 0x00019d9b Thumb Code 8 hal_system.o(i.hal_system_enable_systick) - hal_system_init 0x00019da5 Thumb Code 104 hal_system.o(i.hal_system_init) - hal_system_init_console 0x00019e2d Thumb Code 28 hal_system.o(i.hal_system_init_console) - hal_system_set_phy_calibration 0x00019e49 Thumb Code 8 hal_system.o(i.hal_system_set_phy_calibration) - hal_system_set_pvd 0x00019e51 Thumb Code 8 hal_system.o(i.hal_system_set_pvd) - hal_system_set_vcc 0x00019e59 Thumb Code 8 hal_system.o(i.hal_system_set_vcc) - hal_timer_init 0x00019e61 Thumb Code 26 hal_timer.o(i.hal_timer_init) - hal_timer_start 0x00019e7d Thumb Code 74 hal_timer.o(i.hal_timer_start) - hal_uart_init 0x00019ecd Thumb Code 126 hal_uart.o(i.hal_uart_init) - hal_uart_transmit_blocking 0x00019f59 Thumb Code 12 hal_uart.o(i.hal_uart_transmit_blocking) - handle_init 0x00019f69 Thumb Code 140 irq_redirect .o(i.handle_init) - main 0x0001a181 Thumb Code 10 main.o(i.main) - sqrt 0x0001ad2d Thumb Code 66 sqrt.o(i.sqrt) - tp_heartbeat_exec 0x0001ad75 Thumb Code 60 ap_demo.o(i.tp_heartbeat_exec) - panel_init_code 0x0001b19c Data 9164 ap_demo.o(.constdata) - wCRCTalbeAbs 0x0001d5e8 Data 32 app_tp_st_touch.o(.constdata) - phone_data_21 0x0001d6da Data 1 app_tp_for_custom_s8.o(.constdata) - phone_data_55 0x0001d6db Data 1 app_tp_for_custom_s8.o(.constdata) - phone_data_85_00 0x0001d6dc Data 1 app_tp_for_custom_s8.o(.constdata) - phone_data_F5_1 0x0001d6dd Data 1 app_tp_for_custom_s8.o(.constdata) - phone_data_F5_2 0x0001d6de Data 1 app_tp_for_custom_s8.o(.constdata) - phone_data_F5_3 0x0001d6df Data 1 app_tp_for_custom_s8.o(.constdata) - phone_data_F5_4 0x0001d6e0 Data 1 app_tp_for_custom_s8.o(.constdata) - phone_data_30 0x0001d6e1 Data 2 app_tp_for_custom_s8.o(.constdata) - phone_data_92_F0 0x0001d6e3 Data 2 app_tp_for_custom_s8.o(.constdata) - phone_data_52 0x0001d6e5 Data 3 app_tp_for_custom_s8.o(.constdata) - phone_data_92_15 0x0001d6e8 Data 4 app_tp_for_custom_s8.o(.constdata) - phone_data_A3 0x0001d6ec Data 4 app_tp_for_custom_s8.o(.constdata) - phone_data_A4 0x0001d6f0 Data 4 app_tp_for_custom_s8.o(.constdata) - phone_data_A5 0x0001d6f4 Data 4 app_tp_for_custom_s8.o(.constdata) - phone_data_AF 0x0001d6f8 Data 4 app_tp_for_custom_s8.o(.constdata) - phone_data_F1 0x0001d6fc Data 4 app_tp_for_custom_s8.o(.constdata) - phone_data_22 0x0001d700 Data 5 app_tp_for_custom_s8.o(.constdata) - phone_data_92_0A 0x0001d705 Data 6 app_tp_for_custom_s8.o(.constdata) - phone_data_F6_1 0x0001d70b Data 6 app_tp_for_custom_s8.o(.constdata) - phone_data_F6_2 0x0001d711 Data 6 app_tp_for_custom_s8.o(.constdata) - phone_data_F6_3 0x0001d717 Data 6 app_tp_for_custom_s8.o(.constdata) - phone_data_F6_4 0x0001d71d Data 6 app_tp_for_custom_s8.o(.constdata) - phone_data_60_1 0x0001d723 Data 16 app_tp_for_custom_s8.o(.constdata) - phone_data_23 0x0001d733 Data 11 app_tp_for_custom_s8.o(.constdata) - phone_data_85_02 0x0001d73e Data 28 app_tp_for_custom_s8.o(.constdata) - phone_data_85_20 0x0001d75a Data 28 app_tp_for_custom_s8.o(.constdata) - phone_data_90 0x0001d776 Data 10 app_tp_for_custom_s8.o(.constdata) - phone_data_72_03 0x0001d780 Data 1120 app_tp_for_custom_s8.o(.constdata) - phone_data_75_7401_7D01 0x0001dbe0 Data 568 app_tp_for_custom_s8.o(.constdata) - phone_data_75_7401_7D02 0x0001de18 Data 568 app_tp_for_custom_s8.o(.constdata) - phone_data_75_7401_7D03 0x0001e050 Data 568 app_tp_for_custom_s8.o(.constdata) - phone_data_75_7403_7D01 0x0001e288 Data 568 app_tp_for_custom_s8.o(.constdata) - phone_data_75_7403_7D03 0x0001e4c0 Data 568 app_tp_for_custom_s8.o(.constdata) - phone_data_75_7D05 0x0001e6f8 Data 568 app_tp_for_custom_s8.o(.constdata) - phone_data_75_00 0x0001e930 Data 288 app_tp_for_custom_s8.o(.constdata) - phone_data_75_FF 0x0001ea50 Data 288 app_tp_for_custom_s8.o(.constdata) - sleep_on 0x0001eb70 Data 16 app_tp_for_custom_s8.o(.constdata) - screen_reg_start_data_size 0x0001eb80 Data 1 app_tp_for_custom_s8.o(.constdata) - Region$$Table$$Base 0x0001ee90 Number 0 anon$$obj.o(Region$$Table) - Region$$Table$$Limit 0x0001eec0 Number 0 anon$$obj.o(Region$$Table) + ap_demo 0x00012ded Thumb Code 278 ap_demo.o(i.ap_demo) + ap_get_tp_calibration_status_01 0x00013011 Thumb Code 28 app_tp_st_touch.o(i.ap_get_tp_calibration_status_01) + ap_set_tp_calibration_04 0x0001321d Thumb Code 138 app_tp_st_touch.o(i.ap_set_tp_calibration_04) + ap_tp_st_touch_calibration 0x000132b5 Thumb Code 170 app_tp_st_touch.o(i.ap_tp_st_touch_calibration) + ap_tp_st_touch_error_handler_F3 0x00013365 Thumb Code 26 app_tp_st_touch.o(i.ap_tp_st_touch_error_handler_F3) + ap_tp_st_touch_error_handler_FF 0x0001337f Thumb Code 32 app_tp_st_touch.o(i.ap_tp_st_touch_error_handler_FF) + ap_tp_st_touch_get_calibration_success_mark 0x000133a1 Thumb Code 150 app_tp_st_touch.o(i.ap_tp_st_touch_get_calibration_success_mark) + ap_tp_st_touch_scan_point_init 0x00013449 Thumb Code 24 app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_init) + ap_tp_st_touch_scan_point_record_event 0x00013465 Thumb Code 142 app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_record_event) + ap_tp_st_touch_scan_point_record_event_exec 0x000134f9 Thumb Code 50 app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_record_event_exec) + ap_tp_st_touch_simulate_finger_release_event 0x00013549 Thumb Code 44 app_tp_st_touch.o(i.ap_tp_st_touch_simulate_finger_release_event) + ap_tp_st_touch_software_reset 0x0001357d Thumb Code 118 app_tp_st_touch.o(i.ap_tp_st_touch_software_reset) + app_ADC_IRQn_Handler 0x00013695 Thumb Code 22 drv_rxbr.o(i.app_ADC_IRQn_Handler) + app_AP_NRESET_IRQn_Handler 0x000136b1 Thumb Code 32 drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) + app_EXTI_INT0_IRQn_Handler 0x000136d5 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) + app_EXTI_INT1_IRQn_Handler 0x000136f1 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) + app_EXTI_INT2_IRQn_Handler 0x0001370d Thumb Code 22 drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) + app_EXTI_INT3_IRQn_Handler 0x00013729 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) + app_EXTI_INT4_IRQn_Handler 0x00013745 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) + app_EXTI_INT5_IRQn_Handler 0x00013761 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) + app_EXTI_INT6_IRQn_Handler 0x0001377d Thumb Code 22 drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) + app_EXTI_INT7_IRQn_Handler 0x00013799 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) + app_HardFault_Handler 0x000137b5 Thumb Code 12 drv_common.o(i.app_HardFault_Handler) + app_I2C0_IRQn_Handler 0x000137fd Thumb Code 8 drv_i2c_slave.o(i.app_I2C0_IRQn_Handler) + app_I2C1_IRQn_Handler 0x0001380d Thumb Code 8 drv_i2c_master.o(i.app_I2C1_IRQn_Handler) + app_LCDC_IRQn_Handler 0x0001381d Thumb Code 98 hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) + app_MEMC_IRQn_Handler 0x000138fd Thumb Code 132 drv_memc.o(i.app_MEMC_IRQn_Handler) + app_MIPI_RX_IRQn_Handler 0x00013985 Thumb Code 232 drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) + app_MIPI_TX_IRQn_Handler 0x00013c1d Thumb Code 56 drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) + app_PWMDET_IRQn_Handler 0x00013cbd Thumb Code 62 drv_pwm.o(i.app_PWMDET_IRQn_Handler) + app_SPIM_IRQn_Handler 0x00013d05 Thumb Code 34 drv_spi_master.o(i.app_SPIM_IRQn_Handler) + app_SPIS_IRQn_Handler 0x00013d35 Thumb Code 500 hal_spi_slave.o(i.app_SPIS_IRQn_Handler) + app_SWIRE_IRQn_Handler 0x00013f35 Thumb Code 28 drv_swire.o(i.app_SWIRE_IRQn_Handler) + app_SysTick_Handler 0x00013f55 Thumb Code 20 drv_common.o(i.app_SysTick_Handler) + app_TIMER0_IRQn_Handler 0x00013f6d Thumb Code 10 drv_timer.o(i.app_TIMER0_IRQn_Handler) + app_TIMER1_IRQn_Handler 0x00013f77 Thumb Code 10 drv_timer.o(i.app_TIMER1_IRQn_Handler) + app_TIMER2_IRQn_Handler 0x00013f81 Thumb Code 10 drv_timer.o(i.app_TIMER2_IRQn_Handler) + app_TIMER3_IRQn_Handler 0x00013f8b Thumb Code 10 drv_timer.o(i.app_TIMER3_IRQn_Handler) + app_UART_IRQn_Handler 0x00013f95 Thumb Code 8 drv_uart.o(i.app_UART_IRQn_Handler) + app_VIDC_IRQn_Handler 0x00013f9d Thumb Code 22 drv_vidc.o(i.app_VIDC_IRQn_Handler) + app_VPRE_IRQn_Handler 0x00013fb9 Thumb Code 22 drv_rxbr.o(i.app_VPRE_IRQn_Handler) + app_WDG_IRQn_Handler 0x00013fd5 Thumb Code 52 drv_wdg.o(i.app_WDG_IRQn_Handler) + app_dma_irq_handler 0x0001400d Thumb Code 10 drv_dma.o(i.app_dma_irq_handler) + app_fls_ctrl_Handler 0x0001401d Thumb Code 38 norflash.o(i.app_fls_ctrl_Handler) + app_tp_I2C_init 0x0001404d Thumb Code 26 app_tp_transfer.o(i.app_tp_I2C_init) + app_tp_calibration_exec 0x00014071 Thumb Code 78 app_tp_st_touch.o(i.app_tp_calibration_exec) + app_tp_init 0x00014149 Thumb Code 56 app_tp_transfer.o(i.app_tp_init) + app_tp_m_read 0x0001418d Thumb Code 32 app_tp_transfer.o(i.app_tp_m_read) + app_tp_m_write 0x000141ad Thumb Code 8 app_tp_transfer.o(i.app_tp_m_write) + app_tp_phone_analysis_data 0x000141b5 Thumb Code 806 app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) + app_tp_phone_clear_reset_on 0x00014509 Thumb Code 8 app_tp_transfer.o(i.app_tp_phone_clear_reset_on) + app_tp_s_read 0x00014515 Thumb Code 8 app_tp_transfer.o(i.app_tp_s_read) + app_tp_s_write 0x0001451d Thumb Code 8 app_tp_transfer.o(i.app_tp_s_write) + app_tp_screen_analysis_int 0x00014525 Thumb Code 670 app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) + app_tp_screen_init 0x000147d1 Thumb Code 42 app_tp_transfer.o(i.app_tp_screen_init) + app_tp_transfer_screen_int 0x0001484d Thumb Code 252 app_tp_transfer.o(i.app_tp_transfer_screen_int) + app_tp_transfer_screen_start 0x00014981 Thumb Code 18 app_tp_transfer.o(i.app_tp_transfer_screen_start) + board_Init 0x00014999 Thumb Code 30 board.o(i.board_Init) + ceil 0x00014d89 Thumb Code 180 ceil.o(i.ceil) + dcs_packet_fifo_alloc 0x00014f11 Thumb Code 80 dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) + dcs_packet_fifo_init 0x00014f69 Thumb Code 18 dcs_packet_fifo.o(i.dcs_packet_fifo_init) + dcs_packet_free_fifo_header 0x00014f81 Thumb Code 60 dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) + dcs_packet_get_fifo_header 0x00014fc5 Thumb Code 26 dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) + delayMs 0x00015005 Thumb Code 24 tau_delay.o(i.delayMs) + delayUs 0x0001501d Thumb Code 34 tau_delay.o(i.delayUs) + drv_ap_rst_trig_edge_detect 0x00015041 Thumb Code 46 drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) + drv_chip_info_get_info 0x00015079 Thumb Code 6 drv_chip_info.o(i.drv_chip_info_get_info) + drv_chip_info_init 0x00015085 Thumb Code 56 drv_chip_info.o(i.drv_chip_info_init) + drv_chip_rx_info_check 0x000150c5 Thumb Code 122 drv_chip_info.o(i.drv_chip_rx_info_check) + drv_chip_rx_init_done 0x0001518d Thumb Code 16 drv_chip_info.o(i.drv_chip_rx_init_done) + drv_common_enable_systick 0x000151a1 Thumb Code 70 drv_common.o(i.drv_common_enable_systick) + drv_common_system_init 0x000151f9 Thumb Code 8 drv_common.o(i.drv_common_system_init) + drv_crgu_config_reset_modules 0x00015201 Thumb Code 10 drv_crgu.o(i.drv_crgu_config_reset_modules) + drv_crgu_set_ahb_pre_div 0x00015211 Thumb Code 14 drv_crgu.o(i.drv_crgu_set_ahb_pre_div) + drv_crgu_set_ahb_src 0x00015225 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_ahb_src) + drv_crgu_set_clock 0x00015239 Thumb Code 26 drv_crgu.o(i.drv_crgu_set_clock) + drv_crgu_set_dpi_mux_src 0x00015259 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dpi_mux_src) + drv_crgu_set_dpi_pre_div 0x0001526d Thumb Code 18 drv_crgu.o(i.drv_crgu_set_dpi_pre_div) + drv_crgu_set_dpi_pre_src 0x00015285 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dpi_pre_src) + drv_crgu_set_dsc_core_div 0x00015299 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dsc_core_div) + drv_crgu_set_dsco_src 0x000152ad Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dsco_src) + drv_crgu_set_dsco_src_div 0x000152c1 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dsco_src_div) + drv_crgu_set_fb_div 0x000152d5 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_fb_div) + drv_crgu_set_fb_src 0x000152e9 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_fb_src) + drv_crgu_set_lcdc_div 0x000152fd Thumb Code 16 drv_crgu.o(i.drv_crgu_set_lcdc_div) + drv_crgu_set_lcdc_src 0x00015311 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_lcdc_src) + drv_crgu_set_mipi_cfg_src 0x00015325 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_mipi_cfg_src) + drv_crgu_set_mipi_ref_src 0x00015339 Thumb Code 18 drv_crgu.o(i.drv_crgu_set_mipi_ref_src) + drv_crgu_set_reset 0x00015351 Thumb Code 20 drv_crgu.o(i.drv_crgu_set_reset) + drv_crgu_set_rxbr_div 0x00015369 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_rxbr_div) + drv_crgu_set_rxbr_src 0x0001537d Thumb Code 16 drv_crgu.o(i.drv_crgu_set_rxbr_src) + drv_crgu_set_vidc_src 0x00015391 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_vidc_src) + drv_dma_clear_flag 0x000153a5 Thumb Code 24 drv_dma.o(i.drv_dma_clear_flag) + drv_dma_create_handle 0x000153bd Thumb Code 22 drv_dma.o(i.drv_dma_create_handle) + drv_dma_disenable_channel 0x000153d9 Thumb Code 16 drv_dma.o(i.drv_dma_disenable_channel) + drv_dma_enable_channel 0x000153e9 Thumb Code 16 drv_dma.o(i.drv_dma_enable_channel) + drv_dma_enable_channel_interrupts 0x000153f9 Thumb Code 32 drv_dma.o(i.drv_dma_enable_channel_interrupts) + drv_dma_get_channel_flag 0x0001541d Thumb Code 12 drv_dma.o(i.drv_dma_get_channel_flag) + drv_dma_irq_handler 0x00015429 Thumb Code 138 drv_dma.o(i.drv_dma_irq_handler) + drv_dma_prepar_transfer 0x000154b9 Thumb Code 18 drv_dma.o(i.drv_dma_prepar_transfer) + drv_dma_set_burst 0x000154cb Thumb Code 26 drv_dma.o(i.drv_dma_set_burst) + drv_dma_set_callback 0x000154e5 Thumb Code 6 drv_dma.o(i.drv_dma_set_callback) + drv_dma_set_transfer 0x000154ed Thumb Code 62 drv_dma.o(i.drv_dma_set_transfer) + drv_dsc_dec_convert_pps_rc_parameter 0x00015531 Thumb Code 54 drv_dsc_dec.o(i.drv_dsc_dec_convert_pps_rc_parameter) + drv_dsc_dec_disable 0x00015567 Thumb Code 12 drv_dsc_dec.o(i.drv_dsc_dec_disable) + drv_dsc_dec_enable 0x00015575 Thumb Code 88 drv_dsc_dec.o(i.drv_dsc_dec_enable) + drv_dsc_dec_get_nslc 0x000155e9 Thumb Code 10 drv_dsc_dec.o(i.drv_dsc_dec_get_nslc) + drv_dsc_dec_set_u8_pps 0x000155f3 Thumb Code 40 drv_dsc_dec.o(i.drv_dsc_dec_set_u8_pps) + drv_dsi_rx_calc_ipi_tx_delay 0x0001561d Thumb Code 244 drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) + drv_dsi_rx_enable_irq 0x00015721 Thumb Code 58 drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) + drv_dsi_rx_get_compression_en 0x000157cd Thumb Code 8 drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) + drv_dsi_rx_get_max_ret_size 0x000157d5 Thumb Code 6 drv_dsi_rx.o(i.drv_dsi_rx_get_max_ret_size) + drv_dsi_rx_power_up 0x000157db Thumb Code 14 drv_dsi_rx.o(i.drv_dsi_rx_power_up) + drv_dsi_rx_set_ctrl_cfg 0x000157e9 Thumb Code 32 drv_dsi_rx.o(i.drv_dsi_rx_set_ctrl_cfg) + drv_dsi_rx_set_ddi_cfg 0x00015809 Thumb Code 16 drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) + drv_dsi_rx_set_inten 0x00015819 Thumb Code 4 drv_dsi_rx.o(i.drv_dsi_rx_set_inten) + drv_dsi_rx_set_ipi_cfg 0x0001581d Thumb Code 16 drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_cfg) + drv_dsi_rx_set_lane_swap 0x0001582d Thumb Code 70 drv_dsi_rx.o(i.drv_dsi_rx_set_lane_swap) + drv_dsi_rx_set_resp_cnt 0x00015873 Thumb Code 38 drv_dsi_rx.o(i.drv_dsi_rx_set_resp_cnt) + drv_dsi_rx_set_up_phy 0x00015899 Thumb Code 236 drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) + drv_dsi_rx_shut_down 0x00015989 Thumb Code 14 drv_dsi_rx.o(i.drv_dsi_rx_shut_down) + drv_dsi_tx_command_header 0x00015997 Thumb Code 20 drv_dsi_tx.o(i.drv_dsi_tx_command_header) + drv_dsi_tx_command_mode_cfg 0x000159ab Thumb Code 108 drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) + drv_dsi_tx_command_put_payload 0x00015a17 Thumb Code 4 drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) + drv_dsi_tx_config_eotp 0x00015a1b Thumb Code 24 drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) + drv_dsi_tx_config_int 0x00015a33 Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_config_int) + drv_dsi_tx_dpi_lpcmd_time 0x00015a3b Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_dpi_lpcmd_time) + drv_dsi_tx_dpi_mode 0x00015a43 Thumb Code 10 drv_dsi_tx.o(i.drv_dsi_tx_dpi_mode) + drv_dsi_tx_dpi_polarity 0x00015a4d Thumb Code 36 drv_dsi_tx.o(i.drv_dsi_tx_dpi_polarity) + drv_dsi_tx_edpi_cmd_size 0x00015a71 Thumb Code 4 drv_dsi_tx.o(i.drv_dsi_tx_edpi_cmd_size) + drv_dsi_tx_get_cmd_status 0x00015a75 Thumb Code 4 drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) + drv_dsi_tx_mode 0x00015a79 Thumb Code 4 drv_dsi_tx.o(i.drv_dsi_tx_mode) + drv_dsi_tx_phy_clock_lane_auto_lp 0x00015a7d Thumb Code 24 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_auto_lp) + drv_dsi_tx_phy_clock_lane_req_hs 0x00015a95 Thumb Code 26 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) + drv_dsi_tx_phy_lane_mode 0x00015aaf Thumb Code 12 drv_dsi_tx.o(i.drv_dsi_tx_phy_lane_mode) + drv_dsi_tx_phy_status_ready 0x00015abb Thumb Code 100 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ready) + drv_dsi_tx_phy_status_stopstate 0x00015b1f Thumb Code 62 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) + drv_dsi_tx_phy_test_setup 0x00015b5d Thumb Code 268 drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) + drv_dsi_tx_phy_time_cfg 0x00015c69 Thumb Code 30 drv_dsi_tx.o(i.drv_dsi_tx_phy_time_cfg) + drv_dsi_tx_powerup 0x00015c87 Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_powerup) + drv_dsi_tx_response_mode 0x00015c8f Thumb Code 28 drv_dsi_tx.o(i.drv_dsi_tx_response_mode) + drv_dsi_tx_set_bta_ack 0x00015cab Thumb Code 24 drv_dsi_tx.o(i.drv_dsi_tx_set_bta_ack) + drv_dsi_tx_set_esc_div 0x00015cc3 Thumb Code 12 drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) + drv_dsi_tx_set_int 0x00015cd1 Thumb Code 46 drv_dsi_tx.o(i.drv_dsi_tx_set_int) + drv_dsi_tx_set_time_out_div 0x00015d05 Thumb Code 16 drv_dsi_tx.o(i.drv_dsi_tx_set_time_out_div) + drv_dsi_tx_set_video_chunk 0x00015d15 Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_set_video_chunk) + drv_dsi_tx_set_video_timing 0x00015d1d Thumb Code 34 drv_dsi_tx.o(i.drv_dsi_tx_set_video_timing) + drv_dsi_tx_shutdown 0x00015d3f Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_shutdown) + drv_dsi_tx_timeout_cfg 0x00015d47 Thumb Code 38 drv_dsi_tx.o(i.drv_dsi_tx_timeout_cfg) + drv_dsi_tx_video_mode_cfg 0x00015d6d Thumb Code 170 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_cfg) + drv_dsi_tx_video_mode_disable_hact_cmd 0x00015e17 Thumb Code 22 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_disable_hact_cmd) + drv_dsi_tx_video_mode_set_lp_cmd 0x00015e2d Thumb Code 24 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_set_lp_cmd) + drv_efuse_enter_inactive 0x00015e45 Thumb Code 32 drv_efuse.o(i.drv_efuse_enter_inactive) + drv_efuse_int_enable 0x00015e65 Thumb Code 12 drv_efuse.o(i.drv_efuse_int_enable) + drv_efuse_read 0x00015e71 Thumb Code 50 drv_efuse.o(i.drv_efuse_read) + drv_efuse_read_req 0x00015ea3 Thumb Code 24 drv_efuse.o(i.drv_efuse_read_req) + drv_gpio_get_input_data 0x00015ebd Thumb Code 20 drv_gpio.o(i.drv_gpio_get_input_data) + drv_gpio_register_ap_reset_callback 0x00015ed5 Thumb Code 6 drv_gpio.o(i.drv_gpio_register_ap_reset_callback) + drv_gpio_register_callback 0x00015ee1 Thumb Code 14 drv_gpio.o(i.drv_gpio_register_callback) + drv_gpio_set_int 0x00015ef5 Thumb Code 62 drv_gpio.o(i.drv_gpio_set_int) + drv_gpio_set_ioe 0x00015f39 Thumb Code 26 drv_gpio.o(i.drv_gpio_set_ioe) + drv_gpio_set_mode0 0x00015f59 Thumb Code 12 drv_gpio.o(i.drv_gpio_set_mode0) + drv_gpio_set_mode1 0x00015f69 Thumb Code 12 drv_gpio.o(i.drv_gpio_set_mode1) + drv_gpio_set_mode2 0x00015f79 Thumb Code 12 drv_gpio.o(i.drv_gpio_set_mode2) + drv_gpio_set_mode3 0x00015f89 Thumb Code 12 drv_gpio.o(i.drv_gpio_set_mode3) + drv_gpio_set_pull_state 0x00015fb9 Thumb Code 298 drv_gpio.o(i.drv_gpio_set_pull_state) + drv_i2c_dma_init 0x0001611d Thumb Code 146 drv_i2c_dma.o(i.drv_i2c_dma_init) + drv_i2c_enable_rx_dma 0x000161c9 Thumb Code 26 drv_i2c_dma.o(i.drv_i2c_enable_rx_dma) + drv_i2c_enable_tx_dma 0x000161e3 Thumb Code 24 drv_i2c_dma.o(i.drv_i2c_enable_tx_dma) + drv_i2c_m_clear_it_pending_bit 0x000161fd Thumb Code 86 drv_i2c_master.o(i.drv_i2c_m_clear_it_pending_bit) + drv_i2c_m_enable 0x0001625d Thumb Code 10 drv_i2c_master.o(i.drv_i2c_m_enable) + drv_i2c_m_enable_intr 0x0001626d Thumb Code 42 drv_i2c_master.o(i.drv_i2c_m_enable_intr) + drv_i2c_m_set_callback 0x000162a5 Thumb Code 6 drv_i2c_master.o(i.drv_i2c_m_set_callback) + drv_i2c_master_init 0x000162b1 Thumb Code 118 drv_i2c_master.o(i.drv_i2c_master_init) + drv_i2c_master_read_dma 0x0001633d Thumb Code 82 drv_i2c_dma.o(i.drv_i2c_master_read_dma) + drv_i2c_master_write_dma 0x00016399 Thumb Code 50 drv_i2c_dma.o(i.drv_i2c_master_write_dma) + drv_i2c_s_clear_it_pending_bit 0x00016405 Thumb Code 84 drv_i2c_slave.o(i.drv_i2c_s_clear_it_pending_bit) + drv_i2c_s_enable_intr 0x00016461 Thumb Code 40 drv_i2c_slave.o(i.drv_i2c_s_enable_intr) + drv_i2c_s_get_fifo_status 0x00016495 Thumb Code 22 drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) + drv_i2c_s_set_callback 0x000164b1 Thumb Code 6 drv_i2c_slave.o(i.drv_i2c_s_set_callback) + drv_i2c_s_write_data 0x000164bd Thumb Code 26 drv_i2c_slave.o(i.drv_i2c_s_write_data) + drv_i2c_set_dma_irq_callback 0x000164dd Thumb Code 68 drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) + drv_i2c_slave_init 0x00016535 Thumb Code 60 drv_i2c_slave.o(i.drv_i2c_slave_init) + drv_i2c_slave_write_dma 0x00016579 Thumb Code 18 drv_i2c_dma.o(i.drv_i2c_slave_write_dma) + drv_lcdc_config_bypass 0x00016595 Thumb Code 24 drv_lcdc.o(i.drv_lcdc_config_bypass) + drv_lcdc_config_ccm 0x000165ad Thumb Code 48 drv_lcdc.o(i.drv_lcdc_config_ccm) + drv_lcdc_config_disp_mode 0x000165dd Thumb Code 22 drv_lcdc.o(i.drv_lcdc_config_disp_mode) + drv_lcdc_config_dpi_polarity 0x000165f3 Thumb Code 36 drv_lcdc.o(i.drv_lcdc_config_dpi_polarity) + drv_lcdc_config_dpi_timing 0x00016617 Thumb Code 38 drv_lcdc.o(i.drv_lcdc_config_dpi_timing) + drv_lcdc_config_edpi_mode 0x0001663d Thumb Code 22 drv_lcdc.o(i.drv_lcdc_config_edpi_mode) + drv_lcdc_config_endianness 0x00016653 Thumb Code 22 drv_lcdc.o(i.drv_lcdc_config_endianness) + drv_lcdc_config_input_size 0x00016669 Thumb Code 12 drv_lcdc.o(i.drv_lcdc_config_input_size) + drv_lcdc_config_int 0x00016675 Thumb Code 30 drv_lcdc.o(i.drv_lcdc_config_int) + drv_lcdc_config_int_single 0x00016693 Thumb Code 34 drv_lcdc.o(i.drv_lcdc_config_int_single) + drv_lcdc_config_overwrite 0x000166b5 Thumb Code 34 drv_lcdc.o(i.drv_lcdc_config_overwrite) + drv_lcdc_config_overwrite_rgb 0x000166d7 Thumb Code 12 drv_lcdc.o(i.drv_lcdc_config_overwrite_rgb) + drv_lcdc_config_partial_display_area 0x000166e3 Thumb Code 26 drv_lcdc.o(i.drv_lcdc_config_partial_display_area) + drv_lcdc_config_partial_display_enable 0x000166fd Thumb Code 34 drv_lcdc.o(i.drv_lcdc_config_partial_display_enable) + drv_lcdc_config_scale_up_coef 0x0001671f Thumb Code 26 drv_lcdc.o(i.drv_lcdc_config_scale_up_coef) + drv_lcdc_config_scale_up_step 0x00016739 Thumb Code 12 drv_lcdc.o(i.drv_lcdc_config_scale_up_step) + drv_lcdc_config_src_parameter 0x00016745 Thumb Code 76 drv_lcdc.o(i.drv_lcdc_config_src_parameter) + drv_lcdc_config_thresh 0x00016791 Thumb Code 6 drv_lcdc.o(i.drv_lcdc_config_thresh) + drv_lcdc_ctrl_flow 0x00016797 Thumb Code 18 drv_lcdc.o(i.drv_lcdc_ctrl_flow) + drv_lcdc_enable_shadow_reg 0x000167a9 Thumb Code 32 drv_lcdc.o(i.drv_lcdc_enable_shadow_reg) + drv_lcdc_set_int 0x000167c9 Thumb Code 46 drv_lcdc.o(i.drv_lcdc_set_int) + drv_lcdc_set_video_hw_mode 0x000167fd Thumb Code 20 drv_lcdc.o(i.drv_lcdc_set_video_hw_mode) + drv_lcdc_start 0x00016811 Thumb Code 32 drv_lcdc.o(i.drv_lcdc_start) + drv_memc_clear_status 0x00016831 Thumb Code 12 drv_memc.o(i.drv_memc_clear_status) + drv_memc_enable_irq 0x0001683d Thumb Code 58 drv_memc.o(i.drv_memc_enable_irq) + drv_memc_gen_a_tear_signal 0x0001687d Thumb Code 12 drv_memc.o(i.drv_memc_gen_a_tear_signal) + drv_memc_get_status 0x00016889 Thumb Code 18 drv_memc.o(i.drv_memc_get_status) + drv_memc_rate_transfer_sel 0x0001689b Thumb Code 16 drv_memc.o(i.drv_memc_rate_transfer_sel) + drv_memc_sel_vsync 0x000168ab Thumb Code 14 drv_memc.o(i.drv_memc_sel_vsync) + drv_memc_set_active_height 0x000168b9 Thumb Code 14 drv_memc.o(i.drv_memc_set_active_height) + drv_memc_set_data_mode 0x000168cd Thumb Code 12 drv_memc.o(i.drv_memc_set_data_mode) + drv_memc_set_double_buffer 0x000168d9 Thumb Code 16 drv_memc.o(i.drv_memc_set_double_buffer) + drv_memc_set_double_buffer_reverse 0x000168e9 Thumb Code 18 drv_memc.o(i.drv_memc_set_double_buffer_reverse) + drv_memc_set_fs_en_conditions 0x000168fb Thumb Code 16 drv_memc.o(i.drv_memc_set_fs_en_conditions) + drv_memc_set_inten 0x0001690b Thumb Code 20 drv_memc.o(i.drv_memc_set_inten) + drv_memc_set_lcdc_st_conditions 0x00016921 Thumb Code 18 drv_memc.o(i.drv_memc_set_lcdc_st_conditions) + drv_memc_set_ltpo_mode 0x00016939 Thumb Code 26 drv_memc.o(i.drv_memc_set_ltpo_mode) + drv_memc_set_tear_mode 0x00016953 Thumb Code 14 drv_memc.o(i.drv_memc_set_tear_mode) + drv_memc_set_tear_waveform 0x00016961 Thumb Code 34 drv_memc.o(i.drv_memc_set_tear_waveform) + drv_memc_set_vidc_sync_cnt 0x00016989 Thumb Code 14 drv_memc.o(i.drv_memc_set_vidc_sync_cnt) + drv_param_init_get_ccm 0x00016999 Thumb Code 4 drv_param_init.o(i.drv_param_init_get_ccm) + drv_param_init_get_scld_filter_h 0x000169a1 Thumb Code 12 drv_param_init.o(i.drv_param_init_get_scld_filter_h) + drv_param_init_get_scld_filter_v 0x000169b5 Thumb Code 12 drv_param_init.o(i.drv_param_init_get_scld_filter_v) + drv_param_init_get_sclu_filter 0x000169c9 Thumb Code 4 drv_param_init.o(i.drv_param_init_get_sclu_filter) + drv_param_init_set_ccm 0x000169d1 Thumb Code 14 drv_param_init.o(i.drv_param_init_set_ccm) + drv_param_init_set_scld_filter 0x000169e5 Thumb Code 92 drv_param_init.o(i.drv_param_init_set_scld_filter) + drv_param_p2r_filter_init 0x00016a49 Thumb Code 30 drv_param_init.o(i.drv_param_p2r_filter_init) + drv_phy_enable_calibration 0x00016a6d Thumb Code 12 drv_phy_common.o(i.drv_phy_enable_calibration) + drv_phy_get_calibration 0x00016a7d Thumb Code 50 drv_phy_common.o(i.drv_phy_get_calibration) + drv_phy_get_pll_para 0x00016ab9 Thumb Code 88 drv_phy_common.o(i.drv_phy_get_pll_para) + drv_phy_get_rate_para 0x00016b19 Thumb Code 76 drv_phy_common.o(i.drv_phy_get_rate_para) + drv_phy_test_clear 0x00016b6d Thumb Code 16 drv_phy_common.o(i.drv_phy_test_clear) + drv_phy_test_lock 0x00016b7d Thumb Code 24 drv_phy_common.o(i.drv_phy_test_lock) + drv_phy_test_write_1_byte 0x00016b95 Thumb Code 32 drv_phy_common.o(i.drv_phy_test_write_1_byte) + drv_phy_test_write_2_byte 0x00016bb5 Thumb Code 38 drv_phy_common.o(i.drv_phy_test_write_2_byte) + drv_phy_test_write_code 0x00016bdb Thumb Code 30 drv_phy_common.o(i.drv_phy_test_write_code) + drv_pwr_set_cp_mode 0x00016c19 Thumb Code 26 drv_pwr.o(i.drv_pwr_set_cp_mode) + drv_pwr_set_pvd_mode 0x00016c39 Thumb Code 18 drv_pwr.o(i.drv_pwr_set_pvd_mode) + drv_pwr_set_system_clk_src 0x00016c51 Thumb Code 36 drv_pwr.o(i.drv_pwr_set_system_clk_src) + drv_rxbr_clear_pkt_buffer 0x00016cc7 Thumb Code 10 drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) + drv_rxbr_clear_status0 0x00016cd1 Thumb Code 4 drv_rxbr.o(i.drv_rxbr_clear_status0) + drv_rxbr_enable_irq 0x00016cd5 Thumb Code 90 drv_rxbr.o(i.drv_rxbr_enable_irq) + drv_rxbr_frame_drop_cfg 0x00016d31 Thumb Code 16 drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) + drv_rxbr_get_clk 0x00016d45 Thumb Code 44 drv_rxbr.o(i.drv_rxbr_get_clk) + drv_rxbr_get_col_addr 0x00016d81 Thumb Code 4 drv_rxbr.o(i.drv_rxbr_get_col_addr) + drv_rxbr_get_page_addr 0x00016d97 Thumb Code 4 drv_rxbr.o(i.drv_rxbr_get_page_addr) + drv_rxbr_hline_rcv0_cfg 0x00016dad Thumb Code 12 drv_rxbr.o(i.drv_rxbr_hline_rcv0_cfg) + drv_rxbr_hline_rcv_cfg 0x00016db9 Thumb Code 8 drv_rxbr.o(i.drv_rxbr_hline_rcv_cfg) + drv_rxbr_register_irq0_callback 0x00016dc1 Thumb Code 6 drv_rxbr.o(i.drv_rxbr_register_irq0_callback) + drv_rxbr_register_irq1_callback 0x00016dcd Thumb Code 6 drv_rxbr.o(i.drv_rxbr_register_irq1_callback) + drv_rxbr_set_ack_pkt_header 0x00016dd9 Thumb Code 20 drv_rxbr.o(i.drv_rxbr_set_ack_pkt_header) + drv_rxbr_set_cmd_filter 0x00016ded Thumb Code 204 drv_rxbr.o(i.drv_rxbr_set_cmd_filter) + drv_rxbr_set_color_format 0x00016eb9 Thumb Code 20 drv_rxbr.o(i.drv_rxbr_set_color_format) + drv_rxbr_set_inten 0x00016ecd Thumb Code 20 drv_rxbr.o(i.drv_rxbr_set_inten) + drv_rxbr_set_ltpo_drop_th 0x00016ee1 Thumb Code 16 drv_rxbr.o(i.drv_rxbr_set_ltpo_drop_th) + drv_rxbr_set_usr_cfg 0x00016ef1 Thumb Code 38 drv_rxbr.o(i.drv_rxbr_set_usr_cfg) + drv_rxbr_set_usr_col 0x00016f17 Thumb Code 8 drv_rxbr.o(i.drv_rxbr_set_usr_col) + drv_rxbr_set_usr_row 0x00016f1f Thumb Code 8 drv_rxbr.o(i.drv_rxbr_set_usr_row) + drv_spi_m_read_data 0x00016f29 Thumb Code 28 drv_spi_master.o(i.drv_spi_m_read_data) + drv_swire_set_int 0x00016f49 Thumb Code 64 drv_swire.o(i.drv_swire_set_int) + drv_sys_cfg_clear_all_int 0x00016f91 Thumb Code 8 drv_sys_cfg.o(i.drv_sys_cfg_clear_all_int) + drv_sys_cfg_clear_pending 0x00016f9d Thumb Code 32 drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) + drv_sys_cfg_sel_ap_rst_lvl_trig 0x00016fc5 Thumb Code 18 drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_lvl_trig) + drv_sys_cfg_sel_ap_rst_trig 0x00016fdd Thumb Code 22 drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) + drv_sys_cfg_sel_gpio_group 0x00016ff9 Thumb Code 30 drv_sys_cfg.o(i.drv_sys_cfg_sel_gpio_group) + drv_sys_cfg_sel_int_trig 0x0001701d Thumb Code 30 drv_sys_cfg.o(i.drv_sys_cfg_sel_int_trig) + drv_sys_cfg_set_dma_rx_req 0x00017041 Thumb Code 10 drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) + drv_sys_cfg_set_dma_tx_req 0x00017051 Thumb Code 10 drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) + drv_sys_cfg_set_int 0x00017061 Thumb Code 30 drv_sys_cfg.o(i.drv_sys_cfg_set_int) + drv_timer_clear_status_flags 0x00017085 Thumb Code 26 drv_timer.o(i.drv_timer_clear_status_flags) + drv_timer_enable 0x0001709f Thumb Code 32 drv_timer.o(i.drv_timer_enable) + drv_timer_get_instance 0x000170c1 Thumb Code 10 drv_timer.o(i.drv_timer_get_instance) + drv_timer_get_prescaler 0x000170d1 Thumb Code 14 drv_timer.o(i.drv_timer_get_prescaler) + drv_timer_register_callback 0x00017125 Thumb Code 14 drv_timer.o(i.drv_timer_register_callback) + drv_timer_set_current_count 0x00017139 Thumb Code 12 drv_timer.o(i.drv_timer_set_current_count) + drv_timer_set_int 0x00017145 Thumb Code 68 drv_timer.o(i.drv_timer_set_int) + drv_timer_set_match 0x0001718d Thumb Code 12 drv_timer.o(i.drv_timer_set_match) + drv_timer_set_prescaler 0x00017199 Thumb Code 22 drv_timer.o(i.drv_timer_set_prescaler) + drv_tx_phy_test_enter 0x000171b9 Thumb Code 28 drv_dsi_tx.o(i.drv_tx_phy_test_enter) + drv_tx_phy_test_exit 0x000171d5 Thumb Code 28 drv_dsi_tx.o(i.drv_tx_phy_test_exit) + drv_vidc_clear_irq 0x00017227 Thumb Code 8 drv_vidc.o(i.drv_vidc_clear_irq) + drv_vidc_enable 0x0001722f Thumb Code 24 drv_vidc.o(i.drv_vidc_enable) + drv_vidc_enable_irq 0x00017249 Thumb Code 58 drv_vidc.o(i.drv_vidc_enable_irq) + drv_vidc_get_irq_status 0x00017289 Thumb Code 18 drv_vidc.o(i.drv_vidc_get_irq_status) + drv_vidc_init_module_enable 0x0001729d Thumb Code 36 drv_vidc.o(i.drv_vidc_init_module_enable) + drv_vidc_register_callback 0x000172c5 Thumb Code 6 drv_vidc.o(i.drv_vidc_register_callback) + drv_vidc_reset 0x000172d1 Thumb Code 6 drv_vidc.o(i.drv_vidc_reset) + drv_vidc_set_dst_parameter 0x000172d7 Thumb Code 60 drv_vidc.o(i.drv_vidc_set_dst_parameter) + drv_vidc_set_irqen 0x00017313 Thumb Code 20 drv_vidc.o(i.drv_vidc_set_irqen) + drv_vidc_set_mirror 0x00017327 Thumb Code 16 drv_vidc.o(i.drv_vidc_set_mirror) + drv_vidc_set_p2r_hcoef0 0x00017337 Thumb Code 8 drv_vidc.o(i.drv_vidc_set_p2r_hcoef0) + drv_vidc_set_p2r_hinitb 0x0001733f Thumb Code 38 drv_vidc.o(i.drv_vidc_set_p2r_hinitb) + drv_vidc_set_p2r_hinitr 0x00017365 Thumb Code 38 drv_vidc.o(i.drv_vidc_set_p2r_hinitr) + drv_vidc_set_pentile_swap 0x0001738d Thumb Code 18 drv_vidc.o(i.drv_vidc_set_pentile_swap) + drv_vidc_set_pu_ctrl 0x000173a5 Thumb Code 10 drv_vidc.o(i.drv_vidc_set_pu_ctrl) + drv_vidc_set_rotation 0x000173af Thumb Code 16 drv_vidc.o(i.drv_vidc_set_rotation) + drv_vidc_set_scld_hcoef0 0x000173bf Thumb Code 10 drv_vidc.o(i.drv_vidc_set_scld_hcoef0) + drv_vidc_set_scld_hcoef1 0x000173c9 Thumb Code 10 drv_vidc.o(i.drv_vidc_set_scld_hcoef1) + drv_vidc_set_scld_step 0x000173d3 Thumb Code 18 drv_vidc.o(i.drv_vidc_set_scld_step) + drv_vidc_set_scld_vcoef0 0x000173e5 Thumb Code 10 drv_vidc.o(i.drv_vidc_set_scld_vcoef0) + drv_vidc_set_scld_vcoef1 0x000173ef Thumb Code 10 drv_vidc.o(i.drv_vidc_set_scld_vcoef1) + drv_vidc_set_src_parameter 0x000173f9 Thumb Code 22 drv_vidc.o(i.drv_vidc_set_src_parameter) + drv_wdg_clear_counter 0x00017411 Thumb Code 12 drv_wdg.o(i.drv_wdg_clear_counter) + drv_wdg_set_int 0x00017441 Thumb Code 48 drv_wdg.o(i.drv_wdg_set_int) + fls_clr_interrupt_flag 0x00017475 Thumb Code 10 drv_fls.o(i.fls_clr_interrupt_flag) + fputc 0x0001747f Thumb Code 20 tau_log.o(i.fputc) + hal_dsi_rx_ctrl_create_handle 0x000174f1 Thumb Code 42 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) + hal_dsi_rx_ctrl_deinit 0x00017521 Thumb Code 148 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) + hal_dsi_rx_ctrl_dsc_async_handler 0x000175bd Thumb Code 120 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) + hal_dsi_rx_ctrl_gen_a_tear_signal 0x00017641 Thumb Code 32 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) + hal_dsi_rx_ctrl_get_max_ret_size 0x00017669 Thumb Code 30 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) + hal_dsi_rx_ctrl_init 0x00017691 Thumb Code 144 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) + hal_dsi_rx_ctrl_pre_init_pps 0x00017dc5 Thumb Code 56 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_pre_init_pps) + hal_dsi_rx_ctrl_send_ack_cmd 0x00017e01 Thumb Code 212 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) + hal_dsi_rx_ctrl_set_cus_esc_clk 0x00017ef1 Thumb Code 34 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) + hal_dsi_rx_ctrl_set_cus_scld_filter 0x00017f1d Thumb Code 98 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) + hal_dsi_rx_ctrl_set_cus_sync_line 0x00017f89 Thumb Code 44 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) + hal_dsi_rx_ctrl_set_sw_tear_mode 0x00018069 Thumb Code 42 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) + hal_dsi_rx_ctrl_set_tear_mode_ex 0x0001809d Thumb Code 14 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_tear_mode_ex) + hal_dsi_rx_ctrl_start 0x000180ad Thumb Code 46 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) + hal_dsi_rx_ctrl_stop 0x000180e9 Thumb Code 46 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) + hal_dsi_rx_ctrl_toggle_resolution 0x00018125 Thumb Code 28 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) + hal_dsi_tx_ctrl_create_handle 0x000187d9 Thumb Code 34 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) + hal_dsi_tx_ctrl_deinit 0x00018805 Thumb Code 68 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) + hal_dsi_tx_ctrl_enter_init_panel_mode 0x0001884d Thumb Code 68 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) + hal_dsi_tx_ctrl_exit_init_panel_mode 0x00018899 Thumb Code 32 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) + hal_dsi_tx_ctrl_init 0x000188c1 Thumb Code 188 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) + hal_dsi_tx_ctrl_panel_reset_pin 0x000189a9 Thumb Code 12 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_panel_reset_pin) + hal_dsi_tx_ctrl_set_ccm 0x000189b5 Thumb Code 28 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) + hal_dsi_tx_ctrl_set_overwrite_rgb 0x000189d5 Thumb Code 16 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) + hal_dsi_tx_ctrl_set_partial_disp 0x000189e9 Thumb Code 12 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp) + hal_dsi_tx_ctrl_set_partial_disp_area 0x000189f9 Thumb Code 30 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp_area) + hal_dsi_tx_ctrl_start 0x00018a1d Thumb Code 94 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) + hal_dsi_tx_ctrl_stop 0x00018a89 Thumb Code 54 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) + hal_dsi_tx_ctrl_write_array_cmd 0x00018acd Thumb Code 210 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) + hal_dsi_tx_ctrl_write_cmd 0x00018ba5 Thumb Code 172 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) + hal_gpio_ctrl_eint 0x00018e39 Thumb Code 18 hal_gpio.o(i.hal_gpio_ctrl_eint) + hal_gpio_get_input_data 0x00018e51 Thumb Code 18 hal_gpio.o(i.hal_gpio_get_input_data) + hal_gpio_init_eint 0x00018e65 Thumb Code 58 hal_gpio.o(i.hal_gpio_init_eint) + hal_gpio_init_input 0x00018ea5 Thumb Code 28 hal_gpio.o(i.hal_gpio_init_input) + hal_gpio_init_output 0x00018ec5 Thumb Code 34 hal_gpio.o(i.hal_gpio_init_output) + hal_gpio_reg_eint_cb 0x00018eed Thumb Code 20 hal_gpio.o(i.hal_gpio_reg_eint_cb) + hal_gpio_set_ap_reset_int 0x00018f05 Thumb Code 76 hal_gpio.o(i.hal_gpio_set_ap_reset_int) + hal_gpio_set_mode 0x00018f55 Thumb Code 90 hal_gpio.o(i.hal_gpio_set_mode) + hal_gpio_set_output_data 0x00018fb5 Thumb Code 8 hal_gpio.o(i.hal_gpio_set_output_data) + hal_gpio_set_pull_state 0x00018fbd Thumb Code 26 hal_gpio.o(i.hal_gpio_set_pull_state) + hal_i2c_m_dma_init 0x00018fdd Thumb Code 92 hal_i2c_master.o(i.hal_i2c_m_dma_init) + hal_i2c_m_dma_read 0x00019049 Thumb Code 26 hal_i2c_master.o(i.hal_i2c_m_dma_read) + hal_i2c_m_dma_write 0x00019069 Thumb Code 24 hal_i2c_master.o(i.hal_i2c_m_dma_write) + hal_i2c_m_transfer_complate 0x00019085 Thumb Code 6 hal_i2c_master.o(i.hal_i2c_m_transfer_complate) + hal_i2c_s_dma_write 0x000190c1 Thumb Code 46 hal_i2c_slave.o(i.hal_i2c_s_dma_write) + hal_i2c_s_init 0x000190f9 Thumb Code 86 hal_i2c_slave.o(i.hal_i2c_s_init) + hal_i2c_s_nonblocking_read 0x00019165 Thumb Code 14 hal_i2c_slave.o(i.hal_i2c_s_nonblocking_read) + hal_i2c_s_set_transfer 0x00019179 Thumb Code 6 hal_i2c_slave.o(i.hal_i2c_s_set_transfer) + hal_internal_init_memc 0x000192d1 Thumb Code 146 hal_internal_vsync.o(i.hal_internal_init_memc) + hal_internal_sync_get_fb_setting 0x000193b5 Thumb Code 12 hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) + hal_internal_sync_input_resolution_change 0x000193c5 Thumb Code 418 hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) + hal_internal_vsync_deinit 0x000195d9 Thumb Code 24 hal_internal_vsync.o(i.hal_internal_vsync_deinit) + hal_internal_vsync_get_rx_state 0x000195f5 Thumb Code 6 hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) + hal_internal_vsync_get_sync_line 0x00019601 Thumb Code 18 hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) + hal_internal_vsync_get_tx_state 0x00019619 Thumb Code 6 hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) + hal_internal_vsync_init_rx 0x00019625 Thumb Code 220 hal_internal_vsync.o(i.hal_internal_vsync_init_rx) + hal_internal_vsync_init_tx 0x00019721 Thumb Code 172 hal_internal_vsync.o(i.hal_internal_vsync_init_tx) + hal_internal_vsync_set_auto_hw_filter 0x000197d1 Thumb Code 222 hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) + hal_internal_vsync_set_rx_state 0x000198ed Thumb Code 16 hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) + hal_internal_vsync_set_sync_line 0x00019901 Thumb Code 22 hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) + hal_internal_vsync_set_tear_mode 0x0001991d Thumb Code 64 hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) + hal_internal_vsync_set_tx_state 0x00019965 Thumb Code 54 hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) + hal_spi_m_clear_rxfifo 0x00019d89 Thumb Code 14 hal_spi_master.o(i.hal_spi_m_clear_rxfifo) + hal_system_enable_systick 0x00019d97 Thumb Code 8 hal_system.o(i.hal_system_enable_systick) + hal_system_init 0x00019da1 Thumb Code 104 hal_system.o(i.hal_system_init) + hal_system_init_console 0x00019e29 Thumb Code 28 hal_system.o(i.hal_system_init_console) + hal_system_set_phy_calibration 0x00019e45 Thumb Code 8 hal_system.o(i.hal_system_set_phy_calibration) + hal_system_set_pvd 0x00019e4d Thumb Code 8 hal_system.o(i.hal_system_set_pvd) + hal_system_set_vcc 0x00019e55 Thumb Code 8 hal_system.o(i.hal_system_set_vcc) + hal_timer_init 0x00019e5d Thumb Code 26 hal_timer.o(i.hal_timer_init) + hal_timer_start 0x00019e79 Thumb Code 74 hal_timer.o(i.hal_timer_start) + hal_uart_init 0x00019ec9 Thumb Code 126 hal_uart.o(i.hal_uart_init) + hal_uart_transmit_blocking 0x00019f55 Thumb Code 12 hal_uart.o(i.hal_uart_transmit_blocking) + handle_init 0x00019f65 Thumb Code 140 irq_redirect .o(i.handle_init) + main 0x0001a17d Thumb Code 10 main.o(i.main) + sqrt 0x0001ad25 Thumb Code 66 sqrt.o(i.sqrt) + tp_heartbeat_exec 0x0001ad6d Thumb Code 60 ap_demo.o(i.tp_heartbeat_exec) + panel_init_code 0x0001b194 Data 9164 ap_demo.o(.constdata) + wCRCTalbeAbs 0x0001d5e0 Data 32 app_tp_st_touch.o(.constdata) + phone_data_21 0x0001d6d2 Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_55 0x0001d6d3 Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_85_00 0x0001d6d4 Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_F5_1 0x0001d6d5 Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_F5_2 0x0001d6d6 Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_F5_3 0x0001d6d7 Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_F5_4 0x0001d6d8 Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_30 0x0001d6d9 Data 2 app_tp_for_custom_s8.o(.constdata) + phone_data_92_F0 0x0001d6db Data 2 app_tp_for_custom_s8.o(.constdata) + phone_data_52 0x0001d6dd Data 3 app_tp_for_custom_s8.o(.constdata) + phone_data_92_15 0x0001d6e0 Data 4 app_tp_for_custom_s8.o(.constdata) + phone_data_A3 0x0001d6e4 Data 4 app_tp_for_custom_s8.o(.constdata) + phone_data_A4 0x0001d6e8 Data 4 app_tp_for_custom_s8.o(.constdata) + phone_data_A5 0x0001d6ec Data 4 app_tp_for_custom_s8.o(.constdata) + phone_data_AF 0x0001d6f0 Data 4 app_tp_for_custom_s8.o(.constdata) + phone_data_F1 0x0001d6f4 Data 4 app_tp_for_custom_s8.o(.constdata) + phone_data_22 0x0001d6f8 Data 5 app_tp_for_custom_s8.o(.constdata) + phone_data_92_0A 0x0001d6fd Data 6 app_tp_for_custom_s8.o(.constdata) + phone_data_F6_1 0x0001d703 Data 6 app_tp_for_custom_s8.o(.constdata) + phone_data_F6_2 0x0001d709 Data 6 app_tp_for_custom_s8.o(.constdata) + phone_data_F6_3 0x0001d70f Data 6 app_tp_for_custom_s8.o(.constdata) + phone_data_F6_4 0x0001d715 Data 6 app_tp_for_custom_s8.o(.constdata) + phone_data_60_1 0x0001d71b Data 16 app_tp_for_custom_s8.o(.constdata) + phone_data_23 0x0001d72b Data 11 app_tp_for_custom_s8.o(.constdata) + phone_data_85_02 0x0001d736 Data 28 app_tp_for_custom_s8.o(.constdata) + phone_data_85_20 0x0001d752 Data 28 app_tp_for_custom_s8.o(.constdata) + phone_data_90 0x0001d76e Data 10 app_tp_for_custom_s8.o(.constdata) + phone_data_72_03 0x0001d778 Data 1120 app_tp_for_custom_s8.o(.constdata) + phone_data_75_7401_7D01 0x0001dbd8 Data 568 app_tp_for_custom_s8.o(.constdata) + phone_data_75_7401_7D02 0x0001de10 Data 568 app_tp_for_custom_s8.o(.constdata) + phone_data_75_7401_7D03 0x0001e048 Data 568 app_tp_for_custom_s8.o(.constdata) + phone_data_75_7403_7D01 0x0001e280 Data 568 app_tp_for_custom_s8.o(.constdata) + phone_data_75_7403_7D03 0x0001e4b8 Data 568 app_tp_for_custom_s8.o(.constdata) + phone_data_75_7D05 0x0001e6f0 Data 568 app_tp_for_custom_s8.o(.constdata) + phone_data_75_00 0x0001e928 Data 288 app_tp_for_custom_s8.o(.constdata) + phone_data_75_FF 0x0001ea48 Data 288 app_tp_for_custom_s8.o(.constdata) + sleep_on 0x0001eb68 Data 16 app_tp_for_custom_s8.o(.constdata) + screen_reg_start_data_size 0x0001eb78 Data 1 app_tp_for_custom_s8.o(.constdata) + Region$$Table$$Base 0x0001ee88 Number 0 anon$$obj.o(Region$$Table) + Region$$Table$$Limit 0x0001eeb8 Number 0 anon$$obj.o(Region$$Table) g_fun_handle 0x00070100 Data 192 irq_redirect .o(.ARM.__AT_0x00070100) phone_start_flag 0x000701d5 Data 1 ap_demo.o(.data) phone_DisplayOFF_flag 0x000701d6 Data 1 ap_demo.o(.data) @@ -4320,647 +4319,647 @@ Memory Map of the image Image Entry point : 0x000100c1 - Load Region LR_IROM2 (Base: 0x00010000, Size: 0x0000f7fc, Max: 0x00010000, ABSOLUTE, COMPRESSED[0x0000f414]) + Load Region LR_IROM2 (Base: 0x00010000, Size: 0x0000f7f4, Max: 0x00010000, ABSOLUTE, COMPRESSED[0x0000f40c]) - Execution Region ER_IROM2 (Exec base: 0x00010000, Load base: 0x00010000, Size: 0x0000eec0, Max: 0x00010000, ABSOLUTE) + Execution Region ER_IROM2 (Exec base: 0x00010000, Load base: 0x00010000, Size: 0x0000eeb8, Max: 0x00010000, ABSOLUTE) Exec Addr Load Addr Size Type Attr Idx E Section Name Object 0x00010000 0x00010000 0x000000c0 Data RO 531 RESET startup_armcm0.o - 0x000100c0 0x000100c0 0x00000000 Code RO 2651 * .ARM.Collect$$$$00000000 mc_p.l(entry.o) - 0x000100c0 0x000100c0 0x00000004 Code RO 2961 .ARM.Collect$$$$00000001 mc_p.l(entry2.o) - 0x000100c4 0x000100c4 0x00000004 Code RO 2964 .ARM.Collect$$$$00000004 mc_p.l(entry5.o) - 0x000100c8 0x000100c8 0x00000000 Code RO 2966 .ARM.Collect$$$$00000008 mc_p.l(entry7b.o) - 0x000100c8 0x000100c8 0x00000000 Code RO 2968 .ARM.Collect$$$$0000000A mc_p.l(entry8b.o) - 0x000100c8 0x000100c8 0x00000008 Code RO 2969 .ARM.Collect$$$$0000000B mc_p.l(entry9a.o) - 0x000100d0 0x000100d0 0x00000000 Code RO 2971 .ARM.Collect$$$$0000000D mc_p.l(entry10a.o) - 0x000100d0 0x000100d0 0x00000000 Code RO 2973 .ARM.Collect$$$$0000000F mc_p.l(entry11a.o) - 0x000100d0 0x000100d0 0x00000004 Code RO 2962 .ARM.Collect$$$$00002712 mc_p.l(entry2.o) + 0x000100c0 0x000100c0 0x00000000 Code RO 2638 * .ARM.Collect$$$$00000000 mc_p.l(entry.o) + 0x000100c0 0x000100c0 0x00000004 Code RO 2948 .ARM.Collect$$$$00000001 mc_p.l(entry2.o) + 0x000100c4 0x000100c4 0x00000004 Code RO 2951 .ARM.Collect$$$$00000004 mc_p.l(entry5.o) + 0x000100c8 0x000100c8 0x00000000 Code RO 2953 .ARM.Collect$$$$00000008 mc_p.l(entry7b.o) + 0x000100c8 0x000100c8 0x00000000 Code RO 2955 .ARM.Collect$$$$0000000A mc_p.l(entry8b.o) + 0x000100c8 0x000100c8 0x00000008 Code RO 2956 .ARM.Collect$$$$0000000B mc_p.l(entry9a.o) + 0x000100d0 0x000100d0 0x00000000 Code RO 2958 .ARM.Collect$$$$0000000D mc_p.l(entry10a.o) + 0x000100d0 0x000100d0 0x00000000 Code RO 2960 .ARM.Collect$$$$0000000F mc_p.l(entry11a.o) + 0x000100d0 0x000100d0 0x00000004 Code RO 2949 .ARM.Collect$$$$00002712 mc_p.l(entry2.o) 0x000100d4 0x000100d4 0x00000078 Code RO 532 .text startup_armcm0.o - 0x0001014c 0x0001014c 0x0000002c Code RO 2654 .text mc_p.l(uidiv.o) - 0x00010178 0x00010178 0x00000028 Code RO 2656 .text mc_p.l(idiv.o) - 0x000101a0 0x000101a0 0x00000024 Code RO 2658 .text mc_p.l(memcpya.o) - 0x000101c4 0x000101c4 0x00000024 Code RO 2660 .text mc_p.l(memseta.o) - 0x000101e8 0x000101e8 0x000000b2 Code RO 2925 .text mf_p.l(fadd.o) - 0x0001029a 0x0001029a 0x0000007a Code RO 2927 .text mf_p.l(fmul.o) - 0x00010314 0x00010314 0x0000007c Code RO 2929 .text mf_p.l(fdiv.o) - 0x00010390 0x00010390 0x00000018 Code RO 2931 .text mf_p.l(fscalb.o) - 0x000103a8 0x000103a8 0x00000164 Code RO 2933 .text mf_p.l(dadd.o) - 0x0001050c 0x0001050c 0x000000d0 Code RO 2935 .text mf_p.l(dmul.o) - 0x000105dc 0x000105dc 0x000000f0 Code RO 2937 .text mf_p.l(ddiv.o) - 0x000106cc 0x000106cc 0x00000016 Code RO 2939 .text mf_p.l(fflti.o) - 0x000106e2 0x000106e2 0x0000000e Code RO 2941 .text mf_p.l(ffltui.o) - 0x000106f0 0x000106f0 0x0000001c Code RO 2945 .text mf_p.l(dfltui.o) - 0x0001070c 0x0001070c 0x00000032 Code RO 2947 .text mf_p.l(ffixi.o) - 0x0001073e 0x0001073e 0x00000028 Code RO 2949 .text mf_p.l(ffixui.o) + 0x0001014c 0x0001014c 0x0000002c Code RO 2641 .text mc_p.l(uidiv.o) + 0x00010178 0x00010178 0x00000028 Code RO 2643 .text mc_p.l(idiv.o) + 0x000101a0 0x000101a0 0x00000024 Code RO 2645 .text mc_p.l(memcpya.o) + 0x000101c4 0x000101c4 0x00000024 Code RO 2647 .text mc_p.l(memseta.o) + 0x000101e8 0x000101e8 0x000000b2 Code RO 2912 .text mf_p.l(fadd.o) + 0x0001029a 0x0001029a 0x0000007a Code RO 2914 .text mf_p.l(fmul.o) + 0x00010314 0x00010314 0x0000007c Code RO 2916 .text mf_p.l(fdiv.o) + 0x00010390 0x00010390 0x00000018 Code RO 2918 .text mf_p.l(fscalb.o) + 0x000103a8 0x000103a8 0x00000164 Code RO 2920 .text mf_p.l(dadd.o) + 0x0001050c 0x0001050c 0x000000d0 Code RO 2922 .text mf_p.l(dmul.o) + 0x000105dc 0x000105dc 0x000000f0 Code RO 2924 .text mf_p.l(ddiv.o) + 0x000106cc 0x000106cc 0x00000016 Code RO 2926 .text mf_p.l(fflti.o) + 0x000106e2 0x000106e2 0x0000000e Code RO 2928 .text mf_p.l(ffltui.o) + 0x000106f0 0x000106f0 0x0000001c Code RO 2932 .text mf_p.l(dfltui.o) + 0x0001070c 0x0001070c 0x00000032 Code RO 2934 .text mf_p.l(ffixi.o) + 0x0001073e 0x0001073e 0x00000028 Code RO 2936 .text mf_p.l(ffixui.o) 0x00010766 0x00010766 0x00000002 PAD - 0x00010768 0x00010768 0x00000048 Code RO 2951 .text mf_p.l(dfixi.o) - 0x000107b0 0x000107b0 0x0000003c Code RO 2953 .text mf_p.l(dfixui.o) - 0x000107ec 0x000107ec 0x00000028 Code RO 2955 .text mf_p.l(f2d.o) - 0x00010814 0x00010814 0x00000028 Code RO 2957 .text mf_p.l(cdcmple.o) - 0x0001083c 0x0001083c 0x00000014 Code RO 2959 .text mf_p.l(cfrcmple.o) - 0x00010850 0x00010850 0x00000060 Code RO 2976 .text mc_p.l(uldiv.o) - 0x000108b0 0x000108b0 0x00000020 Code RO 2978 .text mc_p.l(llshl.o) - 0x000108d0 0x000108d0 0x00000022 Code RO 2980 .text mc_p.l(llushr.o) - 0x000108f2 0x000108f2 0x00000026 Code RO 2982 .text mc_p.l(llsshr.o) - 0x00010918 0x00010918 0x00000000 Code RO 2991 .text mc_p.l(iusefp.o) - 0x00010918 0x00010918 0x00000082 Code RO 2992 .text mf_p.l(fepilogue.o) - 0x0001099a 0x0001099a 0x000000be Code RO 2994 .text mf_p.l(depilogue.o) - 0x00010a58 0x00010a58 0x000000a2 Code RO 2998 .text mf_p.l(dsqrt.o) + 0x00010768 0x00010768 0x00000048 Code RO 2938 .text mf_p.l(dfixi.o) + 0x000107b0 0x000107b0 0x0000003c Code RO 2940 .text mf_p.l(dfixui.o) + 0x000107ec 0x000107ec 0x00000028 Code RO 2942 .text mf_p.l(f2d.o) + 0x00010814 0x00010814 0x00000028 Code RO 2944 .text mf_p.l(cdcmple.o) + 0x0001083c 0x0001083c 0x00000014 Code RO 2946 .text mf_p.l(cfrcmple.o) + 0x00010850 0x00010850 0x00000060 Code RO 2963 .text mc_p.l(uldiv.o) + 0x000108b0 0x000108b0 0x00000020 Code RO 2965 .text mc_p.l(llshl.o) + 0x000108d0 0x000108d0 0x00000022 Code RO 2967 .text mc_p.l(llushr.o) + 0x000108f2 0x000108f2 0x00000026 Code RO 2969 .text mc_p.l(llsshr.o) + 0x00010918 0x00010918 0x00000000 Code RO 2978 .text mc_p.l(iusefp.o) + 0x00010918 0x00010918 0x00000082 Code RO 2979 .text mf_p.l(fepilogue.o) + 0x0001099a 0x0001099a 0x000000be Code RO 2981 .text mf_p.l(depilogue.o) + 0x00010a58 0x00010a58 0x000000a2 Code RO 2985 .text mf_p.l(dsqrt.o) 0x00010afa 0x00010afa 0x00000002 PAD - 0x00010afc 0x00010afc 0x00000040 Code RO 3000 .text mf_p.l(dfixul.o) - 0x00010b3c 0x00010b3c 0x00000028 Code RO 3002 .text mf_p.l(cdrcmple.o) - 0x00010b64 0x00010b64 0x00000024 Code RO 3004 .text mc_p.l(init.o) - 0x00010b88 0x00010b88 0x00000056 Code RO 3014 .text mc_p.l(__dczerorl2.o) + 0x00010afc 0x00010afc 0x00000040 Code RO 2987 .text mf_p.l(dfixul.o) + 0x00010b3c 0x00010b3c 0x00000028 Code RO 2989 .text mf_p.l(cdrcmple.o) + 0x00010b64 0x00010b64 0x00000024 Code RO 2991 .text mc_p.l(init.o) + 0x00010b88 0x00010b88 0x00000056 Code RO 3001 .text mc_p.l(__dczerorl2.o) 0x00010bde 0x00010bde 0x00000002 PAD - 0x00010be0 0x00010be0 0x00000018 Code RO 2227 i.ADC_IRQn_Handler CVWL568.lib(irq_redirect .o) - 0x00010bf8 0x00010bf8 0x00000018 Code RO 2228 i.AP_NRESET_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010be0 0x00010be0 0x00000018 Code RO 2214 i.ADC_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010bf8 0x00010bf8 0x00000018 Code RO 2215 i.AP_NRESET_IRQn_Handler CVWL568.lib(irq_redirect .o) 0x00010c10 0x00010c10 0x00000040 Code RO 408 i.CRC16_2 app_tp_st_touch.o - 0x00010c50 0x00010c50 0x00000014 Code RO 2229 i.DMA_IRQn_Handler CVWL568.lib(irq_redirect .o) - 0x00010c64 0x00010c64 0x0000001c Code RO 2230 i.EXTI_INT0_IRQn_Handler CVWL568.lib(irq_redirect .o) - 0x00010c80 0x00010c80 0x0000001c Code RO 2231 i.EXTI_INT1_IRQn_Handler CVWL568.lib(irq_redirect .o) - 0x00010c9c 0x00010c9c 0x0000001c Code RO 2232 i.EXTI_INT2_IRQn_Handler CVWL568.lib(irq_redirect .o) - 0x00010cb8 0x00010cb8 0x0000001c Code RO 2233 i.EXTI_INT3_IRQn_Handler CVWL568.lib(irq_redirect .o) - 0x00010cd4 0x00010cd4 0x0000001c Code RO 2234 i.EXTI_INT4_IRQn_Handler CVWL568.lib(irq_redirect .o) - 0x00010cf0 0x00010cf0 0x0000001c Code RO 2235 i.EXTI_INT5_IRQn_Handler CVWL568.lib(irq_redirect .o) - 0x00010d0c 0x00010d0c 0x0000001c Code RO 2236 i.EXTI_INT6_IRQn_Handler CVWL568.lib(irq_redirect .o) - 0x00010d28 0x00010d28 0x0000001c Code RO 2237 i.EXTI_INT7_IRQn_Handler CVWL568.lib(irq_redirect .o) - 0x00010d44 0x00010d44 0x00000014 Code RO 2238 i.FLSCTRL_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010c50 0x00010c50 0x00000014 Code RO 2216 i.DMA_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010c64 0x00010c64 0x0000001c Code RO 2217 i.EXTI_INT0_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010c80 0x00010c80 0x0000001c Code RO 2218 i.EXTI_INT1_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010c9c 0x00010c9c 0x0000001c Code RO 2219 i.EXTI_INT2_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010cb8 0x00010cb8 0x0000001c Code RO 2220 i.EXTI_INT3_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010cd4 0x00010cd4 0x0000001c Code RO 2221 i.EXTI_INT4_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010cf0 0x00010cf0 0x0000001c Code RO 2222 i.EXTI_INT5_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010d0c 0x00010d0c 0x0000001c Code RO 2223 i.EXTI_INT6_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010d28 0x00010d28 0x0000001c Code RO 2224 i.EXTI_INT7_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010d44 0x00010d44 0x00000014 Code RO 2225 i.FLSCTRL_IRQn_Handler CVWL568.lib(irq_redirect .o) 0x00010d58 0x00010d58 0x0000004e Code RO 100 i.Gpio_swire_output ap_demo.o 0x00010da6 0x00010da6 0x00000002 PAD - 0x00010da8 0x00010da8 0x00000014 Code RO 2239 i.HardFault_Handler CVWL568.lib(irq_redirect .o) - 0x00010dbc 0x00010dbc 0x00000018 Code RO 2240 i.I2C0_IRQn_Handler CVWL568.lib(irq_redirect .o) - 0x00010dd4 0x00010dd4 0x00000018 Code RO 2241 i.I2C1_IRQn_Handler CVWL568.lib(irq_redirect .o) - 0x00010dec 0x00010dec 0x00000018 Code RO 2242 i.LCDC_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010da8 0x00010da8 0x00000014 Code RO 2226 i.HardFault_Handler CVWL568.lib(irq_redirect .o) + 0x00010dbc 0x00010dbc 0x00000018 Code RO 2227 i.I2C0_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010dd4 0x00010dd4 0x00000018 Code RO 2228 i.I2C1_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010dec 0x00010dec 0x00000018 Code RO 2229 i.LCDC_IRQn_Handler CVWL568.lib(irq_redirect .o) 0x00010e04 0x00010e04 0x00000028 Code RO 895 i.LOG_printf CVWL568.lib(tau_log.o) - 0x00010e2c 0x00010e2c 0x00000018 Code RO 2243 i.MEMC_IRQn_Handler CVWL568.lib(irq_redirect .o) - 0x00010e44 0x00010e44 0x00000018 Code RO 2244 i.MIPI_RX_IRQn_Handler CVWL568.lib(irq_redirect .o) - 0x00010e5c 0x00010e5c 0x00000018 Code RO 2245 i.MIPI_TX_IRQn_Handler CVWL568.lib(irq_redirect .o) - 0x00010e74 0x00010e74 0x0000001c Code RO 2246 i.PWMDET_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010e2c 0x00010e2c 0x00000018 Code RO 2230 i.MEMC_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010e44 0x00010e44 0x00000018 Code RO 2231 i.MIPI_RX_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010e5c 0x00010e5c 0x00000018 Code RO 2232 i.MIPI_TX_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010e74 0x00010e74 0x0000001c Code RO 2233 i.PWMDET_IRQn_Handler CVWL568.lib(irq_redirect .o) 0x00010e90 0x00010e90 0x00000158 Code RO 257 i.S20_Start_init app_tp_transfer.o - 0x00010fe8 0x00010fe8 0x00000018 Code RO 2250 i.SysTick_Handler CVWL568.lib(irq_redirect .o) - 0x00011000 0x00011000 0x00000014 Data RO 1160 .ARM.__at_0x11000 CVWL568.lib(drv_common.o) - 0x00011014 0x00011014 0x0000001c Code RO 2247 i.SPIM_IRQn_Handler CVWL568.lib(irq_redirect .o) - 0x00011030 0x00011030 0x0000001c Code RO 2248 i.SPIS_IRQn_Handler CVWL568.lib(irq_redirect .o) - 0x0001104c 0x0001104c 0x0000001c Code RO 2249 i.SWIRE_IRQn_Handler CVWL568.lib(irq_redirect .o) - 0x00011068 0x00011068 0x00000018 Code RO 2251 i.TIMER0_IRQn_Handler CVWL568.lib(irq_redirect .o) - 0x00011080 0x00011080 0x00000018 Code RO 2252 i.TIMER1_IRQn_Handler CVWL568.lib(irq_redirect .o) - 0x00011098 0x00011098 0x00000018 Code RO 2253 i.TIMER2_IRQn_Handler CVWL568.lib(irq_redirect .o) - 0x000110b0 0x000110b0 0x00000018 Code RO 2254 i.TIMER3_IRQn_Handler CVWL568.lib(irq_redirect .o) - 0x000110c8 0x000110c8 0x0000001c Code RO 2507 i.UART0_IRQ_Handle CVWL568.lib(drv_uart.o) - 0x000110e4 0x000110e4 0x00000002 Code RO 2511 i.UART_DisableDma CVWL568.lib(drv_uart.o) - 0x000110e6 0x000110e6 0x00000004 Code RO 2517 i.UART_GetInstance CVWL568.lib(drv_uart.o) + 0x00010fe8 0x00010fe8 0x00000018 Code RO 2237 i.SysTick_Handler CVWL568.lib(irq_redirect .o) + 0x00011000 0x00011000 0x00000014 Data RO 1147 .ARM.__at_0x11000 CVWL568.lib(drv_common.o) + 0x00011014 0x00011014 0x0000001c Code RO 2234 i.SPIM_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00011030 0x00011030 0x0000001c Code RO 2235 i.SPIS_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x0001104c 0x0001104c 0x0000001c Code RO 2236 i.SWIRE_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00011068 0x00011068 0x00000018 Code RO 2238 i.TIMER0_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00011080 0x00011080 0x00000018 Code RO 2239 i.TIMER1_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00011098 0x00011098 0x00000018 Code RO 2240 i.TIMER2_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x000110b0 0x000110b0 0x00000018 Code RO 2241 i.TIMER3_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x000110c8 0x000110c8 0x0000001c Code RO 2494 i.UART0_IRQ_Handle CVWL568.lib(drv_uart.o) + 0x000110e4 0x000110e4 0x00000002 Code RO 2498 i.UART_DisableDma CVWL568.lib(drv_uart.o) + 0x000110e6 0x000110e6 0x00000004 Code RO 2504 i.UART_GetInstance CVWL568.lib(drv_uart.o) 0x000110ea 0x000110ea 0x00000002 PAD - 0x000110ec 0x000110ec 0x00000018 Code RO 2255 i.UART_IRQn_Handler CVWL568.lib(irq_redirect .o) - 0x00011104 0x00011104 0x00000024 Code RO 2525 i.UART_ResetRxFIFO CVWL568.lib(drv_uart.o) - 0x00011128 0x00011128 0x00000048 Code RO 2528 i.UART_SetBaudRate CVWL568.lib(drv_uart.o) - 0x00011170 0x00011170 0x0000001a Code RO 2529 i.UART_SwitchSCLK CVWL568.lib(drv_uart.o) - 0x0001118a 0x0001118a 0x00000134 Code RO 2531 i.UART_TransferHandleIRQ CVWL568.lib(drv_uart.o) - 0x000112be 0x000112be 0x0000001a Code RO 2533 i.UART_WriteBlocking CVWL568.lib(drv_uart.o) - 0x000112d8 0x000112d8 0x000000bc Code RO 2534 i.UART_init CVWL568.lib(drv_uart.o) - 0x00011394 0x00011394 0x00000018 Code RO 2256 i.VIDC_IRQn_Handler CVWL568.lib(irq_redirect .o) - 0x000113ac 0x000113ac 0x00000018 Code RO 2257 i.VPRE_IRQn_Handler CVWL568.lib(irq_redirect .o) - 0x000113c4 0x000113c4 0x00000018 Code RO 2258 i.WDG_IRQn_Handler CVWL568.lib(irq_redirect .o) - 0x000113dc 0x000113dc 0x00000020 Code RO 2897 i.__0printf mc_p.l(printfa.o) - 0x000113fc 0x000113fc 0x00000024 Code RO 2903 i.__0vsprintf mc_p.l(printfa.o) - 0x00011420 0x00011420 0x0000002e Code RO 2996 i.__ARM_clz mf_p.l(depilogue.o) + 0x000110ec 0x000110ec 0x00000018 Code RO 2242 i.UART_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00011104 0x00011104 0x00000024 Code RO 2512 i.UART_ResetRxFIFO CVWL568.lib(drv_uart.o) + 0x00011128 0x00011128 0x00000048 Code RO 2515 i.UART_SetBaudRate CVWL568.lib(drv_uart.o) + 0x00011170 0x00011170 0x0000001a Code RO 2516 i.UART_SwitchSCLK CVWL568.lib(drv_uart.o) + 0x0001118a 0x0001118a 0x00000134 Code RO 2518 i.UART_TransferHandleIRQ CVWL568.lib(drv_uart.o) + 0x000112be 0x000112be 0x0000001a Code RO 2520 i.UART_WriteBlocking CVWL568.lib(drv_uart.o) + 0x000112d8 0x000112d8 0x000000bc Code RO 2521 i.UART_init CVWL568.lib(drv_uart.o) + 0x00011394 0x00011394 0x00000018 Code RO 2243 i.VIDC_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x000113ac 0x000113ac 0x00000018 Code RO 2244 i.VPRE_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x000113c4 0x000113c4 0x00000018 Code RO 2245 i.WDG_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x000113dc 0x000113dc 0x00000020 Code RO 2884 i.__0printf mc_p.l(printfa.o) + 0x000113fc 0x000113fc 0x00000024 Code RO 2890 i.__0vsprintf mc_p.l(printfa.o) + 0x00011420 0x00011420 0x0000002e Code RO 2983 i.__ARM_clz mf_p.l(depilogue.o) 0x0001144e 0x0001144e 0x0000001a Code RO 625 i.__ARM_common_switch8 CVWL568.lib(hal_dsi_rx_ctrl.o) - 0x00011468 0x00011468 0x00000018 Code RO 1478 i.__NVIC_ClearPendingIRQ CVWL568.lib(drv_i2c_master.o) - 0x00011480 0x00011480 0x00000018 Code RO 1511 i.__NVIC_ClearPendingIRQ CVWL568.lib(drv_i2c_slave.o) - 0x00011498 0x00011498 0x00000018 Code RO 1606 i.__NVIC_ClearPendingIRQ CVWL568.lib(drv_spi_master.o) - 0x000114b0 0x000114b0 0x00000020 Code RO 2081 i.__NVIC_DisableIRQ CVWL568.lib(drv_rxbr.o) - 0x000114d0 0x000114d0 0x00000018 Code RO 2082 i.__NVIC_EnableIRQ CVWL568.lib(drv_rxbr.o) - 0x000114e8 0x000114e8 0x00000044 Code RO 2355 i.__NVIC_SetPriority CVWL568.lib(hal_spi_slave.o) - 0x0001152c 0x0001152c 0x0000000e Code RO 3008 i.__scatterload_copy mc_p.l(handlers.o) - 0x0001153a 0x0001153a 0x00000002 Code RO 3009 i.__scatterload_null mc_p.l(handlers.o) - 0x0001153c 0x0001153c 0x0000000e Code RO 3010 i.__scatterload_zeroinit mc_p.l(handlers.o) + 0x00011468 0x00011468 0x00000018 Code RO 1465 i.__NVIC_ClearPendingIRQ CVWL568.lib(drv_i2c_master.o) + 0x00011480 0x00011480 0x00000018 Code RO 1498 i.__NVIC_ClearPendingIRQ CVWL568.lib(drv_i2c_slave.o) + 0x00011498 0x00011498 0x00000018 Code RO 1593 i.__NVIC_ClearPendingIRQ CVWL568.lib(drv_spi_master.o) + 0x000114b0 0x000114b0 0x00000020 Code RO 2068 i.__NVIC_DisableIRQ CVWL568.lib(drv_rxbr.o) + 0x000114d0 0x000114d0 0x00000018 Code RO 2069 i.__NVIC_EnableIRQ CVWL568.lib(drv_rxbr.o) + 0x000114e8 0x000114e8 0x00000044 Code RO 2342 i.__NVIC_SetPriority CVWL568.lib(hal_spi_slave.o) + 0x0001152c 0x0001152c 0x0000000e Code RO 2995 i.__scatterload_copy mc_p.l(handlers.o) + 0x0001153a 0x0001153a 0x00000002 Code RO 2996 i.__scatterload_null mc_p.l(handlers.o) + 0x0001153c 0x0001153c 0x0000000e Code RO 2997 i.__scatterload_zeroinit mc_p.l(handlers.o) 0x0001154a 0x0001154a 0x00000002 PAD - 0x0001154c 0x0001154c 0x0000000c Code RO 2986 i.__set_errno mc_p.l(errno.o) - 0x00011558 0x00011558 0x00000174 Code RO 2904 i._fp_digits mc_p.l(printfa.o) - 0x000116cc 0x000116cc 0x000006ec Code RO 2905 i._printf_core mc_p.l(printfa.o) - 0x00011db8 0x00011db8 0x00000020 Code RO 2906 i._printf_post_padding mc_p.l(printfa.o) - 0x00011dd8 0x00011dd8 0x0000002c Code RO 2907 i._printf_pre_padding mc_p.l(printfa.o) - 0x00011e04 0x00011e04 0x0000000a Code RO 2909 i._sputc mc_p.l(printfa.o) + 0x0001154c 0x0001154c 0x0000000c Code RO 2973 i.__set_errno mc_p.l(errno.o) + 0x00011558 0x00011558 0x00000174 Code RO 2891 i._fp_digits mc_p.l(printfa.o) + 0x000116cc 0x000116cc 0x000006ec Code RO 2892 i._printf_core mc_p.l(printfa.o) + 0x00011db8 0x00011db8 0x00000020 Code RO 2893 i._printf_post_padding mc_p.l(printfa.o) + 0x00011dd8 0x00011dd8 0x0000002c Code RO 2894 i._printf_pre_padding mc_p.l(printfa.o) + 0x00011e04 0x00011e04 0x0000000a Code RO 2896 i._sputc mc_p.l(printfa.o) 0x00011e0e 0x00011e0e 0x00000002 PAD 0x00011e10 0x00011e10 0x00000fdc Code RO 101 i.ap_dcs_read ap_demo.o - 0x00012dec 0x00012dec 0x0000019c Code RO 102 i.ap_demo ap_demo.o - 0x00012f88 0x00012f88 0x0000008c Code RO 103 i.ap_get_reg_df ap_demo.o - 0x00013014 0x00013014 0x00000020 Code RO 409 i.ap_get_tp_calibration_status_01 app_tp_st_touch.o - 0x00013034 0x00013034 0x00000068 Code RO 104 i.ap_reset_cb ap_demo.o - 0x0001309c 0x0001309c 0x0000001c Code RO 105 i.ap_set_backlight_51 ap_demo.o - 0x000130b8 0x000130b8 0x00000044 Code RO 106 i.ap_set_display_off ap_demo.o - 0x000130fc 0x000130fc 0x00000038 Code RO 107 i.ap_set_display_on ap_demo.o - 0x00013134 0x00013134 0x0000007c Code RO 108 i.ap_set_enter_sleep_mode ap_demo.o - 0x000131b0 0x000131b0 0x00000070 Code RO 109 i.ap_set_exit_sleep_mode ap_demo.o - 0x00013220 0x00013220 0x00000098 Code RO 410 i.ap_set_tp_calibration_04 app_tp_st_touch.o - 0x000132b8 0x000132b8 0x000000b0 Code RO 411 i.ap_tp_st_touch_calibration app_tp_st_touch.o - 0x00013368 0x00013368 0x0000001a Code RO 412 i.ap_tp_st_touch_error_handler_F3 app_tp_st_touch.o - 0x00013382 0x00013382 0x00000020 Code RO 413 i.ap_tp_st_touch_error_handler_FF app_tp_st_touch.o - 0x000133a2 0x000133a2 0x00000002 PAD - 0x000133a4 0x000133a4 0x000000a8 Code RO 414 i.ap_tp_st_touch_get_calibration_success_mark app_tp_st_touch.o - 0x0001344c 0x0001344c 0x0000001c Code RO 416 i.ap_tp_st_touch_scan_point_init app_tp_st_touch.o - 0x00013468 0x00013468 0x00000094 Code RO 417 i.ap_tp_st_touch_scan_point_record_event app_tp_st_touch.o - 0x000134fc 0x000134fc 0x00000050 Code RO 418 i.ap_tp_st_touch_scan_point_record_event_exec app_tp_st_touch.o - 0x0001354c 0x0001354c 0x00000034 Code RO 419 i.ap_tp_st_touch_simulate_finger_release_event app_tp_st_touch.o - 0x00013580 0x00013580 0x000000ac Code RO 420 i.ap_tp_st_touch_software_reset app_tp_st_touch.o - 0x0001362c 0x0001362c 0x0000006c Code RO 110 i.ap_update_frame_rate ap_demo.o - 0x00013698 0x00013698 0x0000001c Code RO 2083 i.app_ADC_IRQn_Handler CVWL568.lib(drv_rxbr.o) - 0x000136b4 0x000136b4 0x00000024 Code RO 1402 i.app_AP_NRESET_IRQn_Handler CVWL568.lib(drv_gpio.o) - 0x000136d8 0x000136d8 0x0000001c Code RO 1403 i.app_EXTI_INT0_IRQn_Handler CVWL568.lib(drv_gpio.o) - 0x000136f4 0x000136f4 0x0000001c Code RO 1404 i.app_EXTI_INT1_IRQn_Handler CVWL568.lib(drv_gpio.o) - 0x00013710 0x00013710 0x0000001c Code RO 1405 i.app_EXTI_INT2_IRQn_Handler CVWL568.lib(drv_gpio.o) - 0x0001372c 0x0001372c 0x0000001c Code RO 1406 i.app_EXTI_INT3_IRQn_Handler CVWL568.lib(drv_gpio.o) - 0x00013748 0x00013748 0x0000001c Code RO 1407 i.app_EXTI_INT4_IRQn_Handler CVWL568.lib(drv_gpio.o) - 0x00013764 0x00013764 0x0000001c Code RO 1408 i.app_EXTI_INT5_IRQn_Handler CVWL568.lib(drv_gpio.o) - 0x00013780 0x00013780 0x0000001c Code RO 1409 i.app_EXTI_INT6_IRQn_Handler CVWL568.lib(drv_gpio.o) - 0x0001379c 0x0001379c 0x0000001c Code RO 1410 i.app_EXTI_INT7_IRQn_Handler CVWL568.lib(drv_gpio.o) - 0x000137b8 0x000137b8 0x00000048 Code RO 1152 i.app_HardFault_Handler CVWL568.lib(drv_common.o) - 0x00013800 0x00013800 0x00000010 Code RO 1512 i.app_I2C0_IRQn_Handler CVWL568.lib(drv_i2c_slave.o) - 0x00013810 0x00013810 0x00000010 Code RO 1479 i.app_I2C1_IRQn_Handler CVWL568.lib(drv_i2c_master.o) - 0x00013820 0x00013820 0x000000e0 Code RO 1711 i.app_LCDC_IRQn_Handler CVWL568.lib(hal_internal_vsync.o) - 0x00013900 0x00013900 0x00000088 Code RO 2025 i.app_MEMC_IRQn_Handler CVWL568.lib(drv_memc.o) - 0x00013988 0x00013988 0x00000298 Code RO 1797 i.app_MIPI_RX_IRQn_Handler CVWL568.lib(drv_dsi_rx.o) - 0x00013c20 0x00013c20 0x000000a0 Code RO 1853 i.app_MIPI_TX_IRQn_Handler CVWL568.lib(drv_dsi_tx.o) - 0x00013cc0 0x00013cc0 0x00000048 Code RO 2423 i.app_PWMDET_IRQn_Handler CVWL568.lib(drv_pwm.o) - 0x00013d08 0x00013d08 0x00000030 Code RO 1607 i.app_SPIM_IRQn_Handler CVWL568.lib(drv_spi_master.o) - 0x00013d38 0x00013d38 0x00000200 Code RO 2356 i.app_SPIS_IRQn_Handler CVWL568.lib(hal_spi_slave.o) - 0x00013f38 0x00013f38 0x00000020 Code RO 2488 i.app_SWIRE_IRQn_Handler CVWL568.lib(drv_swire.o) - 0x00013f58 0x00013f58 0x00000018 Code RO 1153 i.app_SysTick_Handler CVWL568.lib(drv_common.o) - 0x00013f70 0x00013f70 0x0000000a Code RO 1670 i.app_TIMER0_IRQn_Handler CVWL568.lib(drv_timer.o) - 0x00013f7a 0x00013f7a 0x0000000a Code RO 1671 i.app_TIMER1_IRQn_Handler CVWL568.lib(drv_timer.o) - 0x00013f84 0x00013f84 0x0000000a Code RO 1672 i.app_TIMER2_IRQn_Handler CVWL568.lib(drv_timer.o) - 0x00013f8e 0x00013f8e 0x0000000a Code RO 1673 i.app_TIMER3_IRQn_Handler CVWL568.lib(drv_timer.o) - 0x00013f98 0x00013f98 0x00000008 Code RO 2535 i.app_UART_IRQn_Handler CVWL568.lib(drv_uart.o) - 0x00013fa0 0x00013fa0 0x0000001c Code RO 2148 i.app_VIDC_IRQn_Handler CVWL568.lib(drv_vidc.o) - 0x00013fbc 0x00013fbc 0x0000001c Code RO 2084 i.app_VPRE_IRQn_Handler CVWL568.lib(drv_rxbr.o) - 0x00013fd8 0x00013fd8 0x00000038 Code RO 2594 i.app_WDG_IRQn_Handler CVWL568.lib(drv_wdg.o) - 0x00014010 0x00014010 0x00000010 Code RO 1264 i.app_dma_irq_handler CVWL568.lib(drv_dma.o) - 0x00014020 0x00014020 0x00000030 Code RO 1068 i.app_fls_ctrl_Handler CVWL568.lib(norflash.o) - 0x00014050 0x00014050 0x00000024 Code RO 258 i.app_tp_I2C_init app_tp_transfer.o - 0x00014074 0x00014074 0x000000a8 Code RO 421 i.app_tp_calibration_exec app_tp_st_touch.o - 0x0001411c 0x0001411c 0x00000030 Code RO 259 i.app_tp_i2cs_callback app_tp_transfer.o - 0x0001414c 0x0001414c 0x00000044 Code RO 260 i.app_tp_init app_tp_transfer.o - 0x00014190 0x00014190 0x00000020 Code RO 261 i.app_tp_m_read app_tp_transfer.o - 0x000141b0 0x000141b0 0x00000008 Code RO 263 i.app_tp_m_write app_tp_transfer.o - 0x000141b8 0x000141b8 0x00000354 Code RO 906 i.app_tp_phone_analysis_data WL568_S21_NT37701_TP.lib(app_tp_for_custom_s8.o) - 0x0001450c 0x0001450c 0x0000000c Code RO 264 i.app_tp_phone_clear_reset_on app_tp_transfer.o - 0x00014518 0x00014518 0x00000008 Code RO 266 i.app_tp_s_read app_tp_transfer.o - 0x00014520 0x00014520 0x00000008 Code RO 268 i.app_tp_s_write app_tp_transfer.o - 0x00014528 0x00014528 0x000002ac Code RO 908 i.app_tp_screen_analysis_int WL568_S21_NT37701_TP.lib(app_tp_for_custom_s8.o) - 0x000147d4 0x000147d4 0x00000030 Code RO 269 i.app_tp_screen_init app_tp_transfer.o - 0x00014804 0x00014804 0x0000000c Code RO 270 i.app_tp_screen_int_callback app_tp_transfer.o - 0x00014810 0x00014810 0x00000040 Code RO 271 i.app_tp_transfer_screen_const app_tp_transfer.o - 0x00014850 0x00014850 0x00000134 Code RO 272 i.app_tp_transfer_screen_int app_tp_transfer.o - 0x00014984 0x00014984 0x00000018 Code RO 273 i.app_tp_transfer_screen_start app_tp_transfer.o - 0x0001499c 0x0001499c 0x00000024 Code RO 511 i.board_Init board.o - 0x000149c0 0x000149c0 0x000003cc Code RO 1712 i.calc_framebuffer_setting CVWL568.lib(hal_internal_vsync.o) - 0x00014d8c 0x00014d8c 0x000000c8 Code RO 2640 i.ceil m_ps.l(ceil.o) - 0x00014e54 0x00014e54 0x0000002c Code RO 1713 i.check_mipi_rx_tx_video_info CVWL568.lib(hal_internal_vsync.o) - 0x00014e80 0x00014e80 0x00000094 Code RO 1714 i.check_pkt_buf_rev CVWL568.lib(hal_internal_vsync.o) - 0x00014f14 0x00014f14 0x00000058 Code RO 1784 i.dcs_packet_fifo_alloc CVWL568.lib(dcs_packet_fifo.o) - 0x00014f6c 0x00014f6c 0x00000018 Code RO 1785 i.dcs_packet_fifo_init CVWL568.lib(dcs_packet_fifo.o) - 0x00014f84 0x00014f84 0x00000044 Code RO 1786 i.dcs_packet_free_fifo_header CVWL568.lib(dcs_packet_fifo.o) - 0x00014fc8 0x00014fc8 0x00000024 Code RO 1787 i.dcs_packet_get_fifo_header CVWL568.lib(dcs_packet_fifo.o) - 0x00014fec 0x00014fec 0x0000001c Code RO 1715 i.dcs_sw_filter CVWL568.lib(hal_internal_vsync.o) - 0x00015008 0x00015008 0x00000018 Code RO 887 i.delayMs CVWL568.lib(tau_delay.o) - 0x00015020 0x00015020 0x00000022 Code RO 888 i.delayUs CVWL568.lib(tau_delay.o) - 0x00015042 0x00015042 0x00000002 PAD - 0x00015044 0x00015044 0x00000038 Code RO 1639 i.drv_ap_rst_trig_edge_detect CVWL568.lib(drv_sys_cfg.o) - 0x0001507c 0x0001507c 0x0000000c Code RO 2326 i.drv_chip_info_get_info CVWL568.lib(drv_chip_info.o) - 0x00015088 0x00015088 0x00000040 Code RO 2327 i.drv_chip_info_init CVWL568.lib(drv_chip_info.o) - 0x000150c8 0x000150c8 0x000000c8 Code RO 2328 i.drv_chip_rx_info_check CVWL568.lib(drv_chip_info.o) - 0x00015190 0x00015190 0x00000014 Code RO 2329 i.drv_chip_rx_init_done CVWL568.lib(drv_chip_info.o) - 0x000151a4 0x000151a4 0x00000058 Code RO 1155 i.drv_common_enable_systick CVWL568.lib(drv_common.o) - 0x000151fc 0x000151fc 0x00000008 Code RO 1158 i.drv_common_system_init CVWL568.lib(drv_common.o) - 0x00015204 0x00015204 0x00000010 Code RO 1179 i.drv_crgu_config_reset_modules CVWL568.lib(drv_crgu.o) - 0x00015214 0x00015214 0x00000014 Code RO 1191 i.drv_crgu_set_ahb_pre_div CVWL568.lib(drv_crgu.o) - 0x00015228 0x00015228 0x00000014 Code RO 1192 i.drv_crgu_set_ahb_src CVWL568.lib(drv_crgu.o) - 0x0001523c 0x0001523c 0x00000020 Code RO 1195 i.drv_crgu_set_clock CVWL568.lib(drv_crgu.o) - 0x0001525c 0x0001525c 0x00000014 Code RO 1196 i.drv_crgu_set_dpi_mux_src CVWL568.lib(drv_crgu.o) - 0x00015270 0x00015270 0x00000018 Code RO 1197 i.drv_crgu_set_dpi_pre_div CVWL568.lib(drv_crgu.o) - 0x00015288 0x00015288 0x00000014 Code RO 1198 i.drv_crgu_set_dpi_pre_src CVWL568.lib(drv_crgu.o) - 0x0001529c 0x0001529c 0x00000014 Code RO 1199 i.drv_crgu_set_dsc_core_div CVWL568.lib(drv_crgu.o) - 0x000152b0 0x000152b0 0x00000014 Code RO 1200 i.drv_crgu_set_dsco_src CVWL568.lib(drv_crgu.o) - 0x000152c4 0x000152c4 0x00000014 Code RO 1201 i.drv_crgu_set_dsco_src_div CVWL568.lib(drv_crgu.o) - 0x000152d8 0x000152d8 0x00000014 Code RO 1202 i.drv_crgu_set_fb_div CVWL568.lib(drv_crgu.o) - 0x000152ec 0x000152ec 0x00000014 Code RO 1203 i.drv_crgu_set_fb_src CVWL568.lib(drv_crgu.o) - 0x00015300 0x00015300 0x00000014 Code RO 1206 i.drv_crgu_set_lcdc_div CVWL568.lib(drv_crgu.o) - 0x00015314 0x00015314 0x00000014 Code RO 1207 i.drv_crgu_set_lcdc_src CVWL568.lib(drv_crgu.o) - 0x00015328 0x00015328 0x00000014 Code RO 1208 i.drv_crgu_set_mipi_cfg_src CVWL568.lib(drv_crgu.o) - 0x0001533c 0x0001533c 0x00000018 Code RO 1209 i.drv_crgu_set_mipi_ref_src CVWL568.lib(drv_crgu.o) - 0x00015354 0x00015354 0x00000018 Code RO 1212 i.drv_crgu_set_reset CVWL568.lib(drv_crgu.o) - 0x0001536c 0x0001536c 0x00000014 Code RO 1213 i.drv_crgu_set_rxbr_div CVWL568.lib(drv_crgu.o) - 0x00015380 0x00015380 0x00000014 Code RO 1214 i.drv_crgu_set_rxbr_src CVWL568.lib(drv_crgu.o) - 0x00015394 0x00015394 0x00000014 Code RO 1216 i.drv_crgu_set_vidc_src CVWL568.lib(drv_crgu.o) - 0x000153a8 0x000153a8 0x00000018 Code RO 1268 i.drv_dma_clear_flag CVWL568.lib(drv_dma.o) - 0x000153c0 0x000153c0 0x0000001c Code RO 1269 i.drv_dma_create_handle CVWL568.lib(drv_dma.o) - 0x000153dc 0x000153dc 0x00000010 Code RO 1271 i.drv_dma_disenable_channel CVWL568.lib(drv_dma.o) - 0x000153ec 0x000153ec 0x00000010 Code RO 1273 i.drv_dma_enable_channel CVWL568.lib(drv_dma.o) - 0x000153fc 0x000153fc 0x00000024 Code RO 1274 i.drv_dma_enable_channel_interrupts CVWL568.lib(drv_dma.o) - 0x00015420 0x00015420 0x0000000c Code RO 1276 i.drv_dma_get_channel_flag CVWL568.lib(drv_dma.o) - 0x0001542c 0x0001542c 0x00000090 Code RO 1279 i.drv_dma_irq_handler CVWL568.lib(drv_dma.o) - 0x000154bc 0x000154bc 0x00000012 Code RO 1281 i.drv_dma_prepar_transfer CVWL568.lib(drv_dma.o) - 0x000154ce 0x000154ce 0x0000001a Code RO 1283 i.drv_dma_set_burst CVWL568.lib(drv_dma.o) - 0x000154e8 0x000154e8 0x00000006 Code RO 1284 i.drv_dma_set_callback CVWL568.lib(drv_dma.o) - 0x000154ee 0x000154ee 0x00000002 PAD - 0x000154f0 0x000154f0 0x00000044 Code RO 1286 i.drv_dma_set_transfer CVWL568.lib(drv_dma.o) - 0x00015534 0x00015534 0x00000036 Code RO 2339 i.drv_dsc_dec_convert_pps_rc_parameter CVWL568.lib(drv_dsc_dec.o) - 0x0001556a 0x0001556a 0x0000000c Code RO 2340 i.drv_dsc_dec_disable CVWL568.lib(drv_dsc_dec.o) - 0x00015576 0x00015576 0x00000002 PAD - 0x00015578 0x00015578 0x00000074 Code RO 2341 i.drv_dsc_dec_enable CVWL568.lib(drv_dsc_dec.o) - 0x000155ec 0x000155ec 0x0000000a Code RO 2342 i.drv_dsc_dec_get_nslc CVWL568.lib(drv_dsc_dec.o) - 0x000155f6 0x000155f6 0x00000028 Code RO 2344 i.drv_dsc_dec_set_u8_pps CVWL568.lib(drv_dsc_dec.o) - 0x0001561e 0x0001561e 0x00000002 PAD - 0x00015620 0x00015620 0x00000104 Code RO 1798 i.drv_dsi_rx_calc_ipi_tx_delay CVWL568.lib(drv_dsi_rx.o) - 0x00015724 0x00015724 0x00000040 Code RO 1799 i.drv_dsi_rx_enable_irq CVWL568.lib(drv_dsi_rx.o) - 0x00015764 0x00015764 0x00000050 Code RO 1800 i.drv_dsi_rx_get_color_bpp CVWL568.lib(drv_dsi_rx.o) - 0x000157b4 0x000157b4 0x0000001c Code RO 1801 i.drv_dsi_rx_get_color_pcc CVWL568.lib(drv_dsi_rx.o) - 0x000157d0 0x000157d0 0x00000008 Code RO 1802 i.drv_dsi_rx_get_compression_en CVWL568.lib(drv_dsi_rx.o) - 0x000157d8 0x000157d8 0x00000006 Code RO 1803 i.drv_dsi_rx_get_max_ret_size CVWL568.lib(drv_dsi_rx.o) - 0x000157de 0x000157de 0x0000000e Code RO 1807 i.drv_dsi_rx_power_up CVWL568.lib(drv_dsi_rx.o) - 0x000157ec 0x000157ec 0x00000020 Code RO 1808 i.drv_dsi_rx_set_ctrl_cfg CVWL568.lib(drv_dsi_rx.o) - 0x0001580c 0x0001580c 0x00000010 Code RO 1809 i.drv_dsi_rx_set_ddi_cfg CVWL568.lib(drv_dsi_rx.o) - 0x0001581c 0x0001581c 0x00000004 Code RO 1811 i.drv_dsi_rx_set_inten CVWL568.lib(drv_dsi_rx.o) - 0x00015820 0x00015820 0x00000010 Code RO 1812 i.drv_dsi_rx_set_ipi_cfg CVWL568.lib(drv_dsi_rx.o) - 0x00015830 0x00015830 0x00000046 Code RO 1814 i.drv_dsi_rx_set_lane_swap CVWL568.lib(drv_dsi_rx.o) - 0x00015876 0x00015876 0x00000026 Code RO 1815 i.drv_dsi_rx_set_resp_cnt CVWL568.lib(drv_dsi_rx.o) - 0x0001589c 0x0001589c 0x000000f0 Code RO 1816 i.drv_dsi_rx_set_up_phy CVWL568.lib(drv_dsi_rx.o) - 0x0001598c 0x0001598c 0x0000000e Code RO 1817 i.drv_dsi_rx_shut_down CVWL568.lib(drv_dsi_rx.o) - 0x0001599a 0x0001599a 0x00000014 Code RO 1855 i.drv_dsi_tx_command_header CVWL568.lib(drv_dsi_tx.o) - 0x000159ae 0x000159ae 0x0000006c Code RO 1856 i.drv_dsi_tx_command_mode_cfg CVWL568.lib(drv_dsi_tx.o) - 0x00015a1a 0x00015a1a 0x00000004 Code RO 1857 i.drv_dsi_tx_command_put_payload CVWL568.lib(drv_dsi_tx.o) - 0x00015a1e 0x00015a1e 0x00000018 Code RO 1858 i.drv_dsi_tx_config_eotp CVWL568.lib(drv_dsi_tx.o) - 0x00015a36 0x00015a36 0x00000008 Code RO 1859 i.drv_dsi_tx_config_int CVWL568.lib(drv_dsi_tx.o) - 0x00015a3e 0x00015a3e 0x00000008 Code RO 1860 i.drv_dsi_tx_dpi_lpcmd_time CVWL568.lib(drv_dsi_tx.o) - 0x00015a46 0x00015a46 0x0000000a Code RO 1861 i.drv_dsi_tx_dpi_mode CVWL568.lib(drv_dsi_tx.o) - 0x00015a50 0x00015a50 0x00000024 Code RO 1862 i.drv_dsi_tx_dpi_polarity CVWL568.lib(drv_dsi_tx.o) - 0x00015a74 0x00015a74 0x00000004 Code RO 1863 i.drv_dsi_tx_edpi_cmd_size CVWL568.lib(drv_dsi_tx.o) - 0x00015a78 0x00015a78 0x00000004 Code RO 1865 i.drv_dsi_tx_get_cmd_status CVWL568.lib(drv_dsi_tx.o) - 0x00015a7c 0x00015a7c 0x00000004 Code RO 1867 i.drv_dsi_tx_mode CVWL568.lib(drv_dsi_tx.o) - 0x00015a80 0x00015a80 0x00000018 Code RO 1868 i.drv_dsi_tx_phy_clock_lane_auto_lp CVWL568.lib(drv_dsi_tx.o) - 0x00015a98 0x00015a98 0x0000001a Code RO 1869 i.drv_dsi_tx_phy_clock_lane_req_hs CVWL568.lib(drv_dsi_tx.o) - 0x00015ab2 0x00015ab2 0x0000000c Code RO 1871 i.drv_dsi_tx_phy_lane_mode CVWL568.lib(drv_dsi_tx.o) - 0x00015abe 0x00015abe 0x00000064 Code RO 1875 i.drv_dsi_tx_phy_status_ready CVWL568.lib(drv_dsi_tx.o) - 0x00015b22 0x00015b22 0x0000003e Code RO 1876 i.drv_dsi_tx_phy_status_stopstate CVWL568.lib(drv_dsi_tx.o) - 0x00015b60 0x00015b60 0x0000010c Code RO 1878 i.drv_dsi_tx_phy_test_setup CVWL568.lib(drv_dsi_tx.o) - 0x00015c6c 0x00015c6c 0x0000001e Code RO 1879 i.drv_dsi_tx_phy_time_cfg CVWL568.lib(drv_dsi_tx.o) - 0x00015c8a 0x00015c8a 0x00000008 Code RO 1883 i.drv_dsi_tx_powerup CVWL568.lib(drv_dsi_tx.o) - 0x00015c92 0x00015c92 0x0000001c Code RO 1884 i.drv_dsi_tx_response_mode CVWL568.lib(drv_dsi_tx.o) - 0x00015cae 0x00015cae 0x00000018 Code RO 1887 i.drv_dsi_tx_set_bta_ack CVWL568.lib(drv_dsi_tx.o) - 0x00015cc6 0x00015cc6 0x0000000c Code RO 1888 i.drv_dsi_tx_set_esc_div CVWL568.lib(drv_dsi_tx.o) - 0x00015cd2 0x00015cd2 0x00000002 PAD - 0x00015cd4 0x00015cd4 0x00000034 Code RO 1889 i.drv_dsi_tx_set_int CVWL568.lib(drv_dsi_tx.o) - 0x00015d08 0x00015d08 0x00000010 Code RO 1890 i.drv_dsi_tx_set_time_out_div CVWL568.lib(drv_dsi_tx.o) - 0x00015d18 0x00015d18 0x00000008 Code RO 1891 i.drv_dsi_tx_set_video_chunk CVWL568.lib(drv_dsi_tx.o) - 0x00015d20 0x00015d20 0x00000022 Code RO 1892 i.drv_dsi_tx_set_video_timing CVWL568.lib(drv_dsi_tx.o) - 0x00015d42 0x00015d42 0x00000008 Code RO 1894 i.drv_dsi_tx_shutdown CVWL568.lib(drv_dsi_tx.o) - 0x00015d4a 0x00015d4a 0x00000026 Code RO 1895 i.drv_dsi_tx_timeout_cfg CVWL568.lib(drv_dsi_tx.o) - 0x00015d70 0x00015d70 0x000000aa Code RO 1898 i.drv_dsi_tx_video_mode_cfg CVWL568.lib(drv_dsi_tx.o) - 0x00015e1a 0x00015e1a 0x00000016 Code RO 1899 i.drv_dsi_tx_video_mode_disable_hact_cmd CVWL568.lib(drv_dsi_tx.o) - 0x00015e30 0x00015e30 0x00000018 Code RO 1900 i.drv_dsi_tx_video_mode_set_lp_cmd CVWL568.lib(drv_dsi_tx.o) - 0x00015e48 0x00015e48 0x00000020 Code RO 2620 i.drv_efuse_enter_inactive CVWL568.lib(drv_efuse.o) - 0x00015e68 0x00015e68 0x0000000c Code RO 2623 i.drv_efuse_int_enable CVWL568.lib(drv_efuse.o) - 0x00015e74 0x00015e74 0x00000032 Code RO 2624 i.drv_efuse_read CVWL568.lib(drv_efuse.o) - 0x00015ea6 0x00015ea6 0x00000018 Code RO 2625 i.drv_efuse_read_req CVWL568.lib(drv_efuse.o) - 0x00015ebe 0x00015ebe 0x00000002 PAD - 0x00015ec0 0x00015ec0 0x00000018 Code RO 1411 i.drv_gpio_get_input_data CVWL568.lib(drv_gpio.o) - 0x00015ed8 0x00015ed8 0x0000000c Code RO 1413 i.drv_gpio_register_ap_reset_callback CVWL568.lib(drv_gpio.o) - 0x00015ee4 0x00015ee4 0x00000014 Code RO 1414 i.drv_gpio_register_callback CVWL568.lib(drv_gpio.o) - 0x00015ef8 0x00015ef8 0x00000044 Code RO 1416 i.drv_gpio_set_int CVWL568.lib(drv_gpio.o) - 0x00015f3c 0x00015f3c 0x00000020 Code RO 1417 i.drv_gpio_set_ioe CVWL568.lib(drv_gpio.o) - 0x00015f5c 0x00015f5c 0x00000010 Code RO 1418 i.drv_gpio_set_mode0 CVWL568.lib(drv_gpio.o) - 0x00015f6c 0x00015f6c 0x00000010 Code RO 1419 i.drv_gpio_set_mode1 CVWL568.lib(drv_gpio.o) - 0x00015f7c 0x00015f7c 0x00000010 Code RO 1420 i.drv_gpio_set_mode2 CVWL568.lib(drv_gpio.o) - 0x00015f8c 0x00015f8c 0x00000010 Code RO 1421 i.drv_gpio_set_mode3 CVWL568.lib(drv_gpio.o) - 0x00015f9c 0x00015f9c 0x00000020 Code RO 721 i.drv_gpio_set_output_data CVWL568.lib(hal_gpio.o) - 0x00015fbc 0x00015fbc 0x00000130 Code RO 1422 i.drv_gpio_set_pull_state CVWL568.lib(drv_gpio.o) - 0x000160ec 0x000160ec 0x00000034 Code RO 1454 i.drv_i2c_dma_callback CVWL568.lib(drv_i2c_dma.o) - 0x00016120 0x00016120 0x000000ac Code RO 1455 i.drv_i2c_dma_init CVWL568.lib(drv_i2c_dma.o) - 0x000161cc 0x000161cc 0x0000001a Code RO 1456 i.drv_i2c_enable_rx_dma CVWL568.lib(drv_i2c_dma.o) - 0x000161e6 0x000161e6 0x00000018 Code RO 1457 i.drv_i2c_enable_tx_dma CVWL568.lib(drv_i2c_dma.o) - 0x000161fe 0x000161fe 0x00000002 PAD - 0x00016200 0x00016200 0x00000060 Code RO 1481 i.drv_i2c_m_clear_it_pending_bit CVWL568.lib(drv_i2c_master.o) - 0x00016260 0x00016260 0x00000010 Code RO 1483 i.drv_i2c_m_enable CVWL568.lib(drv_i2c_master.o) - 0x00016270 0x00016270 0x00000038 Code RO 1484 i.drv_i2c_m_enable_intr CVWL568.lib(drv_i2c_master.o) - 0x000162a8 0x000162a8 0x0000000c Code RO 1487 i.drv_i2c_m_set_callback CVWL568.lib(drv_i2c_master.o) - 0x000162b4 0x000162b4 0x0000008c Code RO 1491 i.drv_i2c_master_init CVWL568.lib(drv_i2c_master.o) - 0x00016340 0x00016340 0x0000005c Code RO 1458 i.drv_i2c_master_read_dma CVWL568.lib(drv_i2c_dma.o) - 0x0001639c 0x0001639c 0x0000003c Code RO 1459 i.drv_i2c_master_write_dma CVWL568.lib(drv_i2c_dma.o) - 0x000163d8 0x000163d8 0x0000002e Code RO 1460 i.drv_i2c_master_write_read_cmd CVWL568.lib(drv_i2c_dma.o) - 0x00016406 0x00016406 0x00000002 PAD - 0x00016408 0x00016408 0x0000005c Code RO 1514 i.drv_i2c_s_clear_it_pending_bit CVWL568.lib(drv_i2c_slave.o) - 0x00016464 0x00016464 0x00000034 Code RO 1517 i.drv_i2c_s_enable_intr CVWL568.lib(drv_i2c_slave.o) - 0x00016498 0x00016498 0x0000001c Code RO 1518 i.drv_i2c_s_get_fifo_status CVWL568.lib(drv_i2c_slave.o) - 0x000164b4 0x000164b4 0x0000000c Code RO 1521 i.drv_i2c_s_set_callback CVWL568.lib(drv_i2c_slave.o) - 0x000164c0 0x000164c0 0x00000020 Code RO 1524 i.drv_i2c_s_write_data CVWL568.lib(drv_i2c_slave.o) - 0x000164e0 0x000164e0 0x00000058 Code RO 1461 i.drv_i2c_set_dma_irq_callback CVWL568.lib(drv_i2c_dma.o) - 0x00016538 0x00016538 0x00000044 Code RO 1525 i.drv_i2c_slave_init CVWL568.lib(drv_i2c_slave.o) - 0x0001657c 0x0001657c 0x0000001c Code RO 1462 i.drv_i2c_slave_write_dma CVWL568.lib(drv_i2c_dma.o) - 0x00016598 0x00016598 0x00000018 Code RO 1967 i.drv_lcdc_config_bypass CVWL568.lib(drv_lcdc.o) - 0x000165b0 0x000165b0 0x00000030 Code RO 1968 i.drv_lcdc_config_ccm CVWL568.lib(drv_lcdc.o) - 0x000165e0 0x000165e0 0x00000016 Code RO 1969 i.drv_lcdc_config_disp_mode CVWL568.lib(drv_lcdc.o) - 0x000165f6 0x000165f6 0x00000024 Code RO 1970 i.drv_lcdc_config_dpi_polarity CVWL568.lib(drv_lcdc.o) - 0x0001661a 0x0001661a 0x00000026 Code RO 1971 i.drv_lcdc_config_dpi_timing CVWL568.lib(drv_lcdc.o) - 0x00016640 0x00016640 0x00000016 Code RO 1972 i.drv_lcdc_config_edpi_mode CVWL568.lib(drv_lcdc.o) - 0x00016656 0x00016656 0x00000016 Code RO 1973 i.drv_lcdc_config_endianness CVWL568.lib(drv_lcdc.o) - 0x0001666c 0x0001666c 0x0000000c Code RO 1974 i.drv_lcdc_config_input_size CVWL568.lib(drv_lcdc.o) - 0x00016678 0x00016678 0x0000001e Code RO 1975 i.drv_lcdc_config_int CVWL568.lib(drv_lcdc.o) - 0x00016696 0x00016696 0x00000022 Code RO 1976 i.drv_lcdc_config_int_single CVWL568.lib(drv_lcdc.o) - 0x000166b8 0x000166b8 0x00000022 Code RO 1977 i.drv_lcdc_config_overwrite CVWL568.lib(drv_lcdc.o) - 0x000166da 0x000166da 0x0000000c Code RO 1978 i.drv_lcdc_config_overwrite_rgb CVWL568.lib(drv_lcdc.o) - 0x000166e6 0x000166e6 0x0000001a Code RO 1979 i.drv_lcdc_config_partial_display_area CVWL568.lib(drv_lcdc.o) - 0x00016700 0x00016700 0x00000022 Code RO 1980 i.drv_lcdc_config_partial_display_enable CVWL568.lib(drv_lcdc.o) - 0x00016722 0x00016722 0x0000001a Code RO 1982 i.drv_lcdc_config_scale_up_coef CVWL568.lib(drv_lcdc.o) - 0x0001673c 0x0001673c 0x0000000c Code RO 1983 i.drv_lcdc_config_scale_up_step CVWL568.lib(drv_lcdc.o) - 0x00016748 0x00016748 0x0000004c Code RO 1984 i.drv_lcdc_config_src_parameter CVWL568.lib(drv_lcdc.o) - 0x00016794 0x00016794 0x00000006 Code RO 1985 i.drv_lcdc_config_thresh CVWL568.lib(drv_lcdc.o) - 0x0001679a 0x0001679a 0x00000012 Code RO 1986 i.drv_lcdc_ctrl_flow CVWL568.lib(drv_lcdc.o) - 0x000167ac 0x000167ac 0x00000020 Code RO 1988 i.drv_lcdc_enable_shadow_reg CVWL568.lib(drv_lcdc.o) - 0x000167cc 0x000167cc 0x00000034 Code RO 1989 i.drv_lcdc_set_int CVWL568.lib(drv_lcdc.o) - 0x00016800 0x00016800 0x00000014 Code RO 1991 i.drv_lcdc_set_video_hw_mode CVWL568.lib(drv_lcdc.o) - 0x00016814 0x00016814 0x00000020 Code RO 1992 i.drv_lcdc_start CVWL568.lib(drv_lcdc.o) - 0x00016834 0x00016834 0x0000000c Code RO 2026 i.drv_memc_clear_status CVWL568.lib(drv_memc.o) - 0x00016840 0x00016840 0x00000040 Code RO 2027 i.drv_memc_enable_irq CVWL568.lib(drv_memc.o) - 0x00016880 0x00016880 0x0000000c Code RO 2028 i.drv_memc_gen_a_tear_signal CVWL568.lib(drv_memc.o) - 0x0001688c 0x0001688c 0x00000012 Code RO 2029 i.drv_memc_get_status CVWL568.lib(drv_memc.o) - 0x0001689e 0x0001689e 0x00000010 Code RO 2030 i.drv_memc_rate_transfer_sel CVWL568.lib(drv_memc.o) - 0x000168ae 0x000168ae 0x0000000e Code RO 2031 i.drv_memc_sel_vsync CVWL568.lib(drv_memc.o) - 0x000168bc 0x000168bc 0x00000014 Code RO 2032 i.drv_memc_set_active_height CVWL568.lib(drv_memc.o) - 0x000168d0 0x000168d0 0x0000000c Code RO 2033 i.drv_memc_set_data_mode CVWL568.lib(drv_memc.o) - 0x000168dc 0x000168dc 0x00000010 Code RO 2036 i.drv_memc_set_double_buffer CVWL568.lib(drv_memc.o) - 0x000168ec 0x000168ec 0x00000012 Code RO 2037 i.drv_memc_set_double_buffer_reverse CVWL568.lib(drv_memc.o) - 0x000168fe 0x000168fe 0x00000010 Code RO 2039 i.drv_memc_set_fs_en_conditions CVWL568.lib(drv_memc.o) - 0x0001690e 0x0001690e 0x00000014 Code RO 2040 i.drv_memc_set_inten CVWL568.lib(drv_memc.o) - 0x00016922 0x00016922 0x00000002 PAD - 0x00016924 0x00016924 0x00000018 Code RO 2041 i.drv_memc_set_lcdc_st_conditions CVWL568.lib(drv_memc.o) - 0x0001693c 0x0001693c 0x0000001a Code RO 2042 i.drv_memc_set_ltpo_mode CVWL568.lib(drv_memc.o) - 0x00016956 0x00016956 0x0000000e Code RO 2046 i.drv_memc_set_tear_mode CVWL568.lib(drv_memc.o) - 0x00016964 0x00016964 0x00000028 Code RO 2047 i.drv_memc_set_tear_waveform CVWL568.lib(drv_memc.o) - 0x0001698c 0x0001698c 0x0000000e Code RO 2049 i.drv_memc_set_vidc_sync_cnt CVWL568.lib(drv_memc.o) - 0x0001699a 0x0001699a 0x00000002 PAD - 0x0001699c 0x0001699c 0x00000008 Code RO 1546 i.drv_param_init_get_ccm CVWL568.lib(drv_param_init.o) - 0x000169a4 0x000169a4 0x00000014 Code RO 1547 i.drv_param_init_get_scld_filter_h CVWL568.lib(drv_param_init.o) - 0x000169b8 0x000169b8 0x00000014 Code RO 1548 i.drv_param_init_get_scld_filter_v CVWL568.lib(drv_param_init.o) - 0x000169cc 0x000169cc 0x00000008 Code RO 1549 i.drv_param_init_get_sclu_filter CVWL568.lib(drv_param_init.o) - 0x000169d4 0x000169d4 0x00000014 Code RO 1550 i.drv_param_init_set_ccm CVWL568.lib(drv_param_init.o) - 0x000169e8 0x000169e8 0x00000064 Code RO 1551 i.drv_param_init_set_scld_filter CVWL568.lib(drv_param_init.o) - 0x00016a4c 0x00016a4c 0x00000024 Code RO 1553 i.drv_param_p2r_filter_init CVWL568.lib(drv_param_init.o) - 0x00016a70 0x00016a70 0x00000010 Code RO 2298 i.drv_phy_enable_calibration CVWL568.lib(drv_phy_common.o) - 0x00016a80 0x00016a80 0x0000003c Code RO 2299 i.drv_phy_get_calibration CVWL568.lib(drv_phy_common.o) - 0x00016abc 0x00016abc 0x00000060 Code RO 2300 i.drv_phy_get_pll_para CVWL568.lib(drv_phy_common.o) - 0x00016b1c 0x00016b1c 0x00000054 Code RO 2301 i.drv_phy_get_rate_para CVWL568.lib(drv_phy_common.o) - 0x00016b70 0x00016b70 0x00000010 Code RO 2302 i.drv_phy_test_clear CVWL568.lib(drv_phy_common.o) - 0x00016b80 0x00016b80 0x00000018 Code RO 2303 i.drv_phy_test_lock CVWL568.lib(drv_phy_common.o) - 0x00016b98 0x00016b98 0x00000020 Code RO 2305 i.drv_phy_test_write_1_byte CVWL568.lib(drv_phy_common.o) - 0x00016bb8 0x00016bb8 0x00000026 Code RO 2306 i.drv_phy_test_write_2_byte CVWL568.lib(drv_phy_common.o) - 0x00016bde 0x00016bde 0x0000001e Code RO 2307 i.drv_phy_test_write_code CVWL568.lib(drv_phy_common.o) - 0x00016bfc 0x00016bfc 0x00000020 Code RO 2308 i.drv_phy_test_write_data CVWL568.lib(drv_phy_common.o) - 0x00016c1c 0x00016c1c 0x00000020 Code RO 1569 i.drv_pwr_set_cp_mode CVWL568.lib(drv_pwr.o) - 0x00016c3c 0x00016c3c 0x00000018 Code RO 1570 i.drv_pwr_set_pvd_mode CVWL568.lib(drv_pwr.o) - 0x00016c54 0x00016c54 0x00000030 Code RO 1571 i.drv_pwr_set_system_clk_src CVWL568.lib(drv_pwr.o) - 0x00016c84 0x00016c84 0x0000000c Code RO 1818 i.drv_rx_phy_test_clear CVWL568.lib(drv_dsi_rx.o) - 0x00016c90 0x00016c90 0x00000010 Code RO 1819 i.drv_rx_phy_test_lock CVWL568.lib(drv_dsi_rx.o) - 0x00016ca0 0x00016ca0 0x00000014 Code RO 1821 i.drv_rx_phy_test_write_1_byte CVWL568.lib(drv_dsi_rx.o) - 0x00016cb4 0x00016cb4 0x00000016 Code RO 1822 i.drv_rx_phy_test_write_2_byte CVWL568.lib(drv_dsi_rx.o) - 0x00016cca 0x00016cca 0x0000000a Code RO 2085 i.drv_rxbr_clear_pkt_buffer CVWL568.lib(drv_rxbr.o) - 0x00016cd4 0x00016cd4 0x00000004 Code RO 2086 i.drv_rxbr_clear_status0 CVWL568.lib(drv_rxbr.o) - 0x00016cd8 0x00016cd8 0x0000005a Code RO 2088 i.drv_rxbr_enable_irq CVWL568.lib(drv_rxbr.o) - 0x00016d32 0x00016d32 0x00000002 PAD - 0x00016d34 0x00016d34 0x00000014 Code RO 2089 i.drv_rxbr_frame_drop_cfg CVWL568.lib(drv_rxbr.o) - 0x00016d48 0x00016d48 0x0000003c Code RO 2090 i.drv_rxbr_get_clk CVWL568.lib(drv_rxbr.o) - 0x00016d84 0x00016d84 0x00000004 Code RO 2091 i.drv_rxbr_get_col_addr CVWL568.lib(drv_rxbr.o) - 0x00016d88 0x00016d88 0x00000012 Code RO 1716 i.drv_rxbr_get_int_source CVWL568.lib(hal_internal_vsync.o) - 0x00016d9a 0x00016d9a 0x00000004 Code RO 2094 i.drv_rxbr_get_page_addr CVWL568.lib(drv_rxbr.o) - 0x00016d9e 0x00016d9e 0x00000012 Code RO 1717 i.drv_rxbr_get_status0 CVWL568.lib(hal_internal_vsync.o) - 0x00016db0 0x00016db0 0x0000000c Code RO 2096 i.drv_rxbr_hline_rcv0_cfg CVWL568.lib(drv_rxbr.o) - 0x00016dbc 0x00016dbc 0x00000008 Code RO 2097 i.drv_rxbr_hline_rcv_cfg CVWL568.lib(drv_rxbr.o) - 0x00016dc4 0x00016dc4 0x0000000c Code RO 2098 i.drv_rxbr_register_irq0_callback CVWL568.lib(drv_rxbr.o) - 0x00016dd0 0x00016dd0 0x0000000c Code RO 2099 i.drv_rxbr_register_irq1_callback CVWL568.lib(drv_rxbr.o) - 0x00016ddc 0x00016ddc 0x00000014 Code RO 2100 i.drv_rxbr_set_ack_pkt_header CVWL568.lib(drv_rxbr.o) - 0x00016df0 0x00016df0 0x000000cc Code RO 2101 i.drv_rxbr_set_cmd_filter CVWL568.lib(drv_rxbr.o) - 0x00016ebc 0x00016ebc 0x00000014 Code RO 2103 i.drv_rxbr_set_color_format CVWL568.lib(drv_rxbr.o) - 0x00016ed0 0x00016ed0 0x00000014 Code RO 2105 i.drv_rxbr_set_inten CVWL568.lib(drv_rxbr.o) - 0x00016ee4 0x00016ee4 0x00000010 Code RO 2106 i.drv_rxbr_set_ltpo_drop_th CVWL568.lib(drv_rxbr.o) - 0x00016ef4 0x00016ef4 0x00000026 Code RO 2108 i.drv_rxbr_set_usr_cfg CVWL568.lib(drv_rxbr.o) - 0x00016f1a 0x00016f1a 0x00000008 Code RO 2109 i.drv_rxbr_set_usr_col CVWL568.lib(drv_rxbr.o) - 0x00016f22 0x00016f22 0x00000008 Code RO 2110 i.drv_rxbr_set_usr_row CVWL568.lib(drv_rxbr.o) - 0x00016f2a 0x00016f2a 0x00000002 PAD - 0x00016f2c 0x00016f2c 0x00000020 Code RO 1615 i.drv_spi_m_read_data CVWL568.lib(drv_spi_master.o) - 0x00016f4c 0x00016f4c 0x00000048 Code RO 2492 i.drv_swire_set_int CVWL568.lib(drv_swire.o) - 0x00016f94 0x00016f94 0x0000000c Code RO 1640 i.drv_sys_cfg_clear_all_int CVWL568.lib(drv_sys_cfg.o) - 0x00016fa0 0x00016fa0 0x00000028 Code RO 1641 i.drv_sys_cfg_clear_pending CVWL568.lib(drv_sys_cfg.o) - 0x00016fc8 0x00016fc8 0x00000018 Code RO 1644 i.drv_sys_cfg_sel_ap_rst_lvl_trig CVWL568.lib(drv_sys_cfg.o) - 0x00016fe0 0x00016fe0 0x0000001c Code RO 1645 i.drv_sys_cfg_sel_ap_rst_trig CVWL568.lib(drv_sys_cfg.o) - 0x00016ffc 0x00016ffc 0x00000024 Code RO 1646 i.drv_sys_cfg_sel_gpio_group CVWL568.lib(drv_sys_cfg.o) - 0x00017020 0x00017020 0x00000024 Code RO 1647 i.drv_sys_cfg_sel_int_trig CVWL568.lib(drv_sys_cfg.o) - 0x00017044 0x00017044 0x00000010 Code RO 1649 i.drv_sys_cfg_set_dma_rx_req CVWL568.lib(drv_sys_cfg.o) - 0x00017054 0x00017054 0x00000010 Code RO 1650 i.drv_sys_cfg_set_dma_tx_req CVWL568.lib(drv_sys_cfg.o) - 0x00017064 0x00017064 0x00000024 Code RO 1651 i.drv_sys_cfg_set_int CVWL568.lib(drv_sys_cfg.o) - 0x00017088 0x00017088 0x0000001a Code RO 1675 i.drv_timer_clear_status_flags CVWL568.lib(drv_timer.o) - 0x000170a2 0x000170a2 0x00000020 Code RO 1676 i.drv_timer_enable CVWL568.lib(drv_timer.o) - 0x000170c2 0x000170c2 0x00000002 PAD - 0x000170c4 0x000170c4 0x00000010 Code RO 1678 i.drv_timer_get_instance CVWL568.lib(drv_timer.o) - 0x000170d4 0x000170d4 0x0000000e Code RO 1680 i.drv_timer_get_prescaler CVWL568.lib(drv_timer.o) - 0x000170e2 0x000170e2 0x00000002 PAD - 0x000170e4 0x000170e4 0x00000044 Code RO 1681 i.drv_timer_handle_interrupt CVWL568.lib(drv_timer.o) - 0x00017128 0x00017128 0x00000014 Code RO 1682 i.drv_timer_register_callback CVWL568.lib(drv_timer.o) - 0x0001713c 0x0001713c 0x0000000c Code RO 1683 i.drv_timer_set_current_count CVWL568.lib(drv_timer.o) - 0x00017148 0x00017148 0x00000048 Code RO 1684 i.drv_timer_set_int CVWL568.lib(drv_timer.o) - 0x00017190 0x00017190 0x0000000c Code RO 1685 i.drv_timer_set_match CVWL568.lib(drv_timer.o) - 0x0001719c 0x0001719c 0x00000016 Code RO 1686 i.drv_timer_set_prescaler CVWL568.lib(drv_timer.o) - 0x000171b2 0x000171b2 0x0000000a Code RO 1901 i.drv_tx_phy_test_clear CVWL568.lib(drv_dsi_tx.o) - 0x000171bc 0x000171bc 0x0000001c Code RO 1902 i.drv_tx_phy_test_enter CVWL568.lib(drv_dsi_tx.o) - 0x000171d8 0x000171d8 0x0000001c Code RO 1903 i.drv_tx_phy_test_exit CVWL568.lib(drv_dsi_tx.o) - 0x000171f4 0x000171f4 0x00000012 Code RO 1905 i.drv_tx_phy_test_write_1_byte CVWL568.lib(drv_dsi_tx.o) - 0x00017206 0x00017206 0x00000014 Code RO 1906 i.drv_tx_phy_test_write_2_byte CVWL568.lib(drv_dsi_tx.o) - 0x0001721a 0x0001721a 0x00000010 Code RO 1907 i.drv_tx_phy_test_write_code CVWL568.lib(drv_dsi_tx.o) - 0x0001722a 0x0001722a 0x00000008 Code RO 2149 i.drv_vidc_clear_irq CVWL568.lib(drv_vidc.o) - 0x00017232 0x00017232 0x00000018 Code RO 2153 i.drv_vidc_enable CVWL568.lib(drv_vidc.o) - 0x0001724a 0x0001724a 0x00000002 PAD - 0x0001724c 0x0001724c 0x00000040 Code RO 2154 i.drv_vidc_enable_irq CVWL568.lib(drv_vidc.o) - 0x0001728c 0x0001728c 0x00000012 Code RO 2156 i.drv_vidc_get_irq_status CVWL568.lib(drv_vidc.o) - 0x0001729e 0x0001729e 0x00000002 PAD - 0x000172a0 0x000172a0 0x00000028 Code RO 2160 i.drv_vidc_init_module_enable CVWL568.lib(drv_vidc.o) - 0x000172c8 0x000172c8 0x0000000c Code RO 2161 i.drv_vidc_register_callback CVWL568.lib(drv_vidc.o) - 0x000172d4 0x000172d4 0x00000006 Code RO 2162 i.drv_vidc_reset CVWL568.lib(drv_vidc.o) - 0x000172da 0x000172da 0x0000003c Code RO 2164 i.drv_vidc_set_dst_parameter CVWL568.lib(drv_vidc.o) - 0x00017316 0x00017316 0x00000014 Code RO 2168 i.drv_vidc_set_irqen CVWL568.lib(drv_vidc.o) - 0x0001732a 0x0001732a 0x00000010 Code RO 2169 i.drv_vidc_set_mirror CVWL568.lib(drv_vidc.o) - 0x0001733a 0x0001733a 0x00000008 Code RO 2172 i.drv_vidc_set_p2r_hcoef0 CVWL568.lib(drv_vidc.o) - 0x00017342 0x00017342 0x00000026 Code RO 2173 i.drv_vidc_set_p2r_hinitb CVWL568.lib(drv_vidc.o) - 0x00017368 0x00017368 0x00000026 Code RO 2174 i.drv_vidc_set_p2r_hinitr CVWL568.lib(drv_vidc.o) - 0x0001738e 0x0001738e 0x00000002 PAD - 0x00017390 0x00017390 0x00000018 Code RO 2175 i.drv_vidc_set_pentile_swap CVWL568.lib(drv_vidc.o) - 0x000173a8 0x000173a8 0x0000000a Code RO 2176 i.drv_vidc_set_pu_ctrl CVWL568.lib(drv_vidc.o) - 0x000173b2 0x000173b2 0x00000010 Code RO 2177 i.drv_vidc_set_rotation CVWL568.lib(drv_vidc.o) - 0x000173c2 0x000173c2 0x0000000a Code RO 2178 i.drv_vidc_set_scld_hcoef0 CVWL568.lib(drv_vidc.o) - 0x000173cc 0x000173cc 0x0000000a Code RO 2179 i.drv_vidc_set_scld_hcoef1 CVWL568.lib(drv_vidc.o) - 0x000173d6 0x000173d6 0x00000012 Code RO 2180 i.drv_vidc_set_scld_step CVWL568.lib(drv_vidc.o) - 0x000173e8 0x000173e8 0x0000000a Code RO 2181 i.drv_vidc_set_scld_vcoef0 CVWL568.lib(drv_vidc.o) - 0x000173f2 0x000173f2 0x0000000a Code RO 2182 i.drv_vidc_set_scld_vcoef1 CVWL568.lib(drv_vidc.o) - 0x000173fc 0x000173fc 0x00000016 Code RO 2183 i.drv_vidc_set_src_parameter CVWL568.lib(drv_vidc.o) - 0x00017412 0x00017412 0x00000002 PAD - 0x00017414 0x00017414 0x00000010 Code RO 2595 i.drv_wdg_clear_counter CVWL568.lib(drv_wdg.o) - 0x00017424 0x00017424 0x00000010 Code RO 2596 i.drv_wdg_clear_edge_flag CVWL568.lib(drv_wdg.o) - 0x00017434 0x00017434 0x00000010 Code RO 2599 i.drv_wdg_read_edge_flag CVWL568.lib(drv_wdg.o) - 0x00017444 0x00017444 0x00000034 Code RO 2602 i.drv_wdg_set_int CVWL568.lib(drv_wdg.o) - 0x00017478 0x00017478 0x0000000a Code RO 1323 i.fls_clr_interrupt_flag CVWL568.lib(drv_fls.o) - 0x00017482 0x00017482 0x00000014 Code RO 897 i.fputc CVWL568.lib(tau_log.o) - 0x00017496 0x00017496 0x00000002 PAD - 0x00017498 0x00017498 0x0000005c Code RO 111 i.frame_start_cb ap_demo.o - 0x000174f4 0x000174f4 0x00000030 Code RO 540 i.hal_dsi_rx_ctrl_create_handle CVWL568.lib(hal_dsi_rx_ctrl.o) - 0x00017524 0x00017524 0x0000009c Code RO 542 i.hal_dsi_rx_ctrl_deinit CVWL568.lib(hal_dsi_rx_ctrl.o) - 0x000175c0 0x000175c0 0x00000084 Code RO 544 i.hal_dsi_rx_ctrl_dsc_async_handler CVWL568.lib(hal_dsi_rx_ctrl.o) - 0x00017644 0x00017644 0x00000028 Code RO 546 i.hal_dsi_rx_ctrl_gen_a_tear_signal CVWL568.lib(hal_dsi_rx_ctrl.o) - 0x0001766c 0x0001766c 0x00000028 Code RO 548 i.hal_dsi_rx_ctrl_get_max_ret_size CVWL568.lib(hal_dsi_rx_ctrl.o) - 0x00017694 0x00017694 0x00000098 Code RO 550 i.hal_dsi_rx_ctrl_init CVWL568.lib(hal_dsi_rx_ctrl.o) - 0x0001772c 0x0001772c 0x00000130 Code RO 551 i.hal_dsi_rx_ctrl_init_clk CVWL568.lib(hal_dsi_rx_ctrl.o) - 0x0001785c 0x0001785c 0x000000d4 Code RO 552 i.hal_dsi_rx_ctrl_init_dsi_rx CVWL568.lib(hal_dsi_rx_ctrl.o) - 0x00017930 0x00017930 0x0000013c Code RO 553 i.hal_dsi_rx_ctrl_init_memc CVWL568.lib(hal_dsi_rx_ctrl.o) - 0x00017a6c 0x00017a6c 0x00000130 Code RO 554 i.hal_dsi_rx_ctrl_init_rxbr CVWL568.lib(hal_dsi_rx_ctrl.o) - 0x00017b9c 0x00017b9c 0x0000022c Code RO 555 i.hal_dsi_rx_ctrl_init_vidc CVWL568.lib(hal_dsi_rx_ctrl.o) - 0x00017dc8 0x00017dc8 0x0000003c Code RO 556 i.hal_dsi_rx_ctrl_pre_init_pps CVWL568.lib(hal_dsi_rx_ctrl.o) - 0x00017e04 0x00017e04 0x000000f0 Code RO 559 i.hal_dsi_rx_ctrl_send_ack_cmd CVWL568.lib(hal_dsi_rx_ctrl.o) - 0x00017ef4 0x00017ef4 0x0000002c Code RO 561 i.hal_dsi_rx_ctrl_set_cus_esc_clk CVWL568.lib(hal_dsi_rx_ctrl.o) - 0x00017f20 0x00017f20 0x0000006c Code RO 562 i.hal_dsi_rx_ctrl_set_cus_scld_filter CVWL568.lib(hal_dsi_rx_ctrl.o) - 0x00017f8c 0x00017f8c 0x00000034 Code RO 563 i.hal_dsi_rx_ctrl_set_cus_sync_line CVWL568.lib(hal_dsi_rx_ctrl.o) - 0x00017fc0 0x00017fc0 0x00000038 Code RO 567 i.hal_dsi_rx_ctrl_set_ipi_cfg CVWL568.lib(hal_dsi_rx_ctrl.o) - 0x00017ff8 0x00017ff8 0x00000072 Code RO 571 i.hal_dsi_rx_ctrl_set_rxbr_clk CVWL568.lib(hal_dsi_rx_ctrl.o) - 0x0001806a 0x0001806a 0x00000002 PAD - 0x0001806c 0x0001806c 0x00000034 Code RO 572 i.hal_dsi_rx_ctrl_set_sw_tear_mode CVWL568.lib(hal_dsi_rx_ctrl.o) - 0x000180a0 0x000180a0 0x0000000e Code RO 574 i.hal_dsi_rx_ctrl_set_tear_mode_ex CVWL568.lib(hal_dsi_rx_ctrl.o) - 0x000180ae 0x000180ae 0x00000002 PAD - 0x000180b0 0x000180b0 0x0000003c Code RO 575 i.hal_dsi_rx_ctrl_start CVWL568.lib(hal_dsi_rx_ctrl.o) - 0x000180ec 0x000180ec 0x0000003c Code RO 576 i.hal_dsi_rx_ctrl_stop CVWL568.lib(hal_dsi_rx_ctrl.o) - 0x00018128 0x00018128 0x00000020 Code RO 578 i.hal_dsi_rx_ctrl_toggle_resolution CVWL568.lib(hal_dsi_rx_ctrl.o) - 0x00018148 0x00018148 0x00000190 Code RO 629 i.hal_dsi_tx_calc_video_chunks CVWL568.lib(hal_dsi_tx_ctrl.o) - 0x000182d8 0x000182d8 0x00000034 Code RO 630 i.hal_dsi_tx_config_params_for_lane_rate CVWL568.lib(hal_dsi_tx_ctrl.o) - 0x0001830c 0x0001830c 0x000004d0 Code RO 631 i.hal_dsi_tx_count_lane_rate CVWL568.lib(hal_dsi_tx_ctrl.o) - 0x000187dc 0x000187dc 0x0000002c Code RO 633 i.hal_dsi_tx_ctrl_create_handle CVWL568.lib(hal_dsi_tx_ctrl.o) - 0x00018808 0x00018808 0x00000048 Code RO 634 i.hal_dsi_tx_ctrl_deinit CVWL568.lib(hal_dsi_tx_ctrl.o) - 0x00018850 0x00018850 0x0000004c Code RO 635 i.hal_dsi_tx_ctrl_enter_init_panel_mode CVWL568.lib(hal_dsi_tx_ctrl.o) - 0x0001889c 0x0001889c 0x00000028 Code RO 637 i.hal_dsi_tx_ctrl_exit_init_panel_mode CVWL568.lib(hal_dsi_tx_ctrl.o) - 0x000188c4 0x000188c4 0x000000c4 Code RO 639 i.hal_dsi_tx_ctrl_init CVWL568.lib(hal_dsi_tx_ctrl.o) - 0x00018988 0x00018988 0x00000024 Code RO 640 i.hal_dsi_tx_ctrl_init_clk CVWL568.lib(hal_dsi_tx_ctrl.o) - 0x000189ac 0x000189ac 0x0000000c Code RO 641 i.hal_dsi_tx_ctrl_panel_reset_pin CVWL568.lib(hal_dsi_tx_ctrl.o) - 0x000189b8 0x000189b8 0x00000020 Code RO 644 i.hal_dsi_tx_ctrl_set_ccm CVWL568.lib(hal_dsi_tx_ctrl.o) - 0x000189d8 0x000189d8 0x00000014 Code RO 650 i.hal_dsi_tx_ctrl_set_overwrite_rgb CVWL568.lib(hal_dsi_tx_ctrl.o) - 0x000189ec 0x000189ec 0x00000010 Code RO 651 i.hal_dsi_tx_ctrl_set_partial_disp CVWL568.lib(hal_dsi_tx_ctrl.o) - 0x000189fc 0x000189fc 0x00000024 Code RO 652 i.hal_dsi_tx_ctrl_set_partial_disp_area CVWL568.lib(hal_dsi_tx_ctrl.o) - 0x00018a20 0x00018a20 0x0000006c Code RO 654 i.hal_dsi_tx_ctrl_start CVWL568.lib(hal_dsi_tx_ctrl.o) - 0x00018a8c 0x00018a8c 0x00000044 Code RO 655 i.hal_dsi_tx_ctrl_stop CVWL568.lib(hal_dsi_tx_ctrl.o) - 0x00018ad0 0x00018ad0 0x000000d8 Code RO 656 i.hal_dsi_tx_ctrl_write_array_cmd CVWL568.lib(hal_dsi_tx_ctrl.o) - 0x00018ba8 0x00018ba8 0x000000b0 Code RO 657 i.hal_dsi_tx_ctrl_write_cmd CVWL568.lib(hal_dsi_tx_ctrl.o) - 0x00018c58 0x00018c58 0x00000044 Code RO 658 i.hal_dsi_tx_init_data_mode CVWL568.lib(hal_dsi_tx_ctrl.o) - 0x00018c9c 0x00018c9c 0x00000030 Code RO 659 i.hal_dsi_tx_init_dpi_cfg CVWL568.lib(hal_dsi_tx_ctrl.o) - 0x00018ccc 0x00018ccc 0x00000020 Code RO 660 i.hal_dsi_tx_init_interrupt CVWL568.lib(hal_dsi_tx_ctrl.o) - 0x00018cec 0x00018cec 0x00000020 Code RO 661 i.hal_dsi_tx_init_phy_cfg CVWL568.lib(hal_dsi_tx_ctrl.o) - 0x00018d0c 0x00018d0c 0x00000094 Code RO 662 i.hal_dsi_tx_init_remains CVWL568.lib(hal_dsi_tx_ctrl.o) - 0x00018da0 0x00018da0 0x00000058 Code RO 663 i.hal_dsi_tx_init_video_mode CVWL568.lib(hal_dsi_tx_ctrl.o) - 0x00018df8 0x00018df8 0x00000044 Code RO 664 i.hal_dsi_tx_send_cmd CVWL568.lib(hal_dsi_tx_ctrl.o) - 0x00018e3c 0x00018e3c 0x00000018 Code RO 722 i.hal_gpio_ctrl_eint CVWL568.lib(hal_gpio.o) - 0x00018e54 0x00018e54 0x00000012 Code RO 723 i.hal_gpio_get_input_data CVWL568.lib(hal_gpio.o) - 0x00018e66 0x00018e66 0x00000002 PAD - 0x00018e68 0x00018e68 0x00000040 Code RO 726 i.hal_gpio_init_eint CVWL568.lib(hal_gpio.o) - 0x00018ea8 0x00018ea8 0x00000020 Code RO 727 i.hal_gpio_init_input CVWL568.lib(hal_gpio.o) - 0x00018ec8 0x00018ec8 0x00000028 Code RO 728 i.hal_gpio_init_output CVWL568.lib(hal_gpio.o) - 0x00018ef0 0x00018ef0 0x00000018 Code RO 729 i.hal_gpio_reg_eint_cb CVWL568.lib(hal_gpio.o) - 0x00018f08 0x00018f08 0x00000050 Code RO 730 i.hal_gpio_set_ap_reset_int CVWL568.lib(hal_gpio.o) - 0x00018f58 0x00018f58 0x00000060 Code RO 732 i.hal_gpio_set_mode CVWL568.lib(hal_gpio.o) - 0x00018fb8 0x00018fb8 0x00000008 Code RO 733 i.hal_gpio_set_output_data CVWL568.lib(hal_gpio.o) - 0x00018fc0 0x00018fc0 0x00000020 Code RO 735 i.hal_gpio_set_pull_state CVWL568.lib(hal_gpio.o) - 0x00018fe0 0x00018fe0 0x0000006c Code RO 760 i.hal_i2c_m_dma_init CVWL568.lib(hal_i2c_master.o) - 0x0001904c 0x0001904c 0x00000020 Code RO 761 i.hal_i2c_m_dma_read CVWL568.lib(hal_i2c_master.o) - 0x0001906c 0x0001906c 0x0000001c Code RO 762 i.hal_i2c_m_dma_write CVWL568.lib(hal_i2c_master.o) - 0x00019088 0x00019088 0x0000000c Code RO 764 i.hal_i2c_m_transfer_complate CVWL568.lib(hal_i2c_master.o) - 0x00019094 0x00019094 0x00000020 Code RO 765 i.hal_i2c_master_irq_callback CVWL568.lib(hal_i2c_master.o) - 0x000190b4 0x000190b4 0x00000010 Code RO 777 i.hal_i2c_s_dma_user_callback CVWL568.lib(hal_i2c_slave.o) - 0x000190c4 0x000190c4 0x00000038 Code RO 778 i.hal_i2c_s_dma_write CVWL568.lib(hal_i2c_slave.o) - 0x000190fc 0x000190fc 0x0000006c Code RO 780 i.hal_i2c_s_init CVWL568.lib(hal_i2c_slave.o) - 0x00019168 0x00019168 0x00000014 Code RO 781 i.hal_i2c_s_nonblocking_read CVWL568.lib(hal_i2c_slave.o) - 0x0001917c 0x0001917c 0x0000000c Code RO 788 i.hal_i2c_s_set_transfer CVWL568.lib(hal_i2c_slave.o) - 0x00019188 0x00019188 0x0000014c Code RO 791 i.hal_i2c_slave_irq_callback CVWL568.lib(hal_i2c_slave.o) - 0x000192d4 0x000192d4 0x000000e4 Code RO 1719 i.hal_internal_init_memc CVWL568.lib(hal_internal_vsync.o) - 0x000193b8 0x000193b8 0x00000010 Code RO 1720 i.hal_internal_sync_get_fb_setting CVWL568.lib(hal_internal_vsync.o) - 0x000193c8 0x000193c8 0x00000214 Code RO 1721 i.hal_internal_sync_input_resolution_change CVWL568.lib(hal_internal_vsync.o) - 0x000195dc 0x000195dc 0x0000001c Code RO 1723 i.hal_internal_vsync_deinit CVWL568.lib(hal_internal_vsync.o) - 0x000195f8 0x000195f8 0x0000000c Code RO 1724 i.hal_internal_vsync_get_rx_state CVWL568.lib(hal_internal_vsync.o) - 0x00019604 0x00019604 0x00000018 Code RO 1725 i.hal_internal_vsync_get_sync_line CVWL568.lib(hal_internal_vsync.o) - 0x0001961c 0x0001961c 0x0000000c Code RO 1726 i.hal_internal_vsync_get_tx_state CVWL568.lib(hal_internal_vsync.o) - 0x00019628 0x00019628 0x000000fc Code RO 1727 i.hal_internal_vsync_init_rx CVWL568.lib(hal_internal_vsync.o) - 0x00019724 0x00019724 0x000000b0 Code RO 1728 i.hal_internal_vsync_init_tx CVWL568.lib(hal_internal_vsync.o) - 0x000197d4 0x000197d4 0x0000011c Code RO 1729 i.hal_internal_vsync_set_auto_hw_filter CVWL568.lib(hal_internal_vsync.o) - 0x000198f0 0x000198f0 0x00000014 Code RO 1731 i.hal_internal_vsync_set_rx_state CVWL568.lib(hal_internal_vsync.o) - 0x00019904 0x00019904 0x0000001c Code RO 1732 i.hal_internal_vsync_set_sync_line CVWL568.lib(hal_internal_vsync.o) - 0x00019920 0x00019920 0x00000048 Code RO 1733 i.hal_internal_vsync_set_tear_mode CVWL568.lib(hal_internal_vsync.o) - 0x00019968 0x00019968 0x00000040 Code RO 1734 i.hal_internal_vsync_set_tx_state CVWL568.lib(hal_internal_vsync.o) - 0x000199a8 0x000199a8 0x00000024 Code RO 665 i.hal_lcdc_config_ccm CVWL568.lib(hal_dsi_tx_ctrl.o) - 0x000199cc 0x000199cc 0x00000048 Code RO 666 i.hal_lcdc_config_remains CVWL568.lib(hal_dsi_tx_ctrl.o) - 0x00019a14 0x00019a14 0x00000014 Code RO 667 i.hal_lcdc_config_rgb_to_pentile CVWL568.lib(hal_dsi_tx_ctrl.o) - 0x00019a28 0x00019a28 0x00000164 Code RO 668 i.hal_lcdc_config_upscaler CVWL568.lib(hal_dsi_tx_ctrl.o) - 0x00019b8c 0x00019b8c 0x00000040 Code RO 669 i.hal_lcdc_init_cfg CVWL568.lib(hal_dsi_tx_ctrl.o) - 0x00019bcc 0x00019bcc 0x00000180 Code RO 670 i.hal_lcdc_init_clk CVWL568.lib(hal_dsi_tx_ctrl.o) - 0x00019d4c 0x00019d4c 0x00000040 Code RO 671 i.hal_lcdc_init_interrupt CVWL568.lib(hal_dsi_tx_ctrl.o) - 0x00019d8c 0x00019d8c 0x0000000e Code RO 813 i.hal_spi_m_clear_rxfifo CVWL568.lib(hal_spi_master.o) - 0x00019d9a 0x00019d9a 0x00000008 Code RO 837 i.hal_system_enable_systick CVWL568.lib(hal_system.o) - 0x00019da2 0x00019da2 0x00000002 PAD - 0x00019da4 0x00019da4 0x00000088 Code RO 842 i.hal_system_init CVWL568.lib(hal_system.o) - 0x00019e2c 0x00019e2c 0x0000001c Code RO 843 i.hal_system_init_console CVWL568.lib(hal_system.o) - 0x00019e48 0x00019e48 0x00000008 Code RO 846 i.hal_system_set_phy_calibration CVWL568.lib(hal_system.o) - 0x00019e50 0x00019e50 0x00000008 Code RO 847 i.hal_system_set_pvd CVWL568.lib(hal_system.o) - 0x00019e58 0x00019e58 0x00000008 Code RO 848 i.hal_system_set_vcc CVWL568.lib(hal_system.o) - 0x00019e60 0x00019e60 0x0000001a Code RO 873 i.hal_timer_init CVWL568.lib(hal_timer.o) - 0x00019e7a 0x00019e7a 0x00000002 PAD - 0x00019e7c 0x00019e7c 0x00000050 Code RO 875 i.hal_timer_start CVWL568.lib(hal_timer.o) - 0x00019ecc 0x00019ecc 0x0000008c Code RO 1051 i.hal_uart_init CVWL568.lib(hal_uart.o) - 0x00019f58 0x00019f58 0x00000010 Code RO 1054 i.hal_uart_transmit_blocking CVWL568.lib(hal_uart.o) - 0x00019f68 0x00019f68 0x00000110 Code RO 2259 i.handle_init CVWL568.lib(irq_redirect .o) - 0x0001a078 0x0001a078 0x00000070 Code RO 112 i.init_mipi_tx ap_demo.o - 0x0001a0e8 0x0001a0e8 0x00000098 Code RO 113 i.init_panel ap_demo.o - 0x0001a180 0x0001a180 0x0000000a Code RO 3 i.main main.o - 0x0001a18a 0x0001a18a 0x00000002 PAD - 0x0001a18c 0x0001a18c 0x000000d0 Code RO 114 i.open_mipi_rx ap_demo.o - 0x0001a25c 0x0001a25c 0x000000c0 Code RO 115 i.pps_update_handle ap_demo.o - 0x0001a31c 0x0001a31c 0x000003f4 Code RO 1735 i.rx_get_dcs_packet_data CVWL568.lib(hal_internal_vsync.o) - 0x0001a710 0x0001a710 0x00000140 Code RO 1736 i.rx_partial_update CVWL568.lib(hal_internal_vsync.o) - 0x0001a850 0x0001a850 0x0000008c Code RO 1737 i.rx_receive_packet CVWL568.lib(hal_internal_vsync.o) - 0x0001a8dc 0x0001a8dc 0x00000180 Code RO 1738 i.rx_receive_pps CVWL568.lib(hal_internal_vsync.o) - 0x0001aa5c 0x0001aa5c 0x000000a4 Code RO 1739 i.rxbr_irq0_callback CVWL568.lib(hal_internal_vsync.o) - 0x0001ab00 0x0001ab00 0x00000170 Code RO 1740 i.rxbr_irq1_callback CVWL568.lib(hal_internal_vsync.o) - 0x0001ac70 0x0001ac70 0x0000008c Code RO 1741 i.soft_gen_te CVWL568.lib(hal_internal_vsync.o) - 0x0001acfc 0x0001acfc 0x00000030 Code RO 116 i.soft_timer3_cb ap_demo.o - 0x0001ad2c 0x0001ad2c 0x00000048 Code RO 2644 i.sqrt m_ps.l(sqrt.o) - 0x0001ad74 0x0001ad74 0x00000068 Code RO 117 i.tp_heartbeat_exec ap_demo.o - 0x0001addc 0x0001addc 0x000000e8 Code RO 1742 i.vidc_callback CVWL568.lib(hal_internal_vsync.o) - 0x0001aec4 0x0001aec4 0x000000d0 Code RO 1743 i.vpre_err_reset CVWL568.lib(hal_internal_vsync.o) - 0x0001af94 0x0001af94 0x0000019c Code RO 1744 i.vsync_set_te_mode CVWL568.lib(hal_internal_vsync.o) - 0x0001b130 0x0001b130 0x000024b8 Data RO 118 .constdata ap_demo.o - 0x0001d5e8 0x0001d5e8 0x00000020 Data RO 423 .constdata app_tp_st_touch.o - 0x0001d608 0x0001d608 0x000000d2 Data RO 738 .constdata CVWL568.lib(hal_gpio.o) - 0x0001d6da 0x0001d6da 0x000014a6 Data RO 909 .constdata WL568_S21_NT37701_TP.lib(app_tp_for_custom_s8.o) - 0x0001eb80 0x0001eb80 0x00000001 Data RO 924 .constdata WL568_S21_NT37701_TP.lib(app_tp_for_custom_s8.o) - 0x0001eb81 0x0001eb81 0x00000003 PAD - 0x0001eb84 0x0001eb84 0x00000008 Data RO 1554 .constdata CVWL568.lib(drv_param_init.o) - 0x0001eb8c 0x0001eb8c 0x00000186 Data RO 2309 .constdata CVWL568.lib(drv_phy_common.o) - 0x0001ed12 0x0001ed12 0x00000002 PAD - 0x0001ed14 0x0001ed14 0x00000048 Data RO 580 .conststring CVWL568.lib(hal_dsi_rx_ctrl.o) - 0x0001ed5c 0x0001ed5c 0x00000134 Data RO 1746 .conststring CVWL568.lib(hal_internal_vsync.o) - 0x0001ee90 0x0001ee90 0x00000030 Data RO 3006 Region$$Table anon$$obj.o + 0x00012dec 0x00012dec 0x00000198 Code RO 102 i.ap_demo ap_demo.o + 0x00012f84 0x00012f84 0x0000008c Code RO 103 i.ap_get_reg_df ap_demo.o + 0x00013010 0x00013010 0x00000020 Code RO 409 i.ap_get_tp_calibration_status_01 app_tp_st_touch.o + 0x00013030 0x00013030 0x00000068 Code RO 104 i.ap_reset_cb ap_demo.o + 0x00013098 0x00013098 0x0000001c Code RO 105 i.ap_set_backlight_51 ap_demo.o + 0x000130b4 0x000130b4 0x00000044 Code RO 106 i.ap_set_display_off ap_demo.o + 0x000130f8 0x000130f8 0x00000038 Code RO 107 i.ap_set_display_on ap_demo.o + 0x00013130 0x00013130 0x0000007c Code RO 108 i.ap_set_enter_sleep_mode ap_demo.o + 0x000131ac 0x000131ac 0x00000070 Code RO 109 i.ap_set_exit_sleep_mode ap_demo.o + 0x0001321c 0x0001321c 0x00000098 Code RO 410 i.ap_set_tp_calibration_04 app_tp_st_touch.o + 0x000132b4 0x000132b4 0x000000b0 Code RO 411 i.ap_tp_st_touch_calibration app_tp_st_touch.o + 0x00013364 0x00013364 0x0000001a Code RO 412 i.ap_tp_st_touch_error_handler_F3 app_tp_st_touch.o + 0x0001337e 0x0001337e 0x00000020 Code RO 413 i.ap_tp_st_touch_error_handler_FF app_tp_st_touch.o + 0x0001339e 0x0001339e 0x00000002 PAD + 0x000133a0 0x000133a0 0x000000a8 Code RO 414 i.ap_tp_st_touch_get_calibration_success_mark app_tp_st_touch.o + 0x00013448 0x00013448 0x0000001c Code RO 416 i.ap_tp_st_touch_scan_point_init app_tp_st_touch.o + 0x00013464 0x00013464 0x00000094 Code RO 417 i.ap_tp_st_touch_scan_point_record_event app_tp_st_touch.o + 0x000134f8 0x000134f8 0x00000050 Code RO 418 i.ap_tp_st_touch_scan_point_record_event_exec app_tp_st_touch.o + 0x00013548 0x00013548 0x00000034 Code RO 419 i.ap_tp_st_touch_simulate_finger_release_event app_tp_st_touch.o + 0x0001357c 0x0001357c 0x000000ac Code RO 420 i.ap_tp_st_touch_software_reset app_tp_st_touch.o + 0x00013628 0x00013628 0x0000006c Code RO 110 i.ap_update_frame_rate ap_demo.o + 0x00013694 0x00013694 0x0000001c Code RO 2070 i.app_ADC_IRQn_Handler CVWL568.lib(drv_rxbr.o) + 0x000136b0 0x000136b0 0x00000024 Code RO 1389 i.app_AP_NRESET_IRQn_Handler CVWL568.lib(drv_gpio.o) + 0x000136d4 0x000136d4 0x0000001c Code RO 1390 i.app_EXTI_INT0_IRQn_Handler CVWL568.lib(drv_gpio.o) + 0x000136f0 0x000136f0 0x0000001c Code RO 1391 i.app_EXTI_INT1_IRQn_Handler CVWL568.lib(drv_gpio.o) + 0x0001370c 0x0001370c 0x0000001c Code RO 1392 i.app_EXTI_INT2_IRQn_Handler CVWL568.lib(drv_gpio.o) + 0x00013728 0x00013728 0x0000001c Code RO 1393 i.app_EXTI_INT3_IRQn_Handler CVWL568.lib(drv_gpio.o) + 0x00013744 0x00013744 0x0000001c Code RO 1394 i.app_EXTI_INT4_IRQn_Handler CVWL568.lib(drv_gpio.o) + 0x00013760 0x00013760 0x0000001c Code RO 1395 i.app_EXTI_INT5_IRQn_Handler CVWL568.lib(drv_gpio.o) + 0x0001377c 0x0001377c 0x0000001c Code RO 1396 i.app_EXTI_INT6_IRQn_Handler CVWL568.lib(drv_gpio.o) + 0x00013798 0x00013798 0x0000001c Code RO 1397 i.app_EXTI_INT7_IRQn_Handler CVWL568.lib(drv_gpio.o) + 0x000137b4 0x000137b4 0x00000048 Code RO 1139 i.app_HardFault_Handler CVWL568.lib(drv_common.o) + 0x000137fc 0x000137fc 0x00000010 Code RO 1499 i.app_I2C0_IRQn_Handler CVWL568.lib(drv_i2c_slave.o) + 0x0001380c 0x0001380c 0x00000010 Code RO 1466 i.app_I2C1_IRQn_Handler CVWL568.lib(drv_i2c_master.o) + 0x0001381c 0x0001381c 0x000000e0 Code RO 1698 i.app_LCDC_IRQn_Handler CVWL568.lib(hal_internal_vsync.o) + 0x000138fc 0x000138fc 0x00000088 Code RO 2012 i.app_MEMC_IRQn_Handler CVWL568.lib(drv_memc.o) + 0x00013984 0x00013984 0x00000298 Code RO 1784 i.app_MIPI_RX_IRQn_Handler CVWL568.lib(drv_dsi_rx.o) + 0x00013c1c 0x00013c1c 0x000000a0 Code RO 1840 i.app_MIPI_TX_IRQn_Handler CVWL568.lib(drv_dsi_tx.o) + 0x00013cbc 0x00013cbc 0x00000048 Code RO 2410 i.app_PWMDET_IRQn_Handler CVWL568.lib(drv_pwm.o) + 0x00013d04 0x00013d04 0x00000030 Code RO 1594 i.app_SPIM_IRQn_Handler CVWL568.lib(drv_spi_master.o) + 0x00013d34 0x00013d34 0x00000200 Code RO 2343 i.app_SPIS_IRQn_Handler CVWL568.lib(hal_spi_slave.o) + 0x00013f34 0x00013f34 0x00000020 Code RO 2475 i.app_SWIRE_IRQn_Handler CVWL568.lib(drv_swire.o) + 0x00013f54 0x00013f54 0x00000018 Code RO 1140 i.app_SysTick_Handler CVWL568.lib(drv_common.o) + 0x00013f6c 0x00013f6c 0x0000000a Code RO 1657 i.app_TIMER0_IRQn_Handler CVWL568.lib(drv_timer.o) + 0x00013f76 0x00013f76 0x0000000a Code RO 1658 i.app_TIMER1_IRQn_Handler CVWL568.lib(drv_timer.o) + 0x00013f80 0x00013f80 0x0000000a Code RO 1659 i.app_TIMER2_IRQn_Handler CVWL568.lib(drv_timer.o) + 0x00013f8a 0x00013f8a 0x0000000a Code RO 1660 i.app_TIMER3_IRQn_Handler CVWL568.lib(drv_timer.o) + 0x00013f94 0x00013f94 0x00000008 Code RO 2522 i.app_UART_IRQn_Handler CVWL568.lib(drv_uart.o) + 0x00013f9c 0x00013f9c 0x0000001c Code RO 2135 i.app_VIDC_IRQn_Handler CVWL568.lib(drv_vidc.o) + 0x00013fb8 0x00013fb8 0x0000001c Code RO 2071 i.app_VPRE_IRQn_Handler CVWL568.lib(drv_rxbr.o) + 0x00013fd4 0x00013fd4 0x00000038 Code RO 2581 i.app_WDG_IRQn_Handler CVWL568.lib(drv_wdg.o) + 0x0001400c 0x0001400c 0x00000010 Code RO 1251 i.app_dma_irq_handler CVWL568.lib(drv_dma.o) + 0x0001401c 0x0001401c 0x00000030 Code RO 1055 i.app_fls_ctrl_Handler CVWL568.lib(norflash.o) + 0x0001404c 0x0001404c 0x00000024 Code RO 258 i.app_tp_I2C_init app_tp_transfer.o + 0x00014070 0x00014070 0x000000a8 Code RO 421 i.app_tp_calibration_exec app_tp_st_touch.o + 0x00014118 0x00014118 0x00000030 Code RO 259 i.app_tp_i2cs_callback app_tp_transfer.o + 0x00014148 0x00014148 0x00000044 Code RO 260 i.app_tp_init app_tp_transfer.o + 0x0001418c 0x0001418c 0x00000020 Code RO 261 i.app_tp_m_read app_tp_transfer.o + 0x000141ac 0x000141ac 0x00000008 Code RO 263 i.app_tp_m_write app_tp_transfer.o + 0x000141b4 0x000141b4 0x00000354 Code RO 906 i.app_tp_phone_analysis_data WL568_S21_NT37701_TP.lib(app_tp_for_custom_s8.o) + 0x00014508 0x00014508 0x0000000c Code RO 264 i.app_tp_phone_clear_reset_on app_tp_transfer.o + 0x00014514 0x00014514 0x00000008 Code RO 266 i.app_tp_s_read app_tp_transfer.o + 0x0001451c 0x0001451c 0x00000008 Code RO 268 i.app_tp_s_write app_tp_transfer.o + 0x00014524 0x00014524 0x000002ac Code RO 908 i.app_tp_screen_analysis_int WL568_S21_NT37701_TP.lib(app_tp_for_custom_s8.o) + 0x000147d0 0x000147d0 0x00000030 Code RO 269 i.app_tp_screen_init app_tp_transfer.o + 0x00014800 0x00014800 0x0000000c Code RO 270 i.app_tp_screen_int_callback app_tp_transfer.o + 0x0001480c 0x0001480c 0x00000040 Code RO 271 i.app_tp_transfer_screen_const app_tp_transfer.o + 0x0001484c 0x0001484c 0x00000134 Code RO 272 i.app_tp_transfer_screen_int app_tp_transfer.o + 0x00014980 0x00014980 0x00000018 Code RO 273 i.app_tp_transfer_screen_start app_tp_transfer.o + 0x00014998 0x00014998 0x00000024 Code RO 511 i.board_Init board.o + 0x000149bc 0x000149bc 0x000003cc Code RO 1699 i.calc_framebuffer_setting CVWL568.lib(hal_internal_vsync.o) + 0x00014d88 0x00014d88 0x000000c8 Code RO 2627 i.ceil m_ps.l(ceil.o) + 0x00014e50 0x00014e50 0x0000002c Code RO 1700 i.check_mipi_rx_tx_video_info CVWL568.lib(hal_internal_vsync.o) + 0x00014e7c 0x00014e7c 0x00000094 Code RO 1701 i.check_pkt_buf_rev CVWL568.lib(hal_internal_vsync.o) + 0x00014f10 0x00014f10 0x00000058 Code RO 1771 i.dcs_packet_fifo_alloc CVWL568.lib(dcs_packet_fifo.o) + 0x00014f68 0x00014f68 0x00000018 Code RO 1772 i.dcs_packet_fifo_init CVWL568.lib(dcs_packet_fifo.o) + 0x00014f80 0x00014f80 0x00000044 Code RO 1773 i.dcs_packet_free_fifo_header CVWL568.lib(dcs_packet_fifo.o) + 0x00014fc4 0x00014fc4 0x00000024 Code RO 1774 i.dcs_packet_get_fifo_header CVWL568.lib(dcs_packet_fifo.o) + 0x00014fe8 0x00014fe8 0x0000001c Code RO 1702 i.dcs_sw_filter CVWL568.lib(hal_internal_vsync.o) + 0x00015004 0x00015004 0x00000018 Code RO 887 i.delayMs CVWL568.lib(tau_delay.o) + 0x0001501c 0x0001501c 0x00000022 Code RO 888 i.delayUs CVWL568.lib(tau_delay.o) + 0x0001503e 0x0001503e 0x00000002 PAD + 0x00015040 0x00015040 0x00000038 Code RO 1626 i.drv_ap_rst_trig_edge_detect CVWL568.lib(drv_sys_cfg.o) + 0x00015078 0x00015078 0x0000000c Code RO 2313 i.drv_chip_info_get_info CVWL568.lib(drv_chip_info.o) + 0x00015084 0x00015084 0x00000040 Code RO 2314 i.drv_chip_info_init CVWL568.lib(drv_chip_info.o) + 0x000150c4 0x000150c4 0x000000c8 Code RO 2315 i.drv_chip_rx_info_check CVWL568.lib(drv_chip_info.o) + 0x0001518c 0x0001518c 0x00000014 Code RO 2316 i.drv_chip_rx_init_done CVWL568.lib(drv_chip_info.o) + 0x000151a0 0x000151a0 0x00000058 Code RO 1142 i.drv_common_enable_systick CVWL568.lib(drv_common.o) + 0x000151f8 0x000151f8 0x00000008 Code RO 1145 i.drv_common_system_init CVWL568.lib(drv_common.o) + 0x00015200 0x00015200 0x00000010 Code RO 1166 i.drv_crgu_config_reset_modules CVWL568.lib(drv_crgu.o) + 0x00015210 0x00015210 0x00000014 Code RO 1178 i.drv_crgu_set_ahb_pre_div CVWL568.lib(drv_crgu.o) + 0x00015224 0x00015224 0x00000014 Code RO 1179 i.drv_crgu_set_ahb_src CVWL568.lib(drv_crgu.o) + 0x00015238 0x00015238 0x00000020 Code RO 1182 i.drv_crgu_set_clock CVWL568.lib(drv_crgu.o) + 0x00015258 0x00015258 0x00000014 Code RO 1183 i.drv_crgu_set_dpi_mux_src CVWL568.lib(drv_crgu.o) + 0x0001526c 0x0001526c 0x00000018 Code RO 1184 i.drv_crgu_set_dpi_pre_div CVWL568.lib(drv_crgu.o) + 0x00015284 0x00015284 0x00000014 Code RO 1185 i.drv_crgu_set_dpi_pre_src CVWL568.lib(drv_crgu.o) + 0x00015298 0x00015298 0x00000014 Code RO 1186 i.drv_crgu_set_dsc_core_div CVWL568.lib(drv_crgu.o) + 0x000152ac 0x000152ac 0x00000014 Code RO 1187 i.drv_crgu_set_dsco_src CVWL568.lib(drv_crgu.o) + 0x000152c0 0x000152c0 0x00000014 Code RO 1188 i.drv_crgu_set_dsco_src_div CVWL568.lib(drv_crgu.o) + 0x000152d4 0x000152d4 0x00000014 Code RO 1189 i.drv_crgu_set_fb_div CVWL568.lib(drv_crgu.o) + 0x000152e8 0x000152e8 0x00000014 Code RO 1190 i.drv_crgu_set_fb_src CVWL568.lib(drv_crgu.o) + 0x000152fc 0x000152fc 0x00000014 Code RO 1193 i.drv_crgu_set_lcdc_div CVWL568.lib(drv_crgu.o) + 0x00015310 0x00015310 0x00000014 Code RO 1194 i.drv_crgu_set_lcdc_src CVWL568.lib(drv_crgu.o) + 0x00015324 0x00015324 0x00000014 Code RO 1195 i.drv_crgu_set_mipi_cfg_src CVWL568.lib(drv_crgu.o) + 0x00015338 0x00015338 0x00000018 Code RO 1196 i.drv_crgu_set_mipi_ref_src CVWL568.lib(drv_crgu.o) + 0x00015350 0x00015350 0x00000018 Code RO 1199 i.drv_crgu_set_reset CVWL568.lib(drv_crgu.o) + 0x00015368 0x00015368 0x00000014 Code RO 1200 i.drv_crgu_set_rxbr_div CVWL568.lib(drv_crgu.o) + 0x0001537c 0x0001537c 0x00000014 Code RO 1201 i.drv_crgu_set_rxbr_src CVWL568.lib(drv_crgu.o) + 0x00015390 0x00015390 0x00000014 Code RO 1203 i.drv_crgu_set_vidc_src CVWL568.lib(drv_crgu.o) + 0x000153a4 0x000153a4 0x00000018 Code RO 1255 i.drv_dma_clear_flag CVWL568.lib(drv_dma.o) + 0x000153bc 0x000153bc 0x0000001c Code RO 1256 i.drv_dma_create_handle CVWL568.lib(drv_dma.o) + 0x000153d8 0x000153d8 0x00000010 Code RO 1258 i.drv_dma_disenable_channel CVWL568.lib(drv_dma.o) + 0x000153e8 0x000153e8 0x00000010 Code RO 1260 i.drv_dma_enable_channel CVWL568.lib(drv_dma.o) + 0x000153f8 0x000153f8 0x00000024 Code RO 1261 i.drv_dma_enable_channel_interrupts CVWL568.lib(drv_dma.o) + 0x0001541c 0x0001541c 0x0000000c Code RO 1263 i.drv_dma_get_channel_flag CVWL568.lib(drv_dma.o) + 0x00015428 0x00015428 0x00000090 Code RO 1266 i.drv_dma_irq_handler CVWL568.lib(drv_dma.o) + 0x000154b8 0x000154b8 0x00000012 Code RO 1268 i.drv_dma_prepar_transfer CVWL568.lib(drv_dma.o) + 0x000154ca 0x000154ca 0x0000001a Code RO 1270 i.drv_dma_set_burst CVWL568.lib(drv_dma.o) + 0x000154e4 0x000154e4 0x00000006 Code RO 1271 i.drv_dma_set_callback CVWL568.lib(drv_dma.o) + 0x000154ea 0x000154ea 0x00000002 PAD + 0x000154ec 0x000154ec 0x00000044 Code RO 1273 i.drv_dma_set_transfer CVWL568.lib(drv_dma.o) + 0x00015530 0x00015530 0x00000036 Code RO 2326 i.drv_dsc_dec_convert_pps_rc_parameter CVWL568.lib(drv_dsc_dec.o) + 0x00015566 0x00015566 0x0000000c Code RO 2327 i.drv_dsc_dec_disable CVWL568.lib(drv_dsc_dec.o) + 0x00015572 0x00015572 0x00000002 PAD + 0x00015574 0x00015574 0x00000074 Code RO 2328 i.drv_dsc_dec_enable CVWL568.lib(drv_dsc_dec.o) + 0x000155e8 0x000155e8 0x0000000a Code RO 2329 i.drv_dsc_dec_get_nslc CVWL568.lib(drv_dsc_dec.o) + 0x000155f2 0x000155f2 0x00000028 Code RO 2331 i.drv_dsc_dec_set_u8_pps CVWL568.lib(drv_dsc_dec.o) + 0x0001561a 0x0001561a 0x00000002 PAD + 0x0001561c 0x0001561c 0x00000104 Code RO 1785 i.drv_dsi_rx_calc_ipi_tx_delay CVWL568.lib(drv_dsi_rx.o) + 0x00015720 0x00015720 0x00000040 Code RO 1786 i.drv_dsi_rx_enable_irq CVWL568.lib(drv_dsi_rx.o) + 0x00015760 0x00015760 0x00000050 Code RO 1787 i.drv_dsi_rx_get_color_bpp CVWL568.lib(drv_dsi_rx.o) + 0x000157b0 0x000157b0 0x0000001c Code RO 1788 i.drv_dsi_rx_get_color_pcc CVWL568.lib(drv_dsi_rx.o) + 0x000157cc 0x000157cc 0x00000008 Code RO 1789 i.drv_dsi_rx_get_compression_en CVWL568.lib(drv_dsi_rx.o) + 0x000157d4 0x000157d4 0x00000006 Code RO 1790 i.drv_dsi_rx_get_max_ret_size CVWL568.lib(drv_dsi_rx.o) + 0x000157da 0x000157da 0x0000000e Code RO 1794 i.drv_dsi_rx_power_up CVWL568.lib(drv_dsi_rx.o) + 0x000157e8 0x000157e8 0x00000020 Code RO 1795 i.drv_dsi_rx_set_ctrl_cfg CVWL568.lib(drv_dsi_rx.o) + 0x00015808 0x00015808 0x00000010 Code RO 1796 i.drv_dsi_rx_set_ddi_cfg CVWL568.lib(drv_dsi_rx.o) + 0x00015818 0x00015818 0x00000004 Code RO 1798 i.drv_dsi_rx_set_inten CVWL568.lib(drv_dsi_rx.o) + 0x0001581c 0x0001581c 0x00000010 Code RO 1799 i.drv_dsi_rx_set_ipi_cfg CVWL568.lib(drv_dsi_rx.o) + 0x0001582c 0x0001582c 0x00000046 Code RO 1801 i.drv_dsi_rx_set_lane_swap CVWL568.lib(drv_dsi_rx.o) + 0x00015872 0x00015872 0x00000026 Code RO 1802 i.drv_dsi_rx_set_resp_cnt CVWL568.lib(drv_dsi_rx.o) + 0x00015898 0x00015898 0x000000f0 Code RO 1803 i.drv_dsi_rx_set_up_phy CVWL568.lib(drv_dsi_rx.o) + 0x00015988 0x00015988 0x0000000e Code RO 1804 i.drv_dsi_rx_shut_down CVWL568.lib(drv_dsi_rx.o) + 0x00015996 0x00015996 0x00000014 Code RO 1842 i.drv_dsi_tx_command_header CVWL568.lib(drv_dsi_tx.o) + 0x000159aa 0x000159aa 0x0000006c Code RO 1843 i.drv_dsi_tx_command_mode_cfg CVWL568.lib(drv_dsi_tx.o) + 0x00015a16 0x00015a16 0x00000004 Code RO 1844 i.drv_dsi_tx_command_put_payload CVWL568.lib(drv_dsi_tx.o) + 0x00015a1a 0x00015a1a 0x00000018 Code RO 1845 i.drv_dsi_tx_config_eotp CVWL568.lib(drv_dsi_tx.o) + 0x00015a32 0x00015a32 0x00000008 Code RO 1846 i.drv_dsi_tx_config_int CVWL568.lib(drv_dsi_tx.o) + 0x00015a3a 0x00015a3a 0x00000008 Code RO 1847 i.drv_dsi_tx_dpi_lpcmd_time CVWL568.lib(drv_dsi_tx.o) + 0x00015a42 0x00015a42 0x0000000a Code RO 1848 i.drv_dsi_tx_dpi_mode CVWL568.lib(drv_dsi_tx.o) + 0x00015a4c 0x00015a4c 0x00000024 Code RO 1849 i.drv_dsi_tx_dpi_polarity CVWL568.lib(drv_dsi_tx.o) + 0x00015a70 0x00015a70 0x00000004 Code RO 1850 i.drv_dsi_tx_edpi_cmd_size CVWL568.lib(drv_dsi_tx.o) + 0x00015a74 0x00015a74 0x00000004 Code RO 1852 i.drv_dsi_tx_get_cmd_status CVWL568.lib(drv_dsi_tx.o) + 0x00015a78 0x00015a78 0x00000004 Code RO 1854 i.drv_dsi_tx_mode CVWL568.lib(drv_dsi_tx.o) + 0x00015a7c 0x00015a7c 0x00000018 Code RO 1855 i.drv_dsi_tx_phy_clock_lane_auto_lp CVWL568.lib(drv_dsi_tx.o) + 0x00015a94 0x00015a94 0x0000001a Code RO 1856 i.drv_dsi_tx_phy_clock_lane_req_hs CVWL568.lib(drv_dsi_tx.o) + 0x00015aae 0x00015aae 0x0000000c Code RO 1858 i.drv_dsi_tx_phy_lane_mode CVWL568.lib(drv_dsi_tx.o) + 0x00015aba 0x00015aba 0x00000064 Code RO 1862 i.drv_dsi_tx_phy_status_ready CVWL568.lib(drv_dsi_tx.o) + 0x00015b1e 0x00015b1e 0x0000003e Code RO 1863 i.drv_dsi_tx_phy_status_stopstate CVWL568.lib(drv_dsi_tx.o) + 0x00015b5c 0x00015b5c 0x0000010c Code RO 1865 i.drv_dsi_tx_phy_test_setup CVWL568.lib(drv_dsi_tx.o) + 0x00015c68 0x00015c68 0x0000001e Code RO 1866 i.drv_dsi_tx_phy_time_cfg CVWL568.lib(drv_dsi_tx.o) + 0x00015c86 0x00015c86 0x00000008 Code RO 1870 i.drv_dsi_tx_powerup CVWL568.lib(drv_dsi_tx.o) + 0x00015c8e 0x00015c8e 0x0000001c Code RO 1871 i.drv_dsi_tx_response_mode CVWL568.lib(drv_dsi_tx.o) + 0x00015caa 0x00015caa 0x00000018 Code RO 1874 i.drv_dsi_tx_set_bta_ack CVWL568.lib(drv_dsi_tx.o) + 0x00015cc2 0x00015cc2 0x0000000c Code RO 1875 i.drv_dsi_tx_set_esc_div CVWL568.lib(drv_dsi_tx.o) + 0x00015cce 0x00015cce 0x00000002 PAD + 0x00015cd0 0x00015cd0 0x00000034 Code RO 1876 i.drv_dsi_tx_set_int CVWL568.lib(drv_dsi_tx.o) + 0x00015d04 0x00015d04 0x00000010 Code RO 1877 i.drv_dsi_tx_set_time_out_div CVWL568.lib(drv_dsi_tx.o) + 0x00015d14 0x00015d14 0x00000008 Code RO 1878 i.drv_dsi_tx_set_video_chunk CVWL568.lib(drv_dsi_tx.o) + 0x00015d1c 0x00015d1c 0x00000022 Code RO 1879 i.drv_dsi_tx_set_video_timing CVWL568.lib(drv_dsi_tx.o) + 0x00015d3e 0x00015d3e 0x00000008 Code RO 1881 i.drv_dsi_tx_shutdown CVWL568.lib(drv_dsi_tx.o) + 0x00015d46 0x00015d46 0x00000026 Code RO 1882 i.drv_dsi_tx_timeout_cfg CVWL568.lib(drv_dsi_tx.o) + 0x00015d6c 0x00015d6c 0x000000aa Code RO 1885 i.drv_dsi_tx_video_mode_cfg CVWL568.lib(drv_dsi_tx.o) + 0x00015e16 0x00015e16 0x00000016 Code RO 1886 i.drv_dsi_tx_video_mode_disable_hact_cmd CVWL568.lib(drv_dsi_tx.o) + 0x00015e2c 0x00015e2c 0x00000018 Code RO 1887 i.drv_dsi_tx_video_mode_set_lp_cmd CVWL568.lib(drv_dsi_tx.o) + 0x00015e44 0x00015e44 0x00000020 Code RO 2607 i.drv_efuse_enter_inactive CVWL568.lib(drv_efuse.o) + 0x00015e64 0x00015e64 0x0000000c Code RO 2610 i.drv_efuse_int_enable CVWL568.lib(drv_efuse.o) + 0x00015e70 0x00015e70 0x00000032 Code RO 2611 i.drv_efuse_read CVWL568.lib(drv_efuse.o) + 0x00015ea2 0x00015ea2 0x00000018 Code RO 2612 i.drv_efuse_read_req CVWL568.lib(drv_efuse.o) + 0x00015eba 0x00015eba 0x00000002 PAD + 0x00015ebc 0x00015ebc 0x00000018 Code RO 1398 i.drv_gpio_get_input_data CVWL568.lib(drv_gpio.o) + 0x00015ed4 0x00015ed4 0x0000000c Code RO 1400 i.drv_gpio_register_ap_reset_callback CVWL568.lib(drv_gpio.o) + 0x00015ee0 0x00015ee0 0x00000014 Code RO 1401 i.drv_gpio_register_callback CVWL568.lib(drv_gpio.o) + 0x00015ef4 0x00015ef4 0x00000044 Code RO 1403 i.drv_gpio_set_int CVWL568.lib(drv_gpio.o) + 0x00015f38 0x00015f38 0x00000020 Code RO 1404 i.drv_gpio_set_ioe CVWL568.lib(drv_gpio.o) + 0x00015f58 0x00015f58 0x00000010 Code RO 1405 i.drv_gpio_set_mode0 CVWL568.lib(drv_gpio.o) + 0x00015f68 0x00015f68 0x00000010 Code RO 1406 i.drv_gpio_set_mode1 CVWL568.lib(drv_gpio.o) + 0x00015f78 0x00015f78 0x00000010 Code RO 1407 i.drv_gpio_set_mode2 CVWL568.lib(drv_gpio.o) + 0x00015f88 0x00015f88 0x00000010 Code RO 1408 i.drv_gpio_set_mode3 CVWL568.lib(drv_gpio.o) + 0x00015f98 0x00015f98 0x00000020 Code RO 721 i.drv_gpio_set_output_data CVWL568.lib(hal_gpio.o) + 0x00015fb8 0x00015fb8 0x00000130 Code RO 1409 i.drv_gpio_set_pull_state CVWL568.lib(drv_gpio.o) + 0x000160e8 0x000160e8 0x00000034 Code RO 1441 i.drv_i2c_dma_callback CVWL568.lib(drv_i2c_dma.o) + 0x0001611c 0x0001611c 0x000000ac Code RO 1442 i.drv_i2c_dma_init CVWL568.lib(drv_i2c_dma.o) + 0x000161c8 0x000161c8 0x0000001a Code RO 1443 i.drv_i2c_enable_rx_dma CVWL568.lib(drv_i2c_dma.o) + 0x000161e2 0x000161e2 0x00000018 Code RO 1444 i.drv_i2c_enable_tx_dma CVWL568.lib(drv_i2c_dma.o) + 0x000161fa 0x000161fa 0x00000002 PAD + 0x000161fc 0x000161fc 0x00000060 Code RO 1468 i.drv_i2c_m_clear_it_pending_bit CVWL568.lib(drv_i2c_master.o) + 0x0001625c 0x0001625c 0x00000010 Code RO 1470 i.drv_i2c_m_enable CVWL568.lib(drv_i2c_master.o) + 0x0001626c 0x0001626c 0x00000038 Code RO 1471 i.drv_i2c_m_enable_intr CVWL568.lib(drv_i2c_master.o) + 0x000162a4 0x000162a4 0x0000000c Code RO 1474 i.drv_i2c_m_set_callback CVWL568.lib(drv_i2c_master.o) + 0x000162b0 0x000162b0 0x0000008c Code RO 1478 i.drv_i2c_master_init CVWL568.lib(drv_i2c_master.o) + 0x0001633c 0x0001633c 0x0000005c Code RO 1445 i.drv_i2c_master_read_dma CVWL568.lib(drv_i2c_dma.o) + 0x00016398 0x00016398 0x0000003c Code RO 1446 i.drv_i2c_master_write_dma CVWL568.lib(drv_i2c_dma.o) + 0x000163d4 0x000163d4 0x0000002e Code RO 1447 i.drv_i2c_master_write_read_cmd CVWL568.lib(drv_i2c_dma.o) + 0x00016402 0x00016402 0x00000002 PAD + 0x00016404 0x00016404 0x0000005c Code RO 1501 i.drv_i2c_s_clear_it_pending_bit CVWL568.lib(drv_i2c_slave.o) + 0x00016460 0x00016460 0x00000034 Code RO 1504 i.drv_i2c_s_enable_intr CVWL568.lib(drv_i2c_slave.o) + 0x00016494 0x00016494 0x0000001c Code RO 1505 i.drv_i2c_s_get_fifo_status CVWL568.lib(drv_i2c_slave.o) + 0x000164b0 0x000164b0 0x0000000c Code RO 1508 i.drv_i2c_s_set_callback CVWL568.lib(drv_i2c_slave.o) + 0x000164bc 0x000164bc 0x00000020 Code RO 1511 i.drv_i2c_s_write_data CVWL568.lib(drv_i2c_slave.o) + 0x000164dc 0x000164dc 0x00000058 Code RO 1448 i.drv_i2c_set_dma_irq_callback CVWL568.lib(drv_i2c_dma.o) + 0x00016534 0x00016534 0x00000044 Code RO 1512 i.drv_i2c_slave_init CVWL568.lib(drv_i2c_slave.o) + 0x00016578 0x00016578 0x0000001c Code RO 1449 i.drv_i2c_slave_write_dma CVWL568.lib(drv_i2c_dma.o) + 0x00016594 0x00016594 0x00000018 Code RO 1954 i.drv_lcdc_config_bypass CVWL568.lib(drv_lcdc.o) + 0x000165ac 0x000165ac 0x00000030 Code RO 1955 i.drv_lcdc_config_ccm CVWL568.lib(drv_lcdc.o) + 0x000165dc 0x000165dc 0x00000016 Code RO 1956 i.drv_lcdc_config_disp_mode CVWL568.lib(drv_lcdc.o) + 0x000165f2 0x000165f2 0x00000024 Code RO 1957 i.drv_lcdc_config_dpi_polarity CVWL568.lib(drv_lcdc.o) + 0x00016616 0x00016616 0x00000026 Code RO 1958 i.drv_lcdc_config_dpi_timing CVWL568.lib(drv_lcdc.o) + 0x0001663c 0x0001663c 0x00000016 Code RO 1959 i.drv_lcdc_config_edpi_mode CVWL568.lib(drv_lcdc.o) + 0x00016652 0x00016652 0x00000016 Code RO 1960 i.drv_lcdc_config_endianness CVWL568.lib(drv_lcdc.o) + 0x00016668 0x00016668 0x0000000c Code RO 1961 i.drv_lcdc_config_input_size CVWL568.lib(drv_lcdc.o) + 0x00016674 0x00016674 0x0000001e Code RO 1962 i.drv_lcdc_config_int CVWL568.lib(drv_lcdc.o) + 0x00016692 0x00016692 0x00000022 Code RO 1963 i.drv_lcdc_config_int_single CVWL568.lib(drv_lcdc.o) + 0x000166b4 0x000166b4 0x00000022 Code RO 1964 i.drv_lcdc_config_overwrite CVWL568.lib(drv_lcdc.o) + 0x000166d6 0x000166d6 0x0000000c Code RO 1965 i.drv_lcdc_config_overwrite_rgb CVWL568.lib(drv_lcdc.o) + 0x000166e2 0x000166e2 0x0000001a Code RO 1966 i.drv_lcdc_config_partial_display_area CVWL568.lib(drv_lcdc.o) + 0x000166fc 0x000166fc 0x00000022 Code RO 1967 i.drv_lcdc_config_partial_display_enable CVWL568.lib(drv_lcdc.o) + 0x0001671e 0x0001671e 0x0000001a Code RO 1969 i.drv_lcdc_config_scale_up_coef CVWL568.lib(drv_lcdc.o) + 0x00016738 0x00016738 0x0000000c Code RO 1970 i.drv_lcdc_config_scale_up_step CVWL568.lib(drv_lcdc.o) + 0x00016744 0x00016744 0x0000004c Code RO 1971 i.drv_lcdc_config_src_parameter CVWL568.lib(drv_lcdc.o) + 0x00016790 0x00016790 0x00000006 Code RO 1972 i.drv_lcdc_config_thresh CVWL568.lib(drv_lcdc.o) + 0x00016796 0x00016796 0x00000012 Code RO 1973 i.drv_lcdc_ctrl_flow CVWL568.lib(drv_lcdc.o) + 0x000167a8 0x000167a8 0x00000020 Code RO 1975 i.drv_lcdc_enable_shadow_reg CVWL568.lib(drv_lcdc.o) + 0x000167c8 0x000167c8 0x00000034 Code RO 1976 i.drv_lcdc_set_int CVWL568.lib(drv_lcdc.o) + 0x000167fc 0x000167fc 0x00000014 Code RO 1978 i.drv_lcdc_set_video_hw_mode CVWL568.lib(drv_lcdc.o) + 0x00016810 0x00016810 0x00000020 Code RO 1979 i.drv_lcdc_start CVWL568.lib(drv_lcdc.o) + 0x00016830 0x00016830 0x0000000c Code RO 2013 i.drv_memc_clear_status CVWL568.lib(drv_memc.o) + 0x0001683c 0x0001683c 0x00000040 Code RO 2014 i.drv_memc_enable_irq CVWL568.lib(drv_memc.o) + 0x0001687c 0x0001687c 0x0000000c Code RO 2015 i.drv_memc_gen_a_tear_signal CVWL568.lib(drv_memc.o) + 0x00016888 0x00016888 0x00000012 Code RO 2016 i.drv_memc_get_status CVWL568.lib(drv_memc.o) + 0x0001689a 0x0001689a 0x00000010 Code RO 2017 i.drv_memc_rate_transfer_sel CVWL568.lib(drv_memc.o) + 0x000168aa 0x000168aa 0x0000000e Code RO 2018 i.drv_memc_sel_vsync CVWL568.lib(drv_memc.o) + 0x000168b8 0x000168b8 0x00000014 Code RO 2019 i.drv_memc_set_active_height CVWL568.lib(drv_memc.o) + 0x000168cc 0x000168cc 0x0000000c Code RO 2020 i.drv_memc_set_data_mode CVWL568.lib(drv_memc.o) + 0x000168d8 0x000168d8 0x00000010 Code RO 2023 i.drv_memc_set_double_buffer CVWL568.lib(drv_memc.o) + 0x000168e8 0x000168e8 0x00000012 Code RO 2024 i.drv_memc_set_double_buffer_reverse CVWL568.lib(drv_memc.o) + 0x000168fa 0x000168fa 0x00000010 Code RO 2026 i.drv_memc_set_fs_en_conditions CVWL568.lib(drv_memc.o) + 0x0001690a 0x0001690a 0x00000014 Code RO 2027 i.drv_memc_set_inten CVWL568.lib(drv_memc.o) + 0x0001691e 0x0001691e 0x00000002 PAD + 0x00016920 0x00016920 0x00000018 Code RO 2028 i.drv_memc_set_lcdc_st_conditions CVWL568.lib(drv_memc.o) + 0x00016938 0x00016938 0x0000001a Code RO 2029 i.drv_memc_set_ltpo_mode CVWL568.lib(drv_memc.o) + 0x00016952 0x00016952 0x0000000e Code RO 2033 i.drv_memc_set_tear_mode CVWL568.lib(drv_memc.o) + 0x00016960 0x00016960 0x00000028 Code RO 2034 i.drv_memc_set_tear_waveform CVWL568.lib(drv_memc.o) + 0x00016988 0x00016988 0x0000000e Code RO 2036 i.drv_memc_set_vidc_sync_cnt CVWL568.lib(drv_memc.o) + 0x00016996 0x00016996 0x00000002 PAD + 0x00016998 0x00016998 0x00000008 Code RO 1533 i.drv_param_init_get_ccm CVWL568.lib(drv_param_init.o) + 0x000169a0 0x000169a0 0x00000014 Code RO 1534 i.drv_param_init_get_scld_filter_h CVWL568.lib(drv_param_init.o) + 0x000169b4 0x000169b4 0x00000014 Code RO 1535 i.drv_param_init_get_scld_filter_v CVWL568.lib(drv_param_init.o) + 0x000169c8 0x000169c8 0x00000008 Code RO 1536 i.drv_param_init_get_sclu_filter CVWL568.lib(drv_param_init.o) + 0x000169d0 0x000169d0 0x00000014 Code RO 1537 i.drv_param_init_set_ccm CVWL568.lib(drv_param_init.o) + 0x000169e4 0x000169e4 0x00000064 Code RO 1538 i.drv_param_init_set_scld_filter CVWL568.lib(drv_param_init.o) + 0x00016a48 0x00016a48 0x00000024 Code RO 1540 i.drv_param_p2r_filter_init CVWL568.lib(drv_param_init.o) + 0x00016a6c 0x00016a6c 0x00000010 Code RO 2285 i.drv_phy_enable_calibration CVWL568.lib(drv_phy_common.o) + 0x00016a7c 0x00016a7c 0x0000003c Code RO 2286 i.drv_phy_get_calibration CVWL568.lib(drv_phy_common.o) + 0x00016ab8 0x00016ab8 0x00000060 Code RO 2287 i.drv_phy_get_pll_para CVWL568.lib(drv_phy_common.o) + 0x00016b18 0x00016b18 0x00000054 Code RO 2288 i.drv_phy_get_rate_para CVWL568.lib(drv_phy_common.o) + 0x00016b6c 0x00016b6c 0x00000010 Code RO 2289 i.drv_phy_test_clear CVWL568.lib(drv_phy_common.o) + 0x00016b7c 0x00016b7c 0x00000018 Code RO 2290 i.drv_phy_test_lock CVWL568.lib(drv_phy_common.o) + 0x00016b94 0x00016b94 0x00000020 Code RO 2292 i.drv_phy_test_write_1_byte CVWL568.lib(drv_phy_common.o) + 0x00016bb4 0x00016bb4 0x00000026 Code RO 2293 i.drv_phy_test_write_2_byte CVWL568.lib(drv_phy_common.o) + 0x00016bda 0x00016bda 0x0000001e Code RO 2294 i.drv_phy_test_write_code CVWL568.lib(drv_phy_common.o) + 0x00016bf8 0x00016bf8 0x00000020 Code RO 2295 i.drv_phy_test_write_data CVWL568.lib(drv_phy_common.o) + 0x00016c18 0x00016c18 0x00000020 Code RO 1556 i.drv_pwr_set_cp_mode CVWL568.lib(drv_pwr.o) + 0x00016c38 0x00016c38 0x00000018 Code RO 1557 i.drv_pwr_set_pvd_mode CVWL568.lib(drv_pwr.o) + 0x00016c50 0x00016c50 0x00000030 Code RO 1558 i.drv_pwr_set_system_clk_src CVWL568.lib(drv_pwr.o) + 0x00016c80 0x00016c80 0x0000000c Code RO 1805 i.drv_rx_phy_test_clear CVWL568.lib(drv_dsi_rx.o) + 0x00016c8c 0x00016c8c 0x00000010 Code RO 1806 i.drv_rx_phy_test_lock CVWL568.lib(drv_dsi_rx.o) + 0x00016c9c 0x00016c9c 0x00000014 Code RO 1808 i.drv_rx_phy_test_write_1_byte CVWL568.lib(drv_dsi_rx.o) + 0x00016cb0 0x00016cb0 0x00000016 Code RO 1809 i.drv_rx_phy_test_write_2_byte CVWL568.lib(drv_dsi_rx.o) + 0x00016cc6 0x00016cc6 0x0000000a Code RO 2072 i.drv_rxbr_clear_pkt_buffer CVWL568.lib(drv_rxbr.o) + 0x00016cd0 0x00016cd0 0x00000004 Code RO 2073 i.drv_rxbr_clear_status0 CVWL568.lib(drv_rxbr.o) + 0x00016cd4 0x00016cd4 0x0000005a Code RO 2075 i.drv_rxbr_enable_irq CVWL568.lib(drv_rxbr.o) + 0x00016d2e 0x00016d2e 0x00000002 PAD + 0x00016d30 0x00016d30 0x00000014 Code RO 2076 i.drv_rxbr_frame_drop_cfg CVWL568.lib(drv_rxbr.o) + 0x00016d44 0x00016d44 0x0000003c Code RO 2077 i.drv_rxbr_get_clk CVWL568.lib(drv_rxbr.o) + 0x00016d80 0x00016d80 0x00000004 Code RO 2078 i.drv_rxbr_get_col_addr CVWL568.lib(drv_rxbr.o) + 0x00016d84 0x00016d84 0x00000012 Code RO 1703 i.drv_rxbr_get_int_source CVWL568.lib(hal_internal_vsync.o) + 0x00016d96 0x00016d96 0x00000004 Code RO 2081 i.drv_rxbr_get_page_addr CVWL568.lib(drv_rxbr.o) + 0x00016d9a 0x00016d9a 0x00000012 Code RO 1704 i.drv_rxbr_get_status0 CVWL568.lib(hal_internal_vsync.o) + 0x00016dac 0x00016dac 0x0000000c Code RO 2083 i.drv_rxbr_hline_rcv0_cfg CVWL568.lib(drv_rxbr.o) + 0x00016db8 0x00016db8 0x00000008 Code RO 2084 i.drv_rxbr_hline_rcv_cfg CVWL568.lib(drv_rxbr.o) + 0x00016dc0 0x00016dc0 0x0000000c Code RO 2085 i.drv_rxbr_register_irq0_callback CVWL568.lib(drv_rxbr.o) + 0x00016dcc 0x00016dcc 0x0000000c Code RO 2086 i.drv_rxbr_register_irq1_callback CVWL568.lib(drv_rxbr.o) + 0x00016dd8 0x00016dd8 0x00000014 Code RO 2087 i.drv_rxbr_set_ack_pkt_header CVWL568.lib(drv_rxbr.o) + 0x00016dec 0x00016dec 0x000000cc Code RO 2088 i.drv_rxbr_set_cmd_filter CVWL568.lib(drv_rxbr.o) + 0x00016eb8 0x00016eb8 0x00000014 Code RO 2090 i.drv_rxbr_set_color_format CVWL568.lib(drv_rxbr.o) + 0x00016ecc 0x00016ecc 0x00000014 Code RO 2092 i.drv_rxbr_set_inten CVWL568.lib(drv_rxbr.o) + 0x00016ee0 0x00016ee0 0x00000010 Code RO 2093 i.drv_rxbr_set_ltpo_drop_th CVWL568.lib(drv_rxbr.o) + 0x00016ef0 0x00016ef0 0x00000026 Code RO 2095 i.drv_rxbr_set_usr_cfg CVWL568.lib(drv_rxbr.o) + 0x00016f16 0x00016f16 0x00000008 Code RO 2096 i.drv_rxbr_set_usr_col CVWL568.lib(drv_rxbr.o) + 0x00016f1e 0x00016f1e 0x00000008 Code RO 2097 i.drv_rxbr_set_usr_row CVWL568.lib(drv_rxbr.o) + 0x00016f26 0x00016f26 0x00000002 PAD + 0x00016f28 0x00016f28 0x00000020 Code RO 1602 i.drv_spi_m_read_data CVWL568.lib(drv_spi_master.o) + 0x00016f48 0x00016f48 0x00000048 Code RO 2479 i.drv_swire_set_int CVWL568.lib(drv_swire.o) + 0x00016f90 0x00016f90 0x0000000c Code RO 1627 i.drv_sys_cfg_clear_all_int CVWL568.lib(drv_sys_cfg.o) + 0x00016f9c 0x00016f9c 0x00000028 Code RO 1628 i.drv_sys_cfg_clear_pending CVWL568.lib(drv_sys_cfg.o) + 0x00016fc4 0x00016fc4 0x00000018 Code RO 1631 i.drv_sys_cfg_sel_ap_rst_lvl_trig CVWL568.lib(drv_sys_cfg.o) + 0x00016fdc 0x00016fdc 0x0000001c Code RO 1632 i.drv_sys_cfg_sel_ap_rst_trig CVWL568.lib(drv_sys_cfg.o) + 0x00016ff8 0x00016ff8 0x00000024 Code RO 1633 i.drv_sys_cfg_sel_gpio_group CVWL568.lib(drv_sys_cfg.o) + 0x0001701c 0x0001701c 0x00000024 Code RO 1634 i.drv_sys_cfg_sel_int_trig CVWL568.lib(drv_sys_cfg.o) + 0x00017040 0x00017040 0x00000010 Code RO 1636 i.drv_sys_cfg_set_dma_rx_req CVWL568.lib(drv_sys_cfg.o) + 0x00017050 0x00017050 0x00000010 Code RO 1637 i.drv_sys_cfg_set_dma_tx_req CVWL568.lib(drv_sys_cfg.o) + 0x00017060 0x00017060 0x00000024 Code RO 1638 i.drv_sys_cfg_set_int CVWL568.lib(drv_sys_cfg.o) + 0x00017084 0x00017084 0x0000001a Code RO 1662 i.drv_timer_clear_status_flags CVWL568.lib(drv_timer.o) + 0x0001709e 0x0001709e 0x00000020 Code RO 1663 i.drv_timer_enable CVWL568.lib(drv_timer.o) + 0x000170be 0x000170be 0x00000002 PAD + 0x000170c0 0x000170c0 0x00000010 Code RO 1665 i.drv_timer_get_instance CVWL568.lib(drv_timer.o) + 0x000170d0 0x000170d0 0x0000000e Code RO 1667 i.drv_timer_get_prescaler CVWL568.lib(drv_timer.o) + 0x000170de 0x000170de 0x00000002 PAD + 0x000170e0 0x000170e0 0x00000044 Code RO 1668 i.drv_timer_handle_interrupt CVWL568.lib(drv_timer.o) + 0x00017124 0x00017124 0x00000014 Code RO 1669 i.drv_timer_register_callback CVWL568.lib(drv_timer.o) + 0x00017138 0x00017138 0x0000000c Code RO 1670 i.drv_timer_set_current_count CVWL568.lib(drv_timer.o) + 0x00017144 0x00017144 0x00000048 Code RO 1671 i.drv_timer_set_int CVWL568.lib(drv_timer.o) + 0x0001718c 0x0001718c 0x0000000c Code RO 1672 i.drv_timer_set_match CVWL568.lib(drv_timer.o) + 0x00017198 0x00017198 0x00000016 Code RO 1673 i.drv_timer_set_prescaler CVWL568.lib(drv_timer.o) + 0x000171ae 0x000171ae 0x0000000a Code RO 1888 i.drv_tx_phy_test_clear CVWL568.lib(drv_dsi_tx.o) + 0x000171b8 0x000171b8 0x0000001c Code RO 1889 i.drv_tx_phy_test_enter CVWL568.lib(drv_dsi_tx.o) + 0x000171d4 0x000171d4 0x0000001c Code RO 1890 i.drv_tx_phy_test_exit CVWL568.lib(drv_dsi_tx.o) + 0x000171f0 0x000171f0 0x00000012 Code RO 1892 i.drv_tx_phy_test_write_1_byte CVWL568.lib(drv_dsi_tx.o) + 0x00017202 0x00017202 0x00000014 Code RO 1893 i.drv_tx_phy_test_write_2_byte CVWL568.lib(drv_dsi_tx.o) + 0x00017216 0x00017216 0x00000010 Code RO 1894 i.drv_tx_phy_test_write_code CVWL568.lib(drv_dsi_tx.o) + 0x00017226 0x00017226 0x00000008 Code RO 2136 i.drv_vidc_clear_irq CVWL568.lib(drv_vidc.o) + 0x0001722e 0x0001722e 0x00000018 Code RO 2140 i.drv_vidc_enable CVWL568.lib(drv_vidc.o) + 0x00017246 0x00017246 0x00000002 PAD + 0x00017248 0x00017248 0x00000040 Code RO 2141 i.drv_vidc_enable_irq CVWL568.lib(drv_vidc.o) + 0x00017288 0x00017288 0x00000012 Code RO 2143 i.drv_vidc_get_irq_status CVWL568.lib(drv_vidc.o) + 0x0001729a 0x0001729a 0x00000002 PAD + 0x0001729c 0x0001729c 0x00000028 Code RO 2147 i.drv_vidc_init_module_enable CVWL568.lib(drv_vidc.o) + 0x000172c4 0x000172c4 0x0000000c Code RO 2148 i.drv_vidc_register_callback CVWL568.lib(drv_vidc.o) + 0x000172d0 0x000172d0 0x00000006 Code RO 2149 i.drv_vidc_reset CVWL568.lib(drv_vidc.o) + 0x000172d6 0x000172d6 0x0000003c Code RO 2151 i.drv_vidc_set_dst_parameter CVWL568.lib(drv_vidc.o) + 0x00017312 0x00017312 0x00000014 Code RO 2155 i.drv_vidc_set_irqen CVWL568.lib(drv_vidc.o) + 0x00017326 0x00017326 0x00000010 Code RO 2156 i.drv_vidc_set_mirror CVWL568.lib(drv_vidc.o) + 0x00017336 0x00017336 0x00000008 Code RO 2159 i.drv_vidc_set_p2r_hcoef0 CVWL568.lib(drv_vidc.o) + 0x0001733e 0x0001733e 0x00000026 Code RO 2160 i.drv_vidc_set_p2r_hinitb CVWL568.lib(drv_vidc.o) + 0x00017364 0x00017364 0x00000026 Code RO 2161 i.drv_vidc_set_p2r_hinitr CVWL568.lib(drv_vidc.o) + 0x0001738a 0x0001738a 0x00000002 PAD + 0x0001738c 0x0001738c 0x00000018 Code RO 2162 i.drv_vidc_set_pentile_swap CVWL568.lib(drv_vidc.o) + 0x000173a4 0x000173a4 0x0000000a Code RO 2163 i.drv_vidc_set_pu_ctrl CVWL568.lib(drv_vidc.o) + 0x000173ae 0x000173ae 0x00000010 Code RO 2164 i.drv_vidc_set_rotation CVWL568.lib(drv_vidc.o) + 0x000173be 0x000173be 0x0000000a Code RO 2165 i.drv_vidc_set_scld_hcoef0 CVWL568.lib(drv_vidc.o) + 0x000173c8 0x000173c8 0x0000000a Code RO 2166 i.drv_vidc_set_scld_hcoef1 CVWL568.lib(drv_vidc.o) + 0x000173d2 0x000173d2 0x00000012 Code RO 2167 i.drv_vidc_set_scld_step CVWL568.lib(drv_vidc.o) + 0x000173e4 0x000173e4 0x0000000a Code RO 2168 i.drv_vidc_set_scld_vcoef0 CVWL568.lib(drv_vidc.o) + 0x000173ee 0x000173ee 0x0000000a Code RO 2169 i.drv_vidc_set_scld_vcoef1 CVWL568.lib(drv_vidc.o) + 0x000173f8 0x000173f8 0x00000016 Code RO 2170 i.drv_vidc_set_src_parameter CVWL568.lib(drv_vidc.o) + 0x0001740e 0x0001740e 0x00000002 PAD + 0x00017410 0x00017410 0x00000010 Code RO 2582 i.drv_wdg_clear_counter CVWL568.lib(drv_wdg.o) + 0x00017420 0x00017420 0x00000010 Code RO 2583 i.drv_wdg_clear_edge_flag CVWL568.lib(drv_wdg.o) + 0x00017430 0x00017430 0x00000010 Code RO 2586 i.drv_wdg_read_edge_flag CVWL568.lib(drv_wdg.o) + 0x00017440 0x00017440 0x00000034 Code RO 2589 i.drv_wdg_set_int CVWL568.lib(drv_wdg.o) + 0x00017474 0x00017474 0x0000000a Code RO 1310 i.fls_clr_interrupt_flag CVWL568.lib(drv_fls.o) + 0x0001747e 0x0001747e 0x00000014 Code RO 897 i.fputc CVWL568.lib(tau_log.o) + 0x00017492 0x00017492 0x00000002 PAD + 0x00017494 0x00017494 0x0000005c Code RO 111 i.frame_start_cb ap_demo.o + 0x000174f0 0x000174f0 0x00000030 Code RO 540 i.hal_dsi_rx_ctrl_create_handle CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00017520 0x00017520 0x0000009c Code RO 542 i.hal_dsi_rx_ctrl_deinit CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x000175bc 0x000175bc 0x00000084 Code RO 544 i.hal_dsi_rx_ctrl_dsc_async_handler CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00017640 0x00017640 0x00000028 Code RO 546 i.hal_dsi_rx_ctrl_gen_a_tear_signal CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00017668 0x00017668 0x00000028 Code RO 548 i.hal_dsi_rx_ctrl_get_max_ret_size CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00017690 0x00017690 0x00000098 Code RO 550 i.hal_dsi_rx_ctrl_init CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00017728 0x00017728 0x00000130 Code RO 551 i.hal_dsi_rx_ctrl_init_clk CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00017858 0x00017858 0x000000d4 Code RO 552 i.hal_dsi_rx_ctrl_init_dsi_rx CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x0001792c 0x0001792c 0x0000013c Code RO 553 i.hal_dsi_rx_ctrl_init_memc CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00017a68 0x00017a68 0x00000130 Code RO 554 i.hal_dsi_rx_ctrl_init_rxbr CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00017b98 0x00017b98 0x0000022c Code RO 555 i.hal_dsi_rx_ctrl_init_vidc CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00017dc4 0x00017dc4 0x0000003c Code RO 556 i.hal_dsi_rx_ctrl_pre_init_pps CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00017e00 0x00017e00 0x000000f0 Code RO 559 i.hal_dsi_rx_ctrl_send_ack_cmd CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00017ef0 0x00017ef0 0x0000002c Code RO 561 i.hal_dsi_rx_ctrl_set_cus_esc_clk CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00017f1c 0x00017f1c 0x0000006c Code RO 562 i.hal_dsi_rx_ctrl_set_cus_scld_filter CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00017f88 0x00017f88 0x00000034 Code RO 563 i.hal_dsi_rx_ctrl_set_cus_sync_line CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00017fbc 0x00017fbc 0x00000038 Code RO 567 i.hal_dsi_rx_ctrl_set_ipi_cfg CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00017ff4 0x00017ff4 0x00000072 Code RO 571 i.hal_dsi_rx_ctrl_set_rxbr_clk CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00018066 0x00018066 0x00000002 PAD + 0x00018068 0x00018068 0x00000034 Code RO 572 i.hal_dsi_rx_ctrl_set_sw_tear_mode CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x0001809c 0x0001809c 0x0000000e Code RO 574 i.hal_dsi_rx_ctrl_set_tear_mode_ex CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x000180aa 0x000180aa 0x00000002 PAD + 0x000180ac 0x000180ac 0x0000003c Code RO 575 i.hal_dsi_rx_ctrl_start CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x000180e8 0x000180e8 0x0000003c Code RO 576 i.hal_dsi_rx_ctrl_stop CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00018124 0x00018124 0x00000020 Code RO 578 i.hal_dsi_rx_ctrl_toggle_resolution CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00018144 0x00018144 0x00000190 Code RO 629 i.hal_dsi_tx_calc_video_chunks CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x000182d4 0x000182d4 0x00000034 Code RO 630 i.hal_dsi_tx_config_params_for_lane_rate CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018308 0x00018308 0x000004d0 Code RO 631 i.hal_dsi_tx_count_lane_rate CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x000187d8 0x000187d8 0x0000002c Code RO 633 i.hal_dsi_tx_ctrl_create_handle CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018804 0x00018804 0x00000048 Code RO 634 i.hal_dsi_tx_ctrl_deinit CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x0001884c 0x0001884c 0x0000004c Code RO 635 i.hal_dsi_tx_ctrl_enter_init_panel_mode CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018898 0x00018898 0x00000028 Code RO 637 i.hal_dsi_tx_ctrl_exit_init_panel_mode CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x000188c0 0x000188c0 0x000000c4 Code RO 639 i.hal_dsi_tx_ctrl_init CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018984 0x00018984 0x00000024 Code RO 640 i.hal_dsi_tx_ctrl_init_clk CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x000189a8 0x000189a8 0x0000000c Code RO 641 i.hal_dsi_tx_ctrl_panel_reset_pin CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x000189b4 0x000189b4 0x00000020 Code RO 644 i.hal_dsi_tx_ctrl_set_ccm CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x000189d4 0x000189d4 0x00000014 Code RO 650 i.hal_dsi_tx_ctrl_set_overwrite_rgb CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x000189e8 0x000189e8 0x00000010 Code RO 651 i.hal_dsi_tx_ctrl_set_partial_disp CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x000189f8 0x000189f8 0x00000024 Code RO 652 i.hal_dsi_tx_ctrl_set_partial_disp_area CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018a1c 0x00018a1c 0x0000006c Code RO 654 i.hal_dsi_tx_ctrl_start CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018a88 0x00018a88 0x00000044 Code RO 655 i.hal_dsi_tx_ctrl_stop CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018acc 0x00018acc 0x000000d8 Code RO 656 i.hal_dsi_tx_ctrl_write_array_cmd CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018ba4 0x00018ba4 0x000000b0 Code RO 657 i.hal_dsi_tx_ctrl_write_cmd CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018c54 0x00018c54 0x00000044 Code RO 658 i.hal_dsi_tx_init_data_mode CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018c98 0x00018c98 0x00000030 Code RO 659 i.hal_dsi_tx_init_dpi_cfg CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018cc8 0x00018cc8 0x00000020 Code RO 660 i.hal_dsi_tx_init_interrupt CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018ce8 0x00018ce8 0x00000020 Code RO 661 i.hal_dsi_tx_init_phy_cfg CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018d08 0x00018d08 0x00000094 Code RO 662 i.hal_dsi_tx_init_remains CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018d9c 0x00018d9c 0x00000058 Code RO 663 i.hal_dsi_tx_init_video_mode CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018df4 0x00018df4 0x00000044 Code RO 664 i.hal_dsi_tx_send_cmd CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018e38 0x00018e38 0x00000018 Code RO 722 i.hal_gpio_ctrl_eint CVWL568.lib(hal_gpio.o) + 0x00018e50 0x00018e50 0x00000012 Code RO 723 i.hal_gpio_get_input_data CVWL568.lib(hal_gpio.o) + 0x00018e62 0x00018e62 0x00000002 PAD + 0x00018e64 0x00018e64 0x00000040 Code RO 726 i.hal_gpio_init_eint CVWL568.lib(hal_gpio.o) + 0x00018ea4 0x00018ea4 0x00000020 Code RO 727 i.hal_gpio_init_input CVWL568.lib(hal_gpio.o) + 0x00018ec4 0x00018ec4 0x00000028 Code RO 728 i.hal_gpio_init_output CVWL568.lib(hal_gpio.o) + 0x00018eec 0x00018eec 0x00000018 Code RO 729 i.hal_gpio_reg_eint_cb CVWL568.lib(hal_gpio.o) + 0x00018f04 0x00018f04 0x00000050 Code RO 730 i.hal_gpio_set_ap_reset_int CVWL568.lib(hal_gpio.o) + 0x00018f54 0x00018f54 0x00000060 Code RO 732 i.hal_gpio_set_mode CVWL568.lib(hal_gpio.o) + 0x00018fb4 0x00018fb4 0x00000008 Code RO 733 i.hal_gpio_set_output_data CVWL568.lib(hal_gpio.o) + 0x00018fbc 0x00018fbc 0x00000020 Code RO 735 i.hal_gpio_set_pull_state CVWL568.lib(hal_gpio.o) + 0x00018fdc 0x00018fdc 0x0000006c Code RO 760 i.hal_i2c_m_dma_init CVWL568.lib(hal_i2c_master.o) + 0x00019048 0x00019048 0x00000020 Code RO 761 i.hal_i2c_m_dma_read CVWL568.lib(hal_i2c_master.o) + 0x00019068 0x00019068 0x0000001c Code RO 762 i.hal_i2c_m_dma_write CVWL568.lib(hal_i2c_master.o) + 0x00019084 0x00019084 0x0000000c Code RO 764 i.hal_i2c_m_transfer_complate CVWL568.lib(hal_i2c_master.o) + 0x00019090 0x00019090 0x00000020 Code RO 765 i.hal_i2c_master_irq_callback CVWL568.lib(hal_i2c_master.o) + 0x000190b0 0x000190b0 0x00000010 Code RO 777 i.hal_i2c_s_dma_user_callback CVWL568.lib(hal_i2c_slave.o) + 0x000190c0 0x000190c0 0x00000038 Code RO 778 i.hal_i2c_s_dma_write CVWL568.lib(hal_i2c_slave.o) + 0x000190f8 0x000190f8 0x0000006c Code RO 780 i.hal_i2c_s_init CVWL568.lib(hal_i2c_slave.o) + 0x00019164 0x00019164 0x00000014 Code RO 781 i.hal_i2c_s_nonblocking_read CVWL568.lib(hal_i2c_slave.o) + 0x00019178 0x00019178 0x0000000c Code RO 788 i.hal_i2c_s_set_transfer CVWL568.lib(hal_i2c_slave.o) + 0x00019184 0x00019184 0x0000014c Code RO 791 i.hal_i2c_slave_irq_callback CVWL568.lib(hal_i2c_slave.o) + 0x000192d0 0x000192d0 0x000000e4 Code RO 1706 i.hal_internal_init_memc CVWL568.lib(hal_internal_vsync.o) + 0x000193b4 0x000193b4 0x00000010 Code RO 1707 i.hal_internal_sync_get_fb_setting CVWL568.lib(hal_internal_vsync.o) + 0x000193c4 0x000193c4 0x00000214 Code RO 1708 i.hal_internal_sync_input_resolution_change CVWL568.lib(hal_internal_vsync.o) + 0x000195d8 0x000195d8 0x0000001c Code RO 1710 i.hal_internal_vsync_deinit CVWL568.lib(hal_internal_vsync.o) + 0x000195f4 0x000195f4 0x0000000c Code RO 1711 i.hal_internal_vsync_get_rx_state CVWL568.lib(hal_internal_vsync.o) + 0x00019600 0x00019600 0x00000018 Code RO 1712 i.hal_internal_vsync_get_sync_line CVWL568.lib(hal_internal_vsync.o) + 0x00019618 0x00019618 0x0000000c Code RO 1713 i.hal_internal_vsync_get_tx_state CVWL568.lib(hal_internal_vsync.o) + 0x00019624 0x00019624 0x000000fc Code RO 1714 i.hal_internal_vsync_init_rx CVWL568.lib(hal_internal_vsync.o) + 0x00019720 0x00019720 0x000000b0 Code RO 1715 i.hal_internal_vsync_init_tx CVWL568.lib(hal_internal_vsync.o) + 0x000197d0 0x000197d0 0x0000011c Code RO 1716 i.hal_internal_vsync_set_auto_hw_filter CVWL568.lib(hal_internal_vsync.o) + 0x000198ec 0x000198ec 0x00000014 Code RO 1718 i.hal_internal_vsync_set_rx_state CVWL568.lib(hal_internal_vsync.o) + 0x00019900 0x00019900 0x0000001c Code RO 1719 i.hal_internal_vsync_set_sync_line CVWL568.lib(hal_internal_vsync.o) + 0x0001991c 0x0001991c 0x00000048 Code RO 1720 i.hal_internal_vsync_set_tear_mode CVWL568.lib(hal_internal_vsync.o) + 0x00019964 0x00019964 0x00000040 Code RO 1721 i.hal_internal_vsync_set_tx_state CVWL568.lib(hal_internal_vsync.o) + 0x000199a4 0x000199a4 0x00000024 Code RO 665 i.hal_lcdc_config_ccm CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x000199c8 0x000199c8 0x00000048 Code RO 666 i.hal_lcdc_config_remains CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00019a10 0x00019a10 0x00000014 Code RO 667 i.hal_lcdc_config_rgb_to_pentile CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00019a24 0x00019a24 0x00000164 Code RO 668 i.hal_lcdc_config_upscaler CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00019b88 0x00019b88 0x00000040 Code RO 669 i.hal_lcdc_init_cfg CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00019bc8 0x00019bc8 0x00000180 Code RO 670 i.hal_lcdc_init_clk CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00019d48 0x00019d48 0x00000040 Code RO 671 i.hal_lcdc_init_interrupt CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00019d88 0x00019d88 0x0000000e Code RO 813 i.hal_spi_m_clear_rxfifo CVWL568.lib(hal_spi_master.o) + 0x00019d96 0x00019d96 0x00000008 Code RO 837 i.hal_system_enable_systick CVWL568.lib(hal_system.o) + 0x00019d9e 0x00019d9e 0x00000002 PAD + 0x00019da0 0x00019da0 0x00000088 Code RO 842 i.hal_system_init CVWL568.lib(hal_system.o) + 0x00019e28 0x00019e28 0x0000001c Code RO 843 i.hal_system_init_console CVWL568.lib(hal_system.o) + 0x00019e44 0x00019e44 0x00000008 Code RO 846 i.hal_system_set_phy_calibration CVWL568.lib(hal_system.o) + 0x00019e4c 0x00019e4c 0x00000008 Code RO 847 i.hal_system_set_pvd CVWL568.lib(hal_system.o) + 0x00019e54 0x00019e54 0x00000008 Code RO 848 i.hal_system_set_vcc CVWL568.lib(hal_system.o) + 0x00019e5c 0x00019e5c 0x0000001a Code RO 873 i.hal_timer_init CVWL568.lib(hal_timer.o) + 0x00019e76 0x00019e76 0x00000002 PAD + 0x00019e78 0x00019e78 0x00000050 Code RO 875 i.hal_timer_start CVWL568.lib(hal_timer.o) + 0x00019ec8 0x00019ec8 0x0000008c Code RO 1038 i.hal_uart_init CVWL568.lib(hal_uart.o) + 0x00019f54 0x00019f54 0x00000010 Code RO 1041 i.hal_uart_transmit_blocking CVWL568.lib(hal_uart.o) + 0x00019f64 0x00019f64 0x00000110 Code RO 2246 i.handle_init CVWL568.lib(irq_redirect .o) + 0x0001a074 0x0001a074 0x00000070 Code RO 112 i.init_mipi_tx ap_demo.o + 0x0001a0e4 0x0001a0e4 0x00000098 Code RO 113 i.init_panel ap_demo.o + 0x0001a17c 0x0001a17c 0x0000000a Code RO 3 i.main main.o + 0x0001a186 0x0001a186 0x00000002 PAD + 0x0001a188 0x0001a188 0x000000cc Code RO 114 i.open_mipi_rx ap_demo.o + 0x0001a254 0x0001a254 0x000000c0 Code RO 115 i.pps_update_handle ap_demo.o + 0x0001a314 0x0001a314 0x000003f4 Code RO 1722 i.rx_get_dcs_packet_data CVWL568.lib(hal_internal_vsync.o) + 0x0001a708 0x0001a708 0x00000140 Code RO 1723 i.rx_partial_update CVWL568.lib(hal_internal_vsync.o) + 0x0001a848 0x0001a848 0x0000008c Code RO 1724 i.rx_receive_packet CVWL568.lib(hal_internal_vsync.o) + 0x0001a8d4 0x0001a8d4 0x00000180 Code RO 1725 i.rx_receive_pps CVWL568.lib(hal_internal_vsync.o) + 0x0001aa54 0x0001aa54 0x000000a4 Code RO 1726 i.rxbr_irq0_callback CVWL568.lib(hal_internal_vsync.o) + 0x0001aaf8 0x0001aaf8 0x00000170 Code RO 1727 i.rxbr_irq1_callback CVWL568.lib(hal_internal_vsync.o) + 0x0001ac68 0x0001ac68 0x0000008c Code RO 1728 i.soft_gen_te CVWL568.lib(hal_internal_vsync.o) + 0x0001acf4 0x0001acf4 0x00000030 Code RO 116 i.soft_timer3_cb ap_demo.o + 0x0001ad24 0x0001ad24 0x00000048 Code RO 2631 i.sqrt m_ps.l(sqrt.o) + 0x0001ad6c 0x0001ad6c 0x00000068 Code RO 117 i.tp_heartbeat_exec ap_demo.o + 0x0001add4 0x0001add4 0x000000e8 Code RO 1729 i.vidc_callback CVWL568.lib(hal_internal_vsync.o) + 0x0001aebc 0x0001aebc 0x000000d0 Code RO 1730 i.vpre_err_reset CVWL568.lib(hal_internal_vsync.o) + 0x0001af8c 0x0001af8c 0x0000019c Code RO 1731 i.vsync_set_te_mode CVWL568.lib(hal_internal_vsync.o) + 0x0001b128 0x0001b128 0x000024b8 Data RO 118 .constdata ap_demo.o + 0x0001d5e0 0x0001d5e0 0x00000020 Data RO 423 .constdata app_tp_st_touch.o + 0x0001d600 0x0001d600 0x000000d2 Data RO 738 .constdata CVWL568.lib(hal_gpio.o) + 0x0001d6d2 0x0001d6d2 0x000014a6 Data RO 909 .constdata WL568_S21_NT37701_TP.lib(app_tp_for_custom_s8.o) + 0x0001eb78 0x0001eb78 0x00000001 Data RO 924 .constdata WL568_S21_NT37701_TP.lib(app_tp_for_custom_s8.o) + 0x0001eb79 0x0001eb79 0x00000003 PAD + 0x0001eb7c 0x0001eb7c 0x00000008 Data RO 1541 .constdata CVWL568.lib(drv_param_init.o) + 0x0001eb84 0x0001eb84 0x00000186 Data RO 2296 .constdata CVWL568.lib(drv_phy_common.o) + 0x0001ed0a 0x0001ed0a 0x00000002 PAD + 0x0001ed0c 0x0001ed0c 0x00000048 Data RO 580 .conststring CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x0001ed54 0x0001ed54 0x00000134 Data RO 1733 .conststring CVWL568.lib(hal_internal_vsync.o) + 0x0001ee88 0x0001ee88 0x00000030 Data RO 2993 Region$$Table anon$$obj.o - Execution Region RW_RAM1 (Exec base: 0x00070000, Load base: 0x0001eec0, Size: 0x00000000, Max: 0x000000f0, ABSOLUTE) + Execution Region RW_RAM1 (Exec base: 0x00070000, Load base: 0x0001eeb8, Size: 0x00000000, Max: 0x000000f0, ABSOLUTE) **** No section assigned to this execution region **** - Execution Region RW_RAM2 (Exec base: 0x00070100, Load base: 0x0001eec0, Size: 0x000000c0, Max: 0x000000d0, ABSOLUTE) + Execution Region RW_RAM2 (Exec base: 0x00070100, Load base: 0x0001eeb8, Size: 0x000000c0, Max: 0x000000d0, ABSOLUTE) Exec Addr Load Addr Size Type Attr Idx E Section Name Object - 0x00070100 - 0x000000c0 Zero RW 2260 .ARM.__AT_0x00070100 CVWL568.lib(irq_redirect .o) + 0x00070100 - 0x000000c0 Zero RW 2247 .ARM.__AT_0x00070100 CVWL568.lib(irq_redirect .o) - Execution Region RW_RAM3 (Exec base: 0x000701d0, Load base: 0x0001eec0, Size: 0x000038f8, Max: 0x00007e30, ABSOLUTE, COMPRESSED[0x00000554]) + Execution Region RW_RAM3 (Exec base: 0x000701d0, Load base: 0x0001eeb8, Size: 0x000038f8, Max: 0x00007e30, ABSOLUTE, COMPRESSED[0x00000554]) Exec Addr Load Addr Size Type Attr Idx E Section Name Object @@ -4981,42 +4980,42 @@ Memory Map of the image 0x00070552 COMPRESSED 0x00000005 Data RW 934 .data WL568_S21_NT37701_TP.lib(app_tp_for_custom_s8.o) 0x00070557 COMPRESSED 0x00000001 PAD 0x00070558 COMPRESSED 0x00000030 Data RW 944 .data WL568_S21_NT37701_TP.lib(app_tp_for_custom_s8.o) - 0x00070588 COMPRESSED 0x00000012 Data RW 1108 .data CVWL568.lib(norflash.o) + 0x00070588 COMPRESSED 0x00000012 Data RW 1095 .data CVWL568.lib(norflash.o) 0x0007059a COMPRESSED 0x00000002 PAD - 0x0007059c COMPRESSED 0x0000000c Data RW 1161 .data CVWL568.lib(drv_common.o) - 0x000705a8 COMPRESSED 0x00000004 Data RW 1426 .data CVWL568.lib(drv_gpio.o) - 0x000705ac COMPRESSED 0x00000008 Data RW 1464 .data CVWL568.lib(drv_i2c_dma.o) - 0x000705b4 COMPRESSED 0x00000004 Data RW 1492 .data CVWL568.lib(drv_i2c_master.o) - 0x000705b8 COMPRESSED 0x00000008 Data RW 1526 .data CVWL568.lib(drv_i2c_slave.o) - 0x000705c0 COMPRESSED 0x000004a4 Data RW 1555 .data CVWL568.lib(drv_param_init.o) - 0x00070a64 COMPRESSED 0x00000004 Data RW 1620 .data CVWL568.lib(drv_spi_master.o) - 0x00070a68 COMPRESSED 0x00000001 Data RW 1652 .data CVWL568.lib(drv_sys_cfg.o) + 0x0007059c COMPRESSED 0x0000000c Data RW 1148 .data CVWL568.lib(drv_common.o) + 0x000705a8 COMPRESSED 0x00000004 Data RW 1413 .data CVWL568.lib(drv_gpio.o) + 0x000705ac COMPRESSED 0x00000008 Data RW 1451 .data CVWL568.lib(drv_i2c_dma.o) + 0x000705b4 COMPRESSED 0x00000004 Data RW 1479 .data CVWL568.lib(drv_i2c_master.o) + 0x000705b8 COMPRESSED 0x00000008 Data RW 1513 .data CVWL568.lib(drv_i2c_slave.o) + 0x000705c0 COMPRESSED 0x000004a4 Data RW 1542 .data CVWL568.lib(drv_param_init.o) + 0x00070a64 COMPRESSED 0x00000004 Data RW 1607 .data CVWL568.lib(drv_spi_master.o) + 0x00070a68 COMPRESSED 0x00000001 Data RW 1639 .data CVWL568.lib(drv_sys_cfg.o) 0x00070a69 COMPRESSED 0x00000003 PAD - 0x00070a6c COMPRESSED 0x00000050 Data RW 1688 .data CVWL568.lib(drv_timer.o) - 0x00070abc COMPRESSED 0x00000004 Data RW 1747 .data CVWL568.lib(hal_internal_vsync.o) - 0x00070ac0 COMPRESSED 0x00000008 Data RW 2112 .data CVWL568.lib(drv_rxbr.o) - 0x00070ac8 COMPRESSED 0x00000004 Data RW 2185 .data CVWL568.lib(drv_vidc.o) - 0x00070acc COMPRESSED 0x00000001 Data RW 2310 .data CVWL568.lib(drv_phy_common.o) + 0x00070a6c COMPRESSED 0x00000050 Data RW 1675 .data CVWL568.lib(drv_timer.o) + 0x00070abc COMPRESSED 0x00000004 Data RW 1734 .data CVWL568.lib(hal_internal_vsync.o) + 0x00070ac0 COMPRESSED 0x00000008 Data RW 2099 .data CVWL568.lib(drv_rxbr.o) + 0x00070ac8 COMPRESSED 0x00000004 Data RW 2172 .data CVWL568.lib(drv_vidc.o) + 0x00070acc COMPRESSED 0x00000001 Data RW 2297 .data CVWL568.lib(drv_phy_common.o) 0x00070acd COMPRESSED 0x00000003 PAD - 0x00070ad0 COMPRESSED 0x0000000c Data RW 2330 .data CVWL568.lib(drv_chip_info.o) - 0x00070adc COMPRESSED 0x0000000c Data RW 2440 .data CVWL568.lib(drv_pwm.o) - 0x00070ae8 COMPRESSED 0x00000008 Data RW 2495 .data CVWL568.lib(drv_swire.o) - 0x00070af0 COMPRESSED 0x00000008 Data RW 2537 .data CVWL568.lib(drv_uart.o) - 0x00070af8 COMPRESSED 0x0000000c Data RW 2604 .data CVWL568.lib(drv_wdg.o) - 0x00070b04 COMPRESSED 0x00000004 Data RW 2975 .data mc_p.l(stdout.o) - 0x00070b08 COMPRESSED 0x00000004 Data RW 2987 .data mc_p.l(errno.o) + 0x00070ad0 COMPRESSED 0x0000000c Data RW 2317 .data CVWL568.lib(drv_chip_info.o) + 0x00070adc COMPRESSED 0x0000000c Data RW 2427 .data CVWL568.lib(drv_pwm.o) + 0x00070ae8 COMPRESSED 0x00000008 Data RW 2482 .data CVWL568.lib(drv_swire.o) + 0x00070af0 COMPRESSED 0x00000008 Data RW 2524 .data CVWL568.lib(drv_uart.o) + 0x00070af8 COMPRESSED 0x0000000c Data RW 2591 .data CVWL568.lib(drv_wdg.o) + 0x00070b04 COMPRESSED 0x00000004 Data RW 2962 .data mc_p.l(stdout.o) + 0x00070b08 COMPRESSED 0x00000004 Data RW 2974 .data mc_p.l(errno.o) 0x00070b0c - 0x00000190 Zero RW 274 .bss app_tp_transfer.o 0x00070c9c - 0x0000000c Zero RW 422 .bss app_tp_st_touch.o 0x00070ca8 - 0x000000c0 Zero RW 579 .bss CVWL568.lib(hal_dsi_rx_ctrl.o) 0x00070d68 - 0x00000048 Zero RW 672 .bss CVWL568.lib(hal_dsi_tx_ctrl.o) 0x00070db0 - 0x00000100 Zero RW 898 .bss CVWL568.lib(tau_log.o) - 0x00070eb0 - 0x000000d0 Zero RW 1056 .bss CVWL568.lib(hal_uart.o) - 0x00070f80 - 0x0000001c Zero RW 1288 .bss CVWL568.lib(drv_dma.o) - 0x00070f9c - 0x00000040 Zero RW 1425 .bss CVWL568.lib(drv_gpio.o) - 0x00070fdc - 0x00000140 Zero RW 1463 .bss CVWL568.lib(drv_i2c_dma.o) - 0x0007111c - 0x00000958 Zero RW 1745 .bss CVWL568.lib(hal_internal_vsync.o) - 0x00071a74 - 0x00001030 Zero RW 1789 .bss CVWL568.lib(dcs_packet_fifo.o) - 0x00072aa4 - 0x00000020 Zero RW 2374 .bss CVWL568.lib(hal_spi_slave.o) + 0x00070eb0 - 0x000000d0 Zero RW 1043 .bss CVWL568.lib(hal_uart.o) + 0x00070f80 - 0x0000001c Zero RW 1275 .bss CVWL568.lib(drv_dma.o) + 0x00070f9c - 0x00000040 Zero RW 1412 .bss CVWL568.lib(drv_gpio.o) + 0x00070fdc - 0x00000140 Zero RW 1450 .bss CVWL568.lib(drv_i2c_dma.o) + 0x0007111c - 0x00000958 Zero RW 1732 .bss CVWL568.lib(hal_internal_vsync.o) + 0x00071a74 - 0x00001030 Zero RW 1776 .bss CVWL568.lib(dcs_packet_fifo.o) + 0x00072aa4 - 0x00000020 Zero RW 2361 .bss CVWL568.lib(hal_spi_slave.o) 0x00072ac4 COMPRESSED 0x00000004 PAD 0x00072ac8 - 0x00001000 Zero RW 529 STACK startup_armcm0.o @@ -5028,15 +5027,15 @@ Image component sizes Code (inc. data) RO Data RW Data ZI Data Debug Object Name - 6198 854 9400 560 0 38197 ap_demo.o - 1298 244 32 40 12 11825 app_tp_st_touch.o - 1020 142 0 23 400 13196 app_tp_transfer.o - 36 6 0 0 0 517 board.o - 10 0 0 0 0 5859 main.o - 120 18 192 0 4096 2088 startup_armcm0.o + 6190 854 9400 560 0 39113 ap_demo.o + 1298 244 32 40 12 12529 app_tp_st_touch.o + 1020 142 0 23 400 13940 app_tp_transfer.o + 36 6 0 0 0 561 board.o + 10 0 0 0 0 5715 main.o + 120 18 192 0 4096 2116 startup_armcm0.o ---------------------------------------------------------------------- - 8688 1264 9672 624 4508 71682 Object Totals + 8680 1264 9672 624 4508 73974 Object Totals 0 0 48 0 0 0 (incl. Generated) 6 0 0 1 0 0 (incl. Padding) @@ -5087,7 +5086,7 @@ Image component sizes 48 10 0 18 0 68 norflash.o 58 0 0 0 0 128 tau_delay.o 60 10 0 0 256 156 tau_log.o - 1536 60 5287 287 0 21856 app_tp_for_custom_s8.o + 1536 60 5287 287 0 17772 app_tp_for_custom_s8.o 200 20 0 0 0 76 ceil.o 72 6 0 0 0 76 sqrt.o 86 0 0 0 0 0 __dczerorl2.o @@ -5137,7 +5136,7 @@ Image component sizes 24 0 0 0 0 60 fscalb.o ---------------------------------------------------------------------- - 36460 4678 6300 1740 7904 56000 Library Totals + 36460 4678 6300 1740 7904 51916 Library Totals 60 0 5 11 4 0 (incl. Padding) ---------------------------------------------------------------------- @@ -5145,13 +5144,13 @@ Image component sizes Code (inc. data) RO Data RW Data ZI Data Debug Library Name 29484 4412 1008 1434 7900 30868 CVWL568.lib - 1536 60 5287 287 0 21856 WL568_S21_NT37701_TP.lib + 1536 60 5287 287 0 17772 WL568_S21_NT37701_TP.lib 272 26 0 0 0 152 m_ps.l 2838 126 0 8 0 1264 mc_p.l 2270 54 0 0 0 1860 mf_p.l ---------------------------------------------------------------------- - 36460 4678 6300 1740 7904 56000 Library Totals + 36460 4678 6300 1740 7904 51916 Library Totals ---------------------------------------------------------------------- @@ -5160,15 +5159,15 @@ Image component sizes Code (inc. data) RO Data RW Data ZI Data Debug - 45148 5942 15972 2364 12412 103638 Grand Totals - 45148 5942 15972 1364 12412 103638 ELF Image Totals (compressed) - 45148 5942 15972 1364 0 0 ROM Totals + 45140 5942 15972 2364 12412 101846 Grand Totals + 45140 5942 15972 1364 12412 101846 ELF Image Totals (compressed) + 45140 5942 15972 1364 0 0 ROM Totals ============================================================================== - Total RO Size (Code + RO Data) 61120 ( 59.69kB) + Total RO Size (Code + RO Data) 61112 ( 59.68kB) Total RW Size (RW Data + ZI Data) 14776 ( 14.43kB) - Total ROM Size (Code + RO Data + RW Data) 62484 ( 61.02kB) + Total ROM Size (Code + RO Data + RW Data) 62476 ( 61.01kB) ============================================================================== diff --git a/project/Objects/WL568_S21_NT37701_20230522.bin b/project/Objects/WL568_S21_NT37701_20230522.bin index f078cc4..9debf4d 100644 Binary files a/project/Objects/WL568_S21_NT37701_20230522.bin and b/project/Objects/WL568_S21_NT37701_20230522.bin differ diff --git a/src/app/demo/ap_demo.c b/src/app/demo/ap_demo.c index 9dfaf34..75d26a6 100644 --- a/src/app/demo/ap_demo.c +++ b/src/app/demo/ap_demo.c @@ -49,7 +49,7 @@ /* 输入虚拟通道(0-3) */ #define INPUT_VC DSI_VC_0 /* 输入的帧率(60/90/120/144Hz) */ -#define INPUT_FRAME_RATE DSI_FRAME_RATE_120HZ +#define INPUT_FRAME_RATE DSI_FRAME_RATE_60HZ /* 输入数据是否DSC压缩 */ #define INPUT_COMPRESS true @@ -5146,7 +5146,7 @@ void ap_demo(void) TAU_LOGD("disable video path \n"); g_need_enter_sleep_mode = false; - hal_system_set_vcc(false); +// hal_system_set_vcc(false); tp_sleep_in=1; } #endif