commit bfb322f03249e2266d0547e40f376889728535e6 Author: “苏飞源” Date: Wed Apr 19 18:30:10 2023 +0800 首次提交： 三星S21量产代码 diff --git a/.gitignore b/.gitignore new file mode 100644 index 0000000..243d6b9 --- /dev/null +++ b/.gitignore @@ -0,0 +1,85 @@ +# A .gitignore for Keil projects. +# Taken mostly from http://www.keil.com/support/man/docs/uv4/uv4_b_filetypes.htm + +# User-specific uVision files +*.opt +*.uvopt +*.uvoptx +*.uvgui +*.uvgui.* +*.uvguix.* + +# Listing files +#*.cod +#*.map +#*.m51 +#*.m66 +*._ip +*.i +*.lst +*/Listings/*.txt + +# define exception below if needed +*.scr + +# Object and HEX files +*.axf +*.b[0-3][0-9] +*.hex +*.d +*.crf +*.elf +*.hex +*.h86 +*.obj +*.o +*.sbr +*.htm + +# Build files +# define exception below if needed +*.bat +*._ia +*.__i +*._ii + +# Generated output files +/Listings/* +/Objects/* + +# Debugger files +# define exception below if needed +*.ini + +# Other files +*.build_log.htm +*.cdb +*.dep +*.ic +*.lin +*.lnp +*.orc +# define exception below if needed +*.pack +# define exception below if needed +*.pdsc +*.plg +# define exception below if needed +*.sct +*.sfd +*.sfr + +# Miscellaneous +*.tra +*.fed +*.l1p +*.l2p +*.iex + + +/si/ +!*.bin +!*.map + +# To explicitly override the above, define any exceptions here; e.g.: +# !my_customized_scatter_file.sct diff --git a/project/EventRecorderStub.scvd b/project/EventRecorderStub.scvd new file mode 100644 index 0000000..2956b29 --- /dev/null +++ b/project/EventRecorderStub.scvd @@ -0,0 +1,9 @@ + + + + + + + + + diff --git a/project/ISP568.uvprojx b/project/ISP568.uvprojx new file mode 100644 index 0000000..8f2fb7c --- /dev/null +++ b/project/ISP568.uvprojx @@ -0,0 +1,570 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + ISP568 + 0x4 + ARM-ADS + 5060750::V5.06 update 6 (build 750)::ARMCC + 5060750::V5.06 update 6 (build 750)::ARMCC + 0 + + + ARMCM0 + ARM + ARM.CMSIS.5.5.1 + http://www.keil.com/pack/ + IRAM(0x20000000,0x00020000) IROM(0x00000000,0x00040000) CPUTYPE("Cortex-M0") CLOCK(12000000) ESEL ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000) + 0 + $$Device:ARMCM0$Device\ARM\ARMCM0\Include\ARMCM0.h + + + + + + + + + + $$Device:ARMCM0$Device\ARM\SVD\ARMCM0.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\Objects\ + WL568_S21_NT37701_20230403 + 1 + 0 + 1 + 1 + 1 + .\Listings\ + 1 + 0 + 1 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 1 + 0 + fromelf --bin -o .\Objects\@L.bin .\Objects\@L.axf + .\Out\gen_cfg.BAT + 0 + 0 + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + + DARMCM1.DLL + -pCM0 + SARMCM3.DLL + + TARMCM1.DLL + -pCM0 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + "Cortex-M0" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 16 + 1 + 1 + 0 + 0 + 4 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 1 + 0x0 + 0x40000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x2000 + + + 1 + 0x10000 + 0x10000 + + + 0 + 0x70000 + 0xf0 + + + 0 + 0x70100 + 0xd0 + + + 0 + 0x701d0 + 0x7e30 + + + 0 + 0x20000000 + 0x20000 + + + 0 + 0x0 + 0x0 + + + + + + 1 + 4 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + 0 + 1 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 0 + + + ISP_568 + + ..\src;..\src\board;..\src\common;..\src\sdk\include;..\src\app\demo;..\src\sdk\include\M0;..\src\app;..\src\unittest;..\src\app\s8p + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 1 + 0 + 0 + 0 + 1 + 0 + 0x00000000 + 0x20000000 + + + + + + + + + + + + + app + + + main.c + 1 + ..\src\app\main.c + + + ap_demo.c + 1 + ..\src\app\demo\ap_demo.c + + + app_tp_for_custom_s8.c + 1 + ..\src\app\demo\app_tp_for_custom_s8.c + + + 2 + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 11 + + + 1 + + + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 0 + 0 + 2 + 2 + 2 + 2 + 2 + + + + + + + + + + + + app_tp_transfer.c + 1 + ..\src\app\demo\app_tp_transfer.c + + + app_tp_st_touch.c + 1 + ..\src\app\demo\app_tp_st_touch.c + + + + + driver + + + CVWL568.lib + 4 + ..\src\sdk\lib\CVWL568.lib + + + WL568_S21_NT37701_TP.lib + 4 + ..\src\sdk\lib\WL568_S21_NT37701_TP.lib + + + + + board + + + board.c + 1 + ..\src\board\board.c + + + + + startup + + + startup_ARMCM0.s + 2 + ..\src\board\startup\startup_ARMCM0.s + + + 2 + 0 + 0 + 0 + 0 + 1 + 2 + 2 + 2 + 2 + 11 + + + 1 + + + + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + + + + + + + + + + + + + + ::CMSIS + + + + + + + + + + + + + + + + + + RTE\Device\ARMCM0\startup_ARMCM0.s + + + + + + RTE\Device\ARMCM0\system_ARMCM0.c + + + + + + + + diff --git a/project/Listings/WL568_S21_NT37701_20230403.map b/project/Listings/WL568_S21_NT37701_20230403.map new file mode 100644 index 0000000..02bf06d --- /dev/null +++ b/project/Listings/WL568_S21_NT37701_20230403.map @@ -0,0 +1,5159 @@ +Component: ARM Compiler 5.06 update 6 (build 750) Tool: armlink [4d35ed] + +============================================================================== + +Section Cross References + + main.o(i.main) refers to board.o(i.board_Init) for board_Init + main.o(i.main) refers to ap_demo.o(i.ap_demo) for ap_demo + ap_demo.o(i.Gpio_swire_output) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + ap_demo.o(i.Gpio_swire_output) refers to tau_delay.o(i.delayMs) for delayMs + ap_demo.o(i.Gpio_swire_output) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + ap_demo.o(i.Gpio_swire_output) refers to tau_delay.o(i.delayUs) for delayUs + ap_demo.o(i.ap_dcs_read) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) for hal_dsi_rx_ctrl_get_max_ret_size + ap_demo.o(i.ap_dcs_read) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) for hal_dsi_rx_ctrl_send_ack_cmd + ap_demo.o(i.ap_dcs_read) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_dcs_read) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_dcs_read) refers to app_tp_st_touch.o(i.ap_get_tp_calibration_status_01) for ap_get_tp_calibration_status_01 + ap_demo.o(i.ap_demo) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + ap_demo.o(i.ap_demo) refers to app_tp_transfer.o(i.app_tp_I2C_init) for app_tp_I2C_init + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.open_mipi_rx) for open_mipi_rx + ap_demo.o(i.ap_demo) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.init_mipi_tx) for init_mipi_tx + ap_demo.o(i.ap_demo) refers to app_tp_transfer.o(i.app_tp_init) for app_tp_init + ap_demo.o(i.ap_demo) refers to hal_timer.o(i.hal_timer_init) for hal_timer_init + ap_demo.o(i.ap_demo) refers to hal_timer.o(i.hal_timer_start) for hal_timer_start + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.init_panel) for init_panel + ap_demo.o(i.ap_demo) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) for hal_dsi_tx_ctrl_start + ap_demo.o(i.ap_demo) refers to tau_delay.o(i.delayMs) for delayMs + ap_demo.o(i.ap_demo) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.ap_demo) refers to app_tp_transfer.o(i.app_tp_phone_clear_reset_on) for app_tp_phone_clear_reset_on + ap_demo.o(i.ap_demo) refers to app_tp_transfer.o(i.app_tp_transfer_screen_start) for app_tp_transfer_screen_start + ap_demo.o(i.ap_demo) refers to hal_gpio.o(i.hal_gpio_set_ap_reset_int) for hal_gpio_set_ap_reset_int + ap_demo.o(i.ap_demo) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + ap_demo.o(i.ap_demo) refers to app_tp_st_touch.o(i.app_tp_calibration_exec) for app_tp_calibration_exec + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.tp_heartbeat_exec) for tp_heartbeat_exec + ap_demo.o(i.ap_demo) refers to app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_record_event_exec) for ap_tp_st_touch_scan_point_record_event_exec + ap_demo.o(i.ap_demo) refers to app_tp_transfer.o(i.app_tp_transfer_screen_int) for app_tp_transfer_screen_int + ap_demo.o(i.ap_demo) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) for hal_dsi_rx_ctrl_dsc_async_handler + ap_demo.o(i.ap_demo) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) for hal_dsi_tx_ctrl_stop + ap_demo.o(i.ap_demo) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) for hal_dsi_tx_ctrl_deinit + ap_demo.o(i.ap_demo) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) for hal_dsi_rx_ctrl_stop + ap_demo.o(i.ap_demo) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) for hal_dsi_rx_ctrl_deinit + ap_demo.o(i.ap_demo) refers to hal_system.o(i.hal_system_set_vcc) for hal_system_set_vcc + ap_demo.o(i.ap_demo) refers to app_tp_for_custom_s8.o(.data) for tp_sleep_in + ap_demo.o(i.ap_demo) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.soft_timer3_cb) for soft_timer3_cb + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.ap_reset_cb) for ap_reset_cb + ap_demo.o(i.ap_get_reg_df) refers to memcpya.o(.text) for __aeabi_memcpy4 + ap_demo.o(i.ap_get_reg_df) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) for hal_dsi_tx_ctrl_set_ccm + ap_demo.o(i.ap_get_reg_df) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_reset_cb) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_reset_cb) refers to hal_system.o(i.hal_system_set_pvd) for hal_system_set_pvd + ap_demo.o(i.ap_reset_cb) refers to hal_system.o(i.hal_system_set_vcc) for hal_system_set_vcc + ap_demo.o(i.ap_set_backlight_51) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.ap_set_display_off) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.ap_set_display_off) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_set_display_on) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_set_enter_sleep_mode) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) for hal_dsi_rx_ctrl_set_sw_tear_mode + ap_demo.o(i.ap_set_enter_sleep_mode) refers to ap_demo.o(i.Gpio_swire_output) for Gpio_swire_output + ap_demo.o(i.ap_set_enter_sleep_mode) refers to tau_delay.o(i.delayMs) for delayMs + ap_demo.o(i.ap_set_enter_sleep_mode) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.ap_set_enter_sleep_mode) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + ap_demo.o(i.ap_set_enter_sleep_mode) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_set_enter_sleep_mode) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_set_exit_sleep_mode) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_set_exit_sleep_mode) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.ap_set_exit_sleep_mode) refers to tau_delay.o(i.delayMs) for delayMs + ap_demo.o(i.ap_set_exit_sleep_mode) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) for hal_dsi_rx_ctrl_toggle_resolution + ap_demo.o(i.ap_set_exit_sleep_mode) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_update_frame_rate) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_tear_mode_ex) for hal_dsi_rx_ctrl_set_tear_mode_ex + ap_demo.o(i.ap_update_frame_rate) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_update_frame_rate) refers to ap_demo.o(.data) for .data + ap_demo.o(i.init_mipi_tx) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) for hal_dsi_tx_ctrl_create_handle + ap_demo.o(i.init_mipi_tx) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) for hal_dsi_tx_ctrl_init + ap_demo.o(i.init_mipi_tx) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) for hal_dsi_tx_ctrl_set_overwrite_rgb + ap_demo.o(i.init_mipi_tx) refers to ap_demo.o(.data) for .data + ap_demo.o(i.init_panel) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_panel_reset_pin) for hal_dsi_tx_ctrl_panel_reset_pin + ap_demo.o(i.init_panel) refers to tau_delay.o(i.delayMs) for delayMs + ap_demo.o(i.init_panel) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) for hal_dsi_tx_ctrl_enter_init_panel_mode + ap_demo.o(i.init_panel) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) for hal_dsi_tx_ctrl_write_array_cmd + ap_demo.o(i.init_panel) refers to tau_delay.o(i.delayUs) for delayUs + ap_demo.o(i.init_panel) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + ap_demo.o(i.init_panel) refers to ap_demo.o(i.Gpio_swire_output) for Gpio_swire_output + ap_demo.o(i.init_panel) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.init_panel) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) for hal_dsi_tx_ctrl_exit_init_panel_mode + ap_demo.o(i.init_panel) refers to ap_demo.o(.constdata) for .constdata + ap_demo.o(i.open_mipi_rx) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) for hal_dsi_rx_ctrl_create_handle + ap_demo.o(i.open_mipi_rx) refers to memcpya.o(.text) for __aeabi_memcpy4 + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_pre_init_pps) for hal_dsi_rx_ctrl_pre_init_pps + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) for hal_dsi_rx_ctrl_init + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) for hal_dsi_rx_ctrl_set_cus_sync_line + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) for hal_dsi_rx_ctrl_set_cus_scld_filter + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) for hal_dsi_rx_ctrl_start + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) for hal_dsi_rx_ctrl_set_cus_esc_clk + ap_demo.o(i.open_mipi_rx) refers to ap_demo.o(.data) for .data + ap_demo.o(i.open_mipi_rx) refers to ap_demo.o(.constdata) for .constdata + ap_demo.o(i.open_mipi_rx) refers to ap_demo.o(i.ap_dcs_read) for ap_dcs_read + ap_demo.o(i.open_mipi_rx) refers to ap_demo.o(i.pps_update_handle) for pps_update_handle + ap_demo.o(i.pps_update_handle) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) for hal_dsi_rx_ctrl_toggle_resolution + ap_demo.o(i.pps_update_handle) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.pps_update_handle) refers to ap_demo.o(.data) for .data + ap_demo.o(i.soft_timer3_cb) refers to hal_timer.o(i.hal_timer_start) for hal_timer_start + ap_demo.o(i.soft_timer3_cb) refers to app_tp_for_custom_s8.o(.data) for tp_sleep_count + ap_demo.o(i.soft_timer3_cb) refers to ap_demo.o(.data) for .data + ap_demo.o(i.tp_heartbeat_exec) refers to hal_gpio.o(i.hal_gpio_get_input_data) for hal_gpio_get_input_data + ap_demo.o(i.tp_heartbeat_exec) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.tp_heartbeat_exec) refers to app_tp_st_touch.o(i.ap_tp_st_touch_software_reset) for ap_tp_st_touch_software_reset + ap_demo.o(i.tp_heartbeat_exec) refers to app_tp_transfer.o(.data) for s_screen_init_complate + ap_demo.o(i.tp_heartbeat_exec) refers to ap_demo.o(.data) for .data + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_display_on) for ap_set_display_on + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_display_off) for ap_set_display_off + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_get_reg_df) for ap_get_reg_df + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_backlight_51) for ap_set_backlight_51 + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_update_frame_rate) for ap_update_frame_rate + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_enter_sleep_mode) for ap_set_enter_sleep_mode + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_exit_sleep_mode) for ap_set_exit_sleep_mode + ap_demo.o(.constdata) refers to app_tp_st_touch.o(i.ap_set_tp_calibration_04) for ap_set_tp_calibration_04 + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_transfer.o(i.app_tp_m_read) for app_tp_m_read + app_tp_transfer.o(i.S20_Start_init) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_transfer.o(i.S20_Start_init) refers to tau_delay.o(i.delayMs) for delayMs + app_tp_transfer.o(i.S20_Start_init) refers to hal_gpio.o(i.hal_gpio_get_input_data) for hal_gpio_get_input_data + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_transfer.o(i.app_tp_m_write) for app_tp_m_write + app_tp_transfer.o(i.S20_Start_init) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + app_tp_transfer.o(i.S20_Start_init) refers to hal_gpio.o(i.hal_gpio_ctrl_eint) for hal_gpio_ctrl_eint + app_tp_transfer.o(i.S20_Start_init) refers to hal_gpio.o(i.hal_gpio_init_eint) for hal_gpio_init_eint + app_tp_transfer.o(i.S20_Start_init) refers to hal_gpio.o(i.hal_gpio_reg_eint_cb) for hal_gpio_reg_eint_cb + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_for_custom_s8.o(.data) for screen_reg_int_data + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_transfer.o(.bss) for .bss + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_for_custom_s8.o(.data) for g_screen_input_int_pad + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_transfer.o(i.app_tp_screen_int_callback) for app_tp_screen_int_callback + app_tp_transfer.o(i.S20_Start_init) refers to ap_demo.o(.data) for phone_start_flag + app_tp_transfer.o(i.app_tp_I2C_init) refers to hal_i2c_slave.o(i.hal_i2c_s_init) for hal_i2c_s_init + app_tp_transfer.o(i.app_tp_I2C_init) refers to hal_i2c_slave.o(i.hal_i2c_s_set_transfer) for hal_i2c_s_set_transfer + app_tp_transfer.o(i.app_tp_I2C_init) refers to hal_i2c_slave.o(i.hal_i2c_s_nonblocking_read) for hal_i2c_s_nonblocking_read + app_tp_transfer.o(i.app_tp_I2C_init) refers to app_tp_transfer.o(i.app_tp_i2cs_callback) for app_tp_i2cs_callback + app_tp_transfer.o(i.app_tp_I2C_init) refers to app_tp_transfer.o(.bss) for .bss + app_tp_transfer.o(i.app_tp_i2cs_callback) refers to app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) for app_tp_phone_analysis_data + app_tp_transfer.o(i.app_tp_i2cs_callback) refers to app_tp_transfer.o(i.app_tp_s_read) for app_tp_s_read + app_tp_transfer.o(i.app_tp_i2cs_callback) refers to app_tp_transfer.o(i.app_tp_s_write) for app_tp_s_write + app_tp_transfer.o(i.app_tp_i2cs_callback) refers to app_tp_transfer.o(.bss) for .bss + app_tp_transfer.o(i.app_tp_init) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + app_tp_transfer.o(i.app_tp_init) refers to app_tp_transfer.o(i.app_tp_screen_init) for app_tp_screen_init + app_tp_transfer.o(i.app_tp_init) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + app_tp_transfer.o(i.app_tp_init) refers to hal_gpio.o(i.hal_gpio_init_input) for hal_gpio_init_input + app_tp_transfer.o(i.app_tp_init) refers to hal_i2c_master.o(i.hal_i2c_m_dma_init) for hal_i2c_m_dma_init + app_tp_transfer.o(i.app_tp_init) refers to app_tp_for_custom_s8.o(.data) for g_phone_output_int_pad + app_tp_transfer.o(i.app_tp_init) refers to app_tp_for_custom_s8.o(.data) for g_screen_input_int_pad + app_tp_transfer.o(i.app_tp_m_read) refers to hal_i2c_master.o(i.hal_i2c_m_dma_read) for hal_i2c_m_dma_read + app_tp_transfer.o(i.app_tp_m_transfer_complate) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_transfer.o(i.app_tp_m_write) refers to hal_i2c_master.o(i.hal_i2c_m_dma_write) for hal_i2c_m_dma_write + app_tp_transfer.o(i.app_tp_phone_clear_reset_on) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.app_tp_phone_reset_on) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.app_tp_s_read) refers to hal_i2c_slave.o(i.hal_i2c_s_nonblocking_read) for hal_i2c_s_nonblocking_read + app_tp_transfer.o(i.app_tp_s_transfer_complate) refers to hal_i2c_slave.o(i.hal_i2c_s_write_complate) for hal_i2c_s_write_complate + app_tp_transfer.o(i.app_tp_s_transfer_complate) refers to hal_i2c_slave.o(i.hal_i2c_s_read_complate) for hal_i2c_s_read_complate + app_tp_transfer.o(i.app_tp_s_write) refers to hal_i2c_slave.o(i.hal_i2c_s_dma_write) for hal_i2c_s_dma_write + app_tp_transfer.o(i.app_tp_screen_init) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + app_tp_transfer.o(i.app_tp_screen_init) refers to tau_delay.o(i.delayUs) for delayUs + app_tp_transfer.o(i.app_tp_screen_init) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + app_tp_transfer.o(i.app_tp_screen_init) refers to app_tp_for_custom_s8.o(.data) for g_screen_input_rst_pad + app_tp_transfer.o(i.app_tp_screen_int_callback) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to hal_spi_master.o(i.hal_spi_m_clear_rxfifo) for hal_spi_m_clear_rxfifo + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to app_tp_transfer.o(i.S20_Start_init) for S20_Start_init + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to app_tp_for_custom_s8.o(.constdata) for screen_reg_start_data_size + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to ap_demo.o(.data) for phone_start_flag + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_transfer.o(i.app_tp_transfer_screen_const) for app_tp_transfer_screen_const + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to hal_gpio.o(i.hal_gpio_get_input_data) for hal_gpio_get_input_data + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_transfer.o(i.app_tp_m_read) for app_tp_m_read + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to tau_delay.o(i.delayMs) for delayMs + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_st_touch.o(i.ap_tp_st_touch_error_handler_F3) for ap_tp_st_touch_error_handler_F3 + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_st_touch.o(i.ap_tp_st_touch_error_handler_FF) for ap_tp_st_touch_error_handler_FF + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_record_event) for ap_tp_st_touch_scan_point_record_event + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to tau_delay.o(i.delayUs) for delayUs + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) for app_tp_screen_analysis_int + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to tau_log.o(i.LOG_printf) for LOG_printf + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_for_custom_s8.o(.data) for g_screen_input_int_pad + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_for_custom_s8.o(.data) for screen_reg_int_data + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_transfer.o(.bss) for .bss + app_tp_transfer.o(i.app_tp_transfer_screen_start) refers to app_tp_transfer.o(i.app_tp_transfer_screen_const) for app_tp_transfer_screen_const + app_tp_transfer.o(i.app_tp_transfer_screen_start) refers to app_tp_transfer.o(.data) for .data + app_tp_st_touch.o(i.CRC16_2) refers to app_tp_st_touch.o(.constdata) for .constdata + app_tp_st_touch.o(i.ap_get_tp_calibration_status_01) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) for hal_dsi_rx_ctrl_send_ack_cmd + app_tp_st_touch.o(i.ap_get_tp_calibration_status_01) refers to app_tp_st_touch.o(.data) for .data + app_tp_st_touch.o(i.ap_set_tp_calibration_04) refers to memseta.o(.text) for __aeabi_memclr4 + app_tp_st_touch.o(i.ap_set_tp_calibration_04) refers to printfa.o(i.__0printf) for __2printf + app_tp_st_touch.o(i.ap_set_tp_calibration_04) refers to app_tp_st_touch.o(i.CRC16_2) for CRC16_2 + app_tp_st_touch.o(i.ap_set_tp_calibration_04) refers to app_tp_st_touch.o(.data) for .data + app_tp_st_touch.o(i.ap_tp_st_touch_calibration) refers to app_tp_transfer.o(i.app_tp_m_write) for app_tp_m_write + app_tp_st_touch.o(i.ap_tp_st_touch_calibration) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_st_touch.o(i.ap_tp_st_touch_calibration) refers to tau_delay.o(i.delayMs) for delayMs + app_tp_st_touch.o(i.ap_tp_st_touch_calibration) refers to app_tp_st_touch.o(.data) for .data + app_tp_st_touch.o(i.ap_tp_st_touch_error_handler_F3) refers to app_tp_st_touch.o(i.ap_tp_st_touch_software_reset) for ap_tp_st_touch_software_reset + app_tp_st_touch.o(i.ap_tp_st_touch_error_handler_FF) refers to app_tp_st_touch.o(i.ap_tp_st_touch_software_reset) for ap_tp_st_touch_software_reset + app_tp_st_touch.o(i.ap_tp_st_touch_get_calibration_success_mark) refers to memseta.o(.text) for __aeabi_memclr4 + app_tp_st_touch.o(i.ap_tp_st_touch_get_calibration_success_mark) refers to app_tp_transfer.o(i.app_tp_m_read) for app_tp_m_read + app_tp_st_touch.o(i.ap_tp_st_touch_get_calibration_success_mark) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_st_touch.o(i.ap_tp_st_touch_get_calibration_success_mark) refers to tau_delay.o(i.delayMs) for delayMs + app_tp_st_touch.o(i.ap_tp_st_touch_get_calibration_success_mark) refers to app_tp_transfer.o(i.app_tp_m_write) for app_tp_m_write + app_tp_st_touch.o(i.ap_tp_st_touch_get_calibration_success_mark) refers to app_tp_st_touch.o(.data) for .data + app_tp_st_touch.o(i.ap_tp_st_touch_hardware_reset) refers to tau_log.o(i.LOG_printf) for LOG_printf + app_tp_st_touch.o(i.ap_tp_st_touch_hardware_reset) refers to app_tp_st_touch.o(i.ap_tp_st_touch_simulate_finger_release_event) for ap_tp_st_touch_simulate_finger_release_event + app_tp_st_touch.o(i.ap_tp_st_touch_hardware_reset) refers to app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_init) for ap_tp_st_touch_scan_point_init + app_tp_st_touch.o(i.ap_tp_st_touch_hardware_reset) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + app_tp_st_touch.o(i.ap_tp_st_touch_hardware_reset) refers to tau_delay.o(i.delayMs) for delayMs + app_tp_st_touch.o(i.ap_tp_st_touch_hardware_reset) refers to app_tp_transfer.o(i.app_tp_m_write) for app_tp_m_write + app_tp_st_touch.o(i.ap_tp_st_touch_hardware_reset) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_st_touch.o(i.ap_tp_st_touch_hardware_reset) refers to app_tp_for_custom_s8.o(.data) for g_screen_input_rst_pad + app_tp_st_touch.o(i.ap_tp_st_touch_hardware_reset) refers to app_tp_st_touch.o(.data) for .data + app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_init) refers to app_tp_st_touch.o(.bss) for .bss + app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_record_event) refers to app_tp_st_touch.o(.bss) for .bss + app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_record_event_exec) refers to printfa.o(i.__0printf) for __2printf + app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_record_event_exec) refers to app_tp_st_touch.o(i.ap_tp_st_touch_simulate_finger_release_event) for ap_tp_st_touch_simulate_finger_release_event + app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_record_event_exec) refers to app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_init) for ap_tp_st_touch_scan_point_init + app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_record_event_exec) refers to app_tp_st_touch.o(.bss) for .bss + app_tp_st_touch.o(i.ap_tp_st_touch_simulate_finger_release_event) refers to app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) for app_tp_screen_analysis_int + app_tp_st_touch.o(i.ap_tp_st_touch_simulate_finger_release_event) refers to tau_delay.o(i.delayMs) for delayMs + app_tp_st_touch.o(i.ap_tp_st_touch_software_reset) refers to tau_log.o(i.LOG_printf) for LOG_printf + app_tp_st_touch.o(i.ap_tp_st_touch_software_reset) refers to app_tp_st_touch.o(i.ap_tp_st_touch_simulate_finger_release_event) for ap_tp_st_touch_simulate_finger_release_event + app_tp_st_touch.o(i.ap_tp_st_touch_software_reset) refers to app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_init) for ap_tp_st_touch_scan_point_init + app_tp_st_touch.o(i.ap_tp_st_touch_software_reset) refers to app_tp_transfer.o(i.app_tp_m_write) for app_tp_m_write + app_tp_st_touch.o(i.ap_tp_st_touch_software_reset) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_st_touch.o(i.ap_tp_st_touch_software_reset) refers to tau_delay.o(i.delayMs) for delayMs + app_tp_st_touch.o(i.ap_tp_st_touch_software_reset) refers to app_tp_st_touch.o(.data) for .data + app_tp_st_touch.o(i.app_tp_calibration_exec) refers to app_tp_st_touch.o(i.ap_tp_st_touch_calibration) for ap_tp_st_touch_calibration + app_tp_st_touch.o(i.app_tp_calibration_exec) refers to tau_delay.o(i.delayMs) for delayMs + app_tp_st_touch.o(i.app_tp_calibration_exec) refers to app_tp_st_touch.o(i.ap_tp_st_touch_get_calibration_success_mark) for ap_tp_st_touch_get_calibration_success_mark + app_tp_st_touch.o(i.app_tp_calibration_exec) refers to tau_log.o(i.LOG_printf) for LOG_printf + app_tp_st_touch.o(i.app_tp_calibration_exec) refers to app_tp_st_touch.o(.data) for .data + board.o(i.board_Init) refers to hal_system.o(i.hal_system_init) for hal_system_init + board.o(i.board_Init) refers to hal_system.o(i.hal_system_enable_systick) for hal_system_enable_systick + board.o(i.board_Init) refers to hal_system.o(i.hal_system_init_console) for hal_system_init_console + board.o(i.board_Init) refers to hal_system.o(i.hal_system_set_phy_calibration) for hal_system_set_phy_calibration + startup_armcm0.o(RESET) refers to startup_armcm0.o(STACK) for __initial_sp + startup_armcm0.o(RESET) refers to startup_armcm0.o(.text) for Reset_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.HardFault_Handler) for HardFault_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.SysTick_Handler) for SysTick_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.VIDC_IRQn_Handler) for VIDC_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.LCDC_IRQn_Handler) for LCDC_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.MIPI_RX_IRQn_Handler) for MIPI_RX_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.MIPI_TX_IRQn_Handler) for MIPI_TX_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.MEMC_IRQn_Handler) for MEMC_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.VPRE_IRQn_Handler) for VPRE_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.FLSCTRL_IRQn_Handler) for FLSCTRL_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.DMA_IRQn_Handler) for DMA_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.TIMER0_IRQn_Handler) for TIMER0_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.TIMER1_IRQn_Handler) for TIMER1_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.TIMER2_IRQn_Handler) for TIMER2_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.TIMER3_IRQn_Handler) for TIMER3_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.WDG_IRQn_Handler) for WDG_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.UART_IRQn_Handler) for UART_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.I2C0_IRQn_Handler) for I2C0_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.I2C1_IRQn_Handler) for I2C1_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.SPIS_IRQn_Handler) for SPIS_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.SPIM_IRQn_Handler) for SPIM_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.ADC_IRQn_Handler) for ADC_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.PWMDET_IRQn_Handler) for PWMDET_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.SWIRE_IRQn_Handler) for SWIRE_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.AP_NRESET_IRQn_Handler) for AP_NRESET_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT0_IRQn_Handler) for EXTI_INT0_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT1_IRQn_Handler) for EXTI_INT1_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT2_IRQn_Handler) for EXTI_INT2_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT3_IRQn_Handler) for EXTI_INT3_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT4_IRQn_Handler) for EXTI_INT4_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT5_IRQn_Handler) for EXTI_INT5_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT6_IRQn_Handler) for EXTI_INT6_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT7_IRQn_Handler) for EXTI_INT7_IRQn_Handler + startup_armcm0.o(.text) refers to entry.o(.ARM.Collect$$$$00000000) for __main + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to dadd.o(.text) for __aeabi_dadd + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to drv_vidc.o(i.drv_vidc_set_scld_step) for drv_vidc_set_scld_step + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to drv_vidc.o(i.drv_vidc_set_module_enable) for drv_vidc_set_module_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) for hal_internal_vsync_get_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_dsc_dec.o(i.drv_dsc_dec_disable) for drv_dsc_dec_disable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) for drv_dsi_rx_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_rxbr.o(i.drv_rxbr_enable_irq) for drv_rxbr_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_vidc.o(i.drv_vidc_enable_irq) for drv_vidc_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_memc.o(i.drv_memc_enable_irq) for drv_memc_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) for hal_internal_vsync_get_tx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_config_reset_modules) for drv_crgu_config_reset_modules + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) for hal_internal_vsync_set_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_mode_init) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) refers to dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) for dcs_packet_get_fifo_header + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) refers to dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) for dcs_packet_free_fifo_header + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_pg_cfg) for drv_dsi_rx_set_ddi_pg_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_crgu.o(i.drv_crgu_set_rxbr_src) for drv_crgu_set_rxbr_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_crgu.o(i.drv_crgu_set_rxbr_div) for drv_crgu_set_rxbr_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_pg_cfg) for drv_dsi_rx_set_ipi_pg_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) refers to drv_memc.o(i.drv_memc_gen_a_tear_signal) for drv_memc_gen_a_tear_signal + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_compressen_en) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) for drv_dsi_rx_get_compression_en + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_max_ret_size) for drv_dsi_rx_get_max_ret_size + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) refers to drv_crgu.o(i.drv_crgu_set_rxbr_src) for drv_crgu_set_rxbr_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) refers to drv_crgu.o(i.drv_crgu_set_rxbr_div) for drv_crgu_set_rxbr_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) for drv_dsi_rx_set_ddi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) for hal_dsi_rx_ctrl_set_ipi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) refers to drv_crgu.o(i.drv_crgu_set_dsco_src) for drv_crgu_set_dsco_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) refers to drv_crgu.o(i.drv_crgu_set_dsco_src_div) for drv_crgu_set_dsco_src_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) refers to drv_crgu.o(i.drv_crgu_set_dsc_core_div) for drv_crgu_set_dsc_core_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) refers to drv_crgu.o(i.drv_crgu_set_vidc_src) for drv_crgu_set_vidc_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) refers to drv_crgu.o(i.drv_crgu_set_fb_src) for drv_crgu_set_fb_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) refers to drv_crgu.o(i.drv_crgu_set_fb_div) for drv_crgu_set_fb_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) for hal_dsi_rx_ctrl_init_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_vsync_init_rx) for hal_internal_vsync_init_rx + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) for hal_dsi_rx_ctrl_init_dsi_rx + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) for hal_dsi_rx_ctrl_init_rxbr + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to drv_dsc_dec.o(i.drv_dsc_dec_enable) for drv_dsc_dec_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to drv_dsc_dec.o(i.drv_dsc_dec_set_u8_pps) for drv_dsc_dec_set_u8_pps + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to drv_dsc_dec.o(i.drv_dsc_dec_disable) for drv_dsc_dec_disable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) for hal_dsi_rx_ctrl_init_vidc + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) for hal_dsi_rx_ctrl_init_memc + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) for hal_internal_vsync_set_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to drv_chip_info.o(i.drv_chip_rx_init_done) for drv_chip_rx_init_done + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_vidc_src) for drv_crgu_set_vidc_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_fb_src) for drv_crgu_set_fb_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_fb_div) for drv_crgu_set_fb_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) for hal_dsi_rx_ctrl_set_rxbr_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ctrl_cfg) for drv_dsi_rx_set_ctrl_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) for drv_dsi_rx_set_ddi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) for hal_dsi_rx_ctrl_set_ipi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) for drv_dsi_rx_set_up_phy + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_lane_swap) for drv_dsi_rx_set_lane_swap + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_inten) for drv_dsi_rx_set_inten + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_resp_cnt) for drv_dsi_rx_set_resp_cnt + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) for drv_dsi_rx_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_data_mode) for drv_memc_set_data_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_ltpo_mode) for drv_memc_set_ltpo_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_rate_transfer_sel) for drv_memc_rate_transfer_sel + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_fs_en_conditions) for drv_memc_set_fs_en_conditions + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_lcdc_st_conditions) for drv_memc_set_lcdc_st_conditions + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_sel_vsync) for drv_memc_sel_vsync + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_vidc_sync_cnt) for drv_memc_set_vidc_sync_cnt + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_tear_waveform) for drv_memc_set_tear_waveform + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_double_buffer) for drv_memc_set_double_buffer + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_active_height) for drv_memc_set_active_height + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_inten) for drv_memc_set_inten + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_enable_irq) for drv_memc_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_color_format) for drv_rxbr_set_color_format + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) for drv_rxbr_frame_drop_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_ltpo_drop_th) for drv_rxbr_set_ltpo_drop_th + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_usr_cfg) for drv_rxbr_set_usr_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_usr_col) for drv_rxbr_set_usr_col + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_usr_row) for drv_rxbr_set_usr_row + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_hline_rcv_cfg) for drv_rxbr_hline_rcv_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_enable_irq) for drv_rxbr_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) for hal_internal_vsync_set_auto_hw_filter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_src_parameter) for drv_vidc_set_src_parameter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_pentile_swap) for drv_vidc_set_pentile_swap + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_dst_parameter) for drv_vidc_set_dst_parameter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_init_module_enable) for drv_vidc_init_module_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_rotation) for drv_vidc_set_rotation + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to dadd.o(.text) for __aeabi_dadd + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_step) for drv_vidc_set_scld_step + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_param_init.o(i.drv_param_init_get_scld_filter_h) for drv_param_init_get_scld_filter_h + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_param_init.o(i.drv_param_init_get_scld_filter_v) for drv_param_init_get_scld_filter_v + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_hcoef0) for drv_vidc_set_scld_hcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_hcoef1) for drv_vidc_set_scld_hcoef1 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_vcoef0) for drv_vidc_set_scld_vcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_vcoef1) for drv_vidc_set_scld_vcoef1 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_p2r_hinitr) for drv_vidc_set_p2r_hinitr + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_p2r_hinitb) for drv_vidc_set_p2r_hinitb + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_param_init.o(i.drv_param_p2r_filter_init) for drv_param_p2r_filter_init + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_p2r_hcoef0) for drv_vidc_set_p2r_hcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_mirror) for drv_vidc_set_mirror + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_pu_ctrl) for drv_vidc_set_pu_ctrl + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_irqen) for drv_vidc_set_irqen + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_enable_irq) for drv_vidc_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_pre_init_pps) refers to drv_dsc_dec.o(i.drv_dsc_dec_convert_pps_rc_parameter) for drv_dsc_dec_convert_pps_rc_parameter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_pre_init_pps) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_release_handle) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to drv_dsi_rx.o(i.drv_dsi_rx_shut_down) for drv_dsi_rx_shut_down + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) for hal_dsi_rx_ctrl_init + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) for hal_internal_vsync_get_tx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) for hal_dsi_rx_ctrl_start + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) refers to drv_rxbr.o(i.drv_rxbr_set_ack_pkt_header) for drv_rxbr_set_ack_pkt_header + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) refers to hal_dsi_rx_ctrl.o(.conststring) for .conststring + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_auto_hw_filter) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) for hal_internal_vsync_set_auto_hw_filter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_auto_hw_filter) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) for drv_dsi_rx_set_ddi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to drv_vidc.o(i.drv_vidc_set_scld_hcoef0) for drv_vidc_set_scld_hcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to drv_vidc.o(i.drv_vidc_set_scld_hcoef1) for drv_vidc_set_scld_hcoef1 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to drv_vidc.o(i.drv_vidc_set_scld_vcoef0) for drv_vidc_set_scld_vcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to drv_vidc.o(i.drv_vidc_set_scld_vcoef1) for drv_vidc_set_scld_vcoef1 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to drv_param_init.o(i.drv_param_init_set_scld_filter) for drv_param_init_set_scld_filter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) for hal_internal_vsync_set_sync_line + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) refers to drv_rxbr.o(i.drv_rxbr_hline_rcv0_cfg) for drv_rxbr_hline_rcv0_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_dcs_direct_mode) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_dcs_direct_mode) for hal_internal_vsync_set_dcs_direct_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_cmd_filter) refers to drv_rxbr.o(i.drv_rxbr_set_cmd_filter) for drv_rxbr_set_cmd_filter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_cmd_filter) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) for hal_internal_vsync_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) refers to drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) for drv_dsi_rx_calc_ipi_tx_delay + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_cfg) for drv_dsi_rx_set_ipi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pentile_format) refers to drv_vidc.o(i.drv_vidc_update_src_format) for drv_vidc_update_src_format + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pentile_format) refers to drv_vidc.o(i.drv_vidc_set_pentile_swap) for drv_vidc_set_pentile_swap + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pentile_format) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to dflti.o(.text) for __aeabi_i2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to dmul.o(.text) for __aeabi_dmul + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to ddiv.o(.text) for __aeabi_ddiv + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to dfixi.o(.text) for __aeabi_d2iz + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) for hal_dsi_rx_ctrl_set_rxbr_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) for drv_dsi_rx_set_ddi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) for hal_dsi_rx_ctrl_set_ipi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_rxbr_src) for drv_crgu_set_rxbr_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_rxbr_div) for drv_crgu_set_rxbr_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_dsco_src) for drv_crgu_set_dsco_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_dsco_src_div) for drv_crgu_set_dsco_src_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_dsc_core_div) for drv_crgu_set_dsc_core_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) for hal_internal_vsync_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_te_waveform) refers to drv_memc.o(i.drv_memc_set_tear_waveform) for drv_memc_set_tear_waveform + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_te_waveform) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_tear_mode_ex) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) for hal_internal_vsync_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) refers to drv_dsi_rx.o(i.drv_dsi_rx_power_up) for drv_dsi_rx_power_up + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) for hal_internal_vsync_set_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) refers to drv_dsi_rx.o(i.drv_dsi_rx_shut_down) for drv_dsi_rx_shut_down + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) for hal_internal_vsync_set_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate) refers to drv_memc.o(i.drv_memc_rate_transfer_sel) for drv_memc_rate_transfer_sel + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate) refers to drv_memc.o(i.drv_memc_sel_vsync) for drv_memc_sel_vsync + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate) refers to drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) for drv_rxbr_frame_drop_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate) refers to drv_rxbr.o(i.drv_rxbr_hline_rcv0_cfg) for drv_rxbr_hline_rcv0_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) refers to hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) for hal_internal_sync_input_resolution_change + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to ffltui.o(.text) for __aeabi_ui2f + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to fscalb.o(.text) for __ARM_scalbnf + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to fdiv.o(.text) for __aeabi_fdiv + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to fmul.o(.text) for __aeabi_fmul + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to idiv.o(.text) for __aeabi_idivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to fflti.o(.text) for __aeabi_i2f + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to ffixi.o(.text) for __aeabi_f2iz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to f2d.o(.text) for __aeabi_f2d + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to ceil.o(i.ceil) for ceil + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to dfixi.o(.text) for __aeabi_d2iz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to fadd.o(.text) for __aeabi_fadd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_video_chunk) for drv_dsi_tx_set_video_chunk + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_video_timing) for drv_dsi_tx_set_video_timing + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) refers to fadd.o(.text) for __aeabi_fadd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to ffltui.o(.text) for __aeabi_ui2f + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to fmul.o(.text) for __aeabi_fmul + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to fdiv.o(.text) for __aeabi_fdiv + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to f2d.o(.text) for __aeabi_f2d + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to ceil.o(i.ceil) for ceil + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to drv_phy_common.o(i.drv_phy_get_rate_para) for drv_phy_get_rate_para + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to dfixi.o(.text) for __aeabi_d2iz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to idiv.o(.text) for __aeabi_idivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to fadd.o(.text) for __aeabi_fsub + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to ffixui.o(.text) for __aeabi_f2uiz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) for hal_lcdc_config_upscaler + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic) refers to drv_lcdc.o(i.drv_lcdc_config_src_parameter) for drv_lcdc_config_src_parameter + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_config_reset_modules) for drv_crgu_config_reset_modules + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) for drv_dsi_tx_command_mode_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_mode) for drv_dsi_tx_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_ulps_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) for drv_dsi_tx_phy_ulps_enter + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) for drv_dsi_tx_command_mode_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_mode) for drv_dsi_tx_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_ulps_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) for drv_dsi_tx_phy_ulps_exit + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) for hal_dsi_tx_ctrl_init_clk + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_vsync_init_tx) for hal_internal_vsync_init_tx + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) for hal_dsi_tx_config_params_for_lane_rate + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) for hal_dsi_tx_count_lane_rate + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) for hal_dsi_tx_init_phy_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) for drv_dsi_tx_phy_test_setup + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) for hal_lcdc_init_clk + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) for hal_lcdc_init_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) for hal_dsi_tx_init_dpi_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) for hal_dsi_tx_init_data_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) for hal_dsi_tx_init_remains + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) for hal_dsi_tx_init_interrupt + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ready) for drv_dsi_tx_phy_status_ready + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to drv_dsi_tx.o(i.drv_dsi_tx_powerup) for drv_dsi_tx_powerup + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_panel_reset_pin) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) for hal_dsi_tx_send_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) for drv_dsi_tx_get_cmd_status + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_get_payload) for drv_dsi_tx_command_get_payload + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to memcpya.o(.text) for __aeabi_memcpy + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_release_handle) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) refers to drv_param_init.o(i.drv_param_init_set_ccm) for drv_param_init_set_ccm + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_cus_pq_filter) refers to drv_lcdc.o(i.drv_lcdc_config_scale_up_coef) for drv_lcdc_config_scale_up_coef + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_cus_pq_filter) refers to drv_param_init.o(i.drv_param_init_set_sclu_filter) for drv_param_init_set_sclu_filter + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_endianness) refers to drv_lcdc.o(i.drv_lcdc_config_endianness) for drv_lcdc_config_endianness + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_escape_clock_div) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) for drv_dsi_tx_set_esc_div + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_lp_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_video_mode_set_lp_cmd) for drv_dsi_tx_video_mode_set_lp_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite) for drv_lcdc_config_overwrite + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite_rgb) for drv_lcdc_config_overwrite_rgb + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp) refers to drv_lcdc.o(i.drv_lcdc_config_partial_display_enable) for drv_lcdc_config_partial_display_enable + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp_area) refers to drv_lcdc.o(i.drv_lcdc_config_partial_display_area) for drv_lcdc_config_partial_display_area + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_vpg) for drv_dsi_tx_set_vpg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) for drv_dsi_tx_config_eotp + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) for drv_dsi_tx_phy_clock_lane_req_hs + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_lcdc.o(i.drv_lcdc_enable_shadow_reg) for drv_lcdc_enable_shadow_reg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_lcdc.o(i.drv_lcdc_set_video_hw_mode) for drv_lcdc_set_video_hw_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite) for drv_lcdc_config_overwrite + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_lcdc.o(i.drv_lcdc_start) for drv_lcdc_start + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to drv_lcdc.o(i.drv_lcdc_start) for drv_lcdc_start + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to drv_lcdc.o(i.drv_lcdc_set_int) for drv_lcdc_set_int + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_int) for drv_dsi_tx_set_int + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to drv_dsi_tx.o(i.drv_dsi_tx_shutdown) for drv_dsi_tx_shutdown + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) for drv_dsi_tx_get_cmd_status + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) for hal_dsi_tx_send_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) for drv_dsi_tx_command_put_payload + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) for drv_dsi_tx_get_cmd_status + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) for hal_dsi_tx_send_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) for drv_dsi_tx_command_put_payload + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_mode) for drv_dsi_tx_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_edpi_cmd_size) for drv_dsi_tx_edpi_cmd_size + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) for hal_dsi_tx_init_video_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_dpi_mode) for drv_dsi_tx_dpi_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_dpi_polarity) for drv_dsi_tx_dpi_polarity + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_dpi_lpcmd_time) for drv_dsi_tx_dpi_lpcmd_time + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_int) for drv_dsi_tx_set_int + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) refers to drv_dsi_tx.o(i.drv_dsi_tx_config_int) for drv_dsi_tx_config_int + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_lane_mode) for drv_dsi_tx_phy_lane_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_time_cfg) for drv_dsi_tx_phy_time_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_response_mode) for drv_dsi_tx_response_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) for drv_dsi_tx_set_esc_div + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_time_out_div) for drv_dsi_tx_set_time_out_div + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_timeout_cfg) for drv_dsi_tx_timeout_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) for drv_dsi_tx_config_eotp + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) for drv_dsi_tx_phy_clock_lane_req_hs + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_auto_lp) for drv_dsi_tx_phy_clock_lane_auto_lp + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_video_mode_cfg) for drv_dsi_tx_video_mode_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_bta_ack) for drv_dsi_tx_set_bta_ack + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_video_mode_set_lp_cmd) for drv_dsi_tx_video_mode_set_lp_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_video_mode_disable_hact_cmd) for drv_dsi_tx_video_mode_disable_hact_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) for hal_dsi_tx_calc_video_chunks + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) for drv_dsi_tx_get_cmd_status + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_header) for drv_dsi_tx_command_header + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) for drv_dsi_tx_phy_status_stopstate + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) refers to drv_param_init.o(i.drv_param_init_get_ccm) for drv_param_init_get_ccm + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) refers to drv_lcdc.o(i.drv_lcdc_config_ccm) for drv_lcdc_config_ccm + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_disp_mode) for drv_lcdc_config_disp_mode + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_edpi_mode) for drv_lcdc_config_edpi_mode + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_endianness) for drv_lcdc_config_endianness + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_thresh) for drv_lcdc_config_thresh + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_dpi_polarity) for drv_lcdc_config_dpi_polarity + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_src_parameter) for drv_lcdc_config_src_parameter + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_rgb_to_pentile) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to dadd.o(.text) for __aeabi_dadd + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp_area) for hal_dsi_tx_ctrl_set_partial_disp_area + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp) for hal_dsi_tx_ctrl_set_partial_disp + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to drv_lcdc.o(i.drv_lcdc_config_scale_up_step) for drv_lcdc_config_scale_up_step + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to drv_param_init.o(i.drv_param_init_get_sclu_filter) for drv_param_init_get_sclu_filter + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to drv_lcdc.o(i.drv_lcdc_config_scale_up_coef) for drv_lcdc_config_scale_up_coef + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) for hal_lcdc_config_upscaler + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) for hal_lcdc_config_ccm + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_rgb_to_pentile) for hal_lcdc_config_rgb_to_pentile + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) for hal_lcdc_config_remains + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) for hal_lcdc_init_interrupt + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to ffltui.o(.text) for __aeabi_ui2f + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_dpi_pre_div) for drv_crgu_set_dpi_pre_div + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_dpi_pre_src) for drv_crgu_set_dpi_pre_src + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_dpi_mux_src) for drv_crgu_set_dpi_mux_src + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to fmul.o(.text) for __aeabi_fmul + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to fdiv.o(.text) for __aeabi_fdiv + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to f2d.o(.text) for __aeabi_f2d + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to ceil.o(i.ceil) for ceil + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_lcdc.o(i.drv_lcdc_config_dpi_timing) for drv_lcdc_config_dpi_timing + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to cfrcmple.o(.text) for __aeabi_cfrcmple + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to ffixi.o(.text) for __aeabi_f2iz + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to idiv.o(.text) for __aeabi_idivmod + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_lcdc_div) for drv_crgu_set_lcdc_div + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_lcdc_src) for drv_crgu_set_lcdc_src + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) for hal_internal_vsync_get_sync_line + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) refers to drv_lcdc.o(i.drv_lcdc_set_int) for drv_lcdc_set_int + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) refers to drv_lcdc.o(i.drv_lcdc_ctrl_flow) for drv_lcdc_ctrl_flow + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) refers to drv_lcdc.o(i.drv_lcdc_config_int) for drv_lcdc_config_int + hal_gpio.o(i.hal_gpio_ctrl_eint) refers to drv_gpio.o(i.drv_gpio_set_int) for drv_gpio_set_int + hal_gpio.o(i.hal_gpio_ctrl_eint) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_get_input_data) refers to drv_gpio.o(i.drv_gpio_get_input_data) for drv_gpio_get_input_data + hal_gpio.o(i.hal_gpio_get_int_type) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_get_pull_state) refers to drv_gpio.o(i.drv_gpio_get_pull_state) for drv_gpio_get_pull_state + hal_gpio.o(i.hal_gpio_get_pull_state) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_init_eint) refers to drv_gpio.o(i.drv_gpio_set_ioe) for drv_gpio_set_ioe + hal_gpio.o(i.hal_gpio_init_eint) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_gpio.o(i.hal_gpio_init_eint) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_gpio_group) for drv_sys_cfg_sel_gpio_group + hal_gpio.o(i.hal_gpio_init_eint) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_int_trig) for drv_sys_cfg_sel_int_trig + hal_gpio.o(i.hal_gpio_init_eint) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_gpio.o(i.hal_gpio_init_eint) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_init_input) refers to drv_gpio.o(i.drv_gpio_set_ioe) for drv_gpio_set_ioe + hal_gpio.o(i.hal_gpio_init_input) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_gpio.o(i.hal_gpio_init_input) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_init_output) refers to hal_gpio.o(i.drv_gpio_set_output_data) for drv_gpio_set_output_data + hal_gpio.o(i.hal_gpio_init_output) refers to drv_gpio.o(i.drv_gpio_set_ioe) for drv_gpio_set_ioe + hal_gpio.o(i.hal_gpio_init_output) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_gpio.o(i.hal_gpio_init_output) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_reg_eint_cb) refers to drv_gpio.o(i.drv_gpio_register_callback) for drv_gpio_register_callback + hal_gpio.o(i.hal_gpio_reg_eint_cb) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_ap_reset_int) refers to drv_gpio.o(i.drv_gpio_register_ap_reset_callback) for drv_gpio_register_ap_reset_callback + hal_gpio.o(i.hal_gpio_set_ap_reset_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) for drv_sys_cfg_sel_ap_rst_trig + hal_gpio.o(i.hal_gpio_set_ap_reset_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_gpio.o(i.hal_gpio_set_ap_reset_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + hal_gpio.o(i.hal_gpio_set_driving_strength) refers to drv_gpio.o(i.drv_gpio_set_driving_strength) for drv_gpio_set_driving_strength + hal_gpio.o(i.hal_gpio_set_driving_strength) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_mode) refers to drv_gpio.o(i.drv_gpio_set_mode3) for drv_gpio_set_mode3 + hal_gpio.o(i.hal_gpio_set_mode) refers to drv_gpio.o(i.drv_gpio_set_mode2) for drv_gpio_set_mode2 + hal_gpio.o(i.hal_gpio_set_mode) refers to drv_gpio.o(i.drv_gpio_set_mode1) for drv_gpio_set_mode1 + hal_gpio.o(i.hal_gpio_set_mode) refers to drv_gpio.o(i.drv_gpio_set_mode0) for drv_gpio_set_mode0 + hal_gpio.o(i.hal_gpio_set_mode) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_output_data) refers to hal_gpio.o(i.drv_gpio_set_output_data) for drv_gpio_set_output_data + hal_gpio.o(i.hal_gpio_set_pull_state) refers to drv_gpio.o(i.drv_gpio_set_pull_state) for drv_gpio_set_pull_state + hal_gpio.o(i.hal_gpio_set_pull_state) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_schmitt_trigger) refers to drv_gpio.o(i.drv_gpio_set_schmitt_trigger) for drv_gpio_set_schmitt_trigger + hal_gpio.o(i.hal_gpio_set_schmitt_trigger) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_slew_rate) refers to drv_gpio.o(i.drv_gpio_set_slew_rate) for drv_gpio_set_slew_rate + hal_gpio.o(i.hal_gpio_set_slew_rate) refers to hal_gpio.o(.constdata) for .constdata + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_master.o(i.drv_i2c_master_init) for drv_i2c_master_init + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_master.o(i.drv_i2c_m_set_callback) for drv_i2c_m_set_callback + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_master.o(i.drv_i2c_m_enable_intr) for drv_i2c_m_enable_intr + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_dma.o(i.drv_i2c_dma_init) for drv_i2c_dma_init + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_dma.o(i.drv_i2c_enable_rx_dma) for drv_i2c_enable_rx_dma + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_dma.o(i.drv_i2c_enable_tx_dma) for drv_i2c_enable_tx_dma + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to hal_i2c_master.o(i.hal_i2c_master_irq_callback) for hal_i2c_master_irq_callback + hal_i2c_master.o(i.hal_i2c_m_dma_read) refers to drv_i2c_dma.o(i.drv_i2c_master_read_dma) for drv_i2c_master_read_dma + hal_i2c_master.o(i.hal_i2c_m_dma_read) refers to hal_i2c_master.o(.data) for .data + hal_i2c_master.o(i.hal_i2c_m_dma_write) refers to drv_i2c_dma.o(i.drv_i2c_master_write_dma) for drv_i2c_master_write_dma + hal_i2c_master.o(i.hal_i2c_m_dma_write) refers to hal_i2c_master.o(.data) for .data + hal_i2c_master.o(i.hal_i2c_m_set_high_impedance) refers to drv_i2c_master.o(i.drv_i2c_m_enable) for drv_i2c_m_enable + hal_i2c_master.o(i.hal_i2c_m_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_i2c_master.o(i.hal_i2c_m_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + hal_i2c_master.o(i.hal_i2c_m_transfer_complate) refers to hal_i2c_master.o(.data) for .data + hal_i2c_master.o(i.hal_i2c_master_irq_callback) refers to drv_i2c_master.o(i.drv_i2c_m_clear_it_pending_bit) for drv_i2c_m_clear_it_pending_bit + hal_i2c_master.o(i.hal_i2c_master_irq_callback) refers to hal_i2c_master.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_dma_user_callback) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_dma_write) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + hal_i2c_slave.o(i.hal_i2c_s_dma_write) refers to drv_i2c_dma.o(i.drv_i2c_slave_write_dma) for drv_i2c_slave_write_dma + hal_i2c_slave.o(i.hal_i2c_s_dma_write) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_get_tx_byte_num) refers to drv_i2c_slave.o(i.drv_i2c_s_get_tx_byte_num) for drv_i2c_s_get_tx_byte_num + hal_i2c_slave.o(i.hal_i2c_s_init) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_slave.o(i.drv_i2c_slave_init) for drv_i2c_slave_init + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_slave.o(i.drv_i2c_s_set_callback) for drv_i2c_s_set_callback + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_slave.o(i.drv_i2c_s_enable_intr) for drv_i2c_s_enable_intr + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_dma.o(i.drv_i2c_dma_init) for drv_i2c_dma_init + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) for drv_i2c_set_dma_irq_callback + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) for drv_sys_cfg_set_dma_tx_req + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_dma.o(i.drv_i2c_enable_tx_dma) for drv_i2c_enable_tx_dma + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_dma.o(i.drv_dma_enable_channel_interrupts) for drv_dma_enable_channel_interrupts + hal_i2c_slave.o(i.hal_i2c_s_init) refers to hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) for hal_i2c_slave_irq_callback + hal_i2c_slave.o(i.hal_i2c_s_init) refers to hal_i2c_slave.o(i.hal_i2c_s_dma_user_callback) for hal_i2c_s_dma_user_callback + hal_i2c_slave.o(i.hal_i2c_s_nonblocking_read) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_read_complate) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_read_complate_clear) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_read_data) refers to drv_i2c_slave.o(i.drv_i2c_s_read_data) for drv_i2c_s_read_data + hal_i2c_slave.o(i.hal_i2c_s_rxfifo_notempty) refers to drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) for drv_i2c_s_get_fifo_status + hal_i2c_slave.o(i.hal_i2c_s_set_dma_tx_cycle) refers to drv_dma.o(i.drv_dma_enable_cycle) for drv_dma_enable_cycle + hal_i2c_slave.o(i.hal_i2c_s_set_high_impedance) refers to drv_i2c_slave.o(i.drv_i2c_s_enable) for drv_i2c_s_enable + hal_i2c_slave.o(i.hal_i2c_s_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_i2c_slave.o(i.hal_i2c_s_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + hal_i2c_slave.o(i.hal_i2c_s_set_transfer) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_write_complate) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_write_data) refers to drv_i2c_slave.o(i.drv_i2c_s_write_data) for drv_i2c_s_write_data + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) for drv_i2c_s_get_fifo_status + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_i2c_slave.o(i.drv_i2c_s_clear_it_pending_bit) for drv_i2c_s_clear_it_pending_bit + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_i2c_slave.o(i.drv_i2c_s_write_data) for drv_i2c_s_write_data + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_i2c_slave.o(.data) for tx_byte_num + hal_spi_master.o(i.hal_spi_m_callback) refers to drv_spi_dma.o(i.drv_spi_abort_dma) for drv_spi_abort_dma + hal_spi_master.o(i.hal_spi_m_callback) refers to hal_spi_master.o(.data) for .data + hal_spi_master.o(i.hal_spi_m_clear_rxfifo) refers to drv_spi_master.o(i.drv_spi_m_read_data) for drv_spi_m_read_data + hal_spi_master.o(i.hal_spi_m_dma_init) refers to hal_spi_master.o(i.hal_spi_m_gpio_init) for hal_spi_m_gpio_init + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_master.o(i.drv_spi_master_init) for drv_spi_master_init + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_dma.o(i.drv_spi_dma_init) for drv_spi_dma_init + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_dma.o(i.drv_spi_dma_ch6_init) for drv_spi_dma_ch6_init + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) for drv_spi_set_dma_irq_callback + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) for drv_spi_set_dma_ch6_irq_callback + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) for drv_sys_cfg_set_dma_rx_req + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) for drv_sys_cfg_set_dma_tx_req + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_master.o(i.drv_spi_m_enable_rx_dma) for drv_spi_m_enable_rx_dma + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_master.o(i.drv_spi_m_enable_tx_dma) for drv_spi_m_enable_tx_dma + hal_spi_master.o(i.hal_spi_m_dma_init) refers to hal_spi_master.o(i.hal_spi_m_callback) for hal_spi_m_callback + hal_spi_master.o(i.hal_spi_m_dma_read) refers to drv_spi_dma.o(i.drv_spim_dma_read) for drv_spim_dma_read + hal_spi_master.o(i.hal_spi_m_dma_read) refers to hal_spi_master.o(.data) for .data + hal_spi_master.o(i.hal_spi_m_dma_write) refers to drv_spi_dma.o(i.drv_spim_dma_write) for drv_spim_dma_write + hal_spi_master.o(i.hal_spi_m_dma_write) refers to hal_spi_master.o(.data) for .data + hal_spi_master.o(i.hal_spi_m_get_transfer_complate) refers to hal_spi_master.o(.data) for .data + hal_spi_master.o(i.hal_spi_m_gpio_init) refers to drv_spi_master.o(i.drv_spi_m_gpio_init) for drv_spi_m_gpio_init + hal_spi_master.o(i.hal_spi_m_read_rxfifo) refers to drv_spi_master.o(i.drv_spi_m_read_data) for drv_spi_m_read_data + hal_spi_master.o(i.hal_spi_m_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_spi_master.o(i.hal_spi_m_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_init_input) for hal_gpio_init_input + hal_spi_master.o(i.hal_spi_m_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + hal_system.o(i.hal_system_deep_sleep_mode) refers to drv_pwr.o(i.drv_pwr_enter_deep_sleep_mode) for drv_pwr_enter_deep_sleep_mode + hal_system.o(i.hal_system_disable_systick) refers to drv_common.o(i.drv_common_disable_systick) for drv_common_disable_systick + hal_system.o(i.hal_system_enable_systick) refers to drv_common.o(i.drv_common_enable_systick) for drv_common_enable_systick + hal_system.o(i.hal_system_flash_read) refers to norflash.o(i.norflash_init) for norflash_init + hal_system.o(i.hal_system_flash_read) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + hal_system.o(i.hal_system_flash_read) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_system.o(i.hal_system_flash_read) refers to norflash.o(i.norflash_dual_read) for norflash_dual_read + hal_system.o(i.hal_system_flash_write) refers to norflash.o(i.norflash_init) for norflash_init + hal_system.o(i.hal_system_flash_write) refers to norflash.o(i.norflash_erase_block) for norflash_erase_block + hal_system.o(i.hal_system_flash_write) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_system.o(i.hal_system_flash_write) refers to norflash.o(i.norflash_write) for norflash_write + hal_system.o(i.hal_system_get_tick) refers to drv_common.o(i.drv_common_get_tick) for drv_common_get_tick + hal_system.o(i.hal_system_idle_mode) refers to drv_common.o(i.drv_common_idle_mode) for drv_common_idle_mode + hal_system.o(i.hal_system_init) refers to drv_pwr.o(i.drv_pwr_set_system_clk_src) for drv_pwr_set_system_clk_src + hal_system.o(i.hal_system_init) refers to drv_crgu.o(i.drv_crgu_set_ahb_src) for drv_crgu_set_ahb_src + hal_system.o(i.hal_system_init) refers to drv_crgu.o(i.drv_crgu_set_ahb_pre_div) for drv_crgu_set_ahb_pre_div + hal_system.o(i.hal_system_init) refers to irq_redirect .o(i.handle_init) for handle_init + hal_system.o(i.hal_system_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_all_int) for drv_sys_cfg_clear_all_int + hal_system.o(i.hal_system_init) refers to drv_common.o(i.drv_common_system_init) for drv_common_system_init + hal_system.o(i.hal_system_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_system.o(i.hal_system_init) refers to drv_pwr.o(i.drv_pwr_set_pvd_mode) for drv_pwr_set_pvd_mode + hal_system.o(i.hal_system_init) refers to drv_common.o(.data) for g_system_clock + hal_system.o(i.hal_system_init_console) refers to hal_uart.o(i.hal_uart_init) for hal_uart_init + hal_system.o(i.hal_system_register_systick_cb) refers to drv_common.o(i.drv_common_systick_register_cb) for drv_common_systick_register_cb + hal_system.o(i.hal_system_set_phy_calibration) refers to drv_phy_common.o(i.drv_phy_enable_calibration) for drv_phy_enable_calibration + hal_system.o(i.hal_system_set_pvd) refers to drv_pwr.o(i.drv_pwr_set_pvd_mode) for drv_pwr_set_pvd_mode + hal_system.o(i.hal_system_set_vcc) refers to drv_pwr.o(i.drv_pwr_set_cp_mode) for drv_pwr_set_cp_mode + hal_system.o(i.hal_system_share_flash_mode) refers to drv_fls.o(i.drv_fls_gpio_connect) for drv_fls_gpio_connect + hal_system.o(i.hal_system_share_flash_mode) refers to drv_fls.o(i.drv_fls_gpio_disconnect) for drv_fls_gpio_disconnect + hal_system.o(i.hal_system_sleep_mode) refers to drv_crgu.o(i.drv_crgu_config_clocks) for drv_crgu_config_clocks + hal_timer.o(i.hal_timer_deinit) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + hal_timer.o(i.hal_timer_deinit) refers to drv_timer.o(i.drv_timer_set_repeat) for drv_timer_set_repeat + hal_timer.o(i.hal_timer_deinit) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_timer.o(i.hal_timer_deinit) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_timer.o(i.hal_timer_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_timer.o(i.hal_timer_get_status) refers to drv_timer.o(i.drv_timer_get_current_count) for drv_timer_get_current_count + hal_timer.o(i.hal_timer_get_status) refers to drv_timer.o(i.drv_timer_get_match) for drv_timer_get_match + hal_timer.o(i.hal_timer_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_timer.o(i.hal_timer_init) refers to drv_timer.o(i.drv_timer_set_prescaler) for drv_timer_set_prescaler + hal_timer.o(i.hal_timer_set_repeat) refers to drv_timer.o(i.drv_timer_set_repeat) for drv_timer_set_repeat + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_register_callback) for drv_timer_register_callback + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_get_prescaler) for drv_timer_get_prescaler + hal_timer.o(i.hal_timer_start) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_set_match) for drv_timer_set_match + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_set_current_count) for drv_timer_set_current_count + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_timer.o(i.hal_timer_start) refers to drv_common.o(.data) for g_system_clock + hal_timer.o(i.hal_timer_stop) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_timer.o(i.hal_timer_stop) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + hal_timer.o(i.hal_timer_stop) refers to drv_timer.o(i.drv_timer_register_callback) for drv_timer_register_callback + hal_timer.o(i.hal_timer_stop) refers to drv_timer.o(i.drv_timer_set_match) for drv_timer_set_match + hal_timer.o(i.hal_timer_stop) refers to drv_timer.o(i.drv_timer_set_current_count) for drv_timer_set_current_count + tau_delay.o(i.delayMs) refers to tau_delay.o(i.delayUs) for delayUs + tau_log.o(i.LOG_printf) refers to printfa.o(i.__0vsprintf) for vsprintf + tau_log.o(i.LOG_printf) refers to printfa.o(i.__0printf) for __2printf + tau_log.o(i.LOG_printf) refers to tau_log.o(.bss) for .bss + tau_log.o(i.fgetc) refers to hal_uart.o(i.hal_uart_receive_blocking) for hal_uart_receive_blocking + tau_log.o(i.fputc) refers to hal_uart.o(i.hal_uart_transmit_blocking) for hal_uart_transmit_blocking + app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) refers to app_tp_for_custom_s8.o(.data) for .data + app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) refers to app_tp_for_custom_s8.o(.constdata) for .constdata + app_tp_for_custom_s8.o(i.app_tp_screen_analysis_const) refers to app_tp_transfer.o(i.app_tp_screen_init) for app_tp_screen_init + app_tp_for_custom_s8.o(i.app_tp_screen_analysis_const) refers to app_tp_for_custom_s8.o(.data) for .data + app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) refers to uidiv.o(.text) for __aeabi_uidivmod + app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) refers to app_tp_for_custom_s8.o(.data) for .data + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_1 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_2 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_3 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_4 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_5 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_6 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_7 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for phone_reg_point_data + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for phone_reg_point_back + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for phone_reg_coord_data + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for phone_reg_coord_back + hal_uart.o(i.hal_uart_deinit) refers to drv_dma.o(i.drv_dma_deinit) for drv_dma_deinit + hal_uart.o(i.hal_uart_deinit) refers to drv_uart.o(i.UART_Deinit) for UART_Deinit + hal_uart.o(i.hal_uart_dmacallback) refers to hal_uart.o(.bss) for .bss + hal_uart.o(i.hal_uart_init) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_uart.o(i.hal_uart_init) refers to memseta.o(.text) for __aeabi_memclr4 + hal_uart.o(i.hal_uart_init) refers to drv_uart.o(i.UART_init) for UART_init + hal_uart.o(i.hal_uart_init) refers to drv_common.o(.data) for g_system_clock + hal_uart.o(i.hal_uart_init) refers to hal_uart.o(.bss) for .bss + hal_uart.o(i.hal_uart_receive_blocking) refers to drv_uart.o(i.UART_ReadBlocking) for UART_ReadBlocking + hal_uart.o(i.hal_uart_receive_dma) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + hal_uart.o(i.hal_uart_receive_dma) refers to drv_uart_dma.o(i.UART_TransferCreateHandleDMA) for UART_TransferCreateHandleDMA + hal_uart.o(i.hal_uart_receive_dma) refers to drv_uart_dma.o(i.UART_TransferReceiveDMA) for UART_TransferReceiveDMA + hal_uart.o(i.hal_uart_receive_dma) refers to hal_uart.o(.bss) for .bss + hal_uart.o(i.hal_uart_receive_dma) refers to hal_uart.o(i.hal_uart_dmacallback) for hal_uart_dmacallback + hal_uart.o(i.hal_uart_transmit_blocking) refers to drv_uart.o(i.UART_WriteBlocking) for UART_WriteBlocking + hal_uart.o(i.hal_uart_transmit_dma) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + hal_uart.o(i.hal_uart_transmit_dma) refers to drv_uart_dma.o(i.UART_TransferCreateHandleDMA) for UART_TransferCreateHandleDMA + hal_uart.o(i.hal_uart_transmit_dma) refers to drv_uart_dma.o(i.UART_TransferSendDMA) for UART_TransferSendDMA + hal_uart.o(i.hal_uart_transmit_dma) refers to hal_uart.o(.bss) for .bss + hal_uart.o(i.hal_uart_transmit_dma) refers to hal_uart.o(i.hal_uart_dmacallback) for hal_uart_dmacallback + norflash.o(i.app_fls_ctrl_Handler) refers to drv_fls.o(i.fls_clr_interrupt_flag) for fls_clr_interrupt_flag + norflash.o(i.app_fls_ctrl_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + norflash.o(i.app_fls_ctrl_Handler) refers to norflash.o(.data) for .data + norflash.o(i.norflash_best_cfg_init) refers to drv_fls.o(i.fls_spi_init) for fls_spi_init + norflash.o(i.norflash_best_cfg_init) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_check_id) refers to norflash.o(i.norflash_read_id) for norflash_read_id + norflash.o(i.norflash_check_id) refers to tau_delay.o(i.delayUs) for delayUs + norflash.o(i.norflash_check_id) refers to norflash.o(.data) for .data + norflash.o(i.norflash_dma_callback) refers to norflash.o(.data) for .data + norflash.o(i.norflash_dma_read) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + norflash.o(i.norflash_dma_read) refers to drv_fls_dma.o(i.fls_transfer_create_handle_dma) for fls_transfer_create_handle_dma + norflash.o(i.norflash_dma_read) refers to drv_fls_dma.o(i.fls_dma_read_prepare) for fls_dma_read_prepare + norflash.o(i.norflash_dma_read) refers to drv_fls_dma.o(i.fls_transfer_dma) for fls_transfer_dma + norflash.o(i.norflash_dma_read) refers to drv_fls_dma.o(i.fls_dma_disable) for fls_dma_disable + norflash.o(i.norflash_dma_read) refers to norflash.o(.data) for .data + norflash.o(i.norflash_dma_read) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_dma_read) refers to norflash.o(i.norflash_dma_callback) for norflash_dma_callback + norflash.o(i.norflash_dma_write) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + norflash.o(i.norflash_dma_write) refers to drv_fls_dma.o(i.fls_transfer_create_handle_dma) for fls_transfer_create_handle_dma + norflash.o(i.norflash_dma_write) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_dma_write) refers to norflash.o(i.norflash_switch_fls_spi) for norflash_switch_fls_spi + norflash.o(i.norflash_dma_write) refers to drv_fls_dma.o(i.fls_dma_write_prepare) for fls_dma_write_prepare + norflash.o(i.norflash_dma_write) refers to drv_fls_dma.o(i.fls_transfer_dma) for fls_transfer_dma + norflash.o(i.norflash_dma_write) refers to drv_fls_dma.o(i.fls_dma_disable) for fls_dma_disable + norflash.o(i.norflash_dma_write) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_dma_write) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_dma_write) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_dma_write) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_dma_write) refers to norflash.o(i.norflash_dma_callback) for norflash_dma_callback + norflash.o(i.norflash_dma_write) refers to norflash.o(.data) for .data + norflash.o(i.norflash_dual_read) refers to drv_fls.o(i.fls_ddat_enable) for fls_ddat_enable + norflash.o(i.norflash_dual_read) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_dual_read) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_dual_write) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_dual_write) refers to norflash.o(i.norflash_switch_fls_spi) for norflash_switch_fls_spi + norflash.o(i.norflash_dual_write) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_dual_write) refers to drv_fls.o(i.fls_ddat_enable) for fls_ddat_enable + norflash.o(i.norflash_dual_write) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_dual_write) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_en4b) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_en4b) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + norflash.o(i.norflash_en4b) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_en4b) refers to norflash.o(i.norflash_read_config_reg) for norflash_read_config_reg + norflash.o(i.norflash_en4b) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_en_quad) refers to norflash.o(i.norflash_en_quad_check) for norflash_en_quad_check + norflash.o(i.norflash_en_quad) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_en_quad) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_en_quad) refers to drv_fls.o(i.fls_busy_pending) for fls_busy_pending + norflash.o(i.norflash_en_quad) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_en_quad_check) refers to norflash.o(i.norflash_get_dual_hstatus) for norflash_get_dual_hstatus + norflash.o(i.norflash_en_quad_check) refers to norflash.o(i.norflash_get_hstatus) for norflash_get_hstatus + norflash.o(i.norflash_en_quad_check) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_en_quad_check) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_erase_block) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_erase_block) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_erase_block) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_erase_block) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_erase_chip) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_erase_chip) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + norflash.o(i.norflash_erase_chip) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_erase_sector) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_erase_sector) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_erase_sector) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_erase_sector) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_ex4b) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_ex4b) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + norflash.o(i.norflash_ex4b) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_ex4b) refers to norflash.o(i.norflash_read_config_reg) for norflash_read_config_reg + norflash.o(i.norflash_ex4b) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_exit_quad) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_exit_quad) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_exit_quad) refers to norflash.o(i.norflash_en_quad_check) for norflash_en_quad_check + norflash.o(i.norflash_exit_quad) refers to drv_fls.o(i.fls_busy_pending) for fls_busy_pending + norflash.o(i.norflash_exit_quad) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_get_dual_hstatus) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_get_dual_hstatus) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_get_dual_hstatus) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_get_hstatus) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_get_hstatus) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_get_hstatus) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_get_status) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_get_status) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_get_status) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_init) refers to drv_fls.o(i.fls_get_default_spi_config) for fls_get_default_spi_config + norflash.o(i.norflash_init) refers to drv_fls.o(i.fls_get_default_fls_config) for fls_get_default_fls_config + norflash.o(i.norflash_init) refers to drv_fls.o(i.fls_get_default_tuning) for fls_get_default_tuning + norflash.o(i.norflash_init) refers to drv_fls.o(i.fls_init) for fls_init + norflash.o(i.norflash_init) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_init) refers to drv_fls.o(.data) for g_fls_tuning + norflash.o(i.norflash_quad_read) refers to drv_fls.o(i.fls_qdat_enable) for fls_qdat_enable + norflash.o(i.norflash_quad_read) refers to drv_fls.o(i.fls_qadr_enable) for fls_qadr_enable + norflash.o(i.norflash_quad_read) refers to drv_fls.o(i.fls_qcmd_enable) for fls_qcmd_enable + norflash.o(i.norflash_quad_read) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_quad_read) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_quad_write) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_quad_write) refers to norflash.o(i.norflash_switch_fls_spi) for norflash_switch_fls_spi + norflash.o(i.norflash_quad_write) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_quad_write) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_quad_write) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_quad_write) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_read) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_read_config_reg) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_read_id) refers to drv_fls.o(i.fls_read_cmd) for fls_read_cmd + norflash.o(i.norflash_set_best_cfg) refers to memseta.o(.text) for __aeabi_memclr4 + norflash.o(i.norflash_set_best_read_cfg) refers to norflash.o(i.norflash_en_quad) for norflash_en_quad + norflash.o(i.norflash_set_best_read_cfg) refers to norflash.o(.data) for .data + norflash.o(i.norflash_set_best_read_cfg) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_set_best_write_cfg) refers to norflash.o(i.norflash_en_quad) for norflash_en_quad + norflash.o(i.norflash_set_best_write_cfg) refers to norflash.o(.data) for .data + norflash.o(i.norflash_set_best_write_cfg) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_switch_fls_spi) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_switch_fls_spi) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_switch_fls_spi) refers to drv_fls.o(i.fls_ddat_enable) for fls_ddat_enable + norflash.o(i.norflash_switch_fls_spi) refers to drv_fls.o(i.fls_qdat_enable) for fls_qdat_enable + norflash.o(i.norflash_switch_fls_spi) refers to drv_fls.o(i.fls_qadr_enable) for fls_qadr_enable + norflash.o(i.norflash_write) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_write) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_write) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_write) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_write_disable) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + norflash.o(i.norflash_write_disable) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_write_disable) refers to norflash.o(.data) for .data + norflash.o(i.norflash_write_disable) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_write_enable) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + norflash.o(i.norflash_write_enable) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_write_enable) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_write_enable) refers to norflash.o(.data) for .data + norflash.o(i.norflash_write_endian_scr) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_write_endian_scr) refers to norflash.o(i.norflash_big_end_enable) for norflash_big_end_enable + norflash.o(i.norflash_write_endian_scr) refers to drv_fls.o(i.fls_en_scr) for fls_en_scr + norflash.o(i.norflash_write_endian_scr) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_write_endian_scr) refers to norflash.o(i.norflash_big_end_clear) for norflash_big_end_clear + norflash.o(i.norflash_write_endian_scr) refers to drv_fls.o(i.fls_scr_clear) for fls_scr_clear + norflash.o(i.norflash_write_endian_scr) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_write_endian_scr) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + drv_common.o(i.app_HardFault_Handler) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_common.o(i.app_SysTick_Handler) refers to drv_common.o(.data) for .data + drv_common.o(i.drv_common_enable_systick) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_common.o(i.drv_common_enable_systick) refers to drv_common.o(.data) for .data + drv_common.o(i.drv_common_get_tick) refers to drv_common.o(.data) for .data + drv_common.o(i.drv_common_system_init) refers to drv_chip_info.o(i.drv_chip_info_init) for drv_chip_info_init + drv_common.o(i.drv_common_systick_register_cb) refers to drv_common.o(.data) for .data + drv_dma.o(i.app_dma_irq_handler) refers to drv_dma.o(i.drv_dma_irq_handler) for drv_dma_irq_handler + drv_dma.o(i.drv_dma_abort_transfer) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + drv_dma.o(i.drv_dma_abort_transfer) refers to drv_dma.o(i.drv_dma_disenable_channel_interrupts) for drv_dma_disenable_channel_interrupts + drv_dma.o(i.drv_dma_ahb_init) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + drv_dma.o(i.drv_dma_ahb_init) refers to drv_dma.o(i.drv_dma_disenable_channel_interrupts) for drv_dma_disenable_channel_interrupts + drv_dma.o(i.drv_dma_ahb_init) refers to drv_dma.o(i.drv_dma_clear_flag) for drv_dma_clear_flag + drv_dma.o(i.drv_dma_ahb_init) refers to drv_dma.o(i.drv_dma_set_ccr) for drv_dma_set_ccr + drv_dma.o(i.drv_dma_ahb_init) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_dma.o(i.drv_dma_clear_flag) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dma.o(i.drv_dma_create_handle) refers to drv_dma.o(.bss) for .bss + drv_dma.o(i.drv_dma_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_dma.o(i.drv_dma_disenable_channel_interrupts) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dma.o(i.drv_dma_enable_channel_interrupts) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_dma.o(i.drv_dma_enable_cycle) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + drv_dma.o(i.drv_dma_get_remaining_bytes) refers to drv_dma.o(i.drv_dma_channel_is_active) for drv_dma_channel_is_active + drv_dma.o(i.drv_dma_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_dma.o(i.drv_dma_init) refers to drv_dma.o(i.drv_dma_ahb_init) for drv_dma_ahb_init + drv_dma.o(i.drv_dma_irq_handler) refers to drv_dma.o(i.drv_dma_get_channel_flag) for drv_dma_get_channel_flag + drv_dma.o(i.drv_dma_irq_handler) refers to drv_dma.o(i.drv_dma_clear_flag) for drv_dma_clear_flag + drv_dma.o(i.drv_dma_irq_handler) refers to drv_dma.o(.bss) for .bss + drv_dma.o(i.drv_dma_m2m_init) refers to memseta.o(.text) for __aeabi_memclr4 + drv_dma.o(i.drv_dma_m2m_init) refers to drv_dma.o(i.drv_dma_init) for drv_dma_init + drv_dma.o(i.drv_dma_reset) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + drv_dma.o(i.drv_dma_set_burst) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + drv_dma.o(i.drv_dma_set_transfer) refers to drv_dma.o(i.drv_dma_set_burst) for drv_dma_set_burst + drv_dma.o(i.drv_dma_start_transfer) refers to drv_dma.o(i.drv_dma_enable_channel_interrupts) for drv_dma_enable_channel_interrupts + drv_dma.o(i.drv_dma_start_transfer) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_fls.o(i.drv_fls_gpio_connect) refers to drv_fls.o(i.drv_fls_gpio_disconnect) for drv_fls_gpio_disconnect + drv_fls.o(i.drv_fls_gpio_disconnect) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_fls.o(i.fls_EnableClk) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_fls.o(i.fls_busy_pending) refers to norflash.o(i.norflash_get_status) for norflash_get_status + drv_fls.o(i.fls_de_init) refers to drv_fls_dma.o(i.fls_dma_disable) for fls_dma_disable + drv_fls.o(i.fls_de_init) refers to drv_dma.o(i.drv_dma_clear_flag) for drv_dma_clear_flag + drv_fls.o(i.fls_de_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_fls.o(i.fls_disable_it) refers to drv_fls.o(i.__NVIC_DisableIRQ) for __NVIC_DisableIRQ + drv_fls.o(i.fls_disable_it) refers to drv_fls.o(i.fls_set_mc_irq_mask) for fls_set_mc_irq_mask + drv_fls.o(i.fls_enable_it) refers to drv_fls.o(i.__NVIC_DisableIRQ) for __NVIC_DisableIRQ + drv_fls.o(i.fls_enable_it) refers to drv_fls.o(i.fls_set_mc_irq_mask) for fls_set_mc_irq_mask + drv_fls.o(i.fls_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_fls.o(i.fls_init) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + drv_fls.o(i.fls_init) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_init) refers to drv_fls.o(i.fls_spi_init) for fls_spi_init + drv_fls.o(i.fls_init) refers to drv_fls.o(i.fls_ctrl_cfg_init) for fls_ctrl_cfg_init + drv_fls.o(i.fls_init) refers to drv_fls.o(i.fls_set_tuning) for fls_set_tuning + drv_fls.o(i.fls_init) refers to drv_fls_dma.o(i.fls_dma_disable) for fls_dma_disable + drv_fls.o(i.fls_read_byte_data) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_read_byte_data) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls.o(i.fls_read_byte_data) refers to drv_fls.o(i.fls_set_read) for fls_set_read + drv_fls.o(i.fls_read_byte_data) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls.o(i.fls_read_cmd) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_read_cmd) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls.o(i.fls_read_cmd) refers to drv_fls.o(i.fls_set_read) for fls_set_read + drv_fls.o(i.fls_read_cmd) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls.o(i.fls_read_cmd_it) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_read_cmd_it) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls.o(i.fls_read_cmd_it) refers to drv_fls.o(i.fls_set_read) for fls_set_read + drv_fls.o(i.fls_read_cmd_it) refers to drv_fls.o(i.fls_enable_it) for fls_enable_it + drv_fls.o(i.fls_read_cmd_it) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls.o(i.fls_set_mc_irq_mask) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_fls.o(i.fls_set_mc_irq_mask) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_fls.o(i.fls_write_byte_data) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_write_byte_data) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls.o(i.fls_write_byte_data) refers to drv_fls.o(i.fls_set_write) for fls_set_write + drv_fls.o(i.fls_write_byte_data) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls.o(i.fls_write_cmd) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_write_cmd) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls.o(i.fls_write_cmd) refers to drv_fls.o(i.fls_set_write) for fls_set_write + drv_fls.o(i.fls_write_cmd) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) for drv_ap_rst_trig_edge_detect + drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) refers to drv_gpio.o(.data) for .data + drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.drv_gpio_get_pull_state) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_gpio.o(i.drv_gpio_register_ap_reset_callback) refers to drv_gpio.o(.data) for .data + drv_gpio.o(i.drv_gpio_register_callback) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.drv_gpio_set_driving_strength) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_gpio.o(i.drv_gpio_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_gpio.o(i.drv_gpio_set_pull_state) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_gpio.o(i.drv_gpio_set_schmitt_trigger) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_gpio.o(i.drv_gpio_set_slew_rate) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_i2c_dma.o(i.drv_i2c_dma_callback) refers to drv_i2c_dma.o(.data) for .data + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_i2c_master.o(i.drv_i2c_m_enable) for drv_i2c_m_enable + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) for drv_sys_cfg_set_dma_rx_req + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_dma.o(i.drv_dma_set_transfer) for drv_dma_set_transfer + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_i2c_dma.o(i.drv_i2c_master_write_read_cmd) for drv_i2c_master_write_read_cmd + drv_i2c_dma.o(i.drv_i2c_master_write_dma) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) for drv_sys_cfg_set_dma_tx_req + drv_i2c_dma.o(i.drv_i2c_master_write_dma) refers to drv_dma.o(i.drv_dma_set_transfer) for drv_dma_set_transfer + drv_i2c_dma.o(i.drv_i2c_master_write_dma) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_i2c_dma.o(i.drv_i2c_master_write_dma) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) refers to drv_dma.o(i.drv_dma_set_callback) for drv_dma_set_callback + drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) refers to drv_i2c_dma.o(.data) for .data + drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) refers to drv_i2c_dma.o(.bss) for .bss + drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) refers to drv_i2c_dma.o(i.drv_i2c_dma_callback) for drv_i2c_dma_callback + drv_i2c_dma.o(i.drv_i2c_slave_write_dma) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_i2c_master.o(i.app_I2C1_IRQn_Handler) refers to drv_i2c_master.o(.data) for .data + drv_i2c_master.o(i.drv_i2c_m_clear_it_pending_bit) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_i2c_master.o(i.drv_i2c_m_clear_it_pending_bit) refers to drv_i2c_master.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_i2c_master.o(i.drv_i2c_m_enable_intr) refers to drv_i2c_master.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_i2c_master.o(i.drv_i2c_m_read_data) refers to drv_i2c_master.o(i.drv_i2c_m_get_fifo_status) for drv_i2c_m_get_fifo_status + drv_i2c_master.o(i.drv_i2c_m_set_callback) refers to drv_i2c_master.o(.data) for .data + drv_i2c_master.o(i.drv_i2c_m_set_sys_mask) refers to drv_i2c_master.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_i2c_master.o(i.drv_i2c_m_write_data) refers to drv_i2c_master.o(i.drv_i2c_m_get_fifo_status) for drv_i2c_m_get_fifo_status + drv_i2c_master.o(i.drv_i2c_master_init) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_i2c_master.o(i.drv_i2c_master_init) refers to drv_common.o(.data) for g_system_clock + drv_i2c_slave.o(i.app_I2C0_IRQn_Handler) refers to drv_i2c_slave.o(.data) for .data + drv_i2c_slave.o(i.drv_i2c_s_clear_it_pending_bit) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_i2c_slave.o(i.drv_i2c_s_clear_it_pending_bit) refers to drv_i2c_slave.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_i2c_slave.o(i.drv_i2c_s_enable_intr) refers to drv_i2c_slave.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_i2c_slave.o(i.drv_i2c_s_get_tx_byte_num) refers to drv_i2c_slave.o(.data) for .data + drv_i2c_slave.o(i.drv_i2c_s_read_data) refers to drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) for drv_i2c_s_get_fifo_status + drv_i2c_slave.o(i.drv_i2c_s_set_callback) refers to drv_i2c_slave.o(.data) for .data + drv_i2c_slave.o(i.drv_i2c_s_set_sys_mask) refers to drv_i2c_slave.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_i2c_slave.o(i.drv_i2c_s_write_data) refers to drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) for drv_i2c_s_get_fifo_status + drv_param_init.o(i.drv_param_init_get_ccm) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_get_scld_filter_h) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_get_scld_filter_v) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_get_sclu_filter) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_set_ccm) refers to memcpya.o(.text) for __aeabi_memcpy4 + drv_param_init.o(i.drv_param_init_set_ccm) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_set_scld_filter) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_set_sclu_filter) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_p2r_filter_init) refers to drv_param_init.o(.constdata) for .constdata + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_dma.o(i.drv_dma_disenable_channel_interrupts) for drv_dma_disenable_channel_interrupts + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_master.o(i.drv_spi_m_enable_tx_dma) for drv_spi_m_enable_tx_dma + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_master.o(i.drv_spi_m_enable_rx_dma) for drv_spi_m_enable_rx_dma + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_slave.o(i.drv_spi_s_enable_tx_dma) for drv_spi_s_enable_tx_dma + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_slave.o(i.drv_spi_s_enable_rx_dma) for drv_spi_s_enable_rx_dma + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_dma.o(.bss) for .bss + drv_spi_dma.o(i.drv_spi_dma_callback) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_dma_ch6_init) refers to drv_spi_dma.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_spi_dma.o(i.drv_spi_dma_ch6_init) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_dma_init) refers to drv_spi_dma.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_spi_dma.o(i.drv_spi_dma_init) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) refers to drv_dma.o(i.drv_dma_set_callback) for drv_dma_set_callback + drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) refers to drv_spi_dma.o(.bss) for .bss + drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) refers to drv_spi_dma.o(i.drv_spi_dma_callback) for drv_spi_dma_callback + drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) refers to drv_dma.o(i.drv_dma_set_callback) for drv_dma_set_callback + drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) refers to drv_spi_dma.o(.bss) for .bss + drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) refers to drv_spi_dma.o(i.drv_spi_dma_callback) for drv_spi_dma_callback + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_spi_master.o(i.drv_spi_m_enable_rx_dma) for drv_spi_m_enable_rx_dma + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_spi_master.o(i.drv_spi_m_enable_tx_dma) for drv_spi_m_enable_tx_dma + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_dma.o(i.drv_dma_enable_channel_interrupts) for drv_dma_enable_channel_interrupts + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spim_dma_write) refers to drv_spi_master.o(i.drv_spi_m_enable_tx_dma) for drv_spi_m_enable_tx_dma + drv_spi_dma.o(i.drv_spim_dma_write) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_spi_dma.o(i.drv_spim_dma_write) refers to drv_dma.o(i.drv_dma_enable_channel_interrupts) for drv_dma_enable_channel_interrupts + drv_spi_dma.o(i.drv_spim_dma_write) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_spi_dma.o(i.drv_spim_dma_write) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spis_dma_write) refers to drv_spi_slave.o(i.drv_spi_s_enable_tx_dma) for drv_spi_s_enable_tx_dma + drv_spi_dma.o(i.drv_spis_dma_write) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_spi_dma.o(i.drv_spis_dma_write) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_spi_dma.o(i.drv_spis_dma_write) refers to drv_spi_dma.o(.bss) for .bss + drv_spi_master.o(i.app_SPIM_IRQn_Handler) refers to drv_spi_master.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_spi_master.o(i.app_SPIM_IRQn_Handler) refers to drv_spi_master.o(.data) for .data + drv_spi_master.o(i.drv_spi_m_deinit) refers to drv_spi_master.o(i.drv_spi_m_switch_sclk) for drv_spi_m_switch_sclk + drv_spi_master.o(i.drv_spi_m_disable_int) refers to drv_spi_master.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_spi_master.o(i.drv_spi_m_set_intr_callback) refers to drv_spi_master.o(.data) for .data + drv_spi_master.o(i.drv_spi_master_init) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_spi_master.o(i.drv_spi_master_init) refers to drv_common.o(.data) for g_system_clock + drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_lvl_trig) for drv_sys_cfg_sel_ap_rst_lvl_trig + drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) refers to drv_sys_cfg.o(.data) for .data + drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_lvl_trig) for drv_sys_cfg_sel_ap_rst_lvl_trig + drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) refers to drv_sys_cfg.o(.data) for .data + drv_timer.o(i.app_TIMER0_IRQn_Handler) refers to drv_timer.o(i.drv_timer_handle_interrupt) for drv_timer_handle_interrupt + drv_timer.o(i.app_TIMER1_IRQn_Handler) refers to drv_timer.o(i.drv_timer_handle_interrupt) for drv_timer_handle_interrupt + drv_timer.o(i.app_TIMER2_IRQn_Handler) refers to drv_timer.o(i.drv_timer_handle_interrupt) for drv_timer_handle_interrupt + drv_timer.o(i.app_TIMER3_IRQn_Handler) refers to drv_timer.o(i.drv_timer_handle_interrupt) for drv_timer_handle_interrupt + drv_timer.o(i.drv_timer_clean_timer_value) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_clear_status_flags) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_clear_status_flags) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_timer.o(i.drv_timer_enable) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_get_current_count) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_get_instance) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_get_match) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_get_prescaler) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(i.drv_timer_clear_status_flags) for drv_timer_clear_status_flags + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(i.drv_timer_set_match) for drv_timer_set_match + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(i.drv_timer_set_current_count) for drv_timer_set_current_count + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_register_callback) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_set_current_count) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_timer.o(i.drv_timer_set_match) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_set_prescaler) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_set_repeat) refers to drv_timer.o(.data) for .data + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to hal_internal_vsync.o(i.soft_gen_te) for soft_gen_te + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_param_init.o(i.drv_param_init_get_ccm) for drv_param_init_get_ccm + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_lcdc.o(i.drv_lcdc_config_ccm) for drv_lcdc_config_ccm + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to dfltui.o(.text) for __aeabi_ui2d + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to ddiv.o(.text) for __aeabi_ddiv + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to sqrt.o(i.sqrt) for sqrt + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to dmul.o(.text) for __aeabi_dmul + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to cdcmple.o(.text) for __aeabi_cdcmple + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.check_pkt_buf_rev) refers to hal_internal_vsync.o(i.drv_rxbr_get_status0) for drv_rxbr_get_status0 + hal_internal_vsync.o(i.check_pkt_buf_rev) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.check_pkt_buf_rev) refers to drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) for drv_rxbr_clear_pkt_buffer + hal_internal_vsync.o(i.check_pkt_buf_rev) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.dcs_sw_filter) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_iniernal_vsync_deinit) refers to memseta.o(.text) for __aeabi_memclr4 + hal_internal_vsync.o(i.hal_iniernal_vsync_deinit) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_data_mode) for drv_memc_set_data_mode + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_tear_waveform) for drv_memc_set_tear_waveform + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_ltpo_mode) for drv_memc_set_ltpo_mode + hal_internal_vsync.o(i.hal_internal_init_memc) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_double_buffer) for drv_memc_set_double_buffer + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_active_height) for drv_memc_set_active_height + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_inten) for drv_memc_set_inten + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_enable_irq) for drv_memc_enable_irq + hal_internal_vsync.o(i.hal_internal_init_memc) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(i.calc_framebuffer_setting) for calc_framebuffer_setting + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_vidc.o(i.drv_vidc_reset) for drv_vidc_reset + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) for hal_dsi_rx_ctrl_init + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) for hal_dsi_tx_ctrl_init + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) for hal_dsi_rx_ctrl_start + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) for hal_dsi_rx_ctrl_gen_a_tear_signal + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to tau_delay.o(i.delayUs) for delayUs + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_dsi_tx.o(i.drv_dsi_tx_shutdown) for drv_dsi_tx_shutdown + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_crgu.o(i.drv_crgu_config_reset_modules) for drv_crgu_config_reset_modules + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(i.hal_internal_init_memc) for hal_internal_init_memc + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) for hal_dsi_tx_ctrl_start + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.hal_internal_vsync_deinit) refers to memseta.o(.text) for __aeabi_memclr4 + hal_internal_vsync.o(i.hal_internal_vsync_deinit) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to drv_chip_info.o(i.drv_chip_rx_info_check) for drv_chip_rx_info_check + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) for check_mipi_rx_tx_video_info + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.calc_framebuffer_setting) for calc_framebuffer_setting + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to drv_rxbr.o(i.drv_rxbr_register_irq0_callback) for drv_rxbr_register_irq0_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to drv_rxbr.o(i.drv_rxbr_register_irq1_callback) for drv_rxbr_register_irq1_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to drv_vidc.o(i.drv_vidc_register_callback) for drv_vidc_register_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to dcs_packet_fifo.o(i.dcs_packet_fifo_init) for dcs_packet_fifo_init + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.rxbr_irq0_callback) for rxbr_irq0_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.rxbr_irq1_callback) for rxbr_irq1_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.vidc_callback) for vidc_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) for check_mipi_rx_tx_video_info + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to hal_internal_vsync.o(i.calc_framebuffer_setting) for calc_framebuffer_setting + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) refers to drv_rxbr.o(i.drv_rxbr_set_cmd_filter) for drv_rxbr_set_cmd_filter + hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_dcs_direct_mode) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) for hal_internal_vsync_set_auto_hw_filter + hal_internal_vsync.o(i.hal_internal_vsync_set_dcs_direct_mode) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) refers to hal_internal_vsync.o(i.hal_internal_vsync_deinit) for hal_internal_vsync_deinit + hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to hal_internal_vsync.o(i.vsync_set_te_mode) for vsync_set_te_mode + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to hal_internal_vsync.o(i.hal_internal_vsync_deinit) for hal_internal_vsync_deinit + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite) for drv_lcdc_config_overwrite + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to hal_internal_vsync.o(i.vsync_set_te_mode) for vsync_set_te_mode + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to hal_internal_vsync.o(i.dcs_sw_filter) for dcs_sw_filter + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) for dcs_packet_fifo_alloc + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) for hal_dsi_rx_ctrl_dsc_async_handler + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to hal_internal_vsync.o(i.check_pkt_buf_rev) for check_pkt_buf_rev + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) for drv_dsi_tx_command_put_payload + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rx_partial_update) refers to drv_rxbr.o(i.drv_rxbr_get_col_addr) for drv_rxbr_get_col_addr + hal_internal_vsync.o(i.rx_partial_update) refers to drv_rxbr.o(i.drv_rxbr_get_page_addr) for drv_rxbr_get_page_addr + hal_internal_vsync.o(i.rx_partial_update) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.rx_partial_update) refers to drv_dsc_dec.o(i.drv_dsc_dec_get_nslc) for drv_dsc_dec_get_nslc + hal_internal_vsync.o(i.rx_partial_update) refers to drv_crgu.o(i.drv_crgu_set_dsco_src) for drv_crgu_set_dsco_src + hal_internal_vsync.o(i.rx_partial_update) refers to drv_crgu.o(i.drv_crgu_set_dsco_src_div) for drv_crgu_set_dsco_src_div + hal_internal_vsync.o(i.rx_partial_update) refers to drv_crgu.o(i.drv_crgu_set_dsc_core_div) for drv_crgu_set_dsc_core_div + hal_internal_vsync.o(i.rx_partial_update) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rx_receive_packet) refers to hal_internal_vsync.o(i.rx_get_dcs_packet_data) for rx_get_dcs_packet_data + hal_internal_vsync.o(i.rx_receive_packet) refers to hal_internal_vsync.o(i.rx_receive_pps) for rx_receive_pps + hal_internal_vsync.o(i.rx_receive_packet) refers to drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) for drv_rxbr_clear_pkt_buffer + hal_internal_vsync.o(i.rx_receive_packet) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.rx_receive_packet) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rx_receive_pps) refers to memseta.o(.text) for __aeabi_memclr4 + hal_internal_vsync.o(i.rx_receive_pps) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.rx_receive_pps) refers to drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) for drv_rxbr_clear_pkt_buffer + hal_internal_vsync.o(i.rx_receive_pps) refers to hal_internal_vsync.o(i.check_pkt_buf_rev) for check_pkt_buf_rev + hal_internal_vsync.o(i.rx_receive_pps) refers to drv_dsc_dec.o(i.drv_dsc_dec_convert_pps_rc_parameter) for drv_dsc_dec_convert_pps_rc_parameter + hal_internal_vsync.o(i.rx_receive_pps) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.rx_receive_pps) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) for drv_dsi_rx_get_compression_en + hal_internal_vsync.o(i.rx_receive_pps) refers to drv_dsc_dec.o(i.drv_dsc_dec_enable) for drv_dsc_dec_enable + hal_internal_vsync.o(i.rx_receive_pps) refers to drv_dsc_dec.o(i.drv_dsc_dec_set_u8_pps) for drv_dsc_dec_set_u8_pps + hal_internal_vsync.o(i.rx_receive_pps) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.rx_receive_pps) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to hal_internal_vsync.o(i.drv_rxbr_get_status0) for drv_rxbr_get_status0 + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to hal_internal_vsync.o(i.rx_receive_packet) for rx_receive_packet + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to hal_internal_vsync.o(i.drv_rxbr_get_int_source) for drv_rxbr_get_int_source + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to hal_internal_vsync.o(i.rx_partial_update) for rx_partial_update + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(i.drv_rxbr_get_int_source) for drv_rxbr_get_int_source + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(i.vpre_err_reset) for vpre_err_reset + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to drv_memc.o(i.drv_memc_set_double_buffer_reverse) for drv_memc_set_double_buffer_reverse + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) for drv_rxbr_clear_pkt_buffer + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.soft_gen_te) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.soft_gen_te) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.vidc_callback) refers to drv_vidc.o(i.drv_vidc_get_irq_status) for drv_vidc_get_irq_status + hal_internal_vsync.o(i.vidc_callback) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite) for drv_lcdc_config_overwrite + hal_internal_vsync.o(i.vidc_callback) refers to drv_vidc.o(i.drv_vidc_clear_irq) for drv_vidc_clear_irq + hal_internal_vsync.o(i.vidc_callback) refers to drv_vidc.o(i.drv_vidc_set_irqen) for drv_vidc_set_irqen + hal_internal_vsync.o(i.vidc_callback) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.vidc_callback) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.vidc_callback) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.vpre_err_reset) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_internal_vsync.o(i.vpre_err_reset) refers to drv_vidc.o(i.drv_vidc_reset) for drv_vidc_reset + hal_internal_vsync.o(i.vpre_err_reset) refers to drv_dsc_dec.o(i.drv_dsc_dec_set_u8_pps) for drv_dsc_dec_set_u8_pps + hal_internal_vsync.o(i.vpre_err_reset) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.vsync_set_te_mode) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_internal_vsync.o(i.vsync_set_te_mode) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_internal_vsync.o(i.vsync_set_te_mode) refers to drv_lcdc.o(i.drv_lcdc_ctrl_flow) for drv_lcdc_ctrl_flow + hal_internal_vsync.o(i.vsync_set_te_mode) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.vsync_set_te_mode) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.vsync_set_te_mode) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.vsync_set_te_mode) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(.data) refers to hal_internal_vsync.o(.bss) for sg_te_info + dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) refers to dcs_packet_fifo.o(.bss) for .bss + dcs_packet_fifo.o(i.dcs_packet_fifo_init) refers to dcs_packet_fifo.o(.bss) for .bss + dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) refers to dcs_packet_fifo.o(.bss) for .bss + dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) refers to dcs_packet_fifo.o(.bss) for .bss + dcs_packet_fifo.o(i.dcs_packet_get_fifo_size) refers to dcs_packet_fifo.o(.bss) for .bss + drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to ffltui.o(.text) for __aeabi_ui2f + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to fdiv.o(.text) for __aeabi_fdiv + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to fmul.o(.text) for __aeabi_fmul + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) for drv_dsi_rx_get_color_bpp + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_color_pcc) for drv_dsi_rx_get_color_pcc + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to fadd.o(.text) for __aeabi_fadd + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to cfrcmple.o(.text) for __aeabi_cfrcmple + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to f2d.o(.text) for __aeabi_f2d + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to dadd.o(.text) for __aeabi_dadd + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to dfixui.o(.text) for __aeabi_d2uiz + drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_dsi_rx.o(i.drv_dsi_rx_get_phy_stopstate) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_dsi_rx.o(i.drv_dsi_rx_phy_resistor_calibration) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_dsi_rx.o(i.drv_dsi_rx_phy_resistor_calibration) refers to drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) for drv_rx_phy_test_write_1_byte + drv_dsi_rx.o(i.drv_dsi_rx_phy_resistor_calibration) refers to drv_dsi_rx.o(i.drv_rx_phy_test_read) for drv_rx_phy_test_read + drv_dsi_rx.o(i.drv_dsi_rx_phy_resistor_calibration) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_rx.o(i.drv_dsi_rx_set_lane_swap) refers to drv_chip_info.o(i.drv_chip_info_get_info) for drv_chip_info_get_info + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_phy_common.o(i.drv_phy_get_rate_para) for drv_phy_get_rate_para + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_phy_common.o(i.drv_phy_get_calibration) for drv_phy_get_calibration + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_dsi_rx.o(i.drv_rx_phy_test_clear) for drv_rx_phy_test_clear + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) for drv_rx_phy_test_write_1_byte + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_dsi_rx.o(i.drv_rx_phy_test_write_2_byte) for drv_rx_phy_test_write_2_byte + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_chip_info.o(i.drv_chip_info_get_info) for drv_chip_info_get_info + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_dsi_rx.o(i.drv_rx_phy_test_lock) for drv_rx_phy_test_lock + drv_dsi_rx.o(i.drv_rx_phy_test_clear) refers to drv_phy_common.o(i.drv_phy_test_clear) for drv_phy_test_clear + drv_dsi_rx.o(i.drv_rx_phy_test_lock) refers to drv_phy_common.o(i.drv_phy_test_lock) for drv_phy_test_lock + drv_dsi_rx.o(i.drv_rx_phy_test_read) refers to drv_phy_common.o(i.drv_phy_test_read) for drv_phy_test_read + drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) refers to drv_phy_common.o(i.drv_phy_test_write_1_byte) for drv_phy_test_write_1_byte + drv_dsi_rx.o(i.drv_rx_phy_test_write_2_byte) refers to drv_phy_common.o(i.drv_phy_test_write_2_byte) for drv_phy_test_write_2_byte + drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dsi_tx.o(i.drv_dsi_tx_phy_resistor_calibration) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_dsi_tx.o(i.drv_dsi_tx_phy_resistor_calibration) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) for drv_tx_phy_test_write_1_byte + drv_dsi_tx.o(i.drv_dsi_tx_phy_resistor_calibration) refers to drv_dsi_tx.o(i.drv_tx_phy_test_read) for drv_tx_phy_test_read + drv_dsi_tx.o(i.drv_dsi_tx_phy_resistor_calibration) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ulpsactivenot) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_phy_common.o(i.drv_phy_get_rate_para) for drv_phy_get_rate_para + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_phy_common.o(i.drv_phy_get_pll_para) for drv_phy_get_pll_para + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_phy_common.o(i.drv_phy_get_calibration) for drv_phy_get_calibration + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_enter) for drv_tx_phy_test_enter + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_crgu.o(i.drv_crgu_set_mipi_ref_src) for drv_crgu_set_mipi_ref_src + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_crgu.o(i.drv_crgu_set_mipi_cfg_src) for drv_crgu_set_mipi_cfg_src + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_clear) for drv_tx_phy_test_clear + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) for drv_tx_phy_test_write_1_byte + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_2_byte) for drv_tx_phy_test_write_2_byte + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_code) for drv_tx_phy_test_write_code + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_exit) for drv_tx_phy_test_exit + drv_dsi_tx.o(i.drv_dsi_tx_phy_trigger) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) for drv_dsi_tx_phy_status_stopstate + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) for drv_dsi_tx_phy_status_stopstate + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_pll_lock) for drv_dsi_tx_phy_status_pll_lock + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ulpsactivenot) for drv_dsi_tx_phy_status_ulpsactivenot + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ulpsactivenot) for drv_dsi_tx_phy_status_ulpsactivenot + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) for drv_tx_phy_test_write_1_byte + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_pll_lock) for drv_dsi_tx_phy_status_pll_lock + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to drv_dsi_tx.o(i.drv_dsi_tx_version) for drv_dsi_tx_version + drv_dsi_tx.o(i.drv_dsi_tx_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_dsi_tx.o(i.drv_tx_phy_test_clear) refers to drv_phy_common.o(i.drv_phy_test_clear) for drv_phy_test_clear + drv_dsi_tx.o(i.drv_tx_phy_test_read) refers to drv_phy_common.o(i.drv_phy_test_read) for drv_phy_test_read + drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) refers to drv_phy_common.o(i.drv_phy_test_write_1_byte) for drv_phy_test_write_1_byte + drv_dsi_tx.o(i.drv_tx_phy_test_write_2_byte) refers to drv_phy_common.o(i.drv_phy_test_write_2_byte) for drv_phy_test_write_2_byte + drv_dsi_tx.o(i.drv_tx_phy_test_write_code) refers to drv_phy_common.o(i.drv_phy_test_write_code) for drv_phy_test_write_code + drv_lcdc.o(i.drv_lcdc_config_src_parameter) refers to drv_lcdc.o(i.drv_lcdc_config_input_size) for drv_lcdc_config_input_size + drv_lcdc.o(i.drv_lcdc_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_memc.o(i.app_MEMC_IRQn_Handler) refers to drv_memc.o(i.drv_memc_get_status) for drv_memc_get_status + drv_memc.o(i.app_MEMC_IRQn_Handler) refers to drv_memc.o(i.drv_memc_clear_status) for drv_memc_clear_status + drv_memc.o(i.app_MEMC_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_memc.o(i.drv_memc_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_memc.o(i.drv_memc_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_rxbr.o(i.app_ADC_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_rxbr.o(i.app_ADC_IRQn_Handler) refers to drv_rxbr.o(.data) for .data + drv_rxbr.o(i.app_VPRE_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_rxbr.o(i.app_VPRE_IRQn_Handler) refers to drv_rxbr.o(.data) for .data + drv_rxbr.o(i.drv_rxbr_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_rxbr.o(i.drv_rxbr_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_rxbr.o(i.drv_rxbr_enable_irq) refers to drv_rxbr.o(i.__NVIC_EnableIRQ) for __NVIC_EnableIRQ + drv_rxbr.o(i.drv_rxbr_enable_irq) refers to drv_rxbr.o(i.__NVIC_DisableIRQ) for __NVIC_DisableIRQ + drv_rxbr.o(i.drv_rxbr_register_irq0_callback) refers to drv_rxbr.o(.data) for .data + drv_rxbr.o(i.drv_rxbr_register_irq1_callback) refers to drv_rxbr.o(.data) for .data + drv_rxbr.o(i.drv_rxbr_set_cmd_filter) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_rxbr.o(i.drv_rxbr_soft_reset) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + drv_vidc.o(i.app_VIDC_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_vidc.o(i.app_VIDC_IRQn_Handler) refers to drv_vidc.o(.data) for .data + drv_vidc.o(i.drv_vidc_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_vidc.o(i.drv_vidc_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_vidc.o(i.drv_vidc_register_callback) refers to drv_vidc.o(.data) for .data + irq_redirect .o(i.ADC_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.AP_NRESET_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.DMA_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT0_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT1_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT2_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT3_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT4_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT5_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT6_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT7_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.FLSCTRL_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.HardFault_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.I2C0_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.I2C1_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.LCDC_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.MEMC_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.MIPI_RX_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.MIPI_TX_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.PWMDET_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.SPIM_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.SPIS_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.SWIRE_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.SysTick_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.TIMER0_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.TIMER1_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.TIMER2_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.TIMER3_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.UART_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.VIDC_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.VPRE_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.WDG_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.handle_init) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.handle_init) refers to drv_common.o(i.app_SysTick_Handler) for app_SysTick_Handler + irq_redirect .o(i.handle_init) refers to hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) for app_LCDC_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) for app_MIPI_RX_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) for app_MIPI_TX_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_dma.o(i.app_dma_irq_handler) for app_dma_irq_handler + irq_redirect .o(i.handle_init) refers to norflash.o(i.app_fls_ctrl_Handler) for app_fls_ctrl_Handler + irq_redirect .o(i.handle_init) refers to drv_i2c_slave.o(i.app_I2C0_IRQn_Handler) for app_I2C0_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_i2c_master.o(i.app_I2C1_IRQn_Handler) for app_I2C1_IRQn_Handler + irq_redirect .o(i.handle_init) refers to hal_spi_slave.o(i.app_SPIS_IRQn_Handler) for app_SPIS_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_spi_master.o(i.app_SPIM_IRQn_Handler) for app_SPIM_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_rxbr.o(i.app_VPRE_IRQn_Handler) for app_VPRE_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_rxbr.o(i.app_ADC_IRQn_Handler) for app_ADC_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_vidc.o(i.app_VIDC_IRQn_Handler) for app_VIDC_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_memc.o(i.app_MEMC_IRQn_Handler) for app_MEMC_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_timer.o(i.app_TIMER0_IRQn_Handler) for app_TIMER0_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_timer.o(i.app_TIMER1_IRQn_Handler) for app_TIMER1_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_timer.o(i.app_TIMER2_IRQn_Handler) for app_TIMER2_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_timer.o(i.app_TIMER3_IRQn_Handler) for app_TIMER3_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_wdg.o(i.app_WDG_IRQn_Handler) for app_WDG_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_uart.o(i.app_UART_IRQn_Handler) for app_UART_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_pwm.o(i.app_PWMDET_IRQn_Handler) for app_PWMDET_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_swire.o(i.app_SWIRE_IRQn_Handler) for app_SWIRE_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) for app_AP_NRESET_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) for app_EXTI_INT0_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) for app_EXTI_INT1_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) for app_EXTI_INT2_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) for app_EXTI_INT3_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) for app_EXTI_INT4_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) for app_EXTI_INT5_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) for app_EXTI_INT6_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) for app_EXTI_INT7_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_common.o(i.app_HardFault_Handler) for app_HardFault_Handler + drv_phy_common.o(i.drv_phy_enable_calibration) refers to drv_phy_common.o(.data) for .data + drv_phy_common.o(i.drv_phy_get_calibration) refers to drv_chip_info.o(i.drv_chip_info_get_info) for drv_chip_info_get_info + drv_phy_common.o(i.drv_phy_get_calibration) refers to drv_efuse.o(i.drv_efuse_read) for drv_efuse_read + drv_phy_common.o(i.drv_phy_get_calibration) refers to drv_phy_common.o(.data) for .data + drv_phy_common.o(i.drv_phy_get_pll_para) refers to drv_phy_common.o(.constdata) for .constdata + drv_phy_common.o(i.drv_phy_get_rate_para) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_phy_common.o(i.drv_phy_get_rate_para) refers to drv_phy_common.o(.constdata) for .constdata + drv_phy_common.o(i.drv_phy_test_write_1_byte) refers to drv_phy_common.o(i.drv_phy_test_write_code) for drv_phy_test_write_code + drv_phy_common.o(i.drv_phy_test_write_1_byte) refers to drv_phy_common.o(i.drv_phy_test_write_data) for drv_phy_test_write_data + drv_phy_common.o(i.drv_phy_test_write_2_byte) refers to drv_phy_common.o(i.drv_phy_test_write_code) for drv_phy_test_write_code + drv_phy_common.o(i.drv_phy_test_write_2_byte) refers to drv_phy_common.o(i.drv_phy_test_write_data) for drv_phy_test_write_data + drv_chip_info.o(i.drv_chip_info_get_info) refers to drv_chip_info.o(.data) for .data + drv_chip_info.o(i.drv_chip_info_init) refers to drv_efuse.o(i.drv_efuse_enter_inactive) for drv_efuse_enter_inactive + drv_chip_info.o(i.drv_chip_info_init) refers to drv_efuse.o(i.drv_efuse_read) for drv_efuse_read + drv_chip_info.o(i.drv_chip_info_init) refers to drv_chip_info.o(.data) for .data + drv_chip_info.o(i.drv_chip_rx_info_check) refers to printfa.o(i.__0printf) for __2printf + drv_chip_info.o(i.drv_chip_rx_info_check) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_chip_info.o(i.drv_chip_rx_info_check) refers to drv_chip_info.o(.data) for .data + drv_dsc_dec.o(i.drv_dsc_dec_enable) refers to drv_efuse.o(i.drv_efuse_enter_inactive) for drv_efuse_enter_inactive + drv_dsc_dec.o(i.drv_dsc_dec_enable) refers to drv_efuse.o(i.drv_efuse_read) for drv_efuse_read + drv_dsc_dec.o(i.drv_dsc_dec_enable) refers to printfa.o(i.__0printf) for __2printf + hal_spi_slave.o(i.app_SPIS_IRQn_Handler) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + hal_spi_slave.o(i.app_SPIS_IRQn_Handler) refers to hal_spi_slave.o(i.__NVIC_SetPriority) for __NVIC_SetPriority + hal_spi_slave.o(i.app_SPIS_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_spi_slave.o(i.app_SPIS_IRQn_Handler) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_s_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_spi_slave.o(i.hal_spi_s_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_init_input) for hal_gpio_init_input + hal_spi_slave.o(i.hal_spi_s_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + hal_spi_slave.o(i.hal_spi_slave_auto_transfer_abort) refers to drv_spi_dma.o(i.drv_spi_abort_dma) for drv_spi_abort_dma + hal_spi_slave.o(i.hal_spi_slave_auto_transfer_start) refers to drv_dma.o(i.drv_dma_enable_cycle) for drv_dma_enable_cycle + hal_spi_slave.o(i.hal_spi_slave_auto_transfer_start) refers to drv_spi_dma.o(i.drv_spis_dma_write) for drv_spis_dma_write + hal_spi_slave.o(i.hal_spi_slave_auto_transfer_start) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_deinit) refers to drv_spi_slave.o(i.drv_spi_s_deinit) for drv_spi_s_deinit + hal_spi_slave.o(i.hal_spi_slave_enable) refers to drv_spi_slave.o(i.drv_spi_s_enable_int) for drv_spi_s_enable_int + hal_spi_slave.o(i.hal_spi_slave_enable) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_spi_slave.o(i.hal_spi_slave_enable) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_gpio_init) refers to drv_spi_slave.o(i.drv_spi_s_gpio_init) for drv_spi_s_gpio_init + hal_spi_slave.o(i.hal_spi_slave_init) refers to hal_spi_slave.o(i.hal_spi_slave_gpio_init) for hal_spi_slave_gpio_init + hal_spi_slave.o(i.hal_spi_slave_init) refers to drv_spi_slave.o(i.drv_spi_slave_init) for drv_spi_slave_init + hal_spi_slave.o(i.hal_spi_slave_init) refers to drv_spi_dma.o(i.drv_spi_dma_init) for drv_spi_dma_init + hal_spi_slave.o(i.hal_spi_slave_init) refers to drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) for drv_spi_set_dma_irq_callback + hal_spi_slave.o(i.hal_spi_slave_init) refers to drv_spi_slave.o(i.drv_spi_s_enable_tx_dma) for drv_spi_s_enable_tx_dma + hal_spi_slave.o(i.hal_spi_slave_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) for drv_sys_cfg_set_dma_tx_req + hal_spi_slave.o(i.hal_spi_slave_init) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_read_data) refers to drv_spi_slave.o(i.drv_spi_s_read_data) for drv_spi_s_read_data + hal_spi_slave.o(i.hal_spi_slave_register_callback) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_reset_tx) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_set_auto_rx_buffer) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_set_auto_tx_buffer) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_write_data) refers to drv_spi_slave.o(i.drv_spi_s_write_data) for drv_spi_s_write_data + drv_fls_dma.o(i.fls_abort_dma) refers to drv_dma.o(i.drv_dma_abort_transfer) for drv_dma_abort_transfer + drv_fls_dma.o(i.fls_abort_dma) refers to drv_fls_dma.o(i.fls_dma_disable) for fls_dma_disable + drv_fls_dma.o(i.fls_dma_read_prepare) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls_dma.o(i.fls_dma_read_prepare) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls_dma.o(i.fls_dma_read_prepare) refers to drv_fls.o(i.fls_set_read) for fls_set_read + drv_fls_dma.o(i.fls_dma_read_prepare) refers to drv_fls_dma.o(i.fls_dma_enable) for fls_dma_enable + drv_fls_dma.o(i.fls_dma_read_prepare) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls_dma.o(i.fls_dma_write_prepare) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls_dma.o(i.fls_dma_write_prepare) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls_dma.o(i.fls_dma_write_prepare) refers to drv_fls.o(i.fls_set_write) for fls_set_write + drv_fls_dma.o(i.fls_dma_write_prepare) refers to drv_fls_dma.o(i.fls_dma_enable) for fls_dma_enable + drv_fls_dma.o(i.fls_dma_write_prepare) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls_dma.o(i.fls_read_dmacallback) refers to drv_dma.o(i.drv_dma_abort_transfer) for drv_dma_abort_transfer + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to memseta.o(.text) for __aeabi_memclr4 + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to drv_dma.o(i.drv_dma_init) for drv_dma_init + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to drv_dma.o(i.drv_dma_set_callback) for drv_dma_set_callback + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to drv_fls_dma.o(.data) for .data + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to drv_fls_dma.o(i.fls_read_dmacallback) for fls_read_dmacallback + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to drv_fls_dma.o(i.fls_write_dmacallback) for fls_write_dmacallback + drv_fls_dma.o(i.fls_transfer_dma) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_fls_dma.o(i.fls_transfer_dma) refers to drv_dma.o(i.drv_dma_start_transfer) for drv_dma_start_transfer + drv_fls_dma.o(i.fls_transfer_get_receive_count_dma) refers to drv_dma.o(i.drv_dma_get_remaining_bytes) for drv_dma_get_remaining_bytes + drv_fls_dma.o(i.fls_write_dmacallback) refers to drv_dma.o(i.drv_dma_abort_transfer) for drv_dma_abort_transfer + drv_pwm.o(i.app_PWMDET_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_pwm.o(i.app_PWMDET_IRQn_Handler) refers to drv_pwm.o(.data) for .data + drv_pwm.o(i.drv_pwm_in_register_callback) refers to drv_pwm.o(.data) for .data + drv_pwm.o(i.drv_pwm_in_set_sys_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_spi_slave.o(i.drv_spi_s_deinit) refers to drv_spi_slave.o(i.drv_spi_s_switch_sclk) for drv_spi_s_switch_sclk + drv_swire.o(i.app_SWIRE_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_swire.o(i.app_SWIRE_IRQn_Handler) refers to drv_swire.o(i.drv_swire_set_int) for drv_swire_set_int + drv_swire.o(i.app_SWIRE_IRQn_Handler) refers to drv_swire.o(.data) for .data + drv_swire.o(i.drv_swire_register_callback) refers to drv_swire.o(.data) for .data + drv_swire.o(i.drv_swire_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_uart.o(i.UART0_IRQ_Handle) refers to drv_uart.o(i.UART_TransferHandleIRQ) for UART_TransferHandleIRQ + drv_uart.o(i.UART0_IRQ_Handle) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_uart.o(i.UART0_IRQ_Handle) refers to drv_uart.o(.data) for .data + drv_uart.o(i.UART_AbortReceive) refers to drv_uart.o(i.UART_Disable_IT) for UART_Disable_IT + drv_uart.o(i.UART_AbortReceive) refers to drv_uart.o(i.UART_ResetRxFIFO) for UART_ResetRxFIFO + drv_uart.o(i.UART_AbortSend) refers to drv_uart.o(i.UART_Disable_IT) for UART_Disable_IT + drv_uart.o(i.UART_AbortSend) refers to drv_uart.o(i.UART_ResetTxFIFO) for UART_ResetTxFIFO + drv_uart.o(i.UART_Deinit) refers to drv_uart.o(i.UART_SwitchSCLK) for UART_SwitchSCLK + drv_uart.o(i.UART_Disable_IT) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_Disable_IT) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_uart.o(i.UART_Disable_IT) refers to drv_uart.o(.constdata) for .constdata + drv_uart.o(i.UART_EnableDma) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) for drv_sys_cfg_set_dma_rx_req + drv_uart.o(i.UART_EnableDma) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) for drv_sys_cfg_set_dma_tx_req + drv_uart.o(i.UART_Enable_IT) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_Enable_IT) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_uart.o(i.UART_GetDefaultConfig) refers to memseta.o(.text) for __aeabi_memclr4 + drv_uart.o(i.UART_GetDefaultConfig) refers to drv_common.o(.data) for g_system_clock + drv_uart.o(i.UART_GetFIFO_Ctrl) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_GetFIFO_Ctrl) refers to drv_uart.o(.data) for .data + drv_uart.o(i.UART_ResetRxFIFO) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_ResetRxFIFO) refers to drv_uart.o(.data) for .data + drv_uart.o(i.UART_ResetTxFIFO) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_ResetTxFIFO) refers to drv_uart.o(.data) for .data + drv_uart.o(i.UART_SetBaudRate) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_uart.o(i.UART_SwitchSCLK) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_uart.o(i.UART_TransferCreateHandle) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_TransferCreateHandle) refers to memseta.o(.text) for __aeabi_memclr4 + drv_uart.o(i.UART_TransferCreateHandle) refers to drv_uart.o(i.UART_Enable_IT) for UART_Enable_IT + drv_uart.o(i.UART_TransferCreateHandle) refers to drv_uart.o(.data) for .data + drv_uart.o(i.UART_TransferHandleIRQ) refers to drv_uart.o(i.UART_ResetRxFIFO) for UART_ResetRxFIFO + drv_uart.o(i.UART_init) refers to drv_uart.o(i.UART_DisableDma) for UART_DisableDma + drv_uart.o(i.UART_init) refers to drv_uart.o(i.UART_SwitchSCLK) for UART_SwitchSCLK + drv_uart.o(i.UART_init) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_init) refers to drv_uart.o(i.UART_SetBaudRate) for UART_SetBaudRate + drv_uart.o(i.UART_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_uart.o(i.UART_init) refers to drv_uart.o(.data) for .data + drv_uart.o(i.app_UART_IRQn_Handler) refers to drv_uart.o(i.UART0_IRQ_Handle) for UART0_IRQ_Handle + drv_uart_dma.o(i.UART_DMAInit) refers to memseta.o(.text) for __aeabi_memclr4 + drv_uart_dma.o(i.UART_DMAInit) refers to drv_dma.o(i.drv_dma_init) for drv_dma_init + drv_uart_dma.o(i.UART_TransferAbortReceiveDMA) refers to drv_dma.o(i.drv_dma_abort_transfer) for drv_dma_abort_transfer + drv_uart_dma.o(i.UART_TransferAbortSendDMA) refers to drv_dma.o(i.drv_dma_abort_transfer) for drv_dma_abort_transfer + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to memseta.o(.text) for __aeabi_memclr4 + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart.o(i.UART_EnableDma) for UART_EnableDma + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart_dma.o(i.UART_DMAInit) for UART_DMAInit + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_dma.o(i.drv_dma_set_callback) for drv_dma_set_callback + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart_dma.o(.data) for .data + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart_dma.o(i.UART_TransferReceiveDMACallback) for UART_TransferReceiveDMACallback + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart_dma.o(i.UART_TransferSendDMACallback) for UART_TransferSendDMACallback + drv_uart_dma.o(i.UART_TransferGetReceiveCountDMA) refers to drv_dma.o(i.drv_dma_get_remaining_bytes) for drv_dma_get_remaining_bytes + drv_uart_dma.o(i.UART_TransferReceiveDMA) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_uart_dma.o(i.UART_TransferReceiveDMA) refers to drv_uart.o(i.UART_EnableDma) for UART_EnableDma + drv_uart_dma.o(i.UART_TransferReceiveDMA) refers to drv_dma.o(i.drv_dma_start_transfer) for drv_dma_start_transfer + drv_uart_dma.o(i.UART_TransferSendDMA) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_uart_dma.o(i.UART_TransferSendDMA) refers to drv_uart.o(i.UART_EnableDma) for UART_EnableDma + drv_uart_dma.o(i.UART_TransferSendDMA) refers to drv_dma.o(i.drv_dma_start_transfer) for drv_dma_start_transfer + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_wdg.o(i.drv_wdg_set_int) for drv_wdg_set_int + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_wdg.o(i.drv_wdg_clear_counter) for drv_wdg_clear_counter + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_wdg.o(i.drv_wdg_read_edge_flag) for drv_wdg_read_edge_flag + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_wdg.o(i.drv_wdg_clear_edge_flag) for drv_wdg_clear_edge_flag + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_wdg.o(.data) for .data + drv_wdg.o(i.drv_wdg_register_callback) refers to drv_wdg.o(.data) for .data + drv_wdg.o(i.drv_wdg_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_wdg.o(i.drv_wdg_set_repeat) refers to drv_wdg.o(.data) for .data + drv_efuse.o(i.drv_efuse_enter_inactive) refers to drv_efuse.o(i.drv_efuse_int_enable) for drv_efuse_int_enable + drv_efuse.o(i.drv_efuse_read) refers to drv_efuse.o(i.drv_efuse_read_req) for drv_efuse_read_req + drv_efuse.o(i.drv_efuse_write) refers to drv_efuse.o(i.drv_efuse_write_req) for drv_efuse_write_req + ceil.o(i.__softfp_ceil) refers (Special) to iusefp.o(.text) for __I$use$fp + ceil.o(i.__softfp_ceil) refers to ceil.o(i.ceil) for ceil + ceil.o(i.ceil) refers (Special) to iusefp.o(.text) for __I$use$fp + ceil.o(i.ceil) refers to dadd.o(.text) for __aeabi_dadd + ceil.o(i.ceil) refers to cdrcmple.o(.text) for __aeabi_cdrcmple + sqrt.o(i.__softfp_sqrt) refers (Special) to iusefp.o(.text) for __I$use$fp + sqrt.o(i.__softfp_sqrt) refers to dsqrt.o(.text) for _dsqrt + sqrt.o(i.__softfp_sqrt) refers to errno.o(i.__set_errno) for __set_errno + sqrt.o(i.sqrt) refers (Special) to iusefp.o(.text) for __I$use$fp + sqrt.o(i.sqrt) refers to dsqrt.o(.text) for _dsqrt + sqrt.o(i.sqrt) refers to errno.o(i.__set_errno) for __set_errno + sqrt_x.o(i.____softfp_sqrt$lsc) refers (Special) to iusefp.o(.text) for __I$use$fp + sqrt_x.o(i.____softfp_sqrt$lsc) refers to cdcmple.o(.text) for __aeabi_cdcmple + sqrt_x.o(i.____softfp_sqrt$lsc) refers to errno.o(i.__set_errno) for __set_errno + sqrt_x.o(i.____softfp_sqrt$lsc) refers to dsqrt.o(.text) for _dsqrt + sqrt_x.o(i.__sqrt$lsc) refers (Special) to iusefp.o(.text) for __I$use$fp + sqrt_x.o(i.__sqrt$lsc) refers to cdcmple.o(.text) for __aeabi_cdcmple + sqrt_x.o(i.__sqrt$lsc) refers to errno.o(i.__set_errno) for __set_errno + sqrt_x.o(i.__sqrt$lsc) refers to dsqrt.o(.text) for _dsqrt + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry10a.o(.ARM.Collect$$$$0000000D) for __rt_final_cpp + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry11a.o(.ARM.Collect$$$$0000000F) for __rt_final_exit + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry7b.o(.ARM.Collect$$$$00000008) for _main_clock + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry8b.o(.ARM.Collect$$$$0000000A) for _main_cpp_init + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry9a.o(.ARM.Collect$$$$0000000B) for _main_init + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry5.o(.ARM.Collect$$$$00000004) for _main_scatterload + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry2.o(.ARM.Collect$$$$00000001) for _main_stk + idiv.o(.text) refers to uidiv.o(.text) for __aeabi_uidivmod + printfb.o(i.__0fprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0fprintf$bare) refers to tau_log.o(i.fputc) for fputc + printfb.o(i.__0printf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0printf$bare) refers to tau_log.o(i.fputc) for fputc + printfb.o(i.__0printf$bare) refers to stdout.o(.data) for __stdout + printfb.o(i.__0snprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0snprintf$bare) refers to printfb.o(i._snputc) for _snputc + printfb.o(i.__0sprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0sprintf$bare) refers to printfb.o(i._sputc) for _sputc + printfb.o(i.__0vfprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vfprintf$bare) refers to tau_log.o(i.fputc) for fputc + printfb.o(i.__0vprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vprintf$bare) refers to tau_log.o(i.fputc) for fputc + printfb.o(i.__0vprintf$bare) refers to stdout.o(.data) for __stdout + printfb.o(i.__0vsnprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vsnprintf$bare) refers to printfb.o(i._snputc) for _snputc + printfb.o(i.__0vsprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vsprintf$bare) refers to printfb.o(i._sputc) for _sputc + printf0.o(i.__0fprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0fprintf$0) refers to tau_log.o(i.fputc) for fputc + printf0.o(i.__0printf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0printf$0) refers to tau_log.o(i.fputc) for fputc + printf0.o(i.__0printf$0) refers to stdout.o(.data) for __stdout + printf0.o(i.__0snprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0snprintf$0) refers to printf0.o(i._snputc) for _snputc + printf0.o(i.__0sprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0sprintf$0) refers to printf0.o(i._sputc) for _sputc + printf0.o(i.__0vfprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vfprintf$0) refers to tau_log.o(i.fputc) for fputc + printf0.o(i.__0vprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vprintf$0) refers to tau_log.o(i.fputc) for fputc + printf0.o(i.__0vprintf$0) refers to stdout.o(.data) for __stdout + printf0.o(i.__0vsnprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vsnprintf$0) refers to printf0.o(i._snputc) for _snputc + printf0.o(i.__0vsprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vsprintf$0) refers to printf0.o(i._sputc) for _sputc + printf1.o(i.__0fprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0fprintf$1) refers to tau_log.o(i.fputc) for fputc + printf1.o(i.__0printf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0printf$1) refers to tau_log.o(i.fputc) for fputc + printf1.o(i.__0printf$1) refers to stdout.o(.data) for __stdout + printf1.o(i.__0snprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0snprintf$1) refers to printf1.o(i._snputc) for _snputc + printf1.o(i.__0sprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0sprintf$1) refers to printf1.o(i._sputc) for _sputc + printf1.o(i.__0vfprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vfprintf$1) refers to tau_log.o(i.fputc) for fputc + printf1.o(i.__0vprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vprintf$1) refers to tau_log.o(i.fputc) for fputc + printf1.o(i.__0vprintf$1) refers to stdout.o(.data) for __stdout + printf1.o(i.__0vsnprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vsnprintf$1) refers to printf1.o(i._snputc) for _snputc + printf1.o(i.__0vsprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vsprintf$1) refers to printf1.o(i._sputc) for _sputc + printf1.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printf2.o(i.__0fprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0fprintf$2) refers to tau_log.o(i.fputc) for fputc + printf2.o(i.__0printf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0printf$2) refers to tau_log.o(i.fputc) for fputc + printf2.o(i.__0printf$2) refers to stdout.o(.data) for __stdout + printf2.o(i.__0snprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0snprintf$2) refers to printf2.o(i._snputc) for _snputc + printf2.o(i.__0sprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0sprintf$2) refers to printf2.o(i._sputc) for _sputc + printf2.o(i.__0vfprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vfprintf$2) refers to tau_log.o(i.fputc) for fputc + printf2.o(i.__0vprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vprintf$2) refers to tau_log.o(i.fputc) for fputc + printf2.o(i.__0vprintf$2) refers to stdout.o(.data) for __stdout + printf2.o(i.__0vsnprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vsnprintf$2) refers to printf2.o(i._snputc) for _snputc + printf2.o(i.__0vsprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vsprintf$2) refers to printf2.o(i._sputc) for _sputc + printf3.o(i.__0fprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0fprintf$3) refers to tau_log.o(i.fputc) for fputc + printf3.o(i.__0printf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0printf$3) refers to tau_log.o(i.fputc) for fputc + printf3.o(i.__0printf$3) refers to stdout.o(.data) for __stdout + printf3.o(i.__0snprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0snprintf$3) refers to printf3.o(i._snputc) for _snputc + printf3.o(i.__0sprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0sprintf$3) refers to printf3.o(i._sputc) for _sputc + printf3.o(i.__0vfprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vfprintf$3) refers to tau_log.o(i.fputc) for fputc + printf3.o(i.__0vprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vprintf$3) refers to tau_log.o(i.fputc) for fputc + printf3.o(i.__0vprintf$3) refers to stdout.o(.data) for __stdout + printf3.o(i.__0vsnprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vsnprintf$3) refers to printf3.o(i._snputc) for _snputc + printf3.o(i.__0vsprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vsprintf$3) refers to printf3.o(i._sputc) for _sputc + printf3.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printf4.o(i.__0fprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0fprintf$4) refers to tau_log.o(i.fputc) for fputc + printf4.o(i.__0printf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0printf$4) refers to tau_log.o(i.fputc) for fputc + printf4.o(i.__0printf$4) refers to stdout.o(.data) for __stdout + printf4.o(i.__0snprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0snprintf$4) refers to printf4.o(i._snputc) for _snputc + printf4.o(i.__0sprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0sprintf$4) refers to printf4.o(i._sputc) for _sputc + printf4.o(i.__0vfprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vfprintf$4) refers to tau_log.o(i.fputc) for fputc + printf4.o(i.__0vprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vprintf$4) refers to tau_log.o(i.fputc) for fputc + printf4.o(i.__0vprintf$4) refers to stdout.o(.data) for __stdout + printf4.o(i.__0vsnprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vsnprintf$4) refers to printf4.o(i._snputc) for _snputc + printf4.o(i.__0vsprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vsprintf$4) refers to printf4.o(i._sputc) for _sputc + printf4.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printf5.o(i.__0fprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0fprintf$5) refers to tau_log.o(i.fputc) for fputc + printf5.o(i.__0printf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0printf$5) refers to tau_log.o(i.fputc) for fputc + printf5.o(i.__0printf$5) refers to stdout.o(.data) for __stdout + printf5.o(i.__0snprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0snprintf$5) refers to printf5.o(i._snputc) for _snputc + printf5.o(i.__0sprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0sprintf$5) refers to printf5.o(i._sputc) for _sputc + printf5.o(i.__0vfprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vfprintf$5) refers to tau_log.o(i.fputc) for fputc + printf5.o(i.__0vprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vprintf$5) refers to tau_log.o(i.fputc) for fputc + printf5.o(i.__0vprintf$5) refers to stdout.o(.data) for __stdout + printf5.o(i.__0vsnprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vsnprintf$5) refers to printf5.o(i._snputc) for _snputc + printf5.o(i.__0vsprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vsprintf$5) refers to printf5.o(i._sputc) for _sputc + printf5.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printf6.o(i.__0fprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0fprintf$6) refers to tau_log.o(i.fputc) for fputc + printf6.o(i.__0printf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0printf$6) refers to tau_log.o(i.fputc) for fputc + printf6.o(i.__0printf$6) refers to stdout.o(.data) for __stdout + printf6.o(i.__0snprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0snprintf$6) refers to printf6.o(i._snputc) for _snputc + printf6.o(i.__0sprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0sprintf$6) refers to printf6.o(i._sputc) for _sputc + printf6.o(i.__0vfprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vfprintf$6) refers to tau_log.o(i.fputc) for fputc + printf6.o(i.__0vprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vprintf$6) refers to tau_log.o(i.fputc) for fputc + printf6.o(i.__0vprintf$6) refers to stdout.o(.data) for __stdout + printf6.o(i.__0vsnprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vsnprintf$6) refers to printf6.o(i._snputc) for _snputc + printf6.o(i.__0vsprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vsprintf$6) refers to printf6.o(i._sputc) for _sputc + printf6.o(i._printf_core) refers to printf6.o(i._printf_pre_padding) for _printf_pre_padding + printf6.o(i._printf_core) refers to printf6.o(i._printf_post_padding) for _printf_post_padding + printf6.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printf7.o(i.__0fprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0fprintf$7) refers to tau_log.o(i.fputc) for fputc + printf7.o(i.__0printf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0printf$7) refers to tau_log.o(i.fputc) for fputc + printf7.o(i.__0printf$7) refers to stdout.o(.data) for __stdout + printf7.o(i.__0snprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0snprintf$7) refers to printf7.o(i._snputc) for _snputc + printf7.o(i.__0sprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0sprintf$7) refers to printf7.o(i._sputc) for _sputc + printf7.o(i.__0vfprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vfprintf$7) refers to tau_log.o(i.fputc) for fputc + printf7.o(i.__0vprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vprintf$7) refers to tau_log.o(i.fputc) for fputc + printf7.o(i.__0vprintf$7) refers to stdout.o(.data) for __stdout + printf7.o(i.__0vsnprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vsnprintf$7) refers to printf7.o(i._snputc) for _snputc + printf7.o(i.__0vsprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vsprintf$7) refers to printf7.o(i._sputc) for _sputc + printf7.o(i._printf_core) refers to printf7.o(i._printf_pre_padding) for _printf_pre_padding + printf7.o(i._printf_core) refers to printf7.o(i._printf_post_padding) for _printf_post_padding + printf7.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printf8.o(i.__0fprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0fprintf$8) refers to tau_log.o(i.fputc) for fputc + printf8.o(i.__0printf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0printf$8) refers to tau_log.o(i.fputc) for fputc + printf8.o(i.__0printf$8) refers to stdout.o(.data) for __stdout + printf8.o(i.__0snprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0snprintf$8) refers to printf8.o(i._snputc) for _snputc + printf8.o(i.__0sprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0sprintf$8) refers to printf8.o(i._sputc) for _sputc + printf8.o(i.__0vfprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vfprintf$8) refers to tau_log.o(i.fputc) for fputc + printf8.o(i.__0vprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vprintf$8) refers to tau_log.o(i.fputc) for fputc + printf8.o(i.__0vprintf$8) refers to stdout.o(.data) for __stdout + printf8.o(i.__0vsnprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vsnprintf$8) refers to printf8.o(i._snputc) for _snputc + printf8.o(i.__0vsprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vsprintf$8) refers to printf8.o(i._sputc) for _sputc + printf8.o(i._printf_core) refers to printf8.o(i._printf_pre_padding) for _printf_pre_padding + printf8.o(i._printf_core) refers to printf8.o(i._printf_post_padding) for _printf_post_padding + printf8.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printfa.o(i.__0fprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0fprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0fprintf) refers to tau_log.o(i.fputc) for fputc + printfa.o(i.__0printf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0printf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0printf) refers to tau_log.o(i.fputc) for fputc + printfa.o(i.__0printf) refers to stdout.o(.data) for __stdout + printfa.o(i.__0snprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0snprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0snprintf) refers to printfa.o(i._snputc) for _snputc + printfa.o(i.__0sprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0sprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0sprintf) refers to printfa.o(i._sputc) for _sputc + printfa.o(i.__0vfprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vfprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vfprintf) refers to tau_log.o(i.fputc) for fputc + printfa.o(i.__0vprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vprintf) refers to tau_log.o(i.fputc) for fputc + printfa.o(i.__0vprintf) refers to stdout.o(.data) for __stdout + printfa.o(i.__0vsnprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vsnprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vsnprintf) refers to printfa.o(i._snputc) for _snputc + printfa.o(i.__0vsprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vsprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vsprintf) refers to printfa.o(i._sputc) for _sputc + printfa.o(i._fp_digits) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._fp_digits) refers to dmul.o(.text) for __aeabi_dmul + printfa.o(i._fp_digits) refers to ddiv.o(.text) for __aeabi_ddiv + printfa.o(i._fp_digits) refers to cdrcmple.o(.text) for __aeabi_cdrcmple + printfa.o(i._fp_digits) refers to dadd.o(.text) for __aeabi_dadd + printfa.o(i._fp_digits) refers to dfixul.o(.text) for __aeabi_d2ulz + printfa.o(i._fp_digits) refers to uldiv.o(.text) for __aeabi_uldivmod + printfa.o(i._printf_core) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._printf_core) refers to printfa.o(i._printf_pre_padding) for _printf_pre_padding + printfa.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printfa.o(i._printf_core) refers to printfa.o(i._printf_post_padding) for _printf_post_padding + printfa.o(i._printf_core) refers to printfa.o(i._fp_digits) for _fp_digits + printfa.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printfa.o(i._printf_post_padding) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._printf_pre_padding) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._snputc) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._sputc) refers (Special) to iusefp.o(.text) for __I$use$fp + fadd.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + fadd.o(.text) refers to fepilogue.o(.text) for _float_epilogue + fmul.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + fdiv.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + fdiv.o(.text) refers to fepilogue.o(.text) for _float_round + fscalb.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dadd.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dadd.o(.text) refers to llshl.o(.text) for __aeabi_llsl + dadd.o(.text) refers to llsshr.o(.text) for __aeabi_lasr + dadd.o(.text) refers to depilogue.o(.text) for _double_epilogue + dmul.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dmul.o(.text) refers to depilogue.o(.text) for _double_epilogue + ddiv.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + ddiv.o(.text) refers to depilogue.o(.text) for _double_round + fflti.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + fflti.o(.text) refers to fepilogue.o(.text) for _float_epilogue + ffltui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + ffltui.o(.text) refers to fepilogue.o(.text) for _float_epilogue + dflti.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dflti.o(.text) refers to depilogue.o(.text) for _double_epilogue + dfltui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dfltui.o(.text) refers to depilogue.o(.text) for _double_epilogue + ffixi.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + ffixui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dfixi.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dfixi.o(.text) refers to llushr.o(.text) for __aeabi_llsr + dfixui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dfixui.o(.text) refers to llushr.o(.text) for __aeabi_llsr + f2d.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + cdcmple.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + cfrcmple.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + entry2.o(.ARM.Collect$$$$00000001) refers to entry2.o(.ARM.Collect$$$$00002712) for __lit__00000000 + entry2.o(.ARM.Collect$$$$00002712) refers to startup_armcm0.o(STACK) for __initial_sp + entry2.o(__vectab_stack_and_reset_area) refers to startup_armcm0.o(STACK) for __initial_sp + entry2.o(__vectab_stack_and_reset_area) refers to entry.o(.ARM.Collect$$$$00000000) for __main + entry5.o(.ARM.Collect$$$$00000004) refers to init.o(.text) for __scatterload + entry9a.o(.ARM.Collect$$$$0000000B) refers to main.o(i.main) for main + entry9b.o(.ARM.Collect$$$$0000000C) refers to main.o(i.main) for main + uldiv.o(.text) refers to llushr.o(.text) for __aeabi_llsr + uldiv.o(.text) refers to llshl.o(.text) for __aeabi_llsl + errno.o(i.__aeabi_errno_addr) refers to errno.o(.data) for .data + errno.o(i.__read_errno) refers to errno.o(.data) for .data + errno.o(i.__set_errno) refers to errno.o(.data) for .data + depilogue.o(.text) refers to depilogue.o(i.__ARM_clz) for __ARM_clz + depilogue.o(.text) refers to llshl.o(.text) for __aeabi_llsl + depilogue.o(.text) refers to llushr.o(.text) for __aeabi_llsr + dsqrt.o(.text) refers to llushr.o(.text) for __aeabi_llsr + dsqrt.o(.text) refers to depilogue.o(.text) for _double_round + dfixul.o(.text) refers to llushr.o(.text) for __aeabi_llsr + dfixul.o(.text) refers to llshl.o(.text) for __aeabi_llsl + init.o(.text) refers to entry5.o(.ARM.Collect$$$$00000004) for __main_after_scatterload + + +============================================================================== + +Removing Unused input sections from the image. + + Removing main.o(.rev16_text), (4 bytes). + Removing main.o(.revsh_text), (4 bytes). + Removing ap_demo.o(.rev16_text), (4 bytes). + Removing ap_demo.o(.revsh_text), (4 bytes). + Removing ap_demo.o(.data), (256 bytes). + Removing ap_demo.o(.data), (256 bytes). + Removing ap_demo.o(.data), (2 bytes). + Removing ap_demo.o(.data), (2 bytes). + Removing ap_demo.o(.data), (2 bytes). + Removing ap_demo.o(.data), (2 bytes). + Removing app_tp_transfer.o(.rev16_text), (4 bytes). + Removing app_tp_transfer.o(.revsh_text), (4 bytes). + Removing app_tp_transfer.o(i.app_tp_m_transfer_complate), (8 bytes). + Removing app_tp_transfer.o(i.app_tp_phone_reset_on), (12 bytes). + Removing app_tp_transfer.o(i.app_tp_s_transfer_complate), (26 bytes). + Removing app_tp_transfer.o(.data), (3 bytes). + Removing app_tp_transfer.o(.data), (3 bytes). + Removing app_tp_transfer.o(.data), (3 bytes). + Removing app_tp_transfer.o(.data), (5 bytes). + Removing app_tp_transfer.o(.data), (6 bytes). + Removing app_tp_transfer.o(.data), (2 bytes). + Removing app_tp_transfer.o(.data), (3 bytes). + Removing app_tp_transfer.o(.data), (3 bytes). + Removing app_tp_transfer.o(.data), (3 bytes). + Removing app_tp_transfer.o(.data), (3 bytes). + Removing app_tp_transfer.o(.data), (4 bytes). + Removing app_tp_transfer.o(.data), (4 bytes). + Removing app_tp_transfer.o(.data), (3 bytes). + Removing app_tp_transfer.o(.data), (3 bytes). + Removing app_tp_transfer.o(.data), (3 bytes). + Removing app_tp_transfer.o(.data), (3 bytes). + Removing app_tp_transfer.o(.data), (1 bytes). + Removing app_tp_transfer.o(.data), (2 bytes). + Removing app_tp_transfer.o(.data), (2 bytes). + Removing app_tp_st_touch.o(.rev16_text), (4 bytes). + Removing app_tp_st_touch.o(.revsh_text), (4 bytes). + Removing app_tp_st_touch.o(i.ap_tp_st_touch_hardware_reset), (196 bytes). + Removing board.o(.rev16_text), (4 bytes). + Removing board.o(.revsh_text), (4 bytes). + Removing startup_armcm0.o(HEAP), (3072 bytes). + Removing hal_dsi_rx_ctrl.o(.rev16_text), (4 bytes). + Removing hal_dsi_rx_ctrl.o(.revsh_text), (4 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_ack_long_cmd), (88 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_ack_short_cmd), (28 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video), (228 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_mode_init), (48 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern), (216 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_compressen_en), (16 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode), (128 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_release_handle), (40 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart), (80 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_auto_hw_filter), (28 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_dcs_direct_mode), (8 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_cmd_filter), (40 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode), (52 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pentile_format), (56 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data), (148 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk), (68 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_te_waveform), (52 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate), (112 bytes). + Removing hal_dsi_tx_ctrl.o(.rev16_text), (4 bytes). + Removing hal_dsi_tx_ctrl.o(.revsh_text), (4 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic), (144 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_ulps_mode), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_ulps_mode), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd), (140 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_release_handle), (28 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_cus_pq_filter), (24 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_endianness), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_escape_clock_div), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_lp_cmd), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg), (24 bytes). + Removing hal_gpio.o(.rev16_text), (4 bytes). + Removing hal_gpio.o(.revsh_text), (4 bytes). + Removing hal_gpio.o(i.hal_gpio_get_int_type), (20 bytes). + Removing hal_gpio.o(i.hal_gpio_get_pull_state), (32 bytes). + Removing hal_gpio.o(i.hal_gpio_set_driving_strength), (32 bytes). + Removing hal_gpio.o(i.hal_gpio_set_output_data_ex), (36 bytes). + Removing hal_gpio.o(i.hal_gpio_set_schmitt_trigger), (32 bytes). + Removing hal_gpio.o(i.hal_gpio_set_slew_rate), (32 bytes). + Removing hal_i2c_master.o(.rev16_text), (4 bytes). + Removing hal_i2c_master.o(.revsh_text), (4 bytes). + Removing hal_i2c_master.o(i.hal_i2c_m_set_high_impedance), (46 bytes). + Removing hal_i2c_slave.o(.rev16_text), (4 bytes). + Removing hal_i2c_slave.o(.revsh_text), (4 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_get_tx_byte_num), (8 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_read_complate), (12 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_read_complate_clear), (12 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_read_data), (8 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_rxfifo_notempty), (20 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_set_dma_tx_cycle), (36 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_set_high_impedance), (46 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_write_complate), (12 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_write_data), (8 bytes). + Removing hal_spi_master.o(.rev16_text), (4 bytes). + Removing hal_spi_master.o(.revsh_text), (4 bytes). + Removing hal_spi_master.o(i.hal_spi_m_callback), (24 bytes). + Removing hal_spi_master.o(i.hal_spi_m_dma_init), (104 bytes). + Removing hal_spi_master.o(i.hal_spi_m_dma_read), (36 bytes). + Removing hal_spi_master.o(i.hal_spi_m_dma_write), (40 bytes). + Removing hal_spi_master.o(i.hal_spi_m_get_transfer_complate), (36 bytes). + Removing hal_spi_master.o(i.hal_spi_m_gpio_init), (8 bytes). + Removing hal_spi_master.o(i.hal_spi_m_read_rxfifo), (28 bytes). + Removing hal_spi_master.o(i.hal_spi_m_set_high_impedance), (100 bytes). + Removing hal_spi_master.o(.data), (1 bytes). + Removing hal_system.o(.rev16_text), (4 bytes). + Removing hal_system.o(.revsh_text), (4 bytes). + Removing hal_system.o(i.hal_system_deep_sleep_mode), (8 bytes). + Removing hal_system.o(i.hal_system_disable_systick), (8 bytes). + Removing hal_system.o(i.hal_system_flash_read), (56 bytes). + Removing hal_system.o(i.hal_system_flash_write), (58 bytes). + Removing hal_system.o(i.hal_system_get_tick), (8 bytes). + Removing hal_system.o(i.hal_system_idle_mode), (8 bytes). + Removing hal_system.o(i.hal_system_register_systick_cb), (8 bytes). + Removing hal_system.o(i.hal_system_reset_chip), (32 bytes). + Removing hal_system.o(i.hal_system_share_flash_mode), (20 bytes). + Removing hal_system.o(i.hal_system_sleep_mode), (48 bytes). + Removing hal_timer.o(.rev16_text), (4 bytes). + Removing hal_timer.o(.revsh_text), (4 bytes). + Removing hal_timer.o(i.hal_timer_deinit), (46 bytes). + Removing hal_timer.o(i.hal_timer_get_status), (52 bytes). + Removing hal_timer.o(i.hal_timer_set_repeat), (8 bytes). + Removing hal_timer.o(i.hal_timer_stop), (48 bytes). + Removing tau_delay.o(.rev16_text), (4 bytes). + Removing tau_delay.o(.revsh_text), (4 bytes). + Removing tau_log.o(.rev16_text), (4 bytes). + Removing tau_log.o(.revsh_text), (4 bytes). + Removing tau_log.o(i.fgetc), (22 bytes). + Removing app_tp_for_custom_s8.o(.rev16_text), (4 bytes). + Removing app_tp_for_custom_s8.o(.revsh_text), (4 bytes). + Removing app_tp_for_custom_s8.o(i.app_tp_screen_analysis_const), (56 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (1120 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (1120 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (288 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (1 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (3 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (3 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (1 bytes). + Removing app_tp_for_custom_s8.o(.data), (1 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (1 bytes). + Removing app_tp_for_custom_s8.o(.data), (1 bytes). + Removing app_tp_for_custom_s8.o(.data), (64 bytes). + Removing app_tp_for_custom_s8.o(.data), (3 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (1 bytes). + Removing app_tp_for_custom_s8.o(.data), (32 bytes). + Removing app_tp_for_custom_s8.o(.data), (1 bytes). + Removing hal_uart.o(.rev16_text), (4 bytes). + Removing hal_uart.o(.revsh_text), (4 bytes). + Removing hal_uart.o(i.hal_uart_deinit), (28 bytes). + Removing hal_uart.o(i.hal_uart_dmacallback), (36 bytes). + Removing hal_uart.o(i.hal_uart_receive_blocking), (16 bytes). + Removing hal_uart.o(i.hal_uart_receive_dma), (76 bytes). + Removing hal_uart.o(i.hal_uart_transmit_dma), (76 bytes). + Removing norflash.o(.rev16_text), (4 bytes). + Removing norflash.o(.revsh_text), (4 bytes). + Removing norflash.o(i.norflash_best_cfg_init), (44 bytes). + Removing norflash.o(i.norflash_big_end_clear), (14 bytes). + Removing norflash.o(i.norflash_big_end_enable), (20 bytes). + Removing norflash.o(i.norflash_check_crc32), (14 bytes). + Removing norflash.o(i.norflash_check_id), (72 bytes). + Removing norflash.o(i.norflash_dma_callback), (24 bytes). + Removing norflash.o(i.norflash_dma_read), (156 bytes). + Removing norflash.o(i.norflash_dma_write), (252 bytes). + Removing norflash.o(i.norflash_dual_read), (60 bytes). + Removing norflash.o(i.norflash_dual_write), (112 bytes). + Removing norflash.o(i.norflash_en4b), (40 bytes). + Removing norflash.o(i.norflash_en_quad), (116 bytes). + Removing norflash.o(i.norflash_en_quad_check), (64 bytes). + Removing norflash.o(i.norflash_erase_block), (44 bytes). + Removing norflash.o(i.norflash_erase_chip), (28 bytes). + Removing norflash.o(i.norflash_erase_sector), (44 bytes). + Removing norflash.o(i.norflash_ex4b), (40 bytes). + Removing norflash.o(i.norflash_exit_quad), (76 bytes). + Removing norflash.o(i.norflash_get_dual_hstatus), (52 bytes). + Removing norflash.o(i.norflash_get_hstatus), (52 bytes). + Removing norflash.o(i.norflash_get_status), (52 bytes). + Removing norflash.o(i.norflash_init), (48 bytes). + Removing norflash.o(i.norflash_quad_read), (76 bytes). + Removing norflash.o(i.norflash_quad_write), (108 bytes). + Removing norflash.o(i.norflash_read), (28 bytes). + Removing norflash.o(i.norflash_read_config_reg), (36 bytes). + Removing norflash.o(i.norflash_read_id), (20 bytes). + Removing norflash.o(i.norflash_reset), (2 bytes). + Removing norflash.o(i.norflash_reset_crc32), (32 bytes). + Removing norflash.o(i.norflash_set_best_cfg), (50 bytes). + Removing norflash.o(i.norflash_set_best_read_cfg), (84 bytes). + Removing norflash.o(i.norflash_set_best_write_cfg), (84 bytes). + Removing norflash.o(i.norflash_switch_fls_spi), (112 bytes). + Removing norflash.o(i.norflash_write), (96 bytes). + Removing norflash.o(i.norflash_write_disable), (64 bytes). + Removing norflash.o(i.norflash_write_enable), (56 bytes). + Removing norflash.o(i.norflash_write_endian_scr), (132 bytes). + Removing norflash.o(.bss), (412 bytes). + Removing norflash.o(.bss), (32 bytes). + Removing norflash.o(.data), (2 bytes). + Removing drv_common.o(.rev16_text), (4 bytes). + Removing drv_common.o(.revsh_text), (4 bytes). + Removing drv_common.o(i.drv_common_disable_systick), (20 bytes). + Removing drv_common.o(i.drv_common_get_tick), (12 bytes). + Removing drv_common.o(i.drv_common_idle_mode), (40 bytes). + Removing drv_common.o(i.drv_common_systick_register_cb), (12 bytes). + Removing drv_crgu.o(.rev16_text), (4 bytes). + Removing drv_crgu.o(.revsh_text), (4 bytes). + Removing drv_crgu.o(i.drv_crgu_clear_all_reset_flags), (12 bytes). + Removing drv_crgu.o(i.drv_crgu_clear_reset_flag), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_config_clocks), (16 bytes). + Removing drv_crgu.o(i.drv_crgu_config_clocks_div), (16 bytes). + Removing drv_crgu.o(i.drv_crgu_config_clocks_src), (16 bytes). + Removing drv_crgu.o(i.drv_crgu_get_ana_clk_status), (24 bytes). + Removing drv_crgu.o(i.drv_crgu_get_fpga_id), (12 bytes). + Removing drv_crgu.o(i.drv_crgu_get_mipi_ref_src), (16 bytes). + Removing drv_crgu.o(i.drv_crgu_get_reset_flag), (24 bytes). + Removing drv_crgu.o(i.drv_crgu_get_system_clk), (28 bytes). + Removing drv_crgu.o(i.drv_crgu_reset_chip), (12 bytes). + Removing drv_crgu.o(i.drv_crgu_set_200m_scan_src), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_300m_scan_src), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_abp0_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_adc_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_adc_src), (24 bytes). + Removing drv_crgu.o(i.drv_crgu_set_apb1_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_apb2_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_fls_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_fls_src), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_monitor_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_monitor_src), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_swire_div), (20 bytes). + Removing drv_dma.o(.rev16_text), (4 bytes). + Removing drv_dma.o(.revsh_text), (4 bytes). + Removing drv_dma.o(i.drv_dma_abort_transfer), (32 bytes). + Removing drv_dma.o(i.drv_dma_ahb_init), (74 bytes). + Removing drv_dma.o(i.drv_dma_channel_is_active), (20 bytes). + Removing drv_dma.o(i.drv_dma_deinit), (32 bytes). + Removing drv_dma.o(i.drv_dma_disenable_channel_interrupts), (24 bytes). + Removing drv_dma.o(i.drv_dma_enable_cycle), (44 bytes). + Removing drv_dma.o(i.drv_dma_get_remaining_bytes), (32 bytes). + Removing drv_dma.o(i.drv_dma_init), (24 bytes). + Removing drv_dma.o(i.drv_dma_m2m_init), (72 bytes). + Removing drv_dma.o(i.drv_dma_reset), (10 bytes). + Removing drv_dma.o(i.drv_dma_set_ccr), (114 bytes). + Removing drv_dma.o(i.drv_dma_start_transfer), (32 bytes). + Removing drv_fls.o(.rev16_text), (4 bytes). + Removing drv_fls.o(.revsh_text), (4 bytes). + Removing drv_fls.o(i.__NVIC_DisableIRQ), (32 bytes). + Removing drv_fls.o(i.drv_fls_gpio_connect), (28 bytes). + Removing drv_fls.o(i.drv_fls_gpio_disconnect), (32 bytes). + Removing drv_fls.o(i.fls_EnableClk), (12 bytes). + Removing drv_fls.o(i.fls_busy_pending), (12 bytes). + Removing drv_fls.o(i.fls_clear_irq_status), (6 bytes). + Removing drv_fls.o(i.fls_ctrl_cfg_init), (72 bytes). + Removing drv_fls.o(i.fls_ddat_enable), (24 bytes). + Removing drv_fls.o(i.fls_de_init), (52 bytes). + Removing drv_fls.o(i.fls_descr), (10 bytes). + Removing drv_fls.o(i.fls_disable_it), (36 bytes). + Removing drv_fls.o(i.fls_en_scr), (10 bytes). + Removing drv_fls.o(i.fls_enable_it), (48 bytes). + Removing drv_fls.o(i.fls_get_crcout), (4 bytes). + Removing drv_fls.o(i.fls_get_default_fls_config), (20 bytes). + Removing drv_fls.o(i.fls_get_default_spi_config), (44 bytes). + Removing drv_fls.o(i.fls_get_default_tuning), (12 bytes). + Removing drv_fls.o(i.fls_get_tuning), (18 bytes). + Removing drv_fls.o(i.fls_init), (62 bytes). + Removing drv_fls.o(i.fls_qadr_enable), (22 bytes). + Removing drv_fls.o(i.fls_qcmd_enable), (22 bytes). + Removing drv_fls.o(i.fls_qdat_enable), (22 bytes). + Removing drv_fls.o(i.fls_read_byte_data), (130 bytes). + Removing drv_fls.o(i.fls_read_cmd), (104 bytes). + Removing drv_fls.o(i.fls_read_cmd_it), (110 bytes). + Removing drv_fls.o(i.fls_reset_crc), (18 bytes). + Removing drv_fls.o(i.fls_scr_clear), (10 bytes). + Removing drv_fls.o(i.fls_set_addr_dummy), (32 bytes). + Removing drv_fls.o(i.fls_set_addr_len), (32 bytes). + Removing drv_fls.o(i.fls_set_mc_irq_mask), (26 bytes). + Removing drv_fls.o(i.fls_set_read), (10 bytes). + Removing drv_fls.o(i.fls_set_tuning), (24 bytes). + Removing drv_fls.o(i.fls_set_write), (10 bytes). + Removing drv_fls.o(i.fls_single_mode), (16 bytes). + Removing drv_fls.o(i.fls_spi_init), (180 bytes). + Removing drv_fls.o(i.fls_spi_start), (10 bytes). + Removing drv_fls.o(i.fls_swrst), (18 bytes). + Removing drv_fls.o(i.fls_write_byte_data), (164 bytes). + Removing drv_fls.o(i.fls_write_cmd), (58 bytes). + Removing drv_fls.o(.data), (4 bytes). + Removing drv_gpio.o(.rev16_text), (4 bytes). + Removing drv_gpio.o(.revsh_text), (4 bytes). + Removing drv_gpio.o(i.drv_gpio_get_pull_state), (224 bytes). + Removing drv_gpio.o(i.drv_gpio_set_driving_strength), (312 bytes). + Removing drv_gpio.o(i.drv_gpio_set_schmitt_trigger), (168 bytes). + Removing drv_gpio.o(i.drv_gpio_set_slew_rate), (168 bytes). + Removing drv_i2c_dma.o(.rev16_text), (4 bytes). + Removing drv_i2c_dma.o(.revsh_text), (4 bytes). + Removing drv_i2c_master.o(.rev16_text), (4 bytes). + Removing drv_i2c_master.o(.revsh_text), (4 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_bus_init), (36 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_disable_intr), (16 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_get_fifo_status), (28 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_read_data), (32 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_set_fifo_threshold), (24 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_set_sys_mask), (48 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_write_data), (32 bytes). + Removing drv_i2c_slave.o(.rev16_text), (4 bytes). + Removing drv_i2c_slave.o(.revsh_text), (4 bytes). + Removing drv_i2c_slave.o(i.drv_i2c_s_bus_init), (36 bytes). + Removing drv_i2c_slave.o(i.drv_i2c_s_disable_intr), (16 bytes). + Removing drv_i2c_slave.o(i.drv_i2c_s_enable), (16 bytes). + Removing drv_i2c_slave.o(i.drv_i2c_s_get_tx_byte_num), (12 bytes). + Removing drv_i2c_slave.o(i.drv_i2c_s_read_data), (32 bytes). + Removing drv_i2c_slave.o(i.drv_i2c_s_set_fifo_threshold), (24 bytes). + Removing drv_i2c_slave.o(i.drv_i2c_s_set_sys_mask), (48 bytes). + Removing drv_param_init.o(.rev16_text), (4 bytes). + Removing drv_param_init.o(.revsh_text), (4 bytes). + Removing drv_param_init.o(i.drv_param_init_set_sclu_filter), (28 bytes). + Removing drv_pwr.o(.rev16_text), (4 bytes). + Removing drv_pwr.o(.revsh_text), (4 bytes). + Removing drv_pwr.o(i.drv_pwr_enter_deep_sleep_mode), (44 bytes). + Removing drv_spi_dma.o(.rev16_text), (4 bytes). + Removing drv_spi_dma.o(.revsh_text), (4 bytes). + Removing drv_spi_dma.o(i.__NVIC_ClearPendingIRQ), (24 bytes). + Removing drv_spi_dma.o(i.drv_spi_abort_dma), (108 bytes). + Removing drv_spi_dma.o(i.drv_spi_dma_callback), (60 bytes). + Removing drv_spi_dma.o(i.drv_spi_dma_ch6_init), (208 bytes). + Removing drv_spi_dma.o(i.drv_spi_dma_init), (220 bytes). + Removing drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback), (48 bytes). + Removing drv_spi_dma.o(i.drv_spi_set_dma_irq_callback), (88 bytes). + Removing drv_spi_dma.o(i.drv_spim_dma_read), (96 bytes). + Removing drv_spi_dma.o(i.drv_spim_dma_write), (60 bytes). + Removing drv_spi_dma.o(i.drv_spis_dma_write), (72 bytes). + Removing drv_spi_dma.o(.bss), (480 bytes). + Removing drv_spi_dma.o(.data), (16 bytes). + Removing drv_spi_master.o(.rev16_text), (4 bytes). + Removing drv_spi_master.o(.revsh_text), (4 bytes). + Removing drv_spi_master.o(i.drv_spi_m_deinit), (40 bytes). + Removing drv_spi_master.o(i.drv_spi_m_disable_int), (68 bytes). + Removing drv_spi_master.o(i.drv_spi_m_enable_int), (72 bytes). + Removing drv_spi_master.o(i.drv_spi_m_enable_rx_dma), (32 bytes). + Removing drv_spi_master.o(i.drv_spi_m_enable_tx_dma), (28 bytes). + Removing drv_spi_master.o(i.drv_spi_m_get_dma_address), (8 bytes). + Removing drv_spi_master.o(i.drv_spi_m_gpio_init), (32 bytes). + Removing drv_spi_master.o(i.drv_spi_m_set_intr_callback), (12 bytes). + Removing drv_spi_master.o(i.drv_spi_m_switch_sclk), (28 bytes). + Removing drv_spi_master.o(i.drv_spi_m_write_data), (44 bytes). + Removing drv_spi_master.o(i.drv_spi_master_init), (164 bytes). + Removing drv_sys_cfg.o(.rev16_text), (4 bytes). + Removing drv_sys_cfg.o(.revsh_text), (4 bytes). + Removing drv_sys_cfg.o(i.drv_sys_cfg_dma_req_mask), (32 bytes). + Removing drv_sys_cfg.o(i.drv_sys_cfg_read_version0_id), (12 bytes). + Removing drv_sys_cfg.o(i.drv_sys_cfg_set_ap_reset), (28 bytes). + Removing drv_timer.o(.rev16_text), (4 bytes). + Removing drv_timer.o(.revsh_text), (4 bytes). + Removing drv_timer.o(i.drv_timer_clean_timer_value), (12 bytes). + Removing drv_timer.o(i.drv_timer_get_current_count), (10 bytes). + Removing drv_timer.o(i.drv_timer_get_match), (10 bytes). + Removing drv_timer.o(i.drv_timer_set_repeat), (16 bytes). + Removing hal_internal_vsync.o(.rev16_text), (4 bytes). + Removing hal_internal_vsync.o(.revsh_text), (4 bytes). + Removing hal_internal_vsync.o(i.hal_iniernal_vsync_deinit), (20 bytes). + Removing hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual), (528 bytes). + Removing hal_internal_vsync.o(i.hal_internal_vsync_set_dcs_direct_mode), (48 bytes). + Removing dcs_packet_fifo.o(i.dcs_packet_get_fifo_size), (16 bytes). + Removing drv_dsi_rx.o(.rev16_text), (4 bytes). + Removing drv_dsi_rx.o(.revsh_text), (4 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_get_phy_stopstate), (66 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_get_version), (4 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_phy_resistor_calibration), (236 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_pg_cfg), (32 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_pg_cfg), (48 bytes). + Removing drv_dsi_rx.o(i.drv_rx_phy_test_read), (12 bytes). + Removing drv_dsi_tx.o(.rev16_text), (4 bytes). + Removing drv_dsi_tx.o(.revsh_text), (4 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_command_get_payload), (4 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_force_interrupt), (8 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_get_phy_status), (6 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_forcepll), (12 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_resistor_calibration), (232 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_start), (18 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_status_pll_lock), (10 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ulpsactivenot), (62 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_trigger), (92 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter), (344 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit), (276 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_sdf_3d), (28 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_set_bta), (22 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_set_vpg), (70 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_version), (4 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_vid_shadow), (16 bytes). + Removing drv_dsi_tx.o(i.drv_tx_phy_test_read), (10 bytes). + Removing drv_lcdc.o(.rev16_text), (4 bytes). + Removing drv_lcdc.o(.revsh_text), (4 bytes). + Removing drv_lcdc.o(i.drv_lcdc_config_rgb_to_pentile), (26 bytes). + Removing drv_lcdc.o(i.drv_lcdc_enable), (42 bytes). + Removing drv_lcdc.o(i.drv_lcdc_set_prefetch), (24 bytes). + Removing drv_lcdc.o(i.drv_lcdc_update_shadow_reg), (12 bytes). + Removing drv_memc.o(.rev16_text), (4 bytes). + Removing drv_memc.o(.revsh_text), (4 bytes). + Removing drv_memc.o(i.drv_memc_set_db_frm_time), (14 bytes). + Removing drv_memc.o(i.drv_memc_set_db_int_frame), (28 bytes). + Removing drv_memc.o(i.drv_memc_set_fb_remaining_line_trigger), (12 bytes). + Removing drv_memc.o(i.drv_memc_set_read_trigger_line), (16 bytes). + Removing drv_memc.o(i.drv_memc_set_te_ind), (16 bytes). + Removing drv_memc.o(i.drv_memc_set_tear_hwclr), (16 bytes). + Removing drv_memc.o(i.drv_memc_set_vidc_fb_arb), (14 bytes). + Removing drv_memc.o(i.drv_memc_set_write_trigger_line), (16 bytes). + Removing drv_rxbr.o(.rev16_text), (4 bytes). + Removing drv_rxbr.o(.revsh_text), (4 bytes). + Removing drv_rxbr.o(i.drv_rxbr_dsc_flush), (16 bytes). + Removing drv_rxbr.o(i.drv_rxbr_get_cur_hline_rcv_cnt), (8 bytes). + Removing drv_rxbr.o(i.drv_rxbr_get_ipi_vsync_interval), (8 bytes). + Removing drv_rxbr.o(i.drv_rxbr_get_pix_fmt), (8 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_col_addr), (4 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_compress), (24 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_page_addr), (4 bytes). + Removing drv_rxbr.o(i.drv_rxbr_soft_reset), (98 bytes). + Removing drv_vidc.o(.rev16_text), (4 bytes). + Removing drv_vidc.o(.revsh_text), (4 bytes). + Removing drv_vidc.o(i.drv_vidc_clear_status0), (14 bytes). + Removing drv_vidc.o(i.drv_vidc_debug_cap_pixel), (24 bytes). + Removing drv_vidc.o(i.drv_vidc_debug_signal_frame), (30 bytes). + Removing drv_vidc.o(i.drv_vidc_get_int_source), (38 bytes). + Removing drv_vidc.o(i.drv_vidc_get_status0), (20 bytes). + Removing drv_vidc.o(i.drv_vidc_get_status1), (20 bytes). + Removing drv_vidc.o(i.drv_vidc_get_status2), (6 bytes). + Removing drv_vidc.o(i.drv_vidc_set_dsc_thresh), (4 bytes). + Removing drv_vidc.o(i.drv_vidc_set_frmst_latency), (12 bytes). + Removing drv_vidc.o(i.drv_vidc_set_inff_thresh), (4 bytes). + Removing drv_vidc.o(i.drv_vidc_set_irq_line), (20 bytes). + Removing drv_vidc.o(i.drv_vidc_set_module_enable), (20 bytes). + Removing drv_vidc.o(i.drv_vidc_set_outff_thresh), (4 bytes). + Removing drv_vidc.o(i.drv_vidc_update_src_format), (14 bytes). + Removing irq_redirect .o(.rev16_text), (4 bytes). + Removing irq_redirect .o(.revsh_text), (4 bytes). + Removing drv_phy_common.o(.rev16_text), (4 bytes). + Removing drv_phy_common.o(.revsh_text), (4 bytes). + Removing drv_phy_common.o(i.drv_phy_test_read), (8 bytes). + Removing drv_chip_info.o(.rev16_text), (4 bytes). + Removing drv_chip_info.o(.revsh_text), (4 bytes). + Removing drv_dsc_dec.o(.rev16_text), (4 bytes). + Removing drv_dsc_dec.o(.revsh_text), (4 bytes). + Removing drv_dsc_dec.o(i.drv_dsc_dec_set_u32_pps), (120 bytes). + Removing hal_spi_slave.o(.rev16_text), (4 bytes). + Removing hal_spi_slave.o(.revsh_text), (4 bytes). + Removing hal_spi_slave.o(i.hal_spi_s_set_high_impedance), (100 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_auto_transfer_abort), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_auto_transfer_start), (56 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_busy), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_deinit), (10 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_disable), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_enable), (96 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_flush_fifo), (20 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_get_rxfifo_notempty), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_gpio_init), (8 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_init), (76 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_read_data), (10 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_register_callback), (12 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_reset_tx), (68 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_set_auto_rx_buffer), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_set_auto_tx_buffer), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_write_data), (14 bytes). + Removing drv_fls_dma.o(.rev16_text), (4 bytes). + Removing drv_fls_dma.o(.revsh_text), (4 bytes). + Removing drv_fls_dma.o(i.fls_abort_dma), (42 bytes). + Removing drv_fls_dma.o(i.fls_dma_disable), (10 bytes). + Removing drv_fls_dma.o(i.fls_dma_enable), (10 bytes). + Removing drv_fls_dma.o(i.fls_dma_read_prepare), (86 bytes). + Removing drv_fls_dma.o(i.fls_dma_write_prepare), (82 bytes). + Removing drv_fls_dma.o(i.fls_read_dmacallback), (32 bytes). + Removing drv_fls_dma.o(i.fls_transfer_create_handle_dma), (208 bytes). + Removing drv_fls_dma.o(i.fls_transfer_dma), (112 bytes). + Removing drv_fls_dma.o(i.fls_transfer_get_receive_count_dma), (44 bytes). + Removing drv_fls_dma.o(i.fls_write_dmacallback), (32 bytes). + Removing drv_fls_dma.o(.data), (8 bytes). + Removing drv_pwm.o(.rev16_text), (4 bytes). + Removing drv_pwm.o(.revsh_text), (4 bytes). + Removing drv_pwm.o(i.drv_pwm_in_clear_pwm_int_all), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_in_enable), (32 bytes). + Removing drv_pwm.o(i.drv_pwm_in_get_counter_period), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_in_get_current_count), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_in_get_high_period), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_in_get_low_period), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_in_register_callback), (24 bytes). + Removing drv_pwm.o(i.drv_pwm_in_set_pwm_int), (32 bytes). + Removing drv_pwm.o(i.drv_pwm_in_set_sys_int), (52 bytes). + Removing drv_pwm.o(i.drv_pwm_out_enable), (32 bytes). + Removing drv_pwm.o(i.drv_pwm_out_get_sync_flag), (16 bytes). + Removing drv_pwm.o(i.drv_pwm_out_pause), (28 bytes). + Removing drv_pwm.o(i.drv_pwm_out_set_control), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_out_set_period), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_out_set_sync_mode), (32 bytes). + Removing drv_pwm.o(i.drv_pwm_out_set_threshold), (12 bytes). + Removing drv_spi_slave.o(.rev16_text), (4 bytes). + Removing drv_spi_slave.o(.revsh_text), (4 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_deinit), (40 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_disable_int), (68 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_enable_int), (72 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_enable_rx_dma), (32 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_enable_tx_dma), (28 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_get_dma_address), (8 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_gpio_init), (24 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_read_data), (32 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_switch_sclk), (28 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_write_data), (44 bytes). + Removing drv_spi_slave.o(i.drv_spi_slave_init), (76 bytes). + Removing drv_swire.o(.rev16_text), (4 bytes). + Removing drv_swire.o(.revsh_text), (4 bytes). + Removing drv_swire.o(i.drv_swire_enable), (28 bytes). + Removing drv_swire.o(i.drv_swire_register_callback), (12 bytes). + Removing drv_swire.o(i.drv_swire_set_bit_time), (24 bytes). + Removing drv_swire.o(i.drv_swire_set_power_down), (28 bytes). + Removing drv_swire.o(i.drv_swire_set_pulse_count), (12 bytes). + Removing drv_uart.o(.rev16_text), (4 bytes). + Removing drv_uart.o(.revsh_text), (4 bytes). + Removing drv_uart.o(i.UART_AbortReceive), (30 bytes). + Removing drv_uart.o(i.UART_AbortSend), (30 bytes). + Removing drv_uart.o(i.UART_Deinit), (28 bytes). + Removing drv_uart.o(i.UART_Disable_IT), (68 bytes). + Removing drv_uart.o(i.UART_EnableDma), (32 bytes). + Removing drv_uart.o(i.UART_Enable_IT), (44 bytes). + Removing drv_uart.o(i.UART_GetDefaultConfig), (72 bytes). + Removing drv_uart.o(i.UART_GetFIFO_Ctrl), (20 bytes). + Removing drv_uart.o(i.UART_GetReceiveCount), (22 bytes). + Removing drv_uart.o(i.UART_GetReceiveStatus), (20 bytes). + Removing drv_uart.o(i.UART_GetRxRingBufferLength), (28 bytes). + Removing drv_uart.o(i.UART_GetSendCount), (22 bytes). + Removing drv_uart.o(i.UART_GetSendStatus), (20 bytes). + Removing drv_uart.o(i.UART_ReadBlocking), (32 bytes). + Removing drv_uart.o(i.UART_ReceiveNonBlocking), (50 bytes). + Removing drv_uart.o(i.UART_ResetTxFIFO), (36 bytes). + Removing drv_uart.o(i.UART_SendNonBlocking), (38 bytes). + Removing drv_uart.o(i.UART_TransferCreateHandle), (96 bytes). + Removing drv_uart.o(i.UART_TransferStartRingBuffer), (30 bytes). + Removing drv_uart.o(.constdata), (1 bytes). + Removing drv_uart_dma.o(.rev16_text), (4 bytes). + Removing drv_uart_dma.o(.revsh_text), (4 bytes). + Removing drv_uart_dma.o(i.UART_DMAInit), (76 bytes). + Removing drv_uart_dma.o(i.UART_TransferAbortReceiveDMA), (16 bytes). + Removing drv_uart_dma.o(i.UART_TransferAbortSendDMA), (16 bytes). + Removing drv_uart_dma.o(i.UART_TransferCreateHandleDMA), (176 bytes). + Removing drv_uart_dma.o(i.UART_TransferGetReceiveCountDMA), (44 bytes). + Removing drv_uart_dma.o(i.UART_TransferReceiveDMA), (68 bytes). + Removing drv_uart_dma.o(i.UART_TransferReceiveDMACallback), (34 bytes). + Removing drv_uart_dma.o(i.UART_TransferSendDMA), (68 bytes). + Removing drv_uart_dma.o(i.UART_TransferSendDMACallback), (34 bytes). + Removing drv_uart_dma.o(.data), (8 bytes). + Removing drv_wdg.o(.rev16_text), (4 bytes). + Removing drv_wdg.o(.revsh_text), (4 bytes). + Removing drv_wdg.o(i.drv_wdg_enable), (32 bytes). + Removing drv_wdg.o(i.drv_wdg_load_match), (12 bytes). + Removing drv_wdg.o(i.drv_wdg_register_callback), (12 bytes). + Removing drv_wdg.o(i.drv_wdg_sel_mode), (28 bytes). + Removing drv_wdg.o(i.drv_wdg_set_repeat), (12 bytes). + Removing drv_efuse.o(.rev16_text), (4 bytes). + Removing drv_efuse.o(.revsh_text), (4 bytes). + Removing drv_efuse.o(i.drv_efuse_crc_cal), (128 bytes). + Removing drv_efuse.o(i.drv_efuse_get_default_config), (26 bytes). + Removing drv_efuse.o(i.drv_efuse_int_disable), (12 bytes). + Removing drv_efuse.o(i.drv_efuse_write), (46 bytes). + Removing drv_efuse.o(i.drv_efuse_write_req), (22 bytes). + Removing dflti.o(.text), (40 bytes). + +575 unused section(s) (total 26123 bytes) removed from the image. + +============================================================================== + +Image Symbol Table + + Local Symbols + + Symbol Name Value Ov Type Size Object(Section) + + ../clib/../cmprslib/zerorunl2.c 0x00000000 Number 0 __dczerorl2.o ABSOLUTE + ../clib/microlib/division.c 0x00000000 Number 0 idiv.o ABSOLUTE + ../clib/microlib/division.c 0x00000000 Number 0 uidiv.o ABSOLUTE + ../clib/microlib/division.c 0x00000000 Number 0 uldiv.o ABSOLUTE + ../clib/microlib/errno.c 0x00000000 Number 0 errno.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry7b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry8b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry2.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry5.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry11b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry8a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry7a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry9a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry9b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry10a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry10b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry11a.o ABSOLUTE + ../clib/microlib/longlong.c 0x00000000 Number 0 llshl.o ABSOLUTE + ../clib/microlib/longlong.c 0x00000000 Number 0 llushr.o ABSOLUTE + ../clib/microlib/longlong.c 0x00000000 Number 0 llsshr.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf5.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf8.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf7.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf6.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf4.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printfa.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 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ABSOLUTE + ../fplib/microlib/fpdiv.c 0x00000000 Number 0 fdiv.o ABSOLUTE + ../fplib/microlib/fpepilogue.c 0x00000000 Number 0 fepilogue.o ABSOLUTE + ../fplib/microlib/fpepilogue.c 0x00000000 Number 0 depilogue.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 dfixi.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 dfixul.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 ffixi.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 ffixui.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 dfixui.o ABSOLUTE + ../fplib/microlib/fpflt.c 0x00000000 Number 0 ffltui.o ABSOLUTE + ../fplib/microlib/fpflt.c 0x00000000 Number 0 dflti.o ABSOLUTE + ../fplib/microlib/fpflt.c 0x00000000 Number 0 dfltui.o ABSOLUTE + ../fplib/microlib/fpflt.c 0x00000000 Number 0 fflti.o ABSOLUTE + ../fplib/microlib/fpmul.c 0x00000000 Number 0 fmul.o ABSOLUTE + ../fplib/microlib/fpmul.c 0x00000000 Number 0 dmul.o ABSOLUTE + ../fplib/microlib/fpscalb.c 0x00000000 Number 0 fscalb.o ABSOLUTE + ../fplib/microlib/fpsqrt.c 0x00000000 Number 0 dsqrt.o ABSOLUTE + ../mathlib/ceil.c 0x00000000 Number 0 ceil.o ABSOLUTE + ../mathlib/sqrt.c 0x00000000 Number 0 sqrt_x.o ABSOLUTE + ../mathlib/sqrt.c 0x00000000 Number 0 sqrt.o ABSOLUTE + ..\..\..\src\common\tau_delay.c 0x00000000 Number 0 tau_delay.o ABSOLUTE + ..\..\..\src\common\tau_log.c 0x00000000 Number 0 tau_log.o ABSOLUTE + ..\..\..\src\driver\robin\src\drv_chip_info.c 0x00000000 Number 0 drv_chip_info.o ABSOLUTE + ..\..\..\src\driver\robin\src\drv_dsc_dec.c 0x00000000 Number 0 drv_dsc_dec.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_dsi_rx.c 0x00000000 Number 0 drv_dsi_rx.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_dsi_tx.c 0x00000000 Number 0 drv_dsi_tx.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_efuse.c 0x00000000 Number 0 drv_efuse.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_lcdc.c 0x00000000 Number 0 drv_lcdc.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_memc.c 0x00000000 Number 0 drv_memc.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_phy_common.c 0x00000000 Number 0 drv_phy_common.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_rxbr.c 0x00000000 Number 0 drv_rxbr.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_vidc.c 0x00000000 Number 0 drv_vidc.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\irq_redirect .c 0x00000000 Number 0 irq_redirect .o ABSOLUTE + ..\..\..\src\driver\source\robin\hal\internal\dcs_packet_fifo.c 0x00000000 Number 0 dcs_packet_fifo.o ABSOLUTE + ..\..\..\src\driver\source\robin\hal\internal\hal_internal_vsync.c 0x00000000 Number 0 hal_internal_vsync.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_common.c 0x00000000 Number 0 drv_common.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_crgu.c 0x00000000 Number 0 drv_crgu.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_dma.c 0x00000000 Number 0 drv_dma.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_fls.c 0x00000000 Number 0 drv_fls.o ABSOLUTE + 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..\..\..\src\sdk\robin\src\drv\drv_swire.c 0x00000000 Number 0 drv_swire.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_sys_cfg.c 0x00000000 Number 0 drv_sys_cfg.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_timer.c 0x00000000 Number 0 drv_timer.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_uart.c 0x00000000 Number 0 drv_uart.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_uart_dma.c 0x00000000 Number 0 drv_uart_dma.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_wdg.c 0x00000000 Number 0 drv_wdg.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_dsi_rx_ctrl.c 0x00000000 Number 0 hal_dsi_rx_ctrl.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_dsi_tx_ctrl.c 0x00000000 Number 0 hal_dsi_tx_ctrl.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_gpio.c 0x00000000 Number 0 hal_gpio.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_i2c_master.c 0x00000000 Number 0 hal_i2c_master.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_i2c_slave.c 0x00000000 Number 0 hal_i2c_slave.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_spi_master.c 0x00000000 Number 0 hal_spi_master.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_spi_slave.c 0x00000000 Number 0 hal_spi_slave.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_system.c 0x00000000 Number 0 hal_system.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_timer.c 0x00000000 Number 0 hal_timer.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_uart.c 0x00000000 Number 0 hal_uart.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\internal\norflash.c 0x00000000 Number 0 norflash.o ABSOLUTE + ..\\..\\..\\src\\common\\tau_delay.c 0x00000000 Number 0 tau_delay.o ABSOLUTE + ..\\..\\..\\src\\common\\tau_log.c 0x00000000 Number 0 tau_log.o ABSOLUTE + ..\\..\\..\\src\\driver\\robin\\src\\drv_chip_info.c 0x00000000 Number 0 drv_chip_info.o ABSOLUTE + ..\\..\\..\\src\\driver\\robin\\src\\drv_dsc_dec.c 0x00000000 Number 0 drv_dsc_dec.o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\drv\\drv_dsi_rx.c 0x00000000 Number 0 drv_dsi_rx.o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\drv\\drv_dsi_tx.c 0x00000000 Number 0 drv_dsi_tx.o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\drv\\drv_efuse.c 0x00000000 Number 0 drv_efuse.o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\drv\\drv_lcdc.c 0x00000000 Number 0 drv_lcdc.o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\drv\\drv_memc.c 0x00000000 Number 0 drv_memc.o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\drv\\drv_phy_common.c 0x00000000 Number 0 drv_phy_common.o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\drv\\drv_rxbr.c 0x00000000 Number 0 drv_rxbr.o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\drv\\drv_vidc.c 0x00000000 Number 0 drv_vidc.o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\drv\\irq_redirect .c 0x00000000 Number 0 irq_redirect .o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\hal\\internal\\hal_internal_vsync.c 0x00000000 Number 0 hal_internal_vsync.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_common.c 0x00000000 Number 0 drv_common.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_crgu.c 0x00000000 Number 0 drv_crgu.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_dma.c 0x00000000 Number 0 drv_dma.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_fls.c 0x00000000 Number 0 drv_fls.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_fls_dma.c 0x00000000 Number 0 drv_fls_dma.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_gpio.c 0x00000000 Number 0 drv_gpio.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_i2c_dma.c 0x00000000 Number 0 drv_i2c_dma.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_i2c_master.c 0x00000000 Number 0 drv_i2c_master.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_i2c_slave.c 0x00000000 Number 0 drv_i2c_slave.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_param_init.c 0x00000000 Number 0 drv_param_init.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_pwm.c 0x00000000 Number 0 drv_pwm.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_pwr.c 0x00000000 Number 0 drv_pwr.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_spi_dma.c 0x00000000 Number 0 drv_spi_dma.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_spi_master.c 0x00000000 Number 0 drv_spi_master.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_spi_slave.c 0x00000000 Number 0 drv_spi_slave.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_swire.c 0x00000000 Number 0 drv_swire.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_sys_cfg.c 0x00000000 Number 0 drv_sys_cfg.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_timer.c 0x00000000 Number 0 drv_timer.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_uart.c 0x00000000 Number 0 drv_uart.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_uart_dma.c 0x00000000 Number 0 drv_uart_dma.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_wdg.c 0x00000000 Number 0 drv_wdg.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_dsi_rx_ctrl.c 0x00000000 Number 0 hal_dsi_rx_ctrl.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_dsi_tx_ctrl.c 0x00000000 Number 0 hal_dsi_tx_ctrl.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_gpio.c 0x00000000 Number 0 hal_gpio.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_i2c_master.c 0x00000000 Number 0 hal_i2c_master.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_i2c_slave.c 0x00000000 Number 0 hal_i2c_slave.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_spi_master.c 0x00000000 Number 0 hal_spi_master.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_spi_slave.c 0x00000000 Number 0 hal_spi_slave.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_system.c 0x00000000 Number 0 hal_system.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_timer.c 0x00000000 Number 0 hal_timer.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_uart.c 0x00000000 Number 0 hal_uart.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\internal\\norflash.c 0x00000000 Number 0 norflash.o ABSOLUTE + ..\\src\\app\\demo\\ap_demo.c 0x00000000 Number 0 ap_demo.o ABSOLUTE + ..\\src\\app\\demo\\app_tp_for_custom_s8.c 0x00000000 Number 0 app_tp_for_custom_s8.o ABSOLUTE + ..\\src\\app\\demo\\app_tp_st_touch.c 0x00000000 Number 0 app_tp_st_touch.o ABSOLUTE + ..\\src\\app\\demo\\app_tp_transfer.c 0x00000000 Number 0 app_tp_transfer.o ABSOLUTE + ..\\src\\app\\main.c 0x00000000 Number 0 main.o ABSOLUTE + ..\\src\\board\\board.c 0x00000000 Number 0 board.o ABSOLUTE + ..\src\app\demo\ap_demo.c 0x00000000 Number 0 ap_demo.o ABSOLUTE + ..\src\app\demo\app_tp_for_custom_s8.c 0x00000000 Number 0 app_tp_for_custom_s8.o ABSOLUTE + ..\src\app\demo\app_tp_st_touch.c 0x00000000 Number 0 app_tp_st_touch.o ABSOLUTE + ..\src\app\demo\app_tp_transfer.c 0x00000000 Number 0 app_tp_transfer.o ABSOLUTE + ..\src\app\main.c 0x00000000 Number 0 main.o ABSOLUTE + ..\src\board\board.c 0x00000000 Number 0 board.o ABSOLUTE + ..\src\board\startup\startup_ARMCM0.s 0x00000000 Number 0 startup_armcm0.o ABSOLUTE + cdcmple.s 0x00000000 Number 0 cdcmple.o ABSOLUTE + cdrcmple.s 0x00000000 Number 0 cdrcmple.o ABSOLUTE + cfrcmple.s 0x00000000 Number 0 cfrcmple.o ABSOLUTE + dc.s 0x00000000 Number 0 dc.o ABSOLUTE + handlers.s 0x00000000 Number 0 handlers.o ABSOLUTE + init.s 0x00000000 Number 0 init.o ABSOLUTE + RESET 0x00010000 Section 192 startup_armcm0.o(RESET) + .ARM.Collect$$$$00000000 0x000100c0 Section 0 entry.o(.ARM.Collect$$$$00000000) + .ARM.Collect$$$$00000001 0x000100c0 Section 4 entry2.o(.ARM.Collect$$$$00000001) + .ARM.Collect$$$$00000004 0x000100c4 Section 4 entry5.o(.ARM.Collect$$$$00000004) + .ARM.Collect$$$$00000008 0x000100c8 Section 0 entry7b.o(.ARM.Collect$$$$00000008) + .ARM.Collect$$$$0000000A 0x000100c8 Section 0 entry8b.o(.ARM.Collect$$$$0000000A) + .ARM.Collect$$$$0000000B 0x000100c8 Section 8 entry9a.o(.ARM.Collect$$$$0000000B) + .ARM.Collect$$$$0000000D 0x000100d0 Section 0 entry10a.o(.ARM.Collect$$$$0000000D) + .ARM.Collect$$$$0000000F 0x000100d0 Section 0 entry11a.o(.ARM.Collect$$$$0000000F) + .ARM.Collect$$$$00002712 0x000100d0 Section 4 entry2.o(.ARM.Collect$$$$00002712) + __lit__00000000 0x000100d0 Data 4 entry2.o(.ARM.Collect$$$$00002712) + .text 0x000100d4 Section 120 startup_armcm0.o(.text) + .text 0x0001014c Section 0 uidiv.o(.text) + .text 0x00010178 Section 0 idiv.o(.text) + .text 0x000101a0 Section 0 memcpya.o(.text) + .text 0x000101c4 Section 0 memseta.o(.text) + .text 0x000101e8 Section 0 fadd.o(.text) + .text 0x0001029a Section 0 fmul.o(.text) + .text 0x00010314 Section 0 fdiv.o(.text) + .text 0x00010390 Section 0 fscalb.o(.text) + .text 0x000103a8 Section 0 dadd.o(.text) + .text 0x0001050c Section 0 dmul.o(.text) + .text 0x000105dc Section 0 ddiv.o(.text) + .text 0x000106cc Section 0 fflti.o(.text) + .text 0x000106e2 Section 0 ffltui.o(.text) + .text 0x000106f0 Section 0 dfltui.o(.text) + .text 0x0001070c Section 0 ffixi.o(.text) + .text 0x0001073e Section 0 ffixui.o(.text) + .text 0x00010768 Section 0 dfixi.o(.text) + .text 0x000107b0 Section 0 dfixui.o(.text) + .text 0x000107ec Section 0 f2d.o(.text) + .text 0x00010814 Section 40 cdcmple.o(.text) + .text 0x0001083c Section 20 cfrcmple.o(.text) + .text 0x00010850 Section 0 uldiv.o(.text) + .text 0x000108b0 Section 0 llshl.o(.text) + .text 0x000108d0 Section 0 llushr.o(.text) + .text 0x000108f2 Section 0 llsshr.o(.text) + .text 0x00010918 Section 0 fepilogue.o(.text) + .text 0x00010918 Section 0 iusefp.o(.text) + .text 0x0001099a Section 0 depilogue.o(.text) + .text 0x00010a58 Section 0 dsqrt.o(.text) + .text 0x00010afc Section 0 dfixul.o(.text) + .text 0x00010b3c Section 40 cdrcmple.o(.text) + .text 0x00010b64 Section 36 init.o(.text) + .text 0x00010b88 Section 0 __dczerorl2.o(.text) + i.ADC_IRQn_Handler 0x00010be0 Section 0 irq_redirect .o(i.ADC_IRQn_Handler) + i.AP_NRESET_IRQn_Handler 0x00010bf8 Section 0 irq_redirect .o(i.AP_NRESET_IRQn_Handler) + i.CRC16_2 0x00010c10 Section 0 app_tp_st_touch.o(i.CRC16_2) + i.DMA_IRQn_Handler 0x00010c50 Section 0 irq_redirect .o(i.DMA_IRQn_Handler) + i.EXTI_INT0_IRQn_Handler 0x00010c64 Section 0 irq_redirect .o(i.EXTI_INT0_IRQn_Handler) + i.EXTI_INT1_IRQn_Handler 0x00010c80 Section 0 irq_redirect .o(i.EXTI_INT1_IRQn_Handler) + i.EXTI_INT2_IRQn_Handler 0x00010c9c Section 0 irq_redirect .o(i.EXTI_INT2_IRQn_Handler) + i.EXTI_INT3_IRQn_Handler 0x00010cb8 Section 0 irq_redirect .o(i.EXTI_INT3_IRQn_Handler) + i.EXTI_INT4_IRQn_Handler 0x00010cd4 Section 0 irq_redirect .o(i.EXTI_INT4_IRQn_Handler) + i.EXTI_INT5_IRQn_Handler 0x00010cf0 Section 0 irq_redirect .o(i.EXTI_INT5_IRQn_Handler) + i.EXTI_INT6_IRQn_Handler 0x00010d0c Section 0 irq_redirect .o(i.EXTI_INT6_IRQn_Handler) + i.EXTI_INT7_IRQn_Handler 0x00010d28 Section 0 irq_redirect .o(i.EXTI_INT7_IRQn_Handler) + i.FLSCTRL_IRQn_Handler 0x00010d44 Section 0 irq_redirect .o(i.FLSCTRL_IRQn_Handler) + i.Gpio_swire_output 0x00010d58 Section 0 ap_demo.o(i.Gpio_swire_output) + i.HardFault_Handler 0x00010da8 Section 0 irq_redirect .o(i.HardFault_Handler) + i.I2C0_IRQn_Handler 0x00010dbc Section 0 irq_redirect .o(i.I2C0_IRQn_Handler) + i.I2C1_IRQn_Handler 0x00010dd4 Section 0 irq_redirect .o(i.I2C1_IRQn_Handler) + i.LCDC_IRQn_Handler 0x00010dec Section 0 irq_redirect .o(i.LCDC_IRQn_Handler) + i.LOG_printf 0x00010e04 Section 0 tau_log.o(i.LOG_printf) + i.MEMC_IRQn_Handler 0x00010e2c Section 0 irq_redirect .o(i.MEMC_IRQn_Handler) + i.MIPI_RX_IRQn_Handler 0x00010e44 Section 0 irq_redirect .o(i.MIPI_RX_IRQn_Handler) + i.MIPI_TX_IRQn_Handler 0x00010e5c Section 0 irq_redirect .o(i.MIPI_TX_IRQn_Handler) + i.PWMDET_IRQn_Handler 0x00010e74 Section 0 irq_redirect .o(i.PWMDET_IRQn_Handler) + i.S20_Start_init 0x00010e90 Section 0 app_tp_transfer.o(i.S20_Start_init) + i.SPIM_IRQn_Handler 0x00010fd4 Section 0 irq_redirect .o(i.SPIM_IRQn_Handler) + i.UART_DisableDma 0x00010ff0 Section 0 drv_uart.o(i.UART_DisableDma) + i.UART_GetInstance 0x00010ff2 Section 0 drv_uart.o(i.UART_GetInstance) + i.__scatterload_null 0x00010ff6 Section 2 handlers.o(i.__scatterload_null) + i.app_UART_IRQn_Handler 0x00010ff8 Section 0 drv_uart.o(i.app_UART_IRQn_Handler) + .ARM.__at_0x11000 0x00011000 Section 20 drv_common.o(.ARM.__at_0x11000) + i.SPIS_IRQn_Handler 0x00011014 Section 0 irq_redirect .o(i.SPIS_IRQn_Handler) + i.SWIRE_IRQn_Handler 0x00011030 Section 0 irq_redirect .o(i.SWIRE_IRQn_Handler) + i.SysTick_Handler 0x0001104c Section 0 irq_redirect .o(i.SysTick_Handler) + i.TIMER0_IRQn_Handler 0x00011064 Section 0 irq_redirect .o(i.TIMER0_IRQn_Handler) + i.TIMER1_IRQn_Handler 0x0001107c Section 0 irq_redirect .o(i.TIMER1_IRQn_Handler) + i.TIMER2_IRQn_Handler 0x00011094 Section 0 irq_redirect .o(i.TIMER2_IRQn_Handler) + i.TIMER3_IRQn_Handler 0x000110ac Section 0 irq_redirect .o(i.TIMER3_IRQn_Handler) + i.UART0_IRQ_Handle 0x000110c4 Section 0 drv_uart.o(i.UART0_IRQ_Handle) + i.UART_IRQn_Handler 0x000110e0 Section 0 irq_redirect .o(i.UART_IRQn_Handler) + i.UART_ResetRxFIFO 0x000110f8 Section 0 drv_uart.o(i.UART_ResetRxFIFO) + i.UART_SetBaudRate 0x0001111c Section 0 drv_uart.o(i.UART_SetBaudRate) + i.UART_SwitchSCLK 0x00011164 Section 0 drv_uart.o(i.UART_SwitchSCLK) + i.UART_TransferHandleIRQ 0x0001117e Section 0 drv_uart.o(i.UART_TransferHandleIRQ) + i.UART_WriteBlocking 0x000112b2 Section 0 drv_uart.o(i.UART_WriteBlocking) + i.UART_init 0x000112cc Section 0 drv_uart.o(i.UART_init) + i.VIDC_IRQn_Handler 0x00011388 Section 0 irq_redirect .o(i.VIDC_IRQn_Handler) + i.VPRE_IRQn_Handler 0x000113a0 Section 0 irq_redirect .o(i.VPRE_IRQn_Handler) + i.WDG_IRQn_Handler 0x000113b8 Section 0 irq_redirect .o(i.WDG_IRQn_Handler) + i.__0printf 0x000113d0 Section 0 printfa.o(i.__0printf) + i.__0vsprintf 0x000113f0 Section 0 printfa.o(i.__0vsprintf) + i.__ARM_clz 0x00011414 Section 0 depilogue.o(i.__ARM_clz) + i.__ARM_common_switch8 0x00011442 Section 0 hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) + i.__NVIC_ClearPendingIRQ 0x0001145c Section 0 drv_i2c_master.o(i.__NVIC_ClearPendingIRQ) + __NVIC_ClearPendingIRQ 0x0001145d Thumb Code 18 drv_i2c_master.o(i.__NVIC_ClearPendingIRQ) + i.__NVIC_ClearPendingIRQ 0x00011474 Section 0 drv_i2c_slave.o(i.__NVIC_ClearPendingIRQ) + __NVIC_ClearPendingIRQ 0x00011475 Thumb Code 18 drv_i2c_slave.o(i.__NVIC_ClearPendingIRQ) + i.__NVIC_ClearPendingIRQ 0x0001148c Section 0 drv_spi_master.o(i.__NVIC_ClearPendingIRQ) + __NVIC_ClearPendingIRQ 0x0001148d Thumb Code 18 drv_spi_master.o(i.__NVIC_ClearPendingIRQ) + i.__NVIC_DisableIRQ 0x000114a4 Section 0 drv_rxbr.o(i.__NVIC_DisableIRQ) + __NVIC_DisableIRQ 0x000114a5 Thumb Code 26 drv_rxbr.o(i.__NVIC_DisableIRQ) + i.__NVIC_EnableIRQ 0x000114c4 Section 0 drv_rxbr.o(i.__NVIC_EnableIRQ) + __NVIC_EnableIRQ 0x000114c5 Thumb Code 18 drv_rxbr.o(i.__NVIC_EnableIRQ) + i.__NVIC_SetPriority 0x000114dc Section 0 hal_spi_slave.o(i.__NVIC_SetPriority) + __NVIC_SetPriority 0x000114dd Thumb Code 60 hal_spi_slave.o(i.__NVIC_SetPriority) + i.__scatterload_copy 0x00011520 Section 14 handlers.o(i.__scatterload_copy) + i.__scatterload_zeroinit 0x0001152e Section 14 handlers.o(i.__scatterload_zeroinit) + i.__set_errno 0x0001153c Section 0 errno.o(i.__set_errno) + i._fp_digits 0x00011548 Section 0 printfa.o(i._fp_digits) + _fp_digits 0x00011549 Thumb Code 344 printfa.o(i._fp_digits) + i._printf_core 0x000116bc Section 0 printfa.o(i._printf_core) + _printf_core 0x000116bd Thumb Code 1754 printfa.o(i._printf_core) + i._printf_post_padding 0x00011da8 Section 0 printfa.o(i._printf_post_padding) + _printf_post_padding 0x00011da9 Thumb Code 32 printfa.o(i._printf_post_padding) + i._printf_pre_padding 0x00011dc8 Section 0 printfa.o(i._printf_pre_padding) + _printf_pre_padding 0x00011dc9 Thumb Code 44 printfa.o(i._printf_pre_padding) + i._sputc 0x00011df4 Section 0 printfa.o(i._sputc) + _sputc 0x00011df5 Thumb Code 10 printfa.o(i._sputc) + i.ap_dcs_read 0x00011e00 Section 0 ap_demo.o(i.ap_dcs_read) + ap_dcs_read 0x00011e01 Thumb Code 4040 ap_demo.o(i.ap_dcs_read) + i.ap_demo 0x00012df4 Section 0 ap_demo.o(i.ap_demo) + i.ap_get_reg_df 0x00012f90 Section 0 ap_demo.o(i.ap_get_reg_df) + ap_get_reg_df 0x00012f91 Thumb Code 136 ap_demo.o(i.ap_get_reg_df) + i.ap_get_tp_calibration_status_01 0x0001301c Section 0 app_tp_st_touch.o(i.ap_get_tp_calibration_status_01) + i.ap_reset_cb 0x0001303c Section 0 ap_demo.o(i.ap_reset_cb) + ap_reset_cb 0x0001303d Thumb Code 42 ap_demo.o(i.ap_reset_cb) + i.ap_set_backlight_51 0x000130a4 Section 0 ap_demo.o(i.ap_set_backlight_51) + ap_set_backlight_51 0x000130a5 Thumb Code 28 ap_demo.o(i.ap_set_backlight_51) + i.ap_set_display_off 0x000130c0 Section 0 ap_demo.o(i.ap_set_display_off) + ap_set_display_off 0x000130c1 Thumb Code 28 ap_demo.o(i.ap_set_display_off) + i.ap_set_display_on 0x00013104 Section 0 ap_demo.o(i.ap_set_display_on) + ap_set_display_on 0x00013105 Thumb Code 16 ap_demo.o(i.ap_set_display_on) + i.ap_set_enter_sleep_mode 0x0001313c Section 0 ap_demo.o(i.ap_set_enter_sleep_mode) + ap_set_enter_sleep_mode 0x0001313d Thumb Code 74 ap_demo.o(i.ap_set_enter_sleep_mode) + i.ap_set_exit_sleep_mode 0x000131b8 Section 0 ap_demo.o(i.ap_set_exit_sleep_mode) + ap_set_exit_sleep_mode 0x000131b9 Thumb Code 58 ap_demo.o(i.ap_set_exit_sleep_mode) + i.ap_set_tp_calibration_04 0x00013228 Section 0 app_tp_st_touch.o(i.ap_set_tp_calibration_04) + i.ap_tp_st_touch_calibration 0x000132c0 Section 0 app_tp_st_touch.o(i.ap_tp_st_touch_calibration) + i.ap_tp_st_touch_error_handler_F3 0x00013370 Section 0 app_tp_st_touch.o(i.ap_tp_st_touch_error_handler_F3) + i.ap_tp_st_touch_error_handler_FF 0x0001338a Section 0 app_tp_st_touch.o(i.ap_tp_st_touch_error_handler_FF) + i.ap_tp_st_touch_get_calibration_success_mark 0x000133ac Section 0 app_tp_st_touch.o(i.ap_tp_st_touch_get_calibration_success_mark) + i.ap_tp_st_touch_scan_point_init 0x00013454 Section 0 app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_init) + i.ap_tp_st_touch_scan_point_record_event 0x00013470 Section 0 app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_record_event) + i.ap_tp_st_touch_scan_point_record_event_exec 0x00013504 Section 0 app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_record_event_exec) + i.ap_tp_st_touch_simulate_finger_release_event 0x00013554 Section 0 app_tp_st_touch.o(i.ap_tp_st_touch_simulate_finger_release_event) + i.ap_tp_st_touch_software_reset 0x00013588 Section 0 app_tp_st_touch.o(i.ap_tp_st_touch_software_reset) + i.ap_update_frame_rate 0x00013634 Section 0 ap_demo.o(i.ap_update_frame_rate) + ap_update_frame_rate 0x00013635 Thumb Code 56 ap_demo.o(i.ap_update_frame_rate) + i.app_ADC_IRQn_Handler 0x000136a0 Section 0 drv_rxbr.o(i.app_ADC_IRQn_Handler) + i.app_AP_NRESET_IRQn_Handler 0x000136bc Section 0 drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) + i.app_EXTI_INT0_IRQn_Handler 0x000136e0 Section 0 drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) + i.app_EXTI_INT1_IRQn_Handler 0x000136fc Section 0 drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) + i.app_EXTI_INT2_IRQn_Handler 0x00013718 Section 0 drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) + i.app_EXTI_INT3_IRQn_Handler 0x00013734 Section 0 drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) + i.app_EXTI_INT4_IRQn_Handler 0x00013750 Section 0 drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) + i.app_EXTI_INT5_IRQn_Handler 0x0001376c Section 0 drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) + i.app_EXTI_INT6_IRQn_Handler 0x00013788 Section 0 drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) + i.app_EXTI_INT7_IRQn_Handler 0x000137a4 Section 0 drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) + i.app_HardFault_Handler 0x000137c0 Section 0 drv_common.o(i.app_HardFault_Handler) + i.app_I2C0_IRQn_Handler 0x00013808 Section 0 drv_i2c_slave.o(i.app_I2C0_IRQn_Handler) + i.app_I2C1_IRQn_Handler 0x00013818 Section 0 drv_i2c_master.o(i.app_I2C1_IRQn_Handler) + i.app_LCDC_IRQn_Handler 0x00013828 Section 0 hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) + i.app_MEMC_IRQn_Handler 0x00013908 Section 0 drv_memc.o(i.app_MEMC_IRQn_Handler) + i.app_MIPI_RX_IRQn_Handler 0x00013990 Section 0 drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) + i.app_MIPI_TX_IRQn_Handler 0x00013c28 Section 0 drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) + i.app_PWMDET_IRQn_Handler 0x00013cc8 Section 0 drv_pwm.o(i.app_PWMDET_IRQn_Handler) + i.app_SPIM_IRQn_Handler 0x00013d10 Section 0 drv_spi_master.o(i.app_SPIM_IRQn_Handler) + i.app_SPIS_IRQn_Handler 0x00013d40 Section 0 hal_spi_slave.o(i.app_SPIS_IRQn_Handler) + i.app_SWIRE_IRQn_Handler 0x00013f40 Section 0 drv_swire.o(i.app_SWIRE_IRQn_Handler) + i.app_SysTick_Handler 0x00013f60 Section 0 drv_common.o(i.app_SysTick_Handler) + i.app_TIMER0_IRQn_Handler 0x00013f78 Section 0 drv_timer.o(i.app_TIMER0_IRQn_Handler) + i.app_TIMER1_IRQn_Handler 0x00013f82 Section 0 drv_timer.o(i.app_TIMER1_IRQn_Handler) + i.app_TIMER2_IRQn_Handler 0x00013f8c Section 0 drv_timer.o(i.app_TIMER2_IRQn_Handler) + i.app_TIMER3_IRQn_Handler 0x00013f96 Section 0 drv_timer.o(i.app_TIMER3_IRQn_Handler) + i.app_VIDC_IRQn_Handler 0x00013fa0 Section 0 drv_vidc.o(i.app_VIDC_IRQn_Handler) + i.app_VPRE_IRQn_Handler 0x00013fbc Section 0 drv_rxbr.o(i.app_VPRE_IRQn_Handler) + i.app_WDG_IRQn_Handler 0x00013fd8 Section 0 drv_wdg.o(i.app_WDG_IRQn_Handler) + i.app_dma_irq_handler 0x00014010 Section 0 drv_dma.o(i.app_dma_irq_handler) + i.app_fls_ctrl_Handler 0x00014020 Section 0 norflash.o(i.app_fls_ctrl_Handler) + i.app_tp_I2C_init 0x00014050 Section 0 app_tp_transfer.o(i.app_tp_I2C_init) + i.app_tp_calibration_exec 0x00014074 Section 0 app_tp_st_touch.o(i.app_tp_calibration_exec) + i.app_tp_i2cs_callback 0x0001411c Section 0 app_tp_transfer.o(i.app_tp_i2cs_callback) + app_tp_i2cs_callback 0x0001411d Thumb Code 42 app_tp_transfer.o(i.app_tp_i2cs_callback) + i.app_tp_init 0x0001414c Section 0 app_tp_transfer.o(i.app_tp_init) + i.app_tp_m_read 0x00014190 Section 0 app_tp_transfer.o(i.app_tp_m_read) + i.app_tp_m_write 0x000141b0 Section 0 app_tp_transfer.o(i.app_tp_m_write) + i.app_tp_phone_analysis_data 0x000141b8 Section 0 app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) + i.app_tp_phone_clear_reset_on 0x0001450c Section 0 app_tp_transfer.o(i.app_tp_phone_clear_reset_on) + i.app_tp_s_read 0x00014518 Section 0 app_tp_transfer.o(i.app_tp_s_read) + i.app_tp_s_write 0x00014520 Section 0 app_tp_transfer.o(i.app_tp_s_write) + i.app_tp_screen_analysis_int 0x00014528 Section 0 app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) + i.app_tp_screen_init 0x000147d4 Section 0 app_tp_transfer.o(i.app_tp_screen_init) + i.app_tp_screen_int_callback 0x00014804 Section 0 app_tp_transfer.o(i.app_tp_screen_int_callback) + app_tp_screen_int_callback 0x00014805 Thumb Code 8 app_tp_transfer.o(i.app_tp_screen_int_callback) + i.app_tp_transfer_screen_const 0x00014810 Section 0 app_tp_transfer.o(i.app_tp_transfer_screen_const) + app_tp_transfer_screen_const 0x00014811 Thumb Code 50 app_tp_transfer.o(i.app_tp_transfer_screen_const) + i.app_tp_transfer_screen_int 0x00014850 Section 0 app_tp_transfer.o(i.app_tp_transfer_screen_int) + i.app_tp_transfer_screen_start 0x00014988 Section 0 app_tp_transfer.o(i.app_tp_transfer_screen_start) + i.board_Init 0x000149a0 Section 0 board.o(i.board_Init) + i.calc_framebuffer_setting 0x000149c4 Section 0 hal_internal_vsync.o(i.calc_framebuffer_setting) + calc_framebuffer_setting 0x000149c5 Thumb Code 902 hal_internal_vsync.o(i.calc_framebuffer_setting) + i.ceil 0x00014d90 Section 0 ceil.o(i.ceil) + i.check_mipi_rx_tx_video_info 0x00014e58 Section 0 hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) + check_mipi_rx_tx_video_info 0x00014e59 Thumb Code 44 hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) + i.check_pkt_buf_rev 0x00014e84 Section 0 hal_internal_vsync.o(i.check_pkt_buf_rev) + check_pkt_buf_rev 0x00014e85 Thumb Code 90 hal_internal_vsync.o(i.check_pkt_buf_rev) + i.dcs_packet_fifo_alloc 0x00014f18 Section 0 dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) + i.dcs_packet_fifo_init 0x00014f70 Section 0 dcs_packet_fifo.o(i.dcs_packet_fifo_init) + i.dcs_packet_free_fifo_header 0x00014f88 Section 0 dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) + i.dcs_packet_get_fifo_header 0x00014fcc Section 0 dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) + i.dcs_sw_filter 0x00014ff0 Section 0 hal_internal_vsync.o(i.dcs_sw_filter) + dcs_sw_filter 0x00014ff1 Thumb Code 24 hal_internal_vsync.o(i.dcs_sw_filter) + i.delayMs 0x0001500c Section 0 tau_delay.o(i.delayMs) + i.delayUs 0x00015024 Section 0 tau_delay.o(i.delayUs) + i.drv_ap_rst_trig_edge_detect 0x00015048 Section 0 drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) + i.drv_chip_info_get_info 0x00015080 Section 0 drv_chip_info.o(i.drv_chip_info_get_info) + i.drv_chip_info_init 0x0001508c Section 0 drv_chip_info.o(i.drv_chip_info_init) + i.drv_chip_rx_info_check 0x000150cc Section 0 drv_chip_info.o(i.drv_chip_rx_info_check) + i.drv_chip_rx_init_done 0x00015194 Section 0 drv_chip_info.o(i.drv_chip_rx_init_done) + i.drv_common_enable_systick 0x000151a8 Section 0 drv_common.o(i.drv_common_enable_systick) + i.drv_common_system_init 0x00015200 Section 0 drv_common.o(i.drv_common_system_init) + i.drv_crgu_config_reset_modules 0x00015208 Section 0 drv_crgu.o(i.drv_crgu_config_reset_modules) + i.drv_crgu_set_ahb_pre_div 0x00015218 Section 0 drv_crgu.o(i.drv_crgu_set_ahb_pre_div) + i.drv_crgu_set_ahb_src 0x0001522c Section 0 drv_crgu.o(i.drv_crgu_set_ahb_src) + i.drv_crgu_set_clock 0x00015240 Section 0 drv_crgu.o(i.drv_crgu_set_clock) + i.drv_crgu_set_dpi_mux_src 0x00015260 Section 0 drv_crgu.o(i.drv_crgu_set_dpi_mux_src) + i.drv_crgu_set_dpi_pre_div 0x00015274 Section 0 drv_crgu.o(i.drv_crgu_set_dpi_pre_div) + i.drv_crgu_set_dpi_pre_src 0x0001528c Section 0 drv_crgu.o(i.drv_crgu_set_dpi_pre_src) + i.drv_crgu_set_dsc_core_div 0x000152a0 Section 0 drv_crgu.o(i.drv_crgu_set_dsc_core_div) + i.drv_crgu_set_dsco_src 0x000152b4 Section 0 drv_crgu.o(i.drv_crgu_set_dsco_src) + i.drv_crgu_set_dsco_src_div 0x000152c8 Section 0 drv_crgu.o(i.drv_crgu_set_dsco_src_div) + i.drv_crgu_set_fb_div 0x000152dc Section 0 drv_crgu.o(i.drv_crgu_set_fb_div) + i.drv_crgu_set_fb_src 0x000152f0 Section 0 drv_crgu.o(i.drv_crgu_set_fb_src) + i.drv_crgu_set_lcdc_div 0x00015304 Section 0 drv_crgu.o(i.drv_crgu_set_lcdc_div) + i.drv_crgu_set_lcdc_src 0x00015318 Section 0 drv_crgu.o(i.drv_crgu_set_lcdc_src) + i.drv_crgu_set_mipi_cfg_src 0x0001532c Section 0 drv_crgu.o(i.drv_crgu_set_mipi_cfg_src) + i.drv_crgu_set_mipi_ref_src 0x00015340 Section 0 drv_crgu.o(i.drv_crgu_set_mipi_ref_src) + i.drv_crgu_set_reset 0x00015358 Section 0 drv_crgu.o(i.drv_crgu_set_reset) + i.drv_crgu_set_rxbr_div 0x00015370 Section 0 drv_crgu.o(i.drv_crgu_set_rxbr_div) + i.drv_crgu_set_rxbr_src 0x00015384 Section 0 drv_crgu.o(i.drv_crgu_set_rxbr_src) + i.drv_crgu_set_vidc_src 0x00015398 Section 0 drv_crgu.o(i.drv_crgu_set_vidc_src) + i.drv_dma_clear_flag 0x000153ac Section 0 drv_dma.o(i.drv_dma_clear_flag) + i.drv_dma_create_handle 0x000153c4 Section 0 drv_dma.o(i.drv_dma_create_handle) + i.drv_dma_disenable_channel 0x000153e0 Section 0 drv_dma.o(i.drv_dma_disenable_channel) + i.drv_dma_enable_channel 0x000153f0 Section 0 drv_dma.o(i.drv_dma_enable_channel) + i.drv_dma_enable_channel_interrupts 0x00015400 Section 0 drv_dma.o(i.drv_dma_enable_channel_interrupts) + i.drv_dma_get_channel_flag 0x00015424 Section 0 drv_dma.o(i.drv_dma_get_channel_flag) + i.drv_dma_irq_handler 0x00015430 Section 0 drv_dma.o(i.drv_dma_irq_handler) + i.drv_dma_prepar_transfer 0x000154c0 Section 0 drv_dma.o(i.drv_dma_prepar_transfer) + i.drv_dma_set_burst 0x000154d2 Section 0 drv_dma.o(i.drv_dma_set_burst) + i.drv_dma_set_callback 0x000154ec Section 0 drv_dma.o(i.drv_dma_set_callback) + i.drv_dma_set_transfer 0x000154f4 Section 0 drv_dma.o(i.drv_dma_set_transfer) + i.drv_dsc_dec_convert_pps_rc_parameter 0x00015538 Section 0 drv_dsc_dec.o(i.drv_dsc_dec_convert_pps_rc_parameter) + i.drv_dsc_dec_disable 0x0001556e Section 0 drv_dsc_dec.o(i.drv_dsc_dec_disable) + i.drv_dsc_dec_enable 0x0001557c Section 0 drv_dsc_dec.o(i.drv_dsc_dec_enable) + i.drv_dsc_dec_get_nslc 0x000155f0 Section 0 drv_dsc_dec.o(i.drv_dsc_dec_get_nslc) + i.drv_dsc_dec_set_u8_pps 0x000155fa Section 0 drv_dsc_dec.o(i.drv_dsc_dec_set_u8_pps) + i.drv_dsi_rx_calc_ipi_tx_delay 0x00015624 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) + i.drv_dsi_rx_enable_irq 0x00015728 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) + i.drv_dsi_rx_get_color_bpp 0x00015768 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) + drv_dsi_rx_get_color_bpp 0x00015769 Thumb Code 62 drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) + i.drv_dsi_rx_get_color_pcc 0x000157b8 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_color_pcc) + drv_dsi_rx_get_color_pcc 0x000157b9 Thumb Code 24 drv_dsi_rx.o(i.drv_dsi_rx_get_color_pcc) + i.drv_dsi_rx_get_compression_en 0x000157d4 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) + i.drv_dsi_rx_get_max_ret_size 0x000157dc Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_max_ret_size) + i.drv_dsi_rx_power_up 0x000157e2 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_power_up) + i.drv_dsi_rx_set_ctrl_cfg 0x000157f0 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_ctrl_cfg) + i.drv_dsi_rx_set_ddi_cfg 0x00015810 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) + i.drv_dsi_rx_set_inten 0x00015820 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_inten) + i.drv_dsi_rx_set_ipi_cfg 0x00015824 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_cfg) + i.drv_dsi_rx_set_lane_swap 0x00015834 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_lane_swap) + i.drv_dsi_rx_set_resp_cnt 0x0001587a Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_resp_cnt) + i.drv_dsi_rx_set_up_phy 0x000158a0 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) + i.drv_dsi_rx_shut_down 0x00015990 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_shut_down) + i.drv_dsi_tx_command_header 0x0001599e Section 0 drv_dsi_tx.o(i.drv_dsi_tx_command_header) + i.drv_dsi_tx_command_mode_cfg 0x000159b2 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) + i.drv_dsi_tx_command_put_payload 0x00015a1e Section 0 drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) + i.drv_dsi_tx_config_eotp 0x00015a22 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) + i.drv_dsi_tx_config_int 0x00015a3a Section 0 drv_dsi_tx.o(i.drv_dsi_tx_config_int) + i.drv_dsi_tx_dpi_lpcmd_time 0x00015a42 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_dpi_lpcmd_time) + i.drv_dsi_tx_dpi_mode 0x00015a4a Section 0 drv_dsi_tx.o(i.drv_dsi_tx_dpi_mode) + i.drv_dsi_tx_dpi_polarity 0x00015a54 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_dpi_polarity) + i.drv_dsi_tx_edpi_cmd_size 0x00015a78 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_edpi_cmd_size) + i.drv_dsi_tx_get_cmd_status 0x00015a7c Section 0 drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) + i.drv_dsi_tx_mode 0x00015a80 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_mode) + i.drv_dsi_tx_phy_clock_lane_auto_lp 0x00015a84 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_auto_lp) + i.drv_dsi_tx_phy_clock_lane_req_hs 0x00015a9c Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) + i.drv_dsi_tx_phy_lane_mode 0x00015ab6 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_lane_mode) + i.drv_dsi_tx_phy_status_ready 0x00015ac2 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ready) + i.drv_dsi_tx_phy_status_stopstate 0x00015b26 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) + i.drv_dsi_tx_phy_test_setup 0x00015b64 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) + i.drv_dsi_tx_phy_time_cfg 0x00015c70 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_time_cfg) + i.drv_dsi_tx_powerup 0x00015c8e Section 0 drv_dsi_tx.o(i.drv_dsi_tx_powerup) + i.drv_dsi_tx_response_mode 0x00015c96 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_response_mode) + i.drv_dsi_tx_set_bta_ack 0x00015cb2 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_bta_ack) + i.drv_dsi_tx_set_esc_div 0x00015cca Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) + i.drv_dsi_tx_set_int 0x00015cd8 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_int) + i.drv_dsi_tx_set_time_out_div 0x00015d0c Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_time_out_div) + i.drv_dsi_tx_set_video_chunk 0x00015d1c Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_video_chunk) + i.drv_dsi_tx_set_video_timing 0x00015d24 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_video_timing) + i.drv_dsi_tx_shutdown 0x00015d46 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_shutdown) + i.drv_dsi_tx_timeout_cfg 0x00015d4e Section 0 drv_dsi_tx.o(i.drv_dsi_tx_timeout_cfg) + i.drv_dsi_tx_video_mode_cfg 0x00015d74 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_cfg) + i.drv_dsi_tx_video_mode_disable_hact_cmd 0x00015e1e Section 0 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_disable_hact_cmd) + i.drv_dsi_tx_video_mode_set_lp_cmd 0x00015e34 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_set_lp_cmd) + i.drv_efuse_enter_inactive 0x00015e4c Section 0 drv_efuse.o(i.drv_efuse_enter_inactive) + i.drv_efuse_int_enable 0x00015e6c Section 0 drv_efuse.o(i.drv_efuse_int_enable) + i.drv_efuse_read 0x00015e78 Section 0 drv_efuse.o(i.drv_efuse_read) + i.drv_efuse_read_req 0x00015eaa Section 0 drv_efuse.o(i.drv_efuse_read_req) + i.drv_gpio_get_input_data 0x00015ec4 Section 0 drv_gpio.o(i.drv_gpio_get_input_data) + i.drv_gpio_register_ap_reset_callback 0x00015edc Section 0 drv_gpio.o(i.drv_gpio_register_ap_reset_callback) + i.drv_gpio_register_callback 0x00015ee8 Section 0 drv_gpio.o(i.drv_gpio_register_callback) + i.drv_gpio_set_int 0x00015efc Section 0 drv_gpio.o(i.drv_gpio_set_int) + i.drv_gpio_set_ioe 0x00015f40 Section 0 drv_gpio.o(i.drv_gpio_set_ioe) + i.drv_gpio_set_mode0 0x00015f60 Section 0 drv_gpio.o(i.drv_gpio_set_mode0) + i.drv_gpio_set_mode1 0x00015f70 Section 0 drv_gpio.o(i.drv_gpio_set_mode1) + i.drv_gpio_set_mode2 0x00015f80 Section 0 drv_gpio.o(i.drv_gpio_set_mode2) + i.drv_gpio_set_mode3 0x00015f90 Section 0 drv_gpio.o(i.drv_gpio_set_mode3) + i.drv_gpio_set_output_data 0x00015fa0 Section 0 hal_gpio.o(i.drv_gpio_set_output_data) + drv_gpio_set_output_data 0x00015fa1 Thumb Code 26 hal_gpio.o(i.drv_gpio_set_output_data) + i.drv_gpio_set_pull_state 0x00015fc0 Section 0 drv_gpio.o(i.drv_gpio_set_pull_state) + i.drv_i2c_dma_callback 0x000160f0 Section 0 drv_i2c_dma.o(i.drv_i2c_dma_callback) + drv_i2c_dma_callback 0x000160f1 Thumb Code 40 drv_i2c_dma.o(i.drv_i2c_dma_callback) + i.drv_i2c_dma_init 0x00016124 Section 0 drv_i2c_dma.o(i.drv_i2c_dma_init) + i.drv_i2c_enable_rx_dma 0x000161d0 Section 0 drv_i2c_dma.o(i.drv_i2c_enable_rx_dma) + i.drv_i2c_enable_tx_dma 0x000161ea Section 0 drv_i2c_dma.o(i.drv_i2c_enable_tx_dma) + i.drv_i2c_m_clear_it_pending_bit 0x00016204 Section 0 drv_i2c_master.o(i.drv_i2c_m_clear_it_pending_bit) + i.drv_i2c_m_enable 0x00016264 Section 0 drv_i2c_master.o(i.drv_i2c_m_enable) + i.drv_i2c_m_enable_intr 0x00016274 Section 0 drv_i2c_master.o(i.drv_i2c_m_enable_intr) + i.drv_i2c_m_set_callback 0x000162ac Section 0 drv_i2c_master.o(i.drv_i2c_m_set_callback) + i.drv_i2c_master_init 0x000162b8 Section 0 drv_i2c_master.o(i.drv_i2c_master_init) + i.drv_i2c_master_read_dma 0x00016344 Section 0 drv_i2c_dma.o(i.drv_i2c_master_read_dma) + i.drv_i2c_master_write_dma 0x000163a0 Section 0 drv_i2c_dma.o(i.drv_i2c_master_write_dma) + i.drv_i2c_master_write_read_cmd 0x000163dc Section 0 drv_i2c_dma.o(i.drv_i2c_master_write_read_cmd) + drv_i2c_master_write_read_cmd 0x000163dd Thumb Code 46 drv_i2c_dma.o(i.drv_i2c_master_write_read_cmd) + i.drv_i2c_s_clear_it_pending_bit 0x0001640c Section 0 drv_i2c_slave.o(i.drv_i2c_s_clear_it_pending_bit) + i.drv_i2c_s_enable_intr 0x00016468 Section 0 drv_i2c_slave.o(i.drv_i2c_s_enable_intr) + i.drv_i2c_s_get_fifo_status 0x0001649c Section 0 drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) + i.drv_i2c_s_set_callback 0x000164b8 Section 0 drv_i2c_slave.o(i.drv_i2c_s_set_callback) + i.drv_i2c_s_write_data 0x000164c4 Section 0 drv_i2c_slave.o(i.drv_i2c_s_write_data) + i.drv_i2c_set_dma_irq_callback 0x000164e4 Section 0 drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) + i.drv_i2c_slave_init 0x0001653c Section 0 drv_i2c_slave.o(i.drv_i2c_slave_init) + i.drv_i2c_slave_write_dma 0x00016580 Section 0 drv_i2c_dma.o(i.drv_i2c_slave_write_dma) + i.drv_lcdc_config_bypass 0x0001659c Section 0 drv_lcdc.o(i.drv_lcdc_config_bypass) + i.drv_lcdc_config_ccm 0x000165b4 Section 0 drv_lcdc.o(i.drv_lcdc_config_ccm) + i.drv_lcdc_config_disp_mode 0x000165e4 Section 0 drv_lcdc.o(i.drv_lcdc_config_disp_mode) + i.drv_lcdc_config_dpi_polarity 0x000165fa Section 0 drv_lcdc.o(i.drv_lcdc_config_dpi_polarity) + i.drv_lcdc_config_dpi_timing 0x0001661e Section 0 drv_lcdc.o(i.drv_lcdc_config_dpi_timing) + i.drv_lcdc_config_edpi_mode 0x00016644 Section 0 drv_lcdc.o(i.drv_lcdc_config_edpi_mode) + i.drv_lcdc_config_endianness 0x0001665a Section 0 drv_lcdc.o(i.drv_lcdc_config_endianness) + i.drv_lcdc_config_input_size 0x00016670 Section 0 drv_lcdc.o(i.drv_lcdc_config_input_size) + i.drv_lcdc_config_int 0x0001667c Section 0 drv_lcdc.o(i.drv_lcdc_config_int) + i.drv_lcdc_config_int_single 0x0001669a Section 0 drv_lcdc.o(i.drv_lcdc_config_int_single) + i.drv_lcdc_config_overwrite 0x000166bc Section 0 drv_lcdc.o(i.drv_lcdc_config_overwrite) + i.drv_lcdc_config_overwrite_rgb 0x000166de Section 0 drv_lcdc.o(i.drv_lcdc_config_overwrite_rgb) + i.drv_lcdc_config_partial_display_area 0x000166ea Section 0 drv_lcdc.o(i.drv_lcdc_config_partial_display_area) + i.drv_lcdc_config_partial_display_enable 0x00016704 Section 0 drv_lcdc.o(i.drv_lcdc_config_partial_display_enable) + i.drv_lcdc_config_scale_up_coef 0x00016726 Section 0 drv_lcdc.o(i.drv_lcdc_config_scale_up_coef) + i.drv_lcdc_config_scale_up_step 0x00016740 Section 0 drv_lcdc.o(i.drv_lcdc_config_scale_up_step) + i.drv_lcdc_config_src_parameter 0x0001674c Section 0 drv_lcdc.o(i.drv_lcdc_config_src_parameter) + i.drv_lcdc_config_thresh 0x00016798 Section 0 drv_lcdc.o(i.drv_lcdc_config_thresh) + i.drv_lcdc_ctrl_flow 0x0001679e Section 0 drv_lcdc.o(i.drv_lcdc_ctrl_flow) + i.drv_lcdc_enable_shadow_reg 0x000167b0 Section 0 drv_lcdc.o(i.drv_lcdc_enable_shadow_reg) + i.drv_lcdc_set_int 0x000167d0 Section 0 drv_lcdc.o(i.drv_lcdc_set_int) + i.drv_lcdc_set_video_hw_mode 0x00016804 Section 0 drv_lcdc.o(i.drv_lcdc_set_video_hw_mode) + i.drv_lcdc_start 0x00016818 Section 0 drv_lcdc.o(i.drv_lcdc_start) + i.drv_memc_clear_status 0x00016838 Section 0 drv_memc.o(i.drv_memc_clear_status) + i.drv_memc_enable_irq 0x00016844 Section 0 drv_memc.o(i.drv_memc_enable_irq) + i.drv_memc_gen_a_tear_signal 0x00016884 Section 0 drv_memc.o(i.drv_memc_gen_a_tear_signal) + i.drv_memc_get_status 0x00016890 Section 0 drv_memc.o(i.drv_memc_get_status) + i.drv_memc_rate_transfer_sel 0x000168a2 Section 0 drv_memc.o(i.drv_memc_rate_transfer_sel) + i.drv_memc_sel_vsync 0x000168b2 Section 0 drv_memc.o(i.drv_memc_sel_vsync) + i.drv_memc_set_active_height 0x000168c0 Section 0 drv_memc.o(i.drv_memc_set_active_height) + i.drv_memc_set_data_mode 0x000168d4 Section 0 drv_memc.o(i.drv_memc_set_data_mode) + i.drv_memc_set_double_buffer 0x000168e0 Section 0 drv_memc.o(i.drv_memc_set_double_buffer) + i.drv_memc_set_double_buffer_reverse 0x000168f0 Section 0 drv_memc.o(i.drv_memc_set_double_buffer_reverse) + i.drv_memc_set_fs_en_conditions 0x00016902 Section 0 drv_memc.o(i.drv_memc_set_fs_en_conditions) + i.drv_memc_set_inten 0x00016912 Section 0 drv_memc.o(i.drv_memc_set_inten) + i.drv_memc_set_lcdc_st_conditions 0x00016928 Section 0 drv_memc.o(i.drv_memc_set_lcdc_st_conditions) + i.drv_memc_set_ltpo_mode 0x00016940 Section 0 drv_memc.o(i.drv_memc_set_ltpo_mode) + i.drv_memc_set_tear_mode 0x0001695a Section 0 drv_memc.o(i.drv_memc_set_tear_mode) + i.drv_memc_set_tear_waveform 0x00016968 Section 0 drv_memc.o(i.drv_memc_set_tear_waveform) + i.drv_memc_set_vidc_sync_cnt 0x00016990 Section 0 drv_memc.o(i.drv_memc_set_vidc_sync_cnt) + i.drv_param_init_get_ccm 0x000169a0 Section 0 drv_param_init.o(i.drv_param_init_get_ccm) + i.drv_param_init_get_scld_filter_h 0x000169a8 Section 0 drv_param_init.o(i.drv_param_init_get_scld_filter_h) + i.drv_param_init_get_scld_filter_v 0x000169bc Section 0 drv_param_init.o(i.drv_param_init_get_scld_filter_v) + i.drv_param_init_get_sclu_filter 0x000169d0 Section 0 drv_param_init.o(i.drv_param_init_get_sclu_filter) + i.drv_param_init_set_ccm 0x000169d8 Section 0 drv_param_init.o(i.drv_param_init_set_ccm) + i.drv_param_init_set_scld_filter 0x000169ec Section 0 drv_param_init.o(i.drv_param_init_set_scld_filter) + i.drv_param_p2r_filter_init 0x00016a50 Section 0 drv_param_init.o(i.drv_param_p2r_filter_init) + i.drv_phy_enable_calibration 0x00016a74 Section 0 drv_phy_common.o(i.drv_phy_enable_calibration) + i.drv_phy_get_calibration 0x00016a84 Section 0 drv_phy_common.o(i.drv_phy_get_calibration) + i.drv_phy_get_pll_para 0x00016ac0 Section 0 drv_phy_common.o(i.drv_phy_get_pll_para) + i.drv_phy_get_rate_para 0x00016b20 Section 0 drv_phy_common.o(i.drv_phy_get_rate_para) + i.drv_phy_test_clear 0x00016b74 Section 0 drv_phy_common.o(i.drv_phy_test_clear) + i.drv_phy_test_lock 0x00016b84 Section 0 drv_phy_common.o(i.drv_phy_test_lock) + i.drv_phy_test_write_1_byte 0x00016b9c Section 0 drv_phy_common.o(i.drv_phy_test_write_1_byte) + i.drv_phy_test_write_2_byte 0x00016bbc Section 0 drv_phy_common.o(i.drv_phy_test_write_2_byte) + i.drv_phy_test_write_code 0x00016be2 Section 0 drv_phy_common.o(i.drv_phy_test_write_code) + i.drv_phy_test_write_data 0x00016c00 Section 0 drv_phy_common.o(i.drv_phy_test_write_data) + drv_phy_test_write_data 0x00016c01 Thumb Code 32 drv_phy_common.o(i.drv_phy_test_write_data) + i.drv_pwr_set_cp_mode 0x00016c20 Section 0 drv_pwr.o(i.drv_pwr_set_cp_mode) + i.drv_pwr_set_pvd_mode 0x00016c40 Section 0 drv_pwr.o(i.drv_pwr_set_pvd_mode) + i.drv_pwr_set_system_clk_src 0x00016c58 Section 0 drv_pwr.o(i.drv_pwr_set_system_clk_src) + i.drv_rx_phy_test_clear 0x00016c88 Section 0 drv_dsi_rx.o(i.drv_rx_phy_test_clear) + drv_rx_phy_test_clear 0x00016c89 Thumb Code 12 drv_dsi_rx.o(i.drv_rx_phy_test_clear) + i.drv_rx_phy_test_lock 0x00016c94 Section 0 drv_dsi_rx.o(i.drv_rx_phy_test_lock) + drv_rx_phy_test_lock 0x00016c95 Thumb Code 16 drv_dsi_rx.o(i.drv_rx_phy_test_lock) + i.drv_rx_phy_test_write_1_byte 0x00016ca4 Section 0 drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) + drv_rx_phy_test_write_1_byte 0x00016ca5 Thumb Code 20 drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) + i.drv_rx_phy_test_write_2_byte 0x00016cb8 Section 0 drv_dsi_rx.o(i.drv_rx_phy_test_write_2_byte) + drv_rx_phy_test_write_2_byte 0x00016cb9 Thumb Code 22 drv_dsi_rx.o(i.drv_rx_phy_test_write_2_byte) + i.drv_rxbr_clear_pkt_buffer 0x00016cce Section 0 drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) + i.drv_rxbr_clear_status0 0x00016cd8 Section 0 drv_rxbr.o(i.drv_rxbr_clear_status0) + i.drv_rxbr_enable_irq 0x00016cdc Section 0 drv_rxbr.o(i.drv_rxbr_enable_irq) + i.drv_rxbr_frame_drop_cfg 0x00016d38 Section 0 drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) + i.drv_rxbr_get_clk 0x00016d4c Section 0 drv_rxbr.o(i.drv_rxbr_get_clk) + i.drv_rxbr_get_col_addr 0x00016d88 Section 0 drv_rxbr.o(i.drv_rxbr_get_col_addr) + i.drv_rxbr_get_int_source 0x00016d8c Section 0 hal_internal_vsync.o(i.drv_rxbr_get_int_source) + drv_rxbr_get_int_source 0x00016d8d Thumb Code 18 hal_internal_vsync.o(i.drv_rxbr_get_int_source) + i.drv_rxbr_get_page_addr 0x00016d9e Section 0 drv_rxbr.o(i.drv_rxbr_get_page_addr) + i.drv_rxbr_get_status0 0x00016da2 Section 0 hal_internal_vsync.o(i.drv_rxbr_get_status0) + drv_rxbr_get_status0 0x00016da3 Thumb Code 18 hal_internal_vsync.o(i.drv_rxbr_get_status0) + i.drv_rxbr_hline_rcv0_cfg 0x00016db4 Section 0 drv_rxbr.o(i.drv_rxbr_hline_rcv0_cfg) + i.drv_rxbr_hline_rcv_cfg 0x00016dc0 Section 0 drv_rxbr.o(i.drv_rxbr_hline_rcv_cfg) + i.drv_rxbr_register_irq0_callback 0x00016dc8 Section 0 drv_rxbr.o(i.drv_rxbr_register_irq0_callback) + i.drv_rxbr_register_irq1_callback 0x00016dd4 Section 0 drv_rxbr.o(i.drv_rxbr_register_irq1_callback) + i.drv_rxbr_set_ack_pkt_header 0x00016de0 Section 0 drv_rxbr.o(i.drv_rxbr_set_ack_pkt_header) + i.drv_rxbr_set_cmd_filter 0x00016df4 Section 0 drv_rxbr.o(i.drv_rxbr_set_cmd_filter) + i.drv_rxbr_set_color_format 0x00016ec0 Section 0 drv_rxbr.o(i.drv_rxbr_set_color_format) + i.drv_rxbr_set_inten 0x00016ed4 Section 0 drv_rxbr.o(i.drv_rxbr_set_inten) + i.drv_rxbr_set_ltpo_drop_th 0x00016ee8 Section 0 drv_rxbr.o(i.drv_rxbr_set_ltpo_drop_th) + i.drv_rxbr_set_usr_cfg 0x00016ef8 Section 0 drv_rxbr.o(i.drv_rxbr_set_usr_cfg) + i.drv_rxbr_set_usr_col 0x00016f1e Section 0 drv_rxbr.o(i.drv_rxbr_set_usr_col) + i.drv_rxbr_set_usr_row 0x00016f26 Section 0 drv_rxbr.o(i.drv_rxbr_set_usr_row) + i.drv_spi_m_read_data 0x00016f30 Section 0 drv_spi_master.o(i.drv_spi_m_read_data) + i.drv_swire_set_int 0x00016f50 Section 0 drv_swire.o(i.drv_swire_set_int) + i.drv_sys_cfg_clear_all_int 0x00016f98 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_clear_all_int) + i.drv_sys_cfg_clear_pending 0x00016fa4 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) + i.drv_sys_cfg_sel_ap_rst_lvl_trig 0x00016fcc Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_lvl_trig) + i.drv_sys_cfg_sel_ap_rst_trig 0x00016fe4 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) + i.drv_sys_cfg_sel_gpio_group 0x00017000 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_gpio_group) + i.drv_sys_cfg_sel_int_trig 0x00017024 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_int_trig) + i.drv_sys_cfg_set_dma_rx_req 0x00017048 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) + i.drv_sys_cfg_set_dma_tx_req 0x00017058 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) + i.drv_sys_cfg_set_int 0x00017068 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_set_int) + i.drv_timer_clear_status_flags 0x0001708c Section 0 drv_timer.o(i.drv_timer_clear_status_flags) + i.drv_timer_enable 0x000170a6 Section 0 drv_timer.o(i.drv_timer_enable) + i.drv_timer_get_instance 0x000170c8 Section 0 drv_timer.o(i.drv_timer_get_instance) + i.drv_timer_get_prescaler 0x000170d8 Section 0 drv_timer.o(i.drv_timer_get_prescaler) + i.drv_timer_handle_interrupt 0x000170e8 Section 0 drv_timer.o(i.drv_timer_handle_interrupt) + drv_timer_handle_interrupt 0x000170e9 Thumb Code 62 drv_timer.o(i.drv_timer_handle_interrupt) + i.drv_timer_register_callback 0x0001712c Section 0 drv_timer.o(i.drv_timer_register_callback) + i.drv_timer_set_current_count 0x00017140 Section 0 drv_timer.o(i.drv_timer_set_current_count) + i.drv_timer_set_int 0x0001714c Section 0 drv_timer.o(i.drv_timer_set_int) + i.drv_timer_set_match 0x00017194 Section 0 drv_timer.o(i.drv_timer_set_match) + i.drv_timer_set_prescaler 0x000171a0 Section 0 drv_timer.o(i.drv_timer_set_prescaler) + i.drv_tx_phy_test_clear 0x000171b6 Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_clear) + drv_tx_phy_test_clear 0x000171b7 Thumb Code 10 drv_dsi_tx.o(i.drv_tx_phy_test_clear) + i.drv_tx_phy_test_enter 0x000171c0 Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_enter) + i.drv_tx_phy_test_exit 0x000171dc Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_exit) + i.drv_tx_phy_test_write_1_byte 0x000171f8 Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) + drv_tx_phy_test_write_1_byte 0x000171f9 Thumb Code 18 drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) + i.drv_tx_phy_test_write_2_byte 0x0001720a Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_write_2_byte) + drv_tx_phy_test_write_2_byte 0x0001720b Thumb Code 20 drv_dsi_tx.o(i.drv_tx_phy_test_write_2_byte) + i.drv_tx_phy_test_write_code 0x0001721e Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_write_code) + drv_tx_phy_test_write_code 0x0001721f Thumb Code 16 drv_dsi_tx.o(i.drv_tx_phy_test_write_code) + i.drv_vidc_clear_irq 0x0001722e Section 0 drv_vidc.o(i.drv_vidc_clear_irq) + i.drv_vidc_enable 0x00017236 Section 0 drv_vidc.o(i.drv_vidc_enable) + i.drv_vidc_enable_irq 0x00017250 Section 0 drv_vidc.o(i.drv_vidc_enable_irq) + i.drv_vidc_get_irq_status 0x00017290 Section 0 drv_vidc.o(i.drv_vidc_get_irq_status) + i.drv_vidc_init_module_enable 0x000172a4 Section 0 drv_vidc.o(i.drv_vidc_init_module_enable) + i.drv_vidc_register_callback 0x000172cc Section 0 drv_vidc.o(i.drv_vidc_register_callback) + i.drv_vidc_reset 0x000172d8 Section 0 drv_vidc.o(i.drv_vidc_reset) + i.drv_vidc_set_dst_parameter 0x000172de Section 0 drv_vidc.o(i.drv_vidc_set_dst_parameter) + i.drv_vidc_set_irqen 0x0001731a Section 0 drv_vidc.o(i.drv_vidc_set_irqen) + i.drv_vidc_set_mirror 0x0001732e Section 0 drv_vidc.o(i.drv_vidc_set_mirror) + i.drv_vidc_set_p2r_hcoef0 0x0001733e Section 0 drv_vidc.o(i.drv_vidc_set_p2r_hcoef0) + i.drv_vidc_set_p2r_hinitb 0x00017346 Section 0 drv_vidc.o(i.drv_vidc_set_p2r_hinitb) + i.drv_vidc_set_p2r_hinitr 0x0001736c Section 0 drv_vidc.o(i.drv_vidc_set_p2r_hinitr) + i.drv_vidc_set_pentile_swap 0x00017394 Section 0 drv_vidc.o(i.drv_vidc_set_pentile_swap) + i.drv_vidc_set_pu_ctrl 0x000173ac Section 0 drv_vidc.o(i.drv_vidc_set_pu_ctrl) + i.drv_vidc_set_rotation 0x000173b6 Section 0 drv_vidc.o(i.drv_vidc_set_rotation) + i.drv_vidc_set_scld_hcoef0 0x000173c6 Section 0 drv_vidc.o(i.drv_vidc_set_scld_hcoef0) + i.drv_vidc_set_scld_hcoef1 0x000173d0 Section 0 drv_vidc.o(i.drv_vidc_set_scld_hcoef1) + i.drv_vidc_set_scld_step 0x000173da Section 0 drv_vidc.o(i.drv_vidc_set_scld_step) + i.drv_vidc_set_scld_vcoef0 0x000173ec Section 0 drv_vidc.o(i.drv_vidc_set_scld_vcoef0) + i.drv_vidc_set_scld_vcoef1 0x000173f6 Section 0 drv_vidc.o(i.drv_vidc_set_scld_vcoef1) + i.drv_vidc_set_src_parameter 0x00017400 Section 0 drv_vidc.o(i.drv_vidc_set_src_parameter) + i.drv_wdg_clear_counter 0x00017418 Section 0 drv_wdg.o(i.drv_wdg_clear_counter) + i.drv_wdg_clear_edge_flag 0x00017428 Section 0 drv_wdg.o(i.drv_wdg_clear_edge_flag) + drv_wdg_clear_edge_flag 0x00017429 Thumb Code 12 drv_wdg.o(i.drv_wdg_clear_edge_flag) + i.drv_wdg_read_edge_flag 0x00017438 Section 0 drv_wdg.o(i.drv_wdg_read_edge_flag) + drv_wdg_read_edge_flag 0x00017439 Thumb Code 10 drv_wdg.o(i.drv_wdg_read_edge_flag) + i.drv_wdg_set_int 0x00017448 Section 0 drv_wdg.o(i.drv_wdg_set_int) + i.fls_clr_interrupt_flag 0x0001747c Section 0 drv_fls.o(i.fls_clr_interrupt_flag) + i.fputc 0x00017486 Section 0 tau_log.o(i.fputc) + i.hal_dsi_rx_ctrl_create_handle 0x0001749c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) + i.hal_dsi_rx_ctrl_deinit 0x000174cc Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) + i.hal_dsi_rx_ctrl_dsc_async_handler 0x00017568 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) + i.hal_dsi_rx_ctrl_gen_a_tear_signal 0x000175ec Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) + i.hal_dsi_rx_ctrl_get_max_ret_size 0x00017614 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) + i.hal_dsi_rx_ctrl_init 0x0001763c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) + i.hal_dsi_rx_ctrl_init_clk 0x000176d4 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) + hal_dsi_rx_ctrl_init_clk 0x000176d5 Thumb Code 232 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) + i.hal_dsi_rx_ctrl_init_dsi_rx 0x00017804 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) + hal_dsi_rx_ctrl_init_dsi_rx 0x00017805 Thumb Code 180 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) + i.hal_dsi_rx_ctrl_init_memc 0x000178d8 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) + hal_dsi_rx_ctrl_init_memc 0x000178d9 Thumb Code 308 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) + i.hal_dsi_rx_ctrl_init_rxbr 0x00017a14 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) + hal_dsi_rx_ctrl_init_rxbr 0x00017a15 Thumb Code 288 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) + i.hal_dsi_rx_ctrl_init_vidc 0x00017b44 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) + hal_dsi_rx_ctrl_init_vidc 0x00017b45 Thumb Code 544 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) + i.hal_dsi_rx_ctrl_pre_init_pps 0x00017d70 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_pre_init_pps) + i.hal_dsi_rx_ctrl_send_ack_cmd 0x00017dac Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) + i.hal_dsi_rx_ctrl_set_cus_esc_clk 0x00017e9c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) + i.hal_dsi_rx_ctrl_set_cus_scld_filter 0x00017ec8 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) + i.hal_dsi_rx_ctrl_set_cus_sync_line 0x00017f34 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) + i.hal_dsi_rx_ctrl_set_ipi_cfg 0x00017f68 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) + hal_dsi_rx_ctrl_set_ipi_cfg 0x00017f69 Thumb Code 50 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) + i.hal_dsi_rx_ctrl_set_rxbr_clk 0x00017fa0 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) + hal_dsi_rx_ctrl_set_rxbr_clk 0x00017fa1 Thumb Code 114 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) + i.hal_dsi_rx_ctrl_set_sw_tear_mode 0x00018014 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) + i.hal_dsi_rx_ctrl_set_tear_mode_ex 0x00018048 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_tear_mode_ex) + i.hal_dsi_rx_ctrl_start 0x00018058 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) + i.hal_dsi_rx_ctrl_stop 0x00018094 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) + i.hal_dsi_rx_ctrl_toggle_resolution 0x000180d0 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) + i.hal_dsi_tx_calc_video_chunks 0x000180f0 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) + hal_dsi_tx_calc_video_chunks 0x000180f1 Thumb Code 384 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) + i.hal_dsi_tx_config_params_for_lane_rate 0x00018280 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) + hal_dsi_tx_config_params_for_lane_rate 0x00018281 Thumb Code 42 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) + i.hal_dsi_tx_count_lane_rate 0x000182b4 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) + hal_dsi_tx_count_lane_rate 0x000182b5 Thumb Code 1160 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) + i.hal_dsi_tx_ctrl_create_handle 0x00018784 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) + i.hal_dsi_tx_ctrl_deinit 0x000187b0 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) + i.hal_dsi_tx_ctrl_enter_init_panel_mode 0x000187f8 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) + i.hal_dsi_tx_ctrl_exit_init_panel_mode 0x00018844 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) + i.hal_dsi_tx_ctrl_init 0x0001886c Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) + i.hal_dsi_tx_ctrl_init_clk 0x00018930 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) + hal_dsi_tx_ctrl_init_clk 0x00018931 Thumb Code 36 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) + i.hal_dsi_tx_ctrl_panel_reset_pin 0x00018954 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_panel_reset_pin) + i.hal_dsi_tx_ctrl_set_ccm 0x00018960 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) + i.hal_dsi_tx_ctrl_set_overwrite_rgb 0x00018980 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) + i.hal_dsi_tx_ctrl_set_partial_disp 0x00018994 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp) + i.hal_dsi_tx_ctrl_set_partial_disp_area 0x000189a4 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp_area) + i.hal_dsi_tx_ctrl_start 0x000189c8 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) + i.hal_dsi_tx_ctrl_stop 0x00018a34 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) + i.hal_dsi_tx_ctrl_write_array_cmd 0x00018a78 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) + i.hal_dsi_tx_ctrl_write_cmd 0x00018b50 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) + i.hal_dsi_tx_init_data_mode 0x00018c00 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) + hal_dsi_tx_init_data_mode 0x00018c01 Thumb Code 58 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) + i.hal_dsi_tx_init_dpi_cfg 0x00018c44 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) + hal_dsi_tx_init_dpi_cfg 0x00018c45 Thumb Code 42 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) + i.hal_dsi_tx_init_interrupt 0x00018c74 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) + hal_dsi_tx_init_interrupt 0x00018c75 Thumb Code 28 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) + i.hal_dsi_tx_init_phy_cfg 0x00018c94 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) + hal_dsi_tx_init_phy_cfg 0x00018c95 Thumb Code 28 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) + i.hal_dsi_tx_init_remains 0x00018cb4 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) + hal_dsi_tx_init_remains 0x00018cb5 Thumb Code 142 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) + i.hal_dsi_tx_init_video_mode 0x00018d48 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) + hal_dsi_tx_init_video_mode 0x00018d49 Thumb Code 82 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) + i.hal_dsi_tx_send_cmd 0x00018da0 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) + hal_dsi_tx_send_cmd 0x00018da1 Thumb Code 60 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) + i.hal_gpio_ctrl_eint 0x00018de4 Section 0 hal_gpio.o(i.hal_gpio_ctrl_eint) + i.hal_gpio_get_input_data 0x00018dfc Section 0 hal_gpio.o(i.hal_gpio_get_input_data) + i.hal_gpio_init_eint 0x00018e10 Section 0 hal_gpio.o(i.hal_gpio_init_eint) + i.hal_gpio_init_input 0x00018e50 Section 0 hal_gpio.o(i.hal_gpio_init_input) + i.hal_gpio_init_output 0x00018e70 Section 0 hal_gpio.o(i.hal_gpio_init_output) + i.hal_gpio_reg_eint_cb 0x00018e98 Section 0 hal_gpio.o(i.hal_gpio_reg_eint_cb) + i.hal_gpio_set_ap_reset_int 0x00018eb0 Section 0 hal_gpio.o(i.hal_gpio_set_ap_reset_int) + i.hal_gpio_set_mode 0x00018f00 Section 0 hal_gpio.o(i.hal_gpio_set_mode) + i.hal_gpio_set_output_data 0x00018f60 Section 0 hal_gpio.o(i.hal_gpio_set_output_data) + i.hal_gpio_set_pull_state 0x00018f68 Section 0 hal_gpio.o(i.hal_gpio_set_pull_state) + i.hal_i2c_m_dma_init 0x00018f88 Section 0 hal_i2c_master.o(i.hal_i2c_m_dma_init) + i.hal_i2c_m_dma_read 0x00018ff4 Section 0 hal_i2c_master.o(i.hal_i2c_m_dma_read) + i.hal_i2c_m_dma_write 0x00019014 Section 0 hal_i2c_master.o(i.hal_i2c_m_dma_write) + i.hal_i2c_m_transfer_complate 0x00019030 Section 0 hal_i2c_master.o(i.hal_i2c_m_transfer_complate) + i.hal_i2c_master_irq_callback 0x0001903c Section 0 hal_i2c_master.o(i.hal_i2c_master_irq_callback) + hal_i2c_master_irq_callback 0x0001903d Thumb Code 24 hal_i2c_master.o(i.hal_i2c_master_irq_callback) + i.hal_i2c_s_dma_user_callback 0x0001905c Section 0 hal_i2c_slave.o(i.hal_i2c_s_dma_user_callback) + hal_i2c_s_dma_user_callback 0x0001905d Thumb Code 12 hal_i2c_slave.o(i.hal_i2c_s_dma_user_callback) + i.hal_i2c_s_dma_write 0x0001906c Section 0 hal_i2c_slave.o(i.hal_i2c_s_dma_write) + i.hal_i2c_s_init 0x000190a4 Section 0 hal_i2c_slave.o(i.hal_i2c_s_init) + i.hal_i2c_s_nonblocking_read 0x00019110 Section 0 hal_i2c_slave.o(i.hal_i2c_s_nonblocking_read) + i.hal_i2c_s_set_transfer 0x00019124 Section 0 hal_i2c_slave.o(i.hal_i2c_s_set_transfer) + i.hal_i2c_slave_irq_callback 0x00019130 Section 0 hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) + hal_i2c_slave_irq_callback 0x00019131 Thumb Code 304 hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) + i.hal_internal_init_memc 0x0001927c Section 0 hal_internal_vsync.o(i.hal_internal_init_memc) + i.hal_internal_sync_get_fb_setting 0x00019360 Section 0 hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) + i.hal_internal_sync_input_resolution_change 0x00019370 Section 0 hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) + i.hal_internal_vsync_deinit 0x00019584 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_deinit) + i.hal_internal_vsync_get_rx_state 0x000195a0 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) + i.hal_internal_vsync_get_sync_line 0x000195ac Section 0 hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) + i.hal_internal_vsync_get_tx_state 0x000195c4 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) + i.hal_internal_vsync_init_rx 0x000195d0 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_init_rx) + i.hal_internal_vsync_init_tx 0x000196cc Section 0 hal_internal_vsync.o(i.hal_internal_vsync_init_tx) + i.hal_internal_vsync_set_auto_hw_filter 0x0001977c Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) + i.hal_internal_vsync_set_rx_state 0x00019898 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) + i.hal_internal_vsync_set_sync_line 0x000198ac Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) + i.hal_internal_vsync_set_tear_mode 0x000198c8 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) + i.hal_internal_vsync_set_tx_state 0x00019910 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) + i.hal_lcdc_config_ccm 0x00019950 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) + hal_lcdc_config_ccm 0x00019951 Thumb Code 30 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) + i.hal_lcdc_config_remains 0x00019974 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) + hal_lcdc_config_remains 0x00019975 Thumb Code 68 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) + i.hal_lcdc_config_rgb_to_pentile 0x000199bc Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_rgb_to_pentile) + hal_lcdc_config_rgb_to_pentile 0x000199bd Thumb Code 14 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_rgb_to_pentile) + i.hal_lcdc_config_upscaler 0x000199d0 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) + hal_lcdc_config_upscaler 0x000199d1 Thumb Code 348 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) + i.hal_lcdc_init_cfg 0x00019b34 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) + hal_lcdc_init_cfg 0x00019b35 Thumb Code 60 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) + i.hal_lcdc_init_clk 0x00019b74 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) + hal_lcdc_init_clk 0x00019b75 Thumb Code 376 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) + i.hal_lcdc_init_interrupt 0x00019cf4 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) + hal_lcdc_init_interrupt 0x00019cf5 Thumb Code 58 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) + i.hal_spi_m_clear_rxfifo 0x00019d34 Section 0 hal_spi_master.o(i.hal_spi_m_clear_rxfifo) + i.hal_system_enable_systick 0x00019d42 Section 0 hal_system.o(i.hal_system_enable_systick) + i.hal_system_init 0x00019d4c Section 0 hal_system.o(i.hal_system_init) + i.hal_system_init_console 0x00019dd4 Section 0 hal_system.o(i.hal_system_init_console) + i.hal_system_set_phy_calibration 0x00019df0 Section 0 hal_system.o(i.hal_system_set_phy_calibration) + i.hal_system_set_pvd 0x00019df8 Section 0 hal_system.o(i.hal_system_set_pvd) + i.hal_system_set_vcc 0x00019e00 Section 0 hal_system.o(i.hal_system_set_vcc) + i.hal_timer_init 0x00019e08 Section 0 hal_timer.o(i.hal_timer_init) + i.hal_timer_start 0x00019e24 Section 0 hal_timer.o(i.hal_timer_start) + i.hal_uart_init 0x00019e74 Section 0 hal_uart.o(i.hal_uart_init) + i.hal_uart_transmit_blocking 0x00019f00 Section 0 hal_uart.o(i.hal_uart_transmit_blocking) + i.handle_init 0x00019f10 Section 0 irq_redirect .o(i.handle_init) + i.init_mipi_tx 0x0001a020 Section 0 ap_demo.o(i.init_mipi_tx) + init_mipi_tx 0x0001a021 Thumb Code 104 ap_demo.o(i.init_mipi_tx) + i.init_panel 0x0001a090 Section 0 ap_demo.o(i.init_panel) + init_panel 0x0001a091 Thumb Code 142 ap_demo.o(i.init_panel) + i.main 0x0001a128 Section 0 main.o(i.main) + i.open_mipi_rx 0x0001a134 Section 0 ap_demo.o(i.open_mipi_rx) + open_mipi_rx 0x0001a135 Thumb Code 162 ap_demo.o(i.open_mipi_rx) + i.pps_update_handle 0x0001a1fc Section 0 ap_demo.o(i.pps_update_handle) + pps_update_handle 0x0001a1fd Thumb Code 90 ap_demo.o(i.pps_update_handle) + i.rx_get_dcs_packet_data 0x0001a2bc Section 0 hal_internal_vsync.o(i.rx_get_dcs_packet_data) + rx_get_dcs_packet_data 0x0001a2bd Thumb Code 654 hal_internal_vsync.o(i.rx_get_dcs_packet_data) + i.rx_partial_update 0x0001a6b0 Section 0 hal_internal_vsync.o(i.rx_partial_update) + rx_partial_update 0x0001a6b1 Thumb Code 304 hal_internal_vsync.o(i.rx_partial_update) + i.rx_receive_packet 0x0001a7f0 Section 0 hal_internal_vsync.o(i.rx_receive_packet) + rx_receive_packet 0x0001a7f1 Thumb Code 128 hal_internal_vsync.o(i.rx_receive_packet) + i.rx_receive_pps 0x0001a87c Section 0 hal_internal_vsync.o(i.rx_receive_pps) + rx_receive_pps 0x0001a87d Thumb Code 268 hal_internal_vsync.o(i.rx_receive_pps) + i.rxbr_irq0_callback 0x0001a9fc Section 0 hal_internal_vsync.o(i.rxbr_irq0_callback) + rxbr_irq0_callback 0x0001a9fd Thumb Code 158 hal_internal_vsync.o(i.rxbr_irq0_callback) + i.rxbr_irq1_callback 0x0001aaa0 Section 0 hal_internal_vsync.o(i.rxbr_irq1_callback) + rxbr_irq1_callback 0x0001aaa1 Thumb Code 222 hal_internal_vsync.o(i.rxbr_irq1_callback) + i.soft_gen_te 0x0001ac10 Section 0 hal_internal_vsync.o(i.soft_gen_te) + soft_gen_te 0x0001ac11 Thumb Code 116 hal_internal_vsync.o(i.soft_gen_te) + i.soft_timer3_cb 0x0001ac9c Section 0 ap_demo.o(i.soft_timer3_cb) + soft_timer3_cb 0x0001ac9d Thumb Code 36 ap_demo.o(i.soft_timer3_cb) + i.sqrt 0x0001accc Section 0 sqrt.o(i.sqrt) + i.tp_heartbeat_exec 0x0001ad14 Section 0 ap_demo.o(i.tp_heartbeat_exec) + i.vidc_callback 0x0001ad7c Section 0 hal_internal_vsync.o(i.vidc_callback) + vidc_callback 0x0001ad7d Thumb Code 194 hal_internal_vsync.o(i.vidc_callback) + i.vpre_err_reset 0x0001ae64 Section 0 hal_internal_vsync.o(i.vpre_err_reset) + vpre_err_reset 0x0001ae65 Thumb Code 184 hal_internal_vsync.o(i.vpre_err_reset) + i.vsync_set_te_mode 0x0001af34 Section 0 hal_internal_vsync.o(i.vsync_set_te_mode) + vsync_set_te_mode 0x0001af35 Thumb Code 254 hal_internal_vsync.o(i.vsync_set_te_mode) + .constdata 0x0001b0d0 Section 9400 ap_demo.o(.constdata) + g_cus_rx_dcs_execute_table 0x0001b0d0 Data 108 ap_demo.o(.constdata) + .constdata 0x0001d588 Section 32 app_tp_st_touch.o(.constdata) + .constdata 0x0001d5a8 Section 210 hal_gpio.o(.constdata) + s_gpio_map 0x0001d5a8 Data 120 hal_gpio.o(.constdata) + s_gpio_perf 0x0001d620 Data 90 hal_gpio.o(.constdata) + .constdata 0x0001d67a Section 5286 app_tp_for_custom_s8.o(.constdata) + .constdata 0x0001eb20 Section 1 app_tp_for_custom_s8.o(.constdata) + .constdata 0x0001eb24 Section 8 drv_param_init.o(.constdata) + .constdata 0x0001eb2c Section 390 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+ ret_7f_count 0x000701db Data 1 ap_demo.o(.data) + ret_a1_count 0x000701dc Data 1 ap_demo.o(.data) + ret_a2_count 0x000701dd Data 1 ap_demo.o(.data) + ret_c6_count 0x000701de Data 1 ap_demo.o(.data) + ret_c7_count 0x000701df Data 1 ap_demo.o(.data) + ret_c8_count 0x000701e0 Data 1 ap_demo.o(.data) + ret_c9_count 0x000701e1 Data 1 ap_demo.o(.data) + frame_rate 0x000701e2 Data 1 ap_demo.o(.data) + g_rx_ctrl_handle 0x000701ec Data 4 ap_demo.o(.data) + g_tx_ctrl_handle 0x000701f0 Data 4 ap_demo.o(.data) + value_reg_df 0x000701f8 Data 4 ap_demo.o(.data) + .data 0x000703fc Section 23 app_tp_transfer.o(.data) + s_spim_write 0x000703fc Data 1 app_tp_transfer.o(.data) + s_screen_int_flag 0x000703fd Data 1 app_tp_transfer.o(.data) + s_phone_reset_flag 0x000703fe Data 1 app_tp_transfer.o(.data) + s_screen_int_transfer_status 0x000703ff Data 1 app_tp_transfer.o(.data) + s_screen_const_transfer_count 0x00070401 Data 1 app_tp_transfer.o(.data) + screen_int_transfer_count 0x00070402 Data 1 app_tp_transfer.o(.data) + screen_int_transfer_buffer_ready 0x00070403 Data 1 app_tp_transfer.o(.data) + .data 0x00070413 Section 40 app_tp_st_touch.o(.data) + s_calibration_flag 0x00070413 Data 1 app_tp_st_touch.o(.data) + s_calibration_correct_flag 0x00070414 Data 1 app_tp_st_touch.o(.data) + .data 0x0007043c Section 8 hal_dsi_rx_ctrl.o(.data) + g_hw_auto_filter 0x0007043c Data 1 hal_dsi_rx_ctrl.o(.data) + g_esc_clk 0x00070440 Data 4 hal_dsi_rx_ctrl.o(.data) + .data 0x00070444 Section 1 hal_dsi_tx_ctrl.o(.data) + g_tx_mode 0x00070444 Data 1 hal_dsi_tx_ctrl.o(.data) + .data 0x00070445 Section 1 hal_i2c_master.o(.data) + s_i2c_m_transfer_end 0x00070445 Data 1 hal_i2c_master.o(.data) + .data 0x00070448 Section 28 hal_i2c_slave.o(.data) + s_txbuffer_complate 0x00070448 Data 1 hal_i2c_slave.o(.data) + s_i2c_s_dma_end 0x00070449 Data 1 hal_i2c_slave.o(.data) + s_i2c_s_receive_cnt 0x0007044a Data 1 hal_i2c_slave.o(.data) + s_hal_slave_rxbuffer 0x0007044c Data 4 hal_i2c_slave.o(.data) + s_hal_slave_rxbuffer_size 0x00070450 Data 4 hal_i2c_slave.o(.data) + hal_i2c_s_callback 0x00070454 Data 4 hal_i2c_slave.o(.data) + s_receive_count 0x00070458 Data 4 hal_i2c_slave.o(.data) + s_tx_buffer_t 0x0007045c Data 4 hal_i2c_slave.o(.data) + tx_sum 0x00070460 Data 4 hal_i2c_slave.o(.data) + .data 0x00070464 Section 228 app_tp_for_custom_s8.o(.data) + app_tp_count 0x0007046e Data 1 app_tp_for_custom_s8.o(.data) + phone_85_flag 0x0007046f Data 1 app_tp_for_custom_s8.o(.data) + phone_F6_flag 0x00070470 Data 1 app_tp_for_custom_s8.o(.data) + phone_E4_flag 0x00070471 Data 1 app_tp_for_custom_s8.o(.data) + phone_72_flag 0x00070472 Data 1 app_tp_for_custom_s8.o(.data) + phone_75_flag 0x00070473 Data 1 app_tp_for_custom_s8.o(.data) + phone_92_flag 0x00070474 Data 1 app_tp_for_custom_s8.o(.data) + phone_74_flag 0x00070475 Data 1 app_tp_for_custom_s8.o(.data) + u16CoordY 0x00070478 Data 2 app_tp_for_custom_s8.o(.data) + u16CoordX 0x0007047a Data 2 app_tp_for_custom_s8.o(.data) + u16CoordY_back 0x0007047c Data 2 app_tp_for_custom_s8.o(.data) + u16CoordX_back 0x0007047e Data 2 app_tp_for_custom_s8.o(.data) + .data 0x00070548 Section 1 app_tp_for_custom_s8.o(.data) + .data 0x00070549 Section 1 app_tp_for_custom_s8.o(.data) + .data 0x0007054a Section 1 app_tp_for_custom_s8.o(.data) + .data 0x0007054b Section 3 app_tp_for_custom_s8.o(.data) + .data 0x0007054e Section 5 app_tp_for_custom_s8.o(.data) + .data 0x00070554 Section 48 app_tp_for_custom_s8.o(.data) + .data 0x00070584 Section 18 norflash.o(.data) + tmprg 0x0007058c Data 4 norflash.o(.data) + .data 0x00070598 Section 12 drv_common.o(.data) + s_my_tick 0x00070598 Data 4 drv_common.o(.data) + .data 0x000705a4 Section 4 drv_gpio.o(.data) + g_ap_reset_cb 0x000705a4 Data 4 drv_gpio.o(.data) + .data 0x000705a8 Section 8 drv_i2c_dma.o(.data) + i2c0_dma_callback 0x000705a8 Data 4 drv_i2c_dma.o(.data) + i2c1_dma_callback 0x000705ac Data 4 drv_i2c_dma.o(.data) + .data 0x000705b0 Section 4 drv_i2c_master.o(.data) + i2c1_intr_callback 0x000705b0 Data 4 drv_i2c_master.o(.data) + .data 0x000705b4 Section 8 drv_i2c_slave.o(.data) + i2c0_intr_callback 0x000705b4 Data 4 drv_i2c_slave.o(.data) + .data 0x000705bc Section 1188 drv_param_init.o(.data) + .data 0x00070a60 Section 4 drv_spi_master.o(.data) + SPIM_intr_callback 0x00070a60 Data 4 drv_spi_master.o(.data) + .data 0x00070a64 Section 1 drv_sys_cfg.o(.data) + sg_ap_rstn_trigger_type 0x00070a64 Data 1 drv_sys_cfg.o(.data) + .data 0x00070a68 Section 80 drv_timer.o(.data) + sg_timer_info 0x00070a68 Data 80 drv_timer.o(.data) + .data 0x00070ab8 Section 4 hal_internal_vsync.o(.data) + sg_cur_te_info 0x00070ab8 Data 4 hal_internal_vsync.o(.data) + .data 0x00070abc Section 8 drv_rxbr.o(.data) + .data 0x00070ac4 Section 4 drv_vidc.o(.data) + .data 0x00070ac8 Section 1 drv_phy_common.o(.data) + g_phy_calibration 0x00070ac8 Data 1 drv_phy_common.o(.data) + .data 0x00070acc Section 12 drv_chip_info.o(.data) + sg_chip_info 0x00070acc Data 4 drv_chip_info.o(.data) + sg_chip_function 0x00070ad0 Data 4 drv_chip_info.o(.data) + sg_chip_encrypt 0x00070ad4 Data 4 drv_chip_info.o(.data) + .data 0x00070ad8 Section 12 drv_pwm.o(.data) + s_pwm_type 0x00070ad8 Data 1 drv_pwm.o(.data) + s_pwm_cb 0x00070adc Data 8 drv_pwm.o(.data) + .data 0x00070ae4 Section 8 drv_swire.o(.data) + s_swire_cb 0x00070ae4 Data 8 drv_swire.o(.data) + .data 0x00070aec Section 8 drv_uart.o(.data) + s_UartFcrReg 0x00070aec Data 4 drv_uart.o(.data) + uart_userData 0x00070af0 Data 4 drv_uart.o(.data) + .data 0x00070af4 Section 12 drv_wdg.o(.data) + sg_wdg_repeat 0x00070af4 Data 1 drv_wdg.o(.data) + sg_wdg_cb 0x00070af8 Data 8 drv_wdg.o(.data) + .data 0x00070b00 Section 4 stdout.o(.data) + .data 0x00070b04 Section 4 errno.o(.data) + _errno 0x00070b04 Data 4 errno.o(.data) + .bss 0x00070b08 Section 400 app_tp_transfer.o(.bss) + s_screen_read_buffer 0x00070b08 Data 200 app_tp_transfer.o(.bss) + s_phone_read_buffer 0x00070bd0 Data 200 app_tp_transfer.o(.bss) + .bss 0x00070c98 Section 12 app_tp_st_touch.o(.bss) + .bss 0x00070ca4 Section 192 hal_dsi_rx_ctrl.o(.bss) + g_rx_ctrl_handle 0x00070ca4 Data 192 hal_dsi_rx_ctrl.o(.bss) + .bss 0x00070d64 Section 72 hal_dsi_tx_ctrl.o(.bss) + g_tx_ctrl_handle 0x00070d64 Data 72 hal_dsi_tx_ctrl.o(.bss) + .bss 0x00070dac Section 256 tau_log.o(.bss) + .bss 0x00070eac Section 208 hal_uart.o(.bss) + .bss 0x00070f7c Section 28 drv_dma.o(.bss) + s_dma_handle 0x00070f7c Data 28 drv_dma.o(.bss) + .bss 0x00070f98 Section 64 drv_gpio.o(.bss) + s_gpio_cb 0x00070f98 Data 64 drv_gpio.o(.bss) + .bss 0x00070fd8 Section 320 drv_i2c_dma.o(.bss) + i2c0_dma_slave_handle 0x00070fd8 Data 160 drv_i2c_dma.o(.bss) + i2c1_dma_master_handle 0x00071078 Data 160 drv_i2c_dma.o(.bss) + .bss 0x00071118 Section 2392 hal_internal_vsync.o(.bss) + g_imm_buffer 0x00071950 Data 255 hal_internal_vsync.o(.bss) + sg_te_info 0x00071a50 Data 12 hal_internal_vsync.o(.bss) + g_imm_packet 0x00071a5c Data 20 hal_internal_vsync.o(.bss) + .bss 0x00071a70 Section 4144 dcs_packet_fifo.o(.bss) + .bss 0x00072aa0 Section 32 hal_spi_slave.o(.bss) + STACK 0x00072ac0 Section 4096 startup_armcm0.o(STACK) + + Global Symbols + + Symbol Name Value Ov Type Size Object(Section) + + BuildAttributes$$THM_ISAv3M$S$PE$A:L22$X:L11$S22$IEEE1$IW$USESV6$~STKCKD$USESV7$~SHL$OTIME$ROPI$IEEEJ$EBA8$MICROLIB$REQ8$PRES8$EABIv2 0x00000000 Number 0 anon$$obj.o ABSOLUTE + __ARM_use_no_argv 0x00000000 Number 0 main.o ABSOLUTE + _printf_a 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_c 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_charcount 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_d 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_e 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_f 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_flags 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_fp_dec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_fp_hex 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_g 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_i 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_int_dec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_l 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_lc 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_ll 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_lld 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_lli 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_llo 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_llu 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_llx 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_longlong_dec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_longlong_hex 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_longlong_oct 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_ls 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_mbtowc 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_n 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_o 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_p 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_percent 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_pre_padding 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_return_value 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_s 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_sizespec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_str 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_truncate_signed 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_truncate_unsigned 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_u 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_wc 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_wctomb 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_widthprec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_x 0x00000000 Number 0 stubs.o ABSOLUTE + __cpp_initialize__aeabi_ - Undefined Weak Reference + __cxa_finalize - Undefined Weak Reference + _clock_init - Undefined Weak Reference + _microlib_exit - Undefined Weak Reference + __Vectors_Size 0x000000c0 Number 0 startup_armcm0.o ABSOLUTE + __Vectors 0x00010000 Data 4 startup_armcm0.o(RESET) + __Vectors_End 0x000100c0 Data 0 startup_armcm0.o(RESET) + __main 0x000100c1 Thumb Code 0 entry.o(.ARM.Collect$$$$00000000) + _main_stk 0x000100c1 Thumb Code 0 entry2.o(.ARM.Collect$$$$00000001) + _main_scatterload 0x000100c5 Thumb Code 0 entry5.o(.ARM.Collect$$$$00000004) + __main_after_scatterload 0x000100c9 Thumb Code 0 entry5.o(.ARM.Collect$$$$00000004) + _main_clock 0x000100c9 Thumb Code 0 entry7b.o(.ARM.Collect$$$$00000008) + _main_cpp_init 0x000100c9 Thumb Code 0 entry8b.o(.ARM.Collect$$$$0000000A) + _main_init 0x000100c9 Thumb Code 0 entry9a.o(.ARM.Collect$$$$0000000B) + __rt_final_cpp 0x000100d1 Thumb Code 0 entry10a.o(.ARM.Collect$$$$0000000D) + __rt_final_exit 0x000100d1 Thumb Code 0 entry11a.o(.ARM.Collect$$$$0000000F) + Reset_Handler 0x000100d5 Thumb Code 28 startup_armcm0.o(.text) + NMI_Handler 0x000100f1 Thumb Code 2 startup_armcm0.o(.text) + SVC_Handler 0x000100f5 Thumb Code 2 startup_armcm0.o(.text) + PendSV_Handler 0x000100f7 Thumb Code 2 startup_armcm0.o(.text) + OTP_IRQn_Handler 0x00010123 Thumb Code 2 startup_armcm0.o(.text) + PVD_IRQn_Handler 0x00010127 Thumb Code 2 startup_armcm0.o(.text) + __aeabi_uidiv 0x0001014d Thumb Code 0 uidiv.o(.text) + __aeabi_uidivmod 0x0001014d Thumb Code 44 uidiv.o(.text) + __aeabi_idiv 0x00010179 Thumb Code 0 idiv.o(.text) + __aeabi_idivmod 0x00010179 Thumb Code 40 idiv.o(.text) + __aeabi_memcpy 0x000101a1 Thumb Code 36 memcpya.o(.text) + __aeabi_memcpy4 0x000101a1 Thumb Code 0 memcpya.o(.text) + __aeabi_memcpy8 0x000101a1 Thumb Code 0 memcpya.o(.text) + __aeabi_memset 0x000101c5 Thumb Code 14 memseta.o(.text) + __aeabi_memset4 0x000101c5 Thumb Code 0 memseta.o(.text) + __aeabi_memset8 0x000101c5 Thumb Code 0 memseta.o(.text) + __aeabi_memclr 0x000101d3 Thumb Code 4 memseta.o(.text) + __aeabi_memclr4 0x000101d3 Thumb Code 0 memseta.o(.text) + __aeabi_memclr8 0x000101d3 Thumb Code 0 memseta.o(.text) + _memset$wrapper 0x000101d7 Thumb Code 18 memseta.o(.text) + __aeabi_fadd 0x000101e9 Thumb Code 162 fadd.o(.text) + __aeabi_fsub 0x0001028b Thumb Code 8 fadd.o(.text) + __aeabi_frsub 0x00010293 Thumb Code 8 fadd.o(.text) + __aeabi_fmul 0x0001029b Thumb Code 122 fmul.o(.text) + __aeabi_fdiv 0x00010315 Thumb Code 124 fdiv.o(.text) + __ARM_scalbnf 0x00010391 Thumb Code 24 fscalb.o(.text) + scalbnf 0x00010391 Thumb Code 0 fscalb.o(.text) + __aeabi_dadd 0x000103a9 Thumb Code 328 dadd.o(.text) + __aeabi_dsub 0x000104f1 Thumb Code 12 dadd.o(.text) + __aeabi_drsub 0x000104fd Thumb Code 12 dadd.o(.text) + __aeabi_dmul 0x0001050d Thumb Code 202 dmul.o(.text) + __aeabi_ddiv 0x000105dd Thumb Code 234 ddiv.o(.text) + __aeabi_i2f 0x000106cd Thumb Code 22 fflti.o(.text) + __aeabi_ui2f 0x000106e3 Thumb Code 14 ffltui.o(.text) + __aeabi_ui2d 0x000106f1 Thumb Code 24 dfltui.o(.text) + __aeabi_f2iz 0x0001070d Thumb Code 50 ffixi.o(.text) + __aeabi_f2uiz 0x0001073f Thumb Code 40 ffixui.o(.text) + __aeabi_d2iz 0x00010769 Thumb Code 62 dfixi.o(.text) + __aeabi_d2uiz 0x000107b1 Thumb Code 50 dfixui.o(.text) + __aeabi_f2d 0x000107ed Thumb Code 40 f2d.o(.text) + __aeabi_cdcmpeq 0x00010815 Thumb Code 0 cdcmple.o(.text) + __aeabi_cdcmple 0x00010815 Thumb Code 38 cdcmple.o(.text) + __aeabi_cfrcmple 0x0001083d Thumb Code 20 cfrcmple.o(.text) + __aeabi_uldivmod 0x00010851 Thumb Code 96 uldiv.o(.text) + __aeabi_llsl 0x000108b1 Thumb Code 32 llshl.o(.text) + _ll_shift_l 0x000108b1 Thumb Code 0 llshl.o(.text) + __aeabi_llsr 0x000108d1 Thumb Code 34 llushr.o(.text) + _ll_ushift_r 0x000108d1 Thumb Code 0 llushr.o(.text) + __aeabi_lasr 0x000108f3 Thumb Code 38 llsshr.o(.text) + _ll_sshift_r 0x000108f3 Thumb Code 0 llsshr.o(.text) + __I$use$fp 0x00010919 Thumb Code 0 iusefp.o(.text) + _float_round 0x00010919 Thumb Code 16 fepilogue.o(.text) + _float_epilogue 0x00010929 Thumb Code 114 fepilogue.o(.text) + _double_round 0x0001099b Thumb Code 26 depilogue.o(.text) + _double_epilogue 0x000109b5 Thumb Code 164 depilogue.o(.text) + _dsqrt 0x00010a59 Thumb Code 162 dsqrt.o(.text) + __aeabi_d2ulz 0x00010afd Thumb Code 54 dfixul.o(.text) + __aeabi_cdrcmple 0x00010b3d Thumb Code 38 cdrcmple.o(.text) + __scatterload 0x00010b65 Thumb Code 28 init.o(.text) + __scatterload_rt2 0x00010b65 Thumb Code 0 init.o(.text) + __decompress 0x00010b89 Thumb Code 0 __dczerorl2.o(.text) + __decompress1 0x00010b89 Thumb Code 86 __dczerorl2.o(.text) + ADC_IRQn_Handler 0x00010be1 Thumb Code 18 irq_redirect .o(i.ADC_IRQn_Handler) + AP_NRESET_IRQn_Handler 0x00010bf9 Thumb Code 18 irq_redirect .o(i.AP_NRESET_IRQn_Handler) + CRC16_2 0x00010c11 Thumb Code 54 app_tp_st_touch.o(i.CRC16_2) + DMA_IRQn_Handler 0x00010c51 Thumb Code 14 irq_redirect .o(i.DMA_IRQn_Handler) + EXTI_INT0_IRQn_Handler 0x00010c65 Thumb Code 22 irq_redirect .o(i.EXTI_INT0_IRQn_Handler) + EXTI_INT1_IRQn_Handler 0x00010c81 Thumb Code 22 irq_redirect .o(i.EXTI_INT1_IRQn_Handler) + EXTI_INT2_IRQn_Handler 0x00010c9d Thumb Code 22 irq_redirect .o(i.EXTI_INT2_IRQn_Handler) + EXTI_INT3_IRQn_Handler 0x00010cb9 Thumb Code 22 irq_redirect .o(i.EXTI_INT3_IRQn_Handler) + EXTI_INT4_IRQn_Handler 0x00010cd5 Thumb Code 22 irq_redirect .o(i.EXTI_INT4_IRQn_Handler) + EXTI_INT5_IRQn_Handler 0x00010cf1 Thumb Code 22 irq_redirect .o(i.EXTI_INT5_IRQn_Handler) + EXTI_INT6_IRQn_Handler 0x00010d0d Thumb Code 22 irq_redirect .o(i.EXTI_INT6_IRQn_Handler) + EXTI_INT7_IRQn_Handler 0x00010d29 Thumb Code 22 irq_redirect .o(i.EXTI_INT7_IRQn_Handler) + FLSCTRL_IRQn_Handler 0x00010d45 Thumb Code 14 irq_redirect .o(i.FLSCTRL_IRQn_Handler) + Gpio_swire_output 0x00010d59 Thumb Code 78 ap_demo.o(i.Gpio_swire_output) + HardFault_Handler 0x00010da9 Thumb Code 14 irq_redirect .o(i.HardFault_Handler) + I2C0_IRQn_Handler 0x00010dbd Thumb Code 18 irq_redirect .o(i.I2C0_IRQn_Handler) + I2C1_IRQn_Handler 0x00010dd5 Thumb Code 18 irq_redirect .o(i.I2C1_IRQn_Handler) + LCDC_IRQn_Handler 0x00010ded Thumb Code 18 irq_redirect .o(i.LCDC_IRQn_Handler) + LOG_printf 0x00010e05 Thumb Code 30 tau_log.o(i.LOG_printf) + MEMC_IRQn_Handler 0x00010e2d Thumb Code 18 irq_redirect .o(i.MEMC_IRQn_Handler) + MIPI_RX_IRQn_Handler 0x00010e45 Thumb Code 18 irq_redirect .o(i.MIPI_RX_IRQn_Handler) + MIPI_TX_IRQn_Handler 0x00010e5d Thumb Code 18 irq_redirect .o(i.MIPI_TX_IRQn_Handler) + PWMDET_IRQn_Handler 0x00010e75 Thumb Code 22 irq_redirect .o(i.PWMDET_IRQn_Handler) + S20_Start_init 0x00010e91 Thumb Code 300 app_tp_transfer.o(i.S20_Start_init) + SPIM_IRQn_Handler 0x00010fd5 Thumb Code 22 irq_redirect .o(i.SPIM_IRQn_Handler) + UART_DisableDma 0x00010ff1 Thumb Code 2 drv_uart.o(i.UART_DisableDma) + UART_GetInstance 0x00010ff3 Thumb Code 4 drv_uart.o(i.UART_GetInstance) + __scatterload_null 0x00010ff7 Thumb Code 2 handlers.o(i.__scatterload_null) + app_UART_IRQn_Handler 0x00010ff9 Thumb Code 8 drv_uart.o(i.app_UART_IRQn_Handler) + s_RAM_CK 0x00011000 Data 20 drv_common.o(.ARM.__at_0x11000) + SPIS_IRQn_Handler 0x00011015 Thumb Code 22 irq_redirect .o(i.SPIS_IRQn_Handler) + SWIRE_IRQn_Handler 0x00011031 Thumb Code 22 irq_redirect .o(i.SWIRE_IRQn_Handler) + SysTick_Handler 0x0001104d Thumb Code 18 irq_redirect .o(i.SysTick_Handler) + TIMER0_IRQn_Handler 0x00011065 Thumb Code 18 irq_redirect .o(i.TIMER0_IRQn_Handler) + TIMER1_IRQn_Handler 0x0001107d Thumb Code 18 irq_redirect .o(i.TIMER1_IRQn_Handler) + TIMER2_IRQn_Handler 0x00011095 Thumb Code 18 irq_redirect .o(i.TIMER2_IRQn_Handler) + TIMER3_IRQn_Handler 0x000110ad Thumb Code 18 irq_redirect .o(i.TIMER3_IRQn_Handler) + UART0_IRQ_Handle 0x000110c5 Thumb Code 20 drv_uart.o(i.UART0_IRQ_Handle) + UART_IRQn_Handler 0x000110e1 Thumb Code 18 irq_redirect .o(i.UART_IRQn_Handler) + UART_ResetRxFIFO 0x000110f9 Thumb Code 32 drv_uart.o(i.UART_ResetRxFIFO) + UART_SetBaudRate 0x0001111d Thumb Code 72 drv_uart.o(i.UART_SetBaudRate) + UART_SwitchSCLK 0x00011165 Thumb Code 26 drv_uart.o(i.UART_SwitchSCLK) + UART_TransferHandleIRQ 0x0001117f Thumb Code 308 drv_uart.o(i.UART_TransferHandleIRQ) + UART_WriteBlocking 0x000112b3 Thumb Code 26 drv_uart.o(i.UART_WriteBlocking) + UART_init 0x000112cd Thumb Code 182 drv_uart.o(i.UART_init) + VIDC_IRQn_Handler 0x00011389 Thumb Code 18 irq_redirect .o(i.VIDC_IRQn_Handler) + VPRE_IRQn_Handler 0x000113a1 Thumb Code 18 irq_redirect .o(i.VPRE_IRQn_Handler) + WDG_IRQn_Handler 0x000113b9 Thumb Code 18 irq_redirect .o(i.WDG_IRQn_Handler) + __0printf 0x000113d1 Thumb Code 24 printfa.o(i.__0printf) + __1printf 0x000113d1 Thumb Code 0 printfa.o(i.__0printf) + __2printf 0x000113d1 Thumb Code 0 printfa.o(i.__0printf) + __c89printf 0x000113d1 Thumb Code 0 printfa.o(i.__0printf) + printf 0x000113d1 Thumb Code 0 printfa.o(i.__0printf) + __0vsprintf 0x000113f1 Thumb Code 30 printfa.o(i.__0vsprintf) + __1vsprintf 0x000113f1 Thumb Code 0 printfa.o(i.__0vsprintf) + __2vsprintf 0x000113f1 Thumb Code 0 printfa.o(i.__0vsprintf) + __c89vsprintf 0x000113f1 Thumb Code 0 printfa.o(i.__0vsprintf) + vsprintf 0x000113f1 Thumb Code 0 printfa.o(i.__0vsprintf) + __ARM_clz 0x00011415 Thumb Code 46 depilogue.o(i.__ARM_clz) + __ARM_common_switch8 0x00011443 Thumb Code 26 hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) + __scatterload_copy 0x00011521 Thumb Code 14 handlers.o(i.__scatterload_copy) + __scatterload_zeroinit 0x0001152f Thumb Code 14 handlers.o(i.__scatterload_zeroinit) + __set_errno 0x0001153d Thumb Code 6 errno.o(i.__set_errno) + ap_demo 0x00012df5 Thumb Code 284 ap_demo.o(i.ap_demo) + ap_get_tp_calibration_status_01 0x0001301d Thumb Code 28 app_tp_st_touch.o(i.ap_get_tp_calibration_status_01) + ap_set_tp_calibration_04 0x00013229 Thumb Code 138 app_tp_st_touch.o(i.ap_set_tp_calibration_04) + ap_tp_st_touch_calibration 0x000132c1 Thumb Code 170 app_tp_st_touch.o(i.ap_tp_st_touch_calibration) + ap_tp_st_touch_error_handler_F3 0x00013371 Thumb Code 26 app_tp_st_touch.o(i.ap_tp_st_touch_error_handler_F3) + ap_tp_st_touch_error_handler_FF 0x0001338b Thumb Code 32 app_tp_st_touch.o(i.ap_tp_st_touch_error_handler_FF) + ap_tp_st_touch_get_calibration_success_mark 0x000133ad Thumb Code 150 app_tp_st_touch.o(i.ap_tp_st_touch_get_calibration_success_mark) + ap_tp_st_touch_scan_point_init 0x00013455 Thumb Code 24 app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_init) + ap_tp_st_touch_scan_point_record_event 0x00013471 Thumb Code 142 app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_record_event) + ap_tp_st_touch_scan_point_record_event_exec 0x00013505 Thumb Code 50 app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_record_event_exec) + ap_tp_st_touch_simulate_finger_release_event 0x00013555 Thumb Code 44 app_tp_st_touch.o(i.ap_tp_st_touch_simulate_finger_release_event) + ap_tp_st_touch_software_reset 0x00013589 Thumb Code 118 app_tp_st_touch.o(i.ap_tp_st_touch_software_reset) + app_ADC_IRQn_Handler 0x000136a1 Thumb Code 22 drv_rxbr.o(i.app_ADC_IRQn_Handler) + app_AP_NRESET_IRQn_Handler 0x000136bd Thumb Code 32 drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) + app_EXTI_INT0_IRQn_Handler 0x000136e1 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) + app_EXTI_INT1_IRQn_Handler 0x000136fd Thumb Code 22 drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) + app_EXTI_INT2_IRQn_Handler 0x00013719 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) + app_EXTI_INT3_IRQn_Handler 0x00013735 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) + app_EXTI_INT4_IRQn_Handler 0x00013751 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) + app_EXTI_INT5_IRQn_Handler 0x0001376d Thumb Code 22 drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) + app_EXTI_INT6_IRQn_Handler 0x00013789 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) + app_EXTI_INT7_IRQn_Handler 0x000137a5 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) + app_HardFault_Handler 0x000137c1 Thumb Code 12 drv_common.o(i.app_HardFault_Handler) + app_I2C0_IRQn_Handler 0x00013809 Thumb Code 8 drv_i2c_slave.o(i.app_I2C0_IRQn_Handler) + app_I2C1_IRQn_Handler 0x00013819 Thumb Code 8 drv_i2c_master.o(i.app_I2C1_IRQn_Handler) + app_LCDC_IRQn_Handler 0x00013829 Thumb Code 98 hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) + app_MEMC_IRQn_Handler 0x00013909 Thumb Code 132 drv_memc.o(i.app_MEMC_IRQn_Handler) + app_MIPI_RX_IRQn_Handler 0x00013991 Thumb Code 232 drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) + app_MIPI_TX_IRQn_Handler 0x00013c29 Thumb Code 56 drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) + app_PWMDET_IRQn_Handler 0x00013cc9 Thumb Code 62 drv_pwm.o(i.app_PWMDET_IRQn_Handler) + app_SPIM_IRQn_Handler 0x00013d11 Thumb Code 34 drv_spi_master.o(i.app_SPIM_IRQn_Handler) + app_SPIS_IRQn_Handler 0x00013d41 Thumb Code 500 hal_spi_slave.o(i.app_SPIS_IRQn_Handler) + app_SWIRE_IRQn_Handler 0x00013f41 Thumb Code 28 drv_swire.o(i.app_SWIRE_IRQn_Handler) + app_SysTick_Handler 0x00013f61 Thumb Code 20 drv_common.o(i.app_SysTick_Handler) + app_TIMER0_IRQn_Handler 0x00013f79 Thumb Code 10 drv_timer.o(i.app_TIMER0_IRQn_Handler) + app_TIMER1_IRQn_Handler 0x00013f83 Thumb Code 10 drv_timer.o(i.app_TIMER1_IRQn_Handler) + app_TIMER2_IRQn_Handler 0x00013f8d Thumb Code 10 drv_timer.o(i.app_TIMER2_IRQn_Handler) + app_TIMER3_IRQn_Handler 0x00013f97 Thumb Code 10 drv_timer.o(i.app_TIMER3_IRQn_Handler) + app_VIDC_IRQn_Handler 0x00013fa1 Thumb Code 22 drv_vidc.o(i.app_VIDC_IRQn_Handler) + app_VPRE_IRQn_Handler 0x00013fbd Thumb Code 22 drv_rxbr.o(i.app_VPRE_IRQn_Handler) + app_WDG_IRQn_Handler 0x00013fd9 Thumb Code 52 drv_wdg.o(i.app_WDG_IRQn_Handler) + app_dma_irq_handler 0x00014011 Thumb Code 10 drv_dma.o(i.app_dma_irq_handler) + app_fls_ctrl_Handler 0x00014021 Thumb Code 38 norflash.o(i.app_fls_ctrl_Handler) + app_tp_I2C_init 0x00014051 Thumb Code 26 app_tp_transfer.o(i.app_tp_I2C_init) + app_tp_calibration_exec 0x00014075 Thumb Code 78 app_tp_st_touch.o(i.app_tp_calibration_exec) + app_tp_init 0x0001414d Thumb Code 56 app_tp_transfer.o(i.app_tp_init) + app_tp_m_read 0x00014191 Thumb Code 32 app_tp_transfer.o(i.app_tp_m_read) + app_tp_m_write 0x000141b1 Thumb Code 8 app_tp_transfer.o(i.app_tp_m_write) + app_tp_phone_analysis_data 0x000141b9 Thumb Code 806 app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) + app_tp_phone_clear_reset_on 0x0001450d Thumb Code 8 app_tp_transfer.o(i.app_tp_phone_clear_reset_on) + app_tp_s_read 0x00014519 Thumb Code 8 app_tp_transfer.o(i.app_tp_s_read) + app_tp_s_write 0x00014521 Thumb Code 8 app_tp_transfer.o(i.app_tp_s_write) + app_tp_screen_analysis_int 0x00014529 Thumb Code 670 app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) + app_tp_screen_init 0x000147d5 Thumb Code 42 app_tp_transfer.o(i.app_tp_screen_init) + app_tp_transfer_screen_int 0x00014851 Thumb Code 250 app_tp_transfer.o(i.app_tp_transfer_screen_int) + app_tp_transfer_screen_start 0x00014989 Thumb Code 18 app_tp_transfer.o(i.app_tp_transfer_screen_start) + board_Init 0x000149a1 Thumb Code 30 board.o(i.board_Init) + ceil 0x00014d91 Thumb Code 180 ceil.o(i.ceil) + dcs_packet_fifo_alloc 0x00014f19 Thumb Code 80 dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) + dcs_packet_fifo_init 0x00014f71 Thumb Code 18 dcs_packet_fifo.o(i.dcs_packet_fifo_init) + dcs_packet_free_fifo_header 0x00014f89 Thumb Code 60 dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) + dcs_packet_get_fifo_header 0x00014fcd Thumb Code 26 dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) + delayMs 0x0001500d Thumb Code 24 tau_delay.o(i.delayMs) + delayUs 0x00015025 Thumb Code 34 tau_delay.o(i.delayUs) + drv_ap_rst_trig_edge_detect 0x00015049 Thumb Code 46 drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) + drv_chip_info_get_info 0x00015081 Thumb Code 6 drv_chip_info.o(i.drv_chip_info_get_info) + drv_chip_info_init 0x0001508d Thumb Code 56 drv_chip_info.o(i.drv_chip_info_init) + drv_chip_rx_info_check 0x000150cd Thumb Code 122 drv_chip_info.o(i.drv_chip_rx_info_check) + drv_chip_rx_init_done 0x00015195 Thumb Code 16 drv_chip_info.o(i.drv_chip_rx_init_done) + drv_common_enable_systick 0x000151a9 Thumb Code 70 drv_common.o(i.drv_common_enable_systick) + drv_common_system_init 0x00015201 Thumb Code 8 drv_common.o(i.drv_common_system_init) + drv_crgu_config_reset_modules 0x00015209 Thumb Code 10 drv_crgu.o(i.drv_crgu_config_reset_modules) + drv_crgu_set_ahb_pre_div 0x00015219 Thumb Code 14 drv_crgu.o(i.drv_crgu_set_ahb_pre_div) + drv_crgu_set_ahb_src 0x0001522d Thumb Code 16 drv_crgu.o(i.drv_crgu_set_ahb_src) + drv_crgu_set_clock 0x00015241 Thumb Code 26 drv_crgu.o(i.drv_crgu_set_clock) + drv_crgu_set_dpi_mux_src 0x00015261 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dpi_mux_src) + drv_crgu_set_dpi_pre_div 0x00015275 Thumb Code 18 drv_crgu.o(i.drv_crgu_set_dpi_pre_div) + drv_crgu_set_dpi_pre_src 0x0001528d Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dpi_pre_src) + drv_crgu_set_dsc_core_div 0x000152a1 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dsc_core_div) + drv_crgu_set_dsco_src 0x000152b5 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dsco_src) + drv_crgu_set_dsco_src_div 0x000152c9 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dsco_src_div) + drv_crgu_set_fb_div 0x000152dd Thumb Code 16 drv_crgu.o(i.drv_crgu_set_fb_div) + drv_crgu_set_fb_src 0x000152f1 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_fb_src) + drv_crgu_set_lcdc_div 0x00015305 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_lcdc_div) + drv_crgu_set_lcdc_src 0x00015319 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_lcdc_src) + drv_crgu_set_mipi_cfg_src 0x0001532d Thumb Code 16 drv_crgu.o(i.drv_crgu_set_mipi_cfg_src) + drv_crgu_set_mipi_ref_src 0x00015341 Thumb Code 18 drv_crgu.o(i.drv_crgu_set_mipi_ref_src) + drv_crgu_set_reset 0x00015359 Thumb Code 20 drv_crgu.o(i.drv_crgu_set_reset) + drv_crgu_set_rxbr_div 0x00015371 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_rxbr_div) + drv_crgu_set_rxbr_src 0x00015385 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_rxbr_src) + drv_crgu_set_vidc_src 0x00015399 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_vidc_src) + drv_dma_clear_flag 0x000153ad Thumb Code 24 drv_dma.o(i.drv_dma_clear_flag) + drv_dma_create_handle 0x000153c5 Thumb Code 22 drv_dma.o(i.drv_dma_create_handle) + drv_dma_disenable_channel 0x000153e1 Thumb Code 16 drv_dma.o(i.drv_dma_disenable_channel) + drv_dma_enable_channel 0x000153f1 Thumb Code 16 drv_dma.o(i.drv_dma_enable_channel) + drv_dma_enable_channel_interrupts 0x00015401 Thumb Code 32 drv_dma.o(i.drv_dma_enable_channel_interrupts) + drv_dma_get_channel_flag 0x00015425 Thumb Code 12 drv_dma.o(i.drv_dma_get_channel_flag) + drv_dma_irq_handler 0x00015431 Thumb Code 138 drv_dma.o(i.drv_dma_irq_handler) + drv_dma_prepar_transfer 0x000154c1 Thumb Code 18 drv_dma.o(i.drv_dma_prepar_transfer) + drv_dma_set_burst 0x000154d3 Thumb Code 26 drv_dma.o(i.drv_dma_set_burst) + drv_dma_set_callback 0x000154ed Thumb Code 6 drv_dma.o(i.drv_dma_set_callback) + drv_dma_set_transfer 0x000154f5 Thumb Code 62 drv_dma.o(i.drv_dma_set_transfer) + drv_dsc_dec_convert_pps_rc_parameter 0x00015539 Thumb Code 54 drv_dsc_dec.o(i.drv_dsc_dec_convert_pps_rc_parameter) + drv_dsc_dec_disable 0x0001556f Thumb Code 12 drv_dsc_dec.o(i.drv_dsc_dec_disable) + drv_dsc_dec_enable 0x0001557d Thumb Code 88 drv_dsc_dec.o(i.drv_dsc_dec_enable) + drv_dsc_dec_get_nslc 0x000155f1 Thumb Code 10 drv_dsc_dec.o(i.drv_dsc_dec_get_nslc) + drv_dsc_dec_set_u8_pps 0x000155fb Thumb Code 40 drv_dsc_dec.o(i.drv_dsc_dec_set_u8_pps) + drv_dsi_rx_calc_ipi_tx_delay 0x00015625 Thumb Code 244 drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) + drv_dsi_rx_enable_irq 0x00015729 Thumb Code 58 drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) + drv_dsi_rx_get_compression_en 0x000157d5 Thumb Code 8 drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) + drv_dsi_rx_get_max_ret_size 0x000157dd Thumb Code 6 drv_dsi_rx.o(i.drv_dsi_rx_get_max_ret_size) + drv_dsi_rx_power_up 0x000157e3 Thumb Code 14 drv_dsi_rx.o(i.drv_dsi_rx_power_up) + drv_dsi_rx_set_ctrl_cfg 0x000157f1 Thumb Code 32 drv_dsi_rx.o(i.drv_dsi_rx_set_ctrl_cfg) + drv_dsi_rx_set_ddi_cfg 0x00015811 Thumb Code 16 drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) + drv_dsi_rx_set_inten 0x00015821 Thumb Code 4 drv_dsi_rx.o(i.drv_dsi_rx_set_inten) + drv_dsi_rx_set_ipi_cfg 0x00015825 Thumb Code 16 drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_cfg) + drv_dsi_rx_set_lane_swap 0x00015835 Thumb Code 70 drv_dsi_rx.o(i.drv_dsi_rx_set_lane_swap) + drv_dsi_rx_set_resp_cnt 0x0001587b Thumb Code 38 drv_dsi_rx.o(i.drv_dsi_rx_set_resp_cnt) + drv_dsi_rx_set_up_phy 0x000158a1 Thumb Code 236 drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) + drv_dsi_rx_shut_down 0x00015991 Thumb Code 14 drv_dsi_rx.o(i.drv_dsi_rx_shut_down) + drv_dsi_tx_command_header 0x0001599f Thumb Code 20 drv_dsi_tx.o(i.drv_dsi_tx_command_header) + drv_dsi_tx_command_mode_cfg 0x000159b3 Thumb Code 108 drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) + drv_dsi_tx_command_put_payload 0x00015a1f Thumb Code 4 drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) + drv_dsi_tx_config_eotp 0x00015a23 Thumb Code 24 drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) + drv_dsi_tx_config_int 0x00015a3b Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_config_int) + drv_dsi_tx_dpi_lpcmd_time 0x00015a43 Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_dpi_lpcmd_time) + drv_dsi_tx_dpi_mode 0x00015a4b Thumb Code 10 drv_dsi_tx.o(i.drv_dsi_tx_dpi_mode) + drv_dsi_tx_dpi_polarity 0x00015a55 Thumb Code 36 drv_dsi_tx.o(i.drv_dsi_tx_dpi_polarity) + drv_dsi_tx_edpi_cmd_size 0x00015a79 Thumb Code 4 drv_dsi_tx.o(i.drv_dsi_tx_edpi_cmd_size) + drv_dsi_tx_get_cmd_status 0x00015a7d Thumb Code 4 drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) + drv_dsi_tx_mode 0x00015a81 Thumb Code 4 drv_dsi_tx.o(i.drv_dsi_tx_mode) + drv_dsi_tx_phy_clock_lane_auto_lp 0x00015a85 Thumb Code 24 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_auto_lp) + drv_dsi_tx_phy_clock_lane_req_hs 0x00015a9d Thumb Code 26 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) + drv_dsi_tx_phy_lane_mode 0x00015ab7 Thumb Code 12 drv_dsi_tx.o(i.drv_dsi_tx_phy_lane_mode) + drv_dsi_tx_phy_status_ready 0x00015ac3 Thumb Code 100 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ready) + drv_dsi_tx_phy_status_stopstate 0x00015b27 Thumb Code 62 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) + drv_dsi_tx_phy_test_setup 0x00015b65 Thumb Code 268 drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) + drv_dsi_tx_phy_time_cfg 0x00015c71 Thumb Code 30 drv_dsi_tx.o(i.drv_dsi_tx_phy_time_cfg) + drv_dsi_tx_powerup 0x00015c8f Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_powerup) + drv_dsi_tx_response_mode 0x00015c97 Thumb Code 28 drv_dsi_tx.o(i.drv_dsi_tx_response_mode) + drv_dsi_tx_set_bta_ack 0x00015cb3 Thumb Code 24 drv_dsi_tx.o(i.drv_dsi_tx_set_bta_ack) + drv_dsi_tx_set_esc_div 0x00015ccb Thumb Code 12 drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) + drv_dsi_tx_set_int 0x00015cd9 Thumb Code 46 drv_dsi_tx.o(i.drv_dsi_tx_set_int) + drv_dsi_tx_set_time_out_div 0x00015d0d Thumb Code 16 drv_dsi_tx.o(i.drv_dsi_tx_set_time_out_div) + drv_dsi_tx_set_video_chunk 0x00015d1d Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_set_video_chunk) + drv_dsi_tx_set_video_timing 0x00015d25 Thumb Code 34 drv_dsi_tx.o(i.drv_dsi_tx_set_video_timing) + drv_dsi_tx_shutdown 0x00015d47 Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_shutdown) + drv_dsi_tx_timeout_cfg 0x00015d4f Thumb Code 38 drv_dsi_tx.o(i.drv_dsi_tx_timeout_cfg) + drv_dsi_tx_video_mode_cfg 0x00015d75 Thumb Code 170 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_cfg) + drv_dsi_tx_video_mode_disable_hact_cmd 0x00015e1f Thumb Code 22 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_disable_hact_cmd) + drv_dsi_tx_video_mode_set_lp_cmd 0x00015e35 Thumb Code 24 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_set_lp_cmd) + drv_efuse_enter_inactive 0x00015e4d Thumb Code 32 drv_efuse.o(i.drv_efuse_enter_inactive) + drv_efuse_int_enable 0x00015e6d Thumb Code 12 drv_efuse.o(i.drv_efuse_int_enable) + drv_efuse_read 0x00015e79 Thumb Code 50 drv_efuse.o(i.drv_efuse_read) + drv_efuse_read_req 0x00015eab Thumb Code 24 drv_efuse.o(i.drv_efuse_read_req) + drv_gpio_get_input_data 0x00015ec5 Thumb Code 20 drv_gpio.o(i.drv_gpio_get_input_data) + drv_gpio_register_ap_reset_callback 0x00015edd Thumb Code 6 drv_gpio.o(i.drv_gpio_register_ap_reset_callback) + drv_gpio_register_callback 0x00015ee9 Thumb Code 14 drv_gpio.o(i.drv_gpio_register_callback) + drv_gpio_set_int 0x00015efd Thumb Code 62 drv_gpio.o(i.drv_gpio_set_int) + drv_gpio_set_ioe 0x00015f41 Thumb Code 26 drv_gpio.o(i.drv_gpio_set_ioe) + drv_gpio_set_mode0 0x00015f61 Thumb Code 12 drv_gpio.o(i.drv_gpio_set_mode0) + drv_gpio_set_mode1 0x00015f71 Thumb Code 12 drv_gpio.o(i.drv_gpio_set_mode1) + drv_gpio_set_mode2 0x00015f81 Thumb Code 12 drv_gpio.o(i.drv_gpio_set_mode2) + drv_gpio_set_mode3 0x00015f91 Thumb Code 12 drv_gpio.o(i.drv_gpio_set_mode3) + drv_gpio_set_pull_state 0x00015fc1 Thumb Code 298 drv_gpio.o(i.drv_gpio_set_pull_state) + drv_i2c_dma_init 0x00016125 Thumb Code 146 drv_i2c_dma.o(i.drv_i2c_dma_init) + drv_i2c_enable_rx_dma 0x000161d1 Thumb Code 26 drv_i2c_dma.o(i.drv_i2c_enable_rx_dma) + drv_i2c_enable_tx_dma 0x000161eb Thumb Code 24 drv_i2c_dma.o(i.drv_i2c_enable_tx_dma) + drv_i2c_m_clear_it_pending_bit 0x00016205 Thumb Code 86 drv_i2c_master.o(i.drv_i2c_m_clear_it_pending_bit) + drv_i2c_m_enable 0x00016265 Thumb Code 10 drv_i2c_master.o(i.drv_i2c_m_enable) + drv_i2c_m_enable_intr 0x00016275 Thumb Code 42 drv_i2c_master.o(i.drv_i2c_m_enable_intr) + drv_i2c_m_set_callback 0x000162ad Thumb Code 6 drv_i2c_master.o(i.drv_i2c_m_set_callback) + drv_i2c_master_init 0x000162b9 Thumb Code 118 drv_i2c_master.o(i.drv_i2c_master_init) + drv_i2c_master_read_dma 0x00016345 Thumb Code 82 drv_i2c_dma.o(i.drv_i2c_master_read_dma) + drv_i2c_master_write_dma 0x000163a1 Thumb Code 50 drv_i2c_dma.o(i.drv_i2c_master_write_dma) + drv_i2c_s_clear_it_pending_bit 0x0001640d Thumb Code 84 drv_i2c_slave.o(i.drv_i2c_s_clear_it_pending_bit) + drv_i2c_s_enable_intr 0x00016469 Thumb Code 40 drv_i2c_slave.o(i.drv_i2c_s_enable_intr) + drv_i2c_s_get_fifo_status 0x0001649d Thumb Code 22 drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) + drv_i2c_s_set_callback 0x000164b9 Thumb Code 6 drv_i2c_slave.o(i.drv_i2c_s_set_callback) + drv_i2c_s_write_data 0x000164c5 Thumb Code 26 drv_i2c_slave.o(i.drv_i2c_s_write_data) + drv_i2c_set_dma_irq_callback 0x000164e5 Thumb Code 68 drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) + drv_i2c_slave_init 0x0001653d Thumb Code 60 drv_i2c_slave.o(i.drv_i2c_slave_init) + drv_i2c_slave_write_dma 0x00016581 Thumb Code 18 drv_i2c_dma.o(i.drv_i2c_slave_write_dma) + drv_lcdc_config_bypass 0x0001659d Thumb Code 24 drv_lcdc.o(i.drv_lcdc_config_bypass) + drv_lcdc_config_ccm 0x000165b5 Thumb Code 48 drv_lcdc.o(i.drv_lcdc_config_ccm) + drv_lcdc_config_disp_mode 0x000165e5 Thumb Code 22 drv_lcdc.o(i.drv_lcdc_config_disp_mode) + drv_lcdc_config_dpi_polarity 0x000165fb Thumb Code 36 drv_lcdc.o(i.drv_lcdc_config_dpi_polarity) + drv_lcdc_config_dpi_timing 0x0001661f Thumb Code 38 drv_lcdc.o(i.drv_lcdc_config_dpi_timing) + drv_lcdc_config_edpi_mode 0x00016645 Thumb Code 22 drv_lcdc.o(i.drv_lcdc_config_edpi_mode) + drv_lcdc_config_endianness 0x0001665b Thumb Code 22 drv_lcdc.o(i.drv_lcdc_config_endianness) + drv_lcdc_config_input_size 0x00016671 Thumb Code 12 drv_lcdc.o(i.drv_lcdc_config_input_size) + drv_lcdc_config_int 0x0001667d Thumb Code 30 drv_lcdc.o(i.drv_lcdc_config_int) + drv_lcdc_config_int_single 0x0001669b Thumb Code 34 drv_lcdc.o(i.drv_lcdc_config_int_single) + drv_lcdc_config_overwrite 0x000166bd Thumb Code 34 drv_lcdc.o(i.drv_lcdc_config_overwrite) + drv_lcdc_config_overwrite_rgb 0x000166df Thumb Code 12 drv_lcdc.o(i.drv_lcdc_config_overwrite_rgb) + drv_lcdc_config_partial_display_area 0x000166eb Thumb Code 26 drv_lcdc.o(i.drv_lcdc_config_partial_display_area) + drv_lcdc_config_partial_display_enable 0x00016705 Thumb Code 34 drv_lcdc.o(i.drv_lcdc_config_partial_display_enable) + drv_lcdc_config_scale_up_coef 0x00016727 Thumb Code 26 drv_lcdc.o(i.drv_lcdc_config_scale_up_coef) + drv_lcdc_config_scale_up_step 0x00016741 Thumb Code 12 drv_lcdc.o(i.drv_lcdc_config_scale_up_step) + drv_lcdc_config_src_parameter 0x0001674d Thumb Code 76 drv_lcdc.o(i.drv_lcdc_config_src_parameter) + drv_lcdc_config_thresh 0x00016799 Thumb Code 6 drv_lcdc.o(i.drv_lcdc_config_thresh) + drv_lcdc_ctrl_flow 0x0001679f Thumb Code 18 drv_lcdc.o(i.drv_lcdc_ctrl_flow) + drv_lcdc_enable_shadow_reg 0x000167b1 Thumb Code 32 drv_lcdc.o(i.drv_lcdc_enable_shadow_reg) + drv_lcdc_set_int 0x000167d1 Thumb Code 46 drv_lcdc.o(i.drv_lcdc_set_int) + drv_lcdc_set_video_hw_mode 0x00016805 Thumb Code 20 drv_lcdc.o(i.drv_lcdc_set_video_hw_mode) + drv_lcdc_start 0x00016819 Thumb Code 32 drv_lcdc.o(i.drv_lcdc_start) + drv_memc_clear_status 0x00016839 Thumb Code 12 drv_memc.o(i.drv_memc_clear_status) + drv_memc_enable_irq 0x00016845 Thumb Code 58 drv_memc.o(i.drv_memc_enable_irq) + drv_memc_gen_a_tear_signal 0x00016885 Thumb Code 12 drv_memc.o(i.drv_memc_gen_a_tear_signal) + drv_memc_get_status 0x00016891 Thumb Code 18 drv_memc.o(i.drv_memc_get_status) + drv_memc_rate_transfer_sel 0x000168a3 Thumb Code 16 drv_memc.o(i.drv_memc_rate_transfer_sel) + drv_memc_sel_vsync 0x000168b3 Thumb Code 14 drv_memc.o(i.drv_memc_sel_vsync) + drv_memc_set_active_height 0x000168c1 Thumb Code 14 drv_memc.o(i.drv_memc_set_active_height) + drv_memc_set_data_mode 0x000168d5 Thumb Code 12 drv_memc.o(i.drv_memc_set_data_mode) + drv_memc_set_double_buffer 0x000168e1 Thumb Code 16 drv_memc.o(i.drv_memc_set_double_buffer) + drv_memc_set_double_buffer_reverse 0x000168f1 Thumb Code 18 drv_memc.o(i.drv_memc_set_double_buffer_reverse) + drv_memc_set_fs_en_conditions 0x00016903 Thumb Code 16 drv_memc.o(i.drv_memc_set_fs_en_conditions) + drv_memc_set_inten 0x00016913 Thumb Code 20 drv_memc.o(i.drv_memc_set_inten) + drv_memc_set_lcdc_st_conditions 0x00016929 Thumb Code 18 drv_memc.o(i.drv_memc_set_lcdc_st_conditions) + drv_memc_set_ltpo_mode 0x00016941 Thumb Code 26 drv_memc.o(i.drv_memc_set_ltpo_mode) + drv_memc_set_tear_mode 0x0001695b Thumb Code 14 drv_memc.o(i.drv_memc_set_tear_mode) + drv_memc_set_tear_waveform 0x00016969 Thumb Code 34 drv_memc.o(i.drv_memc_set_tear_waveform) + drv_memc_set_vidc_sync_cnt 0x00016991 Thumb Code 14 drv_memc.o(i.drv_memc_set_vidc_sync_cnt) + drv_param_init_get_ccm 0x000169a1 Thumb Code 4 drv_param_init.o(i.drv_param_init_get_ccm) + drv_param_init_get_scld_filter_h 0x000169a9 Thumb Code 12 drv_param_init.o(i.drv_param_init_get_scld_filter_h) + drv_param_init_get_scld_filter_v 0x000169bd Thumb Code 12 drv_param_init.o(i.drv_param_init_get_scld_filter_v) + drv_param_init_get_sclu_filter 0x000169d1 Thumb Code 4 drv_param_init.o(i.drv_param_init_get_sclu_filter) + drv_param_init_set_ccm 0x000169d9 Thumb Code 14 drv_param_init.o(i.drv_param_init_set_ccm) + drv_param_init_set_scld_filter 0x000169ed Thumb Code 92 drv_param_init.o(i.drv_param_init_set_scld_filter) + drv_param_p2r_filter_init 0x00016a51 Thumb Code 30 drv_param_init.o(i.drv_param_p2r_filter_init) + drv_phy_enable_calibration 0x00016a75 Thumb Code 12 drv_phy_common.o(i.drv_phy_enable_calibration) + drv_phy_get_calibration 0x00016a85 Thumb Code 50 drv_phy_common.o(i.drv_phy_get_calibration) + drv_phy_get_pll_para 0x00016ac1 Thumb Code 88 drv_phy_common.o(i.drv_phy_get_pll_para) + drv_phy_get_rate_para 0x00016b21 Thumb Code 76 drv_phy_common.o(i.drv_phy_get_rate_para) + drv_phy_test_clear 0x00016b75 Thumb Code 16 drv_phy_common.o(i.drv_phy_test_clear) + drv_phy_test_lock 0x00016b85 Thumb Code 24 drv_phy_common.o(i.drv_phy_test_lock) + drv_phy_test_write_1_byte 0x00016b9d Thumb Code 32 drv_phy_common.o(i.drv_phy_test_write_1_byte) + drv_phy_test_write_2_byte 0x00016bbd Thumb Code 38 drv_phy_common.o(i.drv_phy_test_write_2_byte) + drv_phy_test_write_code 0x00016be3 Thumb Code 30 drv_phy_common.o(i.drv_phy_test_write_code) + drv_pwr_set_cp_mode 0x00016c21 Thumb Code 26 drv_pwr.o(i.drv_pwr_set_cp_mode) + drv_pwr_set_pvd_mode 0x00016c41 Thumb Code 18 drv_pwr.o(i.drv_pwr_set_pvd_mode) + drv_pwr_set_system_clk_src 0x00016c59 Thumb Code 36 drv_pwr.o(i.drv_pwr_set_system_clk_src) + drv_rxbr_clear_pkt_buffer 0x00016ccf Thumb Code 10 drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) + drv_rxbr_clear_status0 0x00016cd9 Thumb Code 4 drv_rxbr.o(i.drv_rxbr_clear_status0) + drv_rxbr_enable_irq 0x00016cdd Thumb Code 90 drv_rxbr.o(i.drv_rxbr_enable_irq) + drv_rxbr_frame_drop_cfg 0x00016d39 Thumb Code 16 drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) + drv_rxbr_get_clk 0x00016d4d Thumb Code 44 drv_rxbr.o(i.drv_rxbr_get_clk) + drv_rxbr_get_col_addr 0x00016d89 Thumb Code 4 drv_rxbr.o(i.drv_rxbr_get_col_addr) + drv_rxbr_get_page_addr 0x00016d9f Thumb Code 4 drv_rxbr.o(i.drv_rxbr_get_page_addr) + drv_rxbr_hline_rcv0_cfg 0x00016db5 Thumb Code 12 drv_rxbr.o(i.drv_rxbr_hline_rcv0_cfg) + drv_rxbr_hline_rcv_cfg 0x00016dc1 Thumb Code 8 drv_rxbr.o(i.drv_rxbr_hline_rcv_cfg) + drv_rxbr_register_irq0_callback 0x00016dc9 Thumb Code 6 drv_rxbr.o(i.drv_rxbr_register_irq0_callback) + drv_rxbr_register_irq1_callback 0x00016dd5 Thumb Code 6 drv_rxbr.o(i.drv_rxbr_register_irq1_callback) + drv_rxbr_set_ack_pkt_header 0x00016de1 Thumb Code 20 drv_rxbr.o(i.drv_rxbr_set_ack_pkt_header) + drv_rxbr_set_cmd_filter 0x00016df5 Thumb Code 204 drv_rxbr.o(i.drv_rxbr_set_cmd_filter) + drv_rxbr_set_color_format 0x00016ec1 Thumb Code 20 drv_rxbr.o(i.drv_rxbr_set_color_format) + drv_rxbr_set_inten 0x00016ed5 Thumb Code 20 drv_rxbr.o(i.drv_rxbr_set_inten) + drv_rxbr_set_ltpo_drop_th 0x00016ee9 Thumb Code 16 drv_rxbr.o(i.drv_rxbr_set_ltpo_drop_th) + drv_rxbr_set_usr_cfg 0x00016ef9 Thumb Code 38 drv_rxbr.o(i.drv_rxbr_set_usr_cfg) + drv_rxbr_set_usr_col 0x00016f1f Thumb Code 8 drv_rxbr.o(i.drv_rxbr_set_usr_col) + drv_rxbr_set_usr_row 0x00016f27 Thumb Code 8 drv_rxbr.o(i.drv_rxbr_set_usr_row) + drv_spi_m_read_data 0x00016f31 Thumb Code 28 drv_spi_master.o(i.drv_spi_m_read_data) + drv_swire_set_int 0x00016f51 Thumb Code 64 drv_swire.o(i.drv_swire_set_int) + drv_sys_cfg_clear_all_int 0x00016f99 Thumb Code 8 drv_sys_cfg.o(i.drv_sys_cfg_clear_all_int) + drv_sys_cfg_clear_pending 0x00016fa5 Thumb Code 32 drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) + drv_sys_cfg_sel_ap_rst_lvl_trig 0x00016fcd Thumb Code 18 drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_lvl_trig) + drv_sys_cfg_sel_ap_rst_trig 0x00016fe5 Thumb Code 22 drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) + drv_sys_cfg_sel_gpio_group 0x00017001 Thumb Code 30 drv_sys_cfg.o(i.drv_sys_cfg_sel_gpio_group) + drv_sys_cfg_sel_int_trig 0x00017025 Thumb Code 30 drv_sys_cfg.o(i.drv_sys_cfg_sel_int_trig) + drv_sys_cfg_set_dma_rx_req 0x00017049 Thumb Code 10 drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) + drv_sys_cfg_set_dma_tx_req 0x00017059 Thumb Code 10 drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) + drv_sys_cfg_set_int 0x00017069 Thumb Code 30 drv_sys_cfg.o(i.drv_sys_cfg_set_int) + drv_timer_clear_status_flags 0x0001708d Thumb Code 26 drv_timer.o(i.drv_timer_clear_status_flags) + drv_timer_enable 0x000170a7 Thumb Code 32 drv_timer.o(i.drv_timer_enable) + drv_timer_get_instance 0x000170c9 Thumb Code 10 drv_timer.o(i.drv_timer_get_instance) + drv_timer_get_prescaler 0x000170d9 Thumb Code 14 drv_timer.o(i.drv_timer_get_prescaler) + drv_timer_register_callback 0x0001712d Thumb Code 14 drv_timer.o(i.drv_timer_register_callback) + drv_timer_set_current_count 0x00017141 Thumb Code 12 drv_timer.o(i.drv_timer_set_current_count) + drv_timer_set_int 0x0001714d Thumb Code 68 drv_timer.o(i.drv_timer_set_int) + drv_timer_set_match 0x00017195 Thumb Code 12 drv_timer.o(i.drv_timer_set_match) + drv_timer_set_prescaler 0x000171a1 Thumb Code 22 drv_timer.o(i.drv_timer_set_prescaler) + drv_tx_phy_test_enter 0x000171c1 Thumb Code 28 drv_dsi_tx.o(i.drv_tx_phy_test_enter) + drv_tx_phy_test_exit 0x000171dd Thumb Code 28 drv_dsi_tx.o(i.drv_tx_phy_test_exit) + drv_vidc_clear_irq 0x0001722f Thumb Code 8 drv_vidc.o(i.drv_vidc_clear_irq) + drv_vidc_enable 0x00017237 Thumb Code 24 drv_vidc.o(i.drv_vidc_enable) + drv_vidc_enable_irq 0x00017251 Thumb Code 58 drv_vidc.o(i.drv_vidc_enable_irq) + drv_vidc_get_irq_status 0x00017291 Thumb Code 18 drv_vidc.o(i.drv_vidc_get_irq_status) + drv_vidc_init_module_enable 0x000172a5 Thumb Code 36 drv_vidc.o(i.drv_vidc_init_module_enable) + drv_vidc_register_callback 0x000172cd Thumb Code 6 drv_vidc.o(i.drv_vidc_register_callback) + drv_vidc_reset 0x000172d9 Thumb Code 6 drv_vidc.o(i.drv_vidc_reset) + drv_vidc_set_dst_parameter 0x000172df Thumb Code 60 drv_vidc.o(i.drv_vidc_set_dst_parameter) + drv_vidc_set_irqen 0x0001731b Thumb Code 20 drv_vidc.o(i.drv_vidc_set_irqen) + drv_vidc_set_mirror 0x0001732f Thumb Code 16 drv_vidc.o(i.drv_vidc_set_mirror) + drv_vidc_set_p2r_hcoef0 0x0001733f Thumb Code 8 drv_vidc.o(i.drv_vidc_set_p2r_hcoef0) + drv_vidc_set_p2r_hinitb 0x00017347 Thumb Code 38 drv_vidc.o(i.drv_vidc_set_p2r_hinitb) + drv_vidc_set_p2r_hinitr 0x0001736d Thumb Code 38 drv_vidc.o(i.drv_vidc_set_p2r_hinitr) + drv_vidc_set_pentile_swap 0x00017395 Thumb Code 18 drv_vidc.o(i.drv_vidc_set_pentile_swap) + drv_vidc_set_pu_ctrl 0x000173ad Thumb Code 10 drv_vidc.o(i.drv_vidc_set_pu_ctrl) + drv_vidc_set_rotation 0x000173b7 Thumb Code 16 drv_vidc.o(i.drv_vidc_set_rotation) + drv_vidc_set_scld_hcoef0 0x000173c7 Thumb Code 10 drv_vidc.o(i.drv_vidc_set_scld_hcoef0) + drv_vidc_set_scld_hcoef1 0x000173d1 Thumb Code 10 drv_vidc.o(i.drv_vidc_set_scld_hcoef1) + drv_vidc_set_scld_step 0x000173db Thumb Code 18 drv_vidc.o(i.drv_vidc_set_scld_step) + drv_vidc_set_scld_vcoef0 0x000173ed Thumb Code 10 drv_vidc.o(i.drv_vidc_set_scld_vcoef0) + drv_vidc_set_scld_vcoef1 0x000173f7 Thumb Code 10 drv_vidc.o(i.drv_vidc_set_scld_vcoef1) + drv_vidc_set_src_parameter 0x00017401 Thumb Code 22 drv_vidc.o(i.drv_vidc_set_src_parameter) + drv_wdg_clear_counter 0x00017419 Thumb Code 12 drv_wdg.o(i.drv_wdg_clear_counter) + drv_wdg_set_int 0x00017449 Thumb Code 48 drv_wdg.o(i.drv_wdg_set_int) + fls_clr_interrupt_flag 0x0001747d Thumb Code 10 drv_fls.o(i.fls_clr_interrupt_flag) + fputc 0x00017487 Thumb Code 20 tau_log.o(i.fputc) + hal_dsi_rx_ctrl_create_handle 0x0001749d Thumb Code 42 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) + hal_dsi_rx_ctrl_deinit 0x000174cd Thumb Code 148 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) + hal_dsi_rx_ctrl_dsc_async_handler 0x00017569 Thumb Code 120 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) + hal_dsi_rx_ctrl_gen_a_tear_signal 0x000175ed Thumb Code 32 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) + hal_dsi_rx_ctrl_get_max_ret_size 0x00017615 Thumb Code 30 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) + hal_dsi_rx_ctrl_init 0x0001763d Thumb Code 144 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) + hal_dsi_rx_ctrl_pre_init_pps 0x00017d71 Thumb Code 56 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_pre_init_pps) + hal_dsi_rx_ctrl_send_ack_cmd 0x00017dad Thumb Code 212 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) + hal_dsi_rx_ctrl_set_cus_esc_clk 0x00017e9d Thumb Code 34 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) + hal_dsi_rx_ctrl_set_cus_scld_filter 0x00017ec9 Thumb Code 98 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) + hal_dsi_rx_ctrl_set_cus_sync_line 0x00017f35 Thumb Code 44 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) + hal_dsi_rx_ctrl_set_sw_tear_mode 0x00018015 Thumb Code 42 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) + hal_dsi_rx_ctrl_set_tear_mode_ex 0x00018049 Thumb Code 14 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_tear_mode_ex) + hal_dsi_rx_ctrl_start 0x00018059 Thumb Code 46 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) + hal_dsi_rx_ctrl_stop 0x00018095 Thumb Code 46 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) + hal_dsi_rx_ctrl_toggle_resolution 0x000180d1 Thumb Code 28 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) + hal_dsi_tx_ctrl_create_handle 0x00018785 Thumb Code 34 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) + hal_dsi_tx_ctrl_deinit 0x000187b1 Thumb Code 68 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) + hal_dsi_tx_ctrl_enter_init_panel_mode 0x000187f9 Thumb Code 68 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) + hal_dsi_tx_ctrl_exit_init_panel_mode 0x00018845 Thumb Code 32 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) + hal_dsi_tx_ctrl_init 0x0001886d Thumb Code 188 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) + hal_dsi_tx_ctrl_panel_reset_pin 0x00018955 Thumb Code 12 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_panel_reset_pin) + hal_dsi_tx_ctrl_set_ccm 0x00018961 Thumb Code 28 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) + hal_dsi_tx_ctrl_set_overwrite_rgb 0x00018981 Thumb Code 16 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) + hal_dsi_tx_ctrl_set_partial_disp 0x00018995 Thumb Code 12 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp) + hal_dsi_tx_ctrl_set_partial_disp_area 0x000189a5 Thumb Code 30 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp_area) + hal_dsi_tx_ctrl_start 0x000189c9 Thumb Code 94 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) + hal_dsi_tx_ctrl_stop 0x00018a35 Thumb Code 54 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) + hal_dsi_tx_ctrl_write_array_cmd 0x00018a79 Thumb Code 210 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) + hal_dsi_tx_ctrl_write_cmd 0x00018b51 Thumb Code 172 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) + hal_gpio_ctrl_eint 0x00018de5 Thumb Code 18 hal_gpio.o(i.hal_gpio_ctrl_eint) + hal_gpio_get_input_data 0x00018dfd Thumb Code 18 hal_gpio.o(i.hal_gpio_get_input_data) + hal_gpio_init_eint 0x00018e11 Thumb Code 58 hal_gpio.o(i.hal_gpio_init_eint) + hal_gpio_init_input 0x00018e51 Thumb Code 28 hal_gpio.o(i.hal_gpio_init_input) + hal_gpio_init_output 0x00018e71 Thumb Code 34 hal_gpio.o(i.hal_gpio_init_output) + hal_gpio_reg_eint_cb 0x00018e99 Thumb Code 20 hal_gpio.o(i.hal_gpio_reg_eint_cb) + hal_gpio_set_ap_reset_int 0x00018eb1 Thumb Code 76 hal_gpio.o(i.hal_gpio_set_ap_reset_int) + hal_gpio_set_mode 0x00018f01 Thumb Code 90 hal_gpio.o(i.hal_gpio_set_mode) + hal_gpio_set_output_data 0x00018f61 Thumb Code 8 hal_gpio.o(i.hal_gpio_set_output_data) + hal_gpio_set_pull_state 0x00018f69 Thumb Code 26 hal_gpio.o(i.hal_gpio_set_pull_state) + hal_i2c_m_dma_init 0x00018f89 Thumb Code 92 hal_i2c_master.o(i.hal_i2c_m_dma_init) + hal_i2c_m_dma_read 0x00018ff5 Thumb Code 26 hal_i2c_master.o(i.hal_i2c_m_dma_read) + hal_i2c_m_dma_write 0x00019015 Thumb Code 24 hal_i2c_master.o(i.hal_i2c_m_dma_write) + hal_i2c_m_transfer_complate 0x00019031 Thumb Code 6 hal_i2c_master.o(i.hal_i2c_m_transfer_complate) + hal_i2c_s_dma_write 0x0001906d Thumb Code 46 hal_i2c_slave.o(i.hal_i2c_s_dma_write) + hal_i2c_s_init 0x000190a5 Thumb Code 86 hal_i2c_slave.o(i.hal_i2c_s_init) + hal_i2c_s_nonblocking_read 0x00019111 Thumb Code 14 hal_i2c_slave.o(i.hal_i2c_s_nonblocking_read) + hal_i2c_s_set_transfer 0x00019125 Thumb Code 6 hal_i2c_slave.o(i.hal_i2c_s_set_transfer) + hal_internal_init_memc 0x0001927d Thumb Code 146 hal_internal_vsync.o(i.hal_internal_init_memc) + hal_internal_sync_get_fb_setting 0x00019361 Thumb Code 12 hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) + hal_internal_sync_input_resolution_change 0x00019371 Thumb Code 418 hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) + hal_internal_vsync_deinit 0x00019585 Thumb Code 24 hal_internal_vsync.o(i.hal_internal_vsync_deinit) + hal_internal_vsync_get_rx_state 0x000195a1 Thumb Code 6 hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) + hal_internal_vsync_get_sync_line 0x000195ad Thumb Code 18 hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) + hal_internal_vsync_get_tx_state 0x000195c5 Thumb Code 6 hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) + hal_internal_vsync_init_rx 0x000195d1 Thumb Code 220 hal_internal_vsync.o(i.hal_internal_vsync_init_rx) + hal_internal_vsync_init_tx 0x000196cd Thumb Code 172 hal_internal_vsync.o(i.hal_internal_vsync_init_tx) + hal_internal_vsync_set_auto_hw_filter 0x0001977d Thumb Code 222 hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) + hal_internal_vsync_set_rx_state 0x00019899 Thumb Code 16 hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) + hal_internal_vsync_set_sync_line 0x000198ad Thumb Code 22 hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) + hal_internal_vsync_set_tear_mode 0x000198c9 Thumb Code 64 hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) + hal_internal_vsync_set_tx_state 0x00019911 Thumb Code 54 hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) + hal_spi_m_clear_rxfifo 0x00019d35 Thumb Code 14 hal_spi_master.o(i.hal_spi_m_clear_rxfifo) + hal_system_enable_systick 0x00019d43 Thumb Code 8 hal_system.o(i.hal_system_enable_systick) + hal_system_init 0x00019d4d Thumb Code 104 hal_system.o(i.hal_system_init) + hal_system_init_console 0x00019dd5 Thumb Code 28 hal_system.o(i.hal_system_init_console) + hal_system_set_phy_calibration 0x00019df1 Thumb Code 8 hal_system.o(i.hal_system_set_phy_calibration) + hal_system_set_pvd 0x00019df9 Thumb Code 8 hal_system.o(i.hal_system_set_pvd) + hal_system_set_vcc 0x00019e01 Thumb Code 8 hal_system.o(i.hal_system_set_vcc) + hal_timer_init 0x00019e09 Thumb Code 26 hal_timer.o(i.hal_timer_init) + hal_timer_start 0x00019e25 Thumb Code 74 hal_timer.o(i.hal_timer_start) + hal_uart_init 0x00019e75 Thumb Code 126 hal_uart.o(i.hal_uart_init) + hal_uart_transmit_blocking 0x00019f01 Thumb Code 12 hal_uart.o(i.hal_uart_transmit_blocking) + handle_init 0x00019f11 Thumb Code 140 irq_redirect .o(i.handle_init) + main 0x0001a129 Thumb Code 10 main.o(i.main) + sqrt 0x0001accd Thumb Code 66 sqrt.o(i.sqrt) + tp_heartbeat_exec 0x0001ad15 Thumb Code 60 ap_demo.o(i.tp_heartbeat_exec) + panel_init_code 0x0001b13c Data 9164 ap_demo.o(.constdata) + wCRCTalbeAbs 0x0001d588 Data 32 app_tp_st_touch.o(.constdata) + phone_data_21 0x0001d67a Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_55 0x0001d67b Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_85_00 0x0001d67c Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_F5_1 0x0001d67d Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_F5_2 0x0001d67e Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_F5_3 0x0001d67f Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_F5_4 0x0001d680 Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_30 0x0001d681 Data 2 app_tp_for_custom_s8.o(.constdata) + phone_data_92_F0 0x0001d683 Data 2 app_tp_for_custom_s8.o(.constdata) + phone_data_52 0x0001d685 Data 3 app_tp_for_custom_s8.o(.constdata) + phone_data_92_15 0x0001d688 Data 4 app_tp_for_custom_s8.o(.constdata) + phone_data_A3 0x0001d68c Data 4 app_tp_for_custom_s8.o(.constdata) + phone_data_A4 0x0001d690 Data 4 app_tp_for_custom_s8.o(.constdata) + phone_data_A5 0x0001d694 Data 4 app_tp_for_custom_s8.o(.constdata) + phone_data_AF 0x0001d698 Data 4 app_tp_for_custom_s8.o(.constdata) + phone_data_F1 0x0001d69c Data 4 app_tp_for_custom_s8.o(.constdata) + phone_data_22 0x0001d6a0 Data 5 app_tp_for_custom_s8.o(.constdata) + phone_data_92_0A 0x0001d6a5 Data 6 app_tp_for_custom_s8.o(.constdata) + phone_data_F6_1 0x0001d6ab Data 6 app_tp_for_custom_s8.o(.constdata) + phone_data_F6_2 0x0001d6b1 Data 6 app_tp_for_custom_s8.o(.constdata) + phone_data_F6_3 0x0001d6b7 Data 6 app_tp_for_custom_s8.o(.constdata) + phone_data_F6_4 0x0001d6bd Data 6 app_tp_for_custom_s8.o(.constdata) + phone_data_60_1 0x0001d6c3 Data 16 app_tp_for_custom_s8.o(.constdata) + phone_data_23 0x0001d6d3 Data 11 app_tp_for_custom_s8.o(.constdata) + phone_data_85_02 0x0001d6de Data 28 app_tp_for_custom_s8.o(.constdata) + phone_data_85_20 0x0001d6fa Data 28 app_tp_for_custom_s8.o(.constdata) + phone_data_90 0x0001d716 Data 10 app_tp_for_custom_s8.o(.constdata) + phone_data_72_03 0x0001d720 Data 1120 app_tp_for_custom_s8.o(.constdata) + phone_data_75_7401_7D01 0x0001db80 Data 568 app_tp_for_custom_s8.o(.constdata) + phone_data_75_7401_7D02 0x0001ddb8 Data 568 app_tp_for_custom_s8.o(.constdata) + phone_data_75_7401_7D03 0x0001dff0 Data 568 app_tp_for_custom_s8.o(.constdata) + phone_data_75_7403_7D01 0x0001e228 Data 568 app_tp_for_custom_s8.o(.constdata) + phone_data_75_7403_7D03 0x0001e460 Data 568 app_tp_for_custom_s8.o(.constdata) + phone_data_75_7D05 0x0001e698 Data 568 app_tp_for_custom_s8.o(.constdata) + phone_data_75_00 0x0001e8d0 Data 288 app_tp_for_custom_s8.o(.constdata) + phone_data_75_FF 0x0001e9f0 Data 288 app_tp_for_custom_s8.o(.constdata) + sleep_on 0x0001eb10 Data 16 app_tp_for_custom_s8.o(.constdata) + screen_reg_start_data_size 0x0001eb20 Data 1 app_tp_for_custom_s8.o(.constdata) + Region$$Table$$Base 0x0001ee30 Number 0 anon$$obj.o(Region$$Table) + Region$$Table$$Limit 0x0001ee60 Number 0 anon$$obj.o(Region$$Table) + g_fun_handle 0x00070100 Data 192 irq_redirect .o(.ARM.__AT_0x00070100) + phone_start_flag 0x000701d5 Data 1 ap_demo.o(.data) + phone_DisplayOFF_flag 0x000701d6 Data 1 ap_demo.o(.data) + panel_mode 0x000701d7 Data 1 ap_demo.o(.data) + phone_DisplayOFF_count 0x000701e4 Data 2 ap_demo.o(.data) + panel_r 0x000701e6 Data 2 ap_demo.o(.data) + panel_g 0x000701e8 Data 2 ap_demo.o(.data) + panel_b 0x000701ea Data 2 ap_demo.o(.data) + s_heartbeat 0x000701f4 Data 4 ap_demo.o(.data) + rx_filter_1080_h_4_96 0x000701fc Data 256 ap_demo.o(.data) + rx_filter_2400_v_4_96 0x000702fc Data 256 ap_demo.o(.data) + s_screen_init_complate 0x00070400 Data 1 app_tp_transfer.o(.data) + MI10_PRO_screen_init_data1 0x00070404 Data 3 app_tp_transfer.o(.data) + MI10_PRO_screen_init_data3 0x00070407 Data 3 app_tp_transfer.o(.data) + MI10_PRO_screen_init_data4 0x0007040a Data 3 app_tp_transfer.o(.data) + MI10_PRO_screen_init_data2 0x0007040d Data 6 app_tp_transfer.o(.data) + st_touch_init_sensor_off 0x00070415 Data 3 app_tp_st_touch.o(.data) + st_touch_init_sensor_on 0x00070418 Data 3 app_tp_st_touch.o(.data) + st_touch_tp_tuning_reset 0x0007041b Data 3 app_tp_st_touch.o(.data) + st_touch_tp_tuning_FpnlInit 0x0007041e Data 3 app_tp_st_touch.o(.data) + st_touch_tp_tuning_PnlInit 0x00070421 Data 3 app_tp_st_touch.o(.data) + st_touch_tp_tuning_SvCfg 0x00070424 Data 3 app_tp_st_touch.o(.data) + st_touch_tp_tuning_SvCx 0x00070427 Data 3 app_tp_st_touch.o(.data) + st_touch_tp_tuning_SvPnl 0x0007042a Data 3 app_tp_st_touch.o(.data) + st_touch_tp_tuning_clearfifo 0x0007042d Data 3 app_tp_st_touch.o(.data) + st_touch_tp_tuning_clkreset 0x00070430 Data 3 app_tp_st_touch.o(.data) + st_touch_tp_tuning_TuneM 0x00070433 Data 4 app_tp_st_touch.o(.data) + st_touch_tp_tuning_TuneS 0x00070437 Data 4 app_tp_st_touch.o(.data) + phone_data_E4 0x00070464 Data 1 app_tp_for_custom_s8.o(.data) + tp_flag 0x00070465 Data 1 app_tp_for_custom_s8.o(.data) + g_phone_output_int_pad 0x00070466 Data 1 app_tp_for_custom_s8.o(.data) + tp_sleep_in 0x00070467 Data 1 app_tp_for_custom_s8.o(.data) + tp_sleep_count 0x00070468 Data 1 app_tp_for_custom_s8.o(.data) + sleep_double_EN 0x00070469 Data 1 app_tp_for_custom_s8.o(.data) + Flag_EA_EN 0x0007046a Data 1 app_tp_for_custom_s8.o(.data) + Flag_touch_count 0x0007046b Data 1 app_tp_for_custom_s8.o(.data) + touchnum_bak 0x0007046c Data 1 app_tp_for_custom_s8.o(.data) + Flag_blacklight_EN 0x0007046d Data 1 app_tp_for_custom_s8.o(.data) + phone_data_B1 0x00070476 Data 2 app_tp_for_custom_s8.o(.data) + phone_reg_coord_back 0x00070480 Data 200 app_tp_for_custom_s8.o(.data) + g_screen_input_rst_pad 0x00070548 Data 1 app_tp_for_custom_s8.o(.data) + g_screen_input_int_pad 0x00070549 Data 1 app_tp_for_custom_s8.o(.data) + screen_data_write_1 0x0007054a Data 1 app_tp_for_custom_s8.o(.data) + screen_data_write_2 0x0007054b Data 3 app_tp_for_custom_s8.o(.data) + screen_data_write_3 0x0007054e Data 5 app_tp_for_custom_s8.o(.data) + screen_reg_int_data 0x00070554 Data 48 app_tp_for_custom_s8.o(.data) + g_fls_w_cmd 0x00070584 Data 1 norflash.o(.data) + g_fls_r_cmd 0x00070585 Data 1 norflash.o(.data) + g_fls_write_en_status 0x00070586 Data 1 norflash.o(.data) + isFlsTransferEnd 0x00070587 Data 1 norflash.o(.data) + isFlsFifoReq 0x00070588 Data 1 norflash.o(.data) + isNandWriteCompleted 0x00070589 Data 1 norflash.o(.data) + isNandReadCompleted 0x0007058a Data 1 norflash.o(.data) + g_fls_error_info 0x00070590 Data 6 norflash.o(.data) + g_systick_cb_func 0x0007059c Data 4 drv_common.o(.data) + g_system_clock 0x000705a0 Data 4 drv_common.o(.data) + tx_byte_num 0x000705b8 Data 4 drv_i2c_slave.o(.data) + g_scld_fhd_filter_h 0x000705bc Data 256 drv_param_init.o(.data) + g_scld_fhd_filter_v 0x000706bc Data 256 drv_param_init.o(.data) + g_scld_hd_filter_h 0x000707bc Data 256 drv_param_init.o(.data) + g_scld_hd_filter_v 0x000708bc Data 256 drv_param_init.o(.data) + g_sclu_lanczos_filter 0x000709bc Data 128 drv_param_init.o(.data) + g_ccm_setting 0x00070a3c Data 36 drv_param_init.o(.data) + g_int_rxbr_irq0_cb_func 0x00070abc Data 4 drv_rxbr.o(.data) + g_int_rxbr_irq1_cb_func 0x00070ac0 Data 4 drv_rxbr.o(.data) + g_int_vidc_cb_func 0x00070ac4 Data 4 drv_vidc.o(.data) + __stdout 0x00070b00 Data 4 stdout.o(.data) + tp_scan_data 0x00070c98 Data 12 app_tp_st_touch.o(.bss) + string 0x00070dac Data 256 tau_log.o(.bss) + hal_dmahandle 0x00070eac Data 160 hal_uart.o(.bss) + hal_uarthandle_dma 0x00070f4c Data 32 hal_uart.o(.bss) + hal_uart_handle_global 0x00070f6c Data 16 hal_uart.o(.bss) + g_vsync_hande 0x00071118 Data 56 hal_internal_vsync.o(.bss) + g_dcs_execute_table 0x00071150 Data 2048 hal_internal_vsync.o(.bss) + g_packet_fifo 0x00071a70 Data 4144 dcs_packet_fifo.o(.bss) + g_spis_ctrl_handle 0x00072aa0 Data 32 hal_spi_slave.o(.bss) + __stack_limit 0x00072ac0 Data 0 startup_armcm0.o(STACK) + __initial_sp 0x00073ac0 Data 0 startup_armcm0.o(STACK) + + + +============================================================================== + +Memory Map of the image + + Image Entry point : 0x000100c1 + + Load Region LR_IROM2 (Base: 0x00010000, Size: 0x0000f798, Max: 0x00010000, ABSOLUTE, COMPRESSED[0x0000f3b4]) + + Execution Region ER_IROM2 (Exec base: 0x00010000, Load base: 0x00010000, Size: 0x0000ee60, Max: 0x00010000, ABSOLUTE) + + Exec Addr Load Addr Size Type Attr Idx E Section Name Object + + 0x00010000 0x00010000 0x000000c0 Data RO 526 RESET startup_armcm0.o + 0x000100c0 0x000100c0 0x00000000 Code RO 2633 * .ARM.Collect$$$$00000000 mc_p.l(entry.o) + 0x000100c0 0x000100c0 0x00000004 Code RO 2943 .ARM.Collect$$$$00000001 mc_p.l(entry2.o) + 0x000100c4 0x000100c4 0x00000004 Code RO 2946 .ARM.Collect$$$$00000004 mc_p.l(entry5.o) + 0x000100c8 0x000100c8 0x00000000 Code RO 2948 .ARM.Collect$$$$00000008 mc_p.l(entry7b.o) + 0x000100c8 0x000100c8 0x00000000 Code RO 2950 .ARM.Collect$$$$0000000A mc_p.l(entry8b.o) + 0x000100c8 0x000100c8 0x00000008 Code RO 2951 .ARM.Collect$$$$0000000B mc_p.l(entry9a.o) + 0x000100d0 0x000100d0 0x00000000 Code RO 2953 .ARM.Collect$$$$0000000D mc_p.l(entry10a.o) + 0x000100d0 0x000100d0 0x00000000 Code RO 2955 .ARM.Collect$$$$0000000F mc_p.l(entry11a.o) + 0x000100d0 0x000100d0 0x00000004 Code RO 2944 .ARM.Collect$$$$00002712 mc_p.l(entry2.o) + 0x000100d4 0x000100d4 0x00000078 Code RO 527 .text startup_armcm0.o + 0x0001014c 0x0001014c 0x0000002c Code RO 2636 .text mc_p.l(uidiv.o) + 0x00010178 0x00010178 0x00000028 Code RO 2638 .text mc_p.l(idiv.o) + 0x000101a0 0x000101a0 0x00000024 Code RO 2640 .text mc_p.l(memcpya.o) + 0x000101c4 0x000101c4 0x00000024 Code RO 2642 .text mc_p.l(memseta.o) + 0x000101e8 0x000101e8 0x000000b2 Code RO 2907 .text mf_p.l(fadd.o) + 0x0001029a 0x0001029a 0x0000007a Code RO 2909 .text mf_p.l(fmul.o) + 0x00010314 0x00010314 0x0000007c Code RO 2911 .text mf_p.l(fdiv.o) + 0x00010390 0x00010390 0x00000018 Code RO 2913 .text mf_p.l(fscalb.o) + 0x000103a8 0x000103a8 0x00000164 Code RO 2915 .text mf_p.l(dadd.o) + 0x0001050c 0x0001050c 0x000000d0 Code RO 2917 .text mf_p.l(dmul.o) + 0x000105dc 0x000105dc 0x000000f0 Code RO 2919 .text mf_p.l(ddiv.o) + 0x000106cc 0x000106cc 0x00000016 Code RO 2921 .text mf_p.l(fflti.o) + 0x000106e2 0x000106e2 0x0000000e Code RO 2923 .text mf_p.l(ffltui.o) + 0x000106f0 0x000106f0 0x0000001c Code RO 2927 .text mf_p.l(dfltui.o) + 0x0001070c 0x0001070c 0x00000032 Code RO 2929 .text mf_p.l(ffixi.o) + 0x0001073e 0x0001073e 0x00000028 Code RO 2931 .text mf_p.l(ffixui.o) + 0x00010766 0x00010766 0x00000002 PAD + 0x00010768 0x00010768 0x00000048 Code RO 2933 .text mf_p.l(dfixi.o) + 0x000107b0 0x000107b0 0x0000003c Code RO 2935 .text mf_p.l(dfixui.o) + 0x000107ec 0x000107ec 0x00000028 Code RO 2937 .text mf_p.l(f2d.o) + 0x00010814 0x00010814 0x00000028 Code RO 2939 .text mf_p.l(cdcmple.o) + 0x0001083c 0x0001083c 0x00000014 Code RO 2941 .text mf_p.l(cfrcmple.o) + 0x00010850 0x00010850 0x00000060 Code RO 2958 .text mc_p.l(uldiv.o) + 0x000108b0 0x000108b0 0x00000020 Code RO 2960 .text mc_p.l(llshl.o) + 0x000108d0 0x000108d0 0x00000022 Code RO 2962 .text mc_p.l(llushr.o) + 0x000108f2 0x000108f2 0x00000026 Code RO 2964 .text mc_p.l(llsshr.o) + 0x00010918 0x00010918 0x00000000 Code RO 2973 .text mc_p.l(iusefp.o) + 0x00010918 0x00010918 0x00000082 Code RO 2974 .text mf_p.l(fepilogue.o) + 0x0001099a 0x0001099a 0x000000be Code RO 2976 .text mf_p.l(depilogue.o) + 0x00010a58 0x00010a58 0x000000a2 Code RO 2980 .text mf_p.l(dsqrt.o) + 0x00010afa 0x00010afa 0x00000002 PAD + 0x00010afc 0x00010afc 0x00000040 Code RO 2982 .text mf_p.l(dfixul.o) + 0x00010b3c 0x00010b3c 0x00000028 Code RO 2984 .text mf_p.l(cdrcmple.o) + 0x00010b64 0x00010b64 0x00000024 Code RO 2986 .text mc_p.l(init.o) + 0x00010b88 0x00010b88 0x00000056 Code RO 2996 .text mc_p.l(__dczerorl2.o) + 0x00010bde 0x00010bde 0x00000002 PAD + 0x00010be0 0x00010be0 0x00000018 Code RO 2209 i.ADC_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010bf8 0x00010bf8 0x00000018 Code RO 2210 i.AP_NRESET_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010c10 0x00010c10 0x00000040 Code RO 403 i.CRC16_2 app_tp_st_touch.o + 0x00010c50 0x00010c50 0x00000014 Code RO 2211 i.DMA_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010c64 0x00010c64 0x0000001c Code RO 2212 i.EXTI_INT0_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010c80 0x00010c80 0x0000001c Code RO 2213 i.EXTI_INT1_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010c9c 0x00010c9c 0x0000001c Code RO 2214 i.EXTI_INT2_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010cb8 0x00010cb8 0x0000001c Code RO 2215 i.EXTI_INT3_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010cd4 0x00010cd4 0x0000001c Code RO 2216 i.EXTI_INT4_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010cf0 0x00010cf0 0x0000001c Code RO 2217 i.EXTI_INT5_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010d0c 0x00010d0c 0x0000001c Code RO 2218 i.EXTI_INT6_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010d28 0x00010d28 0x0000001c Code RO 2219 i.EXTI_INT7_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010d44 0x00010d44 0x00000014 Code RO 2220 i.FLSCTRL_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010d58 0x00010d58 0x0000004e Code RO 100 i.Gpio_swire_output ap_demo.o + 0x00010da6 0x00010da6 0x00000002 PAD + 0x00010da8 0x00010da8 0x00000014 Code RO 2221 i.HardFault_Handler CVWL568.lib(irq_redirect .o) + 0x00010dbc 0x00010dbc 0x00000018 Code RO 2222 i.I2C0_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010dd4 0x00010dd4 0x00000018 Code RO 2223 i.I2C1_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010dec 0x00010dec 0x00000018 Code RO 2224 i.LCDC_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010e04 0x00010e04 0x00000028 Code RO 890 i.LOG_printf CVWL568.lib(tau_log.o) + 0x00010e2c 0x00010e2c 0x00000018 Code RO 2225 i.MEMC_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010e44 0x00010e44 0x00000018 Code RO 2226 i.MIPI_RX_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010e5c 0x00010e5c 0x00000018 Code RO 2227 i.MIPI_TX_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010e74 0x00010e74 0x0000001c Code RO 2228 i.PWMDET_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010e90 0x00010e90 0x00000144 Code RO 252 i.S20_Start_init app_tp_transfer.o + 0x00010fd4 0x00010fd4 0x0000001c Code RO 2229 i.SPIM_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010ff0 0x00010ff0 0x00000002 Code RO 2493 i.UART_DisableDma CVWL568.lib(drv_uart.o) + 0x00010ff2 0x00010ff2 0x00000004 Code RO 2499 i.UART_GetInstance CVWL568.lib(drv_uart.o) + 0x00010ff6 0x00010ff6 0x00000002 Code RO 2991 i.__scatterload_null mc_p.l(handlers.o) + 0x00010ff8 0x00010ff8 0x00000008 Code RO 2517 i.app_UART_IRQn_Handler CVWL568.lib(drv_uart.o) + 0x00011000 0x00011000 0x00000014 Data RO 1142 .ARM.__at_0x11000 CVWL568.lib(drv_common.o) + 0x00011014 0x00011014 0x0000001c Code RO 2230 i.SPIS_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00011030 0x00011030 0x0000001c Code RO 2231 i.SWIRE_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x0001104c 0x0001104c 0x00000018 Code RO 2232 i.SysTick_Handler CVWL568.lib(irq_redirect .o) + 0x00011064 0x00011064 0x00000018 Code RO 2233 i.TIMER0_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x0001107c 0x0001107c 0x00000018 Code RO 2234 i.TIMER1_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00011094 0x00011094 0x00000018 Code RO 2235 i.TIMER2_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x000110ac 0x000110ac 0x00000018 Code RO 2236 i.TIMER3_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x000110c4 0x000110c4 0x0000001c Code RO 2489 i.UART0_IRQ_Handle CVWL568.lib(drv_uart.o) + 0x000110e0 0x000110e0 0x00000018 Code RO 2237 i.UART_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x000110f8 0x000110f8 0x00000024 Code RO 2507 i.UART_ResetRxFIFO CVWL568.lib(drv_uart.o) + 0x0001111c 0x0001111c 0x00000048 Code RO 2510 i.UART_SetBaudRate CVWL568.lib(drv_uart.o) + 0x00011164 0x00011164 0x0000001a Code RO 2511 i.UART_SwitchSCLK CVWL568.lib(drv_uart.o) + 0x0001117e 0x0001117e 0x00000134 Code RO 2513 i.UART_TransferHandleIRQ CVWL568.lib(drv_uart.o) + 0x000112b2 0x000112b2 0x0000001a Code RO 2515 i.UART_WriteBlocking CVWL568.lib(drv_uart.o) + 0x000112cc 0x000112cc 0x000000bc Code RO 2516 i.UART_init CVWL568.lib(drv_uart.o) + 0x00011388 0x00011388 0x00000018 Code RO 2238 i.VIDC_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x000113a0 0x000113a0 0x00000018 Code RO 2239 i.VPRE_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x000113b8 0x000113b8 0x00000018 Code RO 2240 i.WDG_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x000113d0 0x000113d0 0x00000020 Code RO 2879 i.__0printf mc_p.l(printfa.o) + 0x000113f0 0x000113f0 0x00000024 Code RO 2885 i.__0vsprintf mc_p.l(printfa.o) + 0x00011414 0x00011414 0x0000002e Code RO 2978 i.__ARM_clz mf_p.l(depilogue.o) + 0x00011442 0x00011442 0x0000001a Code RO 620 i.__ARM_common_switch8 CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x0001145c 0x0001145c 0x00000018 Code RO 1460 i.__NVIC_ClearPendingIRQ CVWL568.lib(drv_i2c_master.o) + 0x00011474 0x00011474 0x00000018 Code RO 1493 i.__NVIC_ClearPendingIRQ CVWL568.lib(drv_i2c_slave.o) + 0x0001148c 0x0001148c 0x00000018 Code RO 1588 i.__NVIC_ClearPendingIRQ CVWL568.lib(drv_spi_master.o) + 0x000114a4 0x000114a4 0x00000020 Code RO 2063 i.__NVIC_DisableIRQ CVWL568.lib(drv_rxbr.o) + 0x000114c4 0x000114c4 0x00000018 Code RO 2064 i.__NVIC_EnableIRQ CVWL568.lib(drv_rxbr.o) + 0x000114dc 0x000114dc 0x00000044 Code RO 2337 i.__NVIC_SetPriority CVWL568.lib(hal_spi_slave.o) + 0x00011520 0x00011520 0x0000000e Code RO 2990 i.__scatterload_copy mc_p.l(handlers.o) + 0x0001152e 0x0001152e 0x0000000e Code RO 2992 i.__scatterload_zeroinit mc_p.l(handlers.o) + 0x0001153c 0x0001153c 0x0000000c Code RO 2968 i.__set_errno mc_p.l(errno.o) + 0x00011548 0x00011548 0x00000174 Code RO 2886 i._fp_digits mc_p.l(printfa.o) + 0x000116bc 0x000116bc 0x000006ec Code RO 2887 i._printf_core mc_p.l(printfa.o) + 0x00011da8 0x00011da8 0x00000020 Code RO 2888 i._printf_post_padding mc_p.l(printfa.o) + 0x00011dc8 0x00011dc8 0x0000002c Code RO 2889 i._printf_pre_padding mc_p.l(printfa.o) + 0x00011df4 0x00011df4 0x0000000a Code RO 2891 i._sputc mc_p.l(printfa.o) + 0x00011dfe 0x00011dfe 0x00000002 PAD + 0x00011e00 0x00011e00 0x00000ff4 Code RO 101 i.ap_dcs_read ap_demo.o + 0x00012df4 0x00012df4 0x0000019c Code RO 102 i.ap_demo ap_demo.o + 0x00012f90 0x00012f90 0x0000008c Code RO 103 i.ap_get_reg_df ap_demo.o + 0x0001301c 0x0001301c 0x00000020 Code RO 404 i.ap_get_tp_calibration_status_01 app_tp_st_touch.o + 0x0001303c 0x0001303c 0x00000068 Code RO 104 i.ap_reset_cb ap_demo.o + 0x000130a4 0x000130a4 0x0000001c Code RO 105 i.ap_set_backlight_51 ap_demo.o + 0x000130c0 0x000130c0 0x00000044 Code RO 106 i.ap_set_display_off ap_demo.o + 0x00013104 0x00013104 0x00000038 Code RO 107 i.ap_set_display_on ap_demo.o + 0x0001313c 0x0001313c 0x0000007c Code RO 108 i.ap_set_enter_sleep_mode ap_demo.o + 0x000131b8 0x000131b8 0x00000070 Code RO 109 i.ap_set_exit_sleep_mode ap_demo.o + 0x00013228 0x00013228 0x00000098 Code RO 405 i.ap_set_tp_calibration_04 app_tp_st_touch.o + 0x000132c0 0x000132c0 0x000000b0 Code RO 406 i.ap_tp_st_touch_calibration app_tp_st_touch.o + 0x00013370 0x00013370 0x0000001a Code RO 407 i.ap_tp_st_touch_error_handler_F3 app_tp_st_touch.o + 0x0001338a 0x0001338a 0x00000020 Code RO 408 i.ap_tp_st_touch_error_handler_FF app_tp_st_touch.o + 0x000133aa 0x000133aa 0x00000002 PAD + 0x000133ac 0x000133ac 0x000000a8 Code RO 409 i.ap_tp_st_touch_get_calibration_success_mark app_tp_st_touch.o + 0x00013454 0x00013454 0x0000001c Code RO 411 i.ap_tp_st_touch_scan_point_init app_tp_st_touch.o + 0x00013470 0x00013470 0x00000094 Code RO 412 i.ap_tp_st_touch_scan_point_record_event app_tp_st_touch.o + 0x00013504 0x00013504 0x00000050 Code RO 413 i.ap_tp_st_touch_scan_point_record_event_exec app_tp_st_touch.o + 0x00013554 0x00013554 0x00000034 Code RO 414 i.ap_tp_st_touch_simulate_finger_release_event app_tp_st_touch.o + 0x00013588 0x00013588 0x000000ac Code RO 415 i.ap_tp_st_touch_software_reset app_tp_st_touch.o + 0x00013634 0x00013634 0x0000006c Code RO 110 i.ap_update_frame_rate ap_demo.o + 0x000136a0 0x000136a0 0x0000001c Code RO 2065 i.app_ADC_IRQn_Handler CVWL568.lib(drv_rxbr.o) + 0x000136bc 0x000136bc 0x00000024 Code RO 1384 i.app_AP_NRESET_IRQn_Handler CVWL568.lib(drv_gpio.o) + 0x000136e0 0x000136e0 0x0000001c Code RO 1385 i.app_EXTI_INT0_IRQn_Handler CVWL568.lib(drv_gpio.o) + 0x000136fc 0x000136fc 0x0000001c Code RO 1386 i.app_EXTI_INT1_IRQn_Handler CVWL568.lib(drv_gpio.o) + 0x00013718 0x00013718 0x0000001c Code RO 1387 i.app_EXTI_INT2_IRQn_Handler CVWL568.lib(drv_gpio.o) + 0x00013734 0x00013734 0x0000001c Code RO 1388 i.app_EXTI_INT3_IRQn_Handler CVWL568.lib(drv_gpio.o) + 0x00013750 0x00013750 0x0000001c Code RO 1389 i.app_EXTI_INT4_IRQn_Handler CVWL568.lib(drv_gpio.o) + 0x0001376c 0x0001376c 0x0000001c Code RO 1390 i.app_EXTI_INT5_IRQn_Handler CVWL568.lib(drv_gpio.o) + 0x00013788 0x00013788 0x0000001c Code RO 1391 i.app_EXTI_INT6_IRQn_Handler CVWL568.lib(drv_gpio.o) + 0x000137a4 0x000137a4 0x0000001c Code RO 1392 i.app_EXTI_INT7_IRQn_Handler CVWL568.lib(drv_gpio.o) + 0x000137c0 0x000137c0 0x00000048 Code RO 1134 i.app_HardFault_Handler CVWL568.lib(drv_common.o) + 0x00013808 0x00013808 0x00000010 Code RO 1494 i.app_I2C0_IRQn_Handler CVWL568.lib(drv_i2c_slave.o) + 0x00013818 0x00013818 0x00000010 Code RO 1461 i.app_I2C1_IRQn_Handler CVWL568.lib(drv_i2c_master.o) + 0x00013828 0x00013828 0x000000e0 Code RO 1693 i.app_LCDC_IRQn_Handler CVWL568.lib(hal_internal_vsync.o) + 0x00013908 0x00013908 0x00000088 Code RO 2007 i.app_MEMC_IRQn_Handler CVWL568.lib(drv_memc.o) + 0x00013990 0x00013990 0x00000298 Code RO 1779 i.app_MIPI_RX_IRQn_Handler CVWL568.lib(drv_dsi_rx.o) + 0x00013c28 0x00013c28 0x000000a0 Code RO 1835 i.app_MIPI_TX_IRQn_Handler CVWL568.lib(drv_dsi_tx.o) + 0x00013cc8 0x00013cc8 0x00000048 Code RO 2405 i.app_PWMDET_IRQn_Handler CVWL568.lib(drv_pwm.o) + 0x00013d10 0x00013d10 0x00000030 Code RO 1589 i.app_SPIM_IRQn_Handler CVWL568.lib(drv_spi_master.o) + 0x00013d40 0x00013d40 0x00000200 Code RO 2338 i.app_SPIS_IRQn_Handler CVWL568.lib(hal_spi_slave.o) + 0x00013f40 0x00013f40 0x00000020 Code RO 2470 i.app_SWIRE_IRQn_Handler CVWL568.lib(drv_swire.o) + 0x00013f60 0x00013f60 0x00000018 Code RO 1135 i.app_SysTick_Handler CVWL568.lib(drv_common.o) + 0x00013f78 0x00013f78 0x0000000a Code RO 1652 i.app_TIMER0_IRQn_Handler CVWL568.lib(drv_timer.o) + 0x00013f82 0x00013f82 0x0000000a Code RO 1653 i.app_TIMER1_IRQn_Handler CVWL568.lib(drv_timer.o) + 0x00013f8c 0x00013f8c 0x0000000a Code RO 1654 i.app_TIMER2_IRQn_Handler CVWL568.lib(drv_timer.o) + 0x00013f96 0x00013f96 0x0000000a Code RO 1655 i.app_TIMER3_IRQn_Handler CVWL568.lib(drv_timer.o) + 0x00013fa0 0x00013fa0 0x0000001c Code RO 2130 i.app_VIDC_IRQn_Handler CVWL568.lib(drv_vidc.o) + 0x00013fbc 0x00013fbc 0x0000001c Code RO 2066 i.app_VPRE_IRQn_Handler CVWL568.lib(drv_rxbr.o) + 0x00013fd8 0x00013fd8 0x00000038 Code RO 2576 i.app_WDG_IRQn_Handler CVWL568.lib(drv_wdg.o) + 0x00014010 0x00014010 0x00000010 Code RO 1246 i.app_dma_irq_handler CVWL568.lib(drv_dma.o) + 0x00014020 0x00014020 0x00000030 Code RO 1050 i.app_fls_ctrl_Handler CVWL568.lib(norflash.o) + 0x00014050 0x00014050 0x00000024 Code RO 253 i.app_tp_I2C_init app_tp_transfer.o + 0x00014074 0x00014074 0x000000a8 Code RO 416 i.app_tp_calibration_exec app_tp_st_touch.o + 0x0001411c 0x0001411c 0x00000030 Code RO 254 i.app_tp_i2cs_callback app_tp_transfer.o + 0x0001414c 0x0001414c 0x00000044 Code RO 255 i.app_tp_init app_tp_transfer.o + 0x00014190 0x00014190 0x00000020 Code RO 256 i.app_tp_m_read app_tp_transfer.o + 0x000141b0 0x000141b0 0x00000008 Code RO 258 i.app_tp_m_write app_tp_transfer.o + 0x000141b8 0x000141b8 0x00000354 Code RO 901 i.app_tp_phone_analysis_data WL568_S21_NT37701_TP.lib(app_tp_for_custom_s8.o) + 0x0001450c 0x0001450c 0x0000000c Code RO 259 i.app_tp_phone_clear_reset_on app_tp_transfer.o + 0x00014518 0x00014518 0x00000008 Code RO 261 i.app_tp_s_read app_tp_transfer.o + 0x00014520 0x00014520 0x00000008 Code RO 263 i.app_tp_s_write app_tp_transfer.o + 0x00014528 0x00014528 0x000002ac Code RO 903 i.app_tp_screen_analysis_int WL568_S21_NT37701_TP.lib(app_tp_for_custom_s8.o) + 0x000147d4 0x000147d4 0x00000030 Code RO 264 i.app_tp_screen_init app_tp_transfer.o + 0x00014804 0x00014804 0x0000000c Code RO 265 i.app_tp_screen_int_callback app_tp_transfer.o + 0x00014810 0x00014810 0x00000040 Code RO 266 i.app_tp_transfer_screen_const app_tp_transfer.o + 0x00014850 0x00014850 0x00000138 Code RO 267 i.app_tp_transfer_screen_int app_tp_transfer.o + 0x00014988 0x00014988 0x00000018 Code RO 268 i.app_tp_transfer_screen_start app_tp_transfer.o + 0x000149a0 0x000149a0 0x00000024 Code RO 506 i.board_Init board.o + 0x000149c4 0x000149c4 0x000003cc Code RO 1694 i.calc_framebuffer_setting CVWL568.lib(hal_internal_vsync.o) + 0x00014d90 0x00014d90 0x000000c8 Code RO 2622 i.ceil m_ps.l(ceil.o) + 0x00014e58 0x00014e58 0x0000002c Code RO 1695 i.check_mipi_rx_tx_video_info CVWL568.lib(hal_internal_vsync.o) + 0x00014e84 0x00014e84 0x00000094 Code RO 1696 i.check_pkt_buf_rev CVWL568.lib(hal_internal_vsync.o) + 0x00014f18 0x00014f18 0x00000058 Code RO 1766 i.dcs_packet_fifo_alloc CVWL568.lib(dcs_packet_fifo.o) + 0x00014f70 0x00014f70 0x00000018 Code RO 1767 i.dcs_packet_fifo_init CVWL568.lib(dcs_packet_fifo.o) + 0x00014f88 0x00014f88 0x00000044 Code RO 1768 i.dcs_packet_free_fifo_header CVWL568.lib(dcs_packet_fifo.o) + 0x00014fcc 0x00014fcc 0x00000024 Code RO 1769 i.dcs_packet_get_fifo_header CVWL568.lib(dcs_packet_fifo.o) + 0x00014ff0 0x00014ff0 0x0000001c Code RO 1697 i.dcs_sw_filter CVWL568.lib(hal_internal_vsync.o) + 0x0001500c 0x0001500c 0x00000018 Code RO 882 i.delayMs CVWL568.lib(tau_delay.o) + 0x00015024 0x00015024 0x00000022 Code RO 883 i.delayUs CVWL568.lib(tau_delay.o) + 0x00015046 0x00015046 0x00000002 PAD + 0x00015048 0x00015048 0x00000038 Code RO 1621 i.drv_ap_rst_trig_edge_detect CVWL568.lib(drv_sys_cfg.o) + 0x00015080 0x00015080 0x0000000c Code RO 2308 i.drv_chip_info_get_info CVWL568.lib(drv_chip_info.o) + 0x0001508c 0x0001508c 0x00000040 Code RO 2309 i.drv_chip_info_init CVWL568.lib(drv_chip_info.o) + 0x000150cc 0x000150cc 0x000000c8 Code RO 2310 i.drv_chip_rx_info_check CVWL568.lib(drv_chip_info.o) + 0x00015194 0x00015194 0x00000014 Code RO 2311 i.drv_chip_rx_init_done CVWL568.lib(drv_chip_info.o) + 0x000151a8 0x000151a8 0x00000058 Code RO 1137 i.drv_common_enable_systick CVWL568.lib(drv_common.o) + 0x00015200 0x00015200 0x00000008 Code RO 1140 i.drv_common_system_init CVWL568.lib(drv_common.o) + 0x00015208 0x00015208 0x00000010 Code RO 1161 i.drv_crgu_config_reset_modules CVWL568.lib(drv_crgu.o) + 0x00015218 0x00015218 0x00000014 Code RO 1173 i.drv_crgu_set_ahb_pre_div CVWL568.lib(drv_crgu.o) + 0x0001522c 0x0001522c 0x00000014 Code RO 1174 i.drv_crgu_set_ahb_src CVWL568.lib(drv_crgu.o) + 0x00015240 0x00015240 0x00000020 Code RO 1177 i.drv_crgu_set_clock CVWL568.lib(drv_crgu.o) + 0x00015260 0x00015260 0x00000014 Code RO 1178 i.drv_crgu_set_dpi_mux_src CVWL568.lib(drv_crgu.o) + 0x00015274 0x00015274 0x00000018 Code RO 1179 i.drv_crgu_set_dpi_pre_div CVWL568.lib(drv_crgu.o) + 0x0001528c 0x0001528c 0x00000014 Code RO 1180 i.drv_crgu_set_dpi_pre_src CVWL568.lib(drv_crgu.o) + 0x000152a0 0x000152a0 0x00000014 Code RO 1181 i.drv_crgu_set_dsc_core_div CVWL568.lib(drv_crgu.o) + 0x000152b4 0x000152b4 0x00000014 Code RO 1182 i.drv_crgu_set_dsco_src CVWL568.lib(drv_crgu.o) + 0x000152c8 0x000152c8 0x00000014 Code RO 1183 i.drv_crgu_set_dsco_src_div CVWL568.lib(drv_crgu.o) + 0x000152dc 0x000152dc 0x00000014 Code RO 1184 i.drv_crgu_set_fb_div CVWL568.lib(drv_crgu.o) + 0x000152f0 0x000152f0 0x00000014 Code RO 1185 i.drv_crgu_set_fb_src CVWL568.lib(drv_crgu.o) + 0x00015304 0x00015304 0x00000014 Code RO 1188 i.drv_crgu_set_lcdc_div CVWL568.lib(drv_crgu.o) + 0x00015318 0x00015318 0x00000014 Code RO 1189 i.drv_crgu_set_lcdc_src CVWL568.lib(drv_crgu.o) + 0x0001532c 0x0001532c 0x00000014 Code RO 1190 i.drv_crgu_set_mipi_cfg_src CVWL568.lib(drv_crgu.o) + 0x00015340 0x00015340 0x00000018 Code RO 1191 i.drv_crgu_set_mipi_ref_src CVWL568.lib(drv_crgu.o) + 0x00015358 0x00015358 0x00000018 Code RO 1194 i.drv_crgu_set_reset CVWL568.lib(drv_crgu.o) + 0x00015370 0x00015370 0x00000014 Code RO 1195 i.drv_crgu_set_rxbr_div CVWL568.lib(drv_crgu.o) + 0x00015384 0x00015384 0x00000014 Code RO 1196 i.drv_crgu_set_rxbr_src CVWL568.lib(drv_crgu.o) + 0x00015398 0x00015398 0x00000014 Code RO 1198 i.drv_crgu_set_vidc_src CVWL568.lib(drv_crgu.o) + 0x000153ac 0x000153ac 0x00000018 Code RO 1250 i.drv_dma_clear_flag CVWL568.lib(drv_dma.o) + 0x000153c4 0x000153c4 0x0000001c Code RO 1251 i.drv_dma_create_handle CVWL568.lib(drv_dma.o) + 0x000153e0 0x000153e0 0x00000010 Code RO 1253 i.drv_dma_disenable_channel CVWL568.lib(drv_dma.o) + 0x000153f0 0x000153f0 0x00000010 Code RO 1255 i.drv_dma_enable_channel CVWL568.lib(drv_dma.o) + 0x00015400 0x00015400 0x00000024 Code RO 1256 i.drv_dma_enable_channel_interrupts CVWL568.lib(drv_dma.o) + 0x00015424 0x00015424 0x0000000c Code RO 1258 i.drv_dma_get_channel_flag CVWL568.lib(drv_dma.o) + 0x00015430 0x00015430 0x00000090 Code RO 1261 i.drv_dma_irq_handler CVWL568.lib(drv_dma.o) + 0x000154c0 0x000154c0 0x00000012 Code RO 1263 i.drv_dma_prepar_transfer CVWL568.lib(drv_dma.o) + 0x000154d2 0x000154d2 0x0000001a Code RO 1265 i.drv_dma_set_burst CVWL568.lib(drv_dma.o) + 0x000154ec 0x000154ec 0x00000006 Code RO 1266 i.drv_dma_set_callback CVWL568.lib(drv_dma.o) + 0x000154f2 0x000154f2 0x00000002 PAD + 0x000154f4 0x000154f4 0x00000044 Code RO 1268 i.drv_dma_set_transfer CVWL568.lib(drv_dma.o) + 0x00015538 0x00015538 0x00000036 Code RO 2321 i.drv_dsc_dec_convert_pps_rc_parameter CVWL568.lib(drv_dsc_dec.o) + 0x0001556e 0x0001556e 0x0000000c Code RO 2322 i.drv_dsc_dec_disable CVWL568.lib(drv_dsc_dec.o) + 0x0001557a 0x0001557a 0x00000002 PAD + 0x0001557c 0x0001557c 0x00000074 Code RO 2323 i.drv_dsc_dec_enable CVWL568.lib(drv_dsc_dec.o) + 0x000155f0 0x000155f0 0x0000000a Code RO 2324 i.drv_dsc_dec_get_nslc CVWL568.lib(drv_dsc_dec.o) + 0x000155fa 0x000155fa 0x00000028 Code RO 2326 i.drv_dsc_dec_set_u8_pps CVWL568.lib(drv_dsc_dec.o) + 0x00015622 0x00015622 0x00000002 PAD + 0x00015624 0x00015624 0x00000104 Code RO 1780 i.drv_dsi_rx_calc_ipi_tx_delay CVWL568.lib(drv_dsi_rx.o) + 0x00015728 0x00015728 0x00000040 Code RO 1781 i.drv_dsi_rx_enable_irq CVWL568.lib(drv_dsi_rx.o) + 0x00015768 0x00015768 0x00000050 Code RO 1782 i.drv_dsi_rx_get_color_bpp CVWL568.lib(drv_dsi_rx.o) + 0x000157b8 0x000157b8 0x0000001c Code RO 1783 i.drv_dsi_rx_get_color_pcc CVWL568.lib(drv_dsi_rx.o) + 0x000157d4 0x000157d4 0x00000008 Code RO 1784 i.drv_dsi_rx_get_compression_en CVWL568.lib(drv_dsi_rx.o) + 0x000157dc 0x000157dc 0x00000006 Code RO 1785 i.drv_dsi_rx_get_max_ret_size CVWL568.lib(drv_dsi_rx.o) + 0x000157e2 0x000157e2 0x0000000e Code RO 1789 i.drv_dsi_rx_power_up CVWL568.lib(drv_dsi_rx.o) + 0x000157f0 0x000157f0 0x00000020 Code RO 1790 i.drv_dsi_rx_set_ctrl_cfg CVWL568.lib(drv_dsi_rx.o) + 0x00015810 0x00015810 0x00000010 Code RO 1791 i.drv_dsi_rx_set_ddi_cfg CVWL568.lib(drv_dsi_rx.o) + 0x00015820 0x00015820 0x00000004 Code RO 1793 i.drv_dsi_rx_set_inten CVWL568.lib(drv_dsi_rx.o) + 0x00015824 0x00015824 0x00000010 Code RO 1794 i.drv_dsi_rx_set_ipi_cfg CVWL568.lib(drv_dsi_rx.o) + 0x00015834 0x00015834 0x00000046 Code RO 1796 i.drv_dsi_rx_set_lane_swap CVWL568.lib(drv_dsi_rx.o) + 0x0001587a 0x0001587a 0x00000026 Code RO 1797 i.drv_dsi_rx_set_resp_cnt CVWL568.lib(drv_dsi_rx.o) + 0x000158a0 0x000158a0 0x000000f0 Code RO 1798 i.drv_dsi_rx_set_up_phy CVWL568.lib(drv_dsi_rx.o) + 0x00015990 0x00015990 0x0000000e Code RO 1799 i.drv_dsi_rx_shut_down CVWL568.lib(drv_dsi_rx.o) + 0x0001599e 0x0001599e 0x00000014 Code RO 1837 i.drv_dsi_tx_command_header CVWL568.lib(drv_dsi_tx.o) + 0x000159b2 0x000159b2 0x0000006c Code RO 1838 i.drv_dsi_tx_command_mode_cfg CVWL568.lib(drv_dsi_tx.o) + 0x00015a1e 0x00015a1e 0x00000004 Code RO 1839 i.drv_dsi_tx_command_put_payload CVWL568.lib(drv_dsi_tx.o) + 0x00015a22 0x00015a22 0x00000018 Code RO 1840 i.drv_dsi_tx_config_eotp CVWL568.lib(drv_dsi_tx.o) + 0x00015a3a 0x00015a3a 0x00000008 Code RO 1841 i.drv_dsi_tx_config_int CVWL568.lib(drv_dsi_tx.o) + 0x00015a42 0x00015a42 0x00000008 Code RO 1842 i.drv_dsi_tx_dpi_lpcmd_time CVWL568.lib(drv_dsi_tx.o) + 0x00015a4a 0x00015a4a 0x0000000a Code RO 1843 i.drv_dsi_tx_dpi_mode CVWL568.lib(drv_dsi_tx.o) + 0x00015a54 0x00015a54 0x00000024 Code RO 1844 i.drv_dsi_tx_dpi_polarity CVWL568.lib(drv_dsi_tx.o) + 0x00015a78 0x00015a78 0x00000004 Code RO 1845 i.drv_dsi_tx_edpi_cmd_size CVWL568.lib(drv_dsi_tx.o) + 0x00015a7c 0x00015a7c 0x00000004 Code RO 1847 i.drv_dsi_tx_get_cmd_status CVWL568.lib(drv_dsi_tx.o) + 0x00015a80 0x00015a80 0x00000004 Code RO 1849 i.drv_dsi_tx_mode CVWL568.lib(drv_dsi_tx.o) + 0x00015a84 0x00015a84 0x00000018 Code RO 1850 i.drv_dsi_tx_phy_clock_lane_auto_lp CVWL568.lib(drv_dsi_tx.o) + 0x00015a9c 0x00015a9c 0x0000001a Code RO 1851 i.drv_dsi_tx_phy_clock_lane_req_hs CVWL568.lib(drv_dsi_tx.o) + 0x00015ab6 0x00015ab6 0x0000000c Code RO 1853 i.drv_dsi_tx_phy_lane_mode CVWL568.lib(drv_dsi_tx.o) + 0x00015ac2 0x00015ac2 0x00000064 Code RO 1857 i.drv_dsi_tx_phy_status_ready CVWL568.lib(drv_dsi_tx.o) + 0x00015b26 0x00015b26 0x0000003e Code RO 1858 i.drv_dsi_tx_phy_status_stopstate CVWL568.lib(drv_dsi_tx.o) + 0x00015b64 0x00015b64 0x0000010c Code RO 1860 i.drv_dsi_tx_phy_test_setup CVWL568.lib(drv_dsi_tx.o) + 0x00015c70 0x00015c70 0x0000001e Code RO 1861 i.drv_dsi_tx_phy_time_cfg CVWL568.lib(drv_dsi_tx.o) + 0x00015c8e 0x00015c8e 0x00000008 Code RO 1865 i.drv_dsi_tx_powerup CVWL568.lib(drv_dsi_tx.o) + 0x00015c96 0x00015c96 0x0000001c Code RO 1866 i.drv_dsi_tx_response_mode CVWL568.lib(drv_dsi_tx.o) + 0x00015cb2 0x00015cb2 0x00000018 Code RO 1869 i.drv_dsi_tx_set_bta_ack CVWL568.lib(drv_dsi_tx.o) + 0x00015cca 0x00015cca 0x0000000c Code RO 1870 i.drv_dsi_tx_set_esc_div CVWL568.lib(drv_dsi_tx.o) + 0x00015cd6 0x00015cd6 0x00000002 PAD + 0x00015cd8 0x00015cd8 0x00000034 Code RO 1871 i.drv_dsi_tx_set_int CVWL568.lib(drv_dsi_tx.o) + 0x00015d0c 0x00015d0c 0x00000010 Code RO 1872 i.drv_dsi_tx_set_time_out_div CVWL568.lib(drv_dsi_tx.o) + 0x00015d1c 0x00015d1c 0x00000008 Code RO 1873 i.drv_dsi_tx_set_video_chunk CVWL568.lib(drv_dsi_tx.o) + 0x00015d24 0x00015d24 0x00000022 Code RO 1874 i.drv_dsi_tx_set_video_timing CVWL568.lib(drv_dsi_tx.o) + 0x00015d46 0x00015d46 0x00000008 Code RO 1876 i.drv_dsi_tx_shutdown CVWL568.lib(drv_dsi_tx.o) + 0x00015d4e 0x00015d4e 0x00000026 Code RO 1877 i.drv_dsi_tx_timeout_cfg CVWL568.lib(drv_dsi_tx.o) + 0x00015d74 0x00015d74 0x000000aa Code RO 1880 i.drv_dsi_tx_video_mode_cfg CVWL568.lib(drv_dsi_tx.o) + 0x00015e1e 0x00015e1e 0x00000016 Code RO 1881 i.drv_dsi_tx_video_mode_disable_hact_cmd CVWL568.lib(drv_dsi_tx.o) + 0x00015e34 0x00015e34 0x00000018 Code RO 1882 i.drv_dsi_tx_video_mode_set_lp_cmd CVWL568.lib(drv_dsi_tx.o) + 0x00015e4c 0x00015e4c 0x00000020 Code RO 2602 i.drv_efuse_enter_inactive CVWL568.lib(drv_efuse.o) + 0x00015e6c 0x00015e6c 0x0000000c Code RO 2605 i.drv_efuse_int_enable CVWL568.lib(drv_efuse.o) + 0x00015e78 0x00015e78 0x00000032 Code RO 2606 i.drv_efuse_read CVWL568.lib(drv_efuse.o) + 0x00015eaa 0x00015eaa 0x00000018 Code RO 2607 i.drv_efuse_read_req CVWL568.lib(drv_efuse.o) + 0x00015ec2 0x00015ec2 0x00000002 PAD + 0x00015ec4 0x00015ec4 0x00000018 Code RO 1393 i.drv_gpio_get_input_data CVWL568.lib(drv_gpio.o) + 0x00015edc 0x00015edc 0x0000000c Code RO 1395 i.drv_gpio_register_ap_reset_callback CVWL568.lib(drv_gpio.o) + 0x00015ee8 0x00015ee8 0x00000014 Code RO 1396 i.drv_gpio_register_callback CVWL568.lib(drv_gpio.o) + 0x00015efc 0x00015efc 0x00000044 Code RO 1398 i.drv_gpio_set_int CVWL568.lib(drv_gpio.o) + 0x00015f40 0x00015f40 0x00000020 Code RO 1399 i.drv_gpio_set_ioe CVWL568.lib(drv_gpio.o) + 0x00015f60 0x00015f60 0x00000010 Code RO 1400 i.drv_gpio_set_mode0 CVWL568.lib(drv_gpio.o) + 0x00015f70 0x00015f70 0x00000010 Code RO 1401 i.drv_gpio_set_mode1 CVWL568.lib(drv_gpio.o) + 0x00015f80 0x00015f80 0x00000010 Code RO 1402 i.drv_gpio_set_mode2 CVWL568.lib(drv_gpio.o) + 0x00015f90 0x00015f90 0x00000010 Code RO 1403 i.drv_gpio_set_mode3 CVWL568.lib(drv_gpio.o) + 0x00015fa0 0x00015fa0 0x00000020 Code RO 716 i.drv_gpio_set_output_data CVWL568.lib(hal_gpio.o) + 0x00015fc0 0x00015fc0 0x00000130 Code RO 1404 i.drv_gpio_set_pull_state CVWL568.lib(drv_gpio.o) + 0x000160f0 0x000160f0 0x00000034 Code RO 1436 i.drv_i2c_dma_callback CVWL568.lib(drv_i2c_dma.o) + 0x00016124 0x00016124 0x000000ac Code RO 1437 i.drv_i2c_dma_init CVWL568.lib(drv_i2c_dma.o) + 0x000161d0 0x000161d0 0x0000001a Code RO 1438 i.drv_i2c_enable_rx_dma CVWL568.lib(drv_i2c_dma.o) + 0x000161ea 0x000161ea 0x00000018 Code RO 1439 i.drv_i2c_enable_tx_dma CVWL568.lib(drv_i2c_dma.o) + 0x00016202 0x00016202 0x00000002 PAD + 0x00016204 0x00016204 0x00000060 Code RO 1463 i.drv_i2c_m_clear_it_pending_bit CVWL568.lib(drv_i2c_master.o) + 0x00016264 0x00016264 0x00000010 Code RO 1465 i.drv_i2c_m_enable CVWL568.lib(drv_i2c_master.o) + 0x00016274 0x00016274 0x00000038 Code RO 1466 i.drv_i2c_m_enable_intr CVWL568.lib(drv_i2c_master.o) + 0x000162ac 0x000162ac 0x0000000c Code RO 1469 i.drv_i2c_m_set_callback CVWL568.lib(drv_i2c_master.o) + 0x000162b8 0x000162b8 0x0000008c Code RO 1473 i.drv_i2c_master_init CVWL568.lib(drv_i2c_master.o) + 0x00016344 0x00016344 0x0000005c Code RO 1440 i.drv_i2c_master_read_dma CVWL568.lib(drv_i2c_dma.o) + 0x000163a0 0x000163a0 0x0000003c Code RO 1441 i.drv_i2c_master_write_dma CVWL568.lib(drv_i2c_dma.o) + 0x000163dc 0x000163dc 0x0000002e Code RO 1442 i.drv_i2c_master_write_read_cmd CVWL568.lib(drv_i2c_dma.o) + 0x0001640a 0x0001640a 0x00000002 PAD + 0x0001640c 0x0001640c 0x0000005c Code RO 1496 i.drv_i2c_s_clear_it_pending_bit CVWL568.lib(drv_i2c_slave.o) + 0x00016468 0x00016468 0x00000034 Code RO 1499 i.drv_i2c_s_enable_intr CVWL568.lib(drv_i2c_slave.o) + 0x0001649c 0x0001649c 0x0000001c Code RO 1500 i.drv_i2c_s_get_fifo_status CVWL568.lib(drv_i2c_slave.o) + 0x000164b8 0x000164b8 0x0000000c Code RO 1503 i.drv_i2c_s_set_callback CVWL568.lib(drv_i2c_slave.o) + 0x000164c4 0x000164c4 0x00000020 Code RO 1506 i.drv_i2c_s_write_data CVWL568.lib(drv_i2c_slave.o) + 0x000164e4 0x000164e4 0x00000058 Code RO 1443 i.drv_i2c_set_dma_irq_callback CVWL568.lib(drv_i2c_dma.o) + 0x0001653c 0x0001653c 0x00000044 Code RO 1507 i.drv_i2c_slave_init CVWL568.lib(drv_i2c_slave.o) + 0x00016580 0x00016580 0x0000001c Code RO 1444 i.drv_i2c_slave_write_dma CVWL568.lib(drv_i2c_dma.o) + 0x0001659c 0x0001659c 0x00000018 Code RO 1949 i.drv_lcdc_config_bypass CVWL568.lib(drv_lcdc.o) + 0x000165b4 0x000165b4 0x00000030 Code RO 1950 i.drv_lcdc_config_ccm CVWL568.lib(drv_lcdc.o) + 0x000165e4 0x000165e4 0x00000016 Code RO 1951 i.drv_lcdc_config_disp_mode CVWL568.lib(drv_lcdc.o) + 0x000165fa 0x000165fa 0x00000024 Code RO 1952 i.drv_lcdc_config_dpi_polarity CVWL568.lib(drv_lcdc.o) + 0x0001661e 0x0001661e 0x00000026 Code RO 1953 i.drv_lcdc_config_dpi_timing CVWL568.lib(drv_lcdc.o) + 0x00016644 0x00016644 0x00000016 Code RO 1954 i.drv_lcdc_config_edpi_mode CVWL568.lib(drv_lcdc.o) + 0x0001665a 0x0001665a 0x00000016 Code RO 1955 i.drv_lcdc_config_endianness CVWL568.lib(drv_lcdc.o) + 0x00016670 0x00016670 0x0000000c Code RO 1956 i.drv_lcdc_config_input_size CVWL568.lib(drv_lcdc.o) + 0x0001667c 0x0001667c 0x0000001e Code RO 1957 i.drv_lcdc_config_int CVWL568.lib(drv_lcdc.o) + 0x0001669a 0x0001669a 0x00000022 Code RO 1958 i.drv_lcdc_config_int_single CVWL568.lib(drv_lcdc.o) + 0x000166bc 0x000166bc 0x00000022 Code RO 1959 i.drv_lcdc_config_overwrite CVWL568.lib(drv_lcdc.o) + 0x000166de 0x000166de 0x0000000c Code RO 1960 i.drv_lcdc_config_overwrite_rgb CVWL568.lib(drv_lcdc.o) + 0x000166ea 0x000166ea 0x0000001a Code RO 1961 i.drv_lcdc_config_partial_display_area CVWL568.lib(drv_lcdc.o) + 0x00016704 0x00016704 0x00000022 Code RO 1962 i.drv_lcdc_config_partial_display_enable CVWL568.lib(drv_lcdc.o) + 0x00016726 0x00016726 0x0000001a Code RO 1964 i.drv_lcdc_config_scale_up_coef CVWL568.lib(drv_lcdc.o) + 0x00016740 0x00016740 0x0000000c Code RO 1965 i.drv_lcdc_config_scale_up_step CVWL568.lib(drv_lcdc.o) + 0x0001674c 0x0001674c 0x0000004c Code RO 1966 i.drv_lcdc_config_src_parameter CVWL568.lib(drv_lcdc.o) + 0x00016798 0x00016798 0x00000006 Code RO 1967 i.drv_lcdc_config_thresh CVWL568.lib(drv_lcdc.o) + 0x0001679e 0x0001679e 0x00000012 Code RO 1968 i.drv_lcdc_ctrl_flow CVWL568.lib(drv_lcdc.o) + 0x000167b0 0x000167b0 0x00000020 Code RO 1970 i.drv_lcdc_enable_shadow_reg CVWL568.lib(drv_lcdc.o) + 0x000167d0 0x000167d0 0x00000034 Code RO 1971 i.drv_lcdc_set_int CVWL568.lib(drv_lcdc.o) + 0x00016804 0x00016804 0x00000014 Code RO 1973 i.drv_lcdc_set_video_hw_mode CVWL568.lib(drv_lcdc.o) + 0x00016818 0x00016818 0x00000020 Code RO 1974 i.drv_lcdc_start CVWL568.lib(drv_lcdc.o) + 0x00016838 0x00016838 0x0000000c Code RO 2008 i.drv_memc_clear_status CVWL568.lib(drv_memc.o) + 0x00016844 0x00016844 0x00000040 Code RO 2009 i.drv_memc_enable_irq CVWL568.lib(drv_memc.o) + 0x00016884 0x00016884 0x0000000c Code RO 2010 i.drv_memc_gen_a_tear_signal CVWL568.lib(drv_memc.o) + 0x00016890 0x00016890 0x00000012 Code RO 2011 i.drv_memc_get_status CVWL568.lib(drv_memc.o) + 0x000168a2 0x000168a2 0x00000010 Code RO 2012 i.drv_memc_rate_transfer_sel CVWL568.lib(drv_memc.o) + 0x000168b2 0x000168b2 0x0000000e Code RO 2013 i.drv_memc_sel_vsync CVWL568.lib(drv_memc.o) + 0x000168c0 0x000168c0 0x00000014 Code RO 2014 i.drv_memc_set_active_height CVWL568.lib(drv_memc.o) + 0x000168d4 0x000168d4 0x0000000c Code RO 2015 i.drv_memc_set_data_mode CVWL568.lib(drv_memc.o) + 0x000168e0 0x000168e0 0x00000010 Code RO 2018 i.drv_memc_set_double_buffer CVWL568.lib(drv_memc.o) + 0x000168f0 0x000168f0 0x00000012 Code RO 2019 i.drv_memc_set_double_buffer_reverse CVWL568.lib(drv_memc.o) + 0x00016902 0x00016902 0x00000010 Code RO 2021 i.drv_memc_set_fs_en_conditions CVWL568.lib(drv_memc.o) + 0x00016912 0x00016912 0x00000014 Code RO 2022 i.drv_memc_set_inten CVWL568.lib(drv_memc.o) + 0x00016926 0x00016926 0x00000002 PAD + 0x00016928 0x00016928 0x00000018 Code RO 2023 i.drv_memc_set_lcdc_st_conditions CVWL568.lib(drv_memc.o) + 0x00016940 0x00016940 0x0000001a Code RO 2024 i.drv_memc_set_ltpo_mode CVWL568.lib(drv_memc.o) + 0x0001695a 0x0001695a 0x0000000e Code RO 2028 i.drv_memc_set_tear_mode CVWL568.lib(drv_memc.o) + 0x00016968 0x00016968 0x00000028 Code RO 2029 i.drv_memc_set_tear_waveform CVWL568.lib(drv_memc.o) + 0x00016990 0x00016990 0x0000000e Code RO 2031 i.drv_memc_set_vidc_sync_cnt CVWL568.lib(drv_memc.o) + 0x0001699e 0x0001699e 0x00000002 PAD + 0x000169a0 0x000169a0 0x00000008 Code RO 1528 i.drv_param_init_get_ccm CVWL568.lib(drv_param_init.o) + 0x000169a8 0x000169a8 0x00000014 Code RO 1529 i.drv_param_init_get_scld_filter_h CVWL568.lib(drv_param_init.o) + 0x000169bc 0x000169bc 0x00000014 Code RO 1530 i.drv_param_init_get_scld_filter_v CVWL568.lib(drv_param_init.o) + 0x000169d0 0x000169d0 0x00000008 Code RO 1531 i.drv_param_init_get_sclu_filter CVWL568.lib(drv_param_init.o) + 0x000169d8 0x000169d8 0x00000014 Code RO 1532 i.drv_param_init_set_ccm CVWL568.lib(drv_param_init.o) + 0x000169ec 0x000169ec 0x00000064 Code RO 1533 i.drv_param_init_set_scld_filter CVWL568.lib(drv_param_init.o) + 0x00016a50 0x00016a50 0x00000024 Code RO 1535 i.drv_param_p2r_filter_init CVWL568.lib(drv_param_init.o) + 0x00016a74 0x00016a74 0x00000010 Code RO 2280 i.drv_phy_enable_calibration CVWL568.lib(drv_phy_common.o) + 0x00016a84 0x00016a84 0x0000003c Code RO 2281 i.drv_phy_get_calibration CVWL568.lib(drv_phy_common.o) + 0x00016ac0 0x00016ac0 0x00000060 Code RO 2282 i.drv_phy_get_pll_para CVWL568.lib(drv_phy_common.o) + 0x00016b20 0x00016b20 0x00000054 Code RO 2283 i.drv_phy_get_rate_para CVWL568.lib(drv_phy_common.o) + 0x00016b74 0x00016b74 0x00000010 Code RO 2284 i.drv_phy_test_clear CVWL568.lib(drv_phy_common.o) + 0x00016b84 0x00016b84 0x00000018 Code RO 2285 i.drv_phy_test_lock CVWL568.lib(drv_phy_common.o) + 0x00016b9c 0x00016b9c 0x00000020 Code RO 2287 i.drv_phy_test_write_1_byte CVWL568.lib(drv_phy_common.o) + 0x00016bbc 0x00016bbc 0x00000026 Code RO 2288 i.drv_phy_test_write_2_byte CVWL568.lib(drv_phy_common.o) + 0x00016be2 0x00016be2 0x0000001e Code RO 2289 i.drv_phy_test_write_code CVWL568.lib(drv_phy_common.o) + 0x00016c00 0x00016c00 0x00000020 Code RO 2290 i.drv_phy_test_write_data CVWL568.lib(drv_phy_common.o) + 0x00016c20 0x00016c20 0x00000020 Code RO 1551 i.drv_pwr_set_cp_mode CVWL568.lib(drv_pwr.o) + 0x00016c40 0x00016c40 0x00000018 Code RO 1552 i.drv_pwr_set_pvd_mode CVWL568.lib(drv_pwr.o) + 0x00016c58 0x00016c58 0x00000030 Code RO 1553 i.drv_pwr_set_system_clk_src CVWL568.lib(drv_pwr.o) + 0x00016c88 0x00016c88 0x0000000c Code RO 1800 i.drv_rx_phy_test_clear CVWL568.lib(drv_dsi_rx.o) + 0x00016c94 0x00016c94 0x00000010 Code RO 1801 i.drv_rx_phy_test_lock CVWL568.lib(drv_dsi_rx.o) + 0x00016ca4 0x00016ca4 0x00000014 Code RO 1803 i.drv_rx_phy_test_write_1_byte CVWL568.lib(drv_dsi_rx.o) + 0x00016cb8 0x00016cb8 0x00000016 Code RO 1804 i.drv_rx_phy_test_write_2_byte CVWL568.lib(drv_dsi_rx.o) + 0x00016cce 0x00016cce 0x0000000a Code RO 2067 i.drv_rxbr_clear_pkt_buffer CVWL568.lib(drv_rxbr.o) + 0x00016cd8 0x00016cd8 0x00000004 Code RO 2068 i.drv_rxbr_clear_status0 CVWL568.lib(drv_rxbr.o) + 0x00016cdc 0x00016cdc 0x0000005a Code RO 2070 i.drv_rxbr_enable_irq CVWL568.lib(drv_rxbr.o) + 0x00016d36 0x00016d36 0x00000002 PAD + 0x00016d38 0x00016d38 0x00000014 Code RO 2071 i.drv_rxbr_frame_drop_cfg CVWL568.lib(drv_rxbr.o) + 0x00016d4c 0x00016d4c 0x0000003c Code RO 2072 i.drv_rxbr_get_clk CVWL568.lib(drv_rxbr.o) + 0x00016d88 0x00016d88 0x00000004 Code RO 2073 i.drv_rxbr_get_col_addr CVWL568.lib(drv_rxbr.o) + 0x00016d8c 0x00016d8c 0x00000012 Code RO 1698 i.drv_rxbr_get_int_source CVWL568.lib(hal_internal_vsync.o) + 0x00016d9e 0x00016d9e 0x00000004 Code RO 2076 i.drv_rxbr_get_page_addr CVWL568.lib(drv_rxbr.o) + 0x00016da2 0x00016da2 0x00000012 Code RO 1699 i.drv_rxbr_get_status0 CVWL568.lib(hal_internal_vsync.o) + 0x00016db4 0x00016db4 0x0000000c Code RO 2078 i.drv_rxbr_hline_rcv0_cfg CVWL568.lib(drv_rxbr.o) + 0x00016dc0 0x00016dc0 0x00000008 Code RO 2079 i.drv_rxbr_hline_rcv_cfg CVWL568.lib(drv_rxbr.o) + 0x00016dc8 0x00016dc8 0x0000000c Code RO 2080 i.drv_rxbr_register_irq0_callback CVWL568.lib(drv_rxbr.o) + 0x00016dd4 0x00016dd4 0x0000000c Code RO 2081 i.drv_rxbr_register_irq1_callback CVWL568.lib(drv_rxbr.o) + 0x00016de0 0x00016de0 0x00000014 Code RO 2082 i.drv_rxbr_set_ack_pkt_header CVWL568.lib(drv_rxbr.o) + 0x00016df4 0x00016df4 0x000000cc Code RO 2083 i.drv_rxbr_set_cmd_filter CVWL568.lib(drv_rxbr.o) + 0x00016ec0 0x00016ec0 0x00000014 Code RO 2085 i.drv_rxbr_set_color_format CVWL568.lib(drv_rxbr.o) + 0x00016ed4 0x00016ed4 0x00000014 Code RO 2087 i.drv_rxbr_set_inten CVWL568.lib(drv_rxbr.o) + 0x00016ee8 0x00016ee8 0x00000010 Code RO 2088 i.drv_rxbr_set_ltpo_drop_th CVWL568.lib(drv_rxbr.o) + 0x00016ef8 0x00016ef8 0x00000026 Code RO 2090 i.drv_rxbr_set_usr_cfg CVWL568.lib(drv_rxbr.o) + 0x00016f1e 0x00016f1e 0x00000008 Code RO 2091 i.drv_rxbr_set_usr_col CVWL568.lib(drv_rxbr.o) + 0x00016f26 0x00016f26 0x00000008 Code RO 2092 i.drv_rxbr_set_usr_row CVWL568.lib(drv_rxbr.o) + 0x00016f2e 0x00016f2e 0x00000002 PAD + 0x00016f30 0x00016f30 0x00000020 Code RO 1597 i.drv_spi_m_read_data CVWL568.lib(drv_spi_master.o) + 0x00016f50 0x00016f50 0x00000048 Code RO 2474 i.drv_swire_set_int CVWL568.lib(drv_swire.o) + 0x00016f98 0x00016f98 0x0000000c Code RO 1622 i.drv_sys_cfg_clear_all_int CVWL568.lib(drv_sys_cfg.o) + 0x00016fa4 0x00016fa4 0x00000028 Code RO 1623 i.drv_sys_cfg_clear_pending CVWL568.lib(drv_sys_cfg.o) + 0x00016fcc 0x00016fcc 0x00000018 Code RO 1626 i.drv_sys_cfg_sel_ap_rst_lvl_trig CVWL568.lib(drv_sys_cfg.o) + 0x00016fe4 0x00016fe4 0x0000001c Code RO 1627 i.drv_sys_cfg_sel_ap_rst_trig CVWL568.lib(drv_sys_cfg.o) + 0x00017000 0x00017000 0x00000024 Code RO 1628 i.drv_sys_cfg_sel_gpio_group CVWL568.lib(drv_sys_cfg.o) + 0x00017024 0x00017024 0x00000024 Code RO 1629 i.drv_sys_cfg_sel_int_trig CVWL568.lib(drv_sys_cfg.o) + 0x00017048 0x00017048 0x00000010 Code RO 1631 i.drv_sys_cfg_set_dma_rx_req CVWL568.lib(drv_sys_cfg.o) + 0x00017058 0x00017058 0x00000010 Code RO 1632 i.drv_sys_cfg_set_dma_tx_req CVWL568.lib(drv_sys_cfg.o) + 0x00017068 0x00017068 0x00000024 Code RO 1633 i.drv_sys_cfg_set_int CVWL568.lib(drv_sys_cfg.o) + 0x0001708c 0x0001708c 0x0000001a Code RO 1657 i.drv_timer_clear_status_flags CVWL568.lib(drv_timer.o) + 0x000170a6 0x000170a6 0x00000020 Code RO 1658 i.drv_timer_enable CVWL568.lib(drv_timer.o) + 0x000170c6 0x000170c6 0x00000002 PAD + 0x000170c8 0x000170c8 0x00000010 Code RO 1660 i.drv_timer_get_instance CVWL568.lib(drv_timer.o) + 0x000170d8 0x000170d8 0x0000000e Code RO 1662 i.drv_timer_get_prescaler CVWL568.lib(drv_timer.o) + 0x000170e6 0x000170e6 0x00000002 PAD + 0x000170e8 0x000170e8 0x00000044 Code RO 1663 i.drv_timer_handle_interrupt CVWL568.lib(drv_timer.o) + 0x0001712c 0x0001712c 0x00000014 Code RO 1664 i.drv_timer_register_callback CVWL568.lib(drv_timer.o) + 0x00017140 0x00017140 0x0000000c Code RO 1665 i.drv_timer_set_current_count CVWL568.lib(drv_timer.o) + 0x0001714c 0x0001714c 0x00000048 Code RO 1666 i.drv_timer_set_int CVWL568.lib(drv_timer.o) + 0x00017194 0x00017194 0x0000000c Code RO 1667 i.drv_timer_set_match CVWL568.lib(drv_timer.o) + 0x000171a0 0x000171a0 0x00000016 Code RO 1668 i.drv_timer_set_prescaler CVWL568.lib(drv_timer.o) + 0x000171b6 0x000171b6 0x0000000a Code RO 1883 i.drv_tx_phy_test_clear CVWL568.lib(drv_dsi_tx.o) + 0x000171c0 0x000171c0 0x0000001c Code RO 1884 i.drv_tx_phy_test_enter CVWL568.lib(drv_dsi_tx.o) + 0x000171dc 0x000171dc 0x0000001c Code RO 1885 i.drv_tx_phy_test_exit CVWL568.lib(drv_dsi_tx.o) + 0x000171f8 0x000171f8 0x00000012 Code RO 1887 i.drv_tx_phy_test_write_1_byte CVWL568.lib(drv_dsi_tx.o) + 0x0001720a 0x0001720a 0x00000014 Code RO 1888 i.drv_tx_phy_test_write_2_byte CVWL568.lib(drv_dsi_tx.o) + 0x0001721e 0x0001721e 0x00000010 Code RO 1889 i.drv_tx_phy_test_write_code CVWL568.lib(drv_dsi_tx.o) + 0x0001722e 0x0001722e 0x00000008 Code RO 2131 i.drv_vidc_clear_irq CVWL568.lib(drv_vidc.o) + 0x00017236 0x00017236 0x00000018 Code RO 2135 i.drv_vidc_enable CVWL568.lib(drv_vidc.o) + 0x0001724e 0x0001724e 0x00000002 PAD + 0x00017250 0x00017250 0x00000040 Code RO 2136 i.drv_vidc_enable_irq CVWL568.lib(drv_vidc.o) + 0x00017290 0x00017290 0x00000012 Code RO 2138 i.drv_vidc_get_irq_status CVWL568.lib(drv_vidc.o) + 0x000172a2 0x000172a2 0x00000002 PAD + 0x000172a4 0x000172a4 0x00000028 Code RO 2142 i.drv_vidc_init_module_enable CVWL568.lib(drv_vidc.o) + 0x000172cc 0x000172cc 0x0000000c Code RO 2143 i.drv_vidc_register_callback CVWL568.lib(drv_vidc.o) + 0x000172d8 0x000172d8 0x00000006 Code RO 2144 i.drv_vidc_reset CVWL568.lib(drv_vidc.o) + 0x000172de 0x000172de 0x0000003c Code RO 2146 i.drv_vidc_set_dst_parameter CVWL568.lib(drv_vidc.o) + 0x0001731a 0x0001731a 0x00000014 Code RO 2150 i.drv_vidc_set_irqen CVWL568.lib(drv_vidc.o) + 0x0001732e 0x0001732e 0x00000010 Code RO 2151 i.drv_vidc_set_mirror CVWL568.lib(drv_vidc.o) + 0x0001733e 0x0001733e 0x00000008 Code RO 2154 i.drv_vidc_set_p2r_hcoef0 CVWL568.lib(drv_vidc.o) + 0x00017346 0x00017346 0x00000026 Code RO 2155 i.drv_vidc_set_p2r_hinitb CVWL568.lib(drv_vidc.o) + 0x0001736c 0x0001736c 0x00000026 Code RO 2156 i.drv_vidc_set_p2r_hinitr CVWL568.lib(drv_vidc.o) + 0x00017392 0x00017392 0x00000002 PAD + 0x00017394 0x00017394 0x00000018 Code RO 2157 i.drv_vidc_set_pentile_swap CVWL568.lib(drv_vidc.o) + 0x000173ac 0x000173ac 0x0000000a Code RO 2158 i.drv_vidc_set_pu_ctrl CVWL568.lib(drv_vidc.o) + 0x000173b6 0x000173b6 0x00000010 Code RO 2159 i.drv_vidc_set_rotation CVWL568.lib(drv_vidc.o) + 0x000173c6 0x000173c6 0x0000000a Code RO 2160 i.drv_vidc_set_scld_hcoef0 CVWL568.lib(drv_vidc.o) + 0x000173d0 0x000173d0 0x0000000a Code RO 2161 i.drv_vidc_set_scld_hcoef1 CVWL568.lib(drv_vidc.o) + 0x000173da 0x000173da 0x00000012 Code RO 2162 i.drv_vidc_set_scld_step CVWL568.lib(drv_vidc.o) + 0x000173ec 0x000173ec 0x0000000a Code RO 2163 i.drv_vidc_set_scld_vcoef0 CVWL568.lib(drv_vidc.o) + 0x000173f6 0x000173f6 0x0000000a Code RO 2164 i.drv_vidc_set_scld_vcoef1 CVWL568.lib(drv_vidc.o) + 0x00017400 0x00017400 0x00000016 Code RO 2165 i.drv_vidc_set_src_parameter CVWL568.lib(drv_vidc.o) + 0x00017416 0x00017416 0x00000002 PAD + 0x00017418 0x00017418 0x00000010 Code RO 2577 i.drv_wdg_clear_counter CVWL568.lib(drv_wdg.o) + 0x00017428 0x00017428 0x00000010 Code RO 2578 i.drv_wdg_clear_edge_flag CVWL568.lib(drv_wdg.o) + 0x00017438 0x00017438 0x00000010 Code RO 2581 i.drv_wdg_read_edge_flag CVWL568.lib(drv_wdg.o) + 0x00017448 0x00017448 0x00000034 Code RO 2584 i.drv_wdg_set_int CVWL568.lib(drv_wdg.o) + 0x0001747c 0x0001747c 0x0000000a Code RO 1305 i.fls_clr_interrupt_flag CVWL568.lib(drv_fls.o) + 0x00017486 0x00017486 0x00000014 Code RO 892 i.fputc CVWL568.lib(tau_log.o) + 0x0001749a 0x0001749a 0x00000002 PAD + 0x0001749c 0x0001749c 0x00000030 Code RO 535 i.hal_dsi_rx_ctrl_create_handle CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x000174cc 0x000174cc 0x0000009c Code RO 537 i.hal_dsi_rx_ctrl_deinit CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00017568 0x00017568 0x00000084 Code RO 539 i.hal_dsi_rx_ctrl_dsc_async_handler CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x000175ec 0x000175ec 0x00000028 Code RO 541 i.hal_dsi_rx_ctrl_gen_a_tear_signal CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00017614 0x00017614 0x00000028 Code RO 543 i.hal_dsi_rx_ctrl_get_max_ret_size CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x0001763c 0x0001763c 0x00000098 Code RO 545 i.hal_dsi_rx_ctrl_init CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x000176d4 0x000176d4 0x00000130 Code RO 546 i.hal_dsi_rx_ctrl_init_clk CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00017804 0x00017804 0x000000d4 Code RO 547 i.hal_dsi_rx_ctrl_init_dsi_rx CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x000178d8 0x000178d8 0x0000013c Code RO 548 i.hal_dsi_rx_ctrl_init_memc CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00017a14 0x00017a14 0x00000130 Code RO 549 i.hal_dsi_rx_ctrl_init_rxbr CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00017b44 0x00017b44 0x0000022c Code RO 550 i.hal_dsi_rx_ctrl_init_vidc CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00017d70 0x00017d70 0x0000003c Code RO 551 i.hal_dsi_rx_ctrl_pre_init_pps CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00017dac 0x00017dac 0x000000f0 Code RO 554 i.hal_dsi_rx_ctrl_send_ack_cmd CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00017e9c 0x00017e9c 0x0000002c Code RO 556 i.hal_dsi_rx_ctrl_set_cus_esc_clk CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00017ec8 0x00017ec8 0x0000006c Code RO 557 i.hal_dsi_rx_ctrl_set_cus_scld_filter CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00017f34 0x00017f34 0x00000034 Code RO 558 i.hal_dsi_rx_ctrl_set_cus_sync_line CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00017f68 0x00017f68 0x00000038 Code RO 562 i.hal_dsi_rx_ctrl_set_ipi_cfg CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00017fa0 0x00017fa0 0x00000072 Code RO 566 i.hal_dsi_rx_ctrl_set_rxbr_clk CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00018012 0x00018012 0x00000002 PAD + 0x00018014 0x00018014 0x00000034 Code RO 567 i.hal_dsi_rx_ctrl_set_sw_tear_mode CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00018048 0x00018048 0x0000000e Code RO 569 i.hal_dsi_rx_ctrl_set_tear_mode_ex CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00018056 0x00018056 0x00000002 PAD + 0x00018058 0x00018058 0x0000003c Code RO 570 i.hal_dsi_rx_ctrl_start CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00018094 0x00018094 0x0000003c Code RO 571 i.hal_dsi_rx_ctrl_stop CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x000180d0 0x000180d0 0x00000020 Code RO 573 i.hal_dsi_rx_ctrl_toggle_resolution CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x000180f0 0x000180f0 0x00000190 Code RO 624 i.hal_dsi_tx_calc_video_chunks CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018280 0x00018280 0x00000034 Code RO 625 i.hal_dsi_tx_config_params_for_lane_rate CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x000182b4 0x000182b4 0x000004d0 Code RO 626 i.hal_dsi_tx_count_lane_rate CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018784 0x00018784 0x0000002c Code RO 628 i.hal_dsi_tx_ctrl_create_handle CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x000187b0 0x000187b0 0x00000048 Code RO 629 i.hal_dsi_tx_ctrl_deinit CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x000187f8 0x000187f8 0x0000004c Code RO 630 i.hal_dsi_tx_ctrl_enter_init_panel_mode CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018844 0x00018844 0x00000028 Code RO 632 i.hal_dsi_tx_ctrl_exit_init_panel_mode CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x0001886c 0x0001886c 0x000000c4 Code RO 634 i.hal_dsi_tx_ctrl_init CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018930 0x00018930 0x00000024 Code RO 635 i.hal_dsi_tx_ctrl_init_clk CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018954 0x00018954 0x0000000c Code RO 636 i.hal_dsi_tx_ctrl_panel_reset_pin CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018960 0x00018960 0x00000020 Code RO 639 i.hal_dsi_tx_ctrl_set_ccm CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018980 0x00018980 0x00000014 Code RO 645 i.hal_dsi_tx_ctrl_set_overwrite_rgb CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018994 0x00018994 0x00000010 Code RO 646 i.hal_dsi_tx_ctrl_set_partial_disp CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x000189a4 0x000189a4 0x00000024 Code RO 647 i.hal_dsi_tx_ctrl_set_partial_disp_area CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x000189c8 0x000189c8 0x0000006c Code RO 649 i.hal_dsi_tx_ctrl_start CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018a34 0x00018a34 0x00000044 Code RO 650 i.hal_dsi_tx_ctrl_stop CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018a78 0x00018a78 0x000000d8 Code RO 651 i.hal_dsi_tx_ctrl_write_array_cmd CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018b50 0x00018b50 0x000000b0 Code RO 652 i.hal_dsi_tx_ctrl_write_cmd CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018c00 0x00018c00 0x00000044 Code RO 653 i.hal_dsi_tx_init_data_mode CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018c44 0x00018c44 0x00000030 Code RO 654 i.hal_dsi_tx_init_dpi_cfg CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018c74 0x00018c74 0x00000020 Code RO 655 i.hal_dsi_tx_init_interrupt CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018c94 0x00018c94 0x00000020 Code RO 656 i.hal_dsi_tx_init_phy_cfg CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018cb4 0x00018cb4 0x00000094 Code RO 657 i.hal_dsi_tx_init_remains CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018d48 0x00018d48 0x00000058 Code RO 658 i.hal_dsi_tx_init_video_mode CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018da0 0x00018da0 0x00000044 Code RO 659 i.hal_dsi_tx_send_cmd CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018de4 0x00018de4 0x00000018 Code RO 717 i.hal_gpio_ctrl_eint CVWL568.lib(hal_gpio.o) + 0x00018dfc 0x00018dfc 0x00000012 Code RO 718 i.hal_gpio_get_input_data CVWL568.lib(hal_gpio.o) + 0x00018e0e 0x00018e0e 0x00000002 PAD + 0x00018e10 0x00018e10 0x00000040 Code RO 721 i.hal_gpio_init_eint CVWL568.lib(hal_gpio.o) + 0x00018e50 0x00018e50 0x00000020 Code RO 722 i.hal_gpio_init_input CVWL568.lib(hal_gpio.o) + 0x00018e70 0x00018e70 0x00000028 Code RO 723 i.hal_gpio_init_output CVWL568.lib(hal_gpio.o) + 0x00018e98 0x00018e98 0x00000018 Code RO 724 i.hal_gpio_reg_eint_cb CVWL568.lib(hal_gpio.o) + 0x00018eb0 0x00018eb0 0x00000050 Code RO 725 i.hal_gpio_set_ap_reset_int CVWL568.lib(hal_gpio.o) + 0x00018f00 0x00018f00 0x00000060 Code RO 727 i.hal_gpio_set_mode CVWL568.lib(hal_gpio.o) + 0x00018f60 0x00018f60 0x00000008 Code RO 728 i.hal_gpio_set_output_data CVWL568.lib(hal_gpio.o) + 0x00018f68 0x00018f68 0x00000020 Code RO 730 i.hal_gpio_set_pull_state CVWL568.lib(hal_gpio.o) + 0x00018f88 0x00018f88 0x0000006c Code RO 755 i.hal_i2c_m_dma_init CVWL568.lib(hal_i2c_master.o) + 0x00018ff4 0x00018ff4 0x00000020 Code RO 756 i.hal_i2c_m_dma_read CVWL568.lib(hal_i2c_master.o) + 0x00019014 0x00019014 0x0000001c Code RO 757 i.hal_i2c_m_dma_write CVWL568.lib(hal_i2c_master.o) + 0x00019030 0x00019030 0x0000000c Code RO 759 i.hal_i2c_m_transfer_complate CVWL568.lib(hal_i2c_master.o) + 0x0001903c 0x0001903c 0x00000020 Code RO 760 i.hal_i2c_master_irq_callback CVWL568.lib(hal_i2c_master.o) + 0x0001905c 0x0001905c 0x00000010 Code RO 772 i.hal_i2c_s_dma_user_callback CVWL568.lib(hal_i2c_slave.o) + 0x0001906c 0x0001906c 0x00000038 Code RO 773 i.hal_i2c_s_dma_write CVWL568.lib(hal_i2c_slave.o) + 0x000190a4 0x000190a4 0x0000006c Code RO 775 i.hal_i2c_s_init CVWL568.lib(hal_i2c_slave.o) + 0x00019110 0x00019110 0x00000014 Code RO 776 i.hal_i2c_s_nonblocking_read CVWL568.lib(hal_i2c_slave.o) + 0x00019124 0x00019124 0x0000000c Code RO 783 i.hal_i2c_s_set_transfer CVWL568.lib(hal_i2c_slave.o) + 0x00019130 0x00019130 0x0000014c Code RO 786 i.hal_i2c_slave_irq_callback CVWL568.lib(hal_i2c_slave.o) + 0x0001927c 0x0001927c 0x000000e4 Code RO 1701 i.hal_internal_init_memc CVWL568.lib(hal_internal_vsync.o) + 0x00019360 0x00019360 0x00000010 Code RO 1702 i.hal_internal_sync_get_fb_setting CVWL568.lib(hal_internal_vsync.o) + 0x00019370 0x00019370 0x00000214 Code RO 1703 i.hal_internal_sync_input_resolution_change CVWL568.lib(hal_internal_vsync.o) + 0x00019584 0x00019584 0x0000001c Code RO 1705 i.hal_internal_vsync_deinit CVWL568.lib(hal_internal_vsync.o) + 0x000195a0 0x000195a0 0x0000000c Code RO 1706 i.hal_internal_vsync_get_rx_state CVWL568.lib(hal_internal_vsync.o) + 0x000195ac 0x000195ac 0x00000018 Code RO 1707 i.hal_internal_vsync_get_sync_line CVWL568.lib(hal_internal_vsync.o) + 0x000195c4 0x000195c4 0x0000000c Code RO 1708 i.hal_internal_vsync_get_tx_state CVWL568.lib(hal_internal_vsync.o) + 0x000195d0 0x000195d0 0x000000fc Code RO 1709 i.hal_internal_vsync_init_rx CVWL568.lib(hal_internal_vsync.o) + 0x000196cc 0x000196cc 0x000000b0 Code RO 1710 i.hal_internal_vsync_init_tx CVWL568.lib(hal_internal_vsync.o) + 0x0001977c 0x0001977c 0x0000011c Code RO 1711 i.hal_internal_vsync_set_auto_hw_filter CVWL568.lib(hal_internal_vsync.o) + 0x00019898 0x00019898 0x00000014 Code RO 1713 i.hal_internal_vsync_set_rx_state CVWL568.lib(hal_internal_vsync.o) + 0x000198ac 0x000198ac 0x0000001c Code RO 1714 i.hal_internal_vsync_set_sync_line CVWL568.lib(hal_internal_vsync.o) + 0x000198c8 0x000198c8 0x00000048 Code RO 1715 i.hal_internal_vsync_set_tear_mode CVWL568.lib(hal_internal_vsync.o) + 0x00019910 0x00019910 0x00000040 Code RO 1716 i.hal_internal_vsync_set_tx_state CVWL568.lib(hal_internal_vsync.o) + 0x00019950 0x00019950 0x00000024 Code RO 660 i.hal_lcdc_config_ccm CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00019974 0x00019974 0x00000048 Code RO 661 i.hal_lcdc_config_remains CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x000199bc 0x000199bc 0x00000014 Code RO 662 i.hal_lcdc_config_rgb_to_pentile CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x000199d0 0x000199d0 0x00000164 Code RO 663 i.hal_lcdc_config_upscaler CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00019b34 0x00019b34 0x00000040 Code RO 664 i.hal_lcdc_init_cfg CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00019b74 0x00019b74 0x00000180 Code RO 665 i.hal_lcdc_init_clk CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00019cf4 0x00019cf4 0x00000040 Code RO 666 i.hal_lcdc_init_interrupt CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00019d34 0x00019d34 0x0000000e Code RO 808 i.hal_spi_m_clear_rxfifo CVWL568.lib(hal_spi_master.o) + 0x00019d42 0x00019d42 0x00000008 Code RO 832 i.hal_system_enable_systick CVWL568.lib(hal_system.o) + 0x00019d4a 0x00019d4a 0x00000002 PAD + 0x00019d4c 0x00019d4c 0x00000088 Code RO 837 i.hal_system_init CVWL568.lib(hal_system.o) + 0x00019dd4 0x00019dd4 0x0000001c Code RO 838 i.hal_system_init_console CVWL568.lib(hal_system.o) + 0x00019df0 0x00019df0 0x00000008 Code RO 841 i.hal_system_set_phy_calibration CVWL568.lib(hal_system.o) + 0x00019df8 0x00019df8 0x00000008 Code RO 842 i.hal_system_set_pvd CVWL568.lib(hal_system.o) + 0x00019e00 0x00019e00 0x00000008 Code RO 843 i.hal_system_set_vcc CVWL568.lib(hal_system.o) + 0x00019e08 0x00019e08 0x0000001a Code RO 868 i.hal_timer_init CVWL568.lib(hal_timer.o) + 0x00019e22 0x00019e22 0x00000002 PAD + 0x00019e24 0x00019e24 0x00000050 Code RO 870 i.hal_timer_start CVWL568.lib(hal_timer.o) + 0x00019e74 0x00019e74 0x0000008c Code RO 1033 i.hal_uart_init CVWL568.lib(hal_uart.o) + 0x00019f00 0x00019f00 0x00000010 Code RO 1036 i.hal_uart_transmit_blocking CVWL568.lib(hal_uart.o) + 0x00019f10 0x00019f10 0x00000110 Code RO 2241 i.handle_init CVWL568.lib(irq_redirect .o) + 0x0001a020 0x0001a020 0x00000070 Code RO 111 i.init_mipi_tx ap_demo.o + 0x0001a090 0x0001a090 0x00000098 Code RO 112 i.init_panel ap_demo.o + 0x0001a128 0x0001a128 0x0000000a Code RO 3 i.main main.o + 0x0001a132 0x0001a132 0x00000002 PAD + 0x0001a134 0x0001a134 0x000000c8 Code RO 113 i.open_mipi_rx ap_demo.o + 0x0001a1fc 0x0001a1fc 0x000000c0 Code RO 114 i.pps_update_handle ap_demo.o + 0x0001a2bc 0x0001a2bc 0x000003f4 Code RO 1717 i.rx_get_dcs_packet_data CVWL568.lib(hal_internal_vsync.o) + 0x0001a6b0 0x0001a6b0 0x00000140 Code RO 1718 i.rx_partial_update CVWL568.lib(hal_internal_vsync.o) + 0x0001a7f0 0x0001a7f0 0x0000008c Code RO 1719 i.rx_receive_packet CVWL568.lib(hal_internal_vsync.o) + 0x0001a87c 0x0001a87c 0x00000180 Code RO 1720 i.rx_receive_pps CVWL568.lib(hal_internal_vsync.o) + 0x0001a9fc 0x0001a9fc 0x000000a4 Code RO 1721 i.rxbr_irq0_callback CVWL568.lib(hal_internal_vsync.o) + 0x0001aaa0 0x0001aaa0 0x00000170 Code RO 1722 i.rxbr_irq1_callback CVWL568.lib(hal_internal_vsync.o) + 0x0001ac10 0x0001ac10 0x0000008c Code RO 1723 i.soft_gen_te CVWL568.lib(hal_internal_vsync.o) + 0x0001ac9c 0x0001ac9c 0x00000030 Code RO 115 i.soft_timer3_cb ap_demo.o + 0x0001accc 0x0001accc 0x00000048 Code RO 2626 i.sqrt m_ps.l(sqrt.o) + 0x0001ad14 0x0001ad14 0x00000068 Code RO 116 i.tp_heartbeat_exec ap_demo.o + 0x0001ad7c 0x0001ad7c 0x000000e8 Code RO 1724 i.vidc_callback CVWL568.lib(hal_internal_vsync.o) + 0x0001ae64 0x0001ae64 0x000000d0 Code RO 1725 i.vpre_err_reset CVWL568.lib(hal_internal_vsync.o) + 0x0001af34 0x0001af34 0x0000019c Code RO 1726 i.vsync_set_te_mode CVWL568.lib(hal_internal_vsync.o) + 0x0001b0d0 0x0001b0d0 0x000024b8 Data RO 117 .constdata ap_demo.o + 0x0001d588 0x0001d588 0x00000020 Data RO 418 .constdata app_tp_st_touch.o + 0x0001d5a8 0x0001d5a8 0x000000d2 Data RO 733 .constdata CVWL568.lib(hal_gpio.o) + 0x0001d67a 0x0001d67a 0x000014a6 Data RO 904 .constdata WL568_S21_NT37701_TP.lib(app_tp_for_custom_s8.o) + 0x0001eb20 0x0001eb20 0x00000001 Data RO 919 .constdata WL568_S21_NT37701_TP.lib(app_tp_for_custom_s8.o) + 0x0001eb21 0x0001eb21 0x00000003 PAD + 0x0001eb24 0x0001eb24 0x00000008 Data RO 1536 .constdata CVWL568.lib(drv_param_init.o) + 0x0001eb2c 0x0001eb2c 0x00000186 Data RO 2291 .constdata CVWL568.lib(drv_phy_common.o) + 0x0001ecb2 0x0001ecb2 0x00000002 PAD + 0x0001ecb4 0x0001ecb4 0x00000048 Data RO 575 .conststring CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x0001ecfc 0x0001ecfc 0x00000134 Data RO 1728 .conststring CVWL568.lib(hal_internal_vsync.o) + 0x0001ee30 0x0001ee30 0x00000030 Data RO 2988 Region$$Table anon$$obj.o + + + Execution Region RW_RAM1 (Exec base: 0x00070000, Load base: 0x0001ee60, Size: 0x00000000, Max: 0x000000f0, ABSOLUTE) + + **** No section assigned to this execution region **** + + + Execution Region RW_RAM2 (Exec base: 0x00070100, Load base: 0x0001ee60, Size: 0x000000c0, Max: 0x000000d0, ABSOLUTE) + + Exec Addr Load Addr Size Type Attr Idx E Section Name Object + + 0x00070100 - 0x000000c0 Zero RW 2242 .ARM.__AT_0x00070100 CVWL568.lib(irq_redirect .o) + + + Execution Region RW_RAM3 (Exec base: 0x000701d0, Load base: 0x0001ee60, Size: 0x000038f0, Max: 0x00007e30, ABSOLUTE, COMPRESSED[0x00000554]) + + Exec Addr Load Addr Size Type Attr Idx E Section Name Object + + 0x000701d0 COMPRESSED 0x0000022c Data RW 118 .data ap_demo.o + 0x000703fc COMPRESSED 0x00000017 Data RW 270 .data app_tp_transfer.o + 0x00070413 COMPRESSED 0x00000028 Data RW 419 .data app_tp_st_touch.o + 0x0007043b COMPRESSED 0x00000001 PAD + 0x0007043c COMPRESSED 0x00000008 Data RW 576 .data CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00070444 COMPRESSED 0x00000001 Data RW 668 .data CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00070445 COMPRESSED 0x00000001 Data RW 761 .data CVWL568.lib(hal_i2c_master.o) + 0x00070446 COMPRESSED 0x00000002 PAD + 0x00070448 COMPRESSED 0x0000001c Data RW 787 .data CVWL568.lib(hal_i2c_slave.o) + 0x00070464 COMPRESSED 0x000000e4 Data RW 920 .data WL568_S21_NT37701_TP.lib(app_tp_for_custom_s8.o) + 0x00070548 COMPRESSED 0x00000001 Data RW 921 .data WL568_S21_NT37701_TP.lib(app_tp_for_custom_s8.o) + 0x00070549 COMPRESSED 0x00000001 Data RW 922 .data WL568_S21_NT37701_TP.lib(app_tp_for_custom_s8.o) + 0x0007054a COMPRESSED 0x00000001 Data RW 927 .data WL568_S21_NT37701_TP.lib(app_tp_for_custom_s8.o) + 0x0007054b COMPRESSED 0x00000003 Data RW 928 .data WL568_S21_NT37701_TP.lib(app_tp_for_custom_s8.o) + 0x0007054e COMPRESSED 0x00000005 Data RW 929 .data WL568_S21_NT37701_TP.lib(app_tp_for_custom_s8.o) + 0x00070553 COMPRESSED 0x00000001 PAD + 0x00070554 COMPRESSED 0x00000030 Data RW 939 .data WL568_S21_NT37701_TP.lib(app_tp_for_custom_s8.o) + 0x00070584 COMPRESSED 0x00000012 Data RW 1090 .data CVWL568.lib(norflash.o) + 0x00070596 COMPRESSED 0x00000002 PAD + 0x00070598 COMPRESSED 0x0000000c Data RW 1143 .data CVWL568.lib(drv_common.o) + 0x000705a4 COMPRESSED 0x00000004 Data RW 1408 .data CVWL568.lib(drv_gpio.o) + 0x000705a8 COMPRESSED 0x00000008 Data RW 1446 .data CVWL568.lib(drv_i2c_dma.o) + 0x000705b0 COMPRESSED 0x00000004 Data RW 1474 .data CVWL568.lib(drv_i2c_master.o) + 0x000705b4 COMPRESSED 0x00000008 Data RW 1508 .data CVWL568.lib(drv_i2c_slave.o) + 0x000705bc COMPRESSED 0x000004a4 Data RW 1537 .data CVWL568.lib(drv_param_init.o) + 0x00070a60 COMPRESSED 0x00000004 Data RW 1602 .data CVWL568.lib(drv_spi_master.o) + 0x00070a64 COMPRESSED 0x00000001 Data RW 1634 .data CVWL568.lib(drv_sys_cfg.o) + 0x00070a65 COMPRESSED 0x00000003 PAD + 0x00070a68 COMPRESSED 0x00000050 Data RW 1670 .data CVWL568.lib(drv_timer.o) + 0x00070ab8 COMPRESSED 0x00000004 Data RW 1729 .data CVWL568.lib(hal_internal_vsync.o) + 0x00070abc COMPRESSED 0x00000008 Data RW 2094 .data CVWL568.lib(drv_rxbr.o) + 0x00070ac4 COMPRESSED 0x00000004 Data RW 2167 .data CVWL568.lib(drv_vidc.o) + 0x00070ac8 COMPRESSED 0x00000001 Data RW 2292 .data CVWL568.lib(drv_phy_common.o) + 0x00070ac9 COMPRESSED 0x00000003 PAD + 0x00070acc COMPRESSED 0x0000000c Data RW 2312 .data CVWL568.lib(drv_chip_info.o) + 0x00070ad8 COMPRESSED 0x0000000c Data RW 2422 .data CVWL568.lib(drv_pwm.o) + 0x00070ae4 COMPRESSED 0x00000008 Data RW 2477 .data CVWL568.lib(drv_swire.o) + 0x00070aec COMPRESSED 0x00000008 Data RW 2519 .data CVWL568.lib(drv_uart.o) + 0x00070af4 COMPRESSED 0x0000000c Data RW 2586 .data CVWL568.lib(drv_wdg.o) + 0x00070b00 COMPRESSED 0x00000004 Data RW 2957 .data mc_p.l(stdout.o) + 0x00070b04 COMPRESSED 0x00000004 Data RW 2969 .data mc_p.l(errno.o) + 0x00070b08 - 0x00000190 Zero RW 269 .bss app_tp_transfer.o + 0x00070c98 - 0x0000000c Zero RW 417 .bss app_tp_st_touch.o + 0x00070ca4 - 0x000000c0 Zero RW 574 .bss CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00070d64 - 0x00000048 Zero RW 667 .bss CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00070dac - 0x00000100 Zero RW 893 .bss CVWL568.lib(tau_log.o) + 0x00070eac - 0x000000d0 Zero RW 1038 .bss CVWL568.lib(hal_uart.o) + 0x00070f7c - 0x0000001c Zero RW 1270 .bss CVWL568.lib(drv_dma.o) + 0x00070f98 - 0x00000040 Zero RW 1407 .bss CVWL568.lib(drv_gpio.o) + 0x00070fd8 - 0x00000140 Zero RW 1445 .bss CVWL568.lib(drv_i2c_dma.o) + 0x00071118 - 0x00000958 Zero RW 1727 .bss CVWL568.lib(hal_internal_vsync.o) + 0x00071a70 - 0x00001030 Zero RW 1771 .bss CVWL568.lib(dcs_packet_fifo.o) + 0x00072aa0 - 0x00000020 Zero RW 2356 .bss CVWL568.lib(hal_spi_slave.o) + 0x00072ac0 - 0x00001000 Zero RW 524 STACK startup_armcm0.o + + +============================================================================== + +Image component sizes + + + Code (inc. data) RO Data RW Data ZI Data Debug Object Name + + 6122 818 9400 556 0 38729 ap_demo.o + 1298 244 32 40 12 12693 app_tp_st_touch.o + 1004 148 0 23 400 14112 app_tp_transfer.o + 36 6 0 0 0 573 board.o + 10 0 0 0 0 5723 main.o + 120 18 192 0 4096 2124 startup_armcm0.o + + ---------------------------------------------------------------------- + 8596 1234 9672 620 4508 73954 Object Totals + 0 0 48 0 0 0 (incl. Generated) + 6 0 0 1 0 0 (incl. Padding) + + ---------------------------------------------------------------------- + + Code (inc. data) RO Data RW Data ZI Data Debug Library Member Name + + 216 32 0 0 4144 252 dcs_packet_fifo.o + 296 96 0 12 0 256 drv_chip_info.o + 192 82 20 12 0 264 drv_common.o + 420 90 0 0 0 1200 drv_crgu.o + 410 28 0 0 28 796 drv_dma.o + 232 28 0 0 0 340 drv_dsc_dec.o + 1624 494 0 0 0 1332 drv_dsi_rx.o + 1476 118 0 0 0 2428 drv_dsi_tx.o + 118 0 0 0 0 256 drv_efuse.o + 10 0 0 0 0 60 drv_fls.o + 784 112 0 4 64 1236 drv_gpio.o + 588 88 0 8 320 624 drv_i2c_dma.o + 360 86 0 4 0 456 drv_i2c_master.o + 324 74 0 8 0 516 drv_i2c_slave.o + 668 6 0 0 0 1444 drv_lcdc.o + 492 28 0 0 0 1112 drv_memc.o + 212 44 8 1188 0 452 drv_param_init.o + 428 30 390 1 0 664 drv_phy_common.o + 72 10 0 12 0 76 drv_pwm.o + 104 24 0 0 0 180 drv_pwr.o + 682 66 0 8 0 1448 drv_rxbr.o + 104 24 0 4 0 188 drv_spi_master.o + 104 12 0 8 0 140 drv_swire.o + 300 64 0 1 0 628 drv_sys_cfg.o + 334 22 0 80 0 944 drv_timer.o + 698 18 0 8 0 680 drv_uart.o + 510 28 0 4 0 1452 drv_vidc.o + 156 22 0 12 0 316 drv_wdg.o + 3178 308 72 8 192 1760 hal_dsi_rx_ctrl.o + 4312 278 0 1 72 2384 hal_dsi_tx_ctrl.o + 450 48 210 0 0 752 hal_gpio.o + 212 40 0 1 0 340 hal_i2c_master.o + 544 76 0 28 0 400 hal_i2c_slave.o + 6580 1504 308 4 2392 2264 hal_internal_vsync.o + 14 0 0 0 0 68 hal_spi_master.o + 580 32 0 0 32 136 hal_spi_slave.o + 196 32 0 0 0 408 hal_system.o + 106 6 0 0 0 140 hal_timer.o + 156 18 0 0 208 144 hal_uart.o + 1076 324 0 0 192 1980 irq_redirect .o + 48 10 0 18 0 68 norflash.o + 58 0 0 0 0 128 tau_delay.o + 60 10 0 0 256 156 tau_log.o + 1536 60 5287 287 0 17772 app_tp_for_custom_s8.o + 200 20 0 0 0 76 ceil.o + 72 6 0 0 0 76 sqrt.o + 86 0 0 0 0 0 __dczerorl2.o + 0 0 0 0 0 0 entry.o + 0 0 0 0 0 0 entry10a.o + 0 0 0 0 0 0 entry11a.o + 8 4 0 0 0 0 entry2.o + 4 0 0 0 0 0 entry5.o + 0 0 0 0 0 0 entry7b.o + 0 0 0 0 0 0 entry8b.o + 8 4 0 0 0 0 entry9a.o + 12 6 0 4 0 60 errno.o + 30 0 0 0 0 0 handlers.o + 40 0 0 0 0 72 idiv.o + 36 8 0 0 0 68 init.o + 0 0 0 0 0 0 iusefp.o + 32 0 0 0 0 68 llshl.o + 38 0 0 0 0 68 llsshr.o + 34 0 0 0 0 68 llushr.o + 36 0 0 0 0 60 memcpya.o + 36 0 0 0 0 100 memseta.o + 2298 104 0 0 0 544 printfa.o + 0 0 0 4 0 0 stdout.o + 44 0 0 0 0 72 uidiv.o + 96 0 0 0 0 84 uldiv.o + 40 2 0 0 0 68 cdcmple.o + 40 2 0 0 0 68 cdrcmple.o + 20 0 0 0 0 68 cfrcmple.o + 356 4 0 0 0 140 dadd.o + 240 6 0 0 0 84 ddiv.o + 236 0 0 0 0 216 depilogue.o + 72 10 0 0 0 72 dfixi.o + 60 10 0 0 0 68 dfixui.o + 64 10 0 0 0 68 dfixul.o + 28 4 0 0 0 68 dfltui.o + 208 6 0 0 0 88 dmul.o + 162 0 0 0 0 80 dsqrt.o + 40 0 0 0 0 60 f2d.o + 178 0 0 0 0 108 fadd.o + 124 0 0 0 0 72 fdiv.o + 130 0 0 0 0 144 fepilogue.o + 50 0 0 0 0 60 ffixi.o + 40 0 0 0 0 60 ffixui.o + 22 0 0 0 0 68 fflti.o + 14 0 0 0 0 68 ffltui.o + 122 0 0 0 0 72 fmul.o + 24 0 0 0 0 60 fscalb.o + + ---------------------------------------------------------------------- + 36456 4678 6300 1740 7900 51916 Library Totals + 56 0 5 11 0 0 (incl. Padding) + + ---------------------------------------------------------------------- + + Code (inc. data) RO Data RW Data ZI Data Debug Library Name + + 29484 4412 1008 1434 7900 30868 CVWL568.lib + 1536 60 5287 287 0 17772 WL568_S21_NT37701_TP.lib + 272 26 0 0 0 152 m_ps.l + 2838 126 0 8 0 1264 mc_p.l + 2270 54 0 0 0 1860 mf_p.l + + ---------------------------------------------------------------------- + 36456 4678 6300 1740 7900 51916 Library Totals + + ---------------------------------------------------------------------- + +============================================================================== + + + Code (inc. data) RO Data RW Data ZI Data Debug + + 45052 5912 15972 2360 12408 101870 Grand Totals + 45052 5912 15972 1364 12408 101870 ELF Image Totals (compressed) + 45052 5912 15972 1364 0 0 ROM Totals + +============================================================================== + + Total RO Size (Code + RO Data) 61024 ( 59.59kB) + Total RW Size (RW Data + ZI Data) 14768 ( 14.42kB) + Total ROM Size (Code + RO Data + RW Data) 62388 ( 60.93kB) + +============================================================================== + diff --git a/project/Objects/WL568_S21_NT37701_20230403.bin b/project/Objects/WL568_S21_NT37701_20230403.bin new file mode 100644 index 0000000..cea0571 Binary files /dev/null and b/project/Objects/WL568_S21_NT37701_20230403.bin differ diff --git a/src/app/demo/ap_demo.c b/src/app/demo/ap_demo.c new file mode 100644 index 0000000..076bb42 --- /dev/null +++ b/src/app/demo/ap_demo.c @@ -0,0 +1,5155 @@ +/******************************************************************************* +* +* File: S20_demo.c +* Description: ϵͳļ +* Version: V0.1 +* Date: 2020-02-22 +* Author: Tempest + *******************************************************************************/ + +#include "ap_demo.h" +#include "ArmCM0.h" +#include "tau_device_datatype.h" +#include "tau_log.h" +#include "tau_operations.h" +#include "tau_common.h" +#include "tau_delay.h" +#include "hal_dsi_rx_ctrl.h" +#include "hal_dsi_tx_ctrl.h" +#include "hal_swire.h" +#include "hal_timer.h" +#include "hal_system.h" +#include "hal_gpio.h" +#include "hal_pwm.h" +#include "app_tp_st_touch.h" + + +#include "app_tp_transfer.h" +#ifdef LOG_TAG + #undef LOG_TAG +#endif +#define LOG_TAG "S21_demo" + +/*****************************************/ + +//S8 MIPIϢ +/* ֱ */ +#define INPUT_WIDTH 1080 +#define INPUT_HEIGHT 2400 +/* MIPI lane rate,video modeҪȷãcmd mode */ +#define INPUT_MIPI_LANE_RATE 1400000000// 1200000000 //898000000//1400000000 +/* ͼʽ */ +#define INPUT_COLOR_MODE DSI_RGB888 +/* ݸʽ(DSI_DATA_CMD_MODE , DSI_DATA_VIDEO_MODE) */ +#define INPUT_DATA_MODE DSI_DATA_CMD_MODE +/* mipi lane(DSI_RX_LANE_x xΪ1-4) */ +#define INPUT_MIPI_LANE_NUM DSI_LANE_4 +/* Ϊvideo mode ʱݸʽ */ +#define INPUT_VIDEO_MODEL DSI_NONBURST_EVENT +/* ͨ(0-3) */ +#define INPUT_VC DSI_VC_0 +/* ֡(60/90/120/144Hz) */ +#define INPUT_FRAME_RATE DSI_FRAME_RATE_120HZ +/* ǷDSCѹ */ +#define INPUT_COMPRESS true + + +#if AMOLED_NT37701_HX628 + /* ֱ */ + #define OUTPUT_WIDTH 1080 + #define OUTPUT_HEIGHT 2400 + /* ͨ(0-3) */ + #define OUTPUT_VC DSI_VC_0 + /* mipi lane(DSI_RX_LANE_x xΪ1-4) */ + #define OUTPUT_LANE_NUMBER DSI_LANE_4 + /* Ϊvideo mode ݸʽ */ + #define OUTPUT_VIDEO_MODEL DSI_BURST_MODE + #define OUTPUT_VSA 8 + /* VBP */ + #define OUTPUT_VBP 8 + /* VBP */ + #define OUTPUT_VFP 20 //70 + /* VSA */ + #define OUTPUT_HSA 8 + /* HBP */ + #define OUTPUT_HBP 10 //90 + /* HFP */ + #define OUTPUT_HFP 50 //99 //8 8 70 8 90 99 + + /* ʼģʽ */ + #define _CMD_TYPE DSI_CMD_TX_LP //0-HS,1-LP; + #define OUTPUT_FRAME_RATE 60 +#endif + +#define SWIRE_TIMER TIMER_NUM1 +#define TE_TIMER TIMER_NUM2 +#ifdef USE_FOR_SUMSUNG_S21 +#define ENABLE_TP_WAKE_UP true +#define SWIRE_MAX_NUM 24 +#else +#define SWIRE_MAX_NUM 20 +#endif +#if ENABLE_TP_WAKE_UP + #define POWER_IO_A IO_PAD_TD_LEDPWM /* ӦIOҪ */ + #define POWER_IO_B IO_PAD_TD_SPIM_MISO /* ӦIOҪ */ +#endif +//#define DISPLAY_ONLY +//#define CUS_SCLD_FILTER true +#define NEW_ACK_CMD_FUNC true + + +/******************************************************/ +static hal_dsi_rx_ctrl_handle_t *g_rx_ctrl_handle = NULL; +static hal_dsi_tx_ctrl_handle_t *g_tx_ctrl_handle = NULL; + +#ifdef USE_FOR_SUMSUNG_S21 +//S20 SWIRE=50->ELVSS=-1.7V +#define SWIRE_DEFAULT_NUM 50 +#else +#define SWIRE_DEFAULT_NUM 38 +#endif + +#define ADD_TP_CALIBRATION 1 +#define AUTO_CAL_TP 0 +#define RUN_TEST 0 + +#if ADD_TP_CALIBRATION +static volatile bool g_calibration_flag = false; +#endif + +#if RUN_TEST +static uint8_t g_run_test_cnt = 0; //leo +#endif + +#if AUTO_CAL_TP +static uint16_t g_cal_cnt = 300; //3sʱTPУ׼ +#endif + +static uint8_t swire_num=SWIRE_DEFAULT_NUM; +static uint8_t swire_num_bak=SWIRE_DEFAULT_NUM; + +/* Ĭfalse,ʼ־λ,ʹTP1.8V,AC ʼҪTP1.8Vе */ +static volatile bool start_display_on = true; +static bool g_need_enter_sleep_mode = false; +static bool g_exit_sleep_mode = false; +static bool S21_G991B_frame_update = false; + + + +/* ʼɱ־λ */ +static bool panel_display_done = false; +//static bool g_panel_init_done = false; +static volatile bool g_resolution_change = false; +static void swire_init(void); +void Gpio_swire_output(uint8_t flag, uint8_t num); + +#ifdef USE_FOR_SUMSUNG_S21 +extern uint8_t Flag_blacklight_EN; +extern uint8_t tp_sleep_in; +extern uint8_t tp_sleep_count; +uint8_t phone_start_flag=0; +uint16_t phone_DisplayOFF_count=0; +uint8_t phone_DisplayOFF_flag=0; +#endif + + + +/// ȽϺ +uint32_t rx_filter_1080_h_4_96[32][2] = +{ + 0xB029EC0A, 0x0000000F, + 0x904DF003, 0x0000000F, + 0x6871F9FB, 0x0000000F, + 0x4899FBF4, 0x0000000F, + 0x28C1FDED, 0x0000000F, + 0x08EDFBE7, 0x0000000F, + 0xE119FDE0, 0x0000000E, + 0xC145F9DB, 0x0000000E, + 0xA175F3D6, 0x0000000E, + 0x81A9EBD1, 0x0000000E, + 0x69D9E1CD, 0x0000000E, + 0x520DD5C9, 0x0000000E, + 0x3A3DC7C7, 0x0000000E, + 0x2A71B7C4, 0x0000000E, + 0x1A9DA7C3, 0x0000000E, + 0x12CD93C2, 0x0000000E, + 0x12F97DC2, 0x0000000E, + 0x132567C2, 0x0000000E, + 0x1B4D4FC3, 0x0000000E, + 0x236D39C5, 0x0000000E, + 0x3B8D1FC7, 0x0000000E, + 0x4BA907CA, 0x0000000E, + 0x6BC0EDCD, 0x0000000E, + 0x8BD4D5D0, 0x0000000E, + 0xB3E4BBD4, 0x0000000E, + 0xDBF0A3D8, 0x0000000E, + 0x03F88DDC, 0x0000000F, + 0x3BF477E1, 0x0000000F, + 0x6BF861E5, 0x0000000F, + 0xA3F44DE9, 0x0000000F, + 0xDBF039ED, 0x0000000F, + 0x1BE027F2, 0x00000000 +}; + + +uint32_t rx_filter_2400_v_4_96[32][2] = +{ + 0xB029EC0A, 0x0000000F, + 0x904DF003, 0x0000000F, + 0x6871F9FB, 0x0000000F, + 0x4899FBF4, 0x0000000F, + 0x28C1FDED, 0x0000000F, + 0x08EDFBE7, 0x0000000F, + 0xE119FDE0, 0x0000000E, + 0xC145F9DB, 0x0000000E, + 0xA175F3D6, 0x0000000E, + 0x81A9EBD1, 0x0000000E, + 0x69D9E1CD, 0x0000000E, + 0x520DD5C9, 0x0000000E, + 0x3A3DC7C7, 0x0000000E, + 0x2A71B7C4, 0x0000000E, + 0x1A9DA7C3, 0x0000000E, + 0x12CD93C2, 0x0000000E, + 0x12F97DC2, 0x0000000E, + 0x132567C2, 0x0000000E, + 0x1B4D4FC3, 0x0000000E, + 0x236D39C5, 0x0000000E, + 0x3B8D1FC7, 0x0000000E, + 0x4BA907CA, 0x0000000E, + 0x6BC0EDCD, 0x0000000E, + 0x8BD4D5D0, 0x0000000E, + 0xB3E4BBD4, 0x0000000E, + 0xDBF0A3D8, 0x0000000E, + 0x03F88DDC, 0x0000000F, + 0x3BF477E1, 0x0000000F, + 0x6BF861E5, 0x0000000F, + 0xA3F44DE9, 0x0000000F, + 0xDBF039ED, 0x0000000F, + 0x1BE027F2, 0x00000000 +}; +//////////////////////////////////////////////////////////// +// ˮƺһЩ + +uint32_t rx_filter_1080_h_4_line[32][2] = +{ + 0x0001FE00, 0x00000000, + 0x0021F000, 0x00000000, + 0x0041E000, 0x00000000, + 0x0061D000, 0x00000000, + 0x0081C000, 0x00000000, + 0x00A1B000, 0x00000000, + 0x00C1A000, 0x00000000, + 0x00E19000, 0x00000000, + 0x01018000, 0x00000000, + 0x01217000, 0x00000000, + 0x01416000, 0x00000000, + 0x01615000, 0x00000000, + 0x01814000, 0x00000000, + 0x01A13000, 0x00000000, + 0x01C12000, 0x00000000, + 0x01E11000, 0x00000000, + 0x02010000, 0x00000000, + 0x0220F000, 0x00000000, + 0x0240E000, 0x00000000, + 0x0260D000, 0x00000000, + 0x0280C000, 0x00000000, + 0x02A0B000, 0x00000000, + 0x02C0A000, 0x00000000, + 0x02E09000, 0x00000000, + 0x03008000, 0x00000000, + 0x03207000, 0x00000000, + 0x03406000, 0x00000000, + 0x03605000, 0x00000000, + 0x03804000, 0x00000000, + 0x03A03000, 0x00000000, + 0x03C02000, 0x00000000, + 0x03E01000, 0x00000000 +}; + + +uint32_t rx_filter_2400_v_4_line[32][2] = +{ + 0x0001FE00, 0x00000000, + 0x0021F000, 0x00000000, + 0x0041E000, 0x00000000, + 0x0061D000, 0x00000000, + 0x0081C000, 0x00000000, + 0x00A1B000, 0x00000000, + 0x00C1A000, 0x00000000, + 0x00E19000, 0x00000000, + 0x01018000, 0x00000000, + 0x01217000, 0x00000000, + 0x01416000, 0x00000000, + 0x01615000, 0x00000000, + 0x01814000, 0x00000000, + 0x01A13000, 0x00000000, + 0x01C12000, 0x00000000, + 0x01E11000, 0x00000000, + 0x02010000, 0x00000000, + 0x0220F000, 0x00000000, + 0x0240E000, 0x00000000, + 0x0260D000, 0x00000000, + 0x0280C000, 0x00000000, + 0x02A0B000, 0x00000000, + 0x02C0A000, 0x00000000, + 0x02E09000, 0x00000000, + 0x03008000, 0x00000000, + 0x03207000, 0x00000000, + 0x03406000, 0x00000000, + 0x03605000, 0x00000000, + 0x03804000, 0x00000000, + 0x03A03000, 0x00000000, + 0x03C02000, 0x00000000, + 0x03E01000, 0x00000000 +}; + + + +uint32_t s_heartbeat = 0; + + + +#if ENABLE_TP_WAKE_UP +static void ap_reset_cb(void *data) +{ + /* лԴ */ + // hal_gpio_set_output_data_ex(POWER_IO_B, IO_LVL_HIGH, POWER_IO_A, IO_LVL_LOW); + /* VCC */ + TAU_LOGD("disable reset!!!!!!!!!!!!!\n"); + //delayMs(20); + hal_system_set_pvd(true); + hal_system_set_vcc(true); + NVIC_SystemReset(); +} +#endif + + +static bool ap_dcs_read(uint8_t data_type, uint8_t dcs_cmd, uint8_t param) +{ +#ifdef USE_FOR_SUMSUNG_S21 + + static uint8_t flag_0a = 0; + static uint8_t flag_5a = 0; + static uint8_t flag_c9_43 = 0; + +#if 0 + uint32_t return_size = hal_dsi_rx_ctrl_get_max_ret_size(g_rx_ctrl_handle); + //1Ż list + // 0x0a 3 0x1C 0x03 0x00 0x16 0x9F 0x9F 0x9F 0x66 0x0C + // 0x0f 1 0x21 0xC0 0x00 0x14 + // 0x87 1 0x21 0x00 0x00 0x12 + // 0xfe 1 0x21 0x10 0x00 0x34 + // 0x7f 4 0x1C 0x04 0x00 0x33 0x9B 0x33 0xB9 0x6E 0x3F 0x23 + // 0x5a 41 0x1C 0x29 0x00 0x06 0x01 0x00 0x01 0x00 0x00 0x00 0x00 0x00 0x03 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x84 0xA0 + //?0x5a 41 0x1C 0x29 0x00 0x06 0x01 0x00 0x03 0x00 0x7D 0x01 0xFF 0x00 0x03 0x01 0xFF 0x00 0xED 0x00 0xF6 0x01 0x00 0x00 0x9B 0x00 0xAC 0x00 0xBB 0x00 0x9B 0x00 0xAC 0x00 0xBB 0x00 0x9B 0x00 0xAC 0x00 0xBB 0x00 0x9B 0x00 0xAC 0x00 0xBB 0x1E 0x33 + // 0x0a 3 0x1C 0x03 0x00 0x16 0x9B 0x9B 0x9B 0x43 0x4E + // 0x0e 3 0x1C 0x03 0x00 0x16 0x80 0x80 0x80 0x1B 0x3D + // 0xea 5 0x1C 0x05 0x00 0x29 0x00 0x00 0x00 0x00 0x00 0x88 0x30 + // 0xee 1 0x21 0x00 0x00 0x12 + // 0x05 1 0x21 0x00 0x00 0x12 + // 0x0f 1 0x21 0xC0 0x00 0x14 + if (dcs_cmd == 0x0A) + { + if (return_size == 3) + { + if (flag_0a == 0) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 3, 0x9F,0x9F,0x9F); + flag_0a = 1; + } + else + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 3, 0x9B,0x9B,0x9B); + } + } + else + { + TAU_LOGD("r[%x] [%d] err\r\n", dcs_cmd, return_size); + } + } + else if (dcs_cmd == 0x0F) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, + DSI_VC_0, + 1, 0xC0); + } + else if (dcs_cmd == 0x87) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, + DSI_VC_0, + 1, 0x00); + } + else if (dcs_cmd == 0xFE) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, + DSI_VC_0, + 1, 0x10); + } + else if (dcs_cmd == 0x7F) + { + if (return_size == 4) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 4, 0x9B,0x33,0xB9,0x6E); + } + else{ + TAU_LOGD("r[%x] [%d] err\r\n", dcs_cmd, return_size); + } + } + else if (dcs_cmd == 0x5A) + { + if (flag_5a == 0) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 41, + 0x01,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x03,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00); + flag_5a = 1; + } + else + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 41, + 0x01,0x00,0x03,0x00,0x7D,0x01,0xFF,0x00,0x03,0x01,0xFF,0x00,0xED,0x00,0xF6,0x01, + 0x00,0x00,0x9B,0x00,0xAC,0x00,0xBB,0x00,0x9B,0x00,0xAC,0x00,0xBB,0x00,0x9B,0x00, + 0xAC,0x00,0xBB,0x00,0x9B,0x00,0xAC,0x00,0xBB); + } + } + else if(dcs_cmd == 0x0E) + { + if (return_size == 3) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 3, 0x80,0x80,0x80); + } + else + { + TAU_LOGD("r[%x] [%d] err\r\n", dcs_cmd, return_size); + } + } + else if(dcs_cmd == 0xEA) + { + if (return_size == 5) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 5, 0x00,0x00,0x00,0x00,0x00); + } + else + { + TAU_LOGD("r[%x] [%d] err\r\n", dcs_cmd, return_size); + } + } + else if(dcs_cmd == 0xEE) + { + if (return_size == 1) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, + DSI_VC_0, + 1, 0x00); + } + else + { + TAU_LOGD("r[%x] [%d] err\r\n", dcs_cmd, return_size); + } + } + else if(dcs_cmd == 0x05) + { + if (return_size == 1) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, + DSI_VC_0, + 1, 0x00); + } + else + { + TAU_LOGD("r[%x] [%d] err\r\n", dcs_cmd, return_size); + } + } + else + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, + DSI_VC_0, + 1, 0); + TAU_LOGD("r[%x] [%d] err!!!!!!\r\n", dcs_cmd, return_size); + } + return true; +#endif + + uint32_t return_size = hal_dsi_rx_ctrl_get_max_ret_size(g_rx_ctrl_handle); +// TAU_LOGD("dcs [%x] [%d]!\r\n", dcs_cmd, return_size); + + + if (dcs_cmd == 0xDA) + { + uint32_t return_size = hal_dsi_rx_ctrl_get_max_ret_size(g_rx_ctrl_handle); + + if (return_size == 1) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, + DSI_VC_0, + 0x1, 0xA1); + } + else + { + TAU_LOGD("r[%x] [%d] err\r\n", dcs_cmd, return_size); + } + } + else if (dcs_cmd == 0xDB) + { + uint32_t return_size = hal_dsi_rx_ctrl_get_max_ret_size(g_rx_ctrl_handle); + + if (return_size == 1) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, + DSI_VC_0, + 0x1, 0x01); + } + else + { + TAU_LOGD("r[%x] [%d] err\r\n", dcs_cmd, return_size); + } + } + else if (dcs_cmd == 0xDC) + { + uint32_t return_size = hal_dsi_rx_ctrl_get_max_ret_size(g_rx_ctrl_handle); + + if (return_size == 1) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, + DSI_VC_0, + 0x1, 0x04); + } + else + { + TAU_LOGD("r[%x] [%d] err\r\n", dcs_cmd, return_size); + } + } + else if (dcs_cmd == 0x0A) + { + uint32_t return_size = hal_dsi_rx_ctrl_get_max_ret_size(g_rx_ctrl_handle); + + if (return_size == 1) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, + DSI_VC_0, + 1, 0x9F); + } + else if(return_size == 3) + { + //leo add + if (flag_0a == 0) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 3, 0x9F,0x9F,0x9F); + flag_0a = 1; + } + else + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 3, 0x9B,0x9B,0x9B); + } + } + else + { + TAU_LOGD("r[%x] [%d] err\r\n", dcs_cmd, return_size); + } + } + else if (dcs_cmd == 0x0E) + { + uint32_t return_size = hal_dsi_rx_ctrl_get_max_ret_size(g_rx_ctrl_handle); + + if (return_size == 1) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, + DSI_VC_0, + 0x1, 0x81); + } + else if (return_size == 3) + { + //leo add + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 3, 0x80,0x80,0x80); + } + else + { + TAU_LOGD("r[%x] [%d] err\r\n", dcs_cmd, return_size); + } + } + else if (dcs_cmd == 0x0F) + { + + // TAU_LOGD("DCS 0x0F Found!\r\n"); + S21_G991B_frame_update = true; + //leo add + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, + DSI_VC_0, + 1, 0xC0); + } + else if (dcs_cmd == 0xEE) + { + uint32_t return_size = hal_dsi_rx_ctrl_get_max_ret_size(g_rx_ctrl_handle); + + if (return_size == 1) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, + DSI_VC_0, + 0x1, 0x00); + } + else + { + TAU_LOGD("r[%x] [%d] err\r\n", dcs_cmd, return_size); + } + } + else if (dcs_cmd == 0x03) + { + uint32_t return_size = hal_dsi_rx_ctrl_get_max_ret_size(g_rx_ctrl_handle); + + if (return_size == 1) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, + DSI_VC_0, + 0x1, 0x01); + } + else + { + TAU_LOGD("r[%x] [%d] err\r\n", dcs_cmd, return_size); + } + } + else if (dcs_cmd == 0x04) + { + //leo add + uint32_t return_size = hal_dsi_rx_ctrl_get_max_ret_size(g_rx_ctrl_handle); + if (return_size == 3) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 3, 0xA1,0x01,0x04); + } + else + { + TAU_LOGD("r[%x] [%d] err\r\n", dcs_cmd, return_size); + } + } + else if (dcs_cmd == 0x05) + { + uint32_t return_size = hal_dsi_rx_ctrl_get_max_ret_size(g_rx_ctrl_handle); + + if (return_size == 1) + { +// hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +// DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, +// DSI_VC_0, +// 0x1, 0x01); + + //leo change + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, + DSI_VC_0, + 1, 0x00); + } + else + { + TAU_LOGD("r[%x] [%d] err\r\n", dcs_cmd, return_size); + } + } + else if (dcs_cmd == 0x5A) + { + //leo add + if (flag_5a == 0) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 41, + 0x01,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x03,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00); + flag_5a = 1; + } + else + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 41, + 0x01,0x00,0x03,0x00,0x7D,0x01,0xFF,0x00,0x03,0x01,0xFF,0x00,0xED,0x00,0xF6,0x01, + 0x00,0x00,0x9B,0x00,0xAC,0x00,0xBB,0x00,0x9B,0x00,0xAC,0x00,0xBB,0x00,0x9B,0x00, + 0xAC,0x00,0xBB,0x00,0x9B,0x00,0xAC,0x00,0xBB); + } + } + else if (dcs_cmd == 0x87) + { + //leo add + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, + DSI_VC_0, + 1, 0x00); + } + else if (dcs_cmd == 0xFE) + { + //leo add + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, + DSI_VC_0, + 1, 0x10); + } + else if (dcs_cmd == 0x7F) + { + uint32_t return_size = hal_dsi_rx_ctrl_get_max_ret_size(g_rx_ctrl_handle); + + if (return_size == 10) + { + static uint8_t ret_7f_count = 0; + + if (ret_7f_count == 0) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 10, 0x40,0x04,0x00,0x00,0x00,0x00,0x9B,0x33,0xB9,0x6E); + ret_7f_count = 1; + } + else if (ret_7f_count == 1) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 10, 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00); + ret_7f_count = 2; + } + else if (ret_7f_count == 2) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 10, 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00); + ret_7f_count = 0; + } + } + else if (return_size == 4) + { + //leo add + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 4, 0x9B,0x33,0xB9,0x6E); + } + else if (return_size == 3) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 3, 0xFF,0x00,0x00); + + } + else + { + TAU_LOGD("r[%x] [%d] err\r\n", dcs_cmd, return_size); + } + } + else if (dcs_cmd == 0xE9) + { + uint32_t return_size = hal_dsi_rx_ctrl_get_max_ret_size(g_rx_ctrl_handle); + + if (return_size == 1) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, + DSI_VC_0, + 0x1, 0x04); //////// + } + else if (return_size == 2) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_SHORT_RESPONSE_2B, + DSI_VC_0, + 2, 0x04, 0x00); + + } + else if (return_size == 5) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 5, 0x04, 0x00, 0x00, 0x00, 0x00); + + } + else + { + TAU_LOGD("r[%x] [%d] err\r\n", dcs_cmd, return_size); + } + } + else if (dcs_cmd == 0xA1) + { + uint32_t return_size = hal_dsi_rx_ctrl_get_max_ret_size(g_rx_ctrl_handle); + + if (return_size == 10) + { + static uint8_t ret_a1_count = 0; + + if (ret_a1_count == 0) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 10, 0x0B,0xED,0x0C,0x8E,0xA4,0x0A,0x0E,0x0D,0x21,0x16); + ret_a1_count = 1; + } + else if (ret_a1_count == 1) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 10, 0x30,0x01,0x01,0xFB,0x41,0x34,0x58,0x54,0x33,0x53); + ret_a1_count = 2; + } + else if (ret_a1_count == 2) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 10, 0x41,0x33,0x37,0x38,0x4A,0x42,0x46,0x32,0x34,0x32); + ret_a1_count = 0; + } + } + else if (return_size == 20) + { + //leo add + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 20, + 0x30,0x01,0x01,0xF9,0x41,0x34,0x58,0x54,0x34,0x53,0x41,0x33,0x31,0x34,0x47,0x42, + 0x47,0x31,0x34,0x30); + } + else if (return_size == 7) + { + //leo add + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 7, 0xA5,0x02,0x06,0x2F,0x14,0x14,0xE0); + } + else if (return_size == 4) + { + //leo add + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 4, 0x0B,0xEF,0x0C,0x87); + } + else if (return_size == 1) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, + DSI_VC_0, + 1, 0x81); + } + else + { + TAU_LOGD("r[%x] [%d] err\r\n", dcs_cmd, return_size); + } + } + else if (dcs_cmd == 0xA2) + { + static uint8_t ret_a2_count = 0; + uint32_t return_size = hal_dsi_rx_ctrl_get_max_ret_size(g_rx_ctrl_handle); + + if (return_size == 10) + { + if (ret_a2_count == 0) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 10, 0x11,0x00,0x00,0x89,0x30,0x80,0x09,0x60,0x04,0x38); + } + else if (ret_a2_count == 1) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 10, 0x00,0x78,0x02,0x1C,0x02,0x1C,0x02,0x00,0x02,0x0E); + } + else if (ret_a2_count == 2) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 10, 0x00,0x20,0x0B,0xAF,0x00,0x07,0x00,0x0C,0x00,0xCF); + } + else if (ret_a2_count == 3) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 10, 0x00,0xD9,0x18,0x00,0x10,0xF0,0x03,0x0C,0x20,0x00); + } + else if (ret_a2_count == 4) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 10, 0x06,0x0B,0x0B,0x33,0x0E,0x1C,0x2A,0x38,0x46,0x54); + } + else if (ret_a2_count == 5) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 10, 0x62,0x69,0x70,0x77,0x79,0x7B,0x7D,0x7E,0x01,0x02); + } + else if (ret_a2_count == 6) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 10, 0x01,0x00,0x09,0x40,0x09,0xBE,0x19,0xFC,0x19,0xFA); + } + else if (ret_a2_count == 7) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 10, 0x19,0xF8,0x1A,0x38,0x1A,0x78,0x1A,0xB6,0x2A,0xF6); + } + ret_a2_count++; + if (ret_a2_count >7) + ret_a2_count =0; + } + else if (return_size == 9) + { + ret_a2_count =0; + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 9, 0x2B,0x34,0x2B,0x74,0x3B,0x74,0x6B,0xF4,0x00); + + } + else + { + TAU_LOGD("r[%x] [%d] err\r\n", dcs_cmd, return_size); + } + } else if (dcs_cmd == 0xD6) + { + uint32_t return_size = hal_dsi_rx_ctrl_get_max_ret_size(g_rx_ctrl_handle); + + if (return_size == 5) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 5, 0x08,0x45,0x30,0x98,0xEE); + } + else + { + TAU_LOGD("r[%x] [%d] err\r\n", dcs_cmd, return_size); + } + } + else if (dcs_cmd == 0x9A) + { + uint32_t return_size = hal_dsi_rx_ctrl_get_max_ret_size(g_rx_ctrl_handle); + + if (return_size == 4) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 4, 0x2D, 0xEA, 0x6B, 0x43); + } + else + { + TAU_LOGD("r[%x] [%d] err\r\n", dcs_cmd, return_size); + } + + } + else if (dcs_cmd == 0xC6) + { + uint32_t return_size = hal_dsi_rx_ctrl_get_max_ret_size(g_rx_ctrl_handle); + + if(return_size == 10) + { + static uint8_t ret_c6_count = 0; + + if (ret_c6_count == 0) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 10, 0x01,0x08,0x05,0x00,0x10,0x20,0x05,0x0E,0x93,0xF5); + ret_c6_count = 1; + } + else if (ret_c6_count == 1) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 10, 0x2A,0x0E,0xE4,0x11,0x2E,0x10,0xA4,0x41,0x45,0x11); + ret_c6_count = 2; + } + else if (ret_c6_count == 2) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 10, 0xF4,0x7D,0x60,0x14,0x14,0xD5,0x81,0x17,0xD5,0x91); + ret_c6_count = 3; + } + else if (ret_c6_count == 3) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 10, 0xC1,0x1D,0xD6,0xC2,0x1F,0x28,0x19,0x1E,0xDB,0x28); + ret_c6_count = 0; + } + } + else if (return_size == 3) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 3, 0x19,0x1E,0xDB); + } + else if (return_size == 1) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, + DSI_VC_0, + 1, 0x55); + } + else + { + TAU_LOGD("r[%x] [%d] err\r\n", dcs_cmd, return_size); + } + } + else if (dcs_cmd == 0xC7) + { + uint32_t return_size = hal_dsi_rx_ctrl_get_max_ret_size(g_rx_ctrl_handle); + if (return_size == 10) + { + static uint8_t ret_c7_count = 0; + + if (ret_c7_count == 0) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 10, 0x0E,0x0E,0x0E,0x07,0xA2,0x0C,0xA2,0x08,0xF2,0x38); + ret_c7_count = 1; + } + else if (ret_c7_count == 1) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 10, 0xBC,0x0A,0x72,0x74,0xD6,0x0E,0x63,0x39,0x17,0x11); + ret_c7_count = 2; + } + else if (ret_c7_count == 2) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 10, 0x03,0xD1,0x45,0x13,0xF4,0x7D,0x77,0x18,0x85,0x8D); + ret_c7_count = 3; + } + else if (ret_c7_count == 3) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 10, 0xC7,0x1E,0xE7,0x02,0x34,0x28,0x19,0x1E,0xDB,0x28); + ret_c7_count = 0; + } + } + else if (return_size == 3) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 3, 0x19,0x1E,0xDB); + } + else + { + TAU_LOGD("r[%x] [%d] err\r\n", dcs_cmd, return_size); + } + } + else if (dcs_cmd == 0xB5) + { + uint32_t return_size = hal_dsi_rx_ctrl_get_max_ret_size(g_rx_ctrl_handle); + + if (return_size == 2) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_SHORT_RESPONSE_2B, + DSI_VC_0, + 2, 0x14, 0x03); + } + else + { + TAU_LOGD("r[%x] [%d] err\r\n", dcs_cmd, return_size); + } + + } + else if (dcs_cmd == 0xB8) + { + uint32_t return_size = hal_dsi_rx_ctrl_get_max_ret_size(g_rx_ctrl_handle); + + if (return_size == 2) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_SHORT_RESPONSE_2B, + DSI_VC_0, + 2, 0xC0, 0xB2); + } + else + { + TAU_LOGD("r[%x] [%d] err\r\n", dcs_cmd, return_size); + } + + } + else if (dcs_cmd == 0xC8) + { + uint32_t return_size = hal_dsi_rx_ctrl_get_max_ret_size(g_rx_ctrl_handle); + + if (return_size == 10) + { + static uint8_t ret_c8_count = 0; + + if (ret_c8_count == 0) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 10, 0x20,0x32,0x39,0x45,0x6E,0x5E,0x60,0x5F,0x5E,0x5F); + ret_c8_count = 1; + } + else if (ret_c8_count == 1) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 10, 0x5F,0x48,0x4A,0x4A,0x4E,0x50,0x50,0x5D,0x5F,0x5E); + ret_c8_count = 2; + } + else if (ret_c8_count == 2) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 10, 0x57,0x5B,0x58,0x42,0x52,0x44,0x5C,0x6E,0x5C,0x2B); + ret_c8_count = 0; + } + } + else if (return_size == 7) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 4, 0x8A,0x14,0x00,0x2B,0x34,0x23,0xC8); + } + else if (return_size == 4) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 4, 0x8A,0x14,0x00,0x2B); + } + else if (return_size == 2) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_SHORT_RESPONSE_2B, + DSI_VC_0, + 1, 0x66,0x23); + } + else + { + TAU_LOGD("r[%x] [%d] err\r\n", dcs_cmd, return_size); + } + } + else if (dcs_cmd == 0xC9) + { + uint32_t return_size = hal_dsi_rx_ctrl_get_max_ret_size(g_rx_ctrl_handle); + if (return_size == 10) + { + static uint8_t ret_c9_count = 0; + + if (ret_c9_count == 0) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 10, 0x14,0x14,0x14,0x0D,0x73,0xB5,0x0F,0x0D,0xF3,0xC9); + ret_c9_count = 1; + } + else if (ret_c9_count == 1) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 10, 0x13,0x0E,0x93,0xDD,0x1B,0x10,0x74,0x0D,0x39,0x12); + ret_c9_count = 2; + } + else if (ret_c9_count == 2) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 10, 0x24,0x61,0x59,0x14,0x74,0xC9,0x7F,0x18,0x75,0xAD); + ret_c9_count = 3; + } + else if (ret_c9_count == 3) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 10, 0xC7,0x1E,0x86,0xF6,0x2E,0x28,0x19,0x1E,0xDB,0x28); + ret_c9_count = 0; + } + } + else if (return_size == 39) + { + //leo add + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 39, + 0x0F,0x0F,0x0F,0x04,0x41,0x24,0x66,0x09,0x82,0x34,0xBC,0x0B,0x32,0x88,0xD9,0x0F, + 0x23,0x69,0x20,0x12,0x04,0x15,0x51,0x15,0x04,0xC1,0x84,0x19,0xF5,0xE1,0xD7,0x20, + 0xA7,0x76,0x50,0x25,0xF8,0xA6,0xAD); + } + else if (return_size == 43) + { + //leo add + if (flag_c9_43 == 0){ + flag_c9_43++; + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 39, + 0x17,0x17,0x17,0x08,0x62,0x20,0xA2,0x0A,0x02,0x60,0xC2,0x0B,0x42,0x94,0xDA,0x0E, + 0xA3,0x45,0x17,0x11,0x43,0xD9,0x44,0x13,0xE4,0x75,0x73,0x18,0x55,0x7D,0xBE,0x1E, + 0x46,0xDA,0x25,0x22,0x77,0xD2,0x70,0x27,0x68,0xF6,0xC9); + } + else if (flag_c9_43 == 1){ + flag_c9_43++; + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 39, + 0x17,0x17,0x17,0x09,0x02,0x4C,0xAE,0x0A,0x62,0x78,0xC7,0x0B,0x72,0xA4,0xDC,0x0E, + 0xB3,0x55,0x17,0x11,0x33,0xD9,0x43,0x13,0xE4,0x75,0x71,0x17,0xF5,0x75,0xBC,0x1E, + 0x56,0xEA,0x28,0x27,0x88,0xFE,0xCC,0x27,0x88,0xFE,0xCC); + } + + + + else if (flag_c9_43 == 2){ //-- + flag_c9_43++; + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 39, + 0x17,0x17,0x17,0x0A,0xB2,0xC8,0xCE,0x0B,0xA2,0xEC,0xDE,0x0C,0x73,0x04,0xED,0x0F, + 0x13,0x81,0x1E,0x11,0x53,0xF5,0x47,0x13,0xF4,0x85,0x73,0x18,0x15,0x7D,0xBD,0x1E, + 0x56,0xE2,0x27,0x27,0x88,0xFE,0xCC,0x27,0x88,0xFE,0xCC); + } + else if (flag_c9_43 == 3){ + flag_c9_43++; + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 39, + 0x17,0x17,0x17,0x0C,0x43,0x4C,0xEC,0x0C,0xE3,0x60,0xF7,0x0D,0x93,0x71,0x01,0x0F, + 0xB3,0xBD,0x28,0x11,0xB4,0x1D,0x4C,0x14,0x24,0x99,0x75,0x18,0x05,0x89,0xBD,0x1E, + 0x36,0xDE,0x25,0x27,0x88,0xFE,0xCC,0x27,0x88,0xFE,0xCC); + } + else if (flag_c9_43 == 4){ + flag_c9_43++; + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 39, + 0x17,0x17,0x17,0x0D,0xB3,0xC1,0x11,0x0E,0x53,0xD5,0x16,0x0E,0xF3,0xE9,0x1D,0x10, + 0xA4,0x1D,0x38,0x12,0x44,0x5D,0x56,0x14,0x64,0xC1,0x7B,0x18,0x15,0x99,0xC0,0x1E, + 0x26,0xDE,0x23,0x27,0x88,0xFE,0xCC,0x27,0x88,0xFE,0xCC); + } + else + { + TAU_LOGD("C9----- r[%x] [%d] [%d]err\r\n", dcs_cmd, return_size, flag_c9_43); + } + } + else if (return_size == 4) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 4, 0x28,0x19,0x1E,0xDB); + } + else if (return_size == 3) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 3, 0x19,0x1E,0xDB); + } + else + { + TAU_LOGD("r[%x] [%d] err\r\n", dcs_cmd, return_size); + } + } + else if(dcs_cmd == 0xEA) + { + + // TAU_LOGD("DCS 0xEA Found!\r\n"); + //leo add + uint32_t return_size = hal_dsi_rx_ctrl_get_max_ret_size(g_rx_ctrl_handle); + if (return_size == 5) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 5, 0x00,0x00,0x00,0x00,0x00); + } + else + { + TAU_LOGD("r[%x] [%d] err\r\n", dcs_cmd, return_size); + } + } + else if(dcs_cmd == 0x01) + { + ap_get_tp_calibration_status_01(g_rx_ctrl_handle,param); + } + else + { + TAU_LOGD("r %x ng need return [%d]\n", dcs_cmd, hal_dsi_rx_ctrl_get_max_ret_size(g_rx_ctrl_handle)); + } +/* + { + uint32_t return_size = hal_dsi_rx_ctrl_get_max_ret_size(g_rx_ctrl_handle); + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, + DSI_VC_0, + 1, 0); + TAU_LOGD("r[%x] [%d] err!!!!!!\r\n", dcs_cmd, return_size); + } + */ + return true; +#endif // USE_FOR_SUMSUNG_S21 + +} + + static bool ap_update_frame_rate(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +{ + static uint8_t frame_rate = 100; + //TAU_LOGD("TE Detected! frame_rate = %d, param[1]=%d\r\n", dcs_packet->packet_param[0], dcs_packet->packet_param[1]); + if( S21_G991B_frame_update == true){ + if (frame_rate != dcs_packet->packet_param[0]) + { + frame_rate = dcs_packet->packet_param[0]; + if (frame_rate == 0x00) + { + hal_dsi_rx_ctrl_set_tear_mode_ex(g_rx_ctrl_handle, 2400, TE_HW_MODE);//TE_SOFT_120HZ_MODE + } + else + { + hal_dsi_rx_ctrl_set_tear_mode_ex(g_rx_ctrl_handle, 2400, TE_SOFT_120HZ_MODE); //TE_SOFT_120HZ_MODE + } + //hal_dsi_rx_ctrl_set_tear_mode_ex(g_rx_ctrl_handle, 2200, TE_HW_MODE); + TAU_LOGD("Frame_rate:%02x\r\n",frame_rate); + } + } + return true; +} + +/* PPS update callback ڷֱлcase */ +static bool pps_update_handle(uint8_t *pps, uint8_t size, uint32_t pic_width, uint32_t pic_height) +{ + /* AVDD ϵ, ڽϢPPS */ + //TAU_LOGD("[%d, %d], [%d, %d]", pic_width, pic_height, g_rx_ctrl_handle->base_info.src_w, g_rx_ctrl_handle->base_info.src_h); + if (pic_width != g_rx_ctrl_handle->base_info.src_w || pic_height != g_rx_ctrl_handle->base_info.src_h) + { + /* PPS Update ҷֱʷ仯 */ + + g_rx_ctrl_handle->base_info.src_w = pic_width; + g_rx_ctrl_handle->base_info.src_h = pic_height; + /* עⲿֻPPSǰ Compression Mode Command */ + + + g_rx_ctrl_handle->compress_en = true; + + + + if(pic_width > 720) + { + g_tx_ctrl_handle->base_info.src_w = pic_width; + g_tx_ctrl_handle->base_info.src_h = pic_height; + } + hal_dsi_rx_ctrl_toggle_resolution(g_rx_ctrl_handle); + TAU_LOGD("resolution update w[%d] h[%d] compress[%d]\n", pic_width, pic_height, g_rx_ctrl_handle->compress_en); + } + TAU_LOGD("PPS Update\n"); + return true; +} + + +static bool ap_set_display_off(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +{ + hal_dsi_tx_ctrl_write_cmd(0x05, 0, 2, 0x28); + TAU_LOGD("disp off \n"); + return true; +} + +static bool ap_set_enter_sleep_mode(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +{ + hal_dsi_rx_ctrl_set_sw_tear_mode(g_rx_ctrl_handle); + + Gpio_swire_output(0, 0); + delayMs(50); + hal_dsi_tx_ctrl_write_cmd(0x05, 0, 2, 0x10); + delayMs(20); + hal_gpio_set_output_data(IO_PAD_PWMEN, IO_LVL_LOW); + + + //hal_dsi_tx_ctrl_panel_reset_pin(IO_LVL_LOW);//Reaet + + + TAU_LOGD("enter sleep mode\n"); +#if ENABLE_TP_WAKE_UP + g_need_enter_sleep_mode = true; +#endif + g_exit_sleep_mode = false; + + return true; +} + +static bool ap_set_display_on(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +{ + TAU_LOGD("disp on \n"); +// hal_dsi_tx_ctrl_write_cmd(0x05, 0, 2, 0x29); + + return true; +} + +static bool ap_set_exit_sleep_mode(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +{ + TAU_LOGD("exit sleep mode\n"); + g_exit_sleep_mode = true; + + hal_dsi_tx_ctrl_write_cmd(0x05, 0, 1, 0x22);//pixel off + delayMs(1);//16 + hal_dsi_rx_ctrl_toggle_resolution(g_rx_ctrl_handle); + hal_dsi_tx_ctrl_write_cmd(0x05, 0, 1, 0x13);//pixel on + + /* AVDD ϵ, ڽϢPPS */ + //hal_gpio_set_output_data(IO_PAD_PWMEN, IO_LVL_HIGH); + //hal_dsi_tx_ctrl_write_cmd(0x05, 0, 2, 0x11); + return true; +} + +/***************************************************************************** +*GPIOswire +*flag: =0, SWIRE=0; =1,SWIREź; =2, øٷSWIREź +*num: +*עFLAG=1ʱGPIOʼ!!!!!! +*****************************************************************************/ +void Gpio_swire_output(uint8_t flag, uint8_t num) +{ + uint8_t ii; + + if (flag) + { + if (flag ==2) + { + hal_gpio_init_output(IO_PAD_ADCIN, IO_LVL_HIGH); + delayMs(2); + } + for (ii =0; ii< num; ii++) + { + hal_gpio_set_output_data(IO_PAD_ADCIN, IO_LVL_LOW); + delayUs(10); + hal_gpio_set_output_data(IO_PAD_ADCIN, IO_LVL_HIGH); + delayUs(9); + } + } + else + { + hal_gpio_init_output(IO_PAD_ADCIN, IO_LVL_LOW); + } +} + + + +/* B1ص g_cus_rx_dcs_execute_table Ϊ첽ִУCAͬ*/ + +uint16_t value_reg_b1 =0; +uint16_t value_reg_ca =0; +//static uint32_t value_reg_b5 =0; +static uint32_t value_reg_df =0; +static uint8_t value_blue =0; +static uint8_t blue_flag =0; +#if 1 // +#define BLUE_MAX 0xF0 //ֵ +#define BLUE_MIN 0x86 //Сֵ +#define BLUE_STEP 10 //ȼ-1 +#endif + +#if 1//def USE_FOR_SUMSUNG_S21 +static uint32_t s20_power_on_flag =0; // >0: Ϊǡʱ +uint16_t value_reg_ca_bak =0; +uint16_t value_reg_b1_bak =0; +//#define USE_BL_ADJ6 //֮ǰS20ⷽʽ +#define USE_BL_ADJ7 //ĹS20ⷽʽ +#endif + + +static bool ap_set_backlight_51(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +{ + uint8_t cmd_data[2]; + + cmd_data[0] = dcs_packet->packet_param[0]; + cmd_data[1] = dcs_packet->packet_param[1]; + hal_dsi_tx_ctrl_write_cmd(0x39, 0, 3, 0x51, cmd_data[0], cmd_data[1]); + //TAU_LOGD("51:[%x]", (cmd_data[0]<<8)|cmd_data[1]); + return true; +} + +#if 0 // +static bool ap_set_backlight(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +{ + /* AP 0xC 0xb8d , ʱ0xC,ƽҪһŻ */ + uint8_t temp_u8; + + value_reg_b1 = (dcs_packet->packet_param[0] << 8) + dcs_packet->packet_param[1]; + TAU_LOGD("CA[%4x],B1[%4x] \n", value_reg_ca, value_reg_b1); + +#ifdef USE_BL_ADJ7 + +#ifdef ADD_PWM_OUTPUT_FOR_BL + if (value_reg_b1 &0x8000) + { + // 60Hz + if(value_reg_ca >0x15FE) + { + read_bl_data = 0xFF; + } + else if(value_reg_ca >=0x1550) + { + // value_reg_ca =0x1550Ӧ105(ǵ⼶Ϊ256) + read_bl_data = 105+(value_reg_ca-0x1550)*150/175; + } + else + { + //value_reg_b1_bak=0xC65~0x1E4Ӧ1~104 + if (value_reg_b1_bak>0xC65) + read_bl_data =1; + else if (value_reg_b1_bak<0x1E4) + read_bl_data =104; + else + read_bl_data = 1+(0xC65-value_reg_b1_bak)*103/2689; + } + } + else if (value_reg_b1 &0x4000) + { + // 120Hz + if(value_reg_ca >0x15AD) + { + read_bl_data = 0xFF; + } + else if(value_reg_ca >=0x150F) + { + // value_reg_ca =0x15AD~0x150FӦ256~109(ǵ⼶Ϊ256) + read_bl_data = 109+(value_reg_ca-0x150F)*146/158; + } + else + { + //value_reg_b1_bak=0xC54~0x1E4Ӧ1~108 + if (value_reg_b1_bak>0xC54) + read_bl_data =1; + else if (value_reg_b1_bak<0x1E4) + read_bl_data =108; + else + read_bl_data = 1+(0xC54-value_reg_b1_bak)*107/2672; + } + } + else + { + value_reg_b1_bak = value_reg_b1; + if ((value_reg_ca ==0x2A00) &&(value_reg_b1 >0x500)) + s20_power_on_flag =1; + else + s20_power_on_flag =0; + } + + +#else + if (value_reg_b1 &0x8000) + { + //Ϊ60Hz + if(value_reg_ca >0x15FC) + { + swire_num = SWIRE_MAX_NUM; + } + else if(value_reg_ca >0x15ED) + { + swire_num = SWIRE_MAX_NUM+1; + } + else if(value_reg_ca >0x15DD) + { + swire_num = SWIRE_MAX_NUM+2; + } + else if(value_reg_ca >0x15CC) + { + swire_num = SWIRE_MAX_NUM+3; + } + else if(value_reg_ca >0x15BE) + { + swire_num = SWIRE_MAX_NUM+4; + } + else if(value_reg_ca >0x15AC) + { + swire_num = SWIRE_MAX_NUM+5; + } + else if(value_reg_ca >0x159A) + { + swire_num = SWIRE_MAX_NUM+6; + } + else if(value_reg_ca >0x155E) + { + swire_num = SWIRE_MAX_NUM+7; + } + else + { + if(value_reg_b1_bak <0x500) + { + swire_num = SWIRE_MAX_NUM+8; + } + else if(value_reg_b1_bak <0x900) + { + swire_num = SWIRE_MAX_NUM+9; + } + else if(value_reg_b1_bak <0xAE0) + { + swire_num = SWIRE_MAX_NUM+10; + } + else if(value_reg_b1_bak <0xBE8) + { + swire_num = SWIRE_MAX_NUM+11; + } + else if(value_reg_b1_bak <0xC38) + { + swire_num = SWIRE_MAX_NUM+12; + } + else + { + swire_num = SWIRE_MAX_NUM+13; + } + } + } + else if (value_reg_b1 &0x4000) + { + //Ϊ120Hz + if(value_reg_ca >0x15AC) + { + swire_num = SWIRE_MAX_NUM; + } + else if(value_reg_ca >0x159A) + { + swire_num = SWIRE_MAX_NUM+1; + } + else if(value_reg_ca >0x158B) + { + swire_num = SWIRE_MAX_NUM+2; + } + else if(value_reg_ca >0x157B) + { + swire_num = SWIRE_MAX_NUM+3; + } + else if(value_reg_ca >0x156A) + { + swire_num = SWIRE_MAX_NUM+4; + } + else if(value_reg_ca >0x1559) + { + swire_num = SWIRE_MAX_NUM+5; + } + else if(value_reg_ca >0x1547) + { + swire_num = SWIRE_MAX_NUM+6; + } + else if(value_reg_ca >0x1510) + { + swire_num = SWIRE_MAX_NUM+7; + } + else + { + if(value_reg_b1_bak <0x500) + { + swire_num = SWIRE_MAX_NUM+8; + } + else if(value_reg_b1_bak <0x900) + { + swire_num = SWIRE_MAX_NUM+9; + } + else if(value_reg_b1_bak <0xAE0) + { + swire_num = SWIRE_MAX_NUM+10; + } + else if(value_reg_b1_bak <0xBE8) + { + swire_num = SWIRE_MAX_NUM+11; + } + else if(value_reg_b1_bak <0xC38) + { + swire_num = SWIRE_MAX_NUM+12; + } + else + { + swire_num = SWIRE_MAX_NUM+13; + } + } + } + else + { + value_reg_b1_bak = value_reg_b1; + if ((value_reg_ca ==0x2A00) &&(value_reg_b1 >0x500)) + s20_power_on_flag =1; + else + s20_power_on_flag =0; + } + #if 0 + if (swire_num !=swire_num_bak) + { + swire_num_bak = swire_num; + printf("CA[%4x],B1[%4x]. swire_num[%d]\n", value_reg_ca, value_reg_b1,swire_num); + + } + #endif + +#endif + +#endif // // USE_BL_ADJ7 + +#ifdef USE_BL_ADJ6 + if ( (value_reg_b1 &0xC000) || ((value_reg_b1_bak == value_reg_b1)&&(value_reg_ca_bak == value_reg_ca))) + { + return true; + } + value_reg_b1_bak = value_reg_b1; + value_reg_ca_bak = value_reg_ca; + + if(value_reg_ca >0x15FC) + { + swire_num = SWIRE_MAX_NUM; + } + else if(value_reg_ca >0x15EC) + { + swire_num = SWIRE_MAX_NUM+1; + } + else if(value_reg_ca >0x15EC) + { + swire_num = SWIRE_MAX_NUM+2; + } + else if(value_reg_ca >0x15DD) + { + swire_num = SWIRE_MAX_NUM+3; + } + else if(value_reg_ca >0x15CC) + { + swire_num = SWIRE_MAX_NUM+4; + } + else if(value_reg_ca >0x15BE) + { + swire_num = SWIRE_MAX_NUM+5; + } + else if(value_reg_ca >0x15AC) + { + swire_num = SWIRE_MAX_NUM+7; + } + else if(value_reg_ca >0x159A) + { + swire_num = SWIRE_MAX_NUM+8; + } + else if(value_reg_ca >0x155E) + { + swire_num = SWIRE_MAX_NUM+9; + } + else + { + if(value_reg_b1 <0x500) + { + swire_num = SWIRE_MAX_NUM+10; + } + else if(value_reg_b1 <0x900) + { + swire_num = SWIRE_MAX_NUM+11; + } + else if(value_reg_b1 <0xAE0) + { + swire_num = SWIRE_MAX_NUM+12; + } + else if(value_reg_b1 <0xBE8) + { + swire_num = SWIRE_MAX_NUM+13; + } + else if(value_reg_b1 <0xC38) + { + swire_num = SWIRE_MAX_NUM+14; + } + else + { + swire_num = SWIRE_MAX_NUM+15; + } + } +// printf("CA[%4x],B1[%4x]. swire_num[%d]\n", value_reg_ca, value_reg_b1,swire_num); +#endif // // USE_BL_ADJ4 + + return true; +} +#endif + +static bool ap_get_reg_ca(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +{ + value_reg_ca = (dcs_packet->packet_param[0] << 8) + dcs_packet->packet_param[1]; + TAU_LOGD("CA[%x]", value_reg_ca); + + return true; +} + +#if 0 +static bool ap_get_reg_b5(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +{ + value_reg_b5 = (dcs_packet->packet_param[3] << 8) + dcs_packet->packet_param[2]; + TAU_LOGD("CA[%4x],B1[%4x],B5[%4x]", value_reg_ca,value_reg_b1,value_reg_b5);0 + + return true; +} +#endif + +#ifdef ADD_PANEL_DISPLAY_MODE +uint8_t panel_mode =1; // DFĴ100:ۿ,01:۹,11:3(ӰԺ/Ƭ/.Ŀǰû) +uint16_t panel_r,panel_g,panel_b; // ¼RGBֵ + +#ifdef USE_FOR_SUMSUNG_S9PLUS +#define RATIO_VALUE 2 //Żϵ +#else +#define RATIO_VALUE 2 //Żϵ +#endif + +#endif + +static bool ap_get_reg_df(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +{ + ccm_coef_t ccm; + ccm.coef_c00 = 255; + ccm.coef_c01 = 0; + ccm.coef_c02 = 0; + ccm.coef_c10 = 0; + ccm.coef_c11 = 255; + ccm.coef_c12 = 0; + ccm.coef_c20 = 0; + ccm.coef_c21 = 0; + ccm.coef_c22 = 255; + +#ifdef ADD_PANEL_DISPLAY_MODE + value_reg_df = (dcs_packet->packet_param[35] << 8) + dcs_packet->packet_param[33]; + panel_mode = dcs_packet->packet_param[0]; + panel_r =dcs_packet->packet_param[49]; + panel_g =dcs_packet->packet_param[51]; + panel_b =dcs_packet->packet_param[53]; +// TAU_LOGD("value_reg_df[%4x],panel_mode[%4x],panel_r[%4x],panel_g[%4x],panel_b[%4x]", value_reg_df,panel_mode,panel_r,panel_g,panel_b); + + if (panel_mode ==00) + { + //ģʽ + + #ifdef USE_FOR_S10_BLUE_MODE + //panel_r =256-RATIO_VALUE*(0xFF-panel_r); + //panel_g =256-RATIO_VALUE*(0xFF-panel_g); + //panel_b =256-RATIO_VALUE*(0xFF-panel_b); +// hal_dsi_rx_ctrl_set_cus_pq_gain(g_rx_ctrl_handle,panel_r,panel_g,panel_b); + ccm.coef_c00 = panel_r; + ccm.coef_c11 = panel_g; + ccm.coef_c22 = panel_b; + hal_dsi_tx_ctrl_set_ccm(ccm); + + #else + + value_reg_df =value_reg_df&0xFF; + switch(value_reg_df) + { + case 0xC1: + case 0xC3: + value_blue = BLUE_MIN; + break; + + case 0xCF: + case 0xD0: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)/BLUE_STEP; + break; + + case 0xD8: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*2/BLUE_STEP; + break; + + case 0xDE: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*3/BLUE_STEP; + break; + + case 0xE4: + case 0xE5: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*4/BLUE_STEP; + break; + + case 0xE9: + case 0xEA: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*5/BLUE_STEP; + break; + + case 0xED: + case 0xEE: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*6/BLUE_STEP; + break; + + case 0xF1: + case 0xF2: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*7/BLUE_STEP; + break; + + case 0xF4: + case 0xF5: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*8/BLUE_STEP; + break; + + case 0xF7: + case 0xF8: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*9/BLUE_STEP; + break; + + case 0xFA: + value_blue = BLUE_MAX; + break; + + default: + case 0xFF: + value_blue = 0; + break; + + } + hal_dsi_rx_ctrl_set_cus_pq_gain(g_rx_ctrl_handle,256,256,256); + hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0x84, value_blue); + + #endif + + } + else + { + #ifndef USE_FOR_S10_BLUE_MODE + value_blue =0; + hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0x84, value_blue); //ģʽs8+/s9+ + #endif + + //һ㣬ЧԡҪݿͻҪϸ + + panel_r =228-RATIO_VALUE*(0xFF-panel_r); + panel_g =238-RATIO_VALUE*(0xFF-panel_g); + panel_b =238-RATIO_VALUE*(0xFF-panel_b); +// hal_dsi_rx_ctrl_set_cus_pq_gain(g_rx_ctrl_handle,panel_r,panel_g,panel_b); + + ccm.coef_c00 = panel_r; + ccm.coef_c11 = panel_g; + ccm.coef_c22 = panel_b; + hal_dsi_tx_ctrl_set_ccm(ccm); + } + + #ifndef USE_FOR_S10_BLUE_MODE + if (blue_flag==0) + { + blue_flag =1; + delayMs(20); + hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0x84, value_blue); + } + #endif + +#else + value_reg_df = (dcs_packet->packet_param[35] << 8) + dcs_packet->packet_param[33]; + + value_reg_df =value_reg_df&0xFF; + switch(value_reg_df) + { + case 0xC1: + case 0xC3: + value_blue = BLUE_MIN; + break; + + case 0xCF: + case 0xD0: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)/BLUE_STEP; + break; + + case 0xD8: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*2/BLUE_STEP; + break; + + case 0xDE: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*3/BLUE_STEP; + break; + + case 0xE4: + case 0xE5: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*4/BLUE_STEP; + break; + + case 0xE9: + case 0xEA: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*5/BLUE_STEP; + break; + + case 0xED: + case 0xEE: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*6/BLUE_STEP; + break; + + case 0xF1: + case 0xF2: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*7/BLUE_STEP; + break; + + case 0xF4: + case 0xF5: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*8/BLUE_STEP; + break; + + case 0xF7: + case 0xF8: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*9/BLUE_STEP; + break; + + case 0xFA: + value_blue = BLUE_MAX; + break; + + default: + case 0xFF: + value_blue = 0; + break; + + } + + TAU_LOGD("df[%4x]", value_reg_df); + hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0x84, value_blue); + if (blue_flag==0) + { + blue_flag =1; + delayMs(20); + hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0x84, value_blue); + } +#endif + + return true; +} +/* +#if ADD_TP_CALIBRATION +static bool ap_set_tp_calibration_04(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +{ + if( (dcs_packet->packet_param[0] == 0x01) && (dcs_packet->packet_param[1] == 0x01) && (dcs_packet->packet_param[2] == 0x01) ) + { + g_calibration_flag = true; + } + return true; +} +#endif +*/ + +/* ƻDCS command */ +static const hal_dcs_execute_entry_t g_cus_rx_dcs_execute_table[] = +{ + {DCS_SET_DISPLAY_ON, ap_set_display_on, true}, + {DCS_SET_DISPLAY_OFF, ap_set_display_off, true}, + {0xDF, ap_get_reg_df, false}, // + //{0xCA, ap_get_reg_ca, false}, // ⡣ҪB1ܵ +// {0xB1, ap_set_backlight, false}, + {0x51, ap_set_backlight_51, false}, //leo + {0x60, ap_update_frame_rate, true}, + {DCS_ENTER_SLEEP_MODE, ap_set_enter_sleep_mode, true}, + {DCS_EXIT_SLEEP_MODE, ap_set_exit_sleep_mode, true}, +#if ADD_TP_CALIBRATION +// TP calibration + {0x04, ap_set_tp_calibration_04, true}, +#endif + {0, NULL, false} //{0,NULL,false} һ̶ԱΪtableβжϱ׼ +}; + +static void tx_panel_reset(void) +{ + hal_dsi_tx_ctrl_panel_reset_pin(IO_LVL_HIGH); + delayMs(10); //10ms + hal_dsi_tx_ctrl_panel_reset_pin(IO_LVL_LOW); + delayMs(10); //10ms + hal_dsi_tx_ctrl_panel_reset_pin(IO_LVL_HIGH); + delayMs(10); +} + +#if PANEL_INIT_CODE_ARRAY +static void send_panel_init_code(uint32_t size, uint8_t * data) +{ + uint32_t data_offeset = 0; + uint8_t data_type; + uint8_t vc; + uint8_t data_size; + uint8_t * p_data; + + while(data_offeset < size) + { + data_type = data[data_offeset]; + vc = data[data_offeset + 1]; + data_size = data[data_offeset + 2]; + p_data = &data[data_offeset + 3]; + hal_dsi_tx_ctrl_write_array_cmd(data_type, vc, data_size, p_data); + data_offeset = data_offeset + data_size + 3; + delayUs(50); + } +} + +const uint8_t panel_init_code[] = { +#if 1 //SU2_video - 3316 + 0x05, 0, 1, 0x11, + 0x39,0,6,0xF0,0x55,0xAA,0x52,0x08,0x00, + 0x39,0,9,0xBA,0x01,0xAF,0x00,0x14,0x09,0xAC,0x00,0x01, + 0x39,0,2,0x6F,0x08, + 0x39,0,9,0xBA,0x01,0xAF,0x00,0x14,0x00,0x1C,0x00,0x00, + 0x39,0,2,0x6F,0x10, + 0x39,0,8,0xBA,0x01,0xAF,0x00,0x14,0x03,0x4C,0x00, + 0x39,0,9,0xBB,0x01,0xAF,0x00,0x14,0x00,0x1C,0x00,0x41, + 0x39,0,2,0x6F,0x06, + 0x39,0,4,0xB5,0x2B,0x1C,0x32, + 0x39,0,2,0x6F,0x0B, + 0x39,0,4,0xB5,0x33,0x2B,0x23, + 0x39,0,2,0x6F,0x10, + 0x39,0,6,0xB5,0x1C,0x1C,0x1C,0x1C,0x1C, + 0x39,0,3,0xB5,0x86,0x02, + 0x39,0,2,0x6F,0x02, + 0x39,0,14,0xB6,0x2F,0x2F,0x2F,0x2F,0x2F,0x2F,0x2F,0x2F,0x2F,0x2F,0x2F,0x2F,0x2F, + 0x39,0,14,0xB7,0x00,0xFE,0xDC,0xBA,0x98,0x76,0x54,0x32,0x10,0x00,0x00,0x00,0x05, + 0x39,0,2,0x6F,0x0D, + 0x39,0,7,0xB7,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39,0,2,0x6F,0x13, + 0x39,0,13,0xB7,0x17,0x89,0x9A,0xAB,0xBC,0xCD,0xDE,0xEF,0xFF,0xFF,0xFF,0xFF, + 0x39,0,2,0x6F,0x1F, + 0x39,0,25,0xB7,0x47,0xFF,0x88,0x10,0x99,0x21,0xAA,0x32,0xBB,0x43,0xCC,0x54,0xDD,0x65,0xEE,0x76,0xB0,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF, + 0x39,0,5,0xB2,0x18,0x63,0x08,0x08, + 0x39,0,2,0x6F,0x09, + 0x39,0,2,0xB2,0x40, + 0x39,0,2,0x6F,0x0F, + 0x39,0,9,0xB2,0x30,0x20,0x81,0x46,0x21,0x46,0x20,0x00, + 0x39,0,13,0xB3,0x00,0x08,0x00,0x18,0x00,0x18,0x00,0x31,0x00,0x31,0x00,0x62, + 0x39,0,2,0x6F,0x0C, + 0x39,0,13,0xB3,0x00,0x62,0x00,0xC0,0x00,0xC0,0x01,0x46,0x01,0x46,0x01,0x47, + 0x39,0,2,0x6F,0x18, + 0x39,0,13,0xB3,0x01,0x47,0x03,0x33,0x03,0x33,0x07,0xFF,0x07,0xFF,0x0F,0xFF, + 0x39,0,2,0x6F,0x24, + 0x39,0,9,0xB3,0x01,0x55,0x08,0xCC,0x08,0xCC,0x0F,0xFF, + 0x39,0,2,0x6F,0x2C, + +// 0x39,0,15,0xB3,0x09,0x90,0x08,0xE0,0x08,0x70,0x08,0x70,0x07,0xC0,0x07,0xC0,0x06,0x6C, +// 0x39,0,2,0x6F,0x3A, +// 0x39,0,13,0xB3,0x06,0x6C,0x03,0xDC,0x03,0xDC,0x00,0x34,0x00,0x34,0x00,0x30, +// 0x39,0,2,0x6F,0x46, +// 0x39,0,13,0xB3,0x00,0x30,0x00,0x30,0x00,0x30,0x00,0x30,0x00,0x30,0x00,0x30, +// 0x39,0,15,0xB4,0x13,0x20,0x11,0xC0,0x10,0xE0,0x10,0xE0,0x0F,0x80,0x0F,0x80,0x0C,0xD8, +// 0x39,0,2,0x6F,0x0E, +// 0x39,0,13,0xB4,0x0C,0xD8,0x07,0xB8,0x07,0xB8,0x00,0x68,0x00,0x68,0x00,0x60, +// 0x39,0,2,0x6F,0x1A, +// 0x39,0,13,0xB4,0x00,0x60,0x00,0x60,0x00,0x60,0x00,0x60,0x00,0x60,0x00,0x60, +// 0x39,0,2,0x6F,0x30, +// 0x39,0,15,0xB4,0x0C,0xBC,0x0B,0xD8,0x0B,0x40,0x0B,0x40,0x0A,0x54,0x0A,0x54,0x08,0x90, +// 0x39,0,2,0x6F,0x3E, +// 0x39,0,13,0xB4,0x08,0x90,0x05,0x24,0x05,0x24,0x00,0x44,0x00,0x44,0x00,0x40, +// 0x39,0,2,0x6F,0x4A, +// 0x39,0,13,0xB4,0x00,0x40,0x00,0x40,0x00,0x40,0x00,0x40,0x00,0x40,0x00,0x40, + + 0x39,0,15,0xB3,0x00,0x60,0x00,0x60,0x00,0x60,0x00,0x60,0x00,0x60,0x00,0x60,0x00,0x60, + 0x39,0,2,0x6F,0x3A, + 0x39,0,13,0xB3,0x00,0x60,0x00,0x60,0x00,0x60,0x00,0x60,0x00,0x60,0x00,0x60, + 0x39,0,2,0x6F,0x46, + 0x39,0,13,0xB3,0x00,0x60,0x00,0x60,0x00,0x60,0x00,0x60,0x00,0x60,0x00,0x60, + 0x39,0,15,0xB4,0x00,0x60,0x00,0x60,0x00,0x60,0x00,0x60,0x00,0x60,0x00,0x60,0x00,0x60, + 0x39,0,2,0x6F,0x0E, + 0x39,0,13,0xB4,0x00,0x60,0x00,0x60,0x00,0x60,0x00,0x60,0x00,0x60,0x00,0x60, + 0x39,0,2,0x6F,0x1A, + 0x39,0,13,0xB4,0x00,0x60,0x00,0x60,0x00,0x60,0x00,0x60,0x00,0x60,0x00,0x60, + 0x39,0,2,0x6F,0x30, + 0x39,0,15,0xB4,0x00,0x60,0x00,0x60,0x00,0x60,0x00,0x60,0x00,0x60,0x00,0x60,0x00,0x60, + 0x39,0,2,0x6F,0x3E, + 0x39,0,13,0xB4,0x00,0x60,0x00,0x60,0x00,0x60,0x00,0x60,0x00,0x60,0x00,0x60, + 0x39,0,2,0x6F,0x4A, + 0x39,0,13,0xB4,0x00,0x60,0x00,0x60,0x00,0x60,0x00,0x60,0x00,0x60,0x00,0x60, + + 0x39,0,2,0x6F,0x26, + 0x39,0,11,0xB4,0x09,0x90,0x00,0x30,0x00,0x30,0x00,0x30,0x00,0x30, + 0x39,0,3,0xB9,0x00,0x96, + 0x39,0,3,0xBD,0x04,0xB0, + //0x39,0,4,0xC0,0x45,0xF3,0xC1, + 0x39,0,4,0xC0,0x46,0xF3,0xC1, + 0x39,0,2,0x6F,0x08, + 0x39,0,2,0xC0,0x40, + 0x39,0,2,0x6F,0x09, + 0x39,0,3,0xC0,0x20,0x81, + 0x39,0,2,0x6F,0x02, + 0x39,0,2,0xC1,0x24, + 0x39,0,2,0x6F,0x02, + 0x39,0,9,0xC1,0x24,0x57,0x00,0x57,0x00,0x57,0x00,0x57, + 0x39,0,2,0x6F,0x0A, + 0x39,0,3,0xC1,0x00,0x57, + 0x39,0,2,0x6F,0x01, + 0x39,0,2,0xC3,0x00, + 0x39,0,2,0x6F,0x08, + 0x39,0,2,0xC3,0x00, + 0x39,0,2,0xC5,0x10, + 0x39,0,2,0xC8,0x0D, + 0x39,0,2,0xC9,0x84, + 0x39,0,5,0xCA,0x12,0x00,0x82,0xBC, + 0x39,0,2,0xCB,0x88, + 0x39,0,2,0x6F,0x02, + 0x39,0,3,0xEC,0x80,0x10, + 0x39,0,2,0xB9,0x00, + 0x39,0,5,0xBE,0x0E,0x0B,0x14,0x13, + 0x39,0,2,0x6F,0x05, + 0x39,0,2,0xBE,0x8A, + 0x39,0,2,0x6F,0x29, + 0x39,0,2,0xD9,0x00, + 0x39,0,2,0x6F,0x01, + 0x39,0,2,0xD9,0x80, + 0x39,0,2,0x6F,0x07, + 0x39,0,3,0xB2,0x07,0xFF, + 0x39,0,2,0x6F,0x17, + 0x39,0,3,0xB2,0x07,0xFF, + 0x39,0,6,0xF0,0x55,0xAA,0x52,0x08,0x00, + 0x39,0,2,0x6F,0x2A, + 0x39,0,2,0xD9,0x43, + 0x39,0,6,0xF0,0x55,0xAA,0x52,0x08,0x01, + 0x39,0,11,0xB5,0x00,0xB0,0x00,0xB0,0x00,0xB0,0x00,0xB0,0x00,0xB0, + 0x39,0,11,0xB6,0x01,0x48,0x00,0xC0,0x00,0xC0,0x01,0x48,0x00,0xC0, + 0x39,0,3,0xB0,0x04,0x04, + 0x39,0,3,0xB3,0x13,0x13, + 0x39,0,7,0xB7,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B, + 0x39,0,3,0xB1,0x08,0x08, + 0x39,0,3,0xB4,0x13,0x13, + 0x39,0,7,0xB8,0x46,0x46,0x46,0x46,0x46,0x46, + 0x39,0,29,0xB9,0x00,0x1F,0x00,0x00,0x00,0x1F,0x00,0x00,0x1F,0x00,0x00,0x1F,0x00,0x00,0x00,0x00,0x00,0x00,0x1F,0x1F,0x1F,0x1F,0x1F,0x00,0x00,0x00,0x00,0x00, + 0x39,0,5,0xBA,0x10,0x10,0x10,0x10, + 0x39,0,13,0xC2,0x00,0xB0,0x01,0x48,0x00,0xB0,0x01,0x48,0x00,0xB0,0x01,0x48, + 0x39,0,2,0xBB,0x03, + 0x39,0,2,0x6F,0x05, + 0x39,0,20,0xBB,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20, + 0x39,0,2,0x6F,0x18, + 0x39,0,20,0xBB,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20, + 0x39,0,2,0x6F,0x2B, + 0x39,0,20,0xBB,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20, + 0x39,0,2,0x6F,0x3E, + 0x39,0,20,0xBB,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20, + 0x39,0,3,0xC4,0x80,0x03, + 0x39,0,3,0xCD,0x05,0x81, + 0x39,0,2,0xC7,0x01, + 0x39,0,2,0xCF,0x5C, + 0x39,0,6,0xCE,0x00,0x00,0x01,0x00,0x04, + 0x39,0,2,0x6F,0x01, + 0x39,0,4,0xD2,0x00,0x00,0x11, + 0x39,0,2,0x6F,0x06, + 0x39,0,2,0xD2,0x05, + 0x39,0,2,0x6F,0x0F, + 0x39,0,2,0xD2,0x00, + 0x39,0,2,0x6F,0x09, + 0x39,0,2,0xD2,0x00, + 0x39,0,2,0x6F,0x10, + 0x39,0,2,0xD8,0x0C, + 0x39,0,2,0xD1,0x07, + 0x39,0,2,0x6F,0x02, + 0x39,0,2,0xD1,0x06, + 0x39,0,2,0x6F,0x05, + 0x39,0,2,0xD1,0x06, + 0x39,0,3,0xD6,0x00,0x20, + 0x39,0,6,0xF0,0x55,0xAA,0x52,0x08,0x02, + 0x39,0,25,0xB9,0x00,0x04,0x00,0x0C,0x00,0x14,0x00,0x1C,0x00,0x2C,0x00,0x3C,0x00,0x4C,0x00,0x5C,0x00,0x7C,0x00,0x9C,0x00,0xBC,0x00,0xDC, + 0x39,0,25,0xBA,0x00,0xFC,0x01,0x3C,0x01,0x7C,0x01,0xBC,0x01,0xFC,0x02,0x7C,0x02,0xFC,0x03,0x7C,0x03,0xBC,0x03,0xDC,0x03,0xFC,0x03,0xFF, + 0x39,0,2,0xBC,0x11, + 0x39,0,17,0xBD,0x96,0x00,0x69,0x00,0x00,0x96,0x00,0x69,0xBB,0x44,0x44,0xBB,0xEE,0x11,0x11,0xEE, + 0x39,0,2,0xC1,0x02, + 0x39,0,9,0xC2,0x91,0x00,0x19,0x00,0x91,0x00,0x19,0x00, + 0x39,0,3,0xC0,0x00,0x00, + 0x39,0,2,0x6F,0x02, + 0x39,0,2,0xBF,0x13, + 0x39,0,6,0xF0,0x55,0xAA,0x52,0x08,0x02, + 0x39,0,2,0xCC,0x30, + 0x39,0,2,0xBF,0x29, + 0x39,0,19,0xB0,0x00,0x00,0x00,0xEA,0x01,0x30,0x01,0xBD,0x02,0x2B,0x02,0x9A,0x02,0xEF,0x03,0x35,0x03,0xC1, + 0x39,0,19,0xB1,0x04,0x22,0x04,0x87,0x04,0xE1,0x05,0x2F,0x05,0xC9,0x06,0x4E,0x06,0xC5,0x07,0x34,0x07,0x9C, + 0x39,0,15,0xB2,0x07,0xFF,0x08,0x62,0x08,0xC8,0x09,0x2D,0x09,0x92,0x0A,0x74,0x0A,0x77, + 0x39,0,19,0xB3,0x00,0x00,0x00,0xAF,0x00,0xEA,0x01,0x60,0x01,0xCD,0x02,0x2E,0x02,0x7E,0x02,0xBF,0x03,0x42, + 0x39,0,19,0xB4,0x03,0x98,0x03,0xEE,0x04,0x44,0x04,0x8E,0x05,0x12,0x05,0x80,0x05,0xEC,0x06,0x50,0x06,0xAD, + 0x39,0,15,0xB5,0x07,0x0A,0x07,0x63,0x07,0xB9,0x08,0x0E,0x08,0x62,0x09,0x11,0x09,0x14, + 0x39,0,19,0xB6,0x00,0x00,0x00,0xC4,0x01,0x1C,0x01,0xCD,0x02,0x61,0x02,0xE5,0x03,0x4B,0x03,0xA1,0x04,0x3F, + 0x39,0,19,0xB7,0x04,0xAB,0x05,0x17,0x05,0x7A,0x05,0xD1,0x06,0x6D,0x06,0xF3,0x07,0x74,0x07,0xEB,0x08,0x5B, + 0x39,0,15,0xB8,0x08,0xCB,0x09,0x3B,0x09,0xB0,0x0A,0x24,0x0A,0x97,0x0B,0x87,0x0B,0x89, + 0x39,0,2,0xBF,0x28, + 0x39,0,19,0xB0,0x00,0x00,0x01,0x1D,0x01,0x59,0x01,0xBC,0x02,0x24,0x02,0x83,0x02,0xD7,0x03,0x01,0x03,0x79, + 0x39,0,19,0xB1,0x03,0xEB,0x04,0x54,0x04,0xA9,0x04,0xF7,0x05,0x7E,0x05,0xF9,0x06,0x71,0x06,0xDB,0x07,0x40, + 0x39,0,15,0xB2,0x07,0x9B,0x07,0xF3,0x08,0x51,0x08,0xAB,0x09,0x08,0x09,0xE5,0x09,0xE7, + 0x39,0,19,0xB3,0x00,0x00,0x00,0xF2,0x01,0x36,0x01,0x6A,0x01,0xBD,0x02,0x14,0x02,0x5E,0x02,0x8A,0x02,0xFA, + 0x39,0,19,0xB4,0x03,0x5D,0x03,0xB9,0x04,0x04,0x04,0x4D,0x04,0xCA,0x05,0x34,0x05,0x9A,0x05,0xF5,0x06,0x4F, + 0x39,0,15,0xB5,0x06,0xA3,0x06,0xF3,0x07,0x48,0x07,0x94,0x07,0xE6,0x08,0xA1,0x08,0xA7, + 0x39,0,19,0xB6,0x00,0x00,0x01,0x10,0x01,0x5C,0x01,0xC0,0x02,0x40,0x02,0xBA,0x03,0x22,0x03,0x5B,0x03,0xE8, + 0x39,0,19,0xB7,0x04,0x64,0x04,0xDE,0x05,0x35,0x05,0x8E,0x06,0x20,0x06,0x9E,0x07,0x1C,0x07,0x89,0x07,0xF5, + 0x39,0,15,0xB8,0x08,0x57,0x08,0xB9,0x09,0x21,0x09,0x86,0x09,0xF1,0x0A,0xF9,0x0A,0xFE, + 0x39,0,2,0xBF,0x27, + 0x39,0,19,0xB0,0x00,0x00,0x01,0x2E,0x01,0x2F,0x01,0x81,0x01,0xCF,0x02,0x07,0x02,0x48,0x02,0x86,0x02,0xE6, + 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0x39,0,22,0xCF,0x27,0x00,0x03,0x84,0x03,0x49,0x00,0x00,0x00,0x00,0x00,0x00,0x3F,0xFF,0x3A,0xE4,0x00,0x00,0x00,0x00,0x00, + 0x39,0,2,0x6F,0x15, + 0x39,0,16,0xCF,0x02,0x1C,0x17,0x02,0x39,0x35,0x33,0x80,0x00,0x00,0x03,0x1E,0xE3,0x00,0x00, + 0x39,0,2,0x6F,0x24, + 0x39,0,8,0xCF,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39,0,2,0x6F,0x00, + 0x39,0,22,0xD0,0x2B,0x00,0x03,0x84,0x03,0x49,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0xFF,0xF4,0x73,0x5C, + 0x39,0,2,0x6F,0x15, + 0x39,0,16,0xD0,0x02,0x1C,0x36,0x02,0x39,0x54,0x33,0x5F,0xFC,0x9A,0x00,0x1E,0x1D,0x00,0x00, + 0x39,0,2,0x6F,0x24, + 0x39,0,8,0xD0,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39,0,2,0x6F,0x00, + 0x39,0,22,0xD1,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39,0,2,0x6F,0x15, + 0x39,0,16,0xD1,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39,0,2,0x6F,0x24, + 0x39,0,8,0xD1,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39,0,2,0x6F,0x00, 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0x39,0,2,0x6F,0x00, + 0x39,0,22,0xD5,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39,0,2,0x6F,0x15, + 0x39,0,16,0xD5,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39,0,2,0x6F,0x24, + 0x39,0,8,0xD5,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39,0,2,0x6F,0x00, + 0x39,0,22,0xD6,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39,0,2,0x6F,0x15, + 0x39,0,16,0xD6,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39,0,2,0x6F,0x24, + 0x39,0,8,0xD6,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39,0,2,0x6F,0x00, + 0x39,0,22,0xD7,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39,0,2,0x6F,0x15, + 0x39,0,16,0xD7,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39,0,2,0x6F,0x24, + 0x39,0,8,0xD7,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39,0,2,0x6F,0x00, + 0x39,0,22,0xD8,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39,0,2,0x6F,0x15, + 0x39,0,16,0xD8,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39,0,2,0x6F,0x24, + 0x39,0,8,0xD8,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39,0,6,0xF0,0x55,0xAA,0x52,0x08,0x07, + 0x39,0,6,0xC0,0x01,0x01,0x00,0x00,0x55, + 0x39,0,2,0x6F,0x00, + 0x39,0,22,0xC9,0x21,0x00,0x29,0x71,0x29,0x71,0x00,0x00,0x3F,0xDE,0xA7,0x12,0x3F,0xDE,0xA7,0x12,0x80,0x06,0xB5,0x63,0xE1, + 0x39,0,2,0x6F,0x15, + 0x39,0,16,0xC9,0x81,0xB5,0x0D,0x82,0x1C,0x74,0x33,0xE0,0x29,0x71,0x0F,0x99,0x99,0x00,0x00, + 0x39,0,2,0x6F,0x24, + 0x39,0,8,0xC9,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39,0,2,0x6F,0x00, + 0x39,0,22,0xCA,0x27,0x00,0x29,0x71,0x27,0xD9,0x00,0x00,0x00,0x00,0x00,0x00,0x3F,0xDF,0xEF,0x62,0x80,0x00,0x00,0x00,0x00, + 0x39,0,2,0x6F,0x15, + 0x39,0,16,0xCA,0x82,0x1D,0x0D,0x82,0x82,0x74,0x33,0xD0,0x00,0x00,0x03,0x67,0x9B,0x00,0x00, + 0x39,0,2,0x6F,0x24, + 0x39,0,8,0xCA,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39,0,2,0x6F,0x00, + 0x39,0,22,0xCB,0x2D,0x00,0x28,0xA4,0x29,0x71,0x00,0x00,0x3F,0xDF,0x4C,0x08,0x80,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39,0,2,0x6F,0x15, + 0x39,0,16,0xCB,0x81,0xB5,0x75,0x82,0x1C,0xDB,0x33,0x70,0x00,0x00,0x0C,0x9A,0x67,0x00,0x00, + 0x39,0,2,0x6F,0x24, + 0x39,0,8,0xCB,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39,0,2,0x6F,0x00, + 0x39,0,22,0xCC,0x2B,0x00,0x28,0xA4,0x27,0xD9,0x00,0x00,0x00,0x00,0x00,0x00,0x80,0x00,0x00,0x00,0x7F,0xF9,0xAC,0x90,0xFC, + 0x39,0,2,0x6F,0x15, + 0x39,0,16,0xCC,0x82,0x1D,0x75,0x82,0x82,0xDB,0x33,0x8F,0xD7,0xC2,0x00,0x66,0x65,0x00,0x00, + 0x39,0,2,0x6F,0x24, + 0x39,0,8,0xCC,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39,0,2,0xD9,0x40, + 0x39,0,5,0x3B,0x00,0x14,0x09,0xAC, //Leo + 0x39,0,2,0x03,0x00, + 0x39,0,2,0x90,0x02, + 0x39,0,19,0x91,0x89,0x28,0x00,0x0C,0xC2,0x00,0x03,0x1C,0x01,0x7E,0x00,0x0F,0x08,0xBB,0x04,0x3D,0x10,0xF0, + 0x39,0,1,0x2C, + 0x39,0,5,0x51,0x07,0xFF,0x0F,0xFF, + 0x39,0,5,0xFF,0xAA,0x55,0xA5,0x80, + 0x39,0,2,0x6F,0x1D, + 0x39,0,2,0xF2,0x05, + 0x39,0,2,0x53,0x20, + 0x39,0,1,0x35, + 0x39,0,5,0x2A,0x00,0x00,0x04,0x37, + 0x39,0,5,0x2B,0x00,0x00,0x09,0x5F, + 0x39,0,2,0x2F,0x01, + 0x39,0,2,0x26,0x04, + 0x39,0,6,0xF0,0x55,0xAA,0x52,0x08,0x00, + 0x39,0,2,0xC0,0x65, + 0x39,0,5,0x3B,0x00,0x10,0x00,0x20, //Leo + 0x39,0,2,0x90,0x00, + 0x39,0,1,0x2C, + 0x39,0,3,0x51,0x03,0x00, + 0x39,0,6,0xF0,0x55,0xAA,0x52,0x08,0x00, + 0x39,0,3,0xB5,0x94,0x42, + 0x39,0,2,0x6F,0x05, + 0x39,0,5,0xB5,0x7F,0x2B,0x12,0x33, + 0x39,0,2,0x6F,0x0B, + 0x39,0,4,0xB5,0x2B,0x1A,0x33, +#endif + +#if 0 //SU2_video - 303315 +0x39,0,6,0xF0,0x55,0xAA,0x52,0x08,0x00, +0x39,0,9,0xBA,0x01,0xAF,0x00,0x14,0x09,0xAC,0x00,0x01, +0x39,0,2,0x6F,0x08, +0x39,0,9,0xBA,0x01,0xAF,0x00,0x14,0x00,0x1C,0x00,0x00, +0x39,0,2,0x6F,0x10, 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+0x39,0,9,0xB2,0x30,0x20,0x80,0x00,0x21,0x46,0x20,0x00, +0x39,0,13,0xB3,0x00,0x08,0x00,0x18,0x00,0x18,0x00,0x31,0x00,0x31,0x00,0x62, +0x39,0,2,0x6F,0x0C, +0x39,0,13,0xB3,0x00,0x62,0x00,0xC0,0x00,0xC0,0x01,0x46,0x01,0x46,0x01,0x47, +0x39,0,2,0x6F,0x18, +0x39,0,13,0xB3,0x01,0x47,0x03,0x33,0x03,0x33,0x07,0xFF,0x07,0xFF,0x0F,0xFF, +0x39,0,2,0x6F,0x24, +0x39,0,9,0xB3,0x01,0x55,0x08,0xCC,0x08,0xCC,0x0F,0xFF, +0x39,0,2,0x6F,0x2C, + +//0x39,0,15,0xB3,0x09,0x90,0x08,0xE0,0x08,0x70,0x08,0x70,0x07,0xC0,0x07,0xC0,0x06,0x6C, +//0x39,0,2,0x6F,0x3A, +//0x39,0,13,0xB3,0x06,0x6C,0x03,0xDC,0x03,0xDC,0x00,0x34,0x00,0x34,0x00,0x30, +//0x39,0,2,0x6F,0x46, +//0x39,0,13,0xB3,0x00,0x30,0x00,0x30,0x00,0x30,0x00,0x30,0x00,0x30,0x00,0x30, +//0x39,0,15,0xB4,0x13,0x20,0x11,0xC0,0x10,0xE0,0x10,0xE0,0x0F,0x80,0x0F,0x80,0x0C,0xD8, +//0x39,0,2,0x6F,0x0E, +//0x39,0,13,0xB4,0x0C,0xD8,0x07,0xB8,0x07,0xB8,0x00,0x68,0x00,0x68,0x00,0x60, +//0x39,0,2,0x6F,0x1A, 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+0x39,0,2,0x6F,0x24, +0x39,0,8,0xD3,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +0x39,0,2,0x6F,0x00, +0x39,0,22,0xD4,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +0x39,0,2,0x6F,0x15, +0x39,0,16,0xD4,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +0x39,0,2,0x6F,0x24, +0x39,0,8,0xD4,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +0x39,0,2,0x6F,0x00, +0x39,0,22,0xD5,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +0x39,0,2,0x6F,0x15, +0x39,0,16,0xD5,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +0x39,0,2,0x6F,0x24, +0x39,0,8,0xD5,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +0x39,0,2,0x6F,0x00, +0x39,0,22,0xD6,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +0x39,0,2,0x6F,0x15, +0x39,0,16,0xD6,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +0x39,0,2,0x6F,0x24, +0x39,0,8,0xD6,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +0x39,0,2,0x6F,0x00, +0x39,0,22,0xD7,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +0x39,0,2,0x6F,0x15, +0x39,0,16,0xD7,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +0x39,0,2,0x6F,0x24, +0x39,0,8,0xD7,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +0x39,0,2,0x6F,0x00, +0x39,0,22,0xD8,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +0x39,0,2,0x6F,0x15, +0x39,0,16,0xD8,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +0x39,0,2,0x6F,0x24, +0x39,0,8,0xD8,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +0x39,0,6,0xF0,0x55,0xAA,0x52,0x08,0x07, +0x39,0,6,0xC0,0x01,0x01,0x00,0x00,0x55, +0x39,0,2,0x6F,0x00, +0x39,0,22,0xC9,0x21,0x00,0x29,0x71,0x29,0x71,0x00,0x00,0x3F,0xDE,0xA7,0x12,0x3F,0xDE,0xA7,0x12,0x80,0x06,0xB5,0x63,0xE1, +0x39,0,2,0x6F,0x15, +0x39,0,16,0xC9,0x81,0xB5,0x0D,0x82,0x1C,0x74,0x33,0xE0,0x29,0x71,0x0F,0x99,0x99,0x00,0x00, +0x39,0,2,0x6F,0x24, +0x39,0,8,0xC9,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +0x39,0,2,0x6F,0x00, +0x39,0,22,0xCA,0x27,0x00,0x29,0x71,0x27,0xD9,0x00,0x00,0x00,0x00,0x00,0x00,0x3F,0xDF,0xEF,0x62,0x80,0x00,0x00,0x00,0x00, +0x39,0,2,0x6F,0x15, +0x39,0,16,0xCA,0x82,0x1D,0x0D,0x82,0x82,0x74,0x33,0xD0,0x00,0x00,0x03,0x67,0x9B,0x00,0x00, +0x39,0,2,0x6F,0x24, +0x39,0,8,0xCA,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +0x39,0,2,0x6F,0x00, +0x39,0,22,0xCB,0x2D,0x00,0x28,0xA4,0x29,0x71,0x00,0x00,0x3F,0xDF,0x4C,0x08,0x80,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +0x39,0,2,0x6F,0x15, +0x39,0,16,0xCB,0x81,0xB5,0x75,0x82,0x1C,0xDB,0x33,0x70,0x00,0x00,0x0C,0x9A,0x67,0x00,0x00, +0x39,0,2,0x6F,0x24, +0x39,0,8,0xCB,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +0x39,0,2,0x6F,0x00, +0x39,0,22,0xCC,0x2B,0x00,0x28,0xA4,0x27,0xD9,0x00,0x00,0x00,0x00,0x00,0x00,0x80,0x00,0x00,0x00,0x7F,0xF9,0xAC,0x90,0xFC, +0x39,0,2,0x6F,0x15, +0x39,0,16,0xCC,0x82,0x1D,0x75,0x82,0x82,0xDB,0x33,0x8F,0xD7,0xC2,0x00,0x66,0x65,0x00,0x00, +0x39,0,2,0x6F,0x24, +0x39,0,8,0xCC,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +0x39,0,2,0xD9,0x40, +0x39,0,5,0x3B,0x00,0x14,0x09,0xAC, +0x39,0,2,0x03,0x00, +0x39,0,2,0x90,0x02, +0x39,0,19,0x91,0x89,0x28,0x00,0x0C,0xC2,0x00,0x03,0x1C,0x01,0x7E,0x00,0x0F,0x08,0xBB,0x04,0x3D,0x10,0xF0, +0x39,0,1,0x2C, +0x39,0,5,0x51,0x07,0xFF,0x0F,0xFF, +0x39,0,5,0xFF,0xAA,0x55,0xA5,0x80, +0x39,0,2,0x6F,0x1D, +0x39,0,2,0xF2,0x05, +0x39,0,2,0x53,0x20, +0x39,0,1,0x35, +0x39,0,5,0x2A,0x00,0x00,0x04,0x37, +0x39,0,5,0x2B,0x00,0x00,0x09,0x5F, +0x39,0,2,0x2F,0x01, +0x39,0,2,0x26,0x04, +0x39,0,6,0xF0,0x55,0xAA,0x52,0x08,0x00, +0x39,0,2,0xC0,0x65, +0x39,0,5,0x3B,0x00,0x10,0x00,0x20, +0x39,0,2,0x90,0x00, +0x39,0,1,0x2C, +0x39,0,3,0x51,0x03,0x00, +0x39,0,6,0xF0,0x55,0xAA,0x52,0x08,0x00, +0x39,0,3,0xB5,0x94,0x42, +0x39,0,2,0x6F,0x05, +0x39,0,5,0xB5,0x7F,0x2B,0x12,0x33, +0x39,0,2,0x6F,0x0B, +0x39,0,4,0xB5,0x2B,0x1A,0x33, +#endif + +#if 0 +//#if AMOLED_NT37701_HX628 +//S9-2_initial_V02.mcr + + 0x39, 0, 6, 0xF0,0x55,0xAA,0x52,0x08,0x00, + 0x39, 0, 9, 0xBA,0x01,0xAF,0x00,0x14,0x09,0xAC,0x00,0x01, + 0x39, 0, 2, 0x6F,0x08, + 0x39, 0, 9, 0xBA,0x01,0xAF,0x00,0x14,0x00,0x1C,0x00,0x00, + 0x39, 0, 2, 0x6F,0x10, + 0x39, 0, 8, 0xBA,0x01,0xAF,0x00,0x14,0x03,0x4C,0x00, + 0x39, 0, 9, 0xBB,0x01,0xAF,0x00,0x14,0x00,0x1C,0x00,0x41, + 0x39, 0, 2, 0x6F,0x06, + 0x39, 0, 4, 0xB5,0x2B,0x1C,0x32, + 0x39, 0, 2, 0x6F,0x0B, + 0x39, 0, 4, 0xB5,0x33,0x2B,0x23, + 0x39, 0, 2, 0x6F,0x10, + 0x39, 0, 6, 0xB5,0x1C,0x1C,0x1C,0x1C,0x1C, + 0x39, 0, 3, 0xB5,0x86,0x02, + 0x39, 0, 2, 0x6F,0x02, + 0x39, 0, 14, 0xB6,0x2F,0x2F,0x2F,0x2F,0x2F,0x2F,0x2F,0x2F,0x2F,0x2F,0x2F,0x2F,0x2F, + 0x39, 0, 14, 0xB7,0x00,0xFE,0xDC,0xBA,0x98,0x76,0x54,0x32,0x10,0x00,0x00,0x00,0x05, + 0x39, 0, 2, 0x6F,0x0D, + 0x39, 0, 7, 0xB7,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x13, + 0x39, 0, 13, 0xB7,0x17,0x89,0x9A,0xAB,0xBC,0xCD,0xDE,0xEF,0xFF,0xFF,0xFF,0xFF, + 0x39, 0, 2, 0x6F,0x1F, + 0x39, 0, 25, 0xB7,0x47,0xFF,0x88,0x10,0x99,0x21,0xAA,0x32,0xBB,0x43,0xCC,0x54,0xDD,0x65,0xEE,0x76,0xB0,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF, + 0x39, 0, 5, 0xB2,0x18,0x63,0x08,0x08, + 0x39, 0, 2, 0x6F,0x09, + 0x39, 0, 2, 0xB2,0x40, + 0x39, 0, 2, 0x6F,0x0F, + 0x39, 0, 9, 0xB2,0x30,0x20,0x81,0x46,0x21,0x46,0x20,0x00, + 0x39, 0, 13, 0xB3,0x00,0x08,0x00,0x18,0x00,0x18,0x00,0x31,0x00,0x31,0x00,0x62, + 0x39, 0, 2, 0x6F,0x0C, + 0x39, 0, 13, 0xB3,0x00,0x62,0x00,0xC0,0x00,0xC0,0x01,0x46,0x01,0x46,0x01,0x47, + 0x39, 0, 2, 0x6F,0x18, + 0x39, 0, 13, 0xB3,0x01,0x47,0x03,0x33,0x03,0x33,0x07,0xFF,0x07,0xFF,0x0F,0xFF, + 0x39, 0, 2, 0x6F,0x24, + 0x39, 0, 9, 0xB3,0x01,0x55,0x08,0xCC,0x08,0xCC,0x0F,0xFF, + 0x39, 0, 2, 0x6F,0x2C, + 0x39, 0, 15, 0xB3,0x09,0x90,0x08,0xE0,0x08,0x70,0x08,0x70,0x07,0xC0,0x07,0xC0,0x06,0x6C, + 0x39, 0, 2, 0x6F,0x3A, + 0x39, 0, 13, 0xB3,0x06,0x6C,0x03,0xDC,0x03,0xDC,0x00,0x34,0x00,0x34,0x00,0x30, + 0x39, 0, 2, 0x6F,0x46, + 0x39, 0, 13, 0xB3,0x00,0x30,0x00,0x30,0x00,0x30,0x00,0x30,0x00,0x30,0x00,0x30, + 0x39, 0, 15, 0xB4,0x13,0x20,0x11,0xC0,0x10,0xE0,0x10,0xE0,0x0F,0x80,0x0F,0x80,0x0C,0xD8, + 0x39, 0, 2, 0x6F,0x0E, + 0x39, 0, 13, 0xB4,0x0C,0xD8,0x07,0xB8,0x07,0xB8,0x00,0x68,0x00,0x68,0x00,0x60, + 0x39, 0, 2, 0x6F,0x1A, + 0x39, 0, 13, 0xB4,0x00,0x60,0x00,0x60,0x00,0x60,0x00,0x60,0x00,0x60,0x00,0x60, + 0x39, 0, 2, 0x6F,0x30, + 0x39, 0, 15, 0xB4,0x0C,0xBC,0x0B,0xD8,0x0B,0x40,0x0B,0x40,0x0A,0x54,0x0A,0x54,0x08,0x90, + 0x39, 0, 2, 0x6F,0x3E, + 0x39, 0, 13, 0xB4,0x08,0x90,0x05,0x24,0x05,0x24,0x00,0x44,0x00,0x44,0x00,0x40, + 0x39, 0, 2, 0x6F,0x4A, + 0x39, 0, 13, 0xB4,0x00,0x40,0x00,0x40,0x00,0x40,0x00,0x40,0x00,0x40,0x00,0x40, + 0x39, 0, 2, 0x6F,0x26, + 0x39, 0, 11, 0xB4,0x09,0x90,0x00,0x30,0x00,0x30,0x00,0x30,0x00,0x30, + 0x39, 0, 3, 0xB9,0x00,0x96, + 0x39, 0, 3, 0xBD,0x04,0xB0, +// 0x39, 0, 4, 0xC0,0x45,0xF3,0xC1, + 0x39, 0, 4, 0xC0,0x46,0xF3,0xC1, + 0x39, 0, 2, 0x6F,0x08, + 0x39, 0, 2, 0xC0,0x40, + 0x39, 0, 2, 0x6F,0x09, + 0x39, 0, 3, 0xC0,0x20,0x81, + 0x39, 0, 2, 0x6F,0x02, + 0x39, 0, 2, 0xC1,0x24, + 0x39, 0, 2, 0x6F,0x02, + 0x39, 0, 9, 0xC1,0x24,0x57,0x00,0x57,0x00,0x57,0x00,0x57, + 0x39, 0, 2, 0x6F,0x0A, + 0x39, 0, 3, 0xC1,0x00,0x57, + 0x39, 0, 2, 0x6F,0x01, + 0x39, 0, 2, 0xC3,0x00, + 0x39, 0, 2, 0x6F,0x08, + 0x39, 0, 2, 0xC3,0x00, + 0x39, 0, 2, 0xC5,0x10, + 0x39, 0, 2, 0xC8,0x0D, + 0x39, 0, 2, 0xC9,0x84, + 0x39, 0, 5, 0xCA,0x12,0x00,0x82,0xBC, + 0x39, 0, 2, 0xCB,0x88, + 0x39, 0, 2, 0x6F,0x02, + 0x39, 0, 3, 0xEC,0x80,0x10, + 0x39, 0, 2, 0xB9,0x00, + 0x39, 0, 5, 0xBE,0x0E,0x0B,0x14,0x13, + 0x39, 0, 2, 0x6F,0x05, + 0x39, 0, 2, 0xBE,0x8A, + 0x39, 0, 2, 0x6F,0x29, + 0x39, 0, 2, 0xD9,0x00, + 0x39, 0, 2, 0x6F,0x01, + 0x39, 0, 2, 0xD9,0x80, + 0x39, 0, 2, 0x6F,0x07, + 0x39, 0, 3, 0xB2,0x07,0xFF, + 0x39, 0, 2, 0x6F,0x17, + 0x39, 0, 3, 0xB2,0x07,0xFF, + 0x39, 0, 6, 0xF0,0x55,0xAA,0x52,0x08,0x00, + 0x39, 0, 2, 0x6F,0x2A, + 0x39, 0, 2, 0xD9,0x43, + 0x39, 0, 6, 0xF0,0x55,0xAA,0x52,0x08,0x01, + 0x39, 0, 11, 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0xB9,0x00,0x04,0x00,0x0C,0x00,0x14,0x00,0x1C,0x00,0x2C,0x00,0x3C,0x00,0x4C,0x00,0x5C,0x00,0x7C,0x00,0x9C,0x00,0xBC,0x00,0xDC, + 0x39, 0, 25, 0xBA,0x00,0xFC,0x01,0x3C,0x01,0x7C,0x01,0xBC,0x01,0xFC,0x02,0x7C,0x02,0xFC,0x03,0x7C,0x03,0xBC,0x03,0xDC,0x03,0xFC,0x03,0xFF, + 0x39, 0, 2, 0xBC,0x11, + 0x39, 0, 17, 0xBD,0x96,0x00,0x69,0x00,0x00,0x96,0x00,0x69,0xBB,0x44,0x44,0xBB,0xEE,0x11,0x11,0xEE, + 0x39, 0, 2, 0xC1,0x02, + 0x39, 0, 9, 0xC2,0x91,0x00,0x19,0x00,0x91,0x00,0x19,0x00, + 0x39, 0, 3, 0xC0,0x00,0x00, + 0x39, 0, 2, 0x6F,0x02, + 0x39, 0, 2, 0xBF,0x13, +#if 1 +//////////////////////1 GAMMA.mcr////////////////////////////////// + 0x39, 0, 6, 0xF0,0x55,0xAA,0x52,0x08,0x02, + 0x39, 0, 2, 0xCC,0x30, + 0x39, 0, 6, 0xF0,0x55,0xAA,0x52,0x08,0x02, + 0x39, 0, 2, 0xBF,0x09, + 0x39, 0, 19, 0xB0,0x00,0x00,0x01,0x63,0x01,0xB3,0x02,0x03,0x02,0x45,0x02,0xBB,0x03,0x1B,0x03,0xBD,0x04,0x41, + 0x39, 0, 19, 0xB1,0x04,0xAF,0x05,0x10,0x05,0x64,0x05,0xB7,0x06,0x48,0x06,0xC8,0x07,0x3D,0x07,0xB1,0x08,0x1B, + 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0xB2,0x05,0x94,0x05,0xFF,0x06,0x62,0x06,0x92,0x06,0xA9,0x06,0xBD,0x06,0xBD, + 0x39, 0, 19, 0xB3,0x00,0x00,0x01,0xA2,0x01,0xB2,0x01,0xC2,0x01,0xCC,0x01,0xDC,0x01,0xF4,0x02,0x2A,0x02,0x75, + 0x39, 0, 19, 0xB4,0x02,0xBE,0x02,0xFD,0x03,0x32,0x03,0x65,0x03,0xBB,0x04,0x05,0x04,0x46,0x04,0x86,0x04,0xBD, + 0x39, 0, 15, 0xB5,0x04,0xF2,0x05,0x51,0x05,0xA8,0x05,0xD0,0x05,0xE3,0x05,0xF7,0x05,0xF7, + 0x39, 0, 19, 0xB6,0x00,0x00,0x01,0x89,0x01,0xA7,0x01,0xC5,0x01,0xDE,0x02,0x0C,0x02,0x44,0x02,0xAC,0x03,0x16, + 0x39, 0, 19, 0xB7,0x03,0x70,0x03,0xBC,0x03,0xFC,0x04,0x3A,0x04,0xA1,0x04,0xFD,0x05,0x4C,0x05,0x99,0x05,0xDB, + 0x39, 0, 15, 0xB8,0x06,0x1B,0x06,0x8E,0x06,0xF8,0x07,0x2A,0x07,0x41,0x07,0x59,0x07,0x59, + 0x39, 0, 2, 0xBF,0x03, + 0x39, 0, 19, 0xB0,0x00,0x00,0x01,0x9E,0x01,0xB4,0x01,0xCA,0x01,0xE0,0x02,0x0C,0x02,0x36,0x02,0x8F,0x02,0xE3, + 0x39, 0, 19, 0xB1,0x03,0x2A,0x03,0x6A,0x03,0xA0,0x03,0xD0,0x04,0x2C,0x04,0x7D,0x04,0xC3,0x05,0x08,0x05,0x45, + 0x39, 0, 15, 0xB2,0x05,0x80,0x05,0xE9,0x06,0x48,0x06,0x78,0x06,0x8E,0x06,0xA0,0x06,0xA0, + 0x39, 0, 19, 0xB3,0x00,0x00,0x01,0xD7,0x01,0xE4,0x01,0xF1,0x01,0xFE,0x02,0x0F,0x02,0x1E,0x02,0x49,0x02,0x83, + 0x39, 0, 19, 0xB4,0x02,0xC2,0x02,0xFF,0x03,0x34,0x03,0x62,0x03,0xB5,0x03,0xFD,0x04,0x3C,0x04,0x7A,0x04,0xAF, + 0x39, 0, 15, 0xB5,0x04,0xE3,0x05,0x40,0x05,0x93,0x05,0xBB,0x05,0xCD,0x05,0xDF,0x05,0xDF, + 0x39, 0, 19, 0xB6,0x00,0x00,0x01,0xBF,0x01,0xD8,0x01,0xF1,0x02,0x0A,0x02,0x35,0x02,0x5E,0x02,0xBE,0x03,0x1A, + 0x39, 0, 19, 0xB7,0x03,0x6B,0x03,0xB6,0x03,0xF4,0x04,0x2E,0x04,0x96,0x04,0xED,0x05,0x3A,0x05,0x86,0x05,0xC7, + 0x39, 0, 15, 0xB8,0x06,0x06,0x06,0x77,0x06,0xDC,0x07,0x0E,0x07,0x25,0x07,0x3B,0x07,0x3B, + 0x39, 0, 2, 0xBF,0x02, + 0x39, 0, 19, 0xB0,0x00,0x00,0x01,0xCA,0x01,0xDD,0x01,0xF0,0x02,0x03,0x02,0x29,0x02,0x4F,0x02,0x99,0x02,0xE1, + 0x39, 0, 19, 0xB1,0x03,0x24,0x03,0x60,0x03,0x95,0x03,0xC4,0x04,0x18,0x04,0x67,0x04,0xAA,0x04,0xEC,0x05,0x26, + 0x39, 0, 15, 0xB2,0x05,0x5F,0x05,0xC4,0x06,0x1F,0x06,0x4D,0x06,0x62,0x06,0x74,0x06,0x74, + 0x39, 0, 19, 0xB3,0x00,0x00,0x02,0x12,0x02,0x1B,0x02,0x24,0x02,0x2D,0x02,0x40,0x02,0x4C,0x02,0x76,0x02,0x9F, + 0x39, 0, 19, 0xB4,0x02,0xCE,0x03,0x04,0x03,0x32,0x03,0x5D,0x03,0xA9,0x03,0xF5,0x04,0x2E,0x04,0x66,0x04,0x9A, + 0x39, 0, 15, 0xB5,0x04,0xCC,0x05,0x22,0x05,0x72,0x05,0x98,0x05,0xA9,0x05,0xBB,0x05,0xBB, + 0x39, 0, 19, 0xB6,0x00,0x00,0x01,0xF4,0x02,0x08,0x02,0x1C,0x02,0x30,0x02,0x58,0x02,0x7A,0x02,0xCC,0x03,0x1D, + 0x39, 0, 19, 0xB7,0x03,0x62,0x03,0xA7,0x03,0xE3,0x04,0x1A,0x04,0x79,0x04,0xD6,0x05,0x1F,0x05,0x66,0x05,0xA5, + 0x39, 0, 15, 0xB8,0x05,0xE2,0x06,0x4F,0x06,0xB1,0x06,0xE1,0x06,0xF7,0x07,0x0C,0x07,0x0C, + 0x39, 0, 2, 0xBF,0x01, + 0x39, 0, 19, 0xB0,0x00,0x00,0x02,0x02,0x02,0x11,0x02,0x20,0x02,0x2F,0x02,0x4E,0x02,0x6D,0x02,0xAC,0x02,0xE4, + 0x39, 0, 19, 0xB1,0x03,0x1B,0x03,0x4E,0x03,0x7E,0x03,0xAC,0x03,0xFD,0x04,0x44,0x04,0x83,0x04,0xC0,0x04,0xF5, + 0x39, 0, 15, 0xB2,0x05,0x29,0x05,0x88,0x05,0xE0,0x06,0x0A,0x06,0x1D,0x06,0x2F,0x06,0x2F, + 0x39, 0, 19, 0xB3,0x00,0x00,0x02,0x34,0x02,0x3F,0x02,0x4A,0x02,0x55,0x02,0x6B,0x02,0x81,0x02,0x9D,0x02,0xBA, + 0x39, 0, 19, 0xB4,0x02,0xE5,0x03,0x07,0x03,0x2F,0x03,0x56,0x03,0x9D,0x03,0xD8,0x04,0x11,0x04,0x49,0x04,0x79, + 0x39, 0, 15, 0xB5,0x04,0xA5,0x04,0xF5,0x05,0x3F,0x05,0x62,0x05,0x72,0x05,0x83,0x05,0x83, + 0x39, 0, 19, 0xB6,0x00,0x00,0x02,0x21,0x02,0x33,0x02,0x45,0x02,0x57,0x02,0x7B,0x02,0x9F,0x02,0xDC,0x03,0x18, + 0x39, 0, 19, 0xB7,0x03,0x5C,0x03,0x93,0x03,0xC9,0x03,0xFE,0x04,0x59,0x04,0xA7,0x04,0xEE,0x05,0x33,0x05,0x6F, + 0x39, 0, 15, 0xB8,0x05,0xA9,0x06,0x0F,0x06,0x6D,0x06,0x99,0x06,0xAD,0x06,0xC3,0x06,0xC3, + +#if 1 + 0x39, 0, 2, 0xBF,0x00, + 0x39, 0, 19, 0xB0,0x00,0x00,0x02,0x70,0x02,0x77,0x02,0x7E,0x02,0x85,0x02,0x94,0x02,0xA3,0x02,0xC2,0x02,0xE1, + 0x39, 0, 19, 0xB1,0x03,0x0E,0x03,0x2F,0x03,0x52,0x03,0x73,0x03,0xB4,0x03,0xEE,0x04,0x25,0x04,0x5C,0x04,0x86, + 0x39, 0, 15, 0xB2,0x04,0xB5,0x05,0x07,0x05,0x52,0x05,0x78,0x05,0x89,0x05,0x97,0x05,0x97, + 0x39, 0, 19, 0xB3,0x00,0x00,0x02,0x60,0x02,0x69,0x02,0x72,0x02,0x7B,0x02,0x8E,0x02,0xA1,0x02,0xC7,0x02,0xDF, + 0x39, 0, 19, 0xB4,0x02,0xF1,0x03,0x09,0x03,0x20,0x03,0x3E,0x03,0x70,0x03,0xA1,0x03,0xCF,0x03,0xFB,0x04,0x23, + 0x39, 0, 15, 0xB5,0x04,0x4C,0x04,0x91,0x04,0xD1,0x04,0xEF,0x04,0xFD,0x05,0x0B,0x05,0x0B, + 0x39, 0, 19, 0xB6,0x00,0x00,0x02,0x76,0x02,0x80,0x02,0x8A,0x02,0x94,0x02,0xA9,0x02,0xBE,0x02,0xE9,0x03,0x0D, + 0x39, 0, 19, 0xB7,0x03,0x38,0x03,0x62,0x03,0x8D,0x03,0xBA,0x04,0x05,0x04,0x47,0x04,0x86,0x04,0xBF,0x04,0xF2, + 0x39, 0, 15, 0xB8,0x05,0x26,0x05,0x80,0x05,0xD4,0x05,0xFC,0x06,0x0E,0x06,0x1F,0x06,0x1F, +#else + //ԣV2IJGammaȫΪ0 + 0x39, 0, 2, 0xBF,0x00, + 0x39, 0, 19, 0xB0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 19, 0xB1,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 15, 0xB2,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 19, 0xB3,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 19, 0xB4,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 15, 0xB5,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 19, 0xB6,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 19, 0xB7,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 15, 0xB8,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +#endif + + 0x39, 0, 6, 0xF0,0x55,0xAA,0x52,0x08,0x02, + 0x39, 0, 2, 0xBF,0x19, + 0x39, 0, 19, 0xB0,0x00,0x00,0x01,0x92,0x01,0xDB,0x02,0x24,0x02,0x5D,0x02,0xCC,0x03,0x29,0x03,0xC5,0x04,0x45, + 0x39, 0, 19, 0xB1,0x04,0xB1,0x05,0x11,0x05,0x64,0x05,0xB6,0x06,0x45,0x06,0xC5,0x07,0x39,0x07,0xAC,0x08,0x15, + 0x39, 0, 15, 0xB2,0x08,0x7E,0x09,0x4E,0x0A,0x19,0x0A,0x83,0x0A,0xB7,0x0A,0xED,0x0A,0xED, + 0x39, 0, 19, 0xB3,0x00,0x00,0x01,0x75,0x01,0xB5,0x01,0xDD,0x02,0x11,0x02,0x77,0x02,0xCF,0x03,0x5E,0x03,0xCF, + 0x39, 0, 19, 0xB4,0x04,0x30,0x04,0x85,0x04,0xCE,0x05,0x16,0x05,0x93,0x06,0x04,0x06,0x69,0x06,0xCD,0x07,0x27, + 0x39, 0, 15, 0xB5,0x07,0x80,0x08,0x31,0x08,0xDB,0x09,0x33,0x09,0x5E,0x09,0x88,0x09,0x88, + 0x39, 0, 19, 0xB6,0x00,0x00,0x01,0x7B,0x01,0xD8,0x02,0x26,0x02,0x6E,0x02,0xFC,0x03,0x71,0x04,0x27,0x04,0xB4, + 0x39, 0, 19, 0xB7,0x05,0x2A,0x05,0x92,0x05,0xEB,0x06,0x42,0x06,0xDA,0x07,0x64,0x07,0xE2,0x08,0x5E,0x08,0xD1, + 0x39, 0, 15, 0xB8,0x09,0x43,0x0A,0x27,0x0B,0x09,0x0B,0x7F,0x0B,0xB9,0x0B,0xED,0x0B,0xED, + 0x39, 0, 2, 0xBF,0x18, + 0x39, 0, 19, 0xB0,0x00,0x00,0x02,0x0B,0x02,0x3A,0x02,0x69,0x02,0x92,0x02,0xE0,0x03,0x29,0x03,0xAB,0x04,0x1A, + 0x39, 0, 19, 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0xCC,0x00,0x7C,0x79,0x00,0xE1,0xDE,0x33,0x7F,0xD8,0x27,0x00,0x65,0x65,0x00,0x00, + 0x39, 0, 2, 0x6F,0x24, + 0x39, 0, 8, 0xCC,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x00, + 0x39, 0, 22, 0xCD,0x21,0x00,0x03,0x84,0x03,0xC1,0x00,0x00,0x3F,0xFF,0x26,0x08,0x3F,0xFF,0x1E,0xC4,0x00,0x00,0x0D,0x32,0x84, + 0x39, 0, 2, 0x6F,0x15, + 0x39, 0, 16, 0xCD,0x01,0xFC,0x17,0x02,0x1B,0x35,0x33,0x90,0x03,0xA2,0x0F,0xE2,0xE1,0x00,0x00, + 0x39, 0, 2, 0x6F,0x24, + 0x39, 0, 8, 0xCD,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x00, + 0x39, 0, 22, 0xCE,0x2D,0x00,0x03,0x84,0x03,0xC1,0x00,0x00,0x3F,0xFF,0x26,0x08,0x00,0x00,0x00,0x00,0x80,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x15, + 0x39, 0, 16, 0xCE,0x01,0xFC,0x36,0x02,0x1B,0x54,0x33,0x40,0x00,0x00,0x0C,0xE2,0x1F,0x00,0x00, + 0x39, 0, 2, 0x6F,0x24, + 0x39, 0, 8, 0xCE,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x00, + 0x39, 0, 22, 0xCF,0x27,0x00,0x03,0x84,0x03,0x49,0x00,0x00,0x00,0x00,0x00,0x00,0x3F,0xFF,0x3A,0xE4,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x15, + 0x39, 0, 16, 0xCF,0x02,0x1C,0x17,0x02,0x39,0x35,0x33,0x80,0x00,0x00,0x03,0x1E,0xE3,0x00,0x00, + 0x39, 0, 2, 0x6F,0x24, + 0x39, 0, 8, 0xCF,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x00, + 0x39, 0, 22, 0xD0,0x2B,0x00,0x03,0x84,0x03,0x49,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0xFF,0xF4,0x73,0x5C, + 0x39, 0, 2, 0x6F,0x15, + 0x39, 0, 16, 0xD0,0x02,0x1C,0x36,0x02,0x39,0x54,0x33,0x5F,0xFC,0x9A,0x00,0x1E,0x1D,0x00,0x00, + 0x39, 0, 2, 0x6F,0x24, + 0x39, 0, 8, 0xD0,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x00, + 0x39, 0, 22, 0xD1,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x15, + 0x39, 0, 16, 0xD1,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x24, + 0x39, 0, 8, 0xD1,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x00, + 0x39, 0, 22, 0xD2,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x15, + 0x39, 0, 16, 0xD2,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x24, + 0x39, 0, 8, 0xD2,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x00, + 0x39, 0, 22, 0xD3,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x15, + 0x39, 0, 16, 0xD3,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x24, + 0x39, 0, 8, 0xD3,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x00, + 0x39, 0, 22, 0xD4,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x15, + 0x39, 0, 16, 0xD4,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x24, + 0x39, 0, 8, 0xD4,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x00, + 0x39, 0, 22, 0xD5,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x15, + 0x39, 0, 16, 0xD5,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x24, + 0x39, 0, 8, 0xD5,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x00, + 0x39, 0, 22, 0xD6,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x15, + 0x39, 0, 16, 0xD6,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x24, + 0x39, 0, 8, 0xD6,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x00, + 0x39, 0, 22, 0xD7,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x15, + 0x39, 0, 16, 0xD7,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x24, + 0x39, 0, 8, 0xD7,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x00, + 0x39, 0, 22, 0xD8,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x15, + 0x39, 0, 16, 0xD8,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x24, + 0x39, 0, 8, 0xD8,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 6, 0xF0,0x55,0xAA,0x52,0x08,0x07, + 0x39, 0, 6, 0xC0,0x01,0x01,0x00,0x00,0x55, + 0x39, 0, 2, 0x6F,0x00, + 0x39, 0, 22, 0xC9,0x21,0x00,0x29,0x71,0x29,0x71,0x00,0x00,0x3F,0xDE,0xA7,0x12,0x3F,0xDE,0xA7,0x12,0x80,0x06,0xB5,0x63,0xE1, + 0x39, 0, 2, 0x6F,0x15, + 0x39, 0, 16, 0xC9,0x81,0xB5,0x0D,0x82,0x1C,0x74,0x33,0xE0,0x29,0x71,0x0F,0x99,0x99,0x00,0x00, + 0x39, 0, 2, 0x6F,0x24, + 0x39, 0, 8, 0xC9,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x00, + 0x39, 0, 22, 0xCA,0x27,0x00,0x29,0x71,0x27,0xD9,0x00,0x00,0x00,0x00,0x00,0x00,0x3F,0xDF,0xEF,0x62,0x80,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x15, + 0x39, 0, 16, 0xCA,0x82,0x1D,0x0D,0x82,0x82,0x74,0x33,0xD0,0x00,0x00,0x03,0x67,0x9B,0x00,0x00, + 0x39, 0, 2, 0x6F,0x24, + 0x39, 0, 8, 0xCA,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x00, + 0x39, 0, 22, 0xCB,0x2D,0x00,0x28,0xA4,0x29,0x71,0x00,0x00,0x3F,0xDF,0x4C,0x08,0x80,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x15, + 0x39, 0, 16, 0xCB,0x81,0xB5,0x75,0x82,0x1C,0xDB,0x33,0x70,0x00,0x00,0x0C,0x9A,0x67,0x00,0x00, + 0x39, 0, 2, 0x6F,0x24, + 0x39, 0, 8, 0xCB,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x00, + 0x39, 0, 22, 0xCC,0x2B,0x00,0x28,0xA4,0x27,0xD9,0x00,0x00,0x00,0x00,0x00,0x00,0x80,0x00,0x00,0x00,0x7F,0xF9,0xAC,0x90,0xFC, + 0x39, 0, 2, 0x6F,0x15, + 0x39, 0, 16, 0xCC,0x82,0x1D,0x75,0x82,0x82,0xDB,0x33,0x8F,0xD7,0xC2,0x00,0x66,0x65,0x00,0x00, + 0x39, 0, 2, 0x6F,0x24, + 0x39, 0, 8, 0xCC,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0xD9,0x40, + 0x39, 0, 5, 0x3B,0x00,0x14,0x09,0xAC, + 0x39, 0, 2, 0x03,0x01, + 0x39, 0, 2, 0x90,0x02, + 0x39, 0, 19, 0x91,0x89,0x28,0x00,0x0C,0xC2,0x00,0x03,0x1C,0x01,0x7E,0x00,0x0F,0x08,0xBB,0x04,0x3D,0x10,0xF0, + 0x39, 0, 1, 0x2C, + 0x39, 0, 5, 0x51,0x07,0xFF,0x0F,0xFF, + 0x39, 0, 5, 0xFF,0xAA,0x55,0xA5,0x80, + 0x39, 0, 2, 0x6F,0x1D, + 0x39, 0, 2, 0xF2,0x05, + 0x39, 0, 2, 0x53,0x20, + 0x39, 0, 1, 0x35, + 0x39, 0, 5, 0x2A,0x00,0x00,0x04,0x37, + 0x39, 0, 5, 0x2B,0x00,0x00,0x09,0x5F, + 0x39, 0, 2, 0x2F,0x01, + 0x39, 0, 2, 0x26,0x01, + +#if 1 //Ϊvideoģʽ + 0x39, 0, 6, 0xF0,0x55,0xAA,0x52,0x08,0X00, + 0x39, 0, 2, 0xC0,0x77, + //0x39, 0, 2, 0xC0,0x65, //Test + 0x39, 0, 5, 0x3B,0x00,0x10,0x09,0x90, + 0x39, 0, 2, 0x90,0x00, + 0x05, 0, 1, 0x2C, + 0x39, 0, 3, 0x51,0x03,0x00, +#endif + +#if 1//BIST MODE + 0x39, 0, 6,0xF0,0x55,0xAA,0x52,0x08,0x00, + 0x39, 0, 8,0xEF,0x01,0x02,0xFF,0xFF,0xFF,0x17,0xFF, + 0x39, 0, 5,0xEE,0x87,0x78,0x02,0x40 +#endif + +#endif + +}; +#endif + + +static void init_panel(void) +{ +// uint8_t data[10] = {0}; + + /* reset panel*/ + tx_panel_reset(); + + /* enter send initial code mode*/ + hal_dsi_tx_ctrl_enter_init_panel_mode(); + +#if AMOLED_NT37701_HX628 +#if PANEL_INIT_CODE_ARRAY + send_panel_init_code(sizeof(panel_init_code), panel_init_code); + + +// hal_dsi_tx_ctrl_write_cmd(0x05, 0, 1, 0x11); + delayMs(5); //10 + hal_gpio_init_output(IO_PAD_PWMEN, IO_LVL_HIGH);//LED_ON + delayMs(80); //80 + Gpio_swire_output(2, 42); //42 + delayMs(200); //20 + hal_dsi_tx_ctrl_write_cmd(0x29, 0, 3, 0x51, 0x00, 0x00); //0FFF +// hal_dsi_tx_ctrl_write_cmd(0x05, 0, 1, 0x29); + delayMs(2); +#endif +#endif + + /* exit send initial code mode*/ + hal_dsi_tx_ctrl_exit_init_panel_mode(); + //TAU_LOGD("pannel init\n"); +// delayMs(20); +} + + + +static void open_mipi_rx(void) +{ + /* TE */ + hal_gpio_set_mode(IO_PAD_AP_TE, IO_MODE_TEAR); + + if (g_rx_ctrl_handle == NULL) + { + /* rx ctrl handle */ + g_rx_ctrl_handle = hal_dsi_rx_ctrl_create_handle(); + } + /* ò */ + g_rx_ctrl_handle->base_info.src_w = INPUT_WIDTH; + g_rx_ctrl_handle->base_info.src_h = INPUT_HEIGHT; + g_rx_ctrl_handle->base_info.dst_w = OUTPUT_WIDTH; + g_rx_ctrl_handle->base_info.dst_h = OUTPUT_HEIGHT; + g_rx_ctrl_handle->base_info.src_frate = INPUT_FRAME_RATE; + g_rx_ctrl_handle->base_info.src_mode = INPUT_DATA_MODE; + g_rx_ctrl_handle->rx_color_mode = INPUT_COLOR_MODE; + g_rx_ctrl_handle->rx_lanes = INPUT_MIPI_LANE_NUM; + g_rx_ctrl_handle->rx_nonburst_models = INPUT_VIDEO_MODEL; /* ɲ */ + g_rx_ctrl_handle->rx_vc = INPUT_VC; + g_rx_ctrl_handle->compress_en = INPUT_COMPRESS; + g_rx_ctrl_handle->rx_hsclk_rate = INPUT_MIPI_LANE_RATE; + g_rx_ctrl_handle->cus_dcs_entry_table = g_cus_rx_dcs_execute_table; /* ע DCSб */ + g_rx_ctrl_handle->rx_dcs_read_entry = ap_dcs_read; /* עdsc read ص,ѡ,˺Ϊʱcus_dcs_entry_tableִ */ + g_rx_ctrl_handle->pps_update_entry = pps_update_handle; + g_rx_ctrl_handle->pq_marginal = PQ_TYPE_5; +#if defined(ISP_568) || defined(ISP_368) + g_rx_ctrl_handle->base_info.extra_info.rot_angle = VIDOE_ROT_ANGLE_0; + g_rx_ctrl_handle->base_info.extra_info.mirror_en = false; + g_rx_ctrl_handle->base_info.extra_info.ltpo = true; +#endif + + /* ǰԤPPS, AP PPS cmdҲ */ + if (g_rx_ctrl_handle->compress_en == true) + { + #if 0 + uint8_t pps[128] = {0x11, 0x00, 0x00, 0x89, 0x30, 0x80, 0x0B, 0x90, 0x05, 0xA0, 0x00, 0x28, 0x02, 0xD0, 0x02, 0xD0, + 0x02, 0x00, 0x02, 0x68, 0x00, 0x20, 0x04, 0x6C, 0x00, 0x0A, 0x00, 0x0C, 0x02, 0x77, 0x01, 0xE9, + 0x18, 0x00, 0x10, 0xF0, 0x03, 0x0C, 0x20, 0x00, 0x06, 0x0B, 0x0B, 0x33, 0x0E, 0x1C, 0x2A, 0x38, + 0x46, 0x54, 0x62, 0x69, 0x70, 0x77, 0x79, 0x7B, 0x7D, 0x7E, 0x01, 0x02, 0x01, 0x00, 0x09, 0x40, + 0x09, 0xBE, 0x19, 0xFC, 0x19, 0xFA, 0x19, 0xF8, 0x1A, 0x38, 0x1A, 0x78, 0x1A, 0xB6, 0x2A, 0xF6, + 0x2B, 0x34, 0x2B, 0x74, 0x3B, 0x74, 0x6B, 0xF4, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}; + #else + //3Żץȡpps + uint8_t pps[128] = {0x11,0x00,0x00,0x89,0x30,0x80,0x09,0x60,0x04,0x38,0x00,0x78,0x02,0x1C,0x02,0x1C, + 0x02,0x00,0x02,0x0E,0x00,0x20,0x0B,0xAF,0x00,0x07,0x00,0x0C,0x00,0xCF,0x00,0xD9, + 0x18,0x00,0x10,0xF0,0x03,0x0C,0x20,0x00,0x06,0x0B,0x0B,0x33,0x0E,0x1C,0x2A,0x38, + 0x46,0x54,0x62,0x69,0x70,0x77,0x79,0x7B,0x7D,0x7E,0x01,0x02,0x01,0x00,0x09,0x40, + 0x09,0xBE,0x19,0xFC,0x19,0xFA,0x19,0xF8,0x1A,0x38,0x1A,0x78,0x1A,0xB6,0x2A,0xF6, + 0x2B,0x34,0x2B,0x74,0x3B,0x74,0x63,0xF4,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}; + #endif + hal_dsi_rx_ctrl_pre_init_pps(g_rx_ctrl_handle, pps, 128); + } + + /* ʼrx ctrl */ + hal_dsi_rx_ctrl_init(g_rx_ctrl_handle); + + hal_dsi_rx_ctrl_set_cus_sync_line(g_rx_ctrl_handle, 2200);// lss add, ˺1600 + + hal_dsi_rx_ctrl_set_cus_scld_filter(g_rx_ctrl_handle,rx_filter_1080_h_4_96,rx_filter_2400_v_4_96); + + /* rx ctrl */ + hal_dsi_rx_ctrl_start(g_rx_ctrl_handle); + //hal_dsi_rx_ctrl_hight_performan_mode(g_rx_ctrl_handle); + hal_dsi_rx_ctrl_set_cus_esc_clk(g_rx_ctrl_handle,20000000); +} + +static void init_mipi_tx(void) +{ + if (g_tx_ctrl_handle == NULL) + { + g_tx_ctrl_handle = hal_dsi_tx_ctrl_create_handle(); + } + g_tx_ctrl_handle->channel_id = OUTPUT_VC; + g_tx_ctrl_handle->lane_num = OUTPUT_LANE_NUMBER; + g_tx_ctrl_handle->vid_mode = OUTPUT_VIDEO_MODEL; + g_tx_ctrl_handle->cmd_tx_type = _CMD_TYPE; + g_tx_ctrl_handle->dpi_vsa = OUTPUT_VSA; + g_tx_ctrl_handle->dpi_vbp = OUTPUT_VBP; + g_tx_ctrl_handle->dpi_vfp = OUTPUT_VFP; + g_tx_ctrl_handle->dpi_hsa = OUTPUT_HSA; + g_tx_ctrl_handle->dpi_hbp = OUTPUT_HBP; + g_tx_ctrl_handle->dpi_hfp = OUTPUT_HFP; + g_tx_ctrl_handle->base_info.src_w = INPUT_WIDTH; + g_tx_ctrl_handle->base_info.src_h = INPUT_HEIGHT; + g_tx_ctrl_handle->base_info.dst_w = OUTPUT_WIDTH; + g_tx_ctrl_handle->base_info.dst_h = OUTPUT_HEIGHT; + g_tx_ctrl_handle->base_info.src_frate = INPUT_FRAME_RATE; + g_tx_ctrl_handle->base_info.src_mode = INPUT_DATA_MODE; + g_tx_ctrl_handle->tx_line_delay = 100; + g_tx_ctrl_handle->tx_frame_rate = OUTPUT_FRAME_RATE; + g_rx_ctrl_handle->base_info.extra_info.ltpo = true; + + hal_dsi_tx_ctrl_init(g_tx_ctrl_handle); + /* AP ûзʱĬϵʾɫ, Ϊ0 0 0(ɫ), ɫΪdebugʹ */ + hal_dsi_tx_ctrl_set_overwrite_rgb(0x00, 0x00, 0x00); +} + + +static void tx_display_on(void) +{ + init_panel(); + +// hal_dsi_tx_ctrl_write_cmd(0x29, 0, 3, 0x51, 0x00, 0x00); //0FFF + hal_dsi_tx_ctrl_start(g_tx_ctrl_handle); + + //ʱʾĻỨһµ + delayMs(50); + hal_dsi_tx_ctrl_write_cmd(0x05, 0, 2, 0x29); +} + +static void swire_timer_callback(void *data) +{ +#ifdef USE_FOR_SUMSUNG_S21 + if(Flag_blacklight_EN) + { + hal_swire_start(12, 12, 12, 12, SWIRE_DEFAULT_NUM); + } + else if(s20_power_on_flag) + { + hal_swire_start(12, 12, 12, 12, SWIRE_DEFAULT_NUM); + } + else +#endif + { + hal_swire_start(12, 12, 12, 12, swire_num); + } +} + +static void swire_callback(void *data) +{ + /* swire ǷҪһֱҪֻֻͬͬ */ + //if(start_display_on == false) + { + hal_timer_start(SWIRE_TIMER, 26, swire_timer_callback, NULL); + } +} + +/* swire ʼ,ͨ hal_swire_start , ѭһֱ */ +static void swire_init() +{ + hal_swire_open(DISABLE); + hal_swire_init(); + /* swire ηɺص */ + hal_swire_register_callback(swire_callback); + hal_swire_open(ENABLE); + //hal_swire_start(12, 12, 12, 12, 43); + hal_swire_start(12, 12, 12, 12, SWIRE_DEFAULT_NUM); //3~27,~,9.45V~7.43V + hal_timer_init(SWIRE_TIMER); + hal_timer_start(SWIRE_TIMER, 26, swire_timer_callback, NULL); +} + +//static void soft_te_timer_cb(void *data) +//{ +// /* +// S8 ӵTP1.8V, AC ҪȵTP1.8 ٳʼ, TP ǰҪͨTEֻֻ +// */ +// if (panel_display_done == false) +// { +// hal_dsi_rx_ctrl_gen_a_tear_signal(g_rx_ctrl_handle); +// hal_timer_start(TE_TIMER, 17, soft_te_timer_cb, NULL); +// } +// else +// { +// hal_dsi_rx_ctrl_set_hw_tear_mode(g_rx_ctrl_handle); +// //hal_dsi_rx_ctrl_set_tear_mode_ex(g_rx_ctrl_handle, 2100, TE_HW_MODE); +// } +//} + +//static void soft_te_timer_init() +//{ +// TAU_LOGD("soft_te_timer_init\n"); +// hal_dsi_rx_ctrl_set_sw_tear_mode(g_rx_ctrl_handle); +// hal_timer_init(TE_TIMER); +// hal_timer_start(TE_TIMER, 1, soft_te_timer_cb, NULL); +//} + +#ifdef ADD_TIMER3_FUNCTION +static void soft_timer3_cb(void *data) +{ + hal_timer_start(TIMER_NUM3, 10, soft_timer3_cb, NULL); + tp_sleep_count++; + if(phone_DisplayOFF_count>0) + { + phone_DisplayOFF_count++; + } + //TAU_LOGD("time3 init\n"); + +#if AUTO_CAL_TP + if (g_exit_sleep_mode) + { + if (g_cal_cnt > 0) + { + g_cal_cnt--; + if (g_cal_cnt == 0){ + g_calibration_flag = true; + TAU_LOGD("Start cal tp!\n"); + } + } + } +#endif + +#if RUN_TEST + g_run_test_cnt++; +#endif +} +#endif + +/* +#if ADD_TP_CALIBRATION +void app_tp_calibration_exec(void) +{ + if(g_calibration_flag) + { + g_calibration_flag = false; + ap_tp_st_touch_calibration(); + TAU_LOGD("calibration successful \n"); + } +} +#endif +*/ + +void tp_heartbeat_exec(void) +{ + if (s_screen_init_complate) + { + if(hal_gpio_get_input_data(IO_PAD_TD_INT)) + { + s_heartbeat = 0; + } + else + { + if(s_heartbeat < (65536/50)) // 65536*3 = 900ms 65536/50 = 6ms + { + s_heartbeat ++; + }else + { + TAU_LOGD("hb"); + s_heartbeat = 0; + ap_tp_st_touch_software_reset(); + } + } + } +} + +void ap_demo(void) +{ + hal_gpio_init_output(IO_PAD_TD_LEDPWM, IO_LVL_LOW); + hal_gpio_init_output(IO_PAD_AP_SWIRE, IO_LVL_LOW); + hal_gpio_init_output(IO_PAD_ADCIN, IO_LVL_LOW); + // hal_gpio_init_output(IO_PAD_AP_INT, IO_LVL_LOW); + hal_gpio_init_output(IO_PAD_PWMEN, IO_LVL_LOW); // LED_ON + tp_sleep_in = 1; + app_tp_I2C_init(); + + /* mipi rxʼ */ + open_mipi_rx(); + TAU_LOGD("s21 demo1\n"); + + + // hal_dsi_rx_ctrl_set_hw_tear_mode(g_rx_ctrl_handle); + + /* TP1.8е֮ǰʹTEʾ֮лΪӲTE */ +// soft_te_timer_init(); + /* mipi tx ʼ*/ + init_mipi_tx(); + /* Set Interrupt Priority */ + //NVIC_GetPriority + // NVIC_SetPriority(I2C1_IRQn,(1<< __NVIC_PRIO_BITS )+ 1); + // NVIC_SetPriority(I2C0_IRQn,0); + // NVIC_SetPriority(I2C1_IRQn,1); +// NVIC_SetPriority(I2C0_IRQn,(1<< __NVIC_PRIO_BITS ) ); + // TAU_LOGD("I2C0_IRQn: %x\n",NVIC_GetPriority(I2C0_IRQn)); + // TAU_LOGD("I2C1_IRQn: %x\n",NVIC_GetPriority(I2C1_IRQn)); + + /* touch ģʼ */ +#ifndef DISPLAY_ONLY + app_tp_init(); +#endif + +#ifdef ADD_TIMER3_FUNCTION + tp_sleep_count = 0; + phone_DisplayOFF_count=1; + hal_timer_init(TIMER_NUM3); + hal_timer_start(TIMER_NUM3, 10, soft_timer3_cb, NULL); + TAU_LOGD("start timer3\n"); +#endif + + while (1) + { + /* ȴ AP TP ϵ*/ + if (start_display_on == true ) + { + /* ʼ */ + tx_display_on(); + start_display_on = false; + panel_display_done = true; + + app_tp_phone_clear_reset_on(); + #ifndef DISABLE_TDDI_I2C_FUNCTION + /* TP ģͨѶʼ */ + app_tp_transfer_screen_start(); + #endif + #if ENABLE_TP_WAKE_UP + hal_gpio_set_ap_reset_int(ENABLE, ap_reset_cb, DETECT_RISING_EDGE); + #endif + } + + if(phone_DisplayOFF_flag==1) + { + if(phone_DisplayOFF_count>950) + { + phone_DisplayOFF_count=0; + phone_start_flag=1; + } + } + else + { + if(phone_DisplayOFF_count>20) + { + phone_DisplayOFF_count=0; + phone_start_flag=1; + hal_gpio_set_output_data(IO_PAD_AP_INT, IO_LVL_LOW); //ͣ˫2~3s޴.jason_su + } + } + +// if(phone_DisplayOFF_count>560) +// { +// phone_DisplayOFF_count=0; +// ap_tp_calibration(); +// } + + + #if ADD_TP_CALIBRATION + app_tp_calibration_exec(); + #endif + + tp_heartbeat_exec(); + ap_tp_st_touch_scan_point_record_event_exec(); +// ap_tp_scan_point_record_event_exec(); + + #ifndef DISABLE_TDDI_I2C_FUNCTION + /* ȴ TP жϱTP Эת */ + app_tp_transfer_screen_int(); + #endif + + while (hal_dsi_rx_ctrl_dsc_async_handler(g_rx_ctrl_handle)) + { + } + + #if ENABLE_TP_WAKE_UP + if (g_need_enter_sleep_mode) + { + hal_gpio_init_output(IO_PAD_TD_LEDPWM, IO_LVL_HIGH); + /* FIXME stop more model */ +// g_swire_enable = false; + hal_dsi_tx_ctrl_stop(g_tx_ctrl_handle); + hal_dsi_tx_ctrl_deinit(g_tx_ctrl_handle); + hal_dsi_rx_ctrl_stop(g_rx_ctrl_handle); + hal_dsi_rx_ctrl_deinit(g_rx_ctrl_handle); + +// hal_swire_open(DISABLE); +// hal_swire_deinit(); +// hal_timer_stop(SWIRE_TIMER); +// hal_timer_deinit(SWIRE_TIMER); + + TAU_LOGD("disable video path \n"); + g_need_enter_sleep_mode = false; + hal_system_set_vcc(false); + tp_sleep_in=1; + } + #endif + + #if RUN_TEST + if (g_run_test_cnt > 200) + { + TAU_LOGD("system run\n"); + g_run_test_cnt = 0; + } + #endif + + /* enter idle mode*/ + //hal_system_idle_mode(true); + } +} + + + diff --git a/src/app/demo/ap_demo.h b/src/app/demo/ap_demo.h new file mode 100644 index 0000000..f06bcb8 --- /dev/null +++ b/src/app/demo/ap_demo.h @@ -0,0 +1,58 @@ +/******************************************************************************* +* +* +* File: s8_demo.h +* Description: s8ͷļ +* Version: V0.1 +* Date: 2021-02-22 +* Author: Tempest + *******************************************************************************/ + +#ifndef __AP_DEMO_H__ +#define __AP_DEMO_H__ + +//#define DISABLE_TDDI_I2C_FUNCTION +//#define USE_WL518_INTERNAL_FLASH + + +/* ͬѡѡѡ1*/ +#define USE_FOR_SUMSUNG_S21 +//#define USE_FOR_SUMSUNG_S20PLUS +//#define USE_FOR_OPPO_RENO3_PRO + + +#ifdef USE_FOR_SUMSUNG_S20PLUS +#define AMOLED_NT37701_VNOX667 1 + +#define USE_FOR_S10_BLUE_MODE //S10ģʽ +#define ADD_PANEL_DISPLAY_MODE //Ļģʽܡƽ⹦ +#endif + +#ifdef USE_FOR_SUMSUNG_S21 +#define LCD_FT8719_DU48 0 +#define AMOLED_NT37701_HX628 1 + +#define PANEL_INIT_CODE_ARRAY 1 + +#define G_PHONE_INT_DEFAULT_LOW + +#define USE_FOR_S10_BLUE_MODE //S10ģʽ +#define ADD_PANEL_DISPLAY_MODE //Ļģʽܡƽ⹦ +#define ADD_TIMER3_FUNCTION +#define ENABLE_TP_SLEEP + +#define USE_FILTER_20220513 +#endif + +#ifdef USE_FOR_OPPO_RENO3_PRO +#define AMOLED_NT37701_HX655 1 +#endif + +/** +* @brief test system +* @param none +* @retval none +*/ +void ap_demo(void); +void app_tp_I2C_init(void); +#endif diff --git a/src/app/demo/app_tp_for_custom_s8.h b/src/app/demo/app_tp_for_custom_s8.h new file mode 100644 index 0000000..9212e9b --- /dev/null +++ b/src/app/demo/app_tp_for_custom_s8.h @@ -0,0 +1,156 @@ +/******************************************************************************* +* +* +* File: app_tp_for_custom.h +* Description tp Э鴦ļضõĺ +* Version V0.1 +* Date 2021-10-14 +* Author zhanghz +*******************************************************************************/ +#ifndef __APP_TP_FOR_CUSTOM_S8_H__ +#define __APP_TP_FOR_CUSTOM_S8_H__ +#include "test_cfg_global.h" + +#include "string.h" +#include "tau_device_datatype.h" +#include "tau_common.h" +#include "app_tp_transfer.h" +#include "hal_gpio.h" + +#define AP_TP_TRANSFER 1 + +#if AMOLED_NT37280 + #define PHONE_SLAVE_TRANSFER_I2C 1 //1:ʾֻоƬ֮䣬touch ݲ I2C ͨţ + #define PHONE_SLAVE_TRANSFER_SPI 0 //1:ʾֻоƬ֮䣬touch ݲ SPI ͨţ + #define SCREEN_MASTER_TRANSFER_I2C 0 //1:ʾĻоƬ֮䣬touch ݲ I2C ͨţ + #define SCREEN_MASTER_TRANSFER_SPI 1 //1:ʾĻоƬ֮䣬touch ݲ SPI ͨţ +#elif LCD_HX83112A + #define PHONE_SLAVE_TRANSFER_I2C 1 //1:ʾֻоƬ֮䣬touch ݲ I2C ͨţ + #define PHONE_SLAVE_TRANSFER_SPI 0 //1:ʾֻоƬ֮䣬touch ݲ SPI ͨţ + #define SCREEN_MASTER_TRANSFER_I2C 0 //1:ʾĻоƬ֮䣬touch ݲ I2C ͨţ + #define SCREEN_MASTER_TRANSFER_SPI 0 //1:ʾĻоƬ֮䣬touch ݲ SPI ͨţ +#else // #if LCD_TD4310 + #define PHONE_SLAVE_TRANSFER_I2C 1 //1:ʾֻоƬ֮䣬touch ݲ I2C ͨţ + #define PHONE_SLAVE_TRANSFER_SPI 0 //1:ʾֻоƬ֮䣬touch ݲ SPI ͨţ + #define SCREEN_MASTER_TRANSFER_I2C 1 //1:ʾĻоƬ֮䣬touch ݲ I2C ͨţ + #define SCREEN_MASTER_TRANSFER_SPI 0 //1:ʾĻоƬ֮䣬touch ݲ SPI ͨţ +#endif + +#ifdef USE_FOR_SUMSUNG_S21 +#define CHIP_I2C_ADDRESS 0x48 //оƬ I2C ӻַ.I2Cַ +#define SCREEN_I2C_ADDRESS 0x49 //Ļ I2C ӻַ + +#elif defined(USE_FOR_SUMSUNG_S9PLUS) +#define CHIP_I2C_ADDRESS 0x48 //оƬ I2C ӻַ +#define SCREEN_I2C_ADDRESS 0x20 //Ļ I2C ӻַ + +#else +#define CHIP_I2C_ADDRESS 0x48 //оƬ I2C ӻַ +#define SCREEN_I2C_ADDRESS 0x49 //Ļ I2C ӻַ +#endif + +#define CHIP_I2C_ADDR_BITS I2C_ADDR_BITS_7 //Ļ I2C ַλ 7/10ĬΪ7 +#define SCREEN_I2C_ADDR_BITS I2C_ADDR_BITS_7 //Ļ I2C ַλ 7/10ĬΪ7 +#define I2C_MASTER_SPEED 800000 // I2C ͨ 800000 + +#define SPI_MASTER_SPEED 10000000 // SPI ͨ + +#define BUFFER_SIZE_MAX 200 // bufrer ֽ + +#define INPUT_WIDTH_VALUE 1440 //ԭװ X ֵֵ +#define INPUT_HEIGHT_VALUE 3200 //ԭװ Y ֵֵ + +#if LCD_FT8006S_TRULY59 +#define OUTPUT_WIDTH_VALUE 720 //ά X ֵֵ +#define OUTPUT_HEIGHT_VALUE 1520 //ά Y ֵֵ + +#else +#define OUTPUT_WIDTH_VALUE 1080 //ά X ֵֵ +#define OUTPUT_HEIGHT_VALUE 2400 //ά Y ֵֵ +#endif + + +#define SCREEN_TRANSFER_WRITE false //յscreen ioжϣ֮ö +#define SCREEN_TRANSFER_READ true //յscreen ioжϣ֮Ҫ + +typedef enum +{ + I2C_ADDR_BITS_7 = 7, + I2C_ADDR_BITS_10 = 10 +} en_I2C_ADDR_BITS_mdoe; + +typedef struct +{ + uint8_t *buffer; //յscreen ioжϺͨŵķbufferָ + size_t txbuffer_size; // buffer ݳȣҪʱĿǰֻ֧4ֽ + size_t rxbuffer_size; //֮Ҫصݳ + bool read_flag; //true յscreen ioжϣ֮Ҫ +} st_screen_data; + +typedef struct +{ + const uint8_t *buffer; //ͨŵķbufferָ + size_t txbuffer_size; // buffer ݳȣҪʱĿǰֻ֧4ֽ + size_t rxbuffer_size; //֮Ҫصݳ + bool read_flag; //true յscreen ioжϣ֮Ҫ +} st_screen_const_data; + +typedef struct +{ + uint8_t reg_size; //bufferĸ + size_t write_back_size; //Ҫ͵ݳ + const uint8_t *reg_data; //buffer + const uint8_t *write_back; //bufer +} st_reg_const_data; + +typedef struct +{ + uint8_t reg_size; //bufferĸ + size_t write_back_size; //Ҫ͵ݳ + uint8_t *reg_data; //buffer + uint8_t *write_back; //bufer +} st_reg_data; + +extern io_pad_e g_screen_input_rst_pad; +extern io_pad_e g_screen_input_int_pad; +extern io_pad_e g_phone_input_rst_pad; +extern io_pad_e g_phone_output_int_pad; + +extern uint8_t phone_start_flag; +extern uint8_t phone_touch_flag; +extern const uint8_t screen_reg_int_data_size; +extern const uint8_t screen_reg_start_data_size; +extern st_screen_data screen_reg_int_data[]; +extern st_screen_const_data screen_reg_start_data[]; +//extern st_reg_const_data phone_reg_const_data[]; + +/************************************************************************** +* @name : app_tp_screen_analysis_const +* @brief : screen start ׶ݽɿͻ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +uint8_t app_tp_screen_analysis_const(uint8_t transfer_now, uint8_t *rxbuffer, size_t data_size); + +/************************************************************************** +* @name : app_tp_screen_analysis_int +* @brief : screen IOжϺ ݽɿͻ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +uint8_t app_tp_screen_analysis_int(uint8_t transfer_now, uint8_t *rxbuffer, size_t data_size); + +/************************************************************************** +* @name : app_tp_phone_analysis_data +* @brief : phone ݽɿͻ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +void app_tp_phone_analysis_data(uint8_t *rxbuffer, size_t rxbuffer_size, const uint8_t **txbuffer, size_t *txbuffer_size); + + +#endif + diff --git a/src/app/demo/app_tp_phone_transfer_data_s8.h b/src/app/demo/app_tp_phone_transfer_data_s8.h new file mode 100644 index 0000000..8bead7f --- /dev/null +++ b/src/app/demo/app_tp_phone_transfer_data_s8.h @@ -0,0 +1,313 @@ +/******************************************************************************* +* +* +* File: app_tp_transfer_data.h +* Description ôӻҪ𸴵ĽֵӦĴֵ +* Version V0.1 +* Date 2021-10-14 +* Author zhanghz +*******************************************************************************/ +#ifndef __APP_TP_PHONE_TRANSFER_DATA_S8_H__ +#define __APP_TP_PHONE_TRANSFER_DATA_S8_H__ + +#include "tau_common.h" +#include "ap_demo.h" + +/*******************************************/ +#ifdef USE_FOR_SUMSUNG_S21 +const uint8_t phone_data_60_1[]={0x09,0x00,0x10,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}; +const uint8_t phone_data_60_2[]={0x1D,0x61,0x02,0x02,0x06,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}; +const uint8_t phone_data_60_3[]={0x1D,0x61,0x06,0x00,0x02,0x02,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}; +const uint8_t phone_data_60_4[]={0x1D,0x41,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}; +const uint8_t phone_data_60_5[]={0x1D,0x61,0x05,0x02,0x02,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}; +const uint8_t phone_data_60_6[]={0x1D,0x61,0x02,0x02,0x05,0x02,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}; +const uint8_t phone_data_60_7[]={0x1D,0x61,0x05,0x02,0x02,0x02,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}; +const uint8_t phone_data_60_8[]={0x09,0x01,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}; +const uint8_t phone_data_21[]={0x80}; +const uint8_t phone_data_22[]={0x53,0x45,0x37,0x92,0x00}; +const uint8_t phone_data_23[]={0x10,0x00,0x10,0x00,0x04,0x38,0x09,0x60,0x10,0x23,0x00}; +const uint8_t phone_data_30[]={0x61,0x00}; +const uint8_t phone_data_52[]={0xAC,0x79,0xA1}; +const uint8_t phone_data_55[]={0x20}; +const uint8_t phone_data_85_00[]={0xFF}; +const uint8_t phone_data_85_02[]={0x01,0x27,0x01,0x04,0x03,0x02,0x09,0x01,0x03,0x38,0x09,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x00}; +const uint8_t phone_data_85_20[]={0x01,0x28,0x02,0x04,0x01,0x00,0x03,0x2F,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0x01,0x00}; +const uint8_t phone_data_90[]={0x4E,0x39,0x38,0x36,0x00,0x04,0x00,0x06,0x20,0x01}; +const uint8_t phone_data_92_F0[]={0x8A,0x25}; +const uint8_t phone_data_92_0A[]={0xC7,0x00,0x84,0x00,0xC7,0x00}; +const uint8_t phone_data_92_15[]={0x10,0x12,0x24,0x00}; +const uint8_t phone_data_A3[]={0x28,0x18,0x01,0x00}; +const uint8_t phone_data_A4[]={0x28,0x18,0x01,0x02}; +const uint8_t phone_data_A5[]={0x28,0x18,0x01,0x30}; +const uint8_t phone_data_AF[]={0x00,0x02,0x01,0x00}; +//const uint8_t phone_data_E4[]={0x00}; +uint8_t phone_data_E4[]={0x01}; +const uint8_t phone_data_F1[]={0x07,0x07,0x00,0xA2}; +//const uint8_t phone_data_F5[]={0x00}; +const uint8_t phone_data_F5_1[]={0xFF}; +const uint8_t phone_data_F5_2[]={0x13}; +const uint8_t phone_data_F5_3[]={0x00}; +const uint8_t phone_data_F5_4[]={0x06}; +const uint8_t phone_data_F6_1[]={0xFA,0xF4,0xFB,0x09,0xFB,0x09}; +const uint8_t phone_data_F6_2[]={0x25,0x23,0x23,0xE1,0x21,0x86}; +const uint8_t phone_data_F6_3[]={0x00,0x01,0x00,0x01,0x00,0x00}; +const uint8_t phone_data_F6_4[]={0x00,0x02,0x00,0x00,0x00,0x00}; + +uint8_t phone_data_B1[]={0x00,0x082}; + +#if 1 +const uint8_t phone_data_72_03[]={ +0xFF,0xEC,0x00,0x0C,0xFF,0xFF,0xFF,0xFE,0x00,0x00,0x00,0x01,0x00,0x00,0xFF,0xFE,0x00,0x00,0xFF,0xFF,0xFF,0xFE,0x00,0x00,0xFF,0xFE,0x00,0x01,0xFF,0xFF,0x00,0x03,\ +0x00,0x03,0x00,0x05,0x00,0x01,0x00,0x07,0xFF,0xFA,0xFF,0xFC,0xFF,0xFE,0xFF,0xFF,0x00,0x00,0x00,0x01,0x00,0x01,0x00,0x02,0x00,0x02,0x00,0x00,0x00,0x00,0x00,0x01,\ +0x00,0x02,0x00,0x02,0xFF,0xFB,0xFF,0xE2,0x00,0x0C,0x00,0x01,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x01,0x00,0x04,0x00,0x03,0x00,0x01,0x00,0x02,0x00,0x03,0x00,0x05,\ +0x00,0x04,0x00,0x05,0x00,0x08,0x00,0x09,0x00,0x0F,0x00,0x08,0x00,0x01,0xFF,0xF8,0xFF,0xF8,0xFF,0xFC,0xFF,0xFD,0xFF,0xFF,0x00,0x00,0x00,0x02,0x00,0x00,0x00,0x02,\ +0x00,0x01,0x00,0x04,0x00,0x01,0x00,0x02,0x00,0x03,0xFF,0xFE,0xFF,0xF5,0x00,0x0A,0xFF,0xFB,0xFF,0xFB,0xFF,0xFE,0xFF,0xFD,0xFF,0xFF,0xFF,0xFF,0x00,0x04,0x00,0x02,\ +0x00,0x03,0x00,0x04,0x00,0x04,0x00,0x06,0x00,0x07,0x00,0x0B,0x00,0x0D,0x00,0x10,0x00,0x09,0xFF,0xF7,0xFF,0xFC,0xFF,0xF4,0xFF,0xF8,0xFF,0xFD,0xFF,0xFE,0x00,0x01,\ +0x00,0x00,0x00,0x02,0x00,0x01,0x00,0x03,0x00,0x02,0x00,0x03,0x00,0x04,0x00,0x03,0xFF,0xFF,0xFF,0xF9,0x00,0x01,0xFF,0xF9,0xFF,0xFC,0xFF,0xFF,0x00,0x01,0xFF,0xFF,\ +0xFF,0xFF,0x00,0x00,0x00,0x02,0x00,0x01,0x00,0x05,0x00,0x06,0x00,0x08,0x00,0x0B,0x00,0x0C,0x00,0x13,0x00,0x09,0x00,0x03,0xFF,0xFE,0xFF,0xFC,0xFF,0xF4,0xFF,0xF7,\ +0xFF,0xFD,0xFF,0xFE,0x00,0x00,0x00,0x02,0x00,0x00,0x00,0x03,0x00,0x02,0x00,0x06,0x00,0x07,0x00,0x02,0x00,0x01,0x00,0x04,0xFF,0xCA,0x00,0x06,0xFF,0xFF,0x00,0x01,\ +0xFF,0xFF,0x00,0x01,0x00,0x03,0x00,0x00,0x00,0x04,0x00,0x05,0x00,0x04,0x00,0x07,0x00,0x07,0x00,0x0C,0x00,0x0D,0x00,0x13,0x00,0x10,0x00,0x02,0xFF,0xFF,0x00,0x09,\ +0xFF,0xFD,0xFF,0xF9,0xFF,0xF5,0xFF,0xFB,0xFF,0xFC,0xFF,0xFE,0x00,0x01,0x00,0x00,0x00,0x03,0x00,0x02,0x00,0x03,0x00,0x04,0x00,0x04,0x00,0x06,0x00,0x06,0xFF,0xDE,\ +0x00,0x08,0xFF,0xFD,0xFF,0xFD,0xFF,0xFD,0xFF,0xFF,0x00,0x00,0x00,0x04,0x00,0x03,0x00,0x05,0x00,0x06,0x00,0x07,0x00,0x0B,0x00,0x09,0x00,0x10,0x00,0x15,0x00,0x05,\ +0xFF,0xFA,0xFF,0xFF,0x00,0x0B,0x00,0x01,0xFF,0xFF,0xFF,0xF3,0xFF,0xF6,0xFF,0xFC,0xFF,0xFD,0xFF,0xFF,0x00,0x04,0x00,0x01,0x00,0x03,0x00,0x03,0x00,0x09,0x00,0x05,\ +0x00,0x05,0x00,0x02,0xFF,0xDA,0x00,0x03,0xFF,0xFB,0xFF,0xFB,0xFF,0xFD,0xFF,0xFE,0x00,0x04,0x00,0x00,0x00,0x02,0x00,0x03,0x00,0x05,0x00,0x03,0x00,0x09,0x00,0x0D,\ +0x00,0x12,0x00,0x0D,0xFF,0xFD,0xFF,0xF7,0xFF,0xFC,0x00,0x08,0x00,0x0E,0x00,0x00,0xFF,0xF8,0xFF,0xF1,0xFF,0xF6,0xFF,0xFB,0xFF,0xFB,0xFF,0xFF,0x00,0x02,0x00,0x01,\ +0x00,0x05,0x00,0x06,0x00,0x07,0x00,0x07,0x00,0x06,0xFF,0xC0,0x00,0x04,0xFF,0xFE,0xFF,0xFD,0x00,0x01,0x00,0x00,0x00,0x03,0x00,0x03,0x00,0x06,0x00,0x05,0x00,0x07,\ +0x00,0x0B,0x00,0x0D,0x00,0x13,0x00,0x12,0x00,0x03,0xFF,0xF7,0xFF,0xFA,0x00,0x00,0x00,0x07,0x00,0x0E,0x00,0x08,0x00,0x01,0xFF,0xF2,0xFF,0xF7,0xFF,0xF9,0xFF,0xFD,\ +0xFF,0xFE,0x00,0x01,0x00,0x00,0x00,0x05,0x00,0x04,0x00,0x09,0x00,0x07,0xFF,0xFB,0xFF,0xED,0x00,0x03,0xFF,0xFB,0xFF,0xFB,0xFF,0xFE,0x00,0x01,0x00,0x03,0x00,0x00,\ +0x00,0x03,0x00,0x07,0x00,0x08,0x00,0x07,0x00,0x0F,0x00,0x12,0x00,0x06,0xFF,0xF6,0xFF,0xF7,0xFF,0xFD,0x00,0x03,0x00,0x06,0x00,0x0A,0x00,0x10,0x00,0x03,0xFF,0xFE,\ +0xFF,0xF4,0xFF,0xF9,0xFF,0xFC,0xFF,0xFE,0xFF,0xFF,0x00,0x01,0x00,0x04,0x00,0x06,0x00,0x06,0x00,0x06,0xFF,0xF7,0xFF,0xEA,0x00,0x01,0xFF,0xFB,0xFF,0xFC,0xFF,0xFC,\ +0xFF,0xFF,0x00,0x03,0x00,0x02,0x00,0x04,0x00,0x07,0x00,0x0A,0x00,0x0E,0x00,0x13,0x00,0x08,0xFF,0xFD,0xFF,0xF3,0xFF,0xF9,0xFF,0xFF,0xFF,0xFF,0x00,0x05,0x00,0x09,\ +0x00,0x0F,0x00,0x09,0x00,0x04,0xFF,0xF4,0xFF,0xF4,0xFF,0xF8,0xFF,0xFE,0xFF,0xFD,0x00,0x01,0x00,0x04,0x00,0x07,0x00,0x04,0x00,0x08,0x00,0x05,0xFF,0xEA,0x00,0x05,\ +0xFF,0xFE,0xFF,0xFC,0xFF,0xFD,0x00,0x01,0x00,0x03,0x00,0x02,0x00,0x04,0x00,0x07,0x00,0x0B,0x00,0x11,0x00,0x0D,0x00,0x03,0xFF,0xF3,0xFF,0xF3,0xFF,0xFD,0xFF,0xFE,\ +0x00,0x01,0x00,0x06,0x00,0x06,0x00,0x0B,0x00,0x11,0xFF,0xFF,0x00,0x03,0xFF,0xF0,0xFF,0xF7,0xFF,0xFD,0xFF,0xFD,0x00,0x02,0x00,0x02,0x00,0x03,0x00,0x04,0x00,0x04,\ +0x00,0x03,0xFF,0xDC,0x00,0x01,0xFF,0xFD,0xFF,0xFD,0xFF,0xFE,0xFF,0xFD,0x00,0x01,0x00,0x00,0x00,0x06,0x00,0x09,0x00,0x0E,0x00,0x13,0x00,0x07,0xFF,0xFB,0xFF,0xF2,\ +0xFF,0xF9,0xFF,0xFB,0x00,0x00,0x00,0x00,0x00,0x04,0x00,0x06,0x00,0x08,0x00,0x0D,0x00,0x0E,0x00,0x00,0xFF,0xF7,0xFF,0xF4,0xFF,0xFA,0xFF,0xFD,0xFF,0xFD,0xFF,0xFF,\ +0x00,0x03,0x00,0x03,0x00,0x06,0x00,0x05,0xFF,0xE2,0x00,0x03,0xFF,0xFF,0xFF,0xFD,0xFF,0xFC,0xFF,0xFF,0x00,0x04,0x00,0x02,0x00,0x06,0x00,0x0A,0x00,0x11,0x00,0x0C,\ +0x00,0x02,0xFF,0xF1,0xFF,0xF7,0xFF,0xFD,0xFF,0xFF,0x00,0x00,0x00,0x08,0x00,0x04,0x00,0x07,0x00,0x08,0x00,0x09,0x00,0x0C,0x00,0x03,0xFF,0xFD,0xFF,0xF3,0xFF,0xF8,\ +0xFF,0xFD,0x00,0x01,0x00,0x05,0x00,0x03,0x00,0x01,0x00,0x02,0x00,0x03,0xFF,0xF0,0x00,0x04,0xFF,0xFF,0xFF,0xFE,0xFF,0xFE,0xFF,0xFF,0x00,0x03,0x00,0x05,0x00,0x04,\ +0x00,0x0A,0x00,0x12,0x00,0x06,0xFF,0xFD,0xFF,0xF7,0xFF,0xFA,0xFF,0xFE,0xFF,0xFF,0x00,0x00,0x00,0x00,0x00,0x02,0x00,0x03,0x00,0x04,0x00,0x09,0x00,0x0A,0x00,0x0B,\ +0x00,0x00,0xFF,0xFA,0xFF,0xF6,0xFF,0xFC,0xFF,0xFF,0xFF,0xFF,0x00,0x05,0x00,0x01,0x00,0x02,0x00,0x01,0xFF,0xEE,0x00,0x08,0xFF,0xFC,0xFF,0xFD,0xFF,0xFE,0x00,0x02,\ +0x00,0x02,0x00,0x03,0x00,0x07,0x00,0x0B,0x00,0x09,0x00,0x02,0xFF,0xF8,0xFF,0xFB,0xFF,0xFE,0x00,0x00,0x00,0x01,0x00,0x02,0x00,0x00,0x00,0x02,0x00,0x01,0x00,0x05,\ +0x00,0x04,0x00,0x04,0x00,0x0D,0x00,0x00,0xFF,0xFE,0xFF,0xF8,0xFF,0xFE,0xFF,0xFD,0x00,0x00,0x00,0x01,0x00,0x03,0x00,0x03,0x00,0x01,0x00,0x01,0x00,0x0C,0xFF,0xFD,\ +0xFF,0xFF,0xFF,0xFE,0xFF,0xFF,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x06,0x00,0x01,0x00,0x02,0xFF,0xFC,0xFF,0xFE,0x00,0x01,0xFF,0xFE,0x00,0x01,0x00,0x01,0x00,0x00,\ +0x00,0x01,0x00,0x02,0x00,0x01,0x00,0x04,0x00,0x03,0x00,0x05,0x00,0x02,0xFF,0xFF,0xFF,0xFB,0xFF,0xFD,0xFF,0xFE,0x00,0x00,0x00,0x01,0x00,0x01,0x00,0x01,0xFF,0xFD}; +const uint8_t phone_data_72_05[]={ +0xFF,0xCC,0x00,0x12,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x03,0x00,0x01,0xFF,0xFF,0x00,0x04,0x00,0x01,0x00,0x01,0x00,0x04,0x00,0x04,0x00,0x03,0x00,0x04,0x00,0x06,\ +0x00,0x06,0x00,0x07,0x00,0x03,0x00,0x0A,0xFF,0xF9,0xFF,0xFD,0xFF,0xFF,0x00,0x01,0x00,0x01,0x00,0x02,0x00,0x05,0x00,0x02,0x00,0x04,0x00,0x01,0x00,0x03,0x00,0x01,\ +0x00,0x05,0xFF,0xFE,0x00,0x01,0xFF,0xCC,0x00,0x0E,0xFF,0xFE,0xFF,0xFF,0x00,0x02,0xFF,0xFD,0x00,0x01,0x00,0x05,0x00,0x04,0x00,0x01,0x00,0x03,0x00,0x04,0x00,0x04,\ +0x00,0x03,0x00,0x06,0x00,0x06,0x00,0x0A,0x00,0x11,0x00,0x07,0xFF,0xFE,0xFF,0xFD,0xFF,0xF7,0xFF,0xFD,0xFF,0xFF,0xFF,0xFF,0x00,0x02,0xFF,0xFF,0x00,0x02,0x00,0x00,\ +0x00,0x01,0x00,0x03,0xFF,0xFF,0x00,0x03,0x00,0x04,0x00,0x05,0xFF,0xF2,0x00,0x0A,0xFF,0xFC,0xFF,0xFD,0xFF,0xFE,0xFF,0xFD,0xFF,0xFF,0xFF,0xFF,0x00,0x02,0x00,0x03,\ +0x00,0x03,0x00,0x06,0x00,0x08,0x00,0x07,0x00,0x06,0x00,0x0C,0x00,0x0C,0x00,0x0F,0x00,0x07,0xFF,0xF6,0xFF,0xFD,0xFF,0xF5,0xFF,0xF9,0xFF,0xFD,0xFF,0xFD,0xFF,0xFE,\ +0x00,0x01,0x00,0x00,0x00,0x04,0x00,0x01,0x00,0x07,0x00,0x01,0xFF,0xFF,0x00,0x00,0x00,0x05,0xFF,0xFE,0x00,0x02,0xFF,0xFA,0xFF,0xF9,0xFF,0xFC,0x00,0x01,0xFF,0xFD,\ +0xFF,0xFF,0x00,0x02,0x00,0x01,0xFF,0xFF,0x00,0x06,0x00,0x04,0x00,0x09,0x00,0x08,0x00,0x0C,0x00,0x14,0x00,0x07,0x00,0x01,0xFF,0xFE,0xFF,0xFB,0xFF,0xF5,0xFF,0xF5,\ +0xFF,0xF9,0x00,0x01,0xFF,0xFE,0x00,0x01,0x00,0x04,0x00,0x04,0x00,0x07,0x00,0x05,0x00,0x05,0x00,0x03,0xFF,0xFE,0x00,0x03,0xFF,0x9B,0x00,0x0B,0x00,0x01,0x00,0x00,\ +0xFF,0xFE,0xFF,0xFF,0x00,0x01,0x00,0x02,0x00,0x05,0x00,0x05,0x00,0x08,0x00,0x08,0x00,0x0B,0x00,0x0C,0x00,0x0D,0x00,0x13,0x00,0x10,0x00,0x02,0x00,0x02,0x00,0x09,\ +0x00,0x00,0xFF,0xF9,0xFF,0xF4,0xFF,0xFA,0xFF,0xFE,0xFF,0xFF,0x00,0x01,0x00,0x00,0x00,0x01,0xFF,0xFC,0xFF,0xFE,0x00,0x04,0x00,0x0A,0x00,0x07,0x00,0x08,0xFF,0xBF,\ +0x00,0x07,0xFF,0xFD,0xFF,0xFA,0xFF,0xFC,0xFF,0xFF,0xFF,0xFF,0x00,0x06,0x00,0x01,0x00,0x05,0x00,0x08,0x00,0x06,0x00,0x0B,0x00,0x0E,0x00,0x0F,0x00,0x15,0x00,0x06,\ +0xFF,0xFE,0x00,0x00,0x00,0x0B,0x00,0x02,0x00,0x01,0xFF,0xF2,0xFF,0xF8,0xFF,0xFC,0xFF,0xFD,0xFF,0xFF,0x00,0x02,0xFF,0xFF,0x00,0x02,0x00,0x02,0x00,0x08,0x00,0x08,\ +0x00,0x07,0x00,0x0A,0xFF,0xCF,0x00,0x0B,0xFF,0xF9,0xFF,0xFC,0xFF,0xFE,0xFF,0xFD,0x00,0x01,0x00,0x04,0x00,0x01,0x00,0x03,0x00,0x04,0x00,0x06,0x00,0x09,0x00,0x0E,\ +0x00,0x13,0x00,0x0D,0xFF,0xFC,0xFF,0xF6,0x00,0x00,0x00,0x0B,0x00,0x0C,0x00,0x01,0xFF,0xF8,0xFF,0xF2,0xFF,0xFA,0xFF,0xFD,0xFF,0xFD,0x00,0x00,0x00,0x03,0x00,0x04,\ +0x00,0x04,0x00,0x06,0x00,0x08,0x00,0x05,0x00,0x08,0xFF,0xB9,0x00,0x09,0xFF,0xFF,0xFF,0xFE,0x00,0x04,0xFF,0xFF,0x00,0x05,0x00,0x08,0x00,0x03,0x00,0x09,0x00,0x08,\ +0x00,0x08,0x00,0x0B,0x00,0x14,0x00,0x13,0x00,0x05,0xFF,0xFA,0xFF,0xFA,0x00,0x06,0x00,0x0B,0x00,0x0E,0x00,0x07,0xFF,0xFE,0xFF,0xF4,0xFF,0xF8,0xFF,0xFD,0xFF,0xFD,\ +0xFF,0xFE,0x00,0x03,0x00,0x02,0x00,0x04,0x00,0x02,0x00,0x06,0x00,0x03,0xFF,0xFA,0xFF,0xDE,0x00,0x07,0xFF,0xF7,0xFF,0xF6,0xFF,0xF9,0xFF,0xFD,0x00,0x01,0x00,0x01,\ +0xFF,0xFE,0x00,0x05,0x00,0x09,0x00,0x0B,0x00,0x0E,0x00,0x10,0x00,0x05,0xFF,0xF8,0xFF,0xFA,0x00,0x01,0xFF,0xFF,0x00,0x06,0x00,0x0D,0x00,0x13,0x00,0x02,0xFF,0xFD,\ +0xFF,0xF2,0xFF,0xF9,0xFF,0xFD,0xFF,0xFE,0x00,0x02,0x00,0x04,0x00,0x04,0x00,0x06,0x00,0x04,0x00,0x04,0xFF,0xFD,0xFF,0xDC,0x00,0x09,0xFF,0xF9,0xFF,0xFC,0xFF,0xFB,\ +0xFF,0xFD,0x00,0x03,0x00,0x01,0x00,0x06,0x00,0x07,0x00,0x0B,0x00,0x11,0x00,0x16,0x00,0x08,0x00,0x01,0xFF,0xF6,0xFF,0xF8,0x00,0x03,0xFF,0xFF,0x00,0x06,0x00,0x09,\ +0x00,0x11,0x00,0x0A,0xFF,0xFF,0xFF,0xF6,0xFF,0xF7,0xFF,0xF9,0x00,0x00,0x00,0x02,0x00,0x04,0x00,0x04,0x00,0x06,0x00,0x04,0x00,0x06,0x00,0x0D,0xFF,0xD2,0x00,0x07,\ +0xFF,0xFD,0xFF,0xFC,0xFF,0xFF,0x00,0x01,0x00,0x03,0x00,0x01,0x00,0x04,0x00,0x07,0x00,0x0B,0x00,0x11,0x00,0x10,0x00,0x02,0xFF,0xF5,0xFF,0xF6,0xFF,0xFE,0x00,0x03,\ +0x00,0x05,0x00,0x04,0x00,0x07,0x00,0x0F,0x00,0x10,0x00,0x01,0x00,0x02,0xFF,0xF3,0xFF,0xF5,0xFF,0xFA,0xFF,0xFE,0x00,0x00,0x00,0x02,0x00,0x04,0x00,0x06,0x00,0x06,\ +0x00,0x07,0xFF,0xB8,0x00,0x07,0xFF,0xF9,0xFF,0xFE,0xFF,0xFF,0xFF,0xFF,0x00,0x03,0x00,0x03,0x00,0x08,0x00,0x0B,0x00,0x0F,0x00,0x15,0x00,0x08,0xFF,0xFA,0xFF,0xF3,\ +0xFF,0xFC,0x00,0x00,0x00,0x03,0x00,0x07,0x00,0x04,0x00,0x05,0x00,0x0B,0x00,0x10,0x00,0x0D,0x00,0x02,0xFF,0xF3,0xFF,0xF3,0xFF,0xF8,0xFF,0xFA,0xFF,0xFC,0xFF,0xFE,\ +0x00,0x04,0x00,0x06,0x00,0x08,0x00,0x09,0x00,0x0D,0x00,0x04,0xFF,0xFD,0xFF,0xFB,0xFF,0xF9,0xFF,0xFD,0x00,0x03,0x00,0x03,0x00,0x04,0x00,0x09,0x00,0x0F,0x00,0x0A,\ +0x00,0x00,0xFF,0xED,0xFF,0xF6,0xFF,0xFA,0x00,0x00,0xFF,0xFF,0x00,0x00,0x00,0x04,0x00,0x03,0x00,0x09,0x00,0x0A,0x00,0x0C,0x00,0x05,0xFF,0xFF,0xFF,0xF3,0xFF,0xF9,\ +0xFF,0xFE,0x00,0x02,0x00,0x05,0x00,0x02,0xFF,0xFF,0x00,0x00,0x00,0x02,0xFF,0xF1,0x00,0x08,0xFF,0xFB,0xFF,0xFD,0xFF,0xFB,0xFF,0xFF,0x00,0x01,0x00,0x01,0x00,0x06,\ +0x00,0x07,0x00,0x11,0x00,0x02,0xFF,0xFA,0xFF,0xF5,0xFF,0xFE,0xFF,0xFE,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x02,0x00,0x03,0x00,0x05,0x00,0x0A,0x00,0x08,0x00,0x0B,\ +0x00,0x01,0xFF,0xFB,0xFF,0xF7,0xFF,0xFC,0xFF,0xFE,0xFF,0xFF,0x00,0x04,0x00,0x01,0xFF,0xFE,0x00,0x00,0xFF,0xDD,0x00,0x0C,0xFF,0xFD,0xFF,0xFD,0xFF,0xFF,0x00,0x01,\ +0x00,0x01,0x00,0x03,0x00,0x08,0x00,0x0F,0x00,0x09,0x00,0x06,0xFF,0xF8,0xFF,0xF9,0xFF,0xFE,0x00,0x00,0x00,0x02,0x00,0x03,0x00,0x04,0x00,0x02,0x00,0x03,0x00,0x05,\ +0x00,0x06,0x00,0x04,0x00,0x0B,0x00,0x01,0xFF,0xFF,0xFF,0xF5,0x00,0x00,0xFF,0xFE,0x00,0x01,0x00,0x02,0xFF,0xFF,0x00,0x04,0x00,0x02,0xFF,0xEF,0x00,0x10,0xFF,0xFD,\ +0x00,0x01,0xFF,0xFB,0x00,0x01,0x00,0x01,0xFF,0xFF,0x00,0x02,0x00,0x07,0x00,0x01,0x00,0x02,0xFF,0xFA,0xFF,0xFF,0x00,0x02,0x00,0x00,0x00,0x02,0x00,0x07,0xFF,0xFC,\ +0x00,0x00,0x00,0x05,0x00,0x03,0x00,0x06,0x00,0x04,0x00,0x07,0x00,0x05,0x00,0x01,0xFF,0xFD,0xFF,0xFE,0x00,0x02,0x00,0x01,0x00,0x00,0x00,0x03,0x00,0x02,0x00,0x00}; +const uint8_t phone_data_72_13[]={ +0x02,0x6D,0x02,0xA1,0x02,0x9D,0x02,0x9D,0x02,0xA1,0x02,0xA1,0x02,0xA1,0x02,0xAE,0x02,0xB3,0x02,0xB3,0x02,0xB3,0x02,0xBC,0x02,0xC0,0x02,0xCD,0x02,0xD1,0x02,0xDA,\ +0x02,0xE3,0x02,0xDE,0x02,0xDA,0x02,0xDE,0x02,0xDE,0x02,0xDE,0x02,0xE3,0x02,0xE3,0x02,0xE7,0x02,0xEB,0x02,0xF0,0x02,0xF4,0x02,0xF0,0x02,0xF0,0x02,0xE7,0x02,0xE7,\ +0x02,0xE7,0x02,0xE7,0x02,0xAE,0x02,0x58,0x02,0x7F,0x02,0x7F,0x02,0x7F,0x02,0x7F,0x02,0x8C,0x02,0x90,0x02,0x90,0x02,0x99,0x02,0x9D,0x02,0x9D,0x02,0xA1,0x02,0xAE,\ +0x02,0xB3,0x02,0xBC,0x02,0xC0,0x02,0xC9,0x02,0xC4,0x02,0xC0,0x02,0xC9,0x02,0xC9,0x02,0xC9,0x02,0xCD,0x02,0xD1,0x02,0xD6,0x02,0xD6,0x02,0xDE,0x02,0xDE,0x02,0xDE,\ +0x02,0xDA,0x02,0xD6,0x02,0xD6,0x02,0xD6,0x02,0xD6,0x02,0x94,0x02,0x60,0x02,0x7A,0x02,0x7A,0x02,0x7A,0x02,0x7A,0x02,0x83,0x02,0x83,0x02,0x83,0x02,0x8C,0x02,0x94,\ +0x02,0x94,0x02,0x99,0x02,0xA6,0x02,0xA6,0x02,0xB3,0x02,0xB7,0x02,0xC0,0x02,0xC0,0x02,0xBC,0x02,0xC4,0x02,0xC4,0x02,0xC9,0x02,0xC9,0x02,0xCD,0x02,0xD1,0x02,0xD6,\ +0x02,0xDA,0x02,0xDA,0x02,0xDA,0x02,0xDA,0x02,0xD1,0x02,0xD1,0x02,0xD1,0x02,0xD1,0x02,0xA1,0x03,0x4B,0x02,0x83,0x02,0x7A,0x02,0x7A,0x02,0x83,0x02,0x83,0x02,0x83,\ +0x02,0x87,0x02,0x94,0x02,0x94,0x02,0x94,0x02,0x99,0x02,0xA6,0x02,0xA6,0x02,0xB3,0x02,0xB7,0x02,0xC0,0x02,0xBC,0x02,0xCD,0x02,0xD6,0x02,0xDA,0x02,0xDA,0x02,0xDE,\ +0x02,0xDE,0x02,0xE3,0x02,0xE7,0x02,0xEB,0x02,0xF0,0x02,0xF0,0x02,0xEB,0x02,0xE3,0x02,0xE3,0x02,0xE7,0x02,0xEB,0x03,0xAF,0x02,0xC4,0x02,0x72,0x02,0x72,0x02,0x72,\ +0x02,0x7A,0x02,0x7A,0x02,0x83,0x02,0x83,0x02,0x8C,0x02,0x8C,0x02,0x94,0x02,0x94,0x02,0xA1,0x02,0xA1,0x02,0xB3,0x02,0xB7,0x02,0xC0,0x02,0xBC,0x02,0xC4,0x02,0xCD,\ +0x02,0xCD,0x02,0xD1,0x02,0xD6,0x02,0xDA,0x02,0xDA,0x02,0xDE,0x02,0xE7,0x02,0xE7,0x02,0xE7,0x02,0xE3,0x02,0xDE,0x02,0xDE,0x02,0xDE,0x02,0xE7,0x03,0x54,0x02,0xD1,\ +0x02,0x6D,0x02,0x6D,0x02,0x6D,0x02,0x76,0x02,0x7F,0x02,0x7F,0x02,0x7F,0x02,0x8C,0x02,0x90,0x02,0x90,0x02,0x99,0x02,0xA1,0x02,0xA1,0x02,0xAE,0x02,0xB3,0x02,0xBC,\ +0x02,0xB7,0x02,0xC4,0x02,0xC9,0x02,0xC9,0x02,0xCD,0x02,0xD1,0x02,0xD6,0x02,0xDA,0x02,0xDE,0x02,0xDE,0x02,0xE3,0x02,0xE3,0x02,0xDE,0x02,0xDE,0x02,0xDE,0x02,0xDE,\ +0x02,0xDA,0x03,0x01,0x02,0xD1,0x02,0x6D,0x02,0x6D,0x02,0x6D,0x02,0x76,0x02,0x76,0x02,0x7F,0x02,0x7F,0x02,0x8C,0x02,0x90,0x02,0x90,0x02,0x99,0x02,0x9D,0x02,0xA1,\ +0x02,0xAE,0x02,0xB3,0x02,0xB3,0x02,0xB3,0x02,0xC0,0x02,0xC9,0x02,0xC9,0x02,0xCD,0x02,0xD1,0x02,0xD1,0x02,0xD6,0x02,0xDA,0x02,0xDE,0x02,0xDE,0x02,0xDE,0x02,0xDE,\ +0x02,0xDA,0x02,0xDA,0x02,0xDE,0x02,0xD6,0x02,0xFD,0x02,0xC9,0x02,0x65,0x02,0x65,0x02,0x72,0x02,0x7A,0x02,0x7A,0x02,0x83,0x02,0x83,0x02,0x87,0x02,0x90,0x02,0x94,\ +0x02,0x94,0x02,0x9D,0x02,0xA1,0x02,0xAA,0x02,0xB3,0x02,0xB3,0x02,0xB3,0x02,0xC4,0x02,0xC9,0x02,0xC9,0x02,0xCD,0x02,0xD1,0x02,0xD6,0x02,0xDA,0x02,0xDA,0x02,0xE3,\ +0x02,0xE3,0x02,0xE3,0x02,0xE3,0x02,0xDA,0x02,0xDE,0x02,0xDE,0x02,0xDA,0x03,0x05,0x02,0xDE,0x02,0x7A,0x02,0x7A,0x02,0x7A,0x02,0x7A,0x02,0x83,0x02,0x83,0x02,0x83,\ +0x02,0x8C,0x02,0x94,0x02,0x94,0x02,0x99,0x02,0xA1,0x02,0xA6,0x02,0xB3,0x02,0xB7,0x02,0xBC,0x02,0xBC,0x02,0xC9,0x02,0xD1,0x02,0xD1,0x02,0xD6,0x02,0xDA,0x02,0xDA,\ +0x02,0xE3,0x02,0xE3,0x02,0xE7,0x02,0xEB,0x02,0xE7,0x02,0xE7,0x02,0xE3,0x02,0xE3,0x02,0xE3,0x02,0xE3,0x03,0x12,0x02,0xD1,0x02,0x76,0x02,0x76,0x02,0x76,0x02,0x7A,\ +0x02,0x7F,0x02,0x83,0x02,0x8C,0x02,0x8C,0x02,0x90,0x02,0x94,0x02,0x9D,0x02,0xA1,0x02,0xA6,0x02,0xAE,0x02,0xB3,0x02,0xBC,0x02,0xBC,0x02,0xC9,0x02,0xD1,0x02,0xD1,\ +0x02,0xD6,0x02,0xDA,0x02,0xDE,0x02,0xDE,0x02,0xE3,0x02,0xE7,0x02,0xEB,0x02,0xE7,0x02,0xE7,0x02,0xE3,0x02,0xE3,0x02,0xE7,0x02,0xE3,0x03,0x12,0x02,0xD1,0x02,0x76,\ +0x02,0x76,0x02,0x76,0x02,0x7F,0x02,0x87,0x02,0x90,0x02,0x90,0x02,0x99,0x02,0x9D,0x02,0xA1,0x02,0xA1,0x02,0xAA,0x02,0xAE,0x02,0xB3,0x02,0xBC,0x02,0xC0,0x02,0xC0,\ +0x02,0xD1,0x02,0xD6,0x02,0xD6,0x02,0xDA,0x02,0xDE,0x02,0xDE,0x02,0xE7,0x02,0xE7,0x02,0xEB,0x02,0xEB,0x02,0xEB,0x02,0xEB,0x02,0xE7,0x02,0xE7,0x02,0xEB,0x02,0xE7,\ +0x03,0x12,0x02,0xC9,0x02,0x7F,0x02,0x7F,0x02,0x7F,0x02,0x7F,0x02,0x87,0x02,0x8C,0x02,0x90,0x02,0x94,0x02,0x9D,0x02,0x9D,0x02,0xA1,0x02,0xAA,0x02,0xAE,0x02,0xB3,\ +0x02,0xBC,0x02,0xC0,0x02,0xC0,0x02,0xD1,0x02,0xD6,0x02,0xDA,0x02,0xDA,0x02,0xDE,0x02,0xE3,0x02,0xE7,0x02,0xEB,0x02,0xF0,0x02,0xF0,0x02,0xF0,0x02,0xF0,0x02,0xE7,\ +0x02,0xEB,0x02,0xEB,0x02,0xF4,0x03,0x65,0x03,0x5C,0x02,0x87,0x02,0x87,0x02,0x87,0x02,0x87,0x02,0x94,0x02,0x94,0x02,0x99,0x02,0xA6,0x02,0xA6,0x02,0xA6,0x02,0xAE,\ +0x02,0xB7,0x02,0xBC,0x02,0xC4,0x02,0xC4,0x02,0xC9,0x02,0xCD,0x02,0xD1,0x02,0xD6,0x02,0xD6,0x02,0xDA,0x02,0xDE,0x02,0xDE,0x02,0xE3,0x02,0xE7,0x02,0xF0,0x02,0xF0,\ +0x02,0xF0,0x02,0xF0,0x02,0xE3,0x02,0xEB,0x02,0xEB,0x02,0xF0,0x03,0xBC,0x02,0x58,0x02,0x83,0x02,0x83,0x02,0x83,0x02,0x83,0x02,0x87,0x02,0x87,0x02,0x94,0x02,0x94,\ +0x02,0x99,0x02,0x9D,0x02,0x9D,0x02,0xA6,0x02,0xA6,0x02,0xB7,0x02,0xB7,0x02,0xBC,0x02,0xBC,0x02,0xDA,0x02,0xDE,0x02,0xE3,0x02,0xE3,0x02,0xE7,0x02,0xEB,0x02,0xEB,\ +0x02,0xF4,0x02,0xF8,0x02,0xF8,0x02,0xF8,0x02,0xFD,0x02,0xF4,0x02,0xF8,0x02,0xFD,0x02,0xF8,0x02,0xDA,0x02,0x4A,0x02,0x8C,0x02,0x8C,0x02,0x8C,0x02,0x8C,0x02,0x8C,\ +0x02,0x90,0x02,0x90,0x02,0x9D,0x02,0x9D,0x02,0x9D,0x02,0xA1,0x02,0xAE,0x02,0xA6,0x02,0xB7,0x02,0xB7,0x02,0xBC,0x02,0xBC,0x02,0xDE,0x02,0xDE,0x02,0xE3,0x02,0xE3,\ +0x02,0xE7,0x02,0xE7,0x02,0xEB,0x02,0xF0,0x02,0xF8,0x02,0xF8,0x02,0xF8,0x02,0xF8,0x02,0xF4,0x02,0xF4,0x02,0xF8,0x02,0xF8,0x02,0xD1,0x02,0x5C,0x02,0x90,0x02,0x90,\ +0x02,0x90,0x02,0x90,0x02,0x90,0x02,0x90,0x02,0x90,0x02,0x9D,0x02,0xA1,0x02,0xA1,0x02,0xA1,0x02,0xAE,0x02,0xAE,0x02,0xB3,0x02,0xB7,0x02,0xBC,0x02,0xBC,0x02,0xDE,\ +0x02,0xE3,0x02,0xE3,0x02,0xE3,0x02,0xE7,0x02,0xE7,0x02,0xEB,0x02,0xF0,0x02,0xF8,0x02,0xF8,0x02,0xF8,0x02,0xF8,0x02,0xF4,0x02,0xF8,0x02,0xF8,0x02,0xF8,0x02,0xD6}; + +const uint8_t phone_data_75_7401_7D01[]={0x46,0x54,0x52,0x59,0x01,0x06,0x94,0x01,0xD9,0xF5,0xF6,0xF5,0xF6,0xF7,0xF7,0xF9,0xFB,0xFB,0xFD,0xFE,0x00,0x01,0x03,0x06,0x07,0x08,0x02,0x02,0x02,0x02,0x04,0x03,\ +0x05,0x07,0x07,0x08,0x08,0x08,0x06,0x06,0x07,0x07,0xE4,0x17,0xFB,0xFB,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF,0x00,0x01,0x02,0x04,0x05,0x07,0x09,0x0B,0x0B,0x0A,0x0A,0x0B,\ +0x0B,0x0E,0x0C,0x0E,0x11,0x11,0x12,0x12,0x11,0x10,0x0F,0x10,0x12,0x2B,0x19,0xFB,0xFB,0xFB,0xFC,0xFD,0xFE,0xFF,0x00,0x00,0x02,0x03,0x05,0x06,0x08,0x0A,0x0B,0x0C,\ +0x0B,0x0B,0x0B,0x0D,0x10,0x0D,0x10,0x12,0x13,0x14,0x13,0x13,0x12,0x11,0x12,0x13,0x30,0x18,0xFC,0xFC,0xFC,0xFD,0xFE,0xFF,0xFF,0x00,0x01,0x03,0x04,0x06,0x07,0x09,\ +0x0B,0x0C,0x0D,0x0C,0x0B,0x0D,0x0F,0x11,0x10,0x13,0x14,0x15,0x15,0x15,0x14,0x14,0x14,0x15,0x15,0x32,0x19,0xFC,0xFC,0xFC,0xFD,0xFE,0xFF,0x00,0x01,0x02,0x04,0x05,\ +0x06,0x07,0x0A,0x0C,0x0D,0x0D,0x0D,0x0C,0x0F,0x10,0x12,0x10,0x14,0x15,0x16,0x16,0x17,0x15,0x15,0x15,0x16,0x16,0x33,0x1B,0xFD,0xFD,0xFD,0xFE,0xFF,0x00,0x01,0x02,\ +0x03,0x04,0x05,0x07,0x08,0x0A,0x0C,0x0D,0x0E,0x0E,0x0E,0x10,0x12,0x13,0x12,0x15,0x16,0x17,0x17,0x17,0x16,0x16,0x16,0x17,0x16,0x35,0x1D,0xFD,0xFD,0xFD,0xFF,0x00,\ +0x00,0x01,0x03,0x03,0x05,0x06,0x07,0x08,0x0A,0x0C,0x0D,0x0E,0x0F,0x0E,0x12,0x12,0x14,0x14,0x15,0x17,0x17,0x18,0x18,0x18,0x17,0x17,0x18,0x18,0x37,0x1E,0xFC,0xFD,\ +0xFD,0xFE,0xFF,0x00,0x01,0x02,0x03,0x04,0x05,0x07,0x07,0x09,0x0C,0x0D,0x0E,0x0F,0x0E,0x12,0x12,0x14,0x12,0x15,0x17,0x17,0x18,0x18,0x18,0x16,0x17,0x18,0x14,0x20,\ +0x1E,0xFC,0xFD,0xFC,0xFD,0xFF,0x00,0x00,0x02,0x02,0x04,0x04,0x06,0x07,0x09,0x0C,0x0C,0x0D,0x0E,0x0E,0x11,0x12,0x14,0x12,0x15,0x16,0x17,0x17,0x17,0x17,0x16,0x17,\ +0x17,0x14,0x1F,0x1B,0xFC,0xFC,0xFC,0xFD,0xFE,0xFF,0xFF,0x01,0x02,0x03,0x04,0x06,0x07,0x09,0x0B,0x0C,0x0D,0x0E,0x0E,0x11,0x11,0x13,0x12,0x14,0x16,0x16,0x17,0x17,\ +0x17,0x16,0x16,0x17,0x17,0x36,0x19,0xFC,0xFC,0xFC,0xFC,0xFE,0xFF,0xFF,0x00,0x01,0x02,0x04,0x05,0x07,0x09,0x0B,0x0B,0x0D,0x0D,0x0D,0x10,0x11,0x13,0x10,0x13,0x15,\ +0x16,0x16,0x16,0x16,0x15,0x16,0x16,0x17,0x34,0x17,0xFB,0xFC,0xFB,0xFB,0xFC,0xFD,0xFE,0xFF,0x00,0x02,0x03,0x05,0x06,0x08,0x09,0x0A,0x0B,0x0D,0x0D,0x0F,0x10,0x11,\ +0x10,0x12,0x14,0x15,0x15,0x15,0x15,0x14,0x15,0x16,0x16,0x33,0x16,0xFB,0xFB,0xFB,0xFB,0xFB,0xFC,0xFD,0xFF,0x00,0x02,0x03,0x04,0x05,0x07,0x09,0x09,0x0A,0x0C,0x0B,\ +0x0E,0x0E,0x11,0x0F,0x12,0x13,0x14,0x14,0x14,0x14,0x13,0x14,0x15,0x15,0x32,0x17,0xFA,0xFA,0xF9,0xF9,0xFA,0xFB,0xFC,0xFE,0x00,0x01,0x02,0x03,0x04,0x06,0x07,0x08,\ +0x09,0x0C,0x0A,0x0B,0x0C,0x0F,0x0D,0x0F,0x12,0x13,0x12,0x13,0x13,0x12,0x11,0x13,0x14,0x31,0x13,0xF8,0xF8,0xF8,0xF8,0xF9,0xFA,0xFB,0xFD,0xFE,0xFF,0x00,0x02,0x02,\ +0x04,0x06,0x06,0x07,0x0A,0x09,0x0A,0x0A,0x0C,0x0B,0x0D,0x10,0x10,0x11,0x11,0x10,0x10,0x0E,0x10,0x12,0x2D,0xC9,0xF0,0xF0,0xF0,0xF0,0xF1,0xF1,0xF3,0xF5,0xF6,0xF7,\ +0xF7,0xF9,0xFA,0xFC,0xFD,0xFD,0xFE,0x07,0x06,0x06,0x07,0x08,0x08,0x0A,0x0C,0x0C,0x0D,0x0E,0x0F,0x0E,0x0D,0x0F,0x11,0xED}; +const uint8_t phone_data_75_7401_7D02[]={0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\ +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\ +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\ +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\ +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\ +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\ +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\ +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\ +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\ +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\ +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\ +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\ +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\ +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\ +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\ +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\ +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\ +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}; +const uint8_t phone_data_75_7401_7D03[]={0x46,0x54,0x4D,0x33,0x01,0x03,0x96,0x01,0xE4,0x01,0x01,0xFD,0x01,0x01,0xFF,0x01,0x05,0x01,0x05,0x01,0x01,0x05,0x03,0x05,0x09,0x07,0x01,0x03,0xFF,0xFD,0xFF,0xFF,\ +0x01,0x03,0x01,0x03,0x01,0x05,0x01,0x01,0xFD,0xFD,0xD0,0x26,0x09,0x09,0x05,0x05,0x07,0x05,0x03,0x07,0x05,0x09,0x05,0x03,0x09,0x0E,0x07,0x0E,0x09,0x09,0x09,0x09,\ +0x09,0x0B,0x05,0x07,0x0E,0x09,0x0B,0x09,0x09,0x05,0x09,0x05,0x09,0x2B,0x2A,0x07,0x07,0x07,0x07,0x07,0x03,0x07,0x07,0x03,0x0B,0x07,0x03,0x09,0x0E,0x07,0x0E,0x0B,\ +0x0B,0x07,0x0B,0x09,0x0B,0x07,0x07,0x10,0x0E,0x10,0x07,0x0B,0x05,0x07,0x07,0x09,0x31,0x2A,0x07,0x09,0x07,0x07,0x09,0x05,0x05,0x09,0x05,0x09,0x05,0x05,0x09,0x09,\ +0x09,0x09,0x09,0x09,0x09,0x09,0x09,0x09,0x05,0x09,0x10,0x09,0x0B,0x09,0x0D,0x05,0x09,0x05,0x05,0x2F,0x28,0x09,0x09,0x09,0x07,0x09,0x05,0x05,0x09,0x05,0x09,0x05,\ +0x05,0x09,0x09,0x09,0x0E,0x09,0x09,0x09,0x09,0x09,0x0D,0x05,0x09,0x10,0x0E,0x10,0x09,0x09,0x05,0x09,0x05,0x09,0x2F,0x2C,0x09,0x0E,0x09,0x09,0x09,0x05,0x07,0x09,\ +0x05,0x0D,0x09,0x05,0x0B,0x09,0x09,0x0E,0x0B,0x0D,0x09,0x0D,0x09,0x0B,0x05,0x09,0x10,0x09,0x0B,0x09,0x0B,0x07,0x09,0x07,0x05,0x2F,0x2A,0x07,0x0E,0x07,0x07,0x0E,\ +0x05,0x05,0x09,0x05,0x09,0x09,0x05,0x09,0x0E,0x09,0x0E,0x09,0x09,0x09,0x09,0x09,0x09,0x05,0x07,0x0E,0x09,0x0B,0x05,0x09,0x05,0x09,0x05,0x09,0x2F,0x2F,0x09,0x0E,\ +0x09,0x09,0x0E,0x05,0x05,0x09,0x05,0x0D,0x05,0x05,0x09,0x09,0x09,0x0E,0x09,0x09,0x09,0x09,0x09,0x09,0x05,0x09,0x0E,0x09,0x0B,0x07,0x09,0x05,0x09,0x05,0x01,0x12,\ +0x2F,0x09,0x09,0x09,0x09,0x09,0x05,0x09,0x07,0x05,0x0D,0x07,0x05,0x09,0x09,0x07,0x09,0x09,0x09,0x09,0x09,0x05,0x0D,0x05,0x09,0x0E,0x09,0x0B,0x09,0x09,0x03,0x09,\ +0x05,0xFF,0x12,0x2C,0x09,0x0B,0x09,0x09,0x0B,0x07,0x07,0x0B,0x07,0x0D,0x07,0x07,0x0B,0x0B,0x07,0x0B,0x0B,0x0B,0x09,0x0B,0x07,0x0B,0x07,0x07,0x10,0x09,0x0B,0x09,\ +0x09,0x03,0x09,0x07,0x07,0x2D,0x2A,0x07,0x0E,0x07,0x07,0x0E,0x05,0x05,0x09,0x05,0x0B,0x05,0x05,0x0B,0x09,0x07,0x09,0x09,0x09,0x09,0x09,0x09,0x09,0x05,0x07,0x0E,\ +0x07,0x09,0x05,0x09,0x03,0x07,0x05,0x05,0x2F,0x28,0x09,0x0E,0x09,0x09,0x0E,0x05,0x05,0x09,0x05,0x0D,0x09,0x05,0x09,0x0E,0x09,0x0E,0x09,0x09,0x09,0x09,0x09,0x0D,\ +0x05,0x09,0x12,0x09,0x0B,0x07,0x09,0x05,0x09,0x05,0x09,0x2D,0x28,0x0E,0x10,0x09,0x0E,0x0E,0x07,0x07,0x0B,0x07,0x0D,0x07,0x07,0x09,0x0E,0x07,0x0E,0x0B,0x0B,0x0B,\ +0x0B,0x09,0x0B,0x07,0x07,0x10,0x0E,0x0B,0x09,0x0B,0x07,0x09,0x07,0x09,0x2D,0x2A,0x09,0x0E,0x09,0x09,0x0E,0x05,0x07,0x09,0x05,0x0B,0x09,0x05,0x0B,0x0E,0x09,0x09,\ +0x09,0x09,0x09,0x09,0x09,0x0B,0x05,0x07,0x10,0x0E,0x0B,0x09,0x09,0x05,0x09,0x07,0x09,0x2F,0x28,0x07,0x0E,0x07,0x07,0x09,0x03,0x07,0x0B,0x05,0x0B,0x07,0x05,0x0B,\ +0x0B,0x09,0x07,0x0B,0x0B,0x09,0x0B,0x09,0x0B,0x07,0x07,0x10,0x07,0x09,0x07,0x0D,0x07,0x07,0x09,0x0B,0x2D,0xDC,0x01,0x03,0x01,0x01,0x03,0xFD,0xFF,0x01,0xFF,0x01,\ +0xFF,0xFF,0x01,0x03,0x01,0x03,0x03,0x0D,0x09,0x0B,0x09,0x0D,0x07,0x09,0x12,0x0E,0x10,0x0B,0x0D,0x09,0x0B,0x0D,0x0D,0xE4}; +const uint8_t phone_data_75_7403_7D01[]={0x46,0x54,0x52,0x59,0x01,0x05,0xAA,0x01,0xD7,0xF5,0xF5,0xF3,0xF3,0xF5,0xF5,0xF7,0xF8,0xFA,0xFC,0xFC,0xFF,0x00,0x02,0x04,0x07,0x08,0x01,0x04,0x04,0x04,0x02,0x03,\ +0x04,0x04,0x06,0x08,0x07,0x07,0x05,0x07,0x06,0x08,0xE2,0x17,0xFA,0xFB,0xFA,0xF9,0xFA,0xFA,0xFE,0xFE,0xFF,0x01,0x03,0x04,0x05,0x08,0x09,0x0B,0x0B,0x0A,0x0B,0x0C,\ +0x0C,0x0B,0x0D,0x0E,0x0E,0x11,0x12,0x11,0x11,0x10,0x10,0x11,0x11,0x2F,0x18,0xF9,0xF8,0xF9,0xF8,0xF9,0xF9,0xFB,0xFC,0xFE,0x00,0x01,0x04,0x06,0x08,0x0B,0x09,0x0A,\ +0x09,0x0C,0x0C,0x0C,0x0A,0x0F,0x0E,0x10,0x13,0x14,0x13,0x10,0x12,0x0F,0x10,0x10,0x32,0x15,0xF7,0xF6,0xF6,0xF7,0xF7,0xF8,0xFA,0xFA,0xFB,0xFE,0xFE,0x00,0x02,0x04,\ +0x05,0x07,0x07,0x06,0x07,0x08,0x08,0x08,0x0A,0x0B,0x0A,0x0D,0x0E,0x0E,0x0D,0x0C,0x0D,0x0D,0x0D,0x2E,0x19,0xFA,0xF9,0xFA,0xFA,0xFC,0xFC,0xFE,0xFF,0x00,0x02,0x03,\ +0x05,0x06,0x08,0x0B,0x0C,0x0C,0x0C,0x0D,0x0E,0x0F,0x0D,0x10,0x12,0x11,0x14,0x15,0x14,0x14,0x13,0x13,0x14,0x13,0x35,0x1B,0xFD,0xFC,0xFB,0xFC,0xFE,0xFD,0x01,0x01,\ +0x01,0x03,0x05,0x06,0x07,0x09,0x0B,0x0C,0x0D,0x0D,0x0E,0x0F,0x10,0x0E,0x11,0x12,0x12,0x15,0x15,0x15,0x15,0x14,0x14,0x15,0x15,0x37,0x1D,0xFC,0xFC,0xFB,0xFD,0xFE,\ +0xFD,0x00,0x01,0x01,0x04,0x05,0x06,0x07,0x09,0x0A,0x0D,0x0E,0x0E,0x0E,0x10,0x10,0x0F,0x12,0x13,0x12,0x16,0x16,0x16,0x16,0x15,0x15,0x16,0x16,0x38,0x1F,0xFD,0xFC,\ +0xFC,0xFD,0xFE,0xFE,0x01,0x02,0x03,0x04,0x06,0x07,0x07,0x0A,0x0C,0x0D,0x0E,0x10,0x10,0x11,0x11,0x11,0x13,0x14,0x13,0x16,0x17,0x17,0x17,0x16,0x17,0x17,0x15,0x25,\ +0x1D,0xFA,0xF9,0xFA,0xF9,0xFC,0xFB,0xFE,0xFE,0xFF,0x01,0x03,0x04,0x04,0x07,0x09,0x0A,0x0B,0x0C,0x0D,0x0E,0x0E,0x0E,0x10,0x11,0x10,0x13,0x14,0x14,0x14,0x13,0x13,\ +0x15,0x11,0x22,0x1C,0xFA,0xFA,0xFA,0xFA,0xFC,0xFB,0xFE,0xFE,0x00,0x01,0x03,0x04,0x05,0x08,0x0A,0x0B,0x0C,0x0D,0x0E,0x0F,0x10,0x0E,0x11,0x12,0x11,0x15,0x15,0x15,\ +0x15,0x14,0x15,0x16,0x16,0x38,0x18,0xFA,0xFA,0xFA,0xF9,0xFA,0xFB,0xFE,0xFE,0xFF,0x01,0x02,0x04,0x05,0x07,0x09,0x0B,0x0C,0x0D,0x0D,0x0E,0x0F,0x0E,0x10,0x11,0x11,\ +0x14,0x14,0x14,0x15,0x13,0x14,0x15,0x15,0x36,0x17,0xF9,0xF9,0xF9,0xF8,0xF9,0xF9,0xFC,0xFC,0xFE,0x00,0x02,0x03,0x04,0x06,0x08,0x09,0x0A,0x0C,0x0C,0x0D,0x0E,0x0C,\ +0x0F,0x10,0x10,0x12,0x13,0x13,0x13,0x12,0x12,0x14,0x14,0x35,0x16,0xF8,0xF8,0xF8,0xF7,0xF8,0xF8,0xFB,0xFC,0xFE,0x00,0x01,0x03,0x03,0x05,0x07,0x08,0x09,0x0B,0x0B,\ +0x0C,0x0C,0x0B,0x0D,0x0F,0x0E,0x12,0x12,0x12,0x12,0x11,0x12,0x12,0x13,0x34,0x17,0xF9,0xF9,0xF8,0xF7,0xF8,0xF8,0xFC,0xFD,0xFE,0x00,0x02,0x03,0x04,0x05,0x07,0x08,\ +0x09,0x0B,0x0C,0x0C,0x0D,0x0C,0x0E,0x0F,0x0F,0x12,0x12,0x12,0x12,0x11,0x12,0x13,0x13,0x35,0x13,0xF8,0xF7,0xF6,0xF6,0xF8,0xF9,0xFB,0xFC,0xFD,0x00,0x01,0x03,0x02,\ +0x04,0x06,0x06,0x07,0x0B,0x0B,0x0B,0x0C,0x0A,0x0D,0x0E,0x0E,0x10,0x11,0x11,0x11,0x10,0x10,0x11,0x12,0x31,0xC8,0xEE,0xEE,0xED,0xEE,0xEE,0xEE,0xF1,0xF2,0xF4,0xF4,\ +0xF5,0xF7,0xF7,0xFA,0xFB,0xFE,0xFF,0x09,0x07,0x07,0x08,0x06,0x08,0x08,0x08,0x0B,0x0C,0x0B,0x0C,0x0B,0x0B,0x0C,0x0D,0xE9}; +const uint8_t phone_data_75_7403_7D03[]={0x46,0x54,0x4D,0x33,0x01,0x01,0x9D,0x01,0xE7,0x04,0x02,0x04,0x02,0x02,0x02,0x02,0x02,0x02,0x06,0x04,0x04,0x08,0x08,0x08,0x0C,0x08,0x02,0x01,0x01,0x00,0x01,0x00,\ +0x02,0x01,0x04,0x02,0x04,0x04,0x00,0x00,0x00,0x00,0xCE,0x2B,0x0C,0x0A,0x08,0x08,0x0A,0x02,0x04,0x06,0x04,0x08,0x06,0x06,0x08,0x0A,0x08,0x0C,0x08,0x08,0x08,0x0A,\ +0x08,0x0A,0x06,0x0C,0x0A,0x0C,0x0C,0x0C,0x0A,0x04,0x06,0x06,0x0A,0x2B,0x2B,0x0A,0x08,0x08,0x04,0x08,0x04,0x04,0x06,0x04,0x06,0x04,0x06,0x08,0x08,0x08,0x0C,0x08,\ +0x06,0x06,0x08,0x08,0x0A,0x06,0x0A,0x0A,0x0C,0x0C,0x0A,0x0A,0x04,0x06,0x04,0x0A,0x30,0x2B,0x08,0x08,0x08,0x04,0x06,0x04,0x04,0x04,0x04,0x08,0x06,0x06,0x08,0x08,\ +0x06,0x0C,0x06,0x06,0x06,0x08,0x08,0x0A,0x06,0x0A,0x0A,0x0C,0x0C,0x06,0x08,0x06,0x06,0x04,0x0A,0x30,0x2B,0x0A,0x08,0x06,0x04,0x08,0x04,0x04,0x04,0x04,0x06,0x04,\ +0x06,0x08,0x08,0x08,0x0A,0x06,0x06,0x04,0x08,0x08,0x08,0x04,0x06,0x08,0x08,0x0A,0x06,0x08,0x04,0x04,0x04,0x0A,0x2E,0x2B,0x06,0x0A,0x08,0x04,0x08,0x04,0x04,0x06,\ +0x04,0x08,0x04,0x06,0x08,0x08,0x08,0x0C,0x06,0x06,0x06,0x08,0x08,0x08,0x04,0x06,0x0A,0x0C,0x0A,0x06,0x08,0x04,0x04,0x06,0x0A,0x30,0x2F,0x08,0x0A,0x08,0x08,0x0A,\ +0x04,0x06,0x06,0x04,0x08,0x04,0x06,0x0A,0x08,0x06,0x0C,0x06,0x06,0x06,0x0A,0x08,0x0A,0x04,0x06,0x08,0x0C,0x0A,0x06,0x08,0x04,0x04,0x06,0x0A,0x30,0x31,0x08,0x08,\ +0x08,0x04,0x08,0x04,0x04,0x06,0x04,0x08,0x06,0x06,0x08,0x08,0x06,0x08,0x06,0x06,0x06,0x08,0x08,0x08,0x04,0x04,0x08,0x08,0x08,0x06,0x08,0x04,0x06,0x04,0x04,0x15,\ +0x31,0x06,0x08,0x08,0x04,0x0A,0x04,0x04,0x06,0x04,0x08,0x06,0x06,0x0A,0x08,0x06,0x0A,0x06,0x06,0x06,0x08,0x06,0x08,0x04,0x06,0x08,0x08,0x08,0x06,0x08,0x04,0x04,\ +0x04,0x04,0x15,0x2D,0x08,0x08,0x08,0x04,0x06,0x04,0x04,0x04,0x04,0x06,0x06,0x06,0x08,0x08,0x06,0x0A,0x06,0x06,0x06,0x08,0x06,0x08,0x04,0x04,0x08,0x08,0x06,0x04,\ +0x08,0x04,0x04,0x04,0x0A,0x2E,0x2B,0x0A,0x0A,0x08,0x08,0x08,0x04,0x04,0x04,0x04,0x08,0x06,0x06,0x08,0x08,0x06,0x0A,0x06,0x06,0x04,0x08,0x06,0x0A,0x04,0x06,0x08,\ +0x08,0x0A,0x06,0x06,0x04,0x04,0x02,0x08,0x2E,0x29,0x0A,0x0A,0x08,0x04,0x08,0x04,0x04,0x04,0x04,0x08,0x04,0x04,0x08,0x08,0x06,0x0A,0x06,0x06,0x04,0x08,0x06,0x08,\ +0x04,0x04,0x08,0x08,0x06,0x06,0x08,0x02,0x04,0x02,0x08,0x2E,0x29,0x0A,0x0A,0x0A,0x08,0x08,0x04,0x06,0x06,0x04,0x08,0x06,0x06,0x08,0x08,0x08,0x0A,0x06,0x06,0x06,\ +0x08,0x08,0x0A,0x04,0x06,0x0A,0x0C,0x0A,0x06,0x08,0x04,0x06,0x06,0x0A,0x30,0x2B,0x0C,0x0A,0x08,0x08,0x0A,0x04,0x06,0x06,0x06,0x08,0x06,0x06,0x0A,0x08,0x06,0x0C,\ +0x06,0x08,0x08,0x0A,0x08,0x08,0x04,0x06,0x0A,0x0C,0x0A,0x08,0x0A,0x04,0x06,0x06,0x0C,0x32,0x29,0x0C,0x0A,0x0A,0x0A,0x0A,0x04,0x06,0x06,0x06,0x08,0x06,0x08,0x0A,\ +0x0A,0x08,0x0C,0x06,0x08,0x06,0x0A,0x0A,0x0A,0x06,0x0A,0x0A,0x0C,0x0A,0x0A,0x0A,0x04,0x06,0x06,0x0C,0x2E,0xDA,0x02,0x04,0x04,0x00,0x02,0xFE,0x00,0x02,0x02,0x00,\ +0x02,0x02,0x00,0x02,0x02,0x04,0x02,0x0E,0x0A,0x0C,0x0C,0x0C,0x08,0x0E,0x0E,0x12,0x10,0x0E,0x0E,0x0E,0x0C,0x0E,0x12,0xE3}; +const uint8_t phone_data_75_7D05[]={0x46,0x4D,0x53,0x43,0x00,0x07,0x16,0x00,0x13,0x06,0x05,0x07,0x07,0x05,0x08,0x07,0x07,0x06,0x08,0x07,0x07,0x05,0x06,0x07,0x06,0x08,0x09,0x04,0x06,0x06,0x07,0x05,\ +0x06,0x06,0x06,0x06,0x05,0x04,0x06,0x05,0x03,0x0A,0x00,0x14,0x05,0x07,0x07,0x07,0x07,0x08,0x0A,0x07,0x08,0x09,0x07,0x06,0x08,0x08,0x06,0x06,0x0A,0x08,0x06,0x07,\ +0x07,0x05,0x06,0x06,0x06,0x06,0x06,0x04,0x05,0x05,0x04,0x05,0x0D,0x00,0x14,0x07,0x07,0x08,0x07,0x08,0x09,0x0A,0x09,0x07,0x0A,0x08,0x09,0x09,0x09,0x06,0x06,0x08,\ +0x08,0x06,0x07,0x07,0x06,0x07,0x06,0x05,0x06,0x07,0x05,0x06,0x05,0x04,0x04,0x0F,0x00,0x11,0x06,0x04,0x08,0x08,0x06,0x07,0x07,0x07,0x08,0x0B,0x08,0x08,0x0B,0x07,\ +0x08,0x07,0x08,0x06,0x06,0x05,0x06,0x06,0x08,0x06,0x05,0x07,0x05,0x06,0x05,0x05,0x05,0x03,0x0F,0x00,0x14,0x06,0x05,0x07,0x07,0x09,0x07,0x09,0x09,0x09,0x09,0x08,\ +0x09,0x09,0x08,0x07,0x06,0x09,0x08,0x09,0x08,0x07,0x07,0x06,0x07,0x07,0x09,0x08,0x05,0x04,0x05,0x04,0x04,0x0F,0x00,0x16,0x07,0x06,0x07,0x07,0x08,0x09,0x07,0x08,\ +0x08,0x08,0x09,0x08,0x07,0x09,0x08,0x07,0x0A,0x08,0x05,0x06,0x07,0x07,0x07,0x07,0x06,0x08,0x06,0x05,0x05,0x06,0x05,0x05,0x10,0x00,0x15,0x09,0x07,0x08,0x08,0x0B,\ +0x0A,0x09,0x09,0x08,0x07,0x08,0x09,0x08,0x0A,0x08,0x07,0x09,0x08,0x08,0x07,0x07,0x06,0x06,0x07,0x05,0x06,0x07,0x04,0x06,0x04,0x05,0x05,0x0F,0x00,0x15,0x06,0x05,\ +0x09,0x07,0x0A,0x09,0x07,0x08,0x0A,0x09,0x0A,0x09,0x0B,0x09,0x09,0x06,0x09,0x08,0x08,0x08,0x08,0x06,0x07,0x06,0x06,0x05,0x06,0x06,0x07,0x05,0x06,0x06,0x0F,0x00,\ +0x13,0x07,0x06,0x07,0x06,0x09,0x07,0x09,0x09,0x0B,0x06,0x08,0x07,0x0A,0x08,0x09,0x07,0x0A,0x07,0x07,0x08,0x08,0x07,0x06,0x08,0x06,0x06,0x06,0x06,0x06,0x05,0x04,\ +0x04,0x0C,0x00,0x11,0x06,0x07,0x04,0x08,0x09,0x09,0x07,0x08,0x09,0x08,0x06,0x08,0x0A,0x09,0x05,0x08,0x08,0x0A,0x08,0x08,0x07,0x06,0x07,0x04,0x05,0x06,0x06,0x04,\ +0x05,0x05,0x03,0x05,0x10,0x00,0x15,0x09,0x05,0x08,0x09,0x09,0x07,0x06,0x09,0x09,0x08,0x08,0x08,0x0A,0x07,0x08,0x07,0x08,0x07,0x07,0x07,0x05,0x06,0x06,0x06,0x05,\ +0x06,0x04,0x05,0x06,0x05,0x04,0x04,0x0F,0x00,0x12,0x04,0x05,0x07,0x07,0x0B,0x08,0x07,0x09,0x09,0x09,0x08,0x08,0x07,0x07,0x07,0x06,0x08,0x08,0x05,0x05,0x04,0x06,\ +0x06,0x05,0x06,0x05,0x06,0x05,0x05,0x04,0x03,0x03,0x0F,0x00,0x0F,0x04,0x06,0x05,0x07,0x07,0x07,0x08,0x07,0x06,0x06,0x07,0x06,0x05,0x07,0x08,0x08,0x09,0x06,0x06,\ +0x06,0x07,0x05,0x05,0x04,0x03,0x06,0x07,0x05,0x05,0x05,0x03,0x04,0x0E,0x00,0x12,0x05,0x07,0x07,0x06,0x08,0x08,0x08,0x08,0x07,0x08,0x08,0x09,0x08,0x08,0x08,0x07,\ +0x09,0x07,0x06,0x06,0x09,0x04,0x06,0x0A,0x07,0x06,0x07,0x04,0x04,0x04,0x05,0x04,0x0F,0x00,0x11,0x07,0x07,0x07,0x0B,0x06,0x08,0x09,0x08,0x08,0x07,0x07,0x07,0x07,\ +0x09,0x06,0x07,0x09,0x08,0x06,0x05,0x07,0x03,0x07,0x06,0x04,0x04,0x07,0x04,0x04,0x05,0x05,0x05,0x10,0x00,0x13,0x06,0x07,0x05,0x06,0x08,0x07,0x06,0x06,0x08,0x08,\ +0x08,0x07,0x08,0x06,0x08,0x06,0x08,0x06,0x07,0x05,0x06,0x06,0x05,0x06,0x05,0x05,0x04,0x04,0x04,0x04,0x05,0x05,0x0A,0x00}; +const uint8_t phone_data_75_7403_7D07[]={0x05,0x04,0x04,0x07,0x04,0x04,0x05,0x05,0x05,0x04,0x05,0x03,0x04,0x04,0x05,0x04,0x04,0x04,0x05,0x03,0x03,0x04,0x04,0x00,0x05,0x04,0x05,0x04,0x05,0x04,0x04,0x04,\ +0x05,0x05,0x04,0x04,0x05,0x05,0x04,0x04,0x04,0x04,0x03,0x0A,0x04,0x04,0x04,0x05,0x05,0x05,0x06,0x07,0x05,0x08,0x04,0x05,0x06,0x04,0x04,0x03,0x03,0x03,0x06,0x00,\ +0x05,0x04,0x05,0x04,0x04,0x04,0x04,0x04,0x03,0x04,0x04,0x03,0x06,0x03,0x04,0x04,0x06,0x04,0x04,0x06,0x05,0x04,0x03,0x06,0x05,0x04,0x05,0x04,0x04,0x05,0x05,0x04,\ +0x04,0x05,0x04,0x04,0x04,0x05,0x04,0x00,0x07,0x05,0x06,0x08,0x08,0x06,0x06,0x06,0x06,0x06,0x07,0x05,0x06,0x05,0x07,0x06,0x06,0x06,0x04,0x06,0x05,0x05,0x05,0x05,\ +0x04,0x03,0x04,0x05,0x04,0x05,0x04,0x05,0x05,0x04,0x04,0x03,0x04,0x04,0x06,0x00,0x04,0x05,0x04,0x05,0x04,0x05,0x04,0x06,0x04,0x04,0x04,0x04,0x04,0x04,0x03,0x04,\ +0x04,0x04,0x04,0x07,0x05,0x04,0x04,0x05,0x04,0x05,0x04,0x05,0x05,0x06,0x04,0x04,0x04,0x04,0x03,0x04,0x05,0x05,0x05,0x00,0x04,0x04,0x07,0x05,0x06,0x05,0x05,0x05,\ +0x07,0x03,0x04,0x05,0x05,0x06,0x04,0x05,0x06,0x04,0x04,0x05,0x04,0x03,0x04,0x04,0x05,0x04,0x03,0x05,0x05,0x06,0x04,0x04,0x05,0x05,0x04,0x05,0x05,0x04,0x05,0x00,\ +0x05,0x05,0x04,0x07,0x04,0x05,0x05,0x05,0x04,0x05,0x05,0x04,0x04,0x04,0x05,0x04,0x04,0x04,0x04,0x06,0x04,0x04,0x04,0x04,0x04,0x05,0x07,0x04,0x04,0x05,0x04,0x04,\ +0x04,0x05,0x05,0x04,0x04,0x04,0x05,0x00,0x03,0x04,0x07,0x04,0x06,0x05,0x06,0x04,0x04,0x04,0x05,0x04,0x04,0x07,0x05,0x04,0x03,0x05,0x04,0x04,0x04,0x05,0x04,0x04}; + +const uint8_t phone_data_75_00[]={0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\ +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\ +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\ +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\ +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\ +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\ +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\ +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\ +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}; +const uint8_t phone_data_75_FF[]={0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,\ +0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,\ +0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,\ +0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,\ +0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,\ +0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,\ +0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,\ +0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,\ +0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF}; + + + #endif + +#endif + + + +#endif + diff --git a/src/app/demo/app_tp_screen_transfer_data_s8.h b/src/app/demo/app_tp_screen_transfer_data_s8.h new file mode 100644 index 0000000..c511a3e --- /dev/null +++ b/src/app/demo/app_tp_screen_transfer_data_s8.h @@ -0,0 +1,23 @@ +/******************************************************************************* +* +* +* File: hal_tp_screen_transfer_data.h +* Description start/sleep/awake ģʽҪ͵ֵ +* Version V0.1 +* Date 2021-10-14 +* Author zhanghz +*******************************************************************************/ +#ifndef __HAL_TP_SCREEN_TRANSFER_DATA_S8_H__ +#define __HAL_TP_SCREEN_TRANSFER_DATA_S8_H__ + +#include "tau_common.h" + +/***************send to screen***************/ +const uint8_t screen_87_data[] = {0x87}; +const uint8_t screen_a0_00_ff_data[] = {0xa0, 0x00, 0xff}; +const uint8_t screen_a4_06_c1_data[] = {0xa4, 0x06, 0xc1}; + +/*******************************************/ + +#endif + diff --git a/src/app/demo/app_tp_st_touch.c b/src/app/demo/app_tp_st_touch.c new file mode 100644 index 0000000..d7908a9 --- /dev/null +++ b/src/app/demo/app_tp_st_touch.c @@ -0,0 +1,568 @@ +/******************************************************************************* +* +* +* File: app_tp_st_touch.c +* Description ST touch У׼λȹܺ +* Version V0.1 +* Date 2023-03-13 +* Author sfy + +* Description ST touch У׼ضܣŽӿڸλȡǷɹ +* Version V0.2 +* Date 2023-03-22 +* Author sfy + +*******************************************************************************/ + +#include "test_cfg_global.h" +#include "app_tp_transfer.h" +#include "hal_i2c_master.h" +#include "hal_i2c_slave.h" +#include "hal_spi_master.h" +#include "hal_spi_slave.h" +#include "tau_log.h" +#include "app_tp_st_touch.h" + +#define ST_TP_CALIBRATION_SUCCESS 0x5A // У׼ɹ־ + +static volatile bool s_calibration_flag = false; +static volatile uint8_t s_calibration_correct_flag = false; + +st_tp_scan_data tp_scan_data; + +uint8_t st_touch_init_sensor_off[3] = {0xA0,0x00,0x00}; //2 sensor OFF +uint8_t st_touch_init_sensor_on[3] = {0xA0,0x00,0x01}; //2 sensor on + + +uint8_t st_touch_tp_tuning_reset[3] = {0xA4,0x00,0x00}; // 3 System Reset +uint8_t st_touch_tp_tuning_FpnlInit[3] = {0xA4,0x00,0x03}; // FPnl Init +uint8_t st_touch_tp_tuning_PnlInit[3] = {0xA4,0x00,0x02}; // Pnl Init +uint8_t st_touch_tp_tuning_TuneM[4] = {0xA4,0x03,0x13,0x00}; // TuneM +uint8_t st_touch_tp_tuning_TuneS[4] = {0xA4,0x03,0x0C,0x00}; // TuneS +uint8_t st_touch_tp_tuning_SvCfg[3] = {0xA4,0x05,0x01}; // SvCfg +uint8_t st_touch_tp_tuning_SvCx[3] = {0xA4,0x05,0x02}; // SvCx +uint8_t st_touch_tp_tuning_SvPnl[3] = {0xA4,0x05,0x04}; // SvPnl +uint8_t st_touch_tp_tuning_clearfifo[3] = {0xA4,0x00,0x01}; // 1 clear fifo + +uint8_t st_touch_tp_tuning_clkreset[3] = {0xA4,0x00,0x05}; // clk reset + +/************************************************************************** +* @name : ap_tp_st_touch_get_calibration_success_mark +* @brief : st touch ȡУ׼ɹ־ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ + +void ap_tp_st_touch_get_calibration_success_mark(void) +{ + uint8_t cali_send_buff[6] = {0xFA,0x20,0x01,0x00,0x00,0x00}; + uint8_t cali_send_buff1[3] = {0xA4,0x06,0x01}; + uint8_t cali_read_buff[40] = {0}; + uint8_t i = 0; + + app_tp_m_read(cali_send_buff, 5, cali_read_buff, 4); + while(!hal_i2c_m_transfer_complate()); + delayMs(1); + + app_tp_m_write(cali_send_buff1, 3); + while(!hal_i2c_m_transfer_complate()); + delayMs(1); + + app_tp_m_read(cali_send_buff, 5, cali_read_buff, 4); + while(!hal_i2c_m_transfer_complate()); + delayMs(1); + + app_tp_m_read(cali_send_buff, 5, cali_read_buff, 32); + while(!hal_i2c_m_transfer_complate()); + + if((cali_read_buff[20] == 0xFF) && (cali_read_buff[21] == 0xFF)) + { + s_calibration_correct_flag = ST_TP_CALIBRATION_SUCCESS; // У׼ɹ + } + else + { + s_calibration_correct_flag = 0x00; // У׼ʧ + } +/* + for(i=0;i<32;i++) + { + printf("%02x ",cali_read_buff[i]); + } +*/ +} + +/************************************************************************** +* @name : ap_tp_st_touch_calibration +* @brief : st touch У׼ָ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ + +void ap_tp_st_touch_calibration(void) +{ + // app_tp_m_write(st_touch_tp_tuning_reset, sizeof(st_touch_tp_tuning_reset)); // System Reset + // while(!hal_i2c_m_transfer_complate()); + // delayMs(10); + app_tp_m_write(st_touch_tp_tuning_FpnlInit, sizeof(st_touch_tp_tuning_FpnlInit)); // FPnl Init + while(!hal_i2c_m_transfer_complate()); + delayMs(1); + app_tp_m_write(st_touch_tp_tuning_PnlInit, sizeof(st_touch_tp_tuning_PnlInit)); // Pnl Init + while(!hal_i2c_m_transfer_complate()); + delayMs(1); + app_tp_m_write(st_touch_tp_tuning_TuneM, sizeof(st_touch_tp_tuning_TuneM)); // TuneM + while(!hal_i2c_m_transfer_complate()); + delayMs(1); + app_tp_m_write(st_touch_tp_tuning_TuneS, sizeof(st_touch_tp_tuning_TuneS)); // TuneS + while(!hal_i2c_m_transfer_complate()); + delayMs(1); + app_tp_m_write(st_touch_tp_tuning_SvCfg, sizeof(st_touch_tp_tuning_SvCfg)); // SvCfg + while(!hal_i2c_m_transfer_complate()); + delayMs(1); + app_tp_m_write(st_touch_tp_tuning_SvCx, sizeof(st_touch_tp_tuning_SvCx)); // SvCx + while(!hal_i2c_m_transfer_complate()); + delayMs(1); + app_tp_m_write(st_touch_tp_tuning_SvPnl, sizeof(st_touch_tp_tuning_SvPnl)); // SvPnl + while(!hal_i2c_m_transfer_complate()); + delayMs(1); +} + +const unsigned short wCRCTalbeAbs[] = +{ + 0x0000, 0xCC01, 0xD801, 0x1400, 0xF001, 0x3C00, 0x2800, 0xE401, + 0xA001, 0x6C00, 0x7800, 0xB401, 0x5000, 0x9C01, 0x8801, 0x4400, +}; + +/************************************************************************** +* @name : CRC16_2 +* @brief : CRC ֵ +* @param[in] :pchMsg ַָ; wDataLen CRC 鳤 +* @return : 16λCRCֵ +* @retval : +**************************************************************************/ + +unsigned short CRC16_2(unsigned char *pchMsg, unsigned short wDataLen) +{ + unsigned short wCRC = 0xFFFF; + unsigned short i; + unsigned char chChar; + + for (i = 0; i < wDataLen; i++) + { + chChar = *pchMsg++; + wCRC = wCRCTalbeAbs[(chChar ^ wCRC) & 15] ^ (wCRC >> 4); + wCRC = wCRCTalbeAbs[((chChar >> 4) ^ wCRC) & 15] ^ (wCRC >> 4); + } + + return wCRC; +} + +/************************************************************************** +* @name : ap_set_tp_calibration_04 +* @brief : ȡ04 02ִУ׼gammaУ׼ȹ +* @param[in] :handler rx handler; dcs_packet ָͳȵϢṹ +* @return : true +* @retval : +**************************************************************************/ + +bool ap_set_tp_calibration_04(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +{ + uint8_t i,crch,crcl,command,param[30] = {0}; + unsigned short crc; + + // CRCֵ + for(i=0;iparam_length;i++) + { + param[i+1] = dcs_packet->packet_param[i]; + printf("%02x ",dcs_packet->packet_param[i]); + } + + param[0] = 0x04; + crc = CRC16_2(param,dcs_packet->param_length-1); + crch = (crc>>8); + crcl = crc; + + // CRCУж +// if(crch == dcs_packet->packet_param[dcs_packet->param_length-2] && crcl == dcs_packet->packet_param[dcs_packet->param_length-1]) + { + command = param[3]; + switch(command) + { + case CMD_TP_CABLIBRATION: // TouchУ׼ + if( (param[4] == 0x01) && (param[5] == 0x01) && (param[6] == 0x01) ) + { + s_calibration_flag = true; + s_calibration_correct_flag = false; + + } + /* if( (param[4] == 0xA5) && (param[5] == 0x5A) && (param[6] == 0xA5) ) + { + if(s_calibration_correct_flag) // У׼ɹ + { + hal_dsi_rx_ctrl_send_ack_cmd(handler, + DSI_ACK_DT_GEN_LONG_RESPONSE, //xxx + DSI_VC_0, + 0x7, 0x04,0x02,0x07,0x2A,ST_TP_CALIBRATION_SUCCESS,0x00,0x00); + printf("cali. send ok "); + } + else // У׼ʧ + { + hal_dsi_rx_ctrl_send_ack_cmd(handler, + DSI_ACK_DT_GEN_LONG_RESPONSE, //xxx + DSI_VC_0, + 0x7, 0x04,0x02,0x07,0x2A,0x00,0x00,0x00); + } + printf("%02x ",s_calibration_correct_flag); + } + */ + break; + case CMD_SET_IMAGE_RGB: // Image RGB + break; + case CMD_SEND_COMMAND: // Command Send + break; + case CMD_WRITE_GAMMA: // GammaУд + break; + case CMD_START_GAMMA: + break; + default: + break; + } + } + + // ݾɰ汾tp calibration + if( (dcs_packet->packet_param[0] == 0x01) && (dcs_packet->packet_param[1] == 0x01) && (dcs_packet->packet_param[2] == 0x01) ) + { + s_calibration_flag = true; + s_calibration_correct_flag = false; + } +/* + if( (dcs_packet->packet_param[0] == 0xA5) && (dcs_packet->packet_param[1] == 0x5A) && (dcs_packet->packet_param[2] == 0xA5) ) + { + if(s_calibration_correct_flag) // У׼ɹ + { + hal_dsi_rx_ctrl_send_ack_cmd(handler, + DSI_ACK_DT_GEN_LONG_RESPONSE, //xxx + DSI_VC_0, + 0x7, 0x04,0x02,0x07,0x2A,ST_TP_CALIBRATION_SUCCESS,0x00,0x00); + } + else // У׼ʧ + { + hal_dsi_rx_ctrl_send_ack_cmd(handler, + DSI_ACK_DT_GEN_LONG_RESPONSE, //xxx + DSI_VC_0, + 0x7, 0x04,0x02,0x07,0x2A,0x00,0x00,0x00); + } + } +*/ + return true; +} + + +/************************************************************************** +* @name : ap_get_tp_calibration_status_01 +* @brief : ȡУ׼״̬ +* @param[in] :param 01 +* @return : true +* @retval : +**************************************************************************/ + +bool ap_get_tp_calibration_status_01(hal_dsi_rx_ctrl_handle_t *handler, uint8_t param) +{ +// if( param == 0x5A ) + { + if(s_calibration_correct_flag) // У׼ɹ + { + hal_dsi_rx_ctrl_send_ack_cmd(handler, + DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, //xxx + DSI_VC_0, + 1,ST_TP_CALIBRATION_SUCCESS); + } + else // У׼ʧ + { + hal_dsi_rx_ctrl_send_ack_cmd(handler, + DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, //xxx + DSI_VC_0, + 1,0x00); + } + } + + return true; +} + +/************************************************************************** +* @name : app_tp_calibration_exec +* @brief : st touch У׼ִк +* @param[in] : +* @return : +* @retval : +**************************************************************************/ + +void app_tp_calibration_exec(void) +{ + uint8_t i = 0; + + if(s_calibration_flag) + { + s_calibration_flag = false; + for(i=0;i<2;i++) + { + ap_tp_st_touch_calibration(); + delayMs(4000); + ap_tp_st_touch_get_calibration_success_mark(); + if(s_calibration_correct_flag == ST_TP_CALIBRATION_SUCCESS) + { + TAU_LOGD("calibration successful \n"); + break; + } + else + { + TAU_LOGD("calibration failure \n"); + } + } + + } +} + + +/************************************************************************** +* @name : ap_tp_st_touch_scan_point_init +* @brief : st touch tp_scan_dataṹʼ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ + +void ap_tp_st_touch_scan_point_init(void) +{ + uint8_t i=0; + + for(i=0;i>4)+1; + i+=7; + + if(eventdata == 0x13) // ¼ + { + for(j=0;j0)) // ͷ¼ + { + for(j=0;j0) // в + { + printf("release finger %2d\n",tp_scan_data.tp_read_point_counter); + tp_scan_data.tp_read_point_counter = 0; + ap_tp_st_touch_simulate_finger_release_event(); + } + ap_tp_st_touch_scan_point_init(); + } + } +} + +/************************************************************************** +* @name : ap_tp_st_touch_error_handler_F3 +* @brief : st touch 쳣 F3 02 +* @param[in] : screendata +* @return : +* @retval : +**************************************************************************/ + +void ap_tp_st_touch_error_handler_F3(uint8_t* screendata) +{ + // յ TP 쳣ظ 0xF3 0x02 0x00 0x00 0x00 0x00 0x00 0x00 + if(screendata[0] == 0xF3 && screendata[1] == 0x02 && screendata[2] == 0x00) + { + ap_tp_st_touch_software_reset(); + } +} + +/************************************************************************** +* @name : ap_tp_st_touch_error_handler_F3 +* @brief : st touch 쳣 FF FF +* @param[in] : screendata +* @return : +* @retval : +**************************************************************************/ + +void ap_tp_st_touch_error_handler_FF(uint8_t* screendata) +{ + // յ TP 쳣ظ 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF + if(screendata[1] == 0xFF && screendata[2] == 0xFF&& screendata[3] == 0xFF&&screendata[4] == 0xFF) + { + ap_tp_st_touch_software_reset(); + } +} + + + + diff --git a/src/app/demo/app_tp_st_touch.h b/src/app/demo/app_tp_st_touch.h new file mode 100644 index 0000000..e7ad4ef --- /dev/null +++ b/src/app/demo/app_tp_st_touch.h @@ -0,0 +1,170 @@ +/******************************************************************************* +* +* +* File: app_tp_st_touch.h +* Description ST touch оƬغ +* Version V0.1 +* Date 2023-03-13 +* Author sfy +*******************************************************************************/ + +#ifndef __APP_TP_ST_TOUCH_H__ +#define __APP_TP_ST_TOUCH_H__ + +#include "string.h" +#include "tau_device_datatype.h" +#include "tau_common.h" +#include "hal_dsi_rx_ctrl.h" + +typedef enum +{ + CMD_TP_CABLIBRATION = 0x2A, + CMD_SET_IMAGE_RGB = 0x2B, + CMD_SEND_COMMAND = 0x2C, + CMD_WRITE_GAMMA = 0x2D, + CMD_START_GAMMA = 0x2E +} st_tp_calibration_command; + + +#define ST_TP_SCAN_POINT_NUMBER_MAX 6 // TP + +typedef struct +{ + uint8_t tp_point_buffer[ST_TP_SCAN_POINT_NUMBER_MAX]; // ¼TPID + uint8_t tp_read_point_counter; // IDͳ + uint8_t tp_point_up_error_flag; // ¼ҪִUP¼ + uint32_t tp_point_error_time_counter; // ûյmove¼release¼ʱ +} st_tp_scan_data; + +/************************************************************************** +* @name : ap_tp_st_touch_calibration +* @brief : st touch У׼ָ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ + +void ap_tp_st_touch_calibration(void); + +/************************************************************************** +* @name : app_tp_calibration_exec +* @brief : st touch У׼ִк +* @param[in] : +* @return : +* @retval : +**************************************************************************/ + +void app_tp_calibration_exec(void); + +/************************************************************************** +* @name : ap_tp_st_touch_get_calibration_success_mark +* @brief : st touch ȡУ׼ɹ־ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ + +void ap_tp_st_touch_get_calibration_success_mark(void); + +/************************************************************************** +* @name : ap_set_tp_calibration_04 +* @brief : ȡ04 02ִУ׼gammaУ׼ȹ +* @param[in] :handler rx handler; dcs_packet ָͳȵϢṹ +* @return : true +* @retval : +**************************************************************************/ + +bool ap_set_tp_calibration_04(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet); + +/************************************************************************** +* @name : ap_get_tp_calibration_status_01 +* @brief : ȡУ׼״̬ +* @param[in] :param 01 +* @return : true +* @retval : +**************************************************************************/ + +bool ap_get_tp_calibration_status_01(hal_dsi_rx_ctrl_handle_t *handler, uint8_t param); + +/************************************************************************** +* @name : ap_tp_st_touch_scan_point_init +* @brief : st touch tp_scan_dataṹʼ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ + +void ap_tp_st_touch_scan_point_init(void); + +/************************************************************************** +* @name : ap_tp_st_touch_simulate_finger_release_event +* @brief : st touch ģST ָͷ¼ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ + +void ap_tp_st_touch_simulate_finger_release_event(void); + +/************************************************************************** +* @name : ap_tp_st_touch_software_reset +* @brief : st touch оƬλָ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ + +void ap_tp_st_touch_software_reset(void); + +/************************************************************************** +* @name : app_tp_st_touch_hardware_reset +* @brief : st touch оƬӲλָ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +void ap_tp_st_touch_hardware_reset(void); + +/************************************************************************** +* @name : ap_tp_st_touch_scan_point_record_event +* @brief : st touch ¼¼ +* @param[in] : screendata buflen ݳ +* @return : +* @retval : +**************************************************************************/ + +void ap_tp_st_touch_scan_point_record_event(uint8_t* screendata,uint8_t len); + +/************************************************************************** +* @name : ap_tp_st_touch_scan_point_record_event_exec +* @brief : st touch в㣬ʱִкҪwhile(1)ִ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ + +void ap_tp_st_touch_scan_point_record_event_exec(void); + +/************************************************************************** +* @name : ap_tp_st_touch_error_handler_F3 +* @brief : st touch 쳣 F3 02 +* @param[in] : screendata +* @return : +* @retval : +**************************************************************************/ + +void ap_tp_st_touch_error_handler_F3(uint8_t* screendata); + +/************************************************************************** +* @name : ap_tp_st_touch_error_handler_F3 +* @brief : st touch 쳣 FF FF +* @param[in] : screendata +* @return : +* @retval : +**************************************************************************/ + +void ap_tp_st_touch_error_handler_FF(uint8_t* screendata); + + +#endif + diff --git a/src/app/demo/app_tp_transfer.c b/src/app/demo/app_tp_transfer.c new file mode 100644 index 0000000..a521a65 --- /dev/null +++ b/src/app/demo/app_tp_transfer.c @@ -0,0 +1,1055 @@ +/******************************************************************************* +* +* +* File: app_tp_transfer.c +* Description touch I2C/SPI ʼԼͨ +* Version V0.1 +* Date 2021-10-14 +* Author zhanghz +*******************************************************************************/ +#include "test_cfg_global.h" +#include "app_tp_transfer.h" +#include "hal_i2c_master.h" +#include "hal_i2c_slave.h" +#include "hal_spi_master.h" +#include "hal_spi_slave.h" +#include "tau_log.h" +#include "tau_delay.h" +#include "app_tp_st_touch.h" + +#if 1//def AP_TP_TRANSFER +uint8_t read_point; //ǰҪıһ8BYTE +uint8_t s_screen_number[2]; +uint8_t s_screen_temp[2]; +//uint8_t s_screen_read_bak[200]; +static uint8_t s_screen_read_buffer[BUFFER_SIZE_MAX]; +static uint8_t s_phone_read_buffer[BUFFER_SIZE_MAX]; + +static bool s_spim_write = false; //¼SPIǷ÷ͣǵĻҪRXFIFO +static bool s_screen_int_flag = false; //¼ǷյĻıж +static bool s_phone_reset_flag = false; //¼ǷյֻĿλź +static bool s_screen_int_transfer_status = false; //¼ǷѾʼͨ +bool s_screen_init_complate = false; //ĻTPʼɱ־ +static uint8_t s_screen_const_transfer_count = 0xff; //¼ǰͨŵһ,ʼֵ screen_reg_start_data_size + +//st_tp_scan_data tp_scan_data; + +#ifdef USE_FOR_SUMSUNG_S20 +uint16_t u16TouchID; +#endif + +static void app_tp_transfer_phone(size_t recieve_num); +//static void app_tp_reset_callback(void *data); +#if PHONE_SLAVE_TRANSFER_I2C //warning + static void app_tp_i2cs_callback(e_i2c_s_int_status int_status, size_t recieve_num); +#endif +#if PHONE_SLAVE_TRANSFER_SPI //warning + static void app_tp_spis_callback(hal_spis_event_e event, hal_spi_packet_info_t *packet_info); +#endif + +#ifdef USE_FOR_SUMSUNG_S21 +uint8_t MI10_PRO_screen_init_data0[3] = {0xA0,0x00,0x00}; //2 sensor OFF +uint8_t MI10_PRO_screen_init_data1[3] = {0xA0,0x00,0x01}; //2 sensor on +uint8_t MI10_PRO_screen_init_data2[6] = {0xA2,0x03,0x00,0x00,0x00,0x03}; +uint8_t MI10_PRO_screen_init_data3[3] = {0xA2,0x02,0x00}; +uint8_t MI10_PRO_screen_init_data4[3] = {0xC0,0x07,0x01}; + +uint8_t MI10_PRO_screen_init_data5[3] = {0xA4,0x06,0x70}; +uint8_t MI10_PRO_screen_init_data6[3] = {0xA6,0x00,0x00}; +uint8_t MI10_PRO_screen_init_data7[5] = {0xFA,0x20,0x00,0x00,0x78}; + +uint8_t MI10_PRO_screen_init_data8[6] = {0xA2,0x03,0x20,0x00,0x00,0x00}; +uint8_t MI10_PRO_screen_init_data9[2] = {0xA0,0x01}; +uint8_t MI10_PRO_screen_init_data10[3] = {0xA0,0x00,0x00}; +#endif + +#if 1//def ADD_TP_TUNING +uint8_t MI10_PRO_TP_Tuning_data1[3] = {0xA4,0x00,0x00}; // 3 System Reset +uint8_t MI10_PRO_TP_Tuning_data2[3] = {0xA4,0x00,0x03}; // FPnl Init +uint8_t MI10_PRO_TP_Tuning_data3[3] = {0xA4,0x00,0x02}; // Pnl Init +uint8_t MI10_PRO_TP_Tuning_data4[4] = {0xA4,0x03,0x13,0x00}; // TuneM +uint8_t MI10_PRO_TP_Tuning_data5[4] = {0xA4,0x03,0x0C,0x00}; // TuneS +uint8_t MI10_PRO_TP_Tuning_data6[3] = {0xA4,0x05,0x01}; // SvCfg +uint8_t MI10_PRO_TP_Tuning_data7[3] = {0xA4,0x05,0x02}; // SvCx +uint8_t MI10_PRO_TP_Tuning_data8[3] = {0xA4,0x05,0x04}; // SvPnl +uint8_t MI10_PRO_TP_Tuning_data9[3] = {0xA4,0x00,0x01}; // 1 clear fifo +#endif + +/************************************************************************** +* @name : app_tp_screen_int_callback +* @brief : screen ж ص +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +static void app_tp_screen_int_callback(void *data) +{ + s_screen_int_flag = true; +} + +/************************************************************************** +* @name : app_tp_screen_int_lvl_low +* @brief : ȡ screen ж IO ƽ +* @param[in] : +* @return : trueIO Ϊ͵ƽ +* @retval : +**************************************************************************/ +static bool app_tp_screen_int_lvl_low(void) +{ + uint8_t i = 1; + uint8_t j = 1; +#if SCREEN_MASTER_TRANSFER_I2C +// i=hal_gpio_get_input_data(g_screen_input_int_pad); +// j=hal_gpio_get_input_data(g_screen_input_int_pad); +// if((i+j)==0) +// { +// return true; +// } +//else +// { +// return false; +// } + return !hal_gpio_get_input_data(g_screen_input_int_pad); +#elif SCREEN_MASTER_TRANSFER_SPI + return !hal_gpio_get_input_data(g_screen_input_int_pad); //ӦSPIͨŹżͻȻCS ͨ쳣 +#else + return false; +#endif +} + +/************************************************************************** +* @name : app_tp_screen_int_init +* @brief : screen ж IO ʼ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +static void app_tp_screen_int_init(void) +{ + hal_gpio_set_pull_state(g_screen_input_int_pad, ENABLE, DISABLE); // 1. + hal_gpio_ctrl_eint(g_screen_input_int_pad, DISABLE); // 2.رж + hal_gpio_init_eint(g_screen_input_int_pad, DETECT_FALLING_EDGE); // 3.жϳʼ,TPһ㶼½شж + hal_gpio_reg_eint_cb(g_screen_input_int_pad, app_tp_screen_int_callback); // 4.עص + hal_gpio_ctrl_eint(g_screen_input_int_pad, ENABLE); // 5.ʹж +} + +#if 0 +/************************************************************************** +* @name : app_tp_screen_reset_init +* @brief : phone reset ж IO ʼ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +void app_tp_screen_reset(void) +{ + +// TAU_LOGD("tp_screen_reset \n"); + hal_gpio_init_output(g_screen_input_rst_pad, IO_LVL_HIGH); +// hal_gpio_set_output_data(g_screen_input_rst_pad, IO_LVL_HIGH); + delayMs(10); + hal_gpio_set_output_data(g_screen_input_rst_pad, IO_LVL_LOW); + delayMs(20); + hal_gpio_set_output_data(g_screen_input_rst_pad, IO_LVL_HIGH); + + +} + +#endif + +/************************************************************************** +* @name : app_tp_screen_init +* @brief : screen IO 䣬ʼʼ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +void app_tp_screen_init(void) +{ + hal_gpio_init_output(g_screen_input_rst_pad, IO_LVL_HIGH); + delayUs(200); + hal_gpio_set_output_data(g_screen_input_rst_pad, IO_LVL_LOW); + delayUs(200); + hal_gpio_set_output_data(g_screen_input_rst_pad, IO_LVL_HIGH); +} + +void app_tp_I2C_init(void) +{ + hal_i2c_s_init(CHIP_I2C_ADDRESS, CHIP_I2C_ADDR_BITS); + hal_i2c_s_set_transfer(app_tp_i2cs_callback); + hal_i2c_s_nonblocking_read(s_phone_read_buffer, BUFFER_SIZE_MAX); //ý buffer +} + + + + +/************************************************************************** +* @name : app_tp_init +* @brief : ʼͨ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +void app_tp_init(void) +{ +#ifdef DISABLE_TDDI_I2C_FUNCTION + hal_gpio_init_output(g_phone_output_int_pad, IO_LVL_HIGH); //phoneжIO + hal_gpio_init_output(g_screen_input_rst_pad, IO_LVL_HIGH); //ģTP RESET + + hal_gpio_set_mode(IO_PAD_TD_SPIM_CLK,IO_MODE_I2C1_SCL); + hal_gpio_set_mode(IO_PAD_TD_SPIM_CSN,IO_MODE_I2C1_SDA); + + return; +#else + hal_gpio_set_pull_state(IO_PAD_TD_SPIM_CLK, ENABLE, DISABLE); + hal_gpio_set_pull_state(IO_PAD_TD_SPIM_CSN, ENABLE, DISABLE); +#endif + + app_tp_screen_init(); //ʼֻλIO +//app_tp_screen_int_init(); //screenж +#ifdef G_PHONE_INT_DEFAULT_LOW + hal_gpio_init_output(g_phone_output_int_pad, IO_LVL_LOW); //phoneжIO +#else + hal_gpio_init_output(g_phone_output_int_pad, IO_LVL_HIGH); //phoneжIO +#endif + hal_gpio_init_input(g_screen_input_int_pad); +// hal_gpio_init_output(g_screen_input_rst_pad, IO_LVL_HIGH); //ģTP RESET + +#if SCREEN_MASTER_TRANSFER_I2C + hal_i2c_m_dma_init(SCREEN_I2C_ADDRESS, SCREEN_I2C_ADDR_BITS, I2C_MASTER_SPEED); +#elif SCREEN_MASTER_TRANSFER_SPI + hal_spi_m_dma_init(SPI_MASTER_SPEED, SCREEN_SPI_CPHA, SCREEN_SPI_CPOL); +#endif + +#if PHONE_SLAVE_TRANSFER_I2C +// hal_i2c_s_init(CHIP_I2C_ADDRESS, CHIP_I2C_ADDR_BITS); +// hal_i2c_s_set_transfer(app_tp_i2cs_callback); +// hal_i2c_s_nonblocking_read(s_phone_read_buffer, BUFFER_SIZE_MAX); //ý buffer +#elif PHONE_SLAVE_TRANSFER_SPI + hal_spi_slave_init(PHONE_SPI_CPHA, PHONE_SPI_CPOL, true); // ʼspiԼdma + hal_spi_slave_register_callback(app_tp_spis_callback); // עص + hal_spi_slave_auto_transfer_abort(); // ֹͣ + hal_spi_slave_flush_fifo(); // Flush FIFO + + /* ÿpacketԶ, circle mode Ϊfalse, յbuffer max sizeݺbufferٸ, packetɺûص */ + hal_spi_slave_set_auto_rx_buffer(s_phone_read_buffer, BUFFER_SIZE_MAX, false); // auto rx buffer + hal_spi_slave_set_auto_tx_buffer(phone_reg_const_data[0].write_back, phone_reg_const_data[0].write_back_size, false); // TX BUFFER + + hal_spi_slave_enable(); // spis + hal_spi_slave_auto_transfer_start(); // rxԶ +#endif +} + + +/************************************************************************** +* @name : app_tp_m_transfer_complate +* @brief : ȡͨ״̬ +* @param[in] : +* @return :true: ͨ +* @retval : +**************************************************************************/ +bool app_tp_m_transfer_complate(void) +{ +#if SCREEN_MASTER_TRANSFER_I2C + return hal_i2c_m_transfer_complate(); +#elif SCREEN_MASTER_TRANSFER_SPI + return hal_spi_m_get_transfer_complate(); +#else + return true; +#endif +} + +/************************************************************************** +* @name : app_tp_s_transfer_complate +* @brief : ȡӻͨ״̬ +* @param[in] : +* @return :true: ͨ +* @retval : +**************************************************************************/ +bool app_tp_s_transfer_complate(void) +{ +#if SCREEN_MASTER_TRANSFER_I2C + return hal_i2c_s_write_complate() && hal_i2c_s_read_complate(); +#elif SCREEN_MASTER_TRANSFER_SPI + return !hal_spi_slave_busy(); +#else + return true; +#endif +} + +/************************************************************************** +* @name : app_tp_m_write +* @brief : ͨŷʽ÷txbufferе +* @param[in] :txbuffer: buffer ͷַ +* @param[in] :buffer_size: buffer +* @return : +* @retval : +**************************************************************************/ +void app_tp_m_write(const uint8_t *txbuffer, size_t buffer_size) +{ +#if SCREEN_MASTER_TRANSFER_I2C + hal_i2c_m_dma_write(txbuffer, buffer_size); +#elif SCREEN_MASTER_TRANSFER_SPI + hal_spi_m_dma_write(txbuffer, buffer_size); + s_spim_write = true; +#endif +} + +/************************************************************************** +* @name : app_tp_m_read +* @brief : ͨŷʽ÷txbufferеݺrxbuffer +* @param[in] :cmd: buffer ͷַ +* @param[in] :cmd_size: buffer +* @param[in] :data_buffer: ȡ buffer ͷַ +* @param[in] :data_size: ȡ buffer +* @return : +* @retval : +**************************************************************************/ +void app_tp_m_read(const uint8_t *cmd, size_t cmd_size, uint8_t *data_buffer, size_t data_size) +{ +#if SCREEN_MASTER_TRANSFER_I2C + uint8_t i = 0; + uint32_t address = 0; + + for (i = 0; i < cmd_size; i++) //ȽҪ͵ϵ address + { + address |= (uint32_t)cmd[i] << i * 8; + } + hal_i2c_m_dma_read(address, cmd_size, data_buffer, data_size); +#elif SCREEN_MASTER_TRANSFER_SPI + hal_spi_m_dma_read(cmd, cmd_size, data_buffer, data_size); +#endif +} + +/************************************************************************** +* @name : app_tp_s_write +* @brief : ͨŷʽ÷txbufferе +* @param[in] :txbuffer: buffer ͷַ +* @param[in] :buffer_size: buffer +* @return : +* @retval : +**************************************************************************/ +void app_tp_s_write(const uint8_t *txbuffer, size_t buffer_size) +{ +#if PHONE_SLAVE_TRANSFER_I2C + hal_i2c_s_dma_write(txbuffer, buffer_size); +#elif PHONE_SLAVE_TRANSFER_SPI + //while (hal_spi_slave_busy()); + hal_spi_slave_auto_transfer_abort(); + hal_spi_slave_flush_fifo(); + hal_spi_slave_set_auto_tx_buffer(txbuffer, buffer_size, true); + hal_spi_slave_auto_transfer_start(); +#endif +} + +/************************************************************************** +* @name : app_tp_s_read +* @brief : ͨŷʽrxbuffer +* @param[in] :rxBuffer: ȡ buffer ͷַ +* @param[in] :data_size: ȡ buffer +* @return : +* @retval : +**************************************************************************/ +void app_tp_s_read(void *rxBuffer, size_t data_size) +{ +#if PHONE_SLAVE_TRANSFER_I2C + hal_i2c_s_nonblocking_read(rxBuffer, data_size); +#endif +} + +/************************************************************************** +* @name : app_tp_spis_callback +* @brief : SPI slave жϴ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +#if PHONE_SLAVE_TRANSFER_I2C //warning +//ԡint_status=0Ϊ=2ΪSTOP=1δԵ +//recieve_numΪյָ +static void app_tp_i2cs_callback(e_i2c_s_int_status int_status, size_t recieve_num) +{ +#if 0 // 1: test + if (int_status >2) + { + s_phone_read_buffer[2]=int_status; + s_phone_read_buffer[3]=recieve_num; + app_tp_m_write(s_phone_read_buffer, 4); + } +#endif + app_tp_transfer_phone(recieve_num); +} +#endif + +/************************************************************************** +* @name : app_tp_spis_callback +* @brief : SPI slave жϴ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +#if PHONE_SLAVE_TRANSFER_SPI //warning +static void app_tp_spis_callback(hal_spis_event_e event, hal_spi_packet_info_t *packet_info) +{ + app_tp_transfer_phone(packet_info->packet_size); +} +#endif + +#if 0 +/************************************************************************** +* @name : app_tp_reset_callback +* @brief : ֻ IO临λжϴ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +static void app_tp_reset_callback(void *data) +{ + TAU_LOGD("app_tp_reset_callback\n"); + s_phone_reset_flag = true; + app_tp_s_write(phone_reg_const_data[0].write_back, phone_reg_const_data[0].write_back_size); +#if PHONE_SLAVE_TRANSFER_SPI + hal_gpio_set_output_data(IO_PAD_AP_INT, IO_LVL_LOW); +#endif +} +#endif + + +void S20_Start_init(void) +{ + uint8_t len=0; + uint8_t temp=0; + uint8_t temp_start_flag=0; + // if(phone_start_flag==1) + { + app_tp_m_read(screen_reg_int_data[0].buffer, 1, s_screen_read_buffer, 8); + while(!hal_i2c_m_transfer_complate()); + delayMs(2); + while(!hal_gpio_get_input_data(g_screen_input_int_pad)) + { + app_tp_m_read(screen_reg_int_data[0].buffer, 1, s_screen_read_buffer, 8); + while(!hal_i2c_m_transfer_complate()); + delayMs(2); + } + temp=s_screen_read_buffer[0]&0xf0; + if((temp==0x10)||(temp==0x20)||(temp==0x30)) + { + temp_start_flag=1; + } + if(temp_start_flag==0) + { + app_tp_m_write(MI10_PRO_screen_init_data1, sizeof(MI10_PRO_screen_init_data1));//0xA0,0x00,0x01 + while(!hal_i2c_m_transfer_complate()); + delayMs(1); + app_tp_m_write(MI10_PRO_screen_init_data2, sizeof(MI10_PRO_screen_init_data2));//0xA2,0x03,0x00,0x00,0x00,0x03 + while(!hal_i2c_m_transfer_complate()); + delayMs(1); + app_tp_m_write(MI10_PRO_screen_init_data3, sizeof(MI10_PRO_screen_init_data3));//0xA2,0x02,0x00 + while(!hal_i2c_m_transfer_complate()); + delayMs(1); + app_tp_m_write(MI10_PRO_screen_init_data4, sizeof(MI10_PRO_screen_init_data4));//0xC0,0x07,0x01 + while(!hal_i2c_m_transfer_complate()); + delayMs(1); + app_tp_m_read(screen_reg_int_data[0].buffer, 1, s_screen_read_buffer, 8); + while(!hal_i2c_m_transfer_complate()); + if(s_screen_read_buffer[7]>0) + { + len=s_screen_read_buffer[7]*8; + app_tp_m_read(screen_reg_int_data[0].buffer, 1, s_screen_read_buffer, len); + while(!hal_i2c_m_transfer_complate()); + } + } +#endif + if(hal_gpio_get_input_data(g_screen_input_int_pad)) + { + s_screen_init_complate = true; + app_tp_screen_int_init(); + phone_start_flag=0; + } + } +} + + + +/************************************************************************** +* @name : app_tp_transfer_screen_const +* @brief : flowдscreen screen ʼ +* @param[in] : +* @return : +* @retval : +*޸TP1ģʼ +*ִscreen_reg_start_data[] +**************************************************************************/ +static void app_tp_transfer_screen_const(void) +{ +// static bool screen_const_transfer_buffer_ready = true; // buffer Ƿ׼ + uint8_t ii; +// uint8_t len=0; + /**** 1. жϵǰ״̬ͨѽ, ״̬ͨѽҿʼ̻δ****/ +#if 0 // test + uint8_t test_master_read_buffer[10] = {0x08, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18, 0x19}; + uint8_t write_buffer[10] = {0x04, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18, 0x19}; + +// for (ii =0x20; ii<0x7F; ii++) + { + //hal_i2c_m_dma_init(ii, SCREEN_I2C_ADDR_BITS); + //delayMs(100); + if (hal_i2c_m_dma_write(write_buffer, 1)) + { + //break; + } + while(!hal_i2c_m_transfer_complate()); + hal_i2c_m_dma_read(test_master_read_buffer, 1, test_master_read_buffer, 2); + } +#endif + + + if (app_tp_m_transfer_complate() && (s_screen_const_transfer_count < screen_reg_start_data_size)) + { + if (s_spim_write) //SPI дݺҪѽFIFOݶȻӰһζȡ + { + hal_spi_m_clear_rxfifo(); + s_spim_write = false; + } + + #if 1 + +// #ifndef USE_FOR_SUMSUNG_S20 +// for (ii =0; ii= screen_reg_start_data_size) + { + s_screen_init_complate = true; + } + } + #endif + } +} + +#if 0 + +/************************************************************************** +* @name : ap_tp_calibration +* @brief : ����У׼���� +* @param[in] : +* @return : +* @retval : +**************************************************************************/ + +void ap_tp_calibration(void) +{ + // app_tp_m_write(MI10_PRO_TP_Tuning_data1, sizeof(MI10_PRO_TP_Tuning_data1)); // System Reset + // while(!hal_i2c_m_transfer_complate()); + // delayMs(10); + app_tp_m_write(MI10_PRO_TP_Tuning_data2, sizeof(MI10_PRO_TP_Tuning_data2)); // FPnl Init + while(!hal_i2c_m_transfer_complate()); + delayMs(1); + app_tp_m_write(MI10_PRO_TP_Tuning_data3, sizeof(MI10_PRO_TP_Tuning_data3)); // Pnl Init + while(!hal_i2c_m_transfer_complate()); + delayMs(1); + app_tp_m_write(MI10_PRO_TP_Tuning_data4, sizeof(MI10_PRO_TP_Tuning_data4)); // TuneM + while(!hal_i2c_m_transfer_complate()); + delayMs(1); + app_tp_m_write(MI10_PRO_TP_Tuning_data5, sizeof(MI10_PRO_TP_Tuning_data5)); // TuneS + while(!hal_i2c_m_transfer_complate()); + delayMs(1); + app_tp_m_write(MI10_PRO_TP_Tuning_data6, sizeof(MI10_PRO_TP_Tuning_data6)); // SvCfg + while(!hal_i2c_m_transfer_complate()); + delayMs(1); + app_tp_m_write(MI10_PRO_TP_Tuning_data7, sizeof(MI10_PRO_TP_Tuning_data7)); // SvCx + while(!hal_i2c_m_transfer_complate()); + delayMs(1); + app_tp_m_write(MI10_PRO_TP_Tuning_data8, sizeof(MI10_PRO_TP_Tuning_data8)); // SvPnl + while(!hal_i2c_m_transfer_complate()); + delayMs(1); +} + + +void ap_tp_scan_point_init(void) +{ + uint8_t i=0; + + for(i=0;i>4)+1; + i+=7; + + if(eventdata == 0x13) // ¼ + { + for(j=0;j0)) // ͷ¼ + { + for(j=0;j0) // в + { + TAU_LOGD("release finger %2d", tp_scan_data.tp_read_point_counter); + tp_scan_data.tp_read_point_counter = 0; + ap_tp_simulate_finger_release_event(); + } + + // printf("F %2d,%2d,%2d,%2d,%2d,%2d\n",tp_scan_data.tp_point_buffer[0],tp_scan_data.tp_point_buffer[1],tp_scan_data.tp_point_buffer[2] + // ,tp_scan_data.tp_point_buffer[3],tp_scan_data.tp_point_buffer[4],tp_scan_data.tp_point_buffer[5]); + + ap_tp_scan_point_init(); + } + } + +} + + +/************************************************************************** +* @name : app_tp_screen_reset_init +* @brief : phone reset ж IO ʼ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +void app_tp_screen_reset(void) +{ + +// TAU_LOGD("tp_screen_reset \n"); + // hal_gpio_init_output(g_screen_input_rst_pad, IO_LVL_HIGH); + ap_tp_simulate_finger_release_event(); + ap_tp_scan_point_init(); + hal_gpio_set_output_data(g_screen_input_rst_pad, IO_LVL_HIGH); + delayMs(5); + hal_gpio_set_output_data(g_screen_input_rst_pad, IO_LVL_LOW); + delayMs(10); + hal_gpio_set_output_data(g_screen_input_rst_pad, IO_LVL_HIGH); + delayMs(5); + + app_tp_m_write(MI10_PRO_TP_Tuning_data9, sizeof(MI10_PRO_TP_Tuning_data9));//0xA4,0x00,0x01} + while(!hal_i2c_m_transfer_complate()); + delayMs(5); + app_tp_m_write(MI10_PRO_screen_init_data0, sizeof(MI10_PRO_screen_init_data0));//0xA0,0x00,0x00 + while(!hal_i2c_m_transfer_complate()); + delayMs(5); + app_tp_m_write(MI10_PRO_screen_init_data1, sizeof(MI10_PRO_screen_init_data1));//0xA0,0x00,0x01 + while(!hal_i2c_m_transfer_complate()); + delayMs(5); + + // app_tp_m_write(MI10_PRO_screen_init_data3, sizeof(MI10_PRO_screen_init_data3));//0xA2,0x02,0x00 + // while(!hal_i2c_m_transfer_complate()); + // delayMs(1); +// app_tp_m_write(MI10_PRO_screen_init_data4, sizeof(MI10_PRO_screen_init_data4));//0xC0,0x07,0x01 +// while(!hal_i2c_m_transfer_complate()); +// delayMs(1); + // app_tp_m_read(screen_reg_int_data[0].buffer, 1, s_screen_read_buffer, 8); + // while(!hal_i2c_m_transfer_complate()); + + +} + +#endif + +/************************************************************************** +* @name : app_tp_transfer_screen_start +* @brief : flowдscreenʼʼ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +void app_tp_transfer_screen_start(void) +{ + s_screen_init_complate = false; + s_screen_const_transfer_count = 0; + //app_tp_screen_init(); +#ifndef DISABLE_I2C_INIT_CODE + app_tp_transfer_screen_const(); +#endif + s_screen_int_flag = false; +} + + +/************************************************************************** +* @name : app_tp_transfer_screen_int +* @brief : screenжϺ󣬰flowдscreenЭת +* @param[in] : +* @return : +* @retval : +*޸TP2ȡģ鱨㣡 +*ִscreen_reg_int_data[]ҲԼд +**************************************************************************/ +void app_tp_transfer_screen_int(void) +{ + uint8_t len=0; + uint8_t temp_len=0; + bool screen_gpio_int = false; + static uint8_t screen_int_transfer_count = 0; //¼ǰͨŵһ + static bool screen_int_transfer_buffer_ready = true; // buffer Ƿ׼ + // static uint8_t test_flag = 0; + // s_screen_init_complate=false;//Ϊ¼⽫ƬΪ·ݣFT8719̩ĹͨѶ + if (!s_screen_init_complate) //TP ʼδɣȽгʼ + { + + app_tp_transfer_screen_const(); + + return; + } + + + /**** 1. ж screen Ƿ񷢳жź ****/ + // s_screen_int_flag: жźű־λ + // app_tp_screen_int_lvl_low : SPI ʱͨʱżcsߵͨ쳣ñ־λڽ + screen_gpio_int = s_screen_int_flag || app_tp_screen_int_lvl_low(); + if (screen_gpio_int) + { + s_screen_int_flag = false; + + app_tp_m_read(screen_reg_int_data[0].buffer, 1, s_screen_read_buffer, 8); + while(!hal_i2c_m_transfer_complate()); + if(s_screen_read_buffer[7]>0) + { + len=s_screen_read_buffer[7]*8; + app_tp_m_read(screen_reg_int_data[0].buffer, 1, &s_screen_read_buffer[8], len); + while(!hal_i2c_m_transfer_complate()); +// temp_len=len+7; + } +#if 0 +// if(s_screen_read_buffer[temp_len]>0) +// { +// len=s_screen_read_buffer[7]*8; + // app_tp_m_read(screen_reg_int_data[0].buffer, 1, &s_screen_read_buffer[temp_len+1], len); + // while(!hal_i2c_m_transfer_complate()); + // } + // delayUs(100); +#endif + delayMs(2); + ap_tp_st_touch_error_handler_F3(s_screen_read_buffer); + ap_tp_st_touch_error_handler_FF(s_screen_read_buffer); + ap_tp_st_touch_scan_point_record_event(s_screen_read_buffer,len+8); +/* // TP 쳣¼ + if(s_screen_read_buffer[0] == 0xF3) // յ TP 쳣ظ 0xF3 0x02 0x00 0x00 0x00 0x00 0x00 0x00 + { + + app_tp_screen_reset(); + +// app_tp_m_write(MI10_PRO_screen_init_data1, sizeof(MI10_PRO_screen_init_data1)); +// while(!hal_i2c_m_transfer_complate()); + // S20_Start_init(); + // ap_tp_system_softReset(); + delayMs(5); //5 + + TAU_LOGD("TP system reset 0\n"); + return; + } + else if(s_screen_read_buffer[1] == 0xFF && s_screen_read_buffer[2] == 0xFF&& s_screen_read_buffer[3] == 0xFF&&s_screen_read_buffer[4] == 0xFF) + { + app_tp_screen_reset(); + // ap_tp_system_softReset(); + delayMs(10); + // ap_tp_system_softReset(); + TAU_LOGD("TP system reset ff 0\n"); + return; + } +*/ + while(!hal_gpio_get_input_data(g_screen_input_int_pad)) + { + app_tp_m_read(screen_reg_int_data[0].buffer, 1, s_screen_read_buffer, 8); + while(!hal_i2c_m_transfer_complate()); + delayUs(100); + if(s_screen_read_buffer[7]>0) + { + len=s_screen_read_buffer[7]*8; + app_tp_m_read(screen_reg_int_data[0].buffer, 1, &s_screen_read_buffer[8], len); + while(!hal_i2c_m_transfer_complate()); + delayUs(100); + } + + if(s_screen_read_buffer[0] == 0xF3 ) // յ TP 쳣ظ 0xF3 0x02 0x00 0x00 0x00 0x00 0x00 0x00 + { + // ap_tp_system_softReset(); + // app_tp_screen_reset(); + delayMs(10); + TAU_LOGD("TP system reset 1\n"); + return; + } + } + + // TP 쳣¼ + /* if(s_screen_read_buffer[0] == 0xF3 && s_screen_read_buffer[1] == 0x02 && s_screen_read_buffer[2] == 0x00) // յ TP 쳣ظ 0xF3 0x02 0x00 0x00 0x00 0x00 0x00 0x00 + { + // ap_tp_system_softReset(); + app_tp_screen_reset(); + TAU_LOGD("TP system reset 2\n"); + return; + } + else + { + // printf("%2x,%2d,%2d\n",s_screen_read_buffer[0],screen_reg_int_data[2].rxbuffer_size,screen_int_transfer_count); + } + */ + screen_int_transfer_buffer_ready = true; + screen_int_transfer_count = app_tp_screen_analysis_int(screen_int_transfer_count, s_screen_read_buffer,screen_reg_int_data[2].rxbuffer_size); + screen_int_transfer_count = 0; + s_screen_int_transfer_status = false; + } +} + + + +/************************************************************************** +* @name : app_tp_transfer_phone +* @brief : ݽӦĴ +* @param[in] : recieve_numݳ +* @return : +* @retval : +**************************************************************************/ +static void app_tp_transfer_phone(size_t recieve_num) +{ + const uint8_t *phone_write_buffer; + size_t phone_write_buffer_size = 0; + /* ݽжǷҪԼ𸴵bufferָ */ + if (recieve_num > 0) + { + #if 0// 1: test + s_phone_read_buffer[3]=recieve_num; + app_tp_m_write(s_phone_read_buffer, 4); + #endif + app_tp_phone_analysis_data(s_phone_read_buffer, recieve_num, &phone_write_buffer, &phone_write_buffer_size); + } + + app_tp_s_read(s_phone_read_buffer, BUFFER_SIZE_MAX); + if (phone_write_buffer_size) //0ʾҪֻ÷buffer + { + app_tp_s_write(phone_write_buffer, phone_write_buffer_size); + } +} + +/************************************************************************** +* @name : app_tp_phone_reset_on +* @brief : ȡֻλźŵ״̬ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +bool app_tp_phone_reset_on(void) +{ + return s_phone_reset_flag; +} + +/************************************************************************** +* @name : app_tp_phone_clear_reset_on +* @brief : ֻλźŵ״̬ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +void app_tp_phone_clear_reset_on(void) +{ + s_phone_reset_flag = false; +} + +#else + +void app_tp_screen_init(void) +{ + +} + +void app_tp_init(void) +{ + +} + +void app_tp_transfer_screen_int(void) +{ + +} + +void app_tp_transfer_screen_start(void) +{ + +} + +bool app_tp_phone_reset_on(void) +{ + return false; +} + +void app_tp_phone_clear_reset_on(void) +{ + +} + +void app_tp_s_write(const uint8_t *txbuffer, size_t buffer_size) +{ + +} + +bool app_tp_enter_sleep_on(void) +{ + return false; +} + +#endif + diff --git a/src/app/demo/app_tp_transfer.h b/src/app/demo/app_tp_transfer.h new file mode 100644 index 0000000..67adb03 --- /dev/null +++ b/src/app/demo/app_tp_transfer.h @@ -0,0 +1,125 @@ +/******************************************************************************* +* +* +* File: app_tp_transfer.h +* Description touch I2C/SPI ͨغ +* Version V0.1 +* Date 2021-10-14 +* Author zhanghz +*******************************************************************************/ +#ifndef __APP_TP_TRANSFER_H__ +#define __APP_TP_TRANSFER_H__ + +#include "string.h" +#include "tau_device_datatype.h" +#include "tau_common.h" + +#define SCREEN_TRANSFER_WRITE false //յscreen ioжϣ֮ö +#define SCREEN_TRANSFER_READ true //յscreen ioжϣ֮Ҫ + +extern bool s_screen_init_complate; + +#if 0 +#define ST_TP_SCAN_POINT_NUMBER_MAX 6 + +typedef struct +{ + uint8_t tp_point_buffer[ST_TP_SCAN_POINT_NUMBER_MAX]; // ���յ� TP ���㣬���ڼ�¼������Ϣ + uint8_t tp_read_point_counter; // ͳ�Ʊ�����ֵ + uint8_t tp_point_up_error_flag; // �����ͷ��쳣��־ + uint32_t tp_point_error_time_counter; // ������ʱ�� +} st_tp_scan_data; + +#endif +/************************************************************************** +* @name : ap_tp_calibration +* @brief : ����У׼���� +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +void ap_tp_calibration(void); + +/************************************************************************** +* @name : app_tp_screen_init +* @brief : screen IO 䣬ʼʼ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +void app_tp_screen_init(void); + +/************************************************************************** +* @name : app_tp_init +* @brief : ʼͨ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +void app_tp_init(void); + +/************************************************************************** +* @name : app_tp_transfer_screen_int +* @brief : screenжϺ󣬰flowдscreenЭת +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +void app_tp_transfer_screen_int(void); + +/************************************************************************** +* @name : app_tp_transfer_screen_start +* @brief : flowдscreenʼʼ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +void app_tp_transfer_screen_start(void); + +/************************************************************************** +* @name : app_tp_phone_reset_on +* @brief : ȡֻλźŵ״̬ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +bool app_tp_phone_reset_on(void); + +/************************************************************************** +* @name : app_tp_phone_clear_reset_on +* @brief : ֻλźŵ״̬ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +void app_tp_phone_clear_reset_on(void); + +/************************************************************************** +* @name : app_tp_s_write +* @brief : ͨŷʽ÷txbufferе +* @param[in] :txbuffer: buffer ͷַ +* @param[in] :buffer_size: buffer +* @return : +* @retval : +**************************************************************************/ +void app_tp_s_write(const uint8_t *txbuffer, size_t buffer_size); + + +void app_tp_m_write(const uint8_t *txbuffer, size_t buffer_size); + +void app_tp_m_read(const uint8_t *cmd, size_t cmd_size, uint8_t *data_buffer, size_t data_size); + +/************************************************************************** +* @name : app_tp_enter_sleep_on +* @brief : ȡ tp ͨ״̬ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +bool app_tp_enter_sleep_on(void); + +void ap_tp_scan_point_record_event_exec(void); + + +#endif + diff --git a/src/app/demo/demo_version.txt b/src/app/demo/demo_version.txt new file mode 100644 index 0000000..6d19c2f --- /dev/null +++ b/src/app/demo/demo_version.txt @@ -0,0 +1,40 @@ + +///////////////////////////////////////////////////////////////////////////////// +// 汾˵ demo + + ʱ䣺ISPͺ++Driver IC+ͺ+ʱ䣺ISP568_S20P_NT37701AH_VSN667_20230316 + + Ҫ˵ + + ˵޸ĵķ + + ע + 1ϴGitʱֱӽ汾˵ƵGit޸Уʵͬ + 2ĿṩͻҪڸʱǰӿͻƣ + +///////////////////////////////////////////////////////////////////////////////// +///////////////////////////////////////////////////////////////////////////////// + + ISP568_S21_NT37701AH_HX628_20230403 + + 1³ ISP568_S21_NT37701AH_HX628_20230313 ϸ + + 2°汾ĴУ׼룬֧01ضУ׼ɹ״̬ + + 3ϵͳ޷⣬ץȡٷ E9 Ҫظ 0x40 0x00 0x00 0x00 0x00 + +///////////////////////////////////////////////////////////////////////////////// + + ISP568_S21_NT37701AH_HX628_20230313 + + 1³ϸ + + 2STУ׼룬ͳһʹapp_tp_st_touchļ + + 3STоƬλϵʱclk resetһ¡ָ A4 00 05 + + + +///////////////////////////////////////////////////////////////////////////////// + +//////////////////////////////////////////////////////////////////////////////// diff --git a/src/app/main.c b/src/app/main.c new file mode 100644 index 0000000..a3b4715 --- /dev/null +++ b/src/app/main.c @@ -0,0 +1,26 @@ +#include +#include +#include +#include "test_cfg_global.h" +#include "tau_log.h" +#include "hal_system.h" +#include "board.h" +#include "tau_delay.h" + + + +//test_cfg_global.h file choice what you want test or completely demo of S8 or S8+ Felix + +int main() +{ +// hal_system_init(); + board_Init(); + + while (1) + { +#if _DEMO_S8_EN + ap_demo(); +#endif + while (1); + } +} diff --git a/src/app/test_cfg_global.h b/src/app/test_cfg_global.h new file mode 100644 index 0000000..37f4546 --- /dev/null +++ b/src/app/test_cfg_global.h @@ -0,0 +1,84 @@ +/******************************************************************************* +* Copyright (C) 2019-2022, 518 Systems (R),All Rights Reserved. +* +* File: test_cfg_global.h +* Description ȫͷļ +* Version V0.1 +* Date 2021-05-01 +* Author kevin + *******************************************************************************/ + +#ifndef __TEST_GLOBAL_CONFIG_H__ +#define __TEST_GLOBAL_CONFIG_H__ +/******************************************************************************* +* 1.Included files +*******************************************************************************/ + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ + +#define _TEST_TIMER_EN 0 +#define _TEST_DSI_TX_EN 0 +#define _TEST_DSI_RX_EN 0 +#define _TEST_PWM_EN 0 +#define _TEST_SWIRE_EN 0 +#define _TEST_WDG_EN 0 +#define _TEST_GPIO_EN 0 +#define _TEST_I2C_EN 0 +#define _TEST_SPI_EN 0 + +#define _DEMO_S8_EN 1 +#define _DEMO_S8P_EN 0 +#if _TEST_TIMER_EN + #include "test_hal_timer.h" +#endif + +#if _TEST_I2C_EN + #include "test_hal_i2c.h" +#endif + +#if _TEST_SPI_EN + #include "test_hal_spi.h" +#endif + +#if _TEST_DSI_TX_EN + #include "test_hal_dsi_tx.h" +#endif + +#if _TEST_DSI_RX_EN + #include "test_hal_dsi_rx.h" +#endif + +#if _TEST_PWM_EN + #include "test_hal_pwm.h" +#endif + +#if _TEST_SWIRE_EN + #include "test_hal_swire.h" +#endif + +#if _TEST_WDG_EN + #include "test_hal_wdg.h" +#endif + +#if _TEST_GPIO_EN + #include "test_hal_gpio.h" +#endif + +#if _TEST_I2C_TP_EN + #include "test_hal_i2c_tp.h" +#endif + +#if _DEMO_S8_EN + #include "ap_demo.h" + #include "app_tp_for_custom_s8.h" +#endif + +#if _DEMO_S8P_EN + #include "s8p_demo.h" + #include "app_tp_for_custom_s8p.h" +#endif + +#endif + diff --git a/src/board/board.c b/src/board/board.c new file mode 100644 index 0000000..aea5ad9 --- /dev/null +++ b/src/board/board.c @@ -0,0 +1,26 @@ +/******************************************************************************* +* Copyright (C) 2019-2022, ISP Systems (R),All Rights Reserved. +* +* File: board.c +* Description 板级文件 +* Version V0.1 +* Date 2020-12-07 +* Author linyw +*******************************************************************************/ +#include "board.h" +#include "hal_system.h" +#include "ArmCM0.h" + +void board_Init(void) +{ + hal_system_init(SYSTEM_CLOCK); + hal_system_enable_systick(1); +#if !EDA_MODE + hal_system_init_console(115200); +#endif +#if defined(ISP_568) || defined(ISP_368) + /* 从EFUSE读取DPHY校准值并设置 */ + hal_system_set_phy_calibration(true); +#endif +} + diff --git a/src/board/board.h b/src/board/board.h new file mode 100644 index 0000000..f0d36e2 --- /dev/null +++ b/src/board/board.h @@ -0,0 +1,16 @@ +/******************************************************************************* +* Copyright (C) 2019-2022, 518/568 Systems (R),All Rights Reserved. +* +* File: board.h +* Description: baord 初始化头文件 +* Version: V0.1 +* Date: 2020-01-08 +* Author: lzy + *******************************************************************************/ + +#ifndef __BOARD_H__ +#define __BOARD_H__ + +void board_Init(void); + +#endif diff --git a/src/board/startup/startup_ARMCM0.s b/src/board/startup/startup_ARMCM0.s new file mode 100644 index 0000000..4a17757 --- /dev/null +++ b/src/board/startup/startup_ARMCM0.s @@ -0,0 +1,226 @@ +;/**************************************************************************//** +; * @file startup_ARMCM0.s +; * @brief CMSIS Core Device Startup File for +; * ARMCM0 Device +; * @version V5.4.0 +; * @date 12. December 2018 +; ******************************************************************************/ +;/* +; * Copyright (c) 2009-2018 Arm Limited. All rights reserved. +; * +; * SPDX-License-Identifier: Apache-2.0 +; * +; * Licensed under the Apache License, Version 2.0 (the License); you may +; * not use this file except in compliance with the License. +; * You may obtain a copy of the License at +; * +; * www.apache.org/licenses/LICENSE-2.0 +; * +; * Unless required by applicable law or agreed to in writing, software +; * distributed under the License is distributed on an AS IS BASIS, WITHOUT +; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +; * See the License for the specific language governing permissions and +; * limitations under the License. +; */ + +;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------ + + +; Stack Configuration +; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + +Stack_Size EQU 0x00001000 + + AREA STACK, NOINIT, READWRITE, ALIGN=3 +__stack_limit +Stack_Mem SPACE Stack_Size +__initial_sp + + +; Heap Configuration +; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + +Heap_Size EQU 0x00000C00 + + IF Heap_Size != 0 ; Heap is provided + AREA HEAP, NOINIT, READWRITE, ALIGN=3 +__heap_base +Heap_Mem SPACE Heap_Size +__heap_limit + ENDIF + + + PRESERVE8 + THUMB + + +; Vector Table Mapped to Address 0 at Reset + + AREA RESET, DATA, READONLY + EXPORT __Vectors + EXPORT __Vectors_End + EXPORT __Vectors_Size + +__Vectors DCD __initial_sp ; Top of Stack + DCD Reset_Handler ; Reset Handler + DCD NMI_Handler ; -14 NMI Handler + DCD HardFault_Handler ; -13 Hard Fault Handler + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD SVC_Handler ; -5 SVCall Handler + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD PendSV_Handler ; -2 PendSV Handler + DCD SysTick_Handler ; -1 SysTick Handler + + + ; Interrupts + DCD VIDC_IRQn_Handler ; 0 Interrupt 0 + DCD LCDC_IRQn_Handler ; 1 Interrupt 1 + DCD MIPI_RX_IRQn_Handler ; 2 Interrupt 2 + DCD MIPI_TX_IRQn_Handler ; 3 Interrupt 3 + DCD MEMC_IRQn_Handler ; 4 Interrupt 4 + DCD VPRE_IRQn_Handler ; 5 Interrupt 5 + DCD FLSCTRL_IRQn_Handler ; 6 Interrupt 6 + DCD DMA_IRQn_Handler ; 7 Interrupt 7 + DCD TIMER0_IRQn_Handler ; 8 Interrupt 8 + DCD TIMER1_IRQn_Handler ; 9 Interrupt 9 + DCD TIMER2_IRQn_Handler ; 10 Interrupt 10 + DCD TIMER3_IRQn_Handler ; 11 Interrupt 11 + DCD WDG_IRQn_Handler ; 12 Interrupt 12 + DCD UART_IRQn_Handler ; 13 Interrupt 13 + DCD I2C0_IRQn_Handler ; 14 Interrupt 14 + DCD I2C1_IRQn_Handler ; 15 Interrupt 15 + DCD SPIS_IRQn_Handler ; 16 Interrupt 16 + DCD SPIM_IRQn_Handler ; 17 Interrupt 17 + DCD ADC_IRQn_Handler ; 18 Interrupt 18 + DCD PWMDET_IRQn_Handler ; 19 Interrupt 19 + DCD OTP_IRQn_Handler ; 20 Interrupt 20 + DCD SWIRE_IRQn_Handler ; 21 Interrupt 21 + DCD PVD_IRQn_Handler ; 22 Interrupt 22 + DCD AP_NRESET_IRQn_Handler ; 23 Interrupt 23 + DCD EXTI_INT0_IRQn_Handler ; 24 Interrupt 24 + DCD EXTI_INT1_IRQn_Handler ; 25 Interrupt 25 + DCD EXTI_INT2_IRQn_Handler ; 26 Interrupt 26 + DCD EXTI_INT3_IRQn_Handler ; 27 Interrupt 27 + DCD EXTI_INT4_IRQn_Handler ; 28 Interrupt 28 + DCD EXTI_INT5_IRQn_Handler ; 29 Interrupt 29 + DCD EXTI_INT6_IRQn_Handler ; 30 Interrupt 30 + DCD EXTI_INT7_IRQn_Handler ; 31 Interrupt 31 + + SPACE ( 0 * 4) ; Interrupts 10 .. 31 are left out + +__Vectors_End +__Vectors_Size EQU __Vectors_End - __Vectors +_NVIC_ICER0 EQU 0xE000E180 ;清中断使能寄存器地址 +_NVIC_ICPR0 EQU 0xE000E280 ;清中断pending寄存器地址 + + AREA |.text|, CODE, READONLY + +; Reset Handler + +Reset_Handler PROC + EXPORT Reset_Handler [WEAK] + IMPORT __main + +;清中断使能和pending ——开始—— + CPSID I ; 屏蔽中断 + LDR R0, =_NVIC_ICER0 + LDR R1, =_NVIC_ICPR0 + LDR R2, =0xFFFFFFFF + MOVS R3, #1 ; 设置循环次数 M0只有1组(32个)中断，故只需要循环1次 +_irq_clear + ;CBZ R3, _irq_clear_end + CMP R3,#0 ; 循环次数等于0，跳转到_irq_clear_end + BEQ _irq_clear_end + STR R2, [R0] ;,#4 ; NVIC_ICER0 - 清 enable IRQ 寄存器 + STR R2, [R1] ;,#4 ; NVIC_ICPR0 - 清 pending IRQ 寄存器 + SUBS R3, #1 ; 循环数自减1 + B _irq_clear +_irq_clear_end +;清中断使能和pending ——结束—— + CPSIE I ; 开启中断 + LDR R0, =__main + BX R0 + ENDP + + +; Macro to define default exception/interrupt handlers. +; Default handler are weak symbols with an endless loop. +; They can be overwritten by real handlers. + MACRO + Set_Default_Handler $Handler_Name +$Handler_Name PROC + EXPORT $Handler_Name [WEAK] + B . + ENDP + MEND + + +; Default exception/interrupt handler + + Set_Default_Handler NMI_Handler + Set_Default_Handler HardFault_Handler + Set_Default_Handler SVC_Handler + Set_Default_Handler PendSV_Handler + Set_Default_Handler SysTick_Handler + + Set_Default_Handler VIDC_IRQn_Handler + Set_Default_Handler LCDC_IRQn_Handler + Set_Default_Handler MIPI_RX_IRQn_Handler + Set_Default_Handler MIPI_TX_IRQn_Handler + Set_Default_Handler MEMC_IRQn_Handler + Set_Default_Handler VPRE_IRQn_Handler + Set_Default_Handler FLSCTRL_IRQn_Handler + Set_Default_Handler DMA_IRQn_Handler + Set_Default_Handler TIMER0_IRQn_Handler + Set_Default_Handler TIMER1_IRQn_Handler + + Set_Default_Handler TIMER2_IRQn_Handler + Set_Default_Handler TIMER3_IRQn_Handler + Set_Default_Handler WDG_IRQn_Handler + Set_Default_Handler UART_IRQn_Handler + Set_Default_Handler I2C0_IRQn_Handler + Set_Default_Handler I2C1_IRQn_Handler + Set_Default_Handler SPIS_IRQn_Handler + Set_Default_Handler SPIM_IRQn_Handler + Set_Default_Handler ADC_IRQn_Handler + Set_Default_Handler PWMDET_IRQn_Handler + + Set_Default_Handler OTP_IRQn_Handler + Set_Default_Handler SWIRE_IRQn_Handler + Set_Default_Handler PVD_IRQn_Handler + Set_Default_Handler AP_NRESET_IRQn_Handler + Set_Default_Handler EXTI_INT0_IRQn_Handler + Set_Default_Handler EXTI_INT1_IRQn_Handler + Set_Default_Handler EXTI_INT2_IRQn_Handler + Set_Default_Handler EXTI_INT3_IRQn_Handler + Set_Default_Handler EXTI_INT4_IRQn_Handler + Set_Default_Handler EXTI_INT5_IRQn_Handler + + Set_Default_Handler EXTI_INT6_IRQn_Handler + Set_Default_Handler EXTI_INT7_IRQn_Handler + ALIGN + + +; User setup Stack & Heap + + IF :LNOT::DEF:__MICROLIB + IMPORT __use_two_region_memory + ENDIF + + EXPORT __stack_limit + EXPORT __initial_sp + IF Heap_Size != 0 ; Heap is provided + EXPORT __heap_base + EXPORT __heap_limit + ENDIF + + END diff --git a/src/board/startup/system_ARMCM0.c b/src/board/startup/system_ARMCM0.c new file mode 100644 index 0000000..b02ec60 --- /dev/null +++ b/src/board/startup/system_ARMCM0.c @@ -0,0 +1,52 @@ +/**************************************************************************//** + * @file system_ARMCM0.c + * @brief CMSIS Device System Source File for + * ARMCM0 Device + * @version V5.3.1 + * @date 09. July 2018 + ******************************************************************************/ +/* + * Copyright (c) 2009-2018 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "ArmCM0.h" + +/*---------------------------------------------------------------------------- + System Core Clock Variable + *----------------------------------------------------------------------------*/ +uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */ + + +/*---------------------------------------------------------------------------- + System Core Clock update function + *----------------------------------------------------------------------------*/ +void SystemCoreClockUpdate(void) +{ + SystemCoreClock = SYSTEM_CLOCK; +} + +/*---------------------------------------------------------------------------- + System initialization function + *----------------------------------------------------------------------------*/ +void SystemInit(void) +{ + SystemCoreClock = SYSTEM_CLOCK; + +#if defined(__Vendor_SysTickConfig) && (0U == __Vendor_SysTickConfig) + SysTick_Config(SystemCoreClock / 1000); +#endif +} diff --git a/src/common/tau_common.h b/src/common/tau_common.h new file mode 100644 index 0000000..575a466 --- /dev/null +++ b/src/common/tau_common.h @@ -0,0 +1,216 @@ +/******************************************************************************* +* +* +* File: tau_common.h +* Description ͨضͷļ +* Version V0.1 +* Date 2020-09-07 +* Author lzy + *******************************************************************************/ + +#ifndef __TAU_COMMON_H +#define __TAU_COMMON_H + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "stdint.h" +#include "math.h" + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ +/** + * \name ͨó + * @{ + */ +//#define ENABLE 1 +//#define DISABLE 0 + +#define ON 1 +#define OFF 0 + +#define NONE 0 +#define EOS '\0' + +/* +#ifndef TRUE +#define TRUE 1 +#endif + +#ifndef FALSE +#define FALSE 0 +#endif +*/ + +#ifndef __cplusplus + #define true 1 + #define false 0 + #define bool _Bool +#endif /* ifndef __cplusplus */ + +#ifndef NULL + #define NULL ((void *)0) +#endif + +#define TAU_LITTLE_ENDIAN 1234 /**< \brief Сģʽ */ +#define TAU_BIG_ENDIAN 3412 /**< \brief ģʽ */ + +/** @} */ + +/******************************************************************************/ + +/** + * \name ú궨 + * @{ + */ + +#ifdef __cplusplus + #define __I volatile /*!< Defines 'read only' permissions */ +#else + #define __I volatile const /*!< Defines 'read only' permissions */ +#endif +#define __O volatile /*!< Defines 'write only' permissions */ +#define __IO volatile /*!< Defines 'read / write' permissions */ + +#define TAU_INLINE inline +#define TAU_STATIC_INLINE static inline +#define TAU_STATIC static +#define TAU_CONST const +#define TAU_EXTERN extern + +#define MIN(x, y) (((x) < (y)) ? (x) : (y)) +#define MAX(x, y) (((x) > (y)) ? (x) : (y)) + +/** + * \brief ṹԱƫ + * \attention ͬƽ̨ϣڳԱСڴԭ + * ͬһṹԱƫƿDzһ + * + * \par ʾ + * \code + * struct my_struct { + * int m1; + * char m2; + * }; + * int offset_m2; + * + * offset_m2 = TAU_OFFSET(struct my_struct, m2); + * \endcode + */ +#define TAU_OFFSET(structure, member) ((uint32_t)(&(((structure *)0)->member))) + +/** @} */ + +/** + * \brief ͨṹԱָȡýṹԱĽṹ + * + * \param ptr ָṹԱָ + * \param type ṹ + * \param member ṹиóԱ + * + * \par ʾ + * \code + * struct my_struct = { + * int m1; + * char m2; + * }; + * struct my_struct my_st; + * char *p_m2 = &my_st.m2; + * struct my_struct *p_st = TAU_CONTAINER_OF(p_m2, struct my_struct, m2); + * \endcode + */ +#define TAU_CONTAINER_OF(ptr, type, member) \ + ((type *)((char *)(ptr)-TAU_OFFSET(type, member))) + +/** + * \brief ṹԱĴС + * + * \code + * struct a = { + * uint32_t m1; + * uint32_t m2; + * }; + * int size_m2; + * + * size_m2 = TAU_MEMBER_SIZE(a, m2); //size_m2 = 4 + * \endcode + */ +#define TAU_MEMBER_SIZE(structure, member) (sizeof(((structure *)0)->member)) + +/** + * \brief Ԫظ + * + * \code + * int a[] = {0, 1, 2, 3}; + * int element_a = TAU_NELEMENTS(a); // element_a = 4 + * \endcode + */ +#define TAU_NELEMENTS(array) (sizeof(array) / sizeof((array)[0])) + +/** + * \brief + * + * \param x + * \param align + * + * \code + * int size = TAU_ROUND_UP(15, 4); // size = 16 + * \endcode + */ +#define TAU_ROUND_UP(x, align) (((int)(x)/(align))*(align) + (((int)(x)%(align)) ? (align) : 0)) + +/** + * \brief + * + * \param x + * \param align + * + * \code + * int size = TAU_ROUND_DOWN(15, 4); // size = 12 + * \endcode + */ +#define TAU_ROUND_DOWN(x, align) (((int)(x)/(align))*(align)) + +/** \brief */ +#define TAU_DIV_ROUND_UP(n, d) (((n) + (d)-1) / (d)) + +/** + * \brief Ƿ + * + * \param x + * \param align أΪ2ij˷ + * + * \code + * if (TAU_ALIGNED(x, 4) { + * ; // x + * } else { + * ; // x + * } + * \endcode + */ +#define TAU_ALIGNED(x, align) (((int)(x) & (align - 1)) == 0) + +/** \brief 1ֽBCDתΪ16 */ +#define TAU_BCD_TO_HEX(val) (((val)&0x0f) + ((val) >> 4) * 10) + +/** \brief 1ֽ16תΪBCD */ +#define TAU_HEX_TO_BCD(val) ((((val) / 10) << 4) + (val) % 10) + +/** + * \brief ȡ + */ +#define TAU_CEIL(val) ceil(val) + + +/*! @brief Construct the version number for drivers. */ +#define MAKE_VERSION(major, minor, bugfix) (((major) << 16) | ((minor) << 8) | (bugfix)) + + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ +/* \brief ͨûصָ붨 */ +typedef void (*fcb_type)(void *data); + +#endif /* __TAU_COMMON_H */ diff --git a/src/common/tau_delay.h b/src/common/tau_delay.h new file mode 100644 index 0000000..aa3a2bf --- /dev/null +++ b/src/common/tau_delay.h @@ -0,0 +1,34 @@ +/** + * File Name: tau_delay.h + * + * + * + * Author: Fortsense 3D Firmware Team + * + * Date: 2020/12/04 + * + * Project: Taurus + * + * Description: + * + * HISTORY: +**/ +#ifndef _DELAY_H_ +#define _DELAY_H_ +#include "stdint.h" + +/** +* @brief delay ms ,2% +* @param ms:delayʱ +* @retval none +*/ +void delayMs(uint32_t ms); + +/** +* @brief delay us ,2% +* @param us:delayʱ +* @retval none +*/ +void delayUs(uint32_t us); + +#endif diff --git a/src/common/tau_device_datatype.h b/src/common/tau_device_datatype.h new file mode 100644 index 0000000..c121f0c --- /dev/null +++ b/src/common/tau_device_datatype.h @@ -0,0 +1,167 @@ +/******************************************************************************* + * + * + * File: tau_device_datatype.h + * Description device datatype + * Version V0.1 + * Date 2020-12-04 + * Author kevin + *******************************************************************************/ + +#ifndef _TAU_DEVICE_DATATYPE_H_ +#define _TAU_DEVICE_DATATYPE_H_ + + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ + +#include "stdint.h" +#include "tau_common.h" + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ +/*! @brief ״̬ */ +#define MAKE_STATUS(group, code) ((((group)*100) + (code))) + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ +/*! @brief ״ֵ̬ */ +enum _status_groups +{ + STATUS_GROUP_GENERIC = 0, + STATUS_GROUP_I2C = 1, + STATUS_GROUP_UART = 2, + STATUS_GROUP_SPI = 3, + kStatusGroup_Timer = 4, +}; + +/*! @brief ״̬ */ +enum _generic_status +{ + STATUS_SUCCESS = MAKE_STATUS(STATUS_GROUP_GENERIC, 0), + STATUS_FAIL = MAKE_STATUS(STATUS_GROUP_GENERIC, 1), + STATUS_READ_ONLY = MAKE_STATUS(STATUS_GROUP_GENERIC, 2), + STATUS_OUT_OF_RANGE = MAKE_STATUS(STATUS_GROUP_GENERIC, 3), + STATUS_INVALID_ARGUMENT = MAKE_STATUS(STATUS_GROUP_GENERIC, 4), + STATUS_TIME_OUT = MAKE_STATUS(STATUS_GROUP_GENERIC, 5), + STATUS_NO_TRANSFER_IN_PROGRESS = MAKE_STATUS(STATUS_GROUP_GENERIC, 6), +}; + +/*! + * @brief timer״̬ + */ +typedef enum +{ + TIMER_STATUS_IDLE = MAKE_STATUS(kStatusGroup_Timer, 0), /*!< */ + TIMER_STATUS_RUNNING = MAKE_STATUS(kStatusGroup_Timer, 1), /*!< */ + TIMER_STATUS_TIMEOUT = MAKE_STATUS(kStatusGroup_Timer, 2), /*!< ʱ */ +} timer_status_e; + +/*! + * @brief system¼(ж/λ)ģʽ + */ +typedef enum +{ + DETECT_HIGH_LVL = 0, + DETECT_LOW_LVL, + DETECT_RISING_EDGE, + DETECT_FALLING_EDGE +} sys_cfg_trigger_e; + +/** +* @brief GPIO interrupt type +*/ +typedef enum +{ + TIMER_NUM0 = 0, + TIMER_NUM1, + TIMER_NUM2, + TIMER_NUM3, + TIMER_NUM_MAX +} timer_num_e; + +/** +* @brief GPIO interrupt type +*/ +typedef enum +{ + GPIO_INT_EXTI_INT0 = 0, + GPIO_INT_EXTI_INT1, + GPIO_INT_EXTI_INT2, + GPIO_INT_EXTI_INT3, + GPIO_INT_EXTI_INT4, + GPIO_INT_EXTI_INT5, + GPIO_INT_EXTI_INT6, + GPIO_INT_EXTI_INT7, + GPIO_INT_MAX +} gpio_int_e; + +/*! @brief PWMIж */ +typedef enum _pwm_int_type +{ + PWM_INT_HIGH_OVERFLOW = 0, + PWM_INT_LOW_OVERFLOW, + PWM_INT_TOTAL_OVERFLOW, + PWM_INT_HIGH_DONE, + PWM_INT_LOW_DONE, + PWM_INT_TOTAL_DONE, + PWM_INT_MAX +} pwm_int_type_e; + +/** +* @brief I2C chose +*/ +typedef enum +{ + I2C_SELECT_0 = 0, //slave + I2C_SELECT_1, //master +} i2c_select_e; + +/*! + * @brief ٶ + * @note + */ +typedef enum _i2c_rate +{ + I2C_RATE_STANDARD = 1, //100kHz + I2C_RATE_FAST, //400kHz + I2C_RATE_HIGH, //1MHz +} i2c_rate_e; + +/*! @brief DMA channel type */ +typedef enum +{ + DMA_CH0 = 0, /*!< SPIM */ + DMA_CH1 = 1, /*!< IIC0 */ + DMA_CH2 = 2, /*!< SPIS */ + DMA_CH3 = 3, /*!< IIC1 */ + DMA_CH4 = 4, /*!< SPI FLASH */ + DMA_CH5 = 5, /*!< UART */ +} dma_channel_e; + + +/*! @brief Type used for all status and error return values. */ + +typedef enum +{ + DISABLE = 0, + ENABLE = !DISABLE +} function_state_e; +/*!< @brief ڷ״̬ʹ */ +typedef int32_t status_t; + + + +/******************************************************************************* +* 4.Global variable extern declarations +*******************************************************************************/ + +#endif + diff --git a/src/common/tau_dsi_datatype.h b/src/common/tau_dsi_datatype.h new file mode 100644 index 0000000..f4e669a --- /dev/null +++ b/src/common/tau_dsi_datatype.h @@ -0,0 +1,348 @@ +/******************************************************************************* +* +* +* File: tau_dsi_datatype.h +* Description: mipi dsi ͨͷļ +* Version: V0.1 +* Date: 2021-01-13 +* Author: lzy + *******************************************************************************/ + +#ifndef __MIPI_DSI_COMMON_H__ +#define __MIPI_DSI_COMMON_H__ + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "tau_common.h" + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ +#define DSC_PPS_SIZE 128 + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ +/** +* @brief Data Types for Peripheral-sourced Packets,From Mipi DSI Spec +*/ +typedef enum +{ + DSI_ACK_DT_ERROR = 0x02, + DSI_ACK_DT_EOTP = 0x08, + DSI_ACK_DT_GEN_SHORT_RESPONSE_1B = 0x11, + DSI_ACK_DT_GEN_SHORT_RESPONSE_2B = 0x12, + DSI_ACK_DT_GEN_LONG_RESPONSE = 0x1A, + DSI_ACK_DT_DSC_LONG_RESPONSE = 0x1C, + DSI_ACK_DT_DSC_SHORT_RESPONSE_1B = 0x21, + DSI_ACK_DT_DSC_SHORT_RESPONSE_2B = 0x22, + DSI_ACK_DT_MAX +} dsi_ack_data_type_e; + +/** +* @brief Software handle data types +*/ +typedef enum +{ + DSI_RECV_DT_PPS = 0x0A, //Picture Parameter Set + DSI_RECV_DT_GEN_WRITE_1B = 0x13, //Generic Short WRITE, 1 parameter + DSI_RECV_DT_GEN_WRITE_2B = 0x23, //Generic Short WRITE, 2 parameters + DSI_RECV_DT_GEN_READ_0B = 0x04, //Generic READ, no parameters + DSI_RECV_DT_GEN_READ_1B = 0x14, //Generic READ, 1 parameter + DSI_RECV_DT_GEN_READ_2B = 0x24, //Generic READ, 2 parameters + DSI_RECV_DT_DCS_WRITE_0B = 0x05, //DCS Short WRITE, no parameters + DSI_RECV_DT_DCS_WRITE_1B = 0x15, //DCS Short WRITE, 1 parameter + DSI_RECV_DT_DCS_READ_0B = 0x06, //DCS READ, no parameters + DSI_RECV_DT_GEN_WRITE_LONG = 0x29, //Generic Long Write + DSI_RECV_DT_DCS_WRITE_LONG = 0x39, //DCS Long Write/write_LUT Command Packet + DSI_RECV_DT_MAX +} dsi_data_type_e; + +typedef enum +{ + DCS_ENTER_IDLE_MODE = 0x39, + DCS_ENTER_INVERT_MODE = 0x21, + DCS_ENTER_NORMAL_MODE = 0x13, + DCS_ENTER_PARTIAL_MODE = 0x12, + DCS_ENTER_SLEEP_MODE = 0x10, + DCS_EXIT_IDLE_MODE = 0x38, + DCS_EXIT_INVERT_MODE = 0x20, + DCS_EXIT_SLEEP_MODE = 0x11, + DCS_GET_3D_CONTROL = 0x3F, + DCS_GET_ADDRESS_MODE = 0x0B, + DCS_GET_BLUE_CHANNEL = 0x08, + DCS_GET_COMPRESSION_MODE = 0x03, + DCS_GET_DIAGNOSTIC_RESULT = 0x0F, + DCS_GET_DISPLAY_MODE = 0x0D, + DCS_GET_GREEN_CHANNEL = 0x07, + DCS_GET_PIXEL_FORMAT = 0x0C, + DCS_GET_POWER_MODE = 0x0A, + DCS_GET_RED_CHANNEL = 0x06, + DCS_GET_SCANLINE = 0x45, + DCS_GET_SIGNAL_MODE = 0x0E, + DCS_NOP = 0x00, + DCS_READ_DDB_CONTINUE = 0xA8, + DCS_READ_DDB_START = 0xA1, + DCS_READ_MEMORY_CONTINUE = 0x3E, + DCS_READ_MEMORY_START = 0x2E, + DCS_SET_3D_CONTROL = 0x3D, + DCS_SET_ADDRESS_MODE = 0x36, + DCS_SET_COLUMN_ADDRESS = 0x2A, + DCS_SET_DISPLAY_OFF = 0x28, + DCS_SET_DISPLAY_ON = 0x29, + DCS_SET_GAMMA_CURVE = 0x26, + DCS_SET_PAGE_ADDRESS = 0x2B, + DCS_SET_PARTIAL_COLUMNS = 0x31, + DCS_SET_PARTIAL_ROWS = 0x30, + DCS_SET_PIXEL_FORMAT = 0x3A, + DCS_SET_SCROLL_AREA = 0x33, + DCS_SET_SCROLL_START = 0x37, + DCS_SET_TEAR_OFF = 0x34, + DCS_SET_TEAR_ON = 0x35, + DCS_SET_TEAR_SCANLINE = 0x44, + DCS_SET_VSYNC_TIMING = 0x40, + DCS_SOFT_RESET = 0x01, + DCS_WRITE_LUT = 0x2D, + DCS_WRITE_MEMORY_CONTINUE = 0x3C, + DCS_WRITE_MEMORY_START = 0x2C +} dsi_dcs_cmd_type_e; + +/** +* @brief video data transfer mode +*/ +typedef enum +{ + DSI_DATA_VIDEO_MODE = 0, + DSI_DATA_CMD_MODE = 1, + DSI_DATA_MODE_MAX +} dsi_video_data_mode_e; + +/** +* @brief dsi virtual channel +*/ +typedef enum +{ + DSI_VC_0 = 0, + DSI_VC_1 = 1, + DSI_VC_2 = 2, + DSI_VC_3 = 3, + DSI_VC_MAX +} dsi_virtual_channel_e; + +/** +* @brief video data mode +*/ +typedef enum +{ + DSI_FRAME_RATE_60HZ = 0, + DSI_FRAME_RATE_90HZ = 1, + DSI_FRAME_RATE_120HZ = 2, + DSI_FRAME_RATE_144HZ = 3, + DSI_FRAME_RATE_160HZ = 4, + DSI_FRAME_RATE_MAX +} dsi_video_frame_rate_e; + +/** +* @brief dsi rx color coding +*/ +typedef enum +{ + DSI_RGB565 = 1, + DSI_RGB666 = 2, /*!< 18 bbp(18bits per pixel) */ + DSI_RGB666_LOOSELY = 3, /*!< 24 bbp(24bits per pixel) */ + DSI_RGB888 = 4, /*!< 24 bbp(24bits per pixel) */ + DSI_RGB10_10_10 = 5, + DSI_RGB12_12_12 = 6, + DSI_YCbCr422_16 = 7, + DSI_PENTILE_16 = DSI_YCbCr422_16, + DSI_YCbCr422_20_LOOSELY = 8, + DSI_YCbCr422_24 = 9, + DSI_YCbCr420_12 = 10, + DSI_COLOR_CODE_MAX +} dsi_color_code_e; + +/** +* @brief dpi endianness type +*/ +typedef enum +{ + DPI_ENDIAN_RGB = 0, + DPI_ENDIAN_BGR +} dpi_endianness_type_e; + +/** +* @brief dpi polarity type +*/ +typedef enum +{ + DPI_SIG_ACTIVE_HIGH = 0, + DPI_SIG_ACTIVE_LOW = 1 +} dpi_polarity_e; + +/** +* @brief mipi lane number +*/ +typedef enum +{ + DSI_LANE_1 = 1, + DSI_LANE_2 = 2, + DSI_LANE_3 = 3, + DSI_LANE_4 = 4, + DSI_LANE_NUME_MAX +} dsi_lane_nume_e; + +/** +* @brief video mode +*/ +typedef enum +{ + DSI_NONBURST_PULSE = 0, + DSI_NONBURST_EVENT = 1, + DSI_BURST_MODE = 2, + DSI_VIDEO_MODE_MAX +} dsi_video_mode_type_e; + +/** +* @brief panel init cmd transfer type +*/ +typedef enum +{ + DSI_CMD_TX_HS = 0, + DSI_CMD_TX_LP = 1 +} dsi_tx_cmd_tx_type_e; + +/** +* @brief dpi tx vpg style +*/ +typedef enum +{ + TX_VPG_V_COLOR = 0, + TX_VPG_H_COLOR = 1, + TX_VPG_V_BER = 2, + TX_VPG_MAX +} dsi_tx_vpg_style_e; + +#if defined(ISP_568) || defined(ISP_368) +/** +* @brief angle of rotation +*/ +typedef enum +{ + VIDOE_ROT_ANGLE_0 = 0, /* ת */ + VIDOE_ROT_ANGLE_90 = 1, /* ת90 */ + VIDOE_ROT_ANGLE_180 = 2, /* ת180 */ + VIDOE_ROT_ANGLE_270 = 3, /* תת270 */ + VIDOE_ROT_ANGLE_MAX +} video_rotate_angle_e; + +/** +* @brief mipi rx lane swap +*/ +typedef enum +{ + RX_LANE_ORDER_DEFAULT = 0x0, + RX_LANE_ORDER_3012 = RX_LANE_ORDER_DEFAULT, + RX_LANE_ORDER_3210 = 0x1, + RX_LANE_ORDER_MAX +} dsi_rx_lane_swap_e; + +/** +* @brief transform Ϣ +*/ +typedef struct +{ + bool ltpo; /* ltpo ־λ */ + bool mirror_en; /* video ˮƽ־λ */ + video_rotate_angle_e rot_angle; /* video תĽǶ */ + dsi_video_data_mode_e dst_mode; /* mipi tx video ݴģʽ(video/cmd mode) */ + dsi_rx_lane_swap_e rx_lane_swap; /* rx lane swap */ +} dsi_base_extra_info_t; +#endif + +/** +* @brief mipi P/N lane swap flag +* eg: pn_swap = RX_LANE_0_PN_SWAP | RX_LANE_CLK_PN_SWAP; +* ʾ lane0 CLK PNlane +*/ +typedef enum +{ + RX_LANE_0_PN_SWAP = 0x1, + RX_LANE_1_PN_SWAP = 0x2, + RX_LANE_2_PN_SWAP = 0x4, + RX_LANE_3_PN_SWAP = 0x8, + RX_LANE_CLK_PN_SWAP = 0x10 +} dsi_rx_lane_pn_swap_e; + +/** +* @brief error processing level +*/ +typedef enum +{ + ERR_HANDLE_NONE = 0, + ERR_HANDLE_L1 = 1, + ERR_HANDLE_L2 = 2, + ERR_HANDLE_L3 = 3, + ERR_HANDLE_MAX +} hal_err_handle_level_e; + +/** +* @brief transform Ϣ +*/ +typedef struct +{ + uint32_t src_w; /* mipi rx յ width */ + uint32_t src_h; /* mipi rx յ height */ + uint32_t dst_w; /* mipi tx ͵ width */ + uint32_t dst_h; /* mipi tx ͵ height */ + dsi_video_frame_rate_e src_frate; /* mipi rx յframe rate */ + dsi_video_data_mode_e src_mode; /* mipi rx video ݴģʽ(video/cmd mode) */ + uint16_t pn_swap; /* mipi rx P/N swap־λ */ +#if defined(ISP_568) || defined(ISP_368) + dsi_base_extra_info_t extra_info; /* ISP_568/ISP_368 */ +#endif +} dsi_base_trans_info_t; + +/** +* @brief ccmϵ +*/ +typedef struct +{ + uint32_t coef_c00; + uint32_t coef_c01; + uint32_t coef_c02; + uint32_t coef_c10; + uint32_t coef_c11; + uint32_t coef_c12; + uint32_t coef_c20; + uint32_t coef_c21; + uint32_t coef_c22; +} ccm_coef_t; + +/** +* @brief video mode display timing +*/ +typedef struct +{ + uint32_t vsa; + uint32_t vbp; + uint32_t vact; + uint32_t vfp; + uint32_t hsa; + uint32_t hbp; + uint32_t hact; + uint32_t hfp; +} vid_disp_timing_t; + +/** +* @brief dpi +*/ +typedef struct +{ + dpi_polarity_e vsync_active_level; //vsync + dpi_polarity_e hsync_active_level; //hsync + dpi_polarity_e dataen_active_level; //dataen + dpi_polarity_e shutdown_active_level; //shutdown + dpi_polarity_e colorm_active_level; //colorm +} dpi_polarity_t; +#endif //__MIPI_DSI_COMMON_H__ diff --git a/src/common/tau_log.h b/src/common/tau_log.h new file mode 100644 index 0000000..19f3773 --- /dev/null +++ b/src/common/tau_log.h @@ -0,0 +1,83 @@ +/******************************************************************************* +* +* +* File: tau_log.h +* Description log file +* Version V0.1 +* Date 2020-12-08 +* Author linyw +*******************************************************************************/ +#ifndef _TAU_LOG_H_ +#define _TAU_LOG_H_ + + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include +#include +#include +#include "ArmCM0.h" + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ + +#ifdef LOG_TAG + #undef LOG_TAG +#endif +#define LOG_TAG "tau_log" +#define LOG_CURREN_LEVEL kLOG_LEVEL_DBG /* ôӡȼ TODO:ÿģôӡȼ */ + +/* + * Using the following three macros for conveniently logging. + */ +#if EDA_MODE +#define TAU_LOGD(format,...) +#define TAU_LOGI(format,...) +#define TAU_LOGE(format,...) +#else +#define TAU_LOGD(format,...) \ + do { \ + if (LOG_CURREN_LEVEL <= kLOG_LEVEL_DBG) { \ + LOG_printf("[%s] (%04d) " format, LOG_TAG, __LINE__, ##__VA_ARGS__); \ + }; \ + } while (0) + + +#define TAU_LOGI(format,...) \ + do { \ + if (LOG_CURREN_LEVEL <= kLOG_LEVEL_INF) { \ + LOG_printf("[%s] (%04d) " format, LOG_TAG, __LINE__, ##__VA_ARGS__); \ + }; \ + } while (0) + +#define TAU_LOGE(format,...) \ + do { \ + if (LOG_CURREN_LEVEL <= kLOG_LEVEL_ERR) { \ + LOG_printf("error [%s] (%04d) " format, LOG_TAG, __LINE__, ##__VA_ARGS__); \ + }; \ + } while (0) +#endif + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ +typedef enum +{ + kLOG_LEVEL_DBG = 0, + kLOG_LEVEL_INF, + kLOG_LEVEL_ERR, + kLOG_LEVEL_NONE /* ӡκβ */ +} log_level_t; + +/******************************************************************************* +* 4.Global variable extern declarations +*******************************************************************************/ + +/******************************************************************************* +* 5.Global function prototypes +*******************************************************************************/ +void LOG_printf(const char *fmt, ...); + +#endif diff --git a/src/common/tau_operations.h b/src/common/tau_operations.h new file mode 100644 index 0000000..da2f90b --- /dev/null +++ b/src/common/tau_operations.h @@ -0,0 +1,229 @@ +/******************************************************************************* +* +* +* File: tau_operations.h +* Description 位操作与字节操作相关定义头文件 +* Version V0.1 +* Date 2020-09-07 +* Author lzy + *******************************************************************************/ +#ifndef __TAU_BYTEOPS_H +#define __TAU_BYTEOPS_H + +/** + * \name 通用位常数定义 + * @{ + */ + +/** \brief 长整数位数 */ +#ifndef TAU_BITS_PER_LONG + #define TAU_BITS_PER_LONG 32 +#endif + +/** \brief 字节位数 */ +#define TAU_BITS_PER_BYTE 8 + +/** @} */ + + +/******************************************************************************/ + +/** + * \name 通用位操作 + * @{ + */ + +/** \brief bit移位 + * TAU_BIT(2) is 0x4 + */ +#define TAU_BIT(bit) (1u << (bit)) + +/** \brief 值移位 + * TAU_SBF(0xFF, 8) is 0xff00 + */ +#define TAU_SBF(value, field) ((value) << (field)) + +/** \brief bit置位 + * TAU_BIT_SET(0, 8) is 0x100 + */ +#define TAU_BIT_SET(data, bit) ((data) |= TAU_BIT(bit)) + +/** \brief bit清零 + * TAU_BIT_CLR(0xFF, 2) is 0xfb + */ +#define TAU_BIT_CLR(data, bit) ((data) &= ~TAU_BIT(bit)) + +/** \brief bit置位, 根据 mask 指定的位 + * TAU_BIT_SET_MASK(0xF0F0, 0xF00) is 0xfff0 + */ +#define TAU_BIT_SET_MASK(data, mask) ((data) |= (mask)) + +/** \brief bit清零, 根据 mask 指定的位 + * TAU_BIT_CLR_MASK(0xFFFF, 0xFF00) is 0xff + */ +#define TAU_BIT_CLR_MASK(data, mask) ((data) &= ~(mask)) + +/** \brief bit翻转 + * TAU_BIT_TOGGLE(0xFFFF, 0) is 0xfffe + * TAU_BIT_TOGGLE(0x0000, 1) is 0x2 + */ +#define TAU_BIT_TOGGLE(data, bit) ((data) ^= TAU_BIT(bit)) + +/** \brief bit修改 + * TAU_BIT_MODIFY(0, 8, 1) is 0x100 + * TAU_BIT_MODIFY(0xFFFF, 1, 0) is 0xfffd + */ +#define TAU_BIT_MODIFY(data, bit, value) \ + ((value) ? TAU_BIT_SET(data, bit) : TAU_BIT_CLR(data, bit)) + +/** \brief 测试bit是否置位 + * TAU_BIT_ISSET(0xF0F1, 1) is 0 + * TAU_BIT_ISSET(0xF0F2, 1) is 2 + */ +#define TAU_BIT_ISSET(data, bit) ((data) & TAU_BIT(bit)) + +/** \brief 获取bit值 + * TAU_BIT_GET(0xF0F1, 1) is 0 + * TAU_BIT_GET(0xF0F2, 1) is 1 + */ +#define TAU_BIT_GET(data, bit) (TAU_BIT_ISSET(data, bit) ? 1 : 0) + +/** \brief 检测bit值 + * TAU_BIT_CHECK(0xF5FF, 4) is 1 + */ +#define TAU_BIT_CHECK(data, bit) \ + (((data) & TAU_BIT(bit)) ? 1 : 0) + +/** \brief 获取 n bits 掩码值 + * TAU_BITS_MASK(2) is 0x3 + */ +#define TAU_BITS_MASK(n) (~((~0u) << (n))) + +/** \brief 获取位段值 + * TAU_BITS_GET(0xF5FF, 0x0F00, 8) is 0x5 + */ +#define TAU_BITS_GET(data, mask, pos) \ + (((data) & (mask)) >> (pos)) + +/** \brief 获取位段值 + * TAU_BITS_CHECK(0xF5FF, 0x0F00) is 1 + */ +#define TAU_BITS_CHECK(data, mask) \ + (((data) & (mask)) ? 1 : 0) + +/** \brief 修改位段值 + * TAU_BITS_MODIFY(0xF5FF, 0x0FF0, 0x8A0) is 0xF8AF +*/ +#define TAU_BITS_MODIFY(data, clear_mask, set_mask) \ + (data) = (((data) & (~(clear_mask))) | (set_mask)) + +/** \brief 设置位段值 + * TAU_WRITE_REG32(0x05FF, 0xFFFA) is 0xFFFA +*/ +#define TAU_WRITE_REG32(data, value) ((data) = (value)) + +/** \brief 设置位段值 + * TAU_READ_REG32(0x05FF) is 0x05FF +*/ +#define TAU_READ_REG32(data) (data) + + +/** @} */ + +/******************************************************************************/ + +/** + * \brief 取2-byte整数的高位byte + * + * \par 示例 + * \code + * uint16_t a = 0x1234; + * uint16_t b; + * + * b = TAU_MSB(a); //b=0x12 + * \endcode + */ +#define TAU_MSB(x) (((x) >> 8) & 0xff) + +/** + * \brief 取2-byte整数的低位byte + * + * \par 示例 + * \code + * uint16_t a = 0x1234; + * uint16_t b; + * + * b = TAU_LSB(a); //b=0x34 + * \endcode + */ +#define TAU_LSB(x) ((x) & 0xff) + +/** + * \brief 取2-word整数的高位word + * + * \par 示例 + * \code + * uint32_t a = 0x12345678; + * uint32_t b; + * + * b = TAU_MSW(a); //b=0x1234 + * \endcode + */ +#define TAU_MSW(x) (((x) >> 16) & 0xffff) + +/** + * \brief 取2-word整数的低位word + * + * \par 示例 + * \code + * uint32_t a = 0x12345678; + * uint32_t b; + * + * b = TAU_LSW(a); //b=0x5678 + * \endcode + */ +#define TAU_LSW(x) ((x) & 0xffff) + +/** + * \brief 交换32-bit整数的高位word和低位word + * + * \par 示例 + * \code + * uint32_t a = 0x12345678; + * uint32_t b; + * + * b = TAU_WORDSWAP(a); //b=0x56781234 + * \endcode + */ +#define TAU_WORDSWAP(x) (TAU_MSW(x) | (TAU_LSW(x) << 16)) + +/** + * \brief 交换32-bit整数的字节顺序 + * + * \par 示例 + * \code + * uint32_t a = 0x12345678; + * uint32_t b; + * + * b = TAU_LONGSWAP(a); //b=0x78563412 + * \endcode + */ +#define TAU_LONGSWAP(x) ((TAU_LLSB(x) << 24) | \ + (TAU_LNLSB(x) << 16) | \ + (TAU_LNMSB(x) << 8) | \ + (TAU_LMSB(x))) + +#define TAU_LLSB(x) ((x) & 0xff) /**< \brief 取32bit整数第1个字节 */ +#define TAU_LNLSB(x) (((x) >> 8) & 0xff) /**< \brief 取32bit整数第2个字节 */ +#define TAU_LNMSB(x) (((x) >> 16) & 0xff) /**< \brief 取32bit整数第3个字节 */ +#define TAU_LMSB(x) (((x) >> 24) & 0xff) /**< \brief 取32bit整数第4个字节 */ +#define TAU_LNSB(x,n) (((x) >> ((n) * 8) ) & 0xff) /**< \brief 取32bit整数第n个字节 ,参数 0 - 3*/ + +/** + * @} + */ + +#endif /* __TAU_BYTEOPS_H */ + +/* end of file */ + diff --git a/src/common/tau_queue.h b/src/common/tau_queue.h new file mode 100644 index 0000000..cca9b4a --- /dev/null +++ b/src/common/tau_queue.h @@ -0,0 +1,54 @@ +/******************************************************************************* +* +* +* File: tau_queue.h +* Description tau в +* Version V0.1 +* Date 2021-02-25 +* Author lzy + *******************************************************************************/ +#ifndef _TAU_QUEUE_H +#define _TAU_QUEUE_H + +#include +#include + +typedef struct node_t +{ + void *data; + struct node_t *next; +} node_t; + +typedef node_t node; + +typedef struct +{ + node *next; + node *tail; + int count; + int max_size; +} tau_queue_t; + +//node +node *tau_new_node(void *data); +//ͷnode +void tau_free_node(node *qn); +// +tau_queue_t *tau_new_queue(int max_size); +//ͷŶ +void tau_free_queue(tau_queue_t *q); +// 0 Ϊʧܣ1Ϊɹ +int tau_queue_push(tau_queue_t *q, void *data); +// +void *tau_queue_pop(tau_queue_t *q); +//ȡsize +int tau_queue_size(tau_queue_t *q); +//ǷΪ +int tau_queue_empty(tau_queue_t *q); +//Ƿ +int tau_queue_full(tau_queue_t *q); + + + +#endif + diff --git a/src/sdk/include/M0/ArmCM0.h b/src/sdk/include/M0/ArmCM0.h new file mode 100644 index 0000000..b1614d7 --- /dev/null +++ b/src/sdk/include/M0/ArmCM0.h @@ -0,0 +1,211 @@ +/**************************************************************************//** + * @file ARMCM0.h + * @brief CMSIS Core Peripheral Access Layer Header File for + * ARMCM0 Device + * @version V5.3.1 + * @date 09. July 2018 + ******************************************************************************/ +/* + * Copyright (c) 2009-2018 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef ARMCM0_H +#define ARMCM0_H + +#ifdef __cplusplus +extern "C" { +#endif + + +/* ------------------------- Interrupt Number Definition ------------------------ */ + +typedef enum IRQn +{ + /* ------------------- Processor Exceptions Numbers ----------------------------- */ + NonMaskableInt_IRQn = -14, /* 2 Non Maskable Interrupt */ + HardFault_IRQn = -13, /* 3 HardFault Interrupt */ + SVCall_IRQn = -5, /* 11 SV Call Interrupt */ + PendSV_IRQn = -2, /* 14 Pend SV Interrupt */ + SysTick_IRQn = -1, /* 15 System Tick Interrupt */ + + /* ------------------- Processor Interrupt Numbers ------------------------------ */ + VIDC_IRQn = 0, + LCDC_IRQn = 1, + MIPI_RX_IRQn = 2, + MIPI_TX_IRQn = 3, + MEMC_IRQn = 4, + VPRE_IRQn = 5, + FLSCTRL_IRQn = 6, + DMA_IRQn = 7, + TIMER0_IRQn = 8, + TIMER1_IRQn = 9, + TIMER2_IRQn = 10, + TIMER3_IRQn = 11, + WDG_IRQn = 12, + UART_IRQn = 13, + I2C0_IRQn = 14, + I2C1_IRQn = 15, + SPIS_IRQn = 16, + SPIM_IRQn = 17, + ADC_IRQn = 18, + PWMDET_IRQn = 19, + OTP_IRQn = 20, + SWIRE_IRQn = 21, + PVD_IRQn = 22, + AP_NRESET_IRQn = 23, + EXTI_INT0_IRQn = 24, + EXTI_INT1_IRQn = 25, + EXTI_INT2_IRQn = 26, + EXTI_INT3_IRQn = 27, + EXTI_INT4_IRQn = 28, + EXTI_INT5_IRQn = 29, + EXTI_INT6_IRQn = 30, + EXTI_INT7_IRQn = 31 + /* Interrupts 10 .. 31 are left out */ +} IRQn_Type; + + + + +/* ================================================================================ */ +/* ================ Processor and Core Peripheral Section ================ */ +/* ================================================================================ */ + +/* ------- Start of section using anonymous unions and disabling warnings ------- */ +#if defined (__CC_ARM) +#pragma push +#pragma anon_unions +#elif defined (__ICCARM__) +#pragma language=extended +#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) +#pragma clang diagnostic push +#pragma clang diagnostic ignored "-Wc11-extensions" +#pragma clang diagnostic ignored "-Wreserved-id-macro" +#elif defined (__GNUC__) +/* anonymous unions are enabled by default */ +#elif defined (__TMS470__) +/* anonymous unions are enabled by default */ +#elif defined (__TASKING__) +#pragma warning 586 +#elif defined (__CSMC__) +/* anonymous unions are enabled by default */ +#else +#warning Not supported compiler type +#endif + +/* -------- Configuration of Core Peripherals ----------------------------------- */ +#define __CM0_REV 0x0000U /* Core revision r0p0 */ +#define __MPU_PRESENT 0U /* no MPU present */ +#define __VTOR_PRESENT 0U /* no VTOR present */ +#define __NVIC_PRIO_BITS 2U /* Number of Bits used for Priority Levels */ //20220228 +#define __Vendor_SysTickConfig 0U /* Set to 1 if different SysTick Config is used */ + +#define __FPU_PRESENT 0U /* Set to 1 if FPU is present */ +#define __FPU_DP 0U /* single precision FPU */ +#define __ICACHE_PRESENT 0U /* Set to 1 if I-CACHE is present */ +#define __DCACHE_PRESENT 0U /* Set to 1 if D-CACHE is present */ +#define __DSP_PRESENT 0U /* no DSP extension present */ + +#define FPGA_MODE 0 +#define EDA_MODE 0 +#define EXTERN_24M 0 +#define CPU_CLK_100M 0 + +#include "core_cm0.h" /* Processor and core peripherals */ +#include "system_ARMCM0.h" /* System Header */ + +/*---------------------------------------------------------------------------- + Define clocks + *----------------------------------------------------------------------------*/ +#define XTAL (500000000UL) /* Oscillator frequency */ + +#if FPGA_MODE +#define SYSTEM_CLOCK (33300000U) +#else +/* 使用外部晶振时,系统时钟只能是100M,不使用外部晶振时,系统时钟可以是100M/80M*/ +#if EXTERN_24M +#define SYSTEM_CLOCK (100000000U) +#else +#if CPU_CLK_100M +#define SYSTEM_CLOCK (100000000U) +#else +#define SYSTEM_CLOCK (80000000U) +#endif +#endif +#endif + +/* -------- End of section using anonymous unions and disabling warnings -------- */ +#if defined (__CC_ARM) +#pragma pop +#elif defined (__ICCARM__) +/* leave anonymous unions enabled */ +#elif (defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)) +#pragma clang diagnostic pop +#elif defined (__GNUC__) +/* anonymous unions are enabled by default */ +#elif defined (__TMS470__) +/* anonymous unions are enabled by default */ +#elif defined (__TASKING__) +#pragma warning restore +#elif defined (__CSMC__) +/* anonymous unions are enabled by default */ +#else +#warning Not supported compiler type +#endif + +/* In HS mode and when the DMA is used, all variables and data structures dealing + with the DMA during the transaction process should be 4-bytes aligned */ +#define DMA_WORD_ALIGN_EN +#ifdef DMA_WORD_ALIGN_EN +#if defined (__GNUC__) /* GNU Compiler */ +#define __ALIGN_END __attribute__ ((aligned (4))) +#define __ALIGN_BEGIN +#else +#define __ALIGN_END +#if defined (__CC_ARM) /* ARM Compiler */ +#define __ALIGN_BEGIN __align(4) +#elif defined (__ICCARM__) /* IAR Compiler */ +#define __ALIGN_BEGIN +#elif defined (__TASKING__) /* TASKING Compiler */ +#define __ALIGN_BEGIN __align(4) +#endif /* __CC_ARM */ +#endif /* __GNUC__ */ +#else + +#define __ALIGN_BEGIN +#define __ALIGN_END + +#define __ALIGN_END_1 __attribute__ ((aligned (1))) +#endif /* DMA_WORD_ALIGN_EN */ + +/* __packed keyword used to decrease the data type alignment to 1-byte */ +#if defined (__CC_ARM) /* ARM Compiler */ +#define __packed __packed +#elif defined (__ICCARM__) /* IAR Compiler */ +#define __packed __packed +#elif defined ( __GNUC__ ) /* GNU Compiler */ +#define __packed __attribute__ ((__packed__)) +#define __weak __attribute__((weak)) +#elif defined (__TASKING__) /* TASKING Compiler */ +#define __packed __unaligned +#endif /* __CC_ARM */ + +#ifdef __cplusplus +} +#endif + +#endif /* ARMCM0_H */ diff --git a/src/sdk/include/hal_dsi_rx_ctrl.h b/src/sdk/include/hal_dsi_rx_ctrl.h new file mode 100644 index 0000000..54b6bd8 --- /dev/null +++ b/src/sdk/include/hal_dsi_rx_ctrl.h @@ -0,0 +1,533 @@ +/******************************************************************************* +* +* +* File: hal_dsi_rx_ctrl.h +* Description: hal mipi dsi rx path control 头文件 +* Version: V0.1 +* Date: 2021-04-06 +* Author: lzy + *******************************************************************************/ +#ifndef __HAL_DSI_RX_CTRL_H__ +#define __HAL_DSI_RX_CTRL_H__ + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "tau_dsi_datatype.h" +#include "tau_common.h" + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ +#define RX_DCS_QUEUE_MAX_SIZE 20 /* DCS存储队列长度 */ + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ +typedef struct hal_dcs_execute_entry_t hal_dcs_execute_entry_t; + +typedef struct hal_dcs_packet_t hal_dcs_packet_t; + +typedef struct hal_dsi_rx_ctrl_handle_t hal_dsi_rx_ctrl_handle_t; + +/* DCS CMD 回调函数, 注册进cus_dcs_entry_table里, 匹配对应的DCS 后回调*/ +typedef bool (*hal_dsi_rx_ctrl_dcs_execute)(hal_dsi_rx_ctrl_handle_t *rx_handle, hal_dcs_packet_t *dcs_packet); + +/* AP 读cmd 回调, 需要快速回CMD 时可注册, 为NULL 时DSC 读指令与写指令经过parse后由cus_dcs_entry_table回调 */ +typedef bool (*hal_dsi_rx_ctrl_read_entry)(uint8_t data_type, uint8_t dcs_cmd, uint8_t param); + +/* AP PPS 更新回调,参数为PPS 以及从PPS 里解析出来的picture width/height, 用于分辨率切换, 不注册该接口时内部处理PPS */ +typedef bool (*hal_dsi_rx_ctrl_pps_entry)(uint8_t *pps, uint8_t size, uint32_t pic_width, uint32_t pic_height); + +/** +* @brief hal_rx_dbg_event_e select +*/ +typedef enum hal_rx_dbg_event_e +{ + HAL_RX_DBG_FS = 0, /* Frame start */ + HAL_RX_DBG_EVENT_MAX +} hal_rx_dbg_event_e; + +/* RX debug 回调函数,用于获取frame start 等功能debug */ +typedef void (*hal_dsi_rx_ctrl_dbg_entry)(hal_rx_dbg_event_e event); + +/** +* @brief dsi rx ctrl handle struct +*/ +typedef struct hal_dsi_rx_ctrl_handle_t +{ + dsi_base_trans_info_t base_info; /* mipi video 转换基本信息 */ + dsi_color_code_e rx_color_mode; /* 输入color mode */ + dsi_lane_nume_e rx_lanes; /* mipi data lane */ + dsi_video_mode_type_e rx_nonburst_models; /* transmission packet sequences */ + dsi_virtual_channel_e rx_vc; /* virtual channel number */ + bool compress_en; /* DSC 压缩标志 */ + uint32_t rx_hsclk_rate; /* mipi 高速信号lane rate */ + uint8_t rx_dsc_pps[DSC_PPS_SIZE]; /* DSC 压缩PPS参数 */ + const hal_dcs_execute_entry_t *cus_dcs_entry_table; /* DCS处理函数列表 */ + hal_dsi_rx_ctrl_read_entry rx_dcs_read_entry; /* Host读指令数据函数,为NULL时由rx_dcs_queue注册cmd处理 */ + hal_dsi_rx_ctrl_pps_entry pps_update_entry; /* PPS Update 时回调函数,用于分辨率切换更新PPS,为NULL时内部处理 */ + bool used; /* handle使用标志位 */ + uint8_t pq_marginal; /* picture quality,参数为hal_rx_pq_marginal_type_e */ + bool direct_mode; /* video mode 直通模式,预留,仅debug使用 */ + hal_dsi_rx_ctrl_dbg_entry rx_debug_cb; /* rx debug 回调函数,目前为收到frame start之后回调，预留其他debug功能 */ + hal_err_handle_level_e err_handler_level; /* RX接收错误的时候对模块做reset等级, 等级越高reset模块越多 */ + bool draw_mode; /* 画点模式,仅debug使用 */ +} hal_dsi_rx_ctrl_handle_t; + +/** +* @brief DCS command execute entry +*/ +typedef struct hal_dcs_execute_entry_t +{ + uint32_t dcs_command; /* DCS command */ + hal_dsi_rx_ctrl_dcs_execute execute_func; /* command 对应处理函数 */ + bool immediately_func; /* 执行机制:true-在中断里立即执行,false-加入DCS队列异步执行 */ +} hal_dcs_execute_entry_t; + +/** +* @brief 存储 DCS packet 结构体 +*/ +typedef struct hal_dcs_packet_t +{ + uint32_t data_type; /* data type */ + uint32_t dcs_command; /* dcs command */ + uint32_t param_length; /* dcs param length */ + uint8_t *packet_param; /* dcs param */ + const hal_dcs_execute_entry_t *dcs_execute_entry; /* dcs packet 处理函数入口*/ +} hal_dcs_packet_t; + +/** +* @brief dcs command filter select +*/ +typedef enum +{ + HAL_RX_DCS_FILTER_0 = 0, + HAL_RX_DCS_FILTER_1 = 1, + HAL_RX_DCS_FILTER_2 = 2, + HAL_RX_DCS_FILTER_3 = 3, + HAL_RX_DCS_FILTER_4 = 4, + HAL_RX_DCS_FILTER_5 = 5, + HAL_RX_DCS_FILTER_6 = 6, + HAL_RX_DCS_FILTER_7 = 7, + HAL_RX_DCS_FILTER_MAX +} hal_rx_dcs_filter_sel_e; + +/** +* @brief pentile source color format +*/ +typedef enum +{ + PENTILE_SRC_FORMAT_RGB = 0x0, + PENTILE_SRC_FORMAT_BGR = 0x1, + PENTILE_SRC_FORMAT_RGBG_BGRG = 0x8, + PENTILE_SRC_FORMAT_GBGR_GRGB = 0x9, + PENTILE_SRC_FORMAT_BGRG_RGBG = 0xA, + PENTILE_SRC_FORMAT_GRGB_GBGR = 0xB, + PENTILE_SRC_FORMAT_RGBG_RGBG = 0xC, + PENTILE_SRC_FORMAT_GBGR_GBGR = 0xD, + PENTILE_SRC_FORMAT_BGRG_BGRG = 0xE, + PENTILE_SRC_FORMAT_GRGB_GRGB = 0xF, + PENTILE_SRC_FORMAT_MAX +} pentile_src_format_e; + +/** +* @brief pential G0 G1 swap mode +*/ +typedef enum +{ + PENTILE_G0G1 = 0, + PENTILE_G1G0 = 1 +} pentile_g_swap_e; + +/** +* @brief pential R B swap mode +*/ +typedef enum +{ + PENTILE_RGBG_BGRG = 0, + PENTILE_GGRB_RBGG = 1, + PENTILE_GGBR_BRGG = 3 +} pentile_rb_swap_e; + +/** +* @brief TE 信号产生模式 +*/ +typedef enum +{ + TE_HW_MODE = 0, /* TE由硬件产生,频率与输出帧率一致 */ + TE_USER_MODE = 1, /* 底层不产生TE, 由hal_dsi_rx_ctrl_gen_a_tear_signal 接口产生 */ + TE_SOFT_60HZ_MODE = 2, /* 底层软件产生同步60Hz TE */ + TE_SOFT_90HZ_MODE = 4, /* 底层软件产生同步90Hz TE */ + TE_SOFT_120HZ_MODE = 5, /* 底层软件产生同步120Hz TE */ + TE_HW_MAX +} te_mode_e; + +/** +* @brief pq_marginal_type select +*/ +typedef enum +{ + PQ_TYPE_0 = 0x0, + PQ_TYPE_1 = 0x1, + PQ_TYPE_2 = 0x3, + PQ_TYPE_3 = 0x2, + PQ_TYPE_4 = 0xA, + PQ_TYPE_5 = 0xE, + PQ_TYPE_6 = 0xC, + PQ_TYPE_7 = 0x1A, + PQ_TYPE_8 = 0x18, + PQ_TYPE_MAX +} hal_rx_pq_marginal_type_e; + +/** +* @brief 设置RX CLK +*/ +typedef enum +{ + RX_CLK_100M = 0, + RX_CLK_150M = 1, + RX_CLK_200M = 2, + RX_CLK_300M = 3, + RX_CLK_MAX +} hal_rx_clk_e; + + +/******************************************************************************* +* 4.Global variable extern declarations +*******************************************************************************/ + +/******************************************************************************* +* 5.Global function prototypes +*******************************************************************************/ + +/** +* @brief 创建dsi rx ctrl handle (释放时需调用hal_dsi_rx_ctrl_release_handle) +* @param none +* @retval dsi rx handle +*/ +hal_dsi_rx_ctrl_handle_t *hal_dsi_rx_ctrl_create_handle(void); + +/** +* @brief 释放dsi rx ctrl handle +* @param rx_ctrl_handle: dsi rx handle +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_release_handle(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle); + +/** +* @brief 设置rx ctrl handle 里的 PPS 参数 +* @param rx_ctrl_handle: dsi rx handle +* @param pps: pps 参数 +* @param pps_size: pps 参数长度 +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_pre_init_pps(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, uint8_t pps[], uint32_t pps_size); + +/** +* @brief 初始化dsi rx 模块 +* @param rx_ctrl_handle: dsi rx handle +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_init(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle); + +/** +* @brief dsi rx 模块去初始化 +* @param rx_ctrl_handle: dsi rx handle +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_deinit(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle); + +/** +* @brief 启动dsi rx +* @param rx_ctrl_handle: dsi rx handle +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_start(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle); + +/** +* @brief 重新配置dsi rx参数并恢复状态 (debug使用, 重新配置rx_ctrl_handle参数后调用该接口重启) +* @param rx_ctrl_handle: dsi rx handle +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_restart(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle); + +/** +* @brief 停止dsi rx +* @param rx_ctrl_handle: dsi rx handle +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_stop(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle); + +/** +* @brief 手动设置RX clk,一般RX CLK 由底层自动计算,用于特殊video mode场景出现FIFO FULL情况调试使用 +* @param rxbr_clk: rx clk, 需要大于hs_lane_rate/8 +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_set_rx_clk(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, hal_rx_clk_e rxbr_clk); + +/** +* @brief 发送 MIPI HOST的读响应 CMD +* @param rx_ctrl_handle: dsi rx handle +* @param data_type: data type +* @param vc: virtual channel +* @param cmd_count: ack command 的长度 +* @param ... : 需要发送的command(数量与cmd_count 配置一致) +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_send_ack_cmd(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, dsi_ack_data_type_e data_type, dsi_virtual_channel_e vc, uint8_t cmd_count, ...); + +/** +* @brief 使用数组方式回复短包,与hal_dsi_rx_ctrl_send_ack_cmd功能一致 +* @param rx_ctrl_handle: dsi rx handle +* @param data_size: 数组长度,固定为4 +* @param data: 回复cmd数据,数据排列有严格规定: +* data[0]:DI(data type) +* data[1]:data 0 +* data[2]:data 1 +* data[3]:内部pkt type,短包固定为0 +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_ack_short_cmd(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, uint8_t data_size, uint8_t data[]); + +/** +* @brief 使用数组方式回复长包,与hal_dsi_rx_ctrl_send_ack_cmd功能一致 +* @param rx_ctrl_handle: dsi rx handle +* @param data_size: 数组长度,为Word Count + header长度 (header固定为4) +* @param data: 回复cmd数据,数据排列有严格规定: +* data[0]:DI(data type) +* data[1]:wc 0 (Word Count 低八位) +* data[2]:wc 1 (Word Count 高八位) +* data[3]:内部pkt type,长包固定为1 +* data[N]:长包数据 +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_ack_long_cmd(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, uint8_t data_size, uint8_t data[]); + +/** +* @brief 异步处理DSC接口,执行cus_dcs_entry_table里对应DCS immediately_func为false的函数 +* @param rx_ctrl_handle: dsi rx handle +* @retval true - 正常处理1个DSC , false - 无DSC 处理 +*/ +bool hal_dsi_rx_ctrl_dsc_async_handler(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle); + +/** +* @brief 使用硬件filter丢弃不需要处理的CMD,避免MCU资源被无效CMD占用 +* @param rx_ctrl_handle: dsi rx handle +* @param filter_number: filter 编号(0-7) +* @param cmd_start: 需要丢弃command code起始位 +* @param cmd_end: 需要丢弃command code终止位 +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_set_hw_cmd_filter(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, + hal_rx_dcs_filter_sel_e filter_number, + uint32_t cmd_start, uint32_t cmd_end); + +/** +* @brief 配置输入输出同步行数,用于调整图像撕裂问题 +* @param rx_ctrl_handle: dsi rx handle +* @param line_num: 同步行号,范围1 ~ input height +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_set_cus_sync_line(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, uint32_t line_num); + +/** +* @brief 使用内置pattern代替mipi输入(用于测试) +* @param rx_ctrl_handle: dsi rx handle +* @param pg_orient: pattern 方向(0:Vertical mode ; 1:Horizontal mode) +* @param enable: 开启/关闭pattern +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_enable_test_pattern(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, uint8_t pg_orient, bool enable); + +/** +* @brief 设置TE信号特征 +* @param rx_ctrl_handle: dsi rx handle +* @param inverse_poly: tear信号极性 +* @param te_width: tear信号宽度(0-1023) +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_set_te_waveform(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, bool inverse_poly, uint32_t te_width); + +/** +* @brief 客制化scld filter配置,用于图像质量调节 +* @param rx_ctrl_handle: dsi rx handle +* @param scld_filter_h: 水平方向filter +* @param scld_filter_v: 垂直方向filter +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_set_cus_scld_filter(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, uint32_t scld_filter_h[32][2], uint32_t scld_filter_v[32][2]); + +/** +* @brief 获取AP 配置 BTA回复数据最大size +* @param rx_ctrl_handle: dsi rx handle +* @retval 返回数据大小 +*/ +uint32_t hal_dsi_rx_ctrl_get_max_ret_size(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle); + +/** +* @brief 获取AP Compression Mode Command配置,默认为0,谨慎使用 +* @param rx_ctrl_handle: dsi rx handle +* @retval AP 配置compressen_en +*/ +bool hal_dsi_rx_ctrl_get_compressen_en(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle); + +/** +* @brief 生成一个TE信号 +* @param rx_ctrl_handle: dsi rx handle +* @retval none +*/ +bool hal_dsi_rx_ctrl_gen_a_tear_signal(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle); + +/** +* @brief 输入分辨率切换接口 +* @param rx_ctrl_handle: dsi rx handle +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_toggle_resolution(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle); + +/** +* @brief 启动高性能模式,通常为debug使用 +* @param rx_ctrl_handle: dsi rx handle +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_hight_performan_mode(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle); + +/** +* @brief 配置TE信号为软件模式 +* @param rx_ctrl_handle: dsi rx handle +* @retval none +*/ +bool hal_dsi_rx_ctrl_set_sw_tear_mode(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle); + +/** +* @brief 配置TE信号为硬件模式 +* @param rx_ctrl_handle: dsi rx handle +* @retval none +*/ +bool hal_dsi_rx_ctrl_set_hw_tear_mode(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle); + +/** +* @brief 配置 pentile格式 +* @param rx_ctrl_handle: dsi rx handle +* @param src_format: pentile format +* @param g_swap: swap G0 G1 +* @param rb_swap: swap R B +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_set_pentile_format(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, pentile_src_format_e src_format, pentile_g_swap_e g_swap, pentile_rb_swap_e rb_swap); + +/** +* @brief 配置 RX escape clk +* @param rx_ctrl_handle: dsi rx handle +* @param esc_clk: escape clk 单位Hz,10000000时回CMD为10Mhz +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_set_cus_esc_clk(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, uint32_t esc_clk); + +/** +* @brief 自动计算并配置硬件filter +* @param rx_ctrl_handle: dsi rx handle +* @param enable: 启动/关闭 硬件filter +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_set_auto_hw_filter(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, bool enable); + +/* +* @brief 配置DCS cmd 透传模式, Tx init 之后生效 +* @param enable/disable +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_set_dcs_direct_mode(bool enable); + +/* +* @brief 输入帧率修改(针对video mode) +* @param rx_ctrl_handle: dsi rx handle +* @param frame_rate：frame rate +*/ +bool hal_dsi_rx_ctrl_toggle_input_frame_rate(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, dsi_video_frame_rate_e frame_rate); + +/** +* @brief 配置TE模式扩展接口 +* @param line_num: 同步行号,范围1 ~ input height +建议从最大开始配置,step为100逐步减小,直到完全不出现撕裂 +* @param te_mode: 产生 te 模式,建议使用HW mode +* @retval none +*/ +bool hal_dsi_rx_ctrl_set_tear_mode_ex(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, uint32_t line_num, te_mode_e te_mode); + +#if !defined(ISP_568) && !defined(ISP_368) + /* ISP_518/ISP_308 接口 */ + /** + * @brief 客制化 Channel Gain 配置,用于图像质量调节 + * @param rx_ctrl_handle: dsi rx handle + * @param gain_r: channel gain coefficient for R + * @param gain_g: channel gain coefficient for G + * @param gain_b: channel gain coefficient for B + * @retval true/false + */ + bool hal_dsi_rx_ctrl_set_cus_pq_gain(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, int r_gain, int g_gain, int b_gain); + + /** + * @brief 客制化enhance for luma参数配置,用于图像质量调节 + * @param rx_ctrl_handle: dsi rx handle + * @param enhl_str: Enhance Str + * @param enhl_edgeslope: Enhance Edge Slope + * @retval none + */ + bool hal_dsi_rx_ctrl_set_cus_pq_enh_lum(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, uint32_t enhl_str, uint32_t enhl_edgeslope); + + /** + * @brief 客制化false color remove for chroma参数配置,用于图像质量调节 + * @param rx_ctrl_handle: dsi rx handle + * @param desatstr: 饱和度调整参数 范围:0-4095 + * @param desatslope: 饱和度调整斜率 范围:0-4095 + * @retval none + */ + bool hal_dsi_rx_ctrl_set_cus_pq_enh_chr(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, uint32_t desatstr, uint32_t desatslope); + + /** + * @brief 客制化false color remove for chroma参数配置2,用于图像质量调节 + * @param rx_ctrl_handle: dsi rx handle + * @param desatmode: 饱和度调整模式 0-降低饱和度 1-提升饱和度 + * @param fc_final_alpha: 饱和度调整参数 范围:0 - 255 + * @param edge_med_slope: 饱和度调整参数 范围:0 - 4095 + * @retval none + */ + bool hal_dsi_rx_ctrl_set_cus_pq_enh_chr2(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, uint32_t desatmode, uint32_t fc_final_alpha, uint32_t edge_med_slope); + +#else + /* ISP_568/ISP_368 接口 */ + /** + * @brief 裁剪输入video多余部分，用于部分机型比如mipi输入是900x1792,实际有效部分为828x1792,可用于裁剪右边跟下边 + * @param rx_ctrl_handle: dsi rx handle + * @param crop_width: 需要裁剪的列数 + * @param crop_height: 需要裁剪的行数 + * @retval true/false + */ + bool hal_dsi_rx_ctrl_crop_video(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, uint32_t crop_width, uint32_t crop_height); + + /* + * @brief 初始化画点模式,全屏赋值 + * @param rx_ctrl_handle: dsi rx handle + * @param red_data: 像素点R分量 + * @param green_data: 像素点G分量 + * @param blue_data: 像素点B分量 + * @retval none + */ + void hal_dsi_rx_ctrl_draw_mode_init(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, uint8_t red_data, uint8_t green_data, uint8_t blue_data); + + /* + * @brief 配置像素颜色 + * @param rx_ctrl_handle: dsi rx handle + * @param x: 像素点的x 坐标 + * @param y: 像素点的y 坐标 + * @param red_data: 像素点R分量 + * @param green_data: 像素点G分量 + * @param blue_data: 像素点B分量 + * @retval none + */ + void hal_dsi_rx_ctrl_set_pixel_data(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, int x, int y, uint8_t red_data, uint8_t green_data, uint8_t blue_data); +#endif + +#endif //__HAL_DSI_RX_CTRL_H__ diff --git a/src/sdk/include/hal_dsi_tx_ctrl.h b/src/sdk/include/hal_dsi_tx_ctrl.h new file mode 100644 index 0000000..4483232 --- /dev/null +++ b/src/sdk/include/hal_dsi_tx_ctrl.h @@ -0,0 +1,275 @@ +/******************************************************************************* +* +* +* File: hal_dsi_tx_ctrl.h +* Description: hal mipi dsi tx 头文件 +* Version: V0.1 +* Date: 2021-04-23 +* Author: wuc + *******************************************************************************/ +#ifndef __HAL_DSI_TX_CTRL_H__ +#define __HAL_DSI_TX_CTRL_H__ + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "tau_dsi_datatype.h" +#include "tau_device_datatype.h" +#include "tau_common.h" +#include "hal_gpio.h" +#include "stdint.h" +#include "stdbool.h" + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ +/** +* @brief 客制化MIPI TX参数结构体 +*/ +typedef struct +{ + bool used; /* handle使用标志位 */ + uint8_t lane_num; + dsi_virtual_channel_e channel_id; + dsi_video_mode_type_e vid_mode; + dsi_tx_cmd_tx_type_e cmd_tx_type; /* 初始化模式传输命令方式，0:HS; 1:LP */ + uint8_t pclk_offset; /* 增加lane byte clk以增大HFP，适配LONG H的TP */ + uint32_t dpi_vsa; + uint32_t dpi_vbp; + uint32_t dpi_vfp; + uint32_t dpi_hsa; + uint32_t dpi_hbp; + uint32_t dpi_hfp; + dsi_base_trans_info_t base_info; /* mipi video 转换基本信息 */ + uint32_t tx_line_delay; /* tx 发送至屏端显示的延迟行数,由屏端决定,用于分辨率切换时确认切换时间点 */ + float tx_frame_rate; /* 默认60Hz输出,不建议配置为其他,仅作为debug使用 */ + bool tx_clkawayshs; /* 默认为false, 配置为true时video mode消隐行期间clk不进入LP */ + uint8_t blank_rows; /* 默认为0, 针对特殊屏使用，大于0时生效表示向下补黑blank_rows行 */ + uint8_t blank_columns; /* 默认为0, 针对特殊屏使用，大于0时生效表示向右补黑blank_columns列 */ + bool lp_exit_lpdt; /* 每一条LP CMD都退出LPDT */ +} hal_dsi_tx_ctrl_handle_t; + +/** +* @brief crop parameters +*/ +typedef struct +{ + uint16_t crop_top; + uint16_t crop_bottom; + uint16_t crop_left; + uint16_t crop_right; +} hal_dsi_tx_crop_t; + +/** +* @brief MIPI TX初始化 +* @param tx_ctrl_handle: MIPI TX实例 +* @retval 成功:0 失败:-1 +*/ +bool hal_dsi_tx_ctrl_init(hal_dsi_tx_ctrl_handle_t *tx_ctrl_handle); + +/** +* @brief MIPI TX反初始化 +* @param tx_ctrl_handle: MIPI TX实例 +* @retval 成功:0 失败:-1 +*/ +bool hal_dsi_tx_ctrl_deinit(hal_dsi_tx_ctrl_handle_t *tx_ctrl_handle); + +/** +* @brief MIPI TX创建实例 +* @param 无 +* @retval tx_ctrl_handle: MIPI TX实例 +*/ +hal_dsi_tx_ctrl_handle_t *hal_dsi_tx_ctrl_create_handle(void); + +/** +* @brief MIPI TX释放实例 +* @param tx_ctrl_handle: MIPI TX实例 +* @retval 成功:0 失败:-1 +*/ +bool hal_dsi_tx_ctrl_release_handle(hal_dsi_tx_ctrl_handle_t *tx_ctrl_handle); + +/** +* @brief MIPI TX开始运行 +* @param tx_ctrl_handle: MIPI TX实例 +* @retval 成功:0 失败:-1 +*/ +bool hal_dsi_tx_ctrl_start(hal_dsi_tx_ctrl_handle_t *tx_ctrl_handle); + +/** +* @brief MIPI TX停止运行 +* @param tx_ctrl_handle: MIPI TX实例 +* @retval 成功:0 失败:-1 +*/ +bool hal_dsi_tx_ctrl_stop(hal_dsi_tx_ctrl_handle_t *tx_ctrl_handle); + +/** +* @brief 进入初始化panel +* @param 无 +* @retval 无 +*/ +void hal_dsi_tx_ctrl_enter_init_panel_mode(void); + +/** +* @brief 退出初始化panel +* @param 无 +* @retval 无 +*/ +void hal_dsi_tx_ctrl_exit_init_panel_mode(void); + +/** +* @brief MIPI TX接收命令 +* @param data_type: 数据类型，参考枚举类型dsi_data_type_e +* @param vc: 虚拟通道编号，参考枚举类型dsi_virtual_channel_e +* @param cmd: DCS指令 +* @param size: 读取数据长度 +* @param data: 数据存放地址 +* @retval 无 +*/ +void hal_dsi_tx_ctrl_read_cmd(uint8_t data_type, uint8_t vc, uint8_t cmd, uint8_t size, uint8_t *data); + +/** +* @brief MIPI TX发送命令 +* @param data_type: 数据类型，参考枚举类型dsi_data_type_e +* @param vc: 虚拟通道编号，参考枚举类型dsi_virtual_channel_e +* @param cmd_count: 可变参数个数 +* @param ...: 可变参数 +* @retval 无 +*/ +void hal_dsi_tx_ctrl_write_cmd(uint8_t data_type, uint8_t vc, uint8_t cmd_count, ...); + +/** +* @brief MIPI TX发送命令 +* @param data_type: 数据类型，参考枚举类型dsi_data_type_e +* @param vc: 虚拟通道编号，参考枚举类型dsi_virtual_channel_e +* @param size: data个数 +* @param data: data数组 +* @retval 无 +*/ +void hal_dsi_tx_ctrl_write_array_cmd(uint8_t data_type, uint8_t vc, uint8_t size, const uint8_t *data); + +/** +* @brief 设置TX溢出时钟分频系统 +* @param esc_div: TX溢出时钟分频系数 +* @retval 无 +*/ +void hal_dsi_tx_ctrl_set_escape_clock_div(uint8_t esc_div); + +/** +* @brief 屏端复位脚操作 +* @param state: Reset脚拉高、拉低 +* @retval 无 +*/ +void hal_dsi_tx_ctrl_panel_reset_pin(gpio_level_e state); + +/** +* @brief 设置部分显示的区域 +* @param st_line: 起始行 +* @param st_col: 起始列 +* @param end_line: 结束行 +* @param end_col: 结束列 +* @retval 无 +*/ +void hal_dsi_tx_ctrl_set_partial_disp_area(uint32_t st_line, uint32_t st_col, uint32_t end_line, uint32_t end_col); + +/** +* @brief 部分显示功能开关 +* @param pd_en: 开关部分显示功能 +* @retval 无 +*/ +void hal_dsi_tx_ctrl_set_partial_disp(function_state_e pd_en); + +/** +* @brief 设置复写颜色 +* @param R: RGB的R分量 +* @param G: RGB的G分量 +* @param B: RGB的B分量 +* @retval 无 +*/ +void hal_dsi_tx_ctrl_set_overwrite_rgb(uint8_t R, uint8_t G, uint8_t B); + +/** +* @brief 全屏复写开关 +* @param ow_en: 开关全屏复写功能 +* @retval 无 +*/ +void hal_dsi_tx_ctrl_set_overwrite(function_state_e ow_en); + +/** +* @brief 设置RGB或BGR +* @param endianness: 选择RGB或BGR显示 +* @retval 无 +*/ +void hal_dsi_tx_ctrl_set_endianness(dpi_endianness_type_e endianness); + +/** +* @brief 设置CCM参数 +* @param coef: 客制化参数，参考结构体ccm_coef_t +* @retval 无 +*/ +void hal_dsi_tx_ctrl_set_ccm(ccm_coef_t coef); + +/** +* @brief 控制TX VPG的输出 +* @param vpg_en: 使能VPG +* @param style: VPG的样式 +* @retval 无 +*/ +void hal_dsi_tx_ctrl_set_vpg(function_state_e vpg_en, dsi_tx_vpg_style_e style); + +/** +* @brief 在video mode下使能LP CMD +* @param lp_en:使能LP CMD +* @retval 无 +*/ +void hal_dsi_tx_ctrl_set_lp_cmd(function_state_e lp_en); + +/** +* @brief 裁剪tx输出的图像 +* @param tx_ctrl_handle: dsi tx handle +* @param crop: 裁剪参数 +* @retval 无 +*/ +void hal_dsi_tx_crop_pic(hal_dsi_tx_ctrl_handle_t *tx_ctrl_handle, hal_dsi_tx_crop_t *crop); + +#if !defined(ISP_568) && !defined(ISP_368) + /* ISP_518/ISP_308 接口 */ + /** + * @brief 设置水平翻转 + * @param flip_en: 开关水平翻转功能 + * @retval 无 + */ + void hal_dsi_tx_ctrl_set_horizon_flip(function_state_e flip_en); + + /** + * @brief 设置tx 画质filter + * @param tx_ctrl_handle: dsi tx handle + * @param filter_h: 水平方向filter + * @param filter_v: 垂直方向filter + * @retval true/false + */ + bool hal_dsi_tx_ctrl_set_cus_pq_filter(hal_dsi_tx_ctrl_handle_t *tx_ctrl_handle, uint32_t filter_h[32][2], uint32_t filter_v[32][2]); + + /** + * @brief 设置tx边缘参数,只在 + * @param tx_ctrl_handle: dsi tx handle + * @param threshold: 边缘增强强度 + * @param slope: 边缘增强范围 + * @retval true/false + */ + bool hal_dsi_tx_ctrl_set_cus_pq_edge(hal_dsi_tx_ctrl_handle_t *tx_ctrl_handle, uint8_t threshold, uint16_t slope); +#else + /* ISP_568/ISP_368 接口 */ + /** + * @brief 设置tx 画质filter + * @param tx_ctrl_handle: dsi tx handle + * @param filter: tx filter + * @retval true/false + */ + bool hal_dsi_tx_ctrl_set_cus_pq_filter(hal_dsi_tx_ctrl_handle_t *tx_ctrl_handle, uint32_t filter[32]); +#endif + +#endif //__HAL_DSI_TX_CTRL_H__ diff --git a/src/sdk/include/hal_gpio.h b/src/sdk/include/hal_gpio.h new file mode 100644 index 0000000..3c8ae01 --- /dev/null +++ b/src/sdk/include/hal_gpio.h @@ -0,0 +1,537 @@ +/******************************************************************************* +* +* +* File: hal_gpio.h +* Description gpio HALͷļ +* Version V0.1 +* Date 2021-03-17 +* Author wuc + *******************************************************************************/ +#ifndef __HAL_GPIO_H__ +#define __HAL_GPIO_H__ + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "tau_device_datatype.h" +#include "tau_common.h" + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ +/** +* @brief GPIO pin +*/ +typedef enum +{ + /*GPIOPIN*/ + IO_PAD_GPIO0 = 0, + IO_PAD_GPIO1, + IO_PAD_GPIO2, + IO_PAD_GPIO3, + IO_PAD_GPIO4, + IO_PAD_GPIO5, + IO_PAD_GPIO6, + IO_PAD_RESV, + IO_PAD_GPIO8, + IO_PAD_GPIO9, + IO_PAD_GPIO10, + IO_PAD_GPIO11, + IO_PAD_GPIO12, + IO_PAD_GPIO13, + IO_PAD_GPIO14, + IO_PAD_RESV1, + IO_PAD_RESV2, + IO_PAD_GPIO17, + IO_PAD_GPIO18, + IO_PAD_GPIO19, + IO_PAD_GPIO20, + IO_PAD_GPIO21, + + /*ʵPAD NAMEPIN*/ + IO_PAD_AP_SPIS_MISO = IO_PAD_GPIO0, + IO_PAD_AP_SPIS_MOSI = IO_PAD_GPIO1, + IO_PAD_AP_INT = IO_PAD_GPIO2, + IO_PAD_AP_TE = IO_PAD_GPIO3, + IO_PAD_AP_SWIRE = IO_PAD_GPIO4, + IO_PAD_TD_SPIM_MISO = IO_PAD_GPIO5, + IO_PAD_TD_SPIM_MOSI = IO_PAD_GPIO6, + IO_PAD_TD_RSTN = IO_PAD_RESV, + IO_PAD_TD_TPRSTN = IO_PAD_GPIO8, + IO_PAD_TD_INT = IO_PAD_GPIO9, + IO_PAD_TD_LEDPWM = IO_PAD_GPIO10, + IO_PAD_TD_FC_CLK = IO_PAD_GPIO11, + IO_PAD_TD_FC_CSN = IO_PAD_GPIO12, + IO_PAD_TD_FC_MISO = IO_PAD_GPIO13, + IO_PAD_TD_FC_MOSI = IO_PAD_GPIO14, + IO_PAD_UART_RX = IO_PAD_GPIO17, + IO_PAD_UART_TX = IO_PAD_GPIO18, + IO_PAD_PWMEN = IO_PAD_GPIO19, + IO_PAD_ADCIN = IO_PAD_GPIO20, + IO_PAD_AP_TPRSTN = IO_PAD_GPIO21, + + IO_PAD_AP_SPIS_CLK, + IO_PAD_AP_SPIS_CSN, + IO_PAD_TD_SPIM_CLK, + IO_PAD_TD_SPIM_CSN, + IO_PAD_SFC_CLK, + IO_PAD_SFC_CSN, + IO_PAD_SFC_IO0, + IO_PAD_SFC_IO1, + + IO_PAD_MAX, + + /*ʵBALLPIN*/ + IO_PIN_A1 = IO_PAD_TD_TPRSTN, + IO_PIN_A2 = IO_PAD_TD_FC_CSN, + IO_PIN_A3 = IO_PAD_TD_SPIM_MISO, + IO_PIN_A4 = IO_PAD_TD_SPIM_CLK, + IO_PIN_A5 = IO_PAD_PWMEN, + IO_PIN_A6 = IO_PAD_ADCIN, + IO_PIN_A7 = IO_PAD_AP_INT, + IO_PIN_A8 = IO_PAD_AP_SPIS_MOSI, + IO_PIN_B1 = IO_PAD_TD_FC_CLK, + IO_PIN_B2 = IO_PAD_TD_FC_MISO, + IO_PIN_B3 = IO_PAD_TD_SPIM_MOSI, + IO_PIN_B4 = IO_PAD_TD_SPIM_CSN, + IO_PIN_B5 = IO_PAD_AP_SWIRE, + IO_PIN_B7 = IO_PAD_AP_SPIS_MISO, + IO_PIN_B8 = IO_PAD_AP_SPIS_CSN, + IO_PIN_C1 = IO_PAD_TD_FC_MOSI, + IO_PIN_C2 = IO_PAD_TD_LEDPWM, + IO_PIN_C4 = IO_PAD_UART_TX, + IO_PIN_C5 = IO_PAD_UART_RX, + IO_PIN_C6 = IO_PAD_AP_TE, + IO_PIN_D1 = IO_PAD_TD_RSTN, + IO_PIN_D2 = IO_PAD_TD_INT, + IO_PIN_D7 = IO_PAD_AP_TPRSTN, + IO_PIN_D8 = IO_PAD_AP_SPIS_CLK, +} io_pad_e; + +/** +* @brief PAD_AP_SPIS_CLKѡmode +*/ +typedef enum +{ + IO_MODE_JTAG_TCK = 0, + IO_MODE_SPIS_SCLK = 1, + IO_MODE_I2C0_SCL = 3, +} pad_ap_spis_clk_mode_e; + +/** +* @brief PAD_AP_SPIS_CSNѡmode +*/ +typedef enum +{ + IO_MODE_JTAG_TRSTN = 0, + IO_MODE_SPIS_CSN = 1, + IO_MODE_I2C0_SDA = 3, +} pad_ap_spis_csn_mode_e; + +/** +* @brief PAD_AP_SPIS_MISOѡmode +*/ +typedef enum +{ + IO_MODE_JTAG_TDO = 0, + IO_MODE_SPIS_MISO = 1, + IO_MODE_GPIO0 = 2, + IO_MODE_UART_RX_AP = 3, + IO_MODE_SPIM_MISO_AP = 4, +} pad_ap_spis_miso_mode_e; + +/** +* @brief PAD_AP_SPIS_MOSIѡmode +*/ +typedef enum +{ + IO_MODE_JTAG_TMS = 0, + IO_MODE_SPIS_MOSI = 1, + IO_MODE_GPIO1 = 2, + IO_MODE_UART_TX_AP = 3, + IO_MODE_SPIM_MOSI_AP = 4, +} pad_ap_spis_mosi_mode_e; + +/** +* @brief PAD_AP_TPRSTNѡmode +*/ +typedef enum +{ + IO_MODE_JTAG_TDI = 0, + IO_MODE_GPIO21 = 2, +} pad_ap_tprstn_mode_e; + +/** +* @brief PAD_AP_INTѡmode +*/ +typedef enum +{ + IO_MODE_GPIO2 = 2, +} pad_ap_int_mode_e; + +/** +* @brief PAD_AP_TEѡmode +*/ +typedef enum +{ + IO_MODE_TEAR = 0, + IO_MODE_GPIO3 = 2, +} pad_ap_te_mode_e; + +/** +* @brief PAD_AP_SWIREѡmode +*/ +typedef enum +{ + IO_MODE_SWIRE = 0, + IO_MODE_PWMO = 1, + IO_MODE_GPIO4 = 2, +} pad_ap_swire_mode_e; + +/** +* @brief PAD_TD_SPIM_CLKѡmode +*/ +typedef enum +{ + IO_MODE_SPIM_SCLK = 0, + IO_MODE_I2C1_SCL = 1, +} pad_td_spim_clk_mode_e; + +/** +* @brief PAD_TD_SPIM_CSNѡmode +*/ +typedef enum +{ + IO_MODE_SPIM_CSN = 0, + IO_MODE_I2C1_SDA = 1, +} pad_td_spim_csn_mode_e; + +/** +* @brief PAD_TD_SPIM_MISOѡmode +*/ +typedef enum +{ + IO_MODE_SPIM_MISO = 0, +#if defined(ISP_568) || defined(ISP_368) + IO_MODE_PWMO1 = 1, +#endif + IO_MODE_GPIO5 = 2, +} pad_td_spim_miso_mode_e; + +/** +* @brief PAD_TD_SPIM_MOSIѡmode +*/ +typedef enum +{ + IO_MODE_SPIM_MOSI = 0, + IO_MODE_GPIO6 = 2, +} pad_td_spim_mosi_mode_e; + +/** +* @brief PAD_TD_TPRSTNѡmode +*/ +typedef enum +{ + IO_MODE_GPIO8 = 2, +} pad_td_tprstn_mode_e; + +/** +* @brief PAD_TD_INTѡmode +*/ +typedef enum +{ + IO_MODE_GPIO9_FUNC = 0, + IO_MODE_GPIO9 = 2, +} pad_td_int_mode_e; + +/** +* @brief PAD_TD_LEDPWMѡmode +*/ +typedef enum +{ + IO_MODE_PWMI = 0, +#if defined(ISP_568) || defined(ISP_368) + IO_MODE_PWMO2 = 1, +#endif + IO_MODE_GPIO10 = 2, +} pad_td_ledpwm_mode_e; + +/** +* @brief PAD_TD_FC_CLKѡmode +*/ +typedef enum +{ + IO_MODE_TSPIS_CLK = 0, + IO_MODE_GPIO11 = 2, +} pad_td_fc_clk_mode_e; + +/** +* @brief PAD_TD_FC_CSNѡmode +*/ +typedef enum +{ + IO_MODE_TSPIS_CSN = 0, + IO_MODE_GPIO12 = 2, +} pad_td_fc_csn_mode_e; + +/** +* @brief PAD_TD_FC_MISOѡmode +*/ +typedef enum +{ + IO_MODE_TSPIS_MISO = 0, + IO_MODE_GPIO13 = 2, +} pad_td_fc_miso_mode_e; + +/** +* @brief PAD_TD_FC_MOSIѡmode +*/ +typedef enum +{ + IO_MODE_TSPIS_MOSI = 0, + IO_MODE_GPIO14 = 2, +} pad_td_fc_mosi_mode_e; + +/** +* @brief PAD_UART_RXѡmode +*/ +typedef enum +{ + IO_MODE_UART_RX = 0, + IO_MODE_GPIO17 = 2, +} pad_uart_rx_mode_e; + +/** +* @brief PAD_UART_TXѡmode +*/ +typedef enum +{ + IO_MODE_UART_TX = 0, + IO_MODE_GPIO18 = 2, +} pad_uart_tx_mode_e; + +/** +* @brief PAD_PWMENѡmode +*/ +typedef enum +{ + IO_MODE_GPIO19 = 2, +} pad_pwmen_mode_e; + +/** +* @brief PAD_ADCINѡmode +*/ +typedef enum +{ + IO_MODE_GPIO20 = 2, +} pad_adcin_mode_e; + +/** +* @brief PAD_SFC_CLKѡmode +*/ +typedef enum +{ + IO_MODE_INTER_FLS_CLK = 0, + IO_MODE_EXT_FLS_CLK = 1, +} pad_sfc_clk_mode_e; + +/** +* @brief PAD_SFC_CSNѡmode +*/ +typedef enum +{ + IO_MODE_INTER_FLS_CSN = 0, + IO_MODE_EXT_FLS_CSN = 1, +} pad_sfc_csn_mode_e; + +/** +* @brief PAD_SFC_IO0ѡmode +*/ +typedef enum +{ + IO_MODE_INTER_FLS_IO0 = 0, + IO_MODE_EXT_FLS_MISO = 1, +} pad_sfc_io0_mode_e; + +/** +* @brief PAD_SFC_IO1ѡmode +*/ +typedef enum +{ + IO_MODE_INTER_FLS_IO1 = 0, + IO_MODE_EXT_FLS_MOSI = 1, +} pad_sfc_io1_mode_e; + +/** +* @brief PADѹת +*/ +typedef enum +{ + IO_SLEW_RATE_SLOW = 0, + IO_SLEW_RATE_FAST = 1, +} pad_slew_rate_e; + +/******************************************************************************* +* IOE +*******************************************************************************/ +/** +* @brief GPIO io +*/ +typedef enum +{ + IO_IOE_INPUT = 0, + IO_IOE_OUTPUT +} gpio_ioe_direct_e; + +/** +* @brief GPIO level +*/ +typedef enum +{ + IO_LVL_LOW = 0, + IO_LVL_HIGH +} gpio_level_e; + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ + +/******************************************************************************* +* 4.Global variable extern declarations +*******************************************************************************/ + +/******************************************************************************* +* 5.Global function prototypes +*******************************************************************************/ +/** +* @brief ָPADΪGPIO modeΪinputָжϴʽ +* @param padGPIOţοögpio_pad_e +* @param trig4жϴʽοösys_cfg_trigger_e +* @retval +*/ +void hal_gpio_init_eint(io_pad_e pad, sys_cfg_trigger_e trig); + +/** +* @brief עGPIOжϻص +* @param padGPIOţοögpio_pad_e +* @param cb_funcصַ +* @param dataصַ +* @retval +*/ +void hal_gpio_reg_eint_cb(io_pad_e pad, fcb_type cb_func); + +/** +* @brief GPIOж +* @param padGPIOţοögpio_pad_e +* @param stateؿ +* @retval +*/ +void hal_gpio_ctrl_eint(io_pad_e pad, function_state_e state); + +/** +* @brief ȡGPIOж +* @param padGPIOţοögpio_pad_e +* @retval +*/ +gpio_int_e hal_gpio_get_int_type(io_pad_e pad); + +/** +* @brief ָPADΪGPIO modeΪoutputָʼƽ +* @param padGPIOţοögpio_pad_e +* @param lvlʼƽοögpio_level_e +* @retval +*/ +void hal_gpio_init_output(io_pad_e pad, gpio_level_e lvl); + +/** +* @brief װӿ +* @param padGPIOţοögpio_pad_e +* @param lvlʼƽοögpio_level_e +* @retval +*/ +void hal_gpio_set_output_data(io_pad_e pad, gpio_level_e lvl); + +/** +* @brief װӿչ֧ͬʱ֪ͨIOƽ +* @param pad1GPIOţοögpio_pad_e +* @param pad1_lvlõƽοögpio_level_e +* @param pad2GPIOţοögpio_pad_e +* @param pad2_lvlõƽοögpio_level_e +* @retval +*/ +void hal_gpio_set_output_data_ex(io_pad_e pad1, gpio_level_e pad1_lvl, io_pad_e pad2, gpio_level_e pad2_lvl); + +/** +* @brief ָPADΪGPIO modeΪinput +* @param padGPIOţοögpio_pad_e +* @retval +*/ +void hal_gpio_init_input(io_pad_e pad); + +/** +* @brief ȡƽ +* @param padGPIOţοögpio_pad_e +* @retval +*/ +gpio_level_e hal_gpio_get_input_data(io_pad_e pad); + +/** +* @brief io mode +* @param padGPIOţοögpio_pad_e +* @param modeģʽοPADӦmodeö +* @retval +*/ +void hal_gpio_set_mode(io_pad_e pad, uint8_t mode); + +/** +* @brief ȡָPADĬ״̬ +* @param padGPIOţοögpio_pad_e +* @param up_enableĬ״̬ +* @param down_enableĬ״̬ +* @retval +*/ +void hal_gpio_get_pull_state(io_pad_e pad, function_state_e *up_enable, function_state_e *down_enable); + +/** +* @brief ָPADĬ״̬ +* @param padGPIOţοögpio_pad_e +* @param up_enableĬ״̬ +* @param down_enableĬ״̬ +* @retval +*/ +void hal_gpio_set_pull_state(io_pad_e pad, function_state_e up_enable, function_state_e down_enable); + +/** +* @brief ָPADǷΪʩش +* @param padGPIOţοögpio_pad_e +* @param st_enable1Ϊʩش0Ϊ +* @retval +*/ +void hal_gpio_set_schmitt_trigger(io_pad_e pad, function_state_e st_enable); + +/** +* @brief ָPAD +* @param padGPIOţοögpio_pad_e +* @param strengthǿȣȡֵΪ0~3 +* @retval +*/ +void hal_gpio_set_driving_strength(io_pad_e pad, uint8_t strength); + +/** +* @brief ָPADĵѹת +* @param padGPIOţοögpio_pad_e +* @param rateǿȣȡֵΪ0~3 +* @retval +*/ +void hal_gpio_set_slew_rate(io_pad_e pad, pad_slew_rate_e rate); + +/** +* @brief AP_RSTNж +* @param enable: жϿ +* @param cb_funcص +* @param trigģʽ +* @retval +*/ +void hal_gpio_set_ap_reset_int(bool enable, fcb_type cb_func, sys_cfg_trigger_e trig); + +#endif /* __HAL_GPIO_H__ */ diff --git a/src/sdk/include/hal_i2c_master.h b/src/sdk/include/hal_i2c_master.h new file mode 100644 index 0000000..5d2ec10 --- /dev/null +++ b/src/sdk/include/hal_i2c_master.h @@ -0,0 +1,73 @@ +/******************************************************************************* +* +* +* File: hal_i2c_master.h +* Description i2c hal file +* Version V0.1 +* Date 2021-10-14 +* Author zhanghz +*******************************************************************************/ + +#ifndef __HAL_I2C_MASTER_H__ +#define __HAL_I2C_MASTER_H__ + +#include "tau_device_datatype.h" +#include "tau_common.h" +#include "string.h" + +/************************************************************************** +* @name : hal_i2c_m_dma_init +* @brief : i2c master dma ʼ +* @param[in] : slave_addrĿӻַ +* @param[in] : addr_bitsĿӻַλ +* @param[in] : i2c_speed_hz: ͨ +* @return : +* @retval : +**************************************************************************/ +void hal_i2c_m_dma_init(uint8_t slave_addr, uint8_t addr_bits, uint32_t i2c_speed_hz); + +/************************************************************************** +* @name : hal_i2c_m_dma_write +* @brief : i2c master dma +* @param[in] : txBufferbuffer +* @param[in] : data_sizeݸ +* @return : STATUS_SUCCESS DMA ͨһȫ +* @return : ͳҪµú +* @retval : +**************************************************************************/ +status_t hal_i2c_m_dma_write(const uint8_t *txBuffer, size_t data_size); + +/************************************************************************** +* @name : hal_i2c_m_dma_read +* @brief : i2c master dma +* @param[in] : reg_addressȷͼĴַӻ +* @param[in] : reg_sizeַֽ +* @param[in] : rxBufferbuffer +* @param[in] : data_sizeݳ +* @return : STATUS_SUCCESSĴַͳɹDMAͨһɽ +* @return : ճҪµú +* @retval : +**************************************************************************/ +status_t hal_i2c_m_dma_read(uint32_t reg_address, size_t reg_size, uint8_t *rxBuffer, size_t data_size); + +/************************************************************************** +* @name : hal_i2c_m_transfer_complate +* @brief : ȡ i2c master ״̬ +* @param[in] : +* @return : trueݷ +* @return : falseݻڷ +* @retval : +**************************************************************************/ +bool hal_i2c_m_transfer_complate(void); + +/************************************************************************** +* @name : hal_i2c_m_set_high_impedance +* @brief : I2C IOΪ̬ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +void hal_i2c_m_set_high_impedance(void); + +#endif /* __HAL_I2C_MASTER_H__*/ + diff --git a/src/sdk/include/hal_i2c_slave.h b/src/sdk/include/hal_i2c_slave.h new file mode 100644 index 0000000..06c4f0a --- /dev/null +++ b/src/sdk/include/hal_i2c_slave.h @@ -0,0 +1,152 @@ +/******************************************************************************* +* +* +* File: hal_i2c_slave.h +* Description i2c hal file +* Version V0.1 +* Date 2021-10-14 +* Author zhanghz +*******************************************************************************/ + +#ifndef __HAL_I2C_SLAVE_H__ +#define __HAL_I2C_SLAVE_H__ + +#include "tau_device_datatype.h" +#include "tau_common.h" +#include "string.h" + +typedef enum +{ + I2C_S_INT_READ = 0, // ж + I2C_S_INT_RX, // ж + I2C_S_INT_STOP // stop ж +} e_i2c_s_int_status; + +typedef void (*hal_i2c_s_callback_t)(e_i2c_s_int_status int_status, size_t receive_num); + +/************************************************************************** +* @name : hal_i2c_s_init +* @brief : i2c slave ʼ +* @param[in] : slave_addrӻַ +* @param[in] : addr_bitsӻַλ +* @return : +* @retval : +**************************************************************************/ +void hal_i2c_s_init(uint8_t slave_addr, uint8_t addr_bits); + +/************************************************************************** +* @name : hal_i2c_s_dma_write +* @brief : i2c slave dma +* @param[in] : txBufferbuffer +* @param[in] : data_sizeݸ +* @return : STATUS_SUCCESS DMA ͨһȫ +* @return : ͳҪµú +* @retval : +**************************************************************************/ +status_t hal_i2c_s_dma_write(const uint8_t *txBuffer, size_t data_size); + +/************************************************************************** +* @name : hal_i2c_s_nonblocking_read +* @brief : i2c slave ׼ +* @param[in] : rxBufferbuffer +* @param[in] : data_size +* @return : STATUS_SUCCESS׼գʱͨŲһʼ +* @return : óҪµú +* @retval : +**************************************************************************/ +status_t hal_i2c_s_nonblocking_read(uint8_t *rxBuffer, size_t data_size); + +/************************************************************************** +* @name : hal_i2c_s_transfer_complate +* @brief : ȡ i2c slave ״̬ +* @param[in] : +* @return : trueݷ +* @return : falseݻڷ +* @retval : +**************************************************************************/ +bool hal_i2c_s_write_complate(void); + +/************************************************************************** +* @name : hal_i2c_s_read_complate +* @brief : ȡ i2c slave ״̬ +* @param[in] : +* @return : ݽո +* @retval : +**************************************************************************/ +uint8_t hal_i2c_s_read_complate(void); + +/************************************************************************** +* @name : hal_i2c_s_read_complate_clear +* @brief : i2c slave ״̬ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +void hal_i2c_s_read_complate_clear(void); + +/************************************************************************** +* @name : hal_i2c_s_set_dma_tx_cycle +* @brief : I2C cycle ģʽ +* @param[in] : +* @return : ENABLEcycleģʽDISABLEcycleģʽ +* @retval : +**************************************************************************/ +void hal_i2c_s_set_dma_tx_cycle(bool enable); + +/************************************************************************** +* @name : hal_i2c_s_set_transfer +* @brief : i2c ӻݽ +* @param[in] :hal_tp_transfer_phone_tmpָ +* @return : +* @retval : +**************************************************************************/ +void hal_i2c_s_set_transfer(hal_i2c_s_callback_t hal_i2c_s_callback_tmp); + +/************************************************************************** +* @name : hal_i2c_s_read_data +* @brief :read data +* @param[in] : rx_data: +* @return : 1: ɹȡ +* @return : 0: fifo Ϊ +* @retval : +**************************************************************************/ +status_t hal_i2c_s_read_data(uint8_t *rx_data); + +/************************************************************************** +* @name : hal_i2c_s_write_data +* @brief :write data +* @param[in] : tx_data: ׼͵ +* @return : 1: ÷ͳɹ +* @return : 0: fifo +* @retval : +**************************************************************************/ +status_t hal_i2c_s_write_data(const uint8_t tx_data); + +/************************************************************************** + * @name : hal_i2c_s_rxfifo_notempty + * @brief : жϵǰ rxfifo Ƿ + * @param[in] : + * @return : true: rxfifo + * @return : false: rxfifo û + * @retval : + **************************************************************************/ +bool hal_i2c_s_rxfifo_notempty(void); + +/************************************************************************** +* @name : hal_i2c_s_set_high_impedance +* @brief : I2C ӻIOΪ̬ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +void hal_i2c_s_set_high_impedance(void); + /************************************************************************** + * @name : hal_i2c_s_get_tx_byte_num + * @brief : ȡI2Cӻͳɹֽ + * @param[in] : + * @return :ֽ + * @retval : + **************************************************************************/ +int hal_i2c_s_get_tx_byte_num(void); +#endif /* __HAL_I2C_SLAVE_H__*/ + diff --git a/src/sdk/include/hal_pwm.h b/src/sdk/include/hal_pwm.h new file mode 100644 index 0000000..ab75fec --- /dev/null +++ b/src/sdk/include/hal_pwm.h @@ -0,0 +1,209 @@ +/******************************************************************************* +* +* +* File: hal_pwm.h +* Description pwm HALͷļ +* Version V0.1 +* Date 2021-03-17 +* Author wuc + *******************************************************************************/ +#ifndef __HAL_PWM_H__ +#define __HAL_PWM_H__ + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "tau_device_datatype.h" +#include "tau_common.h" +#include "hal_gpio.h" + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ +/*! @brief PWMܵĶ */ +typedef enum _pwm_out_ctrl_e +{ + PWMO_CTRL_KEEP = 0, + PWMO_CTRL_LOW = 1, + PWMO_CTRL_HIGH = 2, + PWMO_CTRL_TOGGLE = 3, + PWMO_CTRL_MAX +} pwm_out_ctrl_e; + +/******************************************************************************* +* 4.Global variable extern declarations +*******************************************************************************/ + +/******************************************************************************* +* 5.Global function prototypes +*******************************************************************************/ +/** +* @brief PWMOʼ +* @param +* @retval +*/ +void hal_pwm_out_init(void); + +/** +* @brief PWMOʼ +* @param +* @retval +*/ +void hal_pwm_out_deinit(void); + +/** +* @brief PWMOָͣ +* @param stateؿ +* @retval +*/ +void hal_pwm_out_pause(function_state_e state); + +/** +* @brief PWMO岢ʼ +* @param ctl0ֵthr0ʱIJοöpwm_out_ctrl_e +* @param ctl1ֵthr1ʱIJοöpwm_out_ctrl_e +* @param thr0ֵ0λus +* @param thr1ֵ1λus +* @param periodһڵʱ䣬λus +* @retval +*/ +void hal_pwm_out_config_all(pwm_out_ctrl_e ctl0, pwm_out_ctrl_e ctl1, uint32_t thr0, uint32_t thr1, uint32_t period); + +/** +* @brief ͬģʽPWMOв +* @param ctl0ֵthr0ʱIJοöpwm_out_ctrl_e +* @param ctl1ֵthr1ʱIJοöpwm_out_ctrl_e +* @param thr0ֵ0λus +* @param thr1ֵ1λus +* @param periodһڵʱ䣬λus +* @retval +*/ +void hal_pwm_out_sync_all(pwm_out_ctrl_e ctl0, pwm_out_ctrl_e ctl1, uint32_t thr0, uint32_t thr1, uint32_t period); + +/** +* @brief ͬģʽPWMO +* @param periodһڵʱ䣬λus +* @retval +*/ +void hal_pwm_out_sync_period(uint32_t period); + +/** +* @brief ͬģʽPWMOĿ +* @param ctl0ֵthr0ʱIJοöpwm_out_ctrl_e +* @param ctl1ֵthr1ʱIJοöpwm_out_ctrl_e +* @retval +*/ +void hal_pwm_out_sync_ctl(pwm_out_ctrl_e ctl0, pwm_out_ctrl_e ctl1); + +/** +* @brief ֵͬģʽPWMOֵ +* @param thr0ֵ0λus +* @param thr1ֵ1λus +* @retval +*/ +void hal_pwm_out_sync_thr(uint32_t thr0, uint32_t thr1); + +/** +* @brief ͬͣģʽָͣPWMO +* @param pause_stateָͣ +* @retval +*/ +void hal_pwm_out_sync_pause(function_state_e pause_state); + +/** +* @brief PWMIʼ +* @param +* @retval +*/ +void hal_pwm_in_init(void); + +/** +* @brief PWMIʼ +* @param +* @retval +*/ +void hal_pwm_in_deinit(void); + +/** +* @brief עPWMIжϻصشPWMIжָ룬οpwm_int_type_e +* @param cb_funcصַ +* @retval +*/ +void hal_pwm_in_register_callback(fcb_type cb_func); + +/** +* @brief PWMIжϵĿ +* @param high_overflow_enhigh overflowжʹܿ +* @param low_overflow_enlow overflowжʹܿ +* @param total_overflow_entotal overflowжʹܿ +* @param high_done_enhigh doneжʹܿ +* @param low_done_enlow doneжʹܿ +* @param total_done_entotal doneжʹܿ +* @retval +*/ +void hal_pwm_in_config_int(function_state_e high_overflow_en, function_state_e low_overflow_en, function_state_e total_overflow_en, + function_state_e high_done_en, function_state_e low_done_en, function_state_e total_done_en); + +/** +* @brief PWMIжϵĿ +* @param pwm_intжͣοöpwm_int_type_e +* @param enableƿ +* @retval +*/ +void hal_pwm_in_set_int(pwm_int_type_e pwm_int, function_state_e enable); + +/** +* @brief رPWMIж +* @param +* @retval +*/ +void hal_pwm_in_clear_int(void); + +/** +* @brief PWMIж +* @param stateؿ +* @retval +*/ +void hal_pwm_in_ctrl_int(function_state_e state); + +/** +* @brief ȡPWMIʱ +* @param +* @retval ʱλus +*/ +uint32_t hal_pwm_in_get_total_period(void); + +/** +* @brief ȡPWMIߵƽʱ +* @param +* @retval ߵƽʱλus +*/ +uint32_t hal_pwm_in_get_high_period(void); + +/** +* @brief ȡPWMI͵ƽʱ +* @param +* @retval ͵ƽʱλus +*/ +uint32_t hal_pwm_in_get_low_period(void); + +/** +* @brief ȡPWMIۻ +* @param +* @retval ģʹܵǰʱظ32λ¼ +*/ +uint32_t hal_pwm_in_get_current_count(void); + +#if defined(ISP_568) || defined(ISP_368) + /** + * @brief ѡPWMOIO + * @param pad: PWMOIO,ĬΪIO_PAD_AP_SWIRE,ѡͨIO_PAD_TD_SPIM_MISOIO_PAD_TD_LEDPWM + * @retval + */ + void hal_pwm_out_sel_io(io_pad_e pad); +#endif +#endif /* __HAL_PWM_H__ */ diff --git a/src/sdk/include/hal_spi_master.h b/src/sdk/include/hal_spi_master.h new file mode 100644 index 0000000..93c178c --- /dev/null +++ b/src/sdk/include/hal_spi_master.h @@ -0,0 +1,82 @@ +/******************************************************************************* +* +* +* File: hal_spi_touch.h +* Description spi hal file +* Version V0.1 +* Date 2021-10-25 +* Author zhanghz +*******************************************************************************/ + +#ifndef __HAL_SPI_MASTER_H__ +#define __HAL_SPI_MASTER_H__ + +#include "tau_device_datatype.h" +#include "tau_common.h" +#include "string.h" + +/************************************************************************** +* @name : hal_spi_m_dma_init +* @brief : SPIM DMA ʼ +* @param[in] :speedͨ +* @param[in] :cpha: õһʱػߵڶʱЧ +* @param[in] :cpol: ߿ʱʱӵƽ +* @return : +* @retval : +**************************************************************************/ +void hal_spi_m_dma_init(uint32_t speed, uint8_t cpha, uint8_t cpol); + +/************************************************************************** +* @name : hal_spi_m_dma_write +* @brief : SPIM +* @param[in] :data_buffer: buffer ͷַ +* @param[in] :data_size: buffer +* @return :STATUS_SUCCESS: óɹݲһ +* @return :òɹҪ÷ +* @retval : +**************************************************************************/ +status_t hal_spi_m_dma_write(const uint8_t *data_buffer, size_t data_size); + +/************************************************************************** +* @name : hal_spi_m_dma_read +* @brief : SPIM ȡ +* @param[in] :cmd: buffer ͷַ +* @param[in] :cmd_size: buffer +* @param[in] :data_buffer: ȡ buffer ͷַ +* @param[in] :data_size: ȡ buffer +* @return :STATUS_SUCCESS: óɹݲһȡ +* @return :òɹҪ÷ +* @retval : +**************************************************************************/ +status_t hal_spi_m_dma_read(const uint8_t *cmd, size_t cmd_size, uint8_t *data_buffer, size_t data_size); + +/************************************************************************** +* @name : hal_spi_m_get_transfer_complate +* @brief : ȡ SPIM ͨ״̬ +* @param[in] : +* @return :trueͨ +* @retval : +**************************************************************************/ +bool hal_spi_m_get_transfer_complate(void); + +/************************************************************************** +* @name : hal_spi_m_clear_rxfifo +* @brief : rxfifo е +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +void hal_spi_m_clear_rxfifo(void); + +/************************************************************************** +* @name : hal_spi_m_set_high_impedance +* @brief : SPI IOΪ̬ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +void hal_spi_m_set_high_impedance(void); + + +#endif + diff --git a/src/sdk/include/hal_spi_slave.h b/src/sdk/include/hal_spi_slave.h new file mode 100644 index 0000000..fc0c57f --- /dev/null +++ b/src/sdk/include/hal_spi_slave.h @@ -0,0 +1,181 @@ +/******************************************************************************* +* Copyright (C) 2021-2022, All Rights Reserved. +* +* File: hal_spi_slave.h +* Description spi slave hal file +* Version V0.1 +* Date 2021-10-23 +* Author lzy +*******************************************************************************/ +#ifndef __HAL_SPI_SLAVE_H__ +#define __HAL_SPI_SLAVE_H__ + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "tau_dsi_datatype.h" +#include "tau_common.h" + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ +/* +Զģʽevent eg:rx_buffer_size=8, host16byte, +յǰ8byteʱSPI_EVENT_RCV_FULL¼,¼, +ɺhostCS,SPI_EVENT_RCV_CS_HIGH¼ +*/ +typedef enum +{ + SPI_EVENT_RCV_DATA = 0, /* ֶģʽ£SPIS ÿһݼ¼ */ + SPI_EVENT_RCV_FULL, /* Զģʽ SPIS ݵbuffer size¼ */ + SPI_EVENT_RCV_CS_HIGH, /* Զģʽ SPIS յCS ߵź */ +} hal_spis_event_e; + +typedef struct hal_spi_packet_info_t +{ + uint8_t *rx_buffer; /* buffer */ + uint32_t rx_buffer_size; /* buffer size */ + bool rx_circle; /* circle mode */ + const uint8_t *tx_buffer; /* buffer */ + uint32_t tx_buffer_size; /* buffer size */ + bool tx_circle; /* circle mode */ + uint32_t packet_size; /* packet size */ +} hal_spi_packet_info_t; + +typedef void (*hal_spi_slave_cb)(hal_spis_event_e event, hal_spi_packet_info_t *packet_info); + +/******************************************************************************* +* 4.Global variable extern declarations +*******************************************************************************/ + +/******************************************************************************* +* 5.Global function prototypes +*******************************************************************************/ +/** +* @brief ʼspi slave ģ +* @param cpha: λ +* @param cpol: +* @param dma: ԶģʽDMA enable +* @retval true/false +*/ +bool hal_spi_slave_init(uint8_t cpha, uint8_t cpol, bool dma); + +/** +* @brief spi slave ģȥʼ +* @param none +* @retval true/false +*/ +bool hal_spi_slave_deinit(void); + +/** +* @brief spi slave עص +* @param cbcall back +* @retval true/false +*/ +bool hal_spi_slave_register_callback(hal_spi_slave_cb cb); + +/** +* @brief spi slave enable +* @param none +* @retval true/false +*/ +bool hal_spi_slave_enable(void); + +/** +* @brief spi slave disable +* @param none +* @retval true/false +*/ +bool hal_spi_slave_disable(void); + +/** +* @brief spi slave Զbuffer, ײԶݺcallback, bufferΪNULLʱΪԶģʽ +* @param bufferԶģʽݽbuffer +* @param size Զģʽݽbuffer size +* @param circlecircle modepacket size buffer size ʱoffset 0д(ݲ֧) +* @retval true/false +*/ +bool hal_spi_slave_set_auto_rx_buffer(uint8_t *buffer, uint32_t size, bool circle); + +/** +* @brief spi slave Զbuffer +* @param bufferԶģʽݷbuffer, bufferΪNULLΪлΪԶģʽ +* @param size Զģʽݷbuffer size +* @param circlecircle modeظbuffer +* @retval true/false +*/ +bool hal_spi_slave_set_auto_tx_buffer(const uint8_t *buffer, uint32_t size, bool circle); + +/** +* @brief spi slave Զ +* @param none +* @retval true/false +*/ +bool hal_spi_slave_auto_transfer_start(void); + +/** +* @brief spi slave ֹͣԶ(circle mode packetʹ) +* @param none +* @retval true/false +*/ +bool hal_spi_slave_auto_transfer_abort(void); + +/** +* @brief spi slave flush fifo(circle mode packetʹ) +* @param none +* @retval true/false +*/ +bool hal_spi_slave_flush_fifo(void); + +/** +* @brief reset spis tx,spis +* @param bufferԶģʽݷbuffer +* @param size Զģʽݷbuffer size +* @param circlecircle modeظbuffer +* @retval true/false +*/ +bool hal_spi_slave_reset_tx(const uint8_t *buffer, uint32_t size, bool circle); + +/** +* @brief check spi slave busy(CS status) +* @param none +* @retval true/false +*/ +bool hal_spi_slave_busy(void); + +/** +* @brief ȡrx fifo ǿ +* @param none +* @retval true/false +*/ +bool hal_spi_slave_get_rxfifo_notempty(void); + +/** +* @brief ֶģʽ´rx fifo ȡ +* @param none +* @retval true/false +*/ +bool hal_spi_slave_read_data(uint32_t *data); + +/** +* @brief ֶģʽtx fifo д +* @param none +* @retval true/false +*/ +bool hal_spi_slave_write_data(const uint8_t data); + +/************************************************************************** +* @name : hal_spi_s_set_high_impedance +* @brief : SPI ӻIOΪ̬ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +void hal_spi_s_set_high_impedance(void); + +#endif /* __HAL_SPI_SLAVE_H__*/ + diff --git a/src/sdk/include/hal_swire.h b/src/sdk/include/hal_swire.h new file mode 100644 index 0000000..9660e83 --- /dev/null +++ b/src/sdk/include/hal_swire.h @@ -0,0 +1,75 @@ +/******************************************************************************* +* +* +* File: hal_swire.h +* Description swire HALͷļ +* Version V0.1 +* Date 2021-03-17 +* Author wuc + *******************************************************************************/ +#ifndef __HAL_SWIRE_H__ +#define __HAL_SWIRE_H__ + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "tau_device_datatype.h" +#include "tau_common.h" + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ + +/******************************************************************************* +* 4.Global variable extern declarations +*******************************************************************************/ + +/******************************************************************************* +* 5.Global function prototypes +*******************************************************************************/ +/** +* @brief SWIREʼ +* @param +* @retval +*/ +void hal_swire_init(void); + +/** +* @brief SWIREʼ +* @param +* @retval +*/ +void hal_swire_deinit(void); + +/** +* @brief SWIRE岢ʼ +* @param start_timeʼʱλus +* @param stop_timeʱλus300us +* @param high_timeߵƽʱλus +* @param low_time͵ƽʱλus +* @param pulseظ +* @retval +*/ +void hal_swire_start(uint32_t start_time, uint32_t stop_time, + uint32_t high_time, uint32_t low_time, + uint32_t pulse); + +/** +* @brief 򿪻رձ +* @param stateؿ +* @retval +*/ +void hal_swire_open(function_state_e state); + +/** +* @brief עص +* @param cb_funcصַ +* @retval +*/ +void hal_swire_register_callback(fcb_type cb_func); + +#endif /* __HAL_SWIRE_H__ */ diff --git a/src/sdk/include/hal_system.h b/src/sdk/include/hal_system.h new file mode 100644 index 0000000..35c229b --- /dev/null +++ b/src/sdk/include/hal_system.h @@ -0,0 +1,153 @@ +/******************************************************************************* +* +* +* File: hal_system.h +* Description hal 通用系统接口头文件 +* Version V0.1 +* Date 2021-05-21 +* Author lzy + *******************************************************************************/ +#ifndef __HAL_SYSTEM_H__ +#define __HAL_SYSTEM_H__ +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "tau_common.h" + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ + +/******************************************************************************* +* 4.Global variable extern declarations +*******************************************************************************/ + +/******************************************************************************* +* 5.Global function prototypes +*******************************************************************************/ + +/** +* @brief system 初始化 +* @param none +* @retval none +*/ +void hal_system_init(uint32_t sysclk); + +/** +* @brief system 初始化 console +* @param baud_rate 波特率 +* @retval none +*/ +void hal_system_init_console(uint32_t baud_rate); + +/** +* @brief mcu进入idle模式,等待中断唤醒 +* @param disable_systick: 进入idle时是否关闭systick(退出idle 恢复systick) +* @retval none +*/ +void hal_system_idle_mode(bool disable_systick); + +/** +* @brief 注册systick回调函数 +* @param cb_func：回调函数地址 +* @retval 无 +*/ +void hal_system_register_systick_cb(fcb_type cb_func); + +/** +* @brief 启动sys tickt +* @param ms: sys tickt 间隔, 范围1-10ms +* @retval true/false +*/ +bool hal_system_enable_systick(uint8_t ms); + +/** +* @brief 获取systickt +* @param none +* @retval 当前systickt值 +*/ +bool hal_system_disable_systick(void); + +/** +* @brief 获取systickt +* @param none +* @retval 当前systickt值 +*/ +uint32_t hal_system_get_tick(void); + +/** +* @brief 进入deep sleep mode 模式, 等待AP_RSTN 唤醒 +* @param polarity true:上升沿唤醒, false:下降沿唤醒 +* @retval none +*/ +void hal_system_deep_sleep_mode(bool polarity); + +/** +* @brief 配置共享flash开关(使用过后注意关闭,常开功耗会增加) +* @param enable:true:可通过F_SPI访问内部flash , false:不可通过F_SPI访问内部flash +* @retval true/false +*/ +bool hal_system_share_flash_mode(bool enable); + +/** +* @brief sleep mode 配置 +* @param enable +* @retval none +*/ +void hal_system_sleep_mode(bool enable); + +/** +* @brief reset chip +* @param none +* @retval none +*/ +void hal_system_reset_chip(void); + +/** +* @brief 开关PVD检测 +* @param none +* @retval none +*/ +void hal_system_set_pvd(bool enable); + +/** +* @brief VCC电源开关， +* 使用场景: VCC掉电，13D与13M使用外灌电源时，关闭内部VCC供电,防止电源倒灌 +* @param enable: true:打开CP, false:关闭CP +* @retval none +*/ +void hal_system_set_vcc(bool enable); + +/** +* @brief 用户字节数组形式从flash读取数据,按页读取，每页1024字节 +* @param *usr_cfg_t_addr(数组首地址), + usr_cfg_t_size(数组大小可以超过1024，可以按页读也可连续跨页读) + flash_page （页0~63） +* @retval bool 无 +*/ +bool hal_system_flash_read(uint8_t *usr_cfg_t_addr, uint16_t usr_cfg_t_size, uint8_t flash_page); + +/** +* @brief 用户字节数组形式存入flash(次数有限，不可频繁写入),按页写入，每页1024字节 +* @param *usr_cfg_t_addr(数组首地址), + usr_cfg_t_size(数组大小可以超过1024，可以按页写也可连续跨页写入)， + 推荐按页顺序写入方式，第一次必须从0页开始写入，后续才可1~63任意页写入 + flash_page （写入页0~63） +* @retval bool 校验size是否超出 +*/ +bool hal_system_flash_write(uint8_t *usr_cfg_t_addr, uint16_t usr_cfg_t_size, uint8_t flash_page); + +#if defined(ISP_568) || defined(ISP_368) + /** + * @brief 控制DPHY内部校准开关 + * @param en: 使能开关 + * @retval none + */ + void hal_system_set_phy_calibration(bool en); +#endif + +#endif //__HAL_SYSTEM_H__ diff --git a/src/sdk/include/hal_timer.h b/src/sdk/include/hal_timer.h new file mode 100644 index 0000000..882fc60 --- /dev/null +++ b/src/sdk/include/hal_timer.h @@ -0,0 +1,81 @@ +/******************************************************************************* +* +* +* File: hal_timer.h +* Description： timer HAL层头文件 +* Version： V0.1 +* Date： 2021-03-16 +* Author： wuc + *******************************************************************************/ +#ifndef __HAL_TIMER_H__ +#define __HAL_TIMER_H__ + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "tau_device_datatype.h" +#include "tau_common.h" + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ + +/******************************************************************************* +* 4.Global variable extern declarations +*******************************************************************************/ + +/******************************************************************************* +* 5.Global function prototypes +*******************************************************************************/ +/** +* @brief 指定定时器初始化 +* @param index：实例序号(0~3)，参考枚举类型timer_num_e +* @retval 无 +*/ +void hal_timer_init(timer_num_e index); + +/** +* @brief 指定定时器反初始化 +* @param index：实例序号(0~3)，参考枚举类型timer_num_e +* @retval 无 +*/ +void hal_timer_deinit(timer_num_e index); + +/** +* @brief 启动指定定时器 +* @param index：实例序号(0~3)，参考枚举类型timer_num_e +* @param ms：超时时间，单位ms。由于应用场景一般是ms级别的，应用开发不需要计数具体时针数， + 故直接输入时间，在接口内部换算成时钟数进行寄存器设置。 +* @param cb_func：回调函数地址，不需要则填NULL +* @param data：回调函数的参数地址，不需要则填NULL +* @retval 无 +*/ +void hal_timer_start(timer_num_e index, uint32_t ms, fcb_type cb_func, void *data); + +/** +* @brief 停止指定定时器 +* @param index：实例序号(0~3)，参考枚举类型timer_num_e +* @retval 无 +*/ +void hal_timer_stop(timer_num_e index); + +/** +* @brief 设置定时器是否循环超时 +* @param index：实例序号(0~3)，参考枚举类型timer_num_e +* @param bool enable：循环超时使能 +* @retval 无 +*/ +void hal_timer_set_repeat(timer_num_e index, bool repeat); + +/** +* @brief 获取指定指示器状态 +* @param index：实例序号(0~3)，参考枚举类型timer_num_e +* @retval 参考timer_status_e +*/ +timer_status_e hal_timer_get_status(timer_num_e index); + +#endif /* __HAL_TIMER_H__ */ diff --git a/src/sdk/include/hal_uart.h b/src/sdk/include/hal_uart.h new file mode 100644 index 0000000..82efe74 --- /dev/null +++ b/src/sdk/include/hal_uart.h @@ -0,0 +1,131 @@ +/******************************************************************************* +* +* +* File: hal_uart.h +* Description +* Version V0.1 +* Date 2021-11-24 +* Author kc +*******************************************************************************/ + +#ifndef __HAL_UART_H__ +#define __HAL_UART_H__ + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "stdint.h" +#include "tau_common.h" + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ +typedef enum +{ + HAL_UART_STOPBIT_1 = 0, + HAL_UART_STOPBIT_2 = 1 +} hal_uart_stopbit_e; + +typedef enum +{ + HAL_UART_PARITY_NO = 0, + HAL_UART_PARITY_ODD = 0x01, + HAL_UART_PARITY_EVEN = 0x03, +} hal_uart_parity_e; + +typedef enum +{ + HAL_UART_DATAWIDTH_6 = 1, + HAL_UART_DATAWIDTH_7 = 2, + HAL_UART_DATAWIDTH_8 = 3 +} hal_uart_datawidth_e; + + +typedef struct +{ + uint32_t baudrate; + hal_uart_stopbit_e stopbits; + hal_uart_datawidth_e data_width; + hal_uart_parity_e parity; +} hal_uart_config_t; + + +typedef struct _hal_uart_handle_t +{ + hal_uart_config_t uart_config; + void (* txdmacallback)(void); + void (* rxdmacallback)(void); +} hal_uart_handle_t; + + +typedef enum +{ + HAL_UART_OK = 0x00U, + HAL_UART_ERROR = 0x01U, + HAL_UART_BUSY = 0x02U, + HAL_UART_TIMEOUT = 0x03U +} hal_uart_status; + + +/******************************************************************************* +* 4.Global variable extern declarations +*******************************************************************************/ + +/******************************************************************************* +* 5.Global function prototypes +*******************************************************************************/ +/** +* @brief ʼuart IJʡλȲ +* @param hal_uart_handle_t +* @retval hal_uart_status +*/ +hal_uart_status hal_uart_init(hal_uart_handle_t *huart); + +/** +* @brief رuart +* @param hal_uart_handle_t +* @retval hal_uart_status +*/ +hal_uart_status hal_uart_deinit(hal_uart_handle_t *huart); + +/** +* @brief ʽ +* @param hal_uart_handle_t +* @param pdata:ָ +* @param size:ݴС +* @retval hal_uart_status +*/ +hal_uart_status hal_uart_transmit_blocking(hal_uart_handle_t *huart, uint8_t *pdata, uint16_t size); + +/** +* @brief ʽ +* @param hal_uart_handle_t +* @param pdata:ָ +* @param size:ݴС +* @retval hal_uart_status +*/ +hal_uart_status hal_uart_receive_blocking(hal_uart_handle_t *huart, uint8_t *pdata, uint16_t size); + +/** +* @brief ʹDMAݣTXRXһDMA ͨҪTX/RXܽRX/TXĴ +* @param hal_uart_handle_t +* @param pdata:ָ +* @param size:ݴС +* @retval hal_uart_status +*/ +hal_uart_status hal_uart_transmit_dma(hal_uart_handle_t *huart, uint8_t *pdata, uint16_t size); + +/** +* @brief ʹDMAݣTXRXһDMA ͨҪTX/RXܽRX/TXĴ +* @param hal_uart_handle_t +* @param pdata:ָ +* @param size:ݴС +* @retval hal_uart_status +*/ +hal_uart_status hal_uart_receive_dma(hal_uart_handle_t *huart, uint8_t *pdata, uint16_t size); + +#endif /* __HAL_UART_H__ */ diff --git a/src/sdk/include/hal_wdg.h b/src/sdk/include/hal_wdg.h new file mode 100644 index 0000000..87c9360 --- /dev/null +++ b/src/sdk/include/hal_wdg.h @@ -0,0 +1,94 @@ +/******************************************************************************* +* +* +* File: hal_wdg.h +* Description： wdg HAL层头文件 +* Version： V0.1 +* Date： 2021-03-16 +* Author： wuc + *******************************************************************************/ +#ifndef __HAL_WDG_H__ +#define __HAL_WDG_H__ + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "tau_device_datatype.h" +#include "tau_common.h" + + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ +/*! + * @brief watch dog模式 + */ +typedef enum +{ + WDG_MODE_RESET = 0, //复位模式，跑飞复位 + WDG_MODE_INTERRUPT = 1 //中断模式，跑飞进入中断 +} wdg_mode_e; + +/******************************************************************************* +* 4.Global variable extern declarations +*******************************************************************************/ + +/******************************************************************************* +* 5.Global function prototypes +*******************************************************************************/ +/** +* @brief 看门狗初始化 +* @param 无 +* @retval 无 +*/ +void hal_wdg_init(void); + +/** +* @brief 看门狗反初始化 +* @param 无 +* @retval 无 +*/ +void hal_wdg_deinit(void); + +/** +* @brief 启动看门狗 +* @param wdg_mode_e modeSel: 复位或中断模式 +* @param uint32_t load: 超时时间，单位ms +* @retval 无 +*/ +void hal_wdg_start(wdg_mode_e modeSel, uint32_t load); + +/** +* @brief 停止看门狗 +* @param 无 +* @retval 无 +*/ +void hal_wdg_stop(void); + +/** +* @brief 设置WDG是否循环超时 +* @param enable：循环超时使能 +* @retval 无 +*/ +void hal_wdg_set_repeat(bool repeat); + +/** +* @brief 注册中断回调函数 +* @param cb_func：回调函数地址 +* @param data：回调参数地址 +* @retval 无 +*/ +void hal_wdg_register_callback(fcb_type cb_func, void *data); + +/** +* @brief 喂狗 +* @param 无 +* @retval 无 +*/ +void hal_wdg_kick_dog(void); + +#endif /* __HAL_WDG_H__ */ diff --git a/src/sdk/lib/CVWL568.lib b/src/sdk/lib/CVWL568.lib new file mode 100644 index 0000000..f600880 Binary files /dev/null and b/src/sdk/lib/CVWL568.lib differ diff --git a/src/sdk/lib/WL568_S21_NT37701_TP.lib b/src/sdk/lib/WL568_S21_NT37701_TP.lib new file mode 100644 index 0000000..8792792 Binary files /dev/null and b/src/sdk/lib/WL568_S21_NT37701_TP.lib differ diff --git a/src/sdk/sdk_version.h b/src/sdk/sdk_version.h new file mode 100644 index 0000000..4455add --- /dev/null +++ b/src/sdk/sdk_version.h @@ -0,0 +1 @@ +#define SDK_REVISION 3496 \ No newline at end of file